gcc/ChangeLog

   1 2020-01-08  Martin Liska  <mliska@suse.cz>
   2
   3         * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
   4         (ipa_call_context::estimate_size_and_time): Likewise.
   5         (inline_analyze_function): Likewise.
   6
   7 2020-01-08  Martin Liska  <mliska@suse.cz>
   8
   9         * cgraph.c (cgraph_node::dump): Use systematically
  10         dump_asm_name.
  11
  12 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  13
  14         Add -nodevicespecs option for avr.
  15
  16         PR target/93182
  17         * config/avr/avr.opt (-nodevicespecs): New driver option.
  18         * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
  19         "-specs=device-specs/..." if that option is not set.
  20         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
  21
  22 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  23
  24         Implement 64-bit double functions for avr.
  25
  26         PR target/92055
  27         * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
  28         --with-double-comparison.
  29         * doc/install.texi: Document them.
  30         * config/avr/avr-c.c (avr_cpu_cpp_builtins)
  31         <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
  32         <WITH_DOUBLE_COMPARISON>: New built-in defines.
  33         * doc/invoke.texi (AVR Built-in Macros): Document them.
  34         * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
  35         * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
  36         * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
  37
  38 2020-01-08  Richard Earnshaw  <rearnsha@arm.com>
  39
  40         PR target/93188
  41         * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
  42         armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
  43         when only building rm-profile multilibs.
  44
  45 2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>
  46
  47         PR ipa/93084
  48         * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
  49         lattice for a value to check.
  50         (propagate_vals_across_arith_jfunc): Add an assertion to ensure
  51         finite propagation in self-recursive scc.
  52
  53 2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>
  54
  55         * ipa-inline.c (caller_growth_limits): Restore the AND.
  56
  57 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  58
  59         * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
  60         (VEC_ALLREG_ALT): New iterator.
  61         (VEC_ALLREG_INT_MODE): New iterator.
  62         (VCMP_MODE): New iterator.
  63         (VCMP_MODE_INT): New iterator.
  64         (vec_cmpu<mode>di): Use VCMP_MODE_INT.
  65         (vec_cmp<u>v64qidi): New define_expand.
  66         (vec_cmp<mode>di_exec): Use VCMP_MODE.
  67         (vec_cmpu<mode>di_exec): New define_expand.
  68         (vec_cmp<u>v64qidi_exec): New define_expand.
  69         (vec_cmp<mode>di_dup): Use VCMP_MODE.
  70         (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
  71         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
  72         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
  73         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
  74         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
  75         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
  76         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
  77         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
  78         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
  79         this.
  80         * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
  81         * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
  82
  83 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  84
  85         * config/gcn/constraints.md (DA): Update description and match.
  86         (DB): Likewise.
  87         (Db): New constraint.
  88         * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
  89         parameter.
  90         * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
  91         Implement 'Db' mixed immediate type.
  92         * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
  93         (addcv64si3_dup<exec_vcc>): Delete.
  94         (subcv64si3<exec_vcc>): Rework constraints.
  95         (addv64di3): Rework constraints.
  96         (addv64di3_exec): Rework constraints.
  97         (subv64di3): Rework constraints.
  98         (addv64di3_dup): Delete.
  99         (addv64di3_dup_exec): Delete.
 100         (addv64di3_zext): Rework constraints.
 101         (addv64di3_zext_exec): Rework constraints.
 102         (addv64di3_zext_dup): Rework constraints.
 103         (addv64di3_zext_dup_exec): Rework constraints.
 104         (addv64di3_zext_dup2): Rework constraints.
 105         (addv64di3_zext_dup2_exec): Rework constraints.
 106         (addv64di3_sext_dup2): Rework constraints.
 107         (addv64di3_sext_dup2_exec): Rework constraints.
 108
 109 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
 110
 111         * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
 112         existing target checks.
 113
 114 2020-01-07  Richard Biener  <rguenther@suse.de>
 115
 116         * doc/install.texi: Bump minimal supported MPC version.
 117
 118 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
 119
 120         * langhooks-def.h (lhd_simulate_enum_decl): Declare.
 121         (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
 122         * langhooks.c: Include stor-layout.h.
 123         (lhd_simulate_enum_decl): New function.
 124         * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
 125         handle_arm_sve_h for the LTO frontend.
 126         (register_vector_type): Cope with null returns from pushdecl.
 127
 128 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
 129
 130         * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
 131         (aarch64_sve::nvectors_if_data_type): Replace with...
 132         (aarch64_sve::builtin_type_p): ...this.
 133         * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
 134         (find_vector_type): Delete.
 135         (add_sve_type_attribute): New function.
 136         (lookup_sve_type_attribute): Likewise.
 137         (register_builtin_types): Add an "SVE type" attribute to each type.
 138         (register_tuple_type): Likewise.
 139         (svbool_type_p, nvectors_if_data_type): Delete.
 140         (mangle_builtin_type): Use lookup_sve_type_attribute.
 141         (builtin_type_p): Likewise.  Add an overload that returns the
 142         number of constituent vector and predicate registers.
 143         * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
 144         (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
 145         instead of aarch64_sve_argument_p.
 146         (aarch64_takes_arguments_in_sve_regs_p): Likewise.
 147         (aarch64_pass_by_reference): Likewise.
 148         (aarch64_function_value_1): Likewise.
 149         (aarch64_return_in_memory): Likewise.
 150         (aarch64_layout_arg): Likewise.
 151
 152 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
 153
 154         PR tree-optimization/93156
 155         * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
 156         least significant bit is always clear.
 157
 158         PR tree-optimization/93118
 159         * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
 160         simplifier with two intermediate conversions.
 161
 162 2020-01-07  Martin Liska  <mliska@suse.cz>
 163
 164         * params.opt: Add Optimization for various parameters.
 165
 166 2020-01-07  Martin Liska  <mliska@suse.cz>
 167
 168         PR ipa/83411
 169         * doc/extend.texi: Explain cloning for target_clone
 170         attribute.
 171
 172 2020-01-07  Martin Liska  <mliska@suse.cz>
 173
 174         PR tree-optimization/92860
 175         * common.opt: Make in Optimization option
 176         as it is affected by -O0, which is an Optimization
 177         option.
 178         * tree-inline.c (tree_inlinable_function_p):
 179         Use opt_for_fn for warn_inline.
 180         (expand_call_inline): Likewise.
 181
 182 2020-01-07  Martin Liska  <mliska@suse.cz>
 183
 184         PR tree-optimization/92860
 185         * common.opt: Make flag_ree as optimization
 186         attribute.
 187
 188 2020-01-07  Martin Liska  <mliska@suse.cz>
 189
 190         PR optimization/92860
 191         * params.opt: Mark param_min_crossjump_insns with Optimization
 192         keyword.
 193
 194 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
 195
 196         * ipa-inline-analysis.c (estimate_growth): Fix typo.
 197         * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
 198
 199 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
 200
 201         * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
 202         helper function to return the valid addressing formats for a given
 203         hard register and mode.
 204         (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
 205
 206         * config/rs6000/constraints.md (Q constraint): Update
 207         documentation.
 208         * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
 209         documentation.
 210
 211         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
 212         Use 'Q' for doing vector extract from memory.
 213         (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
 214         memory.
 215         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
 216         doing vector extract from memory.
 217         (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
 218         extract from memory.
 219
 220         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
 221         for the offset being 34-bits when -mcpu=future is used.
 222
 223 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
 224
 225         * config/pa/pa.md: Revert change to use ordered_comparison_operator
 226         instead of cmpib_comparison_operator in cmpib patterns.
 227         * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
 228         of cmpib_comparison_operator.  Revise comment.
 229
 230 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 231
 232         * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
 233         in an IFN_DIV_POW2 node to be equal.
 234
 235 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 236
 237         * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
 238         (vect_check_scalar_mask): ...this.
 239         (vectorizable_store, vectorizable_load): Update call accordingly.
 240         (vectorizable_call): Use vect_check_scalar_mask to check the mask
 241         argument in calls to conditional internal functions.
 242
 243 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 244
 245         * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
 246         '0' matching inputs.
 247         (subv64di3_exec): Likewise.
 248
 249 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
 250
 251         * config/mips/mips.c (vr4130_align_insns): Fix typo.
 252         * doc/md.texi (movstr): Likewise.
 253
 254 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 255
 256         * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
 257         clobber.
 258
 259 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 260
 261         * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
 262         Depend on...
 263         (s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
 264         to a temporary file and use move-if-change to update the real
 265         file where necessary.
 266
 267 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 268
 269         * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
 270         rather than Upa for CPY /M.
 271
 272 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 273
 274         * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
 275         immediate.
 276
 277 2020-01-06  Martin Liska  <mliska@suse.cz>
 278
 279     PR tree-optimization/92860
 280     * params.opt: Mark param_max_combine_insns with Optimization
 281     keyword.
 282
 283 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
 284
 285         PR target/93141
 286         * config/i386/i386.md (SWIDWI): New mode iterator.
 287         (DWI, dwi): Add TImode variants.
 288         (addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 289         <general_hilo_operand> instead of <general_operand>.  Use
 290         CONST_SCALAR_INT_P instead of CONST_INT_P.
 291         (*addv<mode>4_1): Rename to ...
 292         (addv<mode>4_1): ... this.
 293         (QWI): New mode attribute.
 294         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
 295         define_insn_and_split patterns.
 296         (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
 297         patterns.
 298         (uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 299         <general_hilo_operand> instead of <general_operand>.
 300         (*addcarry<mode>_1): New define_insn.
 301         (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
 302
 303 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
 304
 305         * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
 306         Use "call" instead of "set".
 307
 308 2020-01-03  Martin Jambor  <mjambor@suse.cz>
 309
 310         PR ipa/92917
 311         * ipa-cp.c (print_all_lattices): Skip functions without info.
 312
 313 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
 314
 315         PR target/93089
 316         * config/i386/i386-options.c (ix86_simd_clone_adjust): If
 317         TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
 318         simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
 319         for 'e' simd clones.
 320
 321         PR target/93089
 322         * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
 323         entry.
 324         (mprefer-vector-width=): Add Save.
 325         * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
 326         -mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
 327         (ix86_debug_options, ix86_function_specific_print): Adjust
 328         ix86_target_string callers.
 329         (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
 330         (ix86_valid_target_attribute_tree): Likewise.
 331         * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
 332         * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
 333         ix86_target_string caller.
 334
 335         PR target/93110
 336         * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
 337         emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
 338         instead of gen_int_shift_amount + convert_modes.
 339
 340         PR rtl-optimization/93088
 341         * loop-iv.c (find_single_def_src): Punt after looking through
 342         128 reg copies for regs with single definitions.  Move definitions
 343         to first uses.
 344
 345 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
 346
 347         * config/arm/arm-c.c (arm_cpu_builtins): Define
 348         __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
 349         __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
 350         __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
 351         * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
 352         * config/arm/arm-tables.opt: Regenerated.
 353         * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
 354         arm_arch_i8mm and arm_arch_bf16 when enabled.
 355         * config/arm/arm.h (TARGET_I8MM): New macro.
 356         (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
 357         * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
 358         * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
 359         * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
 360         (v8_6_a_simd_variants): New.
 361         (v8_*_a_simd_variants): Add i8mm and bf16.
 362         * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
 363
 364 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
 365
 366         PR ipa/93087
 367         * predict.c (compute_function_frequency): Don't call
 368         warn_function_cold on functions that already have cold attribute.
 369
 370 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
 371
 372         PR target/67834
 373         * config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
 374         COMDAT group function labels in .data.rel.ro.local section.
 375         * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
 376
 377         PR target/93111
 378         * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
 379         comparison_operator in B and S integer comparisons.  Likewise, use
 380         ordered_comparison_operator instead of cmpib_comparison_operator in
 381         cmpib patterns.
 382         * config/pa/predicates.md (cmpib_comparison_operator): Remove.
 383
 384 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 385
 386         Update copyright years.
 387
 388         * gcc.c (process_command): Update copyright notice dates.
 389         * gcov-dump.c (print_version): Ditto.
 390         * gcov.c (print_version): Ditto.
 391         * gcov-tool.c (print_version): Ditto.
 392         * gengtype.c (create_file): Ditto.
 393         * doc/cpp.texi: Bump @copying's copyright year.
 394         * doc/cppinternals.texi: Ditto.
 395         * doc/gcc.texi: Ditto.
 396         * doc/gccint.texi: Ditto.
 397         * doc/gcov.texi: Ditto.
 398         * doc/install.texi: Ditto.
 399         * doc/invoke.texi: Ditto.
 400
 401 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
 402
 403         * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
 404         summary.
 405
 406 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 407
 408         PR tree-optimization/93098
 409         * match.pd (popcount): For shift amounts, use integer_onep
 410         or wi::to_widest () == cst instead of tree_to_uhwi () == cst
 411         tests.  Make sure that precision is power of two larger than or equal
 412         to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
 413         instead of ULL suffixed constants.  Formatting fixes.
 414 \f
 415 Copyright (C) 2020 Free Software Foundation, Inc.
 416
 417 Copying and distribution of this file, with or without modification,
 418 are permitted in any medium without royalty provided the copyright
 419 notice and this notice are preserved.