Add support for large prefixed address in adjusting a vector address.
[gcc.git] / gcc / ChangeLog
1 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
2
3 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
4 for the offset being 34-bits when -mcpu=future is used.
5
6 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
7
8 * config/pa/pa.md: Revert change to use ordered_comparison_operator
9 instead of cmpib_comparison_operator in cmpib patterns.
10 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
11 of cmpib_comparison_operator. Revise comment.
12
13 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
14
15 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
16 in an IFN_DIV_POW2 node to be equal.
17
18 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19
20 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
21 (vect_check_scalar_mask): ...this.
22 (vectorizable_store, vectorizable_load): Update call accordingly.
23 (vectorizable_call): Use vect_check_scalar_mask to check the mask
24 argument in calls to conditional internal functions.
25
26 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
27
28 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
29 '0' matching inputs.
30 (subv64di3_exec): Likewise.
31
32 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
33
34 * config/mips/mips.c (vr4130_align_insns): Fix typo.
35 * doc/md.texi (movstr): Likewise.
36
37 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
38
39 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
40 clobber.
41
42 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
43
44 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
45 Depend on...
46 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
47 to a temporary file and use move-if-change to update the real
48 file where necessary.
49
50 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
51
52 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
53 rather than Upa for CPY /M.
54
55 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
56
57 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
58 immediate.
59
60 2020-01-06 Martin Liska <mliska@suse.cz>
61
62 PR tree-optimization/92860
63 * params.opt: Mark param_max_combine_insns with Optimization
64 keyword.
65
66 2020-01-05 Jakub Jelinek <jakub@redhat.com>
67
68 PR target/93141
69 * config/i386/i386.md (SWIDWI): New mode iterator.
70 (DWI, dwi): Add TImode variants.
71 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
72 <general_hilo_operand> instead of <general_operand>. Use
73 CONST_SCALAR_INT_P instead of CONST_INT_P.
74 (*addv<mode>4_1): Rename to ...
75 (addv<mode>4_1): ... this.
76 (QWI): New mode attribute.
77 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
78 define_insn_and_split patterns.
79 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
80 patterns.
81 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
82 <general_hilo_operand> instead of <general_operand>.
83 (*addcarry<mode>_1): New define_insn.
84 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
85
86 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
87
88 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
89 Use "call" instead of "set".
90
91 2020-01-03 Martin Jambor <mjambor@suse.cz>
92
93 PR ipa/92917
94 * ipa-cp.c (print_all_lattices): Skip functions without info.
95
96 2020-01-03 Jakub Jelinek <jakub@redhat.com>
97
98 PR target/93089
99 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
100 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
101 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
102 for 'e' simd clones.
103
104 PR target/93089
105 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
106 entry.
107 (mprefer-vector-width=): Add Save.
108 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
109 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
110 (ix86_debug_options, ix86_function_specific_print): Adjust
111 ix86_target_string callers.
112 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
113 (ix86_valid_target_attribute_tree): Likewise.
114 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
115 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
116 ix86_target_string caller.
117
118 PR target/93110
119 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
120 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
121 instead of gen_int_shift_amount + convert_modes.
122
123 PR rtl-optimization/93088
124 * loop-iv.c (find_single_def_src): Punt after looking through
125 128 reg copies for regs with single definitions. Move definitions
126 to first uses.
127
128 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
129
130 * config/arm/arm-c.c (arm_cpu_builtins): Define
131 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
132 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
133 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
134 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
135 * config/arm/arm-tables.opt: Regenerated.
136 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
137 arm_arch_i8mm and arm_arch_bf16 when enabled.
138 * config/arm/arm.h (TARGET_I8MM): New macro.
139 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
140 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
141 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
142 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
143 (v8_6_a_simd_variants): New.
144 (v8_*_a_simd_variants): Add i8mm and bf16.
145 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
146
147 2020-01-02 Jakub Jelinek <jakub@redhat.com>
148
149 PR ipa/93087
150 * predict.c (compute_function_frequency): Don't call
151 warn_function_cold on functions that already have cold attribute.
152
153 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
154
155 PR target/67834
156 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
157 COMDAT group function labels in .data.rel.ro.local section.
158 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
159
160 PR target/93111
161 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
162 comparison_operator in B and S integer comparisons. Likewise, use
163 ordered_comparison_operator instead of cmpib_comparison_operator in
164 cmpib patterns.
165 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
166
167 2020-01-01 Jakub Jelinek <jakub@redhat.com>
168
169 Update copyright years.
170
171 * gcc.c (process_command): Update copyright notice dates.
172 * gcov-dump.c (print_version): Ditto.
173 * gcov.c (print_version): Ditto.
174 * gcov-tool.c (print_version): Ditto.
175 * gengtype.c (create_file): Ditto.
176 * doc/cpp.texi: Bump @copying's copyright year.
177 * doc/cppinternals.texi: Ditto.
178 * doc/gcc.texi: Ditto.
179 * doc/gccint.texi: Ditto.
180 * doc/gcov.texi: Ditto.
181 * doc/install.texi: Ditto.
182 * doc/invoke.texi: Ditto.
183
184 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
185
186 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
187 summary.
188
189 2020-01-01 Jakub Jelinek <jakub@redhat.com>
190
191 PR tree-optimization/93098
192 * match.pd (popcount): For shift amounts, use integer_onep
193 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
194 tests. Make sure that precision is power of two larger than or equal
195 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
196 instead of ULL suffixed constants. Formatting fixes.
197 \f
198 Copyright (C) 2020 Free Software Foundation, Inc.
199
200 Copying and distribution of this file, with or without modification,
201 are permitted in any medium without royalty provided the copyright
202 notice and this notice are preserved.