1 2020-09-01 Martin Sebor <msebor@redhat.com>
3 * builtins.c (compute_objsize): Only replace the upper bound
4 of a POINTER_PLUS offset when it's less than the lower bound.
6 2020-09-01 Peter Bergner <bergner@linux.ibm.com>
9 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Do not
10 reuse accumulator memory reference for source and destination accesses.
12 2020-09-01 Martin Liska <mliska@suse.cz>
14 * cfgrtl.c (rtl_create_basic_block): Use default value for
15 growth vector function.
16 * gimple.c (gimple_set_bb): Likewise.
17 * symbol-summary.h: Likewise.
18 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
19 (build_gimple_cfg): Likewise.
20 (create_bb): Likewise.
21 (move_block_to_fn): Likewise.
23 2020-09-01 Martin Liska <mliska@suse.cz>
25 * vec.h (vec_safe_grow): Change default of exact to false.
26 (vec_safe_grow_cleared): Likewise.
28 2020-09-01 Roger Sayle <roger@nextmovesoftware.com>
31 * targhooks.c (default_vector_alignment): Return at least the
32 GET_MODE_ALIGNMENT for the type's mode.
34 2020-09-01 Richard Biener <rguenther@suse.de>
36 PR rtl-optimization/96812
37 * tree-ssa-address.c (copy_ref_info): Also copy dependence info.
38 * cfgrtl.h (duplicate_insn_chain): Adjust prototype.
39 * cfgrtl.c (duplicate_insn_chain): Remap dependence info
41 (cfg_layout_duplicate_bb): Make sure we remap dependence info.
42 * modulo-sched.c (duplicate_insns_of_cycles): Remap dependence
44 (generate_prolog_epilog): Adjust.
45 * config/c6x/c6x.c (hwloop_optimize): Remap dependence info.
47 2020-09-01 Kewen Lin <linkw@gcc.gnu.org>
49 * doc/sourcebuild.texi (has_arch_pwr5, has_arch_pwr6, has_arch_pwr7,
50 has_arch_pwr8, has_arch_pwr9): Document.
52 2020-08-31 Carl Love <cel@us.ibm.com>
55 * config/rs6000/altivec.h (vec_popcntb, vec_popcnth, vec_popcntw,
56 vec_popcntd): Remove defines.
58 2020-08-31 Marek Polacek <polacek@redhat.com>
59 Jason Merrill <jason@redhat.com>
62 * tree.c (build_constructor_from_vec): New.
63 * tree.h (build_constructor_from_vec): Declare.
65 2020-08-31 Aldy Hernandez <aldyh@redhat.com>
67 PR tree-optimization/96818
68 * tree-vrp.c (find_case_label_range): Cast label range to
69 type of switch operand.
71 2020-08-31 liuhongt <hongtao.liu@intel.com>
74 * config/i386/sse.md (vec_unpacku_float_hi_v16si): For vector
75 compare to integer mask, don't use gen_rtx_LT, use
76 ix86_expand_mask_vec_cmp instead.
77 (vec_unpacku_float_hi_v16si): Ditto.
79 2020-08-31 Jakub Jelinek <jakub@redhat.com>
81 * tree-cfg.c (verify_gimple_switch): If the first non-default case
82 label has CASE_HIGH, verify it has the same type as CASE_LOW.
84 2020-08-31 Feng Xue <fxue@os.amperecomputing.com>
87 * ipa-cp.c (decide_about_value): Use safe_add to avoid cost addition
90 2020-08-31 Jakub Jelinek <jakub@redhat.com>
93 * varasm.c: Include alloc-pool.h.
94 (output_constant_pool_contents): Emit desc->mark < 0 entries as
96 (struct constant_descriptor_rtx_data): New type.
97 (constant_descriptor_rtx_data_cmp): New function.
98 (struct const_rtx_data_hasher): New type.
99 (const_rtx_data_hasher::hash, const_rtx_data_hasher::equal): New
101 (optimize_constant_pool): New function.
102 (output_shared_constant_pool): Call it if TARGET_SUPPORTS_ALIASES.
104 2020-08-31 Kewen Lin <linkw@gcc.gnu.org>
106 * doc/sourcebuild.texi (vect_len_load_store,
107 vect_partial_vectors_usage_1, vect_partial_vectors_usage_2,
108 vect_partial_vectors): Document.
110 2020-08-30 Martin Sebor <msebor@redhat.com>
112 * builtins.c (access_ref::access_ref): Call get_size_range instead
115 2020-08-30 Jakub Jelinek <jakub@redhat.com>
117 * config/i386/sse.md (ssse3_pshufbv8qi): Use gen_int_mode instead of
118 GEN_INT, and ix86_build_const_vector instead of gen_rtvec and
121 2020-08-29 Bill Schmidt <wschmidt@linux.ibm.com>
123 * config/rs6000/rs6000-builtin.def (MASK_FOR_STORE): Remove.
124 * config/rs6000/rs6000-call.c (rs6000_expand_builtin): Remove
125 all logic for ALTIVEC_BUILTIN_MASK_FOR_STORE.
127 2020-08-28 Martin Sebor <msebor@redhat.com>
129 * attribs.c (init_attr_rdwr_indices): Use global access_mode.
130 * attribs.h (struct attr_access): Same.
131 * builtins.c (fold_builtin_strlen): Add argument.
132 (compute_objsize): Declare.
133 (get_range): Declare.
134 (check_read_access): New function.
135 (access_ref::access_ref): Define ctor.
136 (warn_string_no_nul): Add arguments. Handle -Wstrintop-overread.
137 (check_nul_terminated_array): Handle source strings of different
139 (expand_builtin_strlen): Remove warning code, call check_read_access
140 instead. Declare locals closer to their initialization.
141 (expand_builtin_strnlen): Same.
142 (maybe_warn_for_bound): New function.
143 (warn_for_access): Remove argument. Handle -Wstrintop-overread.
144 (inform_access): Change argument type.
145 (get_size_range): New function.
146 (check_access): Remove unused arguments. Add new arguments. Handle
147 -Wstrintop-overread. Move warning code to helpers and call them.
148 Call check_nul_terminated_array.
149 (check_memop_access): Remove unnecessary and provide additional
151 (expand_builtin_memchr): Call check_read_access.
152 (expand_builtin_strcat): Remove unnecessary and provide additional
154 (expand_builtin_strcpy): Same.
155 (expand_builtin_strcpy_args): Same. Avoid testing no-warning bit.
156 (expand_builtin_stpcpy_1): Remove unnecessary and provide additional
158 (expand_builtin_stpncpy): Same.
159 (check_strncat_sizes): Same.
160 (expand_builtin_strncat): Remove unnecessary and provide additional
161 arguments in calls. Adjust comments.
162 (expand_builtin_strncpy): Remove unnecessary and provide additional
164 (expand_builtin_memcmp): Remove warning code. Call check_access.
165 (expand_builtin_strcmp): Call check_access instead of
166 check_nul_terminated_array.
167 (expand_builtin_strncmp): Handle -Wstrintop-overread.
168 (expand_builtin_fork_or_exec): Call check_access instead of
169 check_nul_terminated_array.
170 (expand_builtin): Same.
171 (fold_builtin_1): Pass additional argument.
172 (fold_builtin_n): Same.
173 (fold_builtin_strpbrk): Remove calls to check_nul_terminated_array.
174 (expand_builtin_memory_chk): Add comments.
175 (maybe_emit_chk_warning): Remove unnecessary and provide additional
177 (maybe_emit_sprintf_chk_warning): Same. Adjust comments.
178 * builtins.h (warn_string_no_nul): Add arguments.
179 (struct access_ref): Add member and ctor argument.
180 (struct access_data): Add members and ctor.
181 (check_access): Adjust signature.
182 * calls.c (maybe_warn_nonstring_arg): Return an indication of
183 whether a warning was issued. Issue -Wstrintop-overread instead
184 of -Wstringop-overflow.
185 (append_attrname): Adjust to naming changes.
186 (maybe_warn_rdwr_sizes): Same. Remove unnecessary and provide
187 additional arguments in calls.
188 * calls.h (maybe_warn_nonstring_arg): Return bool.
189 * doc/invoke.texi (-Wstringop-overread): Document new option.
190 * gimple-fold.c (gimple_fold_builtin_strcpy): Provide an additional
192 (gimple_fold_builtin_stpcpy): Same.
193 * tree-ssa-uninit.c (maybe_warn_pass_by_reference): Adjust to naming
195 * tree.h (enum access_mode): New type.
197 2020-08-28 Bill Schmidt <wschmidt@linux.ibm.com>
199 * config/rs6000/rs6000.c (rs6000_call_aix): Remove test for r12.
200 (rs6000_sibcall_aix): Likewise.
202 2020-08-28 Andrew Stubbs <ams@codesourcery.com>
204 * config/gcn/gcn-tree.c (gcn_goacc_get_worker_red_decl): Add "true"
205 parameter to vec_safe_grow_cleared.
207 2020-08-28 Martin Sebor <msebor@redhat.com>
209 * ggc-common.c (gt_pch_save): Add argument to a call.
211 2020-08-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
214 * config/aarch64/aarch64-sve.md
215 (cond_sub<mode>_relaxed_const): Updated and renamed from
216 cond_sub<mode>_any_const pattern.
217 (cond_sub<mode>_strict_const): New pattern.
219 2020-08-28 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
221 * doc/rtl.texi: Fix typo.
223 2020-08-28 Uros Bizjak <ubizjak@gmail.com>
226 * config/i386/i386-expand.c (split_double_mode): Also handle
227 E_P2HImode and E_P2QImode.
228 * config/i386/sse.md (MASK_DWI): New define_mode_iterator.
229 (mov<mode>): New expander for P2HI,P2QI.
230 (*mov<mode>_internal): New define_insn_and_split to split
231 movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.
233 2020-08-28 liuhongt <hongtao.liu@intel.com>
235 * common/config/i386/i386-common.c (ix86_handle_option): Set
236 AVX512DQ when AVX512VP2INTERSECT exists.
238 2020-08-27 Jakub Jelinek <jakub@redhat.com>
241 * config/i386/i386.c (iamcu_alignment): Don't decrease alignment
242 for TYPE_ATOMIC types.
243 (ix86_local_alignment): Likewise.
244 (ix86_minimum_alignment): Likewise.
245 (x86_field_alignment): Likewise, and emit a -Wpsabi diagnostic
248 2020-08-27 Bill Schmidt <wschmidt@linux.ibm.com>
251 * config/rs6000/rs6000.c (rs6000_sibcall_aix): Support
252 indirect call for ELFv2.
254 2020-08-27 Richard Biener <rguenther@suse.de>
256 PR tree-optimization/96522
257 * tree-ssa-address.c (copy_ref_info): Reset flow-sensitive
258 info of the copied points-to. Transfer bigger alignment
260 * tree-ssa-sccvn.c (eliminate_dom_walker::eliminate_stmt):
261 Reset all flow-sensitive info.
263 2020-08-27 Martin Liska <mliska@suse.cz>
265 * alias.c (init_alias_analysis): Set exact argument of a vector
266 growth function to true.
267 * calls.c (internal_arg_pointer_based_exp_scan): Likewise.
268 * cfgbuild.c (find_many_sub_basic_blocks): Likewise.
269 * cfgexpand.c (expand_asm_stmt): Likewise.
270 * cfgrtl.c (rtl_create_basic_block): Likewise.
271 * combine.c (combine_split_insns): Likewise.
272 (combine_instructions): Likewise.
273 * config/aarch64/aarch64-sve-builtins.cc (function_expander::add_output_operand): Likewise.
274 (function_expander::add_input_operand): Likewise.
275 (function_expander::add_integer_operand): Likewise.
276 (function_expander::add_address_operand): Likewise.
277 (function_expander::add_fixed_operand): Likewise.
278 * df-core.c (df_worklist_dataflow_doublequeue): Likewise.
279 * dwarf2cfi.c (update_row_reg_save): Likewise.
280 * early-remat.c (early_remat::init_block_info): Likewise.
281 (early_remat::finalize_candidate_indices): Likewise.
282 * except.c (sjlj_build_landing_pads): Likewise.
283 * final.c (compute_alignments): Likewise.
284 (grow_label_align): Likewise.
285 * function.c (temp_slots_at_level): Likewise.
286 * fwprop.c (build_single_def_use_links): Likewise.
287 (update_uses): Likewise.
288 * gcc.c (insert_wrapper): Likewise.
289 * genautomata.c (create_state_ainsn_table): Likewise.
290 (add_vect): Likewise.
291 (output_dead_lock_vect): Likewise.
292 * genmatch.c (capture_info::capture_info): Likewise.
293 (parser::finish_match_operand): Likewise.
294 * genrecog.c (optimize_subroutine_group): Likewise.
295 (merge_pattern_info::merge_pattern_info): Likewise.
296 (merge_into_decision): Likewise.
297 (print_subroutine_start): Likewise.
299 * gimple-loop-versioning.cc (loop_versioning::loop_versioning): Likewise.
300 * gimple.c (gimple_set_bb): Likewise.
301 * graphite-isl-ast-to-gimple.c (translate_isl_ast_node_user): Likewise.
302 * haifa-sched.c (sched_extend_luids): Likewise.
303 (extend_h_i_d): Likewise.
304 * insn-addr.h (insn_addresses_new): Likewise.
305 * ipa-cp.c (gather_context_independent_values): Likewise.
306 (find_more_contexts_for_caller_subset): Likewise.
307 * ipa-devirt.c (final_warning_record::grow_type_warnings): Likewise.
308 (ipa_odr_read_section): Likewise.
309 * ipa-fnsummary.c (evaluate_properties_for_edge): Likewise.
310 (ipa_fn_summary_t::duplicate): Likewise.
311 (analyze_function_body): Likewise.
312 (ipa_merge_fn_summary_after_inlining): Likewise.
313 (read_ipa_call_summary): Likewise.
314 * ipa-icf.c (sem_function::bb_dict_test): Likewise.
315 * ipa-prop.c (ipa_alloc_node_params): Likewise.
316 (parm_bb_aa_status_for_bb): Likewise.
317 (ipa_compute_jump_functions_for_edge): Likewise.
318 (ipa_analyze_node): Likewise.
319 (update_jump_functions_after_inlining): Likewise.
320 (ipa_read_edge_info): Likewise.
321 (read_ipcp_transformation_info): Likewise.
322 (ipcp_transform_function): Likewise.
323 * ipa-reference.c (ipa_reference_write_optimization_summary): Likewise.
324 * ipa-split.c (execute_split_functions): Likewise.
325 * ira.c (find_moveable_pseudos): Likewise.
326 * lower-subreg.c (decompose_multiword_subregs): Likewise.
327 * lto-streamer-in.c (input_eh_regions): Likewise.
328 (input_cfg): Likewise.
329 (input_struct_function_base): Likewise.
330 (input_function): Likewise.
331 * modulo-sched.c (set_node_sched_params): Likewise.
332 (extend_node_sched_params): Likewise.
333 (schedule_reg_moves): Likewise.
334 * omp-general.c (omp_construct_simd_compare): Likewise.
335 * passes.c (pass_manager::create_pass_tab): Likewise.
336 (enable_disable_pass): Likewise.
337 * predict.c (determine_unlikely_bbs): Likewise.
338 * profile.c (compute_branch_probabilities): Likewise.
339 * read-rtl-function.c (function_reader::parse_block): Likewise.
340 * read-rtl.c (rtx_reader::read_rtx_code): Likewise.
341 * reg-stack.c (stack_regs_mentioned): Likewise.
342 * regrename.c (regrename_init): Likewise.
343 * rtlanal.c (T>::add_single_to_queue): Likewise.
344 * sched-deps.c (init_deps_data_vector): Likewise.
345 * sel-sched-ir.c (sel_extend_global_bb_info): Likewise.
346 (extend_region_bb_info): Likewise.
347 (extend_insn_data): Likewise.
348 * symtab.c (symtab_node::create_reference): Likewise.
349 * tracer.c (tail_duplicate): Likewise.
350 * trans-mem.c (tm_region_init): Likewise.
351 (get_bb_regions_instrumented): Likewise.
352 * tree-cfg.c (init_empty_tree_cfg_for_function): Likewise.
353 (build_gimple_cfg): Likewise.
354 (create_bb): Likewise.
355 (move_block_to_fn): Likewise.
356 * tree-complex.c (tree_lower_complex): Likewise.
357 * tree-if-conv.c (predicate_rhs_code): Likewise.
358 * tree-inline.c (copy_bb): Likewise.
359 * tree-into-ssa.c (get_ssa_name_ann): Likewise.
360 (mark_phi_for_rewrite): Likewise.
361 * tree-object-size.c (compute_builtin_object_size): Likewise.
362 (init_object_sizes): Likewise.
363 * tree-predcom.c (initialize_root_vars_store_elim_1): Likewise.
364 (initialize_root_vars_store_elim_2): Likewise.
365 (prepare_initializers_chain_store_elim): Likewise.
366 * tree-ssa-address.c (addr_for_mem_ref): Likewise.
367 (multiplier_allowed_in_address_p): Likewise.
368 * tree-ssa-coalesce.c (ssa_conflicts_new): Likewise.
369 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
370 * tree-ssa-loop-ivopts.c (addr_offset_valid_p): Likewise.
371 (get_address_cost_ainc): Likewise.
372 * tree-ssa-loop-niter.c (discover_iteration_bound_by_body_walk): Likewise.
373 * tree-ssa-pre.c (add_to_value): Likewise.
374 (phi_translate_1): Likewise.
375 (do_pre_regular_insertion): Likewise.
376 (do_pre_partial_partial_insertion): Likewise.
377 (init_pre): Likewise.
378 * tree-ssa-propagate.c (ssa_prop_init): Likewise.
379 (update_call_from_tree): Likewise.
380 * tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Likewise.
381 * tree-ssa-sccvn.c (vn_reference_lookup_3): Likewise.
382 (vn_reference_lookup_pieces): Likewise.
383 (eliminate_dom_walker::eliminate_push_avail): Likewise.
384 * tree-ssa-strlen.c (set_strinfo): Likewise.
385 (get_stridx_plus_constant): Likewise.
386 (zero_length_string): Likewise.
387 (find_equal_ptrs): Likewise.
388 (printf_strlen_execute): Likewise.
389 * tree-ssa-threadedge.c (set_ssa_name_value): Likewise.
390 * tree-ssanames.c (make_ssa_name_fn): Likewise.
391 * tree-streamer-in.c (streamer_read_tree_bitfields): Likewise.
392 * tree-vect-loop.c (vect_record_loop_mask): Likewise.
393 (vect_get_loop_mask): Likewise.
394 (vect_record_loop_len): Likewise.
395 (vect_get_loop_len): Likewise.
396 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
397 * tree-vect-slp.c (vect_slp_convert_to_external): Likewise.
398 (vect_bb_slp_scalar_cost): Likewise.
399 (vect_bb_vectorization_profitable_p): Likewise.
400 (vectorizable_slp_permutation): Likewise.
401 * tree-vect-stmts.c (vectorizable_call): Likewise.
402 (vectorizable_simd_clone_call): Likewise.
403 (scan_store_can_perm_p): Likewise.
404 (vectorizable_store): Likewise.
406 * vec.c (test_safe_grow_cleared): Likewise.
407 * vec.h (vec_safe_grow): Likewise.
408 (vec_safe_grow_cleared): Likewise.
409 (vl_ptr>::safe_grow): Likewise.
410 (vl_ptr>::safe_grow_cleared): Likewise.
411 * config/c6x/c6x.c (insn_set_clock): Likewise.
413 2020-08-27 Richard Biener <rguenther@suse.de>
415 * tree-pretty-print.c (dump_mem_ref): Handle TARGET_MEM_REFs.
416 (dump_generic_node): Use dump_mem_ref also for TARGET_MEM_REF.
418 2020-08-27 Alex Coplan <alex.coplan@arm.com>
420 * lra-constraints.c (canonicalize_reload_addr): New.
421 (curr_insn_transform): Use canonicalize_reload_addr to ensure we
422 generate canonical RTL for an address reload.
424 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
426 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
427 for rounding intrinsics.
429 2020-08-27 Zhiheng Xie <xiezhiheng@huawei.com>
431 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
432 for min/max intrinsics.
434 2020-08-27 Richard Biener <rguenther@suse.de>
436 PR tree-optimization/96579
437 * tree-ssa-reassoc.c (linearize_expr_tree): If we expand
438 rhs via special ops make sure to swap operands.
440 2020-08-27 Richard Biener <rguenther@suse.de>
442 PR tree-optimization/96565
443 * tree-ssa-dse.c (dse_classify_store): Remove defs with
444 no uses from further processing.
446 2020-08-26 Göran Uddeborg <goeran@uddeborg.se>
448 PR gcov-profile/96285
449 * common.opt, doc/invoke.texi: Clarify wording of
450 -fprofile-exclude-files and adjust -fprofile-filter-files to
453 2020-08-26 H.J. Lu <hjl.tools@gmail.com>
456 * config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
457 Reject target("no-general-regs-only").
459 2020-08-26 Jozef Lawrynowicz <jozef.l@mittosystems.com>
461 * config/msp430/constraints.md (K): Change unused constraint to
462 constraint to a const_int between 1 and 19.
464 * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove.
465 (msp430_expand_shift): New.
466 (msp430_output_asm_shift_insns): New.
467 * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs.
469 (msp430_expand_helper): Remove hard-coded generation of some inline
471 (use_helper_for_const_shift): New.
472 (msp430_expand_shift): New.
473 (msp430_output_asm_shift_insns): New.
474 (msp430_print_operand): Add new 'W' operand selector.
475 (msp430x_logical_shift_right): Remove.
476 * config/msp430/msp430.md (HPSI): New define_mode_iterator.
478 (any_shift): New define_code_iterator.
479 (shift_insn): New define_code_attr.
480 Adjust unnamed insn patterns searched for by combine.
483 (430x_shift_left): Remove.
490 (430x_arithmetic_shift_right): Remove.
499 (430x_logical_shift_right): Remove.
505 (<shift_insn><mode>3): New define_expand.
506 (<shift_insn>hi3_430): New define_insn.
507 (<shift_insn>si3_const): Likewise.
508 (ashl<mode>3_430x): Likewise.
509 (ashr<mode>3_430x): Likewise.
510 (lshr<mode>3_430x): Likewise.
511 (*bitbranch<mode>4_z): Replace renamed predicate msp430_bitpos with
512 const_0_to_15_operand.
513 * config/msp430/msp430.opt: New option -mmax-inline-shift=.
514 * config/msp430/predicates.md (const_1_to_8_operand): New predicate.
515 (const_0_to_15_operand): Rename msp430_bitpos predicate.
516 (const_1_to_19_operand): New predicate.
517 * doc/invoke.texi: Document -mmax-inline-shift=.
519 2020-08-26 Aldy Hernandez <aldyh@redhat.com>
521 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Abstract code out to...
522 * tree-vrp.c (find_case_label_range): ...here. Rewrite for to use irange
524 (simplify_stmt_for_jump_threading): Call find_case_label_range instead of
525 duplicating the code in simplify_stmt_for_jump_threading.
526 * tree-vrp.h (find_case_label_range): New prototype.
528 2020-08-26 Richard Biener <rguenther@suse.de>
530 PR tree-optimization/96698
531 * tree-vectorizer.h (loop_vec_info::reduc_latch_defs): New.
532 (loop_vec_info::reduc_latch_slp_defs): Likewise.
533 * tree-vect-stmts.c (vect_transform_stmt): Only record
534 stmts to update PHI latches from, perform the update ...
535 * tree-vect-loop.c (vect_transform_loop): ... here after
536 vectorizing those PHIs.
537 (info_for_reduction): Properly handle non-reduction PHIs.
539 2020-08-26 Martin Liska <mliska@suse.cz>
541 * cgraphunit.c (process_symver_attribute): Match only symver
544 2020-08-26 Richard Biener <rguenther@suse.de>
546 PR tree-optimization/96783
547 * tree-vect-stmts.c (get_group_load_store_type): Use
548 VMAT_ELEMENTWISE for negative strides when we cannot
549 use VMAT_STRIDED_SLP.
551 2020-08-26 Martin Liska <mliska@suse.cz>
553 * doc/invoke.texi: Document how are pie and pic options merged.
555 2020-08-26 Zhiheng Xie <xiezhiheng@huawei.com>
557 * config/aarch64/aarch64-simd-builtins.def: Add proper FLAG
558 for add/sub arithmetic intrinsics.
560 2020-08-26 Jakub Jelinek <jakub@redhat.com>
563 * dwarf2out.c (dwarf2out_next_real_insn): Adjust function comment.
564 (dwarf2out_var_location): Look for next_note only if next_real is
565 non-NULL, in that case look for the first non-deleted
566 NOTE_INSN_VAR_LOCATION between loc_note and next_real, if any.
568 2020-08-26 Iain Buclaw <ibuclaw@gdcproject.org>
570 * config/tilepro/gen-mul-tables.cc (main): Define IN_TARGET_CODE to 1
573 2020-08-26 Martin Liska <mliska@suse.cz>
575 * cgraphunit.c (process_symver_attribute): Allow multiple
576 symver attributes for one symbol.
577 * doc/extend.texi: Document the change.
579 2020-08-25 H.J. Lu <hjl.tools@gmail.com>
582 * config/i386/i386.h (CTZ_DEFINED_VALUE_AT_ZERO): Return 0/2.
583 (CLZ_DEFINED_VALUE_AT_ZERO): Likewise.
585 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
588 * config/pa/pa.c (hppa_rtx_costs_shadd_p): New helper function
589 to check for coefficients supported by shNadd and shladd,l.
590 (hppa_rtx_costs): Rewrite to avoid using estimates based upon
591 FACTOR and enable recursing deeper into RTL expressions.
593 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
595 * config/pa/pa.md (ashldi3): Additionally, on !TARGET_64BIT
596 generate a two instruction shd/zdep sequence when shifting
597 registers by suitable constants.
598 (shd_internal): New define_expand to provide gen_shd_internal.
600 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
602 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Rename
603 __ARM_FEATURE_SVE_VECTOR_OPERATIONS to
604 __ARM_FEATURE_SVE_VECTOR_OPERATORS.
606 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
608 * config/aarch64/aarch64-sve-builtins.cc (add_sve_type_attribute):
609 Take the ACLE name of the type as a parameter and add it as fourth
610 argument to the "SVE type" attribute.
611 (register_builtin_types): Update call accordingly.
612 (register_tuple_type): Likewise. Construct the name of the type
613 earlier in order to do this.
614 (get_arm_sve_vector_bits_attributes): New function.
615 (handle_arm_sve_vector_bits_attribute): Report a more sensible
616 error message if the attribute is applied to an SVE tuple type.
617 Don't allow the attribute to be applied to an existing fixed-length
618 SVE type. Mangle the new type as __SVE_VLS<type, vector-bits>.
619 Add a dummy TYPE_DECL to the new type.
621 2020-08-25 Richard Sandiford <richard.sandiford@arm.com>
623 * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a
624 leading "u" to each mangled name.
626 2020-08-25 Richard Biener <rguenther@suse.de>
628 PR tree-optimization/96548
629 PR tree-optimization/96760
630 * tree-ssa-loop-im.c (tree_ssa_lim): Recompute RPO after
633 2020-08-25 Jakub Jelinek <jakub@redhat.com>
635 PR tree-optimization/96722
636 * gimple.c (infer_nonnull_range): Formatting fix.
637 (infer_nonnull_range_by_dereference): Return false for clobber stmts.
639 2020-08-25 Jakub Jelinek <jakub@redhat.com>
641 PR tree-optimization/96758
642 * tree-ssa-strlen.c (handle_builtin_string_cmp): If both cstlen1
643 and cstlen2 are set, set cmpsiz to their minimum, otherwise use the
644 one that is set. If bound is used and smaller than cmpsiz, set cmpsiz
645 to bound. If both cstlen1 and cstlen2 are set, perform the optimization.
647 2020-08-25 Martin Jambor <mjambor@suse.cz>
649 PR tree-optimization/96730
650 * tree-sra.c (create_access): Disqualify any aggregate with negative
652 (build_ref_for_model): Add assert that offset is non-negative.
654 2020-08-25 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
656 * rtl.def: Fix typo in comment.
658 2020-08-25 Roger Sayle <roger@nextmovesoftware.com>
660 PR tree-optimization/21137
661 * fold-const.c (fold_binary_loc) [NE_EXPR/EQ_EXPR]: Call
662 STRIP_NOPS when checking whether to simplify ((x>>C1)&C2) != 0.
664 2020-08-25 Andrew Pinski <apinski@marvell.com>
667 * config/mips/mips.md (builtin_longjmp): Restore the frame
668 pointer and stack pointer and gp.
670 2020-08-25 Richard Biener <rguenther@suse.de>
673 * dwarf2out.c (reference_to_unused): Make FUNCTION_DECL
674 processing more consistent with respect to
675 symtab->global_info_ready.
676 (tree_add_const_value_attribute): Unconditionally call
677 rtl_for_decl_init to do all mangling early but throw
678 away the result if early_dwarf.
680 2020-08-25 Hongtao Liu <hongtao.liu@intel.com>
683 * config/i386/sse.md: Correct the mode of NOT operands to
686 2020-08-25 Jakub Jelinek <jakub@redhat.com>
688 PR tree-optimization/96715
689 * match.pd (copysign(x,-x) -> -x): New simplification.
691 2020-08-25 Jakub Jelinek <jakub@redhat.com>
694 * fold-const.c (native_interpret_real): For MODE_COMPOSITE_P modes
695 punt if the to be returned REAL_CST does not encode to the bitwise
698 2020-08-24 Gerald Pfeifer <gerald@pfeifer.com>
700 * doc/install.texi (Configuration): Switch valgrind.com to https.
702 2020-08-24 Christophe Lyon <christophe.lyon@linaro.org>
706 * config/arm/thumb1.md: Disable set-constant splitter when
708 (thumb1_movsi_insn): Fix -mpure-code
711 2020-08-24 Martin Liska <mliska@suse.cz>
713 * tree-vect-data-refs.c (dr_group_sort_cmp): Work on
715 (vect_analyze_data_ref_accesses): Work on groups.
716 (vect_find_stmt_data_reference): Add group_id argument and fill
717 up dataref_groups vector.
718 * tree-vect-loop.c (vect_get_datarefs_in_loop): Pass new
720 (vect_analyze_loop_2): Likewise.
721 * tree-vect-slp.c (vect_slp_analyze_bb_1): Pass argument.
722 (vect_slp_bb_region): Likewise.
723 (vect_slp_region): Likewise.
724 (vect_slp_bb):Work on the entire BB.
725 * tree-vectorizer.h (vect_analyze_data_ref_accesses): Add new
727 (vect_find_stmt_data_reference): Likewise.
729 2020-08-24 Martin Liska <mliska@suse.cz>
731 PR tree-optimization/96597
732 * tree-ssa-sccvn.c (vn_reference_lookup_call): Add missing
733 initialization of ::punned.
734 (vn_reference_insert): Use consistently false instead of 0.
735 (vn_reference_insert_pieces): Likewise.
737 2020-08-24 Hans-Peter Nilsson <hp@axis.com>
740 * reorg.c (fill_slots_from_thread): Allow trial insns that clobber
741 TARGET_FLAGS_REGNUM as delay-slot fillers.
743 2020-08-23 H.J. Lu <hjl.tools@gmail.com>
746 * config/i386/i386-options.c (IX86_ATTR_IX86_YES): New.
747 (IX86_ATTR_IX86_NO): Likewise.
748 (ix86_opt_type): Add ix86_opt_ix86_yes and ix86_opt_ix86_no.
749 (ix86_valid_target_attribute_inner_p): Handle general-regs-only,
750 ix86_opt_ix86_yes and ix86_opt_ix86_no.
751 (ix86_option_override_internal): Check opts->x_ix86_target_flags
752 instead of opts->x_ix86_target_flags.
753 * doc/extend.texi: Document target("general-regs-only") function
756 2020-08-21 Richard Sandiford <richard.sandiford@arm.com>
758 * doc/extend.texi: Update links to Arm docs.
759 * doc/invoke.texi: Likewise.
761 2020-08-21 Hongtao Liu <hongtao.liu@intel.com>
764 * config/i386/i386-expand.c
765 (ix86_expand_vec_shift_qihi_constant): Refine.
767 2020-08-21 Alex Coplan <alex.coplan@arm.com>
770 * gcc.c (set_static_spec): New.
771 (set_static_spec_owned): New.
772 (set_static_spec_shared): New.
773 (driver::maybe_putenv_COLLECT_LTO_WRAPPER): Use
774 set_static_spec_owned() to take ownership of lto_wrapper_file
775 such that it gets freed in driver::finalize.
776 (driver::maybe_run_linker): Use set_static_spec_shared() to
777 ensure that we don't try and free() the static string "ld",
778 also ensuring that any previously-allocated string in
779 linker_name_spec is freed. Likewise with argv0.
780 (driver::finalize): Use set_static_spec_shared() when resetting
781 specs that previously had allocated strings; remove if(0)
782 around call to free().
784 2020-08-21 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
786 * emit-rtl.c (try_split): Call copy_frame_info_to_split_insn
787 to split certain RTX_FRAME_RELATED_P insns.
788 * recog.c (copy_frame_info_to_split_insn): New function.
789 (peep2_attempt): Split copying of frame related info of
790 RTX_FRAME_RELATED_P insns into above function and call it.
791 * recog.h (copy_frame_info_to_split_insn): Declare it.
793 2020-08-21 liuhongt <hongtao.liu@intel.com>
796 * config/i386/i386.c (ix86_preferred_reload_class): Allow
797 QImode data go into mask registers.
798 * config/i386/i386.md: (*movhi_internal): Adjust constraints
800 (*movqi_internal): Ditto.
801 (*anddi_1): Support mask register operations
802 (*and<mode>_1): Ditto.
804 (*andn<mode>_1): Ditto.
805 (*<code><mode>_1): Ditto.
806 (*<code>qi_1): Ditto.
807 (*one_cmpl<mode>2_1): Ditto.
808 (*one_cmplsi2_1_zext): Ditto.
809 (*one_cmplqi2_1): Ditto.
810 (define_peephole2): Move constant 0/-1 directly into mask
812 * config/i386/predicates.md (mask_reg_operand): New predicate.
813 * config/i386/sse.md (define_split): Add post-reload splitters
814 that would convert "generic" patterns to mask patterns.
815 (*knotsi_1_zext): New define_insn.
817 2020-08-21 liuhongt <hongtao.liu@intel.com>
819 * config/i386/x86-tune-costs.h (skylake_cost): Adjust cost
822 2020-08-21 liuhongt <hongtao.liu@intel.com>
824 * config/i386/i386.c (inline_secondary_memory_needed):
825 No memory is needed between mask regs and gpr.
826 (ix86_hard_regno_mode_ok): Add condition TARGET_AVX512F for
828 * config/i386/i386.h (enum reg_class): Add INT_MASK_REGS.
829 (REG_CLASS_NAMES): Ditto.
830 (REG_CLASS_CONTENTS): Ditto.
831 * config/i386/i386.md: Exclude mask register in
832 define_peephole2 which is avaiable only for gpr.
834 2020-08-21 H.J. Lu <hjl.tools@gmail.com>
837 * config/i386/i386.h (struct processor_costs): Add member
838 mask_to_integer, integer_to_mask, mask_load[3], mask_store[3],
840 * config/i386/x86-tune-costs.h (ix86_size_cost, i386_cost,
841 i386_cost, pentium_cost, lakemont_cost, pentiumpro_cost,
842 geode_cost, k6_cost, athlon_cost, k8_cost, amdfam10_cost,
843 bdver_cost, znver1_cost, znver2_cost, skylake_cost,
844 btver1_cost, btver2_cost, pentium4_cost, nocona_cost,
845 atom_cost, slm_cost, intel_cost, generic_cost, core_cost):
846 Initialize mask_load[3], mask_store[3], mask_move,
847 integer_to_mask, mask_to_integer for all target costs.
848 * config/i386/i386.c (ix86_register_move_cost): Using cost
849 model of mask registers.
850 (inline_memory_move_cost): Ditto.
851 (ix86_register_move_cost): Ditto.
853 2020-08-20 Iain Buclaw <ibuclaw@gdcproject.org>
855 * config/vxworks.h (VXWORKS_ADDITIONAL_CPP_SPEC): Don't include
856 VxWorks header files if -fself-test is used.
857 (STARTFILE_PREFIX_SPEC): Avoid using VSB_DIR if -fself-test is used.
859 2020-08-20 Joe Ramsay <Joe.Ramsay@arm.com>
862 * config/arm/mve.md (mve_vst1q_f<mode>): Require MVE memory operand for
864 (mve_vst1q_<supf><mode>): Likewise.
866 2020-08-19 2020-08-19 Carl Love <cel@us.ibm.com>
868 * config/rs6000/rs6000-builtin.def (BU_P10V_0, BU_P10V_1,
869 BU_P10V_2, BU_P10V_3): Rename BU_P10V_VSX_0, BU_P10V_VSX_1,
870 BU_P10V_VSX_2, BU_P10V_VSX_3 respectively.
872 (BU_P10V_AV_0, BU_P10V_AV_1, BU_P10V_AV_2, BU_P10V_AV_3, BU_P10V_AV_4):
873 New definitions for Power 10 Altivec macros.
874 (VSTRIBR, VSTRIHR, VSTRIBL, VSTRIHL, VSTRIBR_P, VSTRIHR_P,
875 VSTRIBL_P, VSTRIHL_P, MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM,
876 VEXPANDMB, VEXPANDMH, VEXPANDMW, VEXPANDMD, VEXPANDMQ, VEXTRACTMB,
877 VEXTRACTMH, VEXTRACTMW, VEXTRACTMD, VEXTRACTMQ): Replace macro
878 expansion BU_P10V_1 with BU_P10V_AV_1.
879 (VCLRLB, VCLRRB, VCFUGED, VCLZDM, VCTZDM, VPDEPD, VPEXTD, VGNB,
880 VCNTMBB, VCNTMBH, VCNTMBW, VCNTMBD): Replace macro expansion
881 BU_P10V_2 with BU_P10V_AV_2.
882 (VEXTRACTBL, VEXTRACTHL, VEXTRACTWL, VEXTRACTDL, VEXTRACTBR, VEXTRACTHR,
883 VEXTRACTWR, VEXTRACTDR, VINSERTGPRBL, VINSERTGPRHL, VINSERTGPRWL,
884 VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL, VINSERTGPRBR,
885 VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR, VINSERTVPRHR,
886 VINSERTVPRWR, VREPLACE_ELT_V4SI, VREPLACE_ELT_UV4SI, VREPLACE_ELT_V2DF,
887 VREPLACE_ELT_V4SF, VREPLACE_ELT_V2DI, VREPLACE_ELT_UV2DI, VREPLACE_UN_V4SI,
888 VREPLACE_UN_UV4SI, VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
889 VREPLACE_UN_V2DF, VSLDB_V16QI, VSLDB_V8HI, VSLDB_V4SI, VSLDB_V2DI,
890 VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI, VSRDB_V2DI): Replace macro expansion
891 BU_P10V_3 with BU_P10V_AV_3.
892 (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF, VXXSPLTID): Replace macro expansion
893 BU_P10V_1 with BU_P10V_AV_1.
894 (XXGENPCVM_V16QI, XXGENPCVM_V8HI, XXGENPCVM_V4SI, XXGENPCVM_V2DI):
895 Replace macro expansion BU_P10V_2 with BU_P10V_VSX_2.
896 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF, VXXBLEND_V16QI, VXXBLEND_V8HI,
897 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): Replace macor
898 expansion BU_P10V_3 with BU_P10V_VSX_3.
899 (XXEVAL, VXXPERMX): Replace macro expansion BU_P10V_4 with BU_P10V_VSX_4.
900 (XVCVBF16SP, XVCVSPBF16): Replace macro expansion BU_VSX_1 with
901 BU_P10V_VSX_1. Also change MISC to CONST.
902 * config/rs6000/rs6000-c.c: (P10_BUILTIN_VXXPERMX): Replace with
903 P10V_BUILTIN_VXXPERMX.
904 (P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRLB, P10_BUILTIN_VCLRRB,
905 P10_BUILTIN_VGNB, P10_BUILTIN_XXEVAL, P10_BUILTIN_VXXPERMX,
906 P10_BUILTIN_VEXTRACTBL, P10_BUILTIN_VEXTRACTHL, P10_BUILTIN_VEXTRACTWL,
907 P10_BUILTIN_VEXTRACTDL, P10_BUILTIN_VINSERTGPRHL,
908 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
909 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
910 P10_BUILTIN_VEXTRACTBR, P10_BUILTIN_VEXTRACTHR,
911 P10_BUILTIN_VEXTRACTWR, P10_BUILTIN_VEXTRACTDR,
912 P10_BUILTIN_VINSERTGPRBR, P10_BUILTIN_VINSERTGPRHR,
913 P10_BUILTIN_VINSERTGPRWR, P10_BUILTIN_VINSERTGPRDR,
914 P10_BUILTIN_VINSERTVPRBR, P10_BUILTIN_VINSERTVPRHR,
915 P10_BUILTIN_VINSERTVPRWR, P10_BUILTIN_VREPLACE_ELT_UV4SI,
916 P10_BUILTIN_VREPLACE_ELT_V4SI, P10_BUILTIN_VREPLACE_ELT_UV2DI,
917 P10_BUILTIN_VREPLACE_ELT_V2DI, P10_BUILTIN_VREPLACE_ELT_V2DF,
918 P10_BUILTIN_VREPLACE_UN_UV4SI, P10_BUILTIN_VREPLACE_UN_V4SI,
919 P10_BUILTIN_VREPLACE_UN_V4SF, P10_BUILTIN_VREPLACE_UN_UV2DI,
920 P10_BUILTIN_VREPLACE_UN_V2DI, P10_BUILTIN_VREPLACE_UN_V2DF,
921 P10_BUILTIN_VSLDB_V16QI, P10_BUILTIN_VSLDB_V16QI,
922 P10_BUILTIN_VSLDB_V8HI, P10_BUILTIN_VSLDB_V4SI,
923 P10_BUILTIN_VSLDB_V2DI, P10_BUILTIN_VXXSPLTIW_V4SI,
924 P10_BUILTIN_VXXSPLTIW_V4SF, P10_BUILTIN_VXXSPLTID,
925 P10_BUILTIN_VXXSPLTI32DX_V4SI, P10_BUILTIN_VXXSPLTI32DX_V4SF,
926 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
927 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI,
928 P10_BUILTIN_VXXBLEND_V4SF, P10_BUILTIN_VXXBLEND_V2DF,
929 P10_BUILTIN_VSRDB_V16QI, P10_BUILTIN_VSRDB_V8HI,
930 P10_BUILTIN_VSRDB_V4SI, P10_BUILTIN_VSRDB_V2DI,
931 P10_BUILTIN_VSTRIBL, P10_BUILTIN_VSTRIHL,
932 P10_BUILTIN_VSTRIBL_P, P10_BUILTIN_VSTRIHL_P,
933 P10_BUILTIN_VSTRIBR, P10_BUILTIN_VSTRIHR,
934 P10_BUILTIN_VSTRIBR_P, P10_BUILTIN_VSTRIHR_P,
935 P10_BUILTIN_MTVSRBM, P10_BUILTIN_MTVSRHM,
936 P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
937 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB,
938 P10_BUILTIN_VCNTMBH, P10_BUILTIN_VCNTMBW,
939 P10_BUILTIN_VCNTMBD, P10_BUILTIN_VEXPANDMB,
940 P10_BUILTIN_VEXPANDMH, P10_BUILTIN_VEXPANDMW,
941 P10_BUILTIN_VEXPANDMD, P10_BUILTIN_VEXPANDMQ,
942 P10_BUILTIN_VEXTRACTMB, P10_BUILTIN_VEXTRACTMH,
943 P10_BUILTIN_VEXTRACTMW, P10_BUILTIN_VEXTRACTMD,
944 P10_BUILTIN_VEXTRACTMQ, P10_BUILTIN_XVTLSBB_ZEROS,
945 P10_BUILTIN_XVTLSBB_ONES): Replace with
946 P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRLB, P10V_BUILTIN_VCLRRB,
947 P10V_BUILTIN_VGNB, P10V_BUILTIN_XXEVAL, P10V_BUILTIN_VXXPERMX,
948 P10V_BUILTIN_VEXTRACTBL, P10V_BUILTIN_VEXTRACTHL, P10V_BUILTIN_VEXTRACTWL,
949 P10V_BUILTIN_VEXTRACTDL, P10V_BUILTIN_VINSERTGPRHL,
950 P10V_BUILTIN_VINSERTGPRWL, P10V_BUILTIN_VINSERTGPRDL,
951 P10V_BUILTIN_VINSERTVPRBL,P10V_BUILTIN_VINSERTVPRHL,
952 P10V_BUILTIN_VEXTRACTBR, P10V_BUILTIN_VEXTRACTHR
953 P10V_BUILTIN_VEXTRACTWR, P10V_BUILTIN_VEXTRACTDR,
954 P10V_BUILTIN_VINSERTGPRBR, P10V_BUILTIN_VINSERTGPRHR,
955 P10V_BUILTIN_VINSERTGPRWR, P10V_BUILTIN_VINSERTGPRDR,
956 P10V_BUILTIN_VINSERTVPRBR, P10V_BUILTIN_VINSERTVPRHR,
957 P10V_BUILTIN_VINSERTVPRWR, P10V_BUILTIN_VREPLACE_ELT_UV4SI,
958 P10V_BUILTIN_VREPLACE_ELT_V4SI, P10V_BUILTIN_VREPLACE_ELT_UV2DI,
959 P10V_BUILTIN_VREPLACE_ELT_V2DI, P10V_BUILTIN_VREPLACE_ELT_V2DF,
960 P10V_BUILTIN_VREPLACE_UN_UV4SI, P10V_BUILTIN_VREPLACE_UN_V4SI,
961 P10V_BUILTIN_VREPLACE_UN_V4SF, P10V_BUILTIN_VREPLACE_UN_UV2DI,
962 P10V_BUILTIN_VREPLACE_UN_V2DI, P10V_BUILTIN_VREPLACE_UN_V2DF,
963 P10V_BUILTIN_VSLDB_V16QI, P10V_BUILTIN_VSLDB_V16QI,
964 P10V_BUILTIN_VSLDB_V8HI, P10V_BUILTIN_VSLDB_V4SI,
965 P10V_BUILTIN_VSLDB_V2DI, P10V_BUILTIN_VXXSPLTIW_V4SI,
966 P10V_BUILTIN_VXXSPLTIW_V4SF, P10V_BUILTIN_VXXSPLTID,
967 P10V_BUILTIN_VXXSPLTI32DX_V4SI, P10V_BUILTIN_VXXSPLTI32DX_V4SF,
968 P10V_BUILTIN_VXXBLEND_V16QI, P10V_BUILTIN_VXXBLEND_V8HI,
969 P10V_BUILTIN_VXXBLEND_V4SI, P10V_BUILTIN_VXXBLEND_V2DI,
970 P10V_BUILTIN_VXXBLEND_V4SF, P10V_BUILTIN_VXXBLEND_V2DF,
971 P10V_BUILTIN_VSRDB_V16QI, P10V_BUILTIN_VSRDB_V8HI,
972 P10V_BUILTIN_VSRDB_V4SI, P10V_BUILTIN_VSRDB_V2DI,
973 P10V_BUILTIN_VSTRIBL, P10V_BUILTIN_VSTRIHL,
974 P10V_BUILTIN_VSTRIBL_P, P10V_BUILTIN_VSTRIHL_P,
975 P10V_BUILTIN_VSTRIBR, P10V_BUILTIN_VSTRIHR,
976 P10V_BUILTIN_VSTRIBR_P, P10V_BUILTIN_VSTRIHR_P,
977 P10V_BUILTIN_MTVSRBM, P10V_BUILTIN_MTVSRHM,
978 P10V_BUILTIN_MTVSRWM, P10V_BUILTIN_MTVSRDM,
979 P10V_BUILTIN_MTVSRQM, P10V_BUILTIN_VCNTMBB,
980 P10V_BUILTIN_VCNTMBH, P10V_BUILTIN_VCNTMBW,
981 P10V_BUILTIN_VCNTMBD, P10V_BUILTIN_VEXPANDMB,
982 P10V_BUILTIN_VEXPANDMH, P10V_BUILTIN_VEXPANDMW,
983 P10V_BUILTIN_VEXPANDMD, P10V_BUILTIN_VEXPANDMQ,
984 P10V_BUILTIN_VEXTRACTMB, P10V_BUILTIN_VEXTRACTMH,
985 P10V_BUILTIN_VEXTRACTMW, P10V_BUILTIN_VEXTRACTMD,
986 P10V_BUILTIN_VEXTRACTMQ, P10V_BUILTIN_XVTLSBB_ZEROS,
987 P10V_BUILTIN_XVTLSBB_ONES respectively.
988 * config/rs6000/rs6000-call.c: Ditto above, change P10_BUILTIN_name to
990 (P10_BUILTIN_XVCVSPBF16, P10_BUILTIN_XVCVBF16SP): Change to
991 P10V_BUILTIN_XVCVSPBF16, P10V_BUILTIN_XVCVBF16SP respectively.
993 2020-08-19 Bill Schmidt <wschmidt@linux.ibm.com>
995 * config/rs6000/rs6000-logue.c (rs6000_decl_ok_for_sibcall):
996 Sibcalls are always legal when the caller doesn't preserve r2.
998 2020-08-19 Uroš Bizjak <ubizjak@gmail.com>
1000 * config/i386/i386-expand.c (ix86_expand_builtin)
1001 [case IX86_BUILTIN_ENQCMD, case IX86_BUILTIN_ENQCMDS]:
1002 Rewrite expansion to use code_for_enqcmd.
1003 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]:
1004 Rewrite expansion to use code_for_wrss.
1005 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1006 Rewrite expansion to use code_for_wrss.
1008 2020-08-19 Feng Xue <fxue@os.amperecomputing.com>
1010 PR tree-optimization/94234
1011 * match.pd ((PTR_A + OFF) - (PTR_B + OFF)) -> (PTR_A - PTR_B): New
1014 2020-08-19 H.J. Lu <hjl.tools@gmail.com>
1016 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect Rocket
1017 Lake and Alder Lake.
1019 2020-08-19 Peixin Qiao <qiaopeixin@huawei.com>
1021 * config/aarch64/aarch64.c (aarch64_init_cumulative_args): Remove
1022 "fndecl && TREE_PUBLIC (fndecl)" check since it prevents the funtion
1023 type check when calling via a function pointer or when calling a static
1026 2020-08-19 Kewen Lin <linkw@linux.ibm.com>
1028 * opts-global.c (decode_options): Call target_option_override_hook
1029 before it prints for --help=*.
1031 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
1033 * config/rs6000/rs6000-builtin.def (BU_VSX_1): Rename xvcvbf16sp to
1035 * config/rs6000/rs6000-call.c (builtin_function_type): Likewise.
1036 * config/rs6000/vsx.md: Likewise.
1037 * doc/extend.texi: Likewise.
1039 2020-08-18 Aaron Sawdey <acsawdey@linux.ibm.com>
1041 * config/rs6000/rs6000-string.c (gen_lxvl_stxvl_move):
1043 (expand_block_move): Add lxvl/stxvl, vector pair, and
1045 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1046 Default value for -mblock-ops-vector-pair.
1047 * config/rs6000/rs6000.opt: Add -mblock-ops-vector-pair.
1049 2020-08-18 Aldy Hernandez <aldyh@redhat.com>
1051 * vr-values.c (check_for_binary_op_overflow): Change type of store
1053 (vr_values::adjust_range_with_scev): Abstract most of the code...
1054 (range_of_var_in_loop): ...here. Remove value_range_equiv uses.
1055 (simplify_using_ranges::simplify_using_ranges): Change type of store
1057 * vr-values.h (class range_query): New.
1058 (class simplify_using_ranges): Use range_query.
1059 (class vr_values): Add OVERRIDE to get_value_range.
1060 (range_of_var_in_loop): New.
1062 2020-08-18 Martin Sebor <msebor@redhat.com>
1066 * expr.c (convert_to_bytes): Replace statically allocated buffer with
1067 a dynamically allocated one of sufficient size.
1069 2020-08-18 Martin Sebor <msebor@redhat.com>
1071 PR tree-optimization/96670
1073 * gimple-fold.c (gimple_fold_builtin_memchr): Call byte_representation
1074 to get it, not string_constant.
1076 2020-08-18 Hu Jiangping <hujiangping@cn.fujitsu.com>
1078 * doc/gimple.texi (gimple_debug_begin_stmt_p): Add return type.
1079 (gimple_debug_inline_entry_p, gimple_debug_nonbind_marker_p): Likewise.
1081 2020-08-18 Martin Sebor <msebor@redhat.com>
1083 * fold-const.c (native_encode_expr): Update comment.
1085 2020-08-18 Uroš Bizjak <ubizjak@gmail.com>
1088 * config/i386/i386.md (restore_stack_nonlocal): Add missing compare
1089 RTX. Rewrite expander to use high-level functions in RTL construction.
1091 2020-08-18 liuhongt <hongtao.liu@intel.com>
1095 * config/i386/i386-expand.c (ix86_expand_pinsr): Don't use
1097 (ix86_expand_pextr): Don't use pextr for TImode.
1099 2020-08-17 Uroš Bizjak <ubizjak@gmail.com>
1101 * config/i386/i386-builtin.def (__builtin_ia32_bextri_u32)
1102 (__builtin_ia32_bextri_u64): Use CODE_FOR_nothing.
1103 * config/i386/i386.md (@tbm_bextri_<mode>):
1104 Implement as parametrized name pattern.
1105 (@rdrand<mode>): Ditto.
1106 (@rdseed<mode>): Ditto.
1107 * config/i386/i386-expand.c (ix86_expand_builtin)
1108 [case IX86_BUILTIN_BEXTRI32, case IX86_BUILTIN_BEXTRI64]:
1109 Update for parameterized name patterns.
1110 [case IX86_BUILTIN_RDRAND16_STEP, case IX86_BUILTIN_RDRAND32_STEP]
1111 [case IX86_BUILTIN_RDRAND64_STEP]: Ditto.
1112 [case IX86_BUILTIN_RDSEED16_STEP, case IX86_BUILTIN_RDSEED32_STEP]
1113 [case IX86_BUILTIN_RDSEED64_STEP]: Ditto.
1115 2020-08-17 Aldy Hernandez <aldyh@redhat.com>
1117 * vr-values.c (vr_values::get_value_range): Add stmt param.
1118 (vr_values::extract_range_from_comparison): Same.
1119 (vr_values::extract_range_from_assignment): Pass stmt to
1120 extract_range_from_comparison.
1121 (vr_values::adjust_range_with_scev): Pass stmt to get_value_range.
1122 (simplify_using_ranges::vrp_evaluate_conditional): Add stmt param.
1123 Pass stmt to get_value_range.
1124 (simplify_using_ranges::vrp_visit_cond_stmt): Pass stmt to
1126 (simplify_using_ranges::simplify_abs_using_ranges): Same.
1127 (simplify_using_ranges::simplify_div_or_mod_using_ranges): Same.
1128 (simplify_using_ranges::simplify_bit_ops_using_ranges): Same.
1129 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
1130 (simplify_using_ranges::simplify_switch_using_ranges): Same.
1131 (simplify_using_ranges::simplify_float_conversion_using_ranges): Same.
1132 * vr-values.h (class vr_values): Add stmt arg to
1133 vrp_evaluate_conditional_warnv_with_ops.
1134 Add stmt arg to extract_range_from_comparison and get_value_range.
1135 (simplify_using_ranges::get_value_range): Add stmt arg.
1137 2020-08-17 liuhongt <hongtao.liu@intel.com>
1140 * config/i386/i386.c (ix86_legitimate_constant_p): Return
1141 false for ENDBR immediate.
1142 (ix86_legitimate_address_p): Ditto.
1143 * config/i386/predicates.md
1144 (x86_64_immediate_operand): Exclude ENDBR immediate.
1145 (x86_64_zext_immediate_operand): Ditto.
1146 (x86_64_dwzext_immediate_operand): Ditto.
1147 (ix86_endbr_immediate_operand): New predicate.
1149 2020-08-16 Roger Sayle <roger@nextmovesoftware.com>
1151 * simplify-rtx.c (simplify_unary_operation_1) [SIGN_EXTEND]:
1152 Simplify (sign_extend:M (truncate:N (lshiftrt:M x C))) to
1153 (ashiftrt:M x C) when the shift sets the high bits appropriately.
1155 2020-08-14 Martin Sebor <msebor@redhat.com>
1158 * builtins.c (expand_builtin_memory_copy_args): Rename called function.
1159 (expand_builtin_stpcpy_1): Remove argument from call.
1160 (expand_builtin_memcmp): Rename called function.
1161 (inline_expand_builtin_bytecmp): Same.
1162 * expr.c (convert_to_bytes): New function.
1163 (constant_byte_string): New function (formerly string_constant).
1164 (string_constant): Call constant_byte_string.
1165 (byte_representation): New function.
1166 * expr.h (byte_representation): Declare.
1167 * fold-const-call.c (fold_const_call): Rename called function.
1168 * fold-const.c (c_getstr): Remove an argument.
1169 (getbyterep): Define a new function.
1170 * fold-const.h (c_getstr): Remove an argument.
1171 (getbyterep): Declare a new function.
1172 * gimple-fold.c (gimple_fold_builtin_memory_op): Rename callee.
1173 (gimple_fold_builtin_string_compare): Same.
1174 (gimple_fold_builtin_memchr): Same.
1176 2020-08-14 David Malcolm <dmalcolm@redhat.com>
1178 * doc/analyzer.texi (Overview): Add tip about how to get a
1179 gimple dump if the analyzer ICEs.
1181 2020-08-14 Uroš Bizjak <ubizjak@gmail.com>
1183 * config/i386/i386-builtin.def (__builtin_ia32_llwpcb)
1184 (__builtin_ia32_slwpcb, __builtin_ia32_lwpval32)
1185 (__builtin_ia32_lwpval64, __builtin_ia32_lwpins32)
1186 (__builtin_ia32_lwpins64): Use CODE_FOR_nothing.
1187 * config/i386/i386.md (@lwp_llwpcb<mode>):
1188 Implement as parametrized name pattern.
1189 (@lwp_slwpcb<mode>): Ditto.
1190 (@lwp_lwpval<mode>): Ditto.
1191 (@lwp_lwpins<mode>): Ditto.
1192 * config/i386/i386-expand.c (ix86_expand_special_args_builtin)
1193 [case VOID_FTYPE_UINT_UINT_UINT, case VOID_FTYPE_UINT64_UINT_UINT]
1194 [case UCHAR_FTYPE_UINT_UINT_UINT, case UCHAR_FTYPE_UINT64_UINT_UINT]:
1196 (ix86_expand_builtin)
1197 [ case IX86_BUILTIN_LLWPCB, case IX86_BUILTIN_LLWPCB]:
1198 Update for parameterized name patterns.
1199 [case IX86_BUILTIN_LWPVAL32, case IX86_BUILTIN_LWPVAL64]
1200 [case IX86_BUILTIN_LWPINS32, case IX86_BUILTIN_LWPINS64]: Expand here.
1202 2020-08-14 Lewis Hyatt <lhyatt@gmail.com>
1204 * common.opt: Add new option -fdiagnostics-plain-output.
1205 * doc/invoke.texi: Document it.
1206 * opts-common.c (decode_cmdline_options_to_array): Implement it.
1207 (decode_cmdline_option): Add missing const qualifier to argv.
1209 2020-08-14 Jakub Jelinek <jakub@redhat.com>
1210 Jonathan Wakely <jwakely@redhat.com>
1211 Jonathan Wakely <jwakely@redhat.com>
1213 * system.h: Include type_traits.
1214 * vec.h (vec<T, A, vl_embed>::embedded_size): Use offsetof and asserts
1215 on vec_stdlayout, which is conditionally a vec (for standard layout T)
1216 and otherwise vec_embedded.
1218 2020-08-14 Jojo R <jiejie_rong@c-sky.com>
1220 * config/csky/csky-elf.h (ASM_SPEC): Use mfloat-abi.
1221 * config/csky/csky-linux-elf.h (ASM_SPEC): mfloat-abi.
1223 2020-08-13 David Malcolm <dmalcolm@redhat.com>
1239 * Makefile.in (ANALYZER_OBJS): Add analyzer/region.o,
1240 analyzer/region-model-impl-calls.o,
1241 analyzer/region-model-manager.o,
1242 analyzer/region-model-reachability.o, analyzer/store.o, and
1244 * doc/analyzer.texi: Update for changes to analyzer
1246 * tristate.h (tristate::get_value): New accessor.
1248 2020-08-13 Uroš Bizjak <ubizjak@gmail.com>
1250 * config/i386/i386-builtin.def (CET_NORMAL): Merge to CET BDESC array.
1251 (__builtin_ia32_rddspd, __builtin_ia32_rddspq, __builtin_ia32_incsspd)
1252 (__builtin_ia32_incsspq, __builtin_ia32_wrssd, __builtin_ia32_wrssq)
1253 (__builtin_ia32_wrussd, __builtin_ia32_wrussq): Use CODE_FOR_nothing.
1254 * config/i386/i386-builtins.c: Remove handling of CET_NORMAL builtins.
1255 * config/i386/i386.md (@rdssp<mode>): Implement as parametrized
1256 name pattern. Use SWI48 mode iterator. Introduce input operand
1257 and remove explicit XOR zeroing from insn template.
1258 (@incssp<mode>): Implement as parametrized name pattern.
1259 Use SWI48 mode iterator.
1260 (@wrss<mode>): Ditto.
1261 (@wruss<mode>): Ditto.
1262 (rstorssp): Remove expander. Rename insn pattern from *rstorssp<mode>.
1263 Use DImode memory operand.
1264 (clrssbsy): Remove expander. Rename insn pattern from *clrssbsy<mode>.
1265 Use DImode memory operand.
1266 (save_stack_nonlocal): Update for parametrized name patterns.
1267 Use cleared register as an argument to gen_rddsp.
1268 (restore_stack_nonlocal): Update for parametrized name patterns.
1269 * config/i386/i386-expand.c (ix86_expand_builtin):
1270 [case IX86_BUILTIN_RDSSPD, case IX86_BUILTIN_RDSSPQ]: Expand here.
1271 [case IX86_BUILTIN_INCSSPD, case IX86_BUILTIN_INCSSPQ]: Ditto.
1272 [case IX86_BUILTIN_RSTORSSP, case IX86_BUILTIN_CLRSSBSY]:
1273 Generate DImode memory operand.
1274 [case IX86_BUILTIN_WRSSD, case IX86_BUILTIN_WRSSQ]
1275 [case IX86_BUILTIN_WRUSSD, case IX86_BUILTIN_WRUSSD]:
1276 Update for parameterized name patterns.
1278 2020-08-13 Peter Bergner <bergner@linux.ibm.com>
1281 * config/rs6000/rs6000-call.c (rs6000_promote_function_mode): Disallow
1282 MMA types as return values.
1283 (rs6000_function_arg): Disallow MMA types as function arguments.
1285 2020-08-13 Richard Sandiford <richard.sandiford@arm.com>
1288 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1290 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1291 condition to check ag_mode after entering if condition of
1292 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1293 set as false by -mgeneral-regs-only, report the diagnostic
1294 information of -mgeneral-regs-only imcompatible with the use
1295 of fp/simd register(s).
1297 2020-08-13 Martin Liska <mliska@suse.cz>
1300 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Mask m_value
1303 2020-08-13 Jakub Jelinek <jakub@redhat.com>
1305 * gimplify.c (gimplify_omp_taskloop_expr): New function.
1306 (gimplify_omp_for): Use it. For OMP_FOR_NON_RECTANGULAR
1307 loops adjust in outer taskloop the var-outer decls.
1308 * omp-expand.c (expand_omp_taskloop_for_inner): Handle non-rectangular
1310 (expand_omp_for): Don't reject non-rectangular taskloop.
1311 * omp-general.c (omp_extract_for_data): Don't assert that
1312 non-rectangular loops have static schedule, instead treat loop->m1
1313 or loop->m2 as if loop->n1 or loop->n2 is non-constant.
1315 2020-08-13 Hongtao Liu <hongtao.liu@intel.com>
1318 * config/i386/sse.md (<avx512>_load<mode>_mask,
1319 <avx512>_load<mode>_mask): Extend to generate blendm
1321 (<avx512>_blendm<mode>, <avx512>_blendm<mode>): Change
1322 define_insn to define_expand.
1324 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1325 Uroš Bizjak <ubizjak@gmail.com>
1328 * config/i386/i386.md (peephole2): Only reorder register clearing
1329 instructions to allow use of xor for general registers.
1331 2020-08-12 Martin Liska <mliska@suse.cz>
1334 * ipa-cp.c (ipcp_bits_lattice::meet_with_1): Drop value bits
1335 for bits that are unknown.
1336 (ipcp_bits_lattice::set_to_constant): Likewise.
1337 * tree-ssa-ccp.c (get_default_value): Add sanity check that
1338 IPA CP bit info has all bits set to zero in bits that
1341 2020-08-12 Peixin Qiao <qiaopeixin@huawei.com>
1343 * config/aarch64/aarch64.c (aarch64_function_value): Add if
1344 condition to check ag_mode after entering if condition of
1345 aarch64_vfp_is_call_or_return_candidate. If TARGET_FLOAT is
1346 set as false by -mgeneral-regs-only, report the diagnostic
1347 information of -mgeneral-regs-only imcompatible with the use
1348 of fp/simd register(s).
1350 2020-08-12 Jakub Jelinek <jakub@redhat.com>
1352 PR tree-optimization/96535
1353 * toplev.c (process_options): Move flag_unroll_loops and
1354 flag_cunroll_grow_size handling from here to ...
1355 * opts.c (finish_options): ... here. For flag_cunroll_grow_size,
1356 don't check for AUTODETECT_VALUE, but instead check
1357 opts_set->x_flag_cunroll_grow_size.
1358 * common.opt (funroll-completely-grow-size): Default to 0.
1359 * config/rs6000/rs6000.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
1361 (rs6000_override_options_after_change): New function.
1362 (rs6000_option_override_internal): Call it. Move there the
1363 flag_cunroll_grow_size, unroll_only_small_loops and
1364 flag_rename_registers handling.
1366 2020-08-12 Tom de Vries <tdevries@suse.de>
1368 * config/nvptx/nvptx.c (nvptx_assemble_decl_begin): Make elt_size an
1369 unsigned HOST_WIDE_INT. Print init_frag.remaining using
1370 HOST_WIDE_INT_PRINT_UNSIGNED.
1372 2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
1373 Uroš Bizjak <ubizjak@gmail.com>
1375 * config/i386/i386.md (peephole2): Reduce unnecessary
1376 register shuffling produced by register allocation.
1378 2020-08-12 Aldy Hernandez <aldyh@redhat.com>
1380 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use vec<>
1381 instead of std::vector<>.
1382 (evaluate_properties_for_edge): Same.
1383 (ipa_fn_summary_t::duplicate): Same.
1384 (estimate_ipcp_clone_size_and_time): Same.
1385 * vec.h (<T, A, vl_embed>::embedded_size): Change vec_embedded
1386 type to contain a char[].
1388 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1391 * config/s390/s390.c (s390_cannot_force_const_mem): Reject an
1392 unary minus for everything not being a numeric constant.
1393 (legitimize_tls_address): Move a NEG out of the CONST rtx.
1395 2020-08-12 Andreas Krebbel <krebbel@linux.ibm.com>
1398 * config/s390/s390.h (TARGET_NONSIGNALING_VECTOR_COMPARE_OK): New
1400 * config/s390/vector.md (vcond_comparison_operator): Use new macro
1403 2020-08-11 Jakub Jelinek <jakub@redhat.com>
1405 PR rtl-optimization/96539
1406 * expr.c (emit_block_move_hints): Don't copy anything if x and y
1407 are the same and neither is MEM_VOLATILE_P.
1409 2020-08-11 Jakub Jelinek <jakub@redhat.com>
1412 * tree.c (get_narrower): Use TREE_TYPE (ret) instead of
1413 TREE_TYPE (win) for COMPOUND_EXPRs.
1415 2020-08-11 Jan Hubicka <hubicka@ucw.cz>
1417 * predict.c (not_loop_guard_equal_edge_p): New function.
1418 (maybe_predict_edge): New function.
1419 (predict_paths_for_bb): Use it.
1420 (predict_paths_leading_to_edge): Use it.
1422 2020-08-11 Martin Liska <mliska@suse.cz>
1424 * dbgcnt.def (DEBUG_COUNTER): Add ipa_cp_bits.
1425 * ipa-cp.c (ipcp_store_bits_results): Use it when we store known
1426 bits for parameters.
1428 2020-08-10 Marek Polacek <polacek@redhat.com>
1430 * doc/sourcebuild.texi: Document dg-ice.
1432 2020-08-10 Roger Sayle <roger@nextmovesoftware.com>
1434 * config/i386/i386-expand.c (ix86_expand_int_movcc): Expand
1435 signed MIN_EXPR against zero as "x < 0 ? x : 0" instead of
1436 "x <= 0 ? x : 0" to enable sign_bit_compare_p optimizations.
1438 2020-08-10 Aldy Hernandez <aldyh@redhat.com>
1440 * value-range.h (gt_ggc_mx): Declare inline.
1443 2020-08-10 Marc Glisse <marc.glisse@inria.fr>
1445 PR tree-optimization/95433
1446 * match.pd (X * C1 == C2): Handle wrapping overflow.
1447 * expr.c (maybe_optimize_mod_cmp): Qualify call to mod_inv.
1449 * wide-int.cc (mod_inv): ... here.
1450 * wide-int.h (mod_inv): Declare it.
1452 2020-08-10 Jan Hubicka <hubicka@ucw.cz>
1454 * predict.c (filter_predictions): Document semantics of filter.
1455 (equal_edge_p): Rename to ...
1456 (not_equal_edge_p): ... this; reverse semantics.
1457 (remove_predictions_associated_with_edge): Fix.
1459 2020-08-10 Hongtao Liu <hongtao.liu@intel.com>
1462 * config/i386/i386-expand.c (ix86_expand_sse_cmp): Refine for
1464 (ix86_expand_mask_vec_cmp): Change prototype.
1465 * config/i386/i386-protos.h (ix86_expand_mask_vec_cmp): Change prototype.
1466 * config/i386/i386.c (ix86_print_operand): Remove operand
1468 * config/i386/sse.md
1469 (*<avx512>_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>): Deleted.
1470 (*<avx512>_cmp<mode>3<mask_scalar_merge_name>): Ditto.
1471 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>): Ditto.
1472 (*<avx512>_ucmp<mode>3<mask_scalar_merge_name>,
1473 avx512f_maskcmp<mode>3): Ditto.
1475 2020-08-09 Roger Sayle <roger@nextmovesoftware.com>
1477 * expmed.c (init_expmed_one_conv): Restore all->reg's mode.
1478 (init_expmed_one_mode): Set all->reg to desired mode.
1480 2020-08-08 Peter Bergner <bergner@linux.ibm.com>
1483 * config/rs6000/rs6000.c (rs6000_invalid_conversion): Use canonical
1484 types for type comparisons. Refactor code to simplify it.
1486 2020-08-08 Jakub Jelinek <jakub@redhat.com>
1489 * tree-nested.c (convert_nonlocal_omp_clauses): For
1490 OMP_CLAUSE_REDUCTION, OMP_CLAUSE_LASTPRIVATE and OMP_CLAUSE_LINEAR
1491 save info->new_local_var_chain around walks of the clause gimple
1492 sequences and declare_vars if needed into the sequence.
1494 2020-08-08 Jakub Jelinek <jakub@redhat.com>
1496 PR tree-optimization/96424
1497 * omp-expand.c: Include tree-eh.h.
1498 (expand_omp_for_init_vars): Handle -fexceptions -fnon-call-exceptions
1499 by forcing floating point comparison into a bool temporary.
1501 2020-08-07 Marc Glisse <marc.glisse@inria.fr>
1503 * generic-match-head.c (optimize_vectors_before_lowering_p): New
1505 * gimple-match-head.c (optimize_vectors_before_lowering_p):
1507 * match.pd ((v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Use it.
1509 2020-08-07 Richard Biener <rguenther@suse.de>
1511 PR tree-optimization/96514
1512 * tree-if-conv.c (if_convertible_bb_p): If the last stmt
1513 is a call that is control-altering, fail.
1515 2020-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
1517 * config/bpf/bpf.md: Remove trailing whitespaces.
1518 * config/bpf/constraints.md: Likewise.
1519 * config/bpf/predicates.md: Likewise.
1521 2020-08-07 Michael Meissner <meissner@linux.ibm.com>
1523 * config/rs6000/rs6000.md (bswaphi2_reg): Add ISA 3.1 support.
1524 (bswapsi2_reg): Add ISA 3.1 support.
1525 (bswapdi2): Rename bswapdi2_xxbrd to bswapdi2_brd.
1526 (bswapdi2_brd,bswapdi2_xxbrd): Rename. Add ISA 3.1 support.
1528 2020-08-07 Alan Modra <amodra@gmail.com>
1531 * config/rs6000/predicates.md (current_file_function_operand): Don't
1532 accept functions that differ in r2 usage.
1534 2020-08-06 Hans-Peter Nilsson <hp@bitrange.com>
1536 * config/mmix/mmix.md (MM): New mode_iterator.
1537 ("mov<mode>"): New expander to expand for all MM-modes.
1538 ("*movqi_expanded", "*movhi_expanded", "*movsi_expanded")
1539 ("*movsf_expanded", "*movdf_expanded"): Rename from the
1540 corresponding mov<M> named pattern. Add to the condition that
1541 either operand must be a register_operand.
1542 ("*movdi_expanded"): Similar, but also allow STCO in the condition.
1544 2020-08-06 Richard Sandiford <richard.sandiford@arm.com>
1547 * config/arm/arm.md (arm_stack_protect_test_insn): Zero out
1548 operand 2 after use.
1549 * config/arm/thumb1.md (thumb1_stack_protect_test_insn): Likewise.
1551 2020-08-06 Peter Bergner <bergner@linux.ibm.com>
1554 * config/rs6000/mma.md (*movpxi): Add xxsetaccz generation.
1555 Disable split for zero constant source operand.
1556 (mma_xxsetaccz): Change to define_expand. Call gen_movpxi.
1558 2020-08-06 Jakub Jelinek <jakub@redhat.com>
1560 PR tree-optimization/96480
1561 * tree-ssa-reassoc.c (suitable_cond_bb): Add TEST_SWAPPED_P argument.
1562 If TEST_BB ends in cond and has one edge to *OTHER_BB and another
1563 through an empty bb to that block too, if PHI args don't match, retry
1564 them through the other path from TEST_BB.
1565 (maybe_optimize_range_tests): Adjust callers. Handle such LAST_BB
1566 through inversion of the condition.
1568 2020-08-06 Jose E. Marchesi <jose.marchesi@oracle.com>
1570 * config/bpf/bpf-helpers.h (KERNEL_HELPER): Define.
1571 (KERNEL_VERSION): Remove.
1572 * config/bpf/bpf-helpers.def: Delete.
1573 * config/bpf/bpf.c (bpf_handle_fndecl_attribute): New function.
1574 (bpf_attribute_table): Define.
1575 (bpf_helper_names): Delete.
1576 (bpf_helper_code): Likewise.
1577 (enum bpf_builtins): Adjust to new helpers mechanism.
1578 (bpf_output_call): Likewise.
1579 (bpf_init_builtins): Likewise.
1580 (bpf_init_builtins): Likewise.
1581 * doc/extend.texi (BPF Function Attributes): New section.
1582 (BPF Kernel Helpers): Delete section.
1584 2020-08-06 Richard Biener <rguenther@suse.de>
1586 PR tree-optimization/96491
1587 * tree-ssa-sink.c (sink_common_stores_to_bb): Avoid
1588 sinking across abnormal edges.
1590 2020-08-06 Richard Biener <rguenther@suse.de>
1592 PR tree-optimization/96483
1593 * tree-ssa-pre.c (create_component_ref_by_pieces_1): Handle
1596 2020-08-06 Richard Biener <rguenther@suse.de>
1598 * graphite-isl-ast-to-gimple.c (ivs_params): Use hash_map instead
1600 (ivs_params_clear): Adjust.
1601 (gcc_expression_from_isl_ast_expr_id): Likewise.
1602 (graphite_create_new_loop): Likewise.
1603 (add_parameters_to_ivs_params): Likewise.
1605 2020-08-06 Roger Sayle <roger@nextmovesoftware.com>
1606 Uroš Bizjak <ubizjak@gmail.com>
1608 * config/i386/i386.md (MAXMIN_IMODE): No longer needed.
1609 (<maxmin><mode>3): Support SWI248 and general_operand for
1610 second operand, when TARGET_CMOVE.
1611 (<maxmin><mode>3_1 splitter): Optimize comparisons against
1612 0, 1 and -1 to use "test" instead of "cmp".
1613 (*<maxmin>di3_doubleword): Likewise, allow general_operand
1614 and enable on TARGET_CMOVE.
1615 (peephole2): Convert clearing a register after a flag setting
1616 instruction into an xor followed by the original flag setter.
1618 2020-08-06 Gerald Pfeifer <gerald@pfeifer.com>
1620 * ipa-fnsummary.c (INCLUDE_VECTOR): Define.
1621 Remove direct inclusion of <vector>.
1623 2020-08-06 Kewen Lin <linkw@gcc.gnu.org>
1625 * config/rs6000/rs6000.c (rs6000_adjust_vect_cost_per_loop): New
1627 (rs6000_finish_cost): Call rs6000_adjust_vect_cost_per_loop.
1628 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Add cost
1629 modeling for vector with length.
1630 (vect_rgroup_iv_might_wrap_p): New function, factored out from...
1631 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): ...this.
1632 Update function comment.
1633 * tree-vect-stmts.c (vect_gen_len): Update function comment.
1634 * tree-vectorizer.h (vect_rgroup_iv_might_wrap_p): New declare.
1636 2020-08-06 Kewen Lin <linkw@linux.ibm.com>
1638 * tree-vectorizer.c (try_vectorize_loop_1): Skip the epilogue loops
1641 2020-08-05 Marc Glisse <marc.glisse@inria.fr>
1643 PR tree-optimization/95906
1645 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
1646 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): New transformations.
1647 (op (c ? a : b)): Update to match the new transformations.
1649 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
1652 * config/aarch64/aarch64.md (stack_protect_test_<mode>): Set the
1653 CC register directly, instead of a GPR. Replace the original GPR
1654 destination with an extra scratch register. Zero out operand 3
1656 (stack_protect_test): Update accordingly.
1658 2020-08-05 Richard Sandiford <richard.sandiford@arm.com>
1660 * config/aarch64/aarch64.md (load_pair_sw_<SX:mode><SX2:mode>)
1661 (load_pair_dw_<DX:mode><DX2:mode>, load_pair_dw_tftf)
1662 (store_pair_sw_<SX:mode><SX2:mode>)
1663 (store_pair_dw_<DX:mode><DX2:mode>, store_pair_dw_tftf)
1664 (*load_pair_extendsidi2_aarch64)
1665 (*load_pair_zero_extendsidi2_aarch64): Use %z for the memory operand.
1666 * config/aarch64/aarch64-simd.md (load_pair<DREG:mode><DREG2:mode>)
1667 (vec_store_pair<DREG:mode><DREG2:mode>, load_pair<VQ:mode><VQ2:mode>)
1668 (vec_store_pair<VQ:mode><VQ2:mode>): Likewise.
1670 2020-08-05 Richard Biener <rguenther@suse.de>
1672 * tree-ssa-loop-im.c (invariantness_dom_walker): Remove.
1673 (invariantness_dom_walker::before_dom_children): Move to ...
1674 (compute_invariantness): ... this function.
1675 (move_computations): Inline ...
1676 (tree_ssa_lim): ... here, share RPO order and avoid some
1678 (analyze_memory_references): Remove sorting of location
1679 lists, instead assert they are sorted already when checking.
1680 (prev_flag_edges): Remove.
1681 (execute_sm_if_changed): Pass down and adjust prev edge state.
1682 (execute_sm_exit): Likewise.
1683 (hoist_memory_references): Likewise. Commit edge insertions
1684 of each processed exit.
1685 (store_motion_loop): Do not commit edge insertions on all
1686 edges in the function.
1687 (tree_ssa_lim_initialize): Do not call alloc_aux_for_edges.
1688 (tree_ssa_lim_finalize): Do not call free_aux_for_edges.
1690 2020-08-05 Richard Biener <rguenther@suse.de>
1692 * genmatch.c (fail_label): New global.
1693 (expr::gen_transform): Branch to fail_label instead of
1694 returning. Fix indent of call argument checking.
1695 (dt_simplify::gen_1): Compute and emit fail_label, branch
1696 to it instead of returning early.
1698 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1700 * omp-expand.c (expand_omp_for): Don't disallow combined non-rectangular
1703 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1706 * omp-low.c (lower_omp_taskreg): Call lower_reduction_clauses even in
1709 2020-08-05 Jakub Jelinek <jakub@redhat.com>
1711 * omp-expand.c (expand_omp_for_init_counts): Remember
1712 first_inner_iterations, factor and n1o from the number of iterations
1714 (expand_omp_for_init_vars): Use more efficient logical iteration number
1715 to actual iterator values computation even for non-rectangular loops
1716 where number of loop iterations could not be computed at compile time.
1718 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1720 * config/rs6000/altivec.h (vec_blendv, vec_permx): Add define.
1721 * config/rs6000/altivec.md (UNSPEC_XXBLEND, UNSPEC_XXPERMX.): New
1723 (VM3): New define_mode.
1724 (VM3_char): New define_attr.
1725 (xxblend_<mode> mode VM3): New define_insn.
1726 (xxpermx): New define_expand.
1727 (xxpermx_inst): New define_insn.
1728 * config/rs6000/rs6000-builtin.def (VXXBLEND_V16QI, VXXBLEND_V8HI,
1729 VXXBLEND_V4SI, VXXBLEND_V2DI, VXXBLEND_V4SF, VXXBLEND_V2DF): New
1730 BU_P10V_3 definitions.
1731 (XXBLEND): New BU_P10_OVERLOAD_3 definition.
1732 (XXPERMX): New BU_P10_OVERLOAD_4 definition.
1733 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1734 (P10_BUILTIN_VXXPERMX): Add if statement.
1735 * config/rs6000/rs6000-call.c (P10_BUILTIN_VXXBLEND_V16QI,
1736 P10_BUILTIN_VXXBLEND_V8HI, P10_BUILTIN_VXXBLEND_V4SI,
1737 P10_BUILTIN_VXXBLEND_V2DI, P10_BUILTIN_VXXBLEND_V4SF,
1738 P10_BUILTIN_VXXBLEND_V2DF, P10_BUILTIN_VXXPERMX): Define
1739 overloaded arguments.
1740 (rs6000_expand_quaternop_builtin): Add if case for CODE_FOR_xxpermx.
1741 (builtin_quaternary_function_type): Add v16uqi_type and xxpermx_type
1742 variables, add case statement for P10_BUILTIN_VXXPERMX.
1743 (builtin_function_type): Add case statements for
1744 P10_BUILTIN_VXXBLEND_V16QI, P10_BUILTIN_VXXBLEND_V8HI,
1745 P10_BUILTIN_VXXBLEND_V4SI, P10_BUILTIN_VXXBLEND_V2DI.
1746 * doc/extend.texi: Add documentation for vec_blendv and vec_permx.
1748 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1750 * config/rs6000/altivec.h (vec_splati, vec_splatid, vec_splati_ins):
1752 * config/rs6000/altivec.md (UNSPEC_XXSPLTIW, UNSPEC_XXSPLTID,
1753 UNSPEC_XXSPLTI32DX): New.
1754 (vxxspltiw_v4si, vxxspltiw_v4sf_inst, vxxspltidp_v2df_inst,
1755 vxxsplti32dx_v4si_inst, vxxsplti32dx_v4sf_inst): New define_insn.
1756 (vxxspltiw_v4sf, vxxspltidp_v2df, vxxsplti32dx_v4si,
1757 vxxsplti32dx_v4sf.): New define_expands.
1758 * config/rs6000/predicates.md (u1bit_cint_operand,
1759 s32bit_cint_operand, c32bit_cint_operand): New predicates.
1760 * config/rs6000/rs6000-builtin.def (VXXSPLTIW_V4SI, VXXSPLTIW_V4SF,
1761 VXXSPLTID): New definitions.
1762 (VXXSPLTI32DX_V4SI, VXXSPLTI32DX_V4SF): New BU_P10V_3
1764 (XXSPLTIW, XXSPLTID): New definitions.
1765 (XXSPLTI32DX): Add definitions.
1766 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XXSPLTIW,
1767 P10_BUILTIN_VEC_XXSPLTID, P10_BUILTIN_VEC_XXSPLTI32DX):
1769 * config/rs6000/rs6000-protos.h (rs6000_constF32toI32): New extern
1771 * config/rs6000/rs6000.c (rs6000_constF32toI32): New function.
1772 * doc/extend.texi: Add documentation for vec_splati,
1773 vec_splatid, and vec_splati_ins.
1775 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1777 * config/rs6000/altivec.h (vec_sldb, vec_srdb): New defines.
1778 * config/rs6000/altivec.md (UNSPEC_SLDB, UNSPEC_SRDB): New.
1779 (SLDB_lr): New attribute.
1780 (VSHIFT_DBL_LR): New iterator.
1781 (vs<SLDB_lr>db_<mode>): New define_insn.
1782 * config/rs6000/rs6000-builtin.def (VSLDB_V16QI, VSLDB_V8HI,
1783 VSLDB_V4SI, VSLDB_V2DI, VSRDB_V16QI, VSRDB_V8HI, VSRDB_V4SI,
1784 VSRDB_V2DI): New BU_P10V_3 definitions.
1785 (SLDB, SRDB): New BU_P10_OVERLOAD_3 definitions.
1786 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_SLDB,
1787 P10_BUILTIN_VEC_SRDB): New definitions.
1788 (rs6000_expand_ternop_builtin) [CODE_FOR_vsldb_v16qi,
1789 CODE_FOR_vsldb_v8hi, CODE_FOR_vsldb_v4si, CODE_FOR_vsldb_v2di,
1790 CODE_FOR_vsrdb_v16qi, CODE_FOR_vsrdb_v8hi, CODE_FOR_vsrdb_v4si,
1791 CODE_FOR_vsrdb_v2di]: Add clauses.
1792 * doc/extend.texi: Add description for vec_sldb and vec_srdb.
1794 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1796 * config/rs6000/altivec.h: Add define for vec_replace_elt and
1797 vec_replace_unaligned.
1798 * config/rs6000/vsx.md (UNSPEC_REPLACE_ELT, UNSPEC_REPLACE_UN): New
1800 (REPLACE_ELT): New mode iterator.
1801 (REPLACE_ELT_char, REPLACE_ELT_sh, REPLACE_ELT_max): New mode attributes.
1802 (vreplace_un_<mode>, vreplace_elt_<mode>_inst): New.
1803 * config/rs6000/rs6000-builtin.def (VREPLACE_ELT_V4SI,
1804 VREPLACE_ELT_UV4SI, VREPLACE_ELT_V4SF, VREPLACE_ELT_UV2DI,
1805 VREPLACE_ELT_V2DF, VREPLACE_UN_V4SI, VREPLACE_UN_UV4SI,
1806 VREPLACE_UN_V4SF, VREPLACE_UN_V2DI, VREPLACE_UN_UV2DI,
1807 VREPLACE_UN_V2DF, (REPLACE_ELT, REPLACE_UN, VREPLACE_ELT_V2DI): New builtin
1809 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_REPLACE_ELT,
1810 P10_BUILTIN_VEC_REPLACE_UN): New builtin argument definitions.
1811 (rs6000_expand_quaternop_builtin): Add 3rd argument checks for
1812 CODE_FOR_vreplace_elt_v4si, CODE_FOR_vreplace_elt_v4sf,
1813 CODE_FOR_vreplace_un_v4si, CODE_FOR_vreplace_un_v4sf.
1814 (builtin_function_type) [P10_BUILTIN_VREPLACE_ELT_UV4SI,
1815 P10_BUILTIN_VREPLACE_ELT_UV2DI, P10_BUILTIN_VREPLACE_UN_UV4SI,
1816 P10_BUILTIN_VREPLACE_UN_UV2DI]: New cases.
1817 * doc/extend.texi: Add description for vec_replace_elt and
1818 vec_replace_unaligned builtins.
1820 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1822 * config/rs6000/altivec.h (vec_insertl, vec_inserth): New defines.
1823 * config/rs6000/rs6000-builtin.def (VINSERTGPRBL, VINSERTGPRHL,
1824 VINSERTGPRWL, VINSERTGPRDL, VINSERTVPRBL, VINSERTVPRHL, VINSERTVPRWL,
1825 VINSERTGPRBR, VINSERTGPRHR, VINSERTGPRWR, VINSERTGPRDR, VINSERTVPRBR,
1826 VINSERTVPRHR, VINSERTVPRWR): New builtins.
1827 (INSERTL, INSERTH): New builtins.
1828 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_INSERTL,
1829 P10_BUILTIN_VEC_INSERTH): New overloaded definitions.
1830 (P10_BUILTIN_VINSERTGPRBL, P10_BUILTIN_VINSERTGPRHL,
1831 P10_BUILTIN_VINSERTGPRWL, P10_BUILTIN_VINSERTGPRDL,
1832 P10_BUILTIN_VINSERTVPRBL, P10_BUILTIN_VINSERTVPRHL,
1833 P10_BUILTIN_VINSERTVPRWL): Add case entries.
1834 * config/rs6000/vsx.md (define_c_enum): Add UNSPEC_INSERTL,
1836 (define_expand): Add vinsertvl_<mode>, vinsertvr_<mode>,
1837 vinsertgl_<mode>, vinsertgr_<mode>, mode is VI2.
1838 (define_ins): vinsertvl_internal_<mode>, vinsertvr_internal_<mode>,
1839 vinsertgl_internal_<mode>, vinsertgr_internal_<mode>, mode VEC_I.
1840 * doc/extend.texi: Add documentation for vec_insertl, vec_inserth.
1842 2020-08-05 2020-08-04 Carl Love <cel@us.ibm.com>
1844 * config/rs6000/altivec.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
1845 (vextractl<mode>, vextractr<mode>)
1846 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
1848 * config/rs6000/vsx.md: (UNSPEC_EXTRACTL, UNSPEC_EXTRACTR)
1849 (vextractl<mode>, vextractr<mode>)
1850 (vextractl<mode>_internal, vextractr<mode>_internal for mode VI2)
1852 * doc/extend.texi: Update documentation for vec_extractl.
1853 Replace builtin name vec_extractr with vec_extracth. Update
1854 description of vec_extracth.
1856 2020-08-04 Jim Wilson <jimw@sifive.com>
1858 * doc/invoke.texi (AArch64 Options): Delete duplicate
1859 -mstack-protector-guard docs.
1861 2020-08-04 Roger Sayle <roger@nextmovesoftware.com>
1863 * config/nvptx/nvptx.md (smulhi3_highpart, smulsi3_highpart)
1864 (umulhi3_highpart, umulsi3_highpart): New instructions.
1866 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
1868 * config/gcn/gcn-run.c (R_AMDGPU_NONE): Delete.
1869 (R_AMDGPU_ABS32_LO): Delete.
1870 (R_AMDGPU_ABS32_HI): Delete.
1871 (R_AMDGPU_ABS64): Delete.
1872 (R_AMDGPU_REL32): Delete.
1873 (R_AMDGPU_REL64): Delete.
1874 (R_AMDGPU_ABS32): Delete.
1875 (R_AMDGPU_GOTPCREL): Delete.
1876 (R_AMDGPU_GOTPCREL32_LO): Delete.
1877 (R_AMDGPU_GOTPCREL32_HI): Delete.
1878 (R_AMDGPU_REL32_LO): Delete.
1879 (R_AMDGPU_REL32_HI): Delete.
1881 (R_AMDGPU_RELATIVE64): Delete.
1883 2020-08-04 Omar Tahir <omar.tahir@arm.com>
1885 * config/arm/arm-cpus.in (armv8.1-m.main): Tune for Cortex-M55.
1887 2020-08-04 Hu Jiangping <hujiangping@cn.fujitsu.com>
1889 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Delete
1890 redundant extra_cost variable.
1892 2020-08-04 Zhiheng Xie <xiezhiheng@huawei.com>
1894 * config/aarch64/aarch64-builtins.c (aarch64_call_properties):
1895 Use FLOAT_MODE_P macro instead of enumerating all floating-point
1896 modes and add global flag FLAG_AUTO_FP.
1898 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1900 * doc/extend.texi (symver): Add @cindex for symver function attribute.
1902 2020-08-04 Marc Glisse <marc.glisse@inria.fr>
1904 PR tree-optimization/95433
1905 * match.pd (X * C1 == C2): New transformation.
1907 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1909 * gimple-ssa-sprintf.c (get_int_range): Adjust for irange API.
1910 (format_integer): Same.
1911 (handle_printf_call): Same.
1913 2020-08-04 Andrew Stubbs <ams@codesourcery.com>
1915 * config/gcn/gcn.md ("<expander>ti3"): New.
1917 2020-08-04 Richard Biener <rguenther@suse.de>
1919 PR tree-optimization/88240
1920 * tree-ssa-sccvn.h (vn_reference_s::punned): New flag.
1921 * tree-ssa-sccvn.c (vn_reference_insert): Initialize punned.
1922 (vn_reference_insert_pieces): Likewise.
1923 (visit_reference_op_call): Likewise.
1924 (visit_reference_op_load): Track whether a ref was punned.
1925 * tree-ssa-pre.c (do_hoist_insertion): Refuse to perform hoist
1926 insertion on punned floating point loads.
1928 2020-08-04 Sudakshina Das <sudi.das@arm.com>
1930 * config/aarch64/aarch64.c (aarch64_gen_store_pair): Add case
1932 (aarch64_gen_load_pair): Likewise.
1933 (aarch64_copy_one_block_and_progress_pointers): Handle 256 bit copy.
1934 (aarch64_expand_cpymem): Expand copy_limit to 256bits where
1937 2020-08-04 Andrea Corallo <andrea.corallo@arm.com>
1939 * config/aarch64/aarch64.md (aarch64_fjcvtzs): Add missing
1941 * doc/sourcebuild.texi (aarch64_fjcvtzs_hw) Document new
1942 target supports option.
1944 2020-08-04 Tom de Vries <tdevries@suse.de>
1947 * config/nvptx/nvptx.c (nvptx_gen_shuffle): Handle V2SI/V2DI.
1949 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1952 * tree-vect-generic.c (expand_vector_conversion): Replace .VEC_CONVERT
1953 call with GIMPLE_NOP if there is no lhs.
1955 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1958 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Add IS_DEBUG
1959 argument. Return false instead of gcc_unreachable if it is true and
1960 get_addr_base_and_unit_offset returns NULL.
1961 (fold_stmt_1) <case GIMPLE_DEBUG>: Adjust caller.
1963 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1965 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional):
1966 Call is_gimple_min_invariant dropped from previous patch.
1968 2020-08-04 Jakub Jelinek <jakub@redhat.com>
1970 * omp-expand.c (expand_omp_for_init_counts): For triangular loops
1971 compute number of iterations at runtime more efficiently.
1972 (expand_omp_for_init_vars): Adjust immediate dominators.
1973 (extract_omp_for_update_vars): Likewise.
1975 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1977 * vr-values.c (simplify_using_ranges::two_valued_val_range_p):
1980 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1982 * vr-values.c (simplify_conversion_using_ranges): Convert to irange API.
1984 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1986 * vr-values.c (test_for_singularity): Use irange API.
1987 (simplify_using_ranges::simplify_cond_using_ranges_1): Do not
1988 special case VR_RANGE.
1990 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1992 * vr-values.c (simplify_using_ranges::vrp_evaluate_conditional): Adjust
1995 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
1997 * vr-values.c (simplify_using_ranges::op_with_boolean_value_range_p): Adjust
2000 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2002 * tree-ssanames.c (get_range_info): Use irange instead of value_range.
2003 * tree-ssanames.h (get_range_info): Same.
2005 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2007 * fold-const.c (expr_not_equal_to): Adjust for irange API.
2009 2020-08-04 Aldy Hernandez <aldyh@redhat.com>
2011 * builtins.c (determine_block_size): Remove ad-hoc range canonicalization.
2013 2020-08-04 Xionghu Luo <luoxhu@linux.ibm.com>
2015 PR rtl-optimization/71309
2016 * dse.c (find_shift_sequence): Use subreg of shifted from high part
2017 register to avoid loading from address.
2019 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2021 * doc/cpp.texi (Variadic Macros): Use the exact ... token in
2024 2020-08-03 Nathan Sidwell <nathan@acm.org>
2026 * doc/invoke.texi: Refer to c++20
2028 2020-08-03 Julian Brown <julian@codesourcery.com>
2029 Thomas Schwinge <thomas@codesourcery.com>
2031 * gimplify.c (gimplify_omp_target_update): Allow GOMP_MAP_TO_PSET
2032 without a preceding data-movement mapping.
2034 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2036 * config/darwin.h (ASM_DECLARE_FUNCTION_NAME): UNDEF before
2038 (DEF_MIN_OSX_VERSION): Only define if there's no existing
2041 2020-08-03 Iain Sandoe <iain@sandoe.co.uk>
2043 * config/darwin.c (IN_TARGET_CODE): Remove.
2044 (darwin_mergeable_constant_section): Handle poly-int machine modes.
2045 (machopic_select_rtx_section): Likewise.
2047 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2049 PR tree-optimization/96430
2050 * range-op.cc (operator_tests): Do not shift by 31 on targets with
2051 integer's smaller than 32 bits.
2053 2020-08-03 Martin Jambor <mjambor@suse.cz>
2055 * hsa-brig-format.h: Moved to brig/brigfrontend.
2056 * hsa-brig.c: Removed.
2057 * hsa-builtins.def: Likewise.
2058 * hsa-common.c: Likewise.
2059 * hsa-common.h: Likewise.
2060 * hsa-dump.c: Likewise.
2061 * hsa-gen.c: Likewise.
2062 * hsa-regalloc.c: Likewise.
2063 * ipa-hsa.c: Likewise.
2064 * omp-grid.c: Likewise.
2065 * omp-grid.h: Likewise.
2066 * Makefile.in (BUILTINS_DEF): Remove hsa-builtins.def.
2067 (OBJS): Remove hsa-common.o, hsa-gen.o, hsa-regalloc.o, hsa-brig.o,
2068 hsa-dump.o, ipa-hsa.c and omp-grid.o.
2069 (GTFILES): Removed hsa-common.c and omp-expand.c.
2070 * builtins.def: Remove processing of hsa-builtins.def.
2071 (DEF_HSA_BUILTIN): Remove.
2072 * common.opt (flag_disable_hsa): Remove.
2074 * config.in (ENABLE_HSA): Removed.
2075 * configure.ac: Removed handling configuration for hsa offloading.
2076 (ENABLE_HSA): Removed.
2077 * configure: Regenerated.
2078 * doc/install.texi (--enable-offload-targets): Remove hsa from the
2080 (--with-hsa-runtime): Reword to reference any HSA run-time, not
2081 specifically HSA offloading.
2082 * doc/invoke.texi (Option Summary): Remove -Whsa.
2083 (Warning Options): Likewise.
2084 (Optimize Options): Remove hsa-gen-debug-stores.
2085 * doc/passes.texi (Regular IPA passes): Remove section on IPA HSA
2087 * gimple-low.c (lower_stmt): Remove GIMPLE_OMP_GRID_BODY case.
2088 * gimple-pretty-print.c (dump_gimple_omp_for): Likewise.
2089 (dump_gimple_omp_block): Likewise.
2090 (pp_gimple_stmt_1): Likewise.
2091 * gimple-walk.c (walk_gimple_stmt): Likewise.
2092 * gimple.c (gimple_build_omp_grid_body): Removed function.
2093 (gimple_copy): Remove GIMPLE_OMP_GRID_BODY case.
2094 * gimple.def (GIMPLE_OMP_GRID_BODY): Removed.
2095 * gimple.h (gf_mask): Removed GF_OMP_PARALLEL_GRID_PHONY,
2096 OMP_FOR_KIND_GRID_LOOP, GF_OMP_FOR_GRID_PHONY,
2097 GF_OMP_FOR_GRID_INTRA_GROUP, GF_OMP_FOR_GRID_GROUP_ITER and
2098 GF_OMP_TEAMS_GRID_PHONY. Renumbered GF_OMP_FOR_KIND_SIMD and
2100 (gimple_build_omp_grid_body): Removed declaration.
2101 (gimple_has_substatements): Remove GIMPLE_OMP_GRID_BODY case.
2102 (gimple_omp_for_grid_phony): Removed.
2103 (gimple_omp_for_set_grid_phony): Likewise.
2104 (gimple_omp_for_grid_intra_group): Likewise.
2105 (gimple_omp_for_grid_intra_group): Likewise.
2106 (gimple_omp_for_grid_group_iter): Likewise.
2107 (gimple_omp_for_set_grid_group_iter): Likewise.
2108 (gimple_omp_parallel_grid_phony): Likewise.
2109 (gimple_omp_parallel_set_grid_phony): Likewise.
2110 (gimple_omp_teams_grid_phony): Likewise.
2111 (gimple_omp_teams_set_grid_phony): Likewise.
2112 (CASE_GIMPLE_OMP): Remove GIMPLE_OMP_GRID_BODY case.
2113 * lto-section-in.c (lto_section_name): Removed hsa.
2114 * lto-streamer.h (lto_section_type): Removed LTO_section_ipa_hsa.
2115 * lto-wrapper.c (compile_images_for_offload_targets): Remove special
2117 * omp-expand.c: Do not include hsa-common.h and gt-omp-expand.h.
2118 (parallel_needs_hsa_kernel_p): Removed.
2119 (grid_launch_attributes_trees): Likewise.
2120 (grid_launch_attributes_trees): Likewise.
2121 (grid_create_kernel_launch_attr_types): Likewise.
2122 (grid_insert_store_range_dim): Likewise.
2123 (grid_get_kernel_launch_attributes): Likewise.
2124 (get_target_arguments): Remove code passing HSA grid sizes.
2125 (grid_expand_omp_for_loop): Remove.
2126 (grid_arg_decl_map): Likewise.
2127 (grid_remap_kernel_arg_accesses): Likewise.
2128 (grid_expand_target_grid_body): Likewise.
2129 (expand_omp): Remove call to grid_expand_target_grid_body.
2130 (omp_make_gimple_edges): Remove GIMPLE_OMP_GRID_BODY case.
2131 * omp-general.c: Do not include hsa-common.h.
2132 (omp_maybe_offloaded): Do not check for HSA offloading.
2133 (omp_context_selector_matches): Likewise.
2134 * omp-low.c: Do not include hsa-common.h and omp-grid.h.
2135 (build_outer_var_ref): Remove handling of GIMPLE_OMP_GRID_BODY.
2136 (scan_sharing_clauses): Remove handling of OMP_CLAUSE__GRIDDIM_.
2137 (scan_omp_parallel): Remove handling of the phoney variant.
2138 (check_omp_nesting_restrictions): Remove handling of
2139 GIMPLE_OMP_GRID_BODY and GF_OMP_FOR_KIND_GRID_LOOP.
2140 (scan_omp_1_stmt): Remove handling of GIMPLE_OMP_GRID_BODY.
2141 (lower_omp_for_lastprivate): Remove handling of gridified loops.
2142 (lower_omp_for): Remove phony loop handling.
2143 (lower_omp_taskreg): Remove phony construct handling.
2144 (lower_omp_teams): Likewise.
2145 (lower_omp_grid_body): Removed.
2146 (lower_omp_1): Remove GIMPLE_OMP_GRID_BODY case.
2147 (execute_lower_omp): Do not call omp_grid_gridify_all_targets.
2148 * opts.c (common_handle_option): Do not handle hsa when processing
2150 * params.opt (hsa-gen-debug-stores): Remove.
2151 * passes.def: Remove pass_ipa_hsa and pass_gen_hsail.
2152 * timevar.def: Remove TV_IPA_HSA.
2153 * toplev.c: Do not include hsa-common.h.
2154 (compile_file): Do not call hsa_output_brig.
2155 * tree-core.h (enum omp_clause_code): Remove OMP_CLAUSE__GRIDDIM_.
2156 (tree_omp_clause): Remove union field dimension.
2157 * tree-nested.c (convert_nonlocal_omp_clauses): Remove the
2158 OMP_CLAUSE__GRIDDIM_ case.
2159 (convert_local_omp_clauses): Likewise.
2160 * tree-pass.h (make_pass_gen_hsail): Remove declaration.
2161 (make_pass_ipa_hsa): Likewise.
2162 * tree-pretty-print.c (dump_omp_clause): Remove GIMPLE_OMP_GRID_BODY
2164 * tree.c (omp_clause_num_ops): Remove the element corresponding to
2165 OMP_CLAUSE__GRIDDIM_.
2166 (omp_clause_code_name): Likewise.
2167 (walk_tree_1): Remove GIMPLE_OMP_GRID_BODY case.
2168 * tree.h (OMP_CLAUSE__GRIDDIM__DIMENSION): Remove.
2169 (OMP_CLAUSE__GRIDDIM__SIZE): Likewise.
2170 (OMP_CLAUSE__GRIDDIM__GROUP): Likewise.
2172 2020-08-03 Bu Le <bule1@huawei.com>
2174 * config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
2177 2020-08-03 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2179 * config/msp430/msp430.h (ASM_SPEC): Don't pass on "-md" option.
2181 2020-08-03 Yunde Zhong <zhongyunde@huawei.com>
2183 PR rtl-optimization/95696
2184 * regrename.c (regrename_analyze): New param include_all_block_p
2185 with default value TRUE. If set to false, avoid disrupting SMS
2187 * regrename.h (regrename_analyze): Adjust prototype.
2189 2020-08-03 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2191 * doc/tm.texi.in (VECTOR_STORE_FLAG_VALUE): Fix a typo.
2192 * doc/tm.texi: Regenerate.
2194 2020-08-03 Richard Sandiford <richard.sandiford@arm.com>
2196 * doc/invoke.texi: Add missing comma after octeontx2f95mm entry.
2198 2020-08-03 Qian jianhua <qianjh@cn.fujitsu.com>
2200 * config/aarch64/aarch64-cores.def (a64fx): New core.
2201 * config/aarch64/aarch64-tune.md: Regenerated.
2202 * config/aarch64/aarch64.c (a64fx_prefetch_tune, a64fx_tunings): New.
2203 * doc/invoke.texi: Add a64fx to the list.
2205 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2207 PR rtl-optimization/61494
2208 * simplify-rtx.c (simplify_binary_operation_1) [MINUS]: Don't
2209 simplify x - 0.0 with -fsignaling-nans.
2211 2020-08-03 Roger Sayle <roger@nextmovesoftware.com>
2213 * genmatch.c (decision_tree::gen): Emit stub functions for
2214 tree code operand counts that have no simplifications.
2215 (main): Correct comment typo.
2217 2020-08-03 Jonathan Wakely <jwakely@redhat.com>
2219 * gimple-ssa-sprintf.c: Fix typos in comments.
2221 2020-08-03 Tamar Christina <tamar.christina@arm.com>
2223 * config/aarch64/driver-aarch64.c (readline): Check return value fgets.
2225 2020-08-03 Richard Biener <rguenther@suse.de>
2227 * doc/match-and-simplify.texi: Amend accordingly.
2229 2020-08-03 Richard Biener <rguenther@suse.de>
2231 * genmatch.c (parser::gimple): New.
2232 (parser::parser): Initialize gimple flag member.
2233 (parser::parse_expr): Error on ! operator modifier when
2234 not targeting GIMPLE.
2235 (main): Pass down gimple flag to parser ctor.
2237 2020-08-03 Aldy Hernandez <aldyh@redhat.com>
2239 * Makefile.in (GTFILES): Move value-range.h up.
2240 * gengtype-lex.l: Set yylval to handle GTY markers on templates.
2241 * ipa-cp.c (initialize_node_lattices): Call value_range
2243 (ipcp_propagate_stage): Use in-place new so value_range construct
2245 * ipa-fnsummary.c (evaluate_conditions_for_known_args): Use std
2246 vec instead of GCC's vec<>.
2247 (evaluate_properties_for_edge): Adjust for std vec.
2248 (ipa_fn_summary_t::duplicate): Same.
2249 (estimate_ipcp_clone_size_and_time): Same.
2250 * ipa-prop.c (ipa_get_value_range): Use in-place new for
2252 * ipa-prop.h (struct GTY): Remove class keyword for m_vr.
2253 * range-op.cc (empty_range_check): Rename to...
2254 (empty_range_varying): ...this and adjust for varying.
2255 (undefined_shift_range_check): Adjust for irange.
2256 (range_operator::wi_fold): Same.
2257 (range_operator::fold_range): Adjust for irange. Special case
2258 single pairs for performance.
2259 (range_operator::op1_range): Adjust for irange.
2260 (range_operator::op2_range): Same.
2261 (value_range_from_overflowed_bounds): Same.
2262 (value_range_with_overflow): Same.
2263 (create_possibly_reversed_range): Same.
2265 (range_false): Same.
2266 (range_true_and_false): Same.
2267 (get_bool_state): Adjust for irange and tweak for performance.
2268 (operator_equal::fold_range): Adjust for irange.
2269 (operator_equal::op1_range): Same.
2270 (operator_equal::op2_range): Same.
2271 (operator_not_equal::fold_range): Same.
2272 (operator_not_equal::op1_range): Same.
2273 (operator_not_equal::op2_range): Same.
2278 (operator_lt::fold_range): Same.
2279 (operator_lt::op1_range): Same.
2280 (operator_lt::op2_range): Same.
2281 (operator_le::fold_range): Same.
2282 (operator_le::op1_range): Same.
2283 (operator_le::op2_range): Same.
2284 (operator_gt::fold_range): Same.
2285 (operator_gt::op1_range): Same.
2286 (operator_gt::op2_range): Same.
2287 (operator_ge::fold_range): Same.
2288 (operator_ge::op1_range): Same.
2289 (operator_ge::op2_range): Same.
2290 (operator_plus::wi_fold): Same.
2291 (operator_plus::op1_range): Same.
2292 (operator_plus::op2_range): Same.
2293 (operator_minus::wi_fold): Same.
2294 (operator_minus::op1_range): Same.
2295 (operator_minus::op2_range): Same.
2296 (operator_min::wi_fold): Same.
2297 (operator_max::wi_fold): Same.
2298 (cross_product_operator::wi_cross_product): Same.
2299 (operator_mult::op1_range): New.
2300 (operator_mult::op2_range): New.
2301 (operator_mult::wi_fold): Adjust for irange.
2302 (operator_div::wi_fold): Same.
2303 (operator_exact_divide::op1_range): Same.
2304 (operator_lshift::fold_range): Same.
2305 (operator_lshift::wi_fold): Same.
2306 (operator_lshift::op1_range): New.
2307 (operator_rshift::op1_range): New.
2308 (operator_rshift::fold_range): Adjust for irange.
2309 (operator_rshift::wi_fold): Same.
2310 (operator_cast::truncating_cast_p): Abstract out from
2311 operator_cast::fold_range.
2312 (operator_cast::fold_range): Adjust for irange and tweak for
2314 (operator_cast::inside_domain_p): Abstract out from fold_range.
2315 (operator_cast::fold_pair): Same.
2316 (operator_cast::op1_range): Use abstracted methods above. Adjust
2317 for irange and tweak for performance.
2318 (operator_logical_and::fold_range): Adjust for irange.
2319 (operator_logical_and::op1_range): Same.
2320 (operator_logical_and::op2_range): Same.
2321 (unsigned_singleton_p): New.
2322 (operator_bitwise_and::remove_impossible_ranges): New.
2323 (operator_bitwise_and::fold_range): New.
2324 (wi_optimize_and_or): Adjust for irange.
2325 (operator_bitwise_and::wi_fold): Same.
2326 (set_nonzero_range_from_mask): New.
2327 (operator_bitwise_and::simple_op1_range_solver): New.
2328 (operator_bitwise_and::op1_range): Adjust for irange.
2329 (operator_bitwise_and::op2_range): Same.
2330 (operator_logical_or::fold_range): Same.
2331 (operator_logical_or::op1_range): Same.
2332 (operator_logical_or::op2_range): Same.
2333 (operator_bitwise_or::wi_fold): Same.
2334 (operator_bitwise_or::op1_range): Same.
2335 (operator_bitwise_or::op2_range): Same.
2336 (operator_bitwise_xor::wi_fold): Same.
2337 (operator_bitwise_xor::op1_range): New.
2338 (operator_bitwise_xor::op2_range): New.
2339 (operator_trunc_mod::wi_fold): Adjust for irange.
2340 (operator_logical_not::fold_range): Same.
2341 (operator_logical_not::op1_range): Same.
2342 (operator_bitwise_not::fold_range): Same.
2343 (operator_bitwise_not::op1_range): Same.
2344 (operator_cst::fold_range): Same.
2345 (operator_identity::fold_range): Same.
2346 (operator_identity::op1_range): Same.
2347 (class operator_unknown): New.
2348 (operator_unknown::fold_range): New.
2349 (class operator_abs): Adjust for irange.
2350 (operator_abs::wi_fold): Same.
2351 (operator_abs::op1_range): Same.
2352 (operator_absu::wi_fold): Same.
2353 (class operator_negate): Same.
2354 (operator_negate::fold_range): Same.
2355 (operator_negate::op1_range): Same.
2356 (operator_addr_expr::fold_range): Same.
2357 (operator_addr_expr::op1_range): Same.
2358 (pointer_plus_operator::wi_fold): Same.
2359 (pointer_min_max_operator::wi_fold): Same.
2360 (pointer_and_operator::wi_fold): Same.
2361 (pointer_or_operator::op1_range): New.
2362 (pointer_or_operator::op2_range): New.
2363 (pointer_or_operator::wi_fold): Adjust for irange.
2364 (integral_table::integral_table): Add entries for IMAGPART_EXPR
2365 and POINTER_DIFF_EXPR.
2366 (range_cast): Adjust for irange.
2367 (build_range3): New.
2368 (range3_tests): New.
2369 (widest_irange_tests): New.
2370 (multi_precision_range_tests): New.
2371 (operator_tests): New.
2373 * range-op.h (class range_operator): Adjust for irange.
2375 * tree-vrp.c (range_fold_binary_symbolics_p): Adjust for irange and
2376 tweak for performance.
2377 (range_fold_binary_expr): Same.
2378 (masked_increment): Change to extern.
2379 * tree-vrp.h (masked_increment): New.
2380 * tree.c (cache_wide_int_in_type_cache): New function abstracted
2381 out from wide_int_to_tree_1.
2382 (wide_int_to_tree_1): Cache 0, 1, and MAX for pointers.
2383 * value-range-equiv.cc (value_range_equiv::deep_copy): Use kind
2385 (value_range_equiv::move): Same.
2386 (value_range_equiv::check): Adjust for irange.
2387 (value_range_equiv::intersect): Same.
2388 (value_range_equiv::union_): Same.
2389 (value_range_equiv::dump): Same.
2390 * value-range.cc (irange::operator=): Same.
2391 (irange::maybe_anti_range): New.
2392 (irange::copy_legacy_range): New.
2393 (irange::set_undefined): Adjust for irange.
2394 (irange::swap_out_of_order_endpoints): Abstract out from set().
2395 (irange::set_varying): Adjust for irange.
2396 (irange::irange_set): New.
2397 (irange::irange_set_anti_range): New.
2398 (irange::set): Adjust for irange.
2399 (value_range::set_nonzero): Move to header file.
2400 (value_range::set_zero): Move to header file.
2401 (value_range::check): Rename to...
2402 (irange::verify_range): ...this.
2403 (value_range::num_pairs): Rename to...
2404 (irange::legacy_num_pairs): ...this, and adjust for irange.
2405 (value_range::lower_bound): Rename to...
2406 (irange::legacy_lower_bound): ...this, and adjust for irange.
2407 (value_range::upper_bound): Rename to...
2408 (irange::legacy_upper_bound): ...this, and adjust for irange.
2409 (value_range::equal_p): Rename to...
2410 (irange::legacy_equal_p): ...this.
2411 (value_range::operator==): Move to header file.
2412 (irange::equal_p): New.
2413 (irange::symbolic_p): Adjust for irange.
2414 (irange::constant_p): Same.
2415 (irange::singleton_p): Same.
2416 (irange::value_inside_range): Same.
2417 (irange::may_contain_p): Same.
2418 (irange::contains_p): Same.
2419 (irange::normalize_addresses): Same.
2420 (irange::normalize_symbolics): Same.
2421 (irange::legacy_intersect): Same.
2422 (irange::legacy_union): Same.
2423 (irange::union_): Same.
2424 (irange::intersect): Same.
2425 (irange::irange_union): New.
2426 (irange::irange_intersect): New.
2427 (subtract_one): New.
2428 (irange::invert): Adjust for irange.
2429 (dump_bound_with_infinite_markers): New.
2430 (irange::dump): Adjust for irange.
2431 (debug): Add irange versions.
2432 (range_has_numeric_bounds_p): Adjust for irange.
2433 (vrp_val_max): Move to header file.
2434 (vrp_val_min): Move to header file.
2435 (DEFINE_INT_RANGE_GC_STUBS): New.
2436 (DEFINE_INT_RANGE_INSTANCE): New.
2437 * value-range.h (class irange): New.
2438 (class int_range): New.
2439 (class value_range): Rename to a instantiation of int_range.
2440 (irange::legacy_mode_p): New.
2441 (value_range::value_range): Remove.
2442 (irange::kind): New.
2443 (irange::num_pairs): Adjust for irange.
2444 (irange::type): Adjust for irange.
2445 (irange::tree_lower_bound): New.
2446 (irange::tree_upper_bound): New.
2447 (irange::type): Adjust for irange.
2448 (irange::min): Same.
2449 (irange::max): Same.
2450 (irange::varying_p): Same.
2451 (irange::undefined_p): Same.
2452 (irange::zero_p): Same.
2453 (irange::nonzero_p): Same.
2454 (irange::supports_type_p): Same.
2455 (range_includes_zero_p): Same.
2458 (irange::irange): New.
2459 (int_range::int_range): New.
2460 (int_range::operator=): New.
2461 (irange::set): Moved from value-range.cc and adjusted for irange.
2462 (irange::set_undefined): Same.
2463 (irange::set_varying): Same.
2464 (irange::operator==): Same.
2465 (irange::lower_bound): Same.
2466 (irange::upper_bound): Same.
2467 (irange::union_): Same.
2468 (irange::intersect): Same.
2469 (irange::set_nonzero): Same.
2470 (irange::set_zero): Same.
2471 (irange::normalize_min_max): New.
2472 (vrp_val_max): Move from value-range.cc.
2473 (vrp_val_min): Same.
2474 * vr-values.c (vr_values::get_lattice_entry): Call value_range
2477 2020-08-02 Sergei Trofimovich <siarheit@google.com>
2480 * var-tracking.c (vt_find_locations): Fully initialize
2481 all 'in_pending' bits.
2483 2020-08-01 Jan Hubicka <jh@suse.cz>
2485 * symtab.c (symtab_node::verify_base): Verify order.
2486 (symtab_node::verify_symtab_nodes): Verify order.
2488 2020-08-01 Jan Hubicka <jh@suse.cz>
2490 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
2492 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
2494 * config/csky/csky_opts.h (float_abi_type): New.
2495 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
2496 (TARGET_HARD_FLOAT): New.
2497 (TARGET_HARD_FLOAT_ABI): New.
2498 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
2499 * config/csky/csky.opt (mfloat-abi): New.
2500 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
2502 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
2504 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
2506 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
2507 Tom de Vries <tdevries@suse.de>
2510 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
2511 (TARGET_TRULY_NOOP_TRUNCATION): Define.
2513 2020-07-31 Richard Biener <rguenther@suse.de>
2516 * langhooks-def.h (lhd_finalize_early_debug): Declare.
2517 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
2518 (LANG_HOOKS_INITIALIZER): Amend.
2519 * langhooks.c: Include cgraph.h and debug.h.
2520 (lhd_finalize_early_debug): Default implementation from
2521 former code in finalize_compilation_unit.
2522 * langhooks.h (lang_hooks::finalize_early_debug): Add.
2523 * cgraphunit.c (symbol_table::finalize_compilation_unit):
2524 Call the finalize_early_debug langhook.
2526 2020-07-31 Richard Biener <rguenther@suse.de>
2528 * genmatch.c (expr::force_leaf): Add and initialize.
2529 (expr::gen_transform): Honor force_leaf by passing
2530 NULL as sequence argument to maybe_push_res_to_seq.
2531 (parser::parse_expr): Allow ! marker on result expression
2533 * doc/match-and-simplify.texi: Amend.
2535 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
2537 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
2538 taken costs for prologue and epilogue if they don't exist.
2539 (vect_estimate_min_profitable_iters): Likewise.
2541 2020-07-31 Martin Liska <mliska@suse.cz>
2543 * cgraph.h: Remove leading empty lines.
2544 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
2546 (struct cgraph_order_sort): Add constructors.
2547 (cgraph_order_sort::process): New.
2548 (cgraph_order_cmp): New.
2549 (output_in_order): Simplify and push nodes to vector.
2551 2020-07-31 Richard Biener <rguenther@suse.de>
2554 * fold-const.c (fold_range_test): Special-case constant
2555 LHS for short-circuiting operations.
2557 2020-07-31 Martin Liska <mliska@suse.cz>
2559 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
2561 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
2563 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
2564 Add new argument ATTRS.
2565 (aarch64_call_properties): New function.
2566 (aarch64_modifies_global_state_p): Likewise.
2567 (aarch64_reads_global_state_p): Likewise.
2568 (aarch64_could_trap_p): Likewise.
2569 (aarch64_add_attribute): Likewise.
2570 (aarch64_get_attributes): Likewise.
2571 (aarch64_init_simd_builtins): Add attributes for each built-in function.
2573 2020-07-31 Richard Biener <rguenther@suse.de>
2576 * var-tracking.c (vt_find_locations): Use
2577 rev_post_order_and_mark_dfs_back_seme and separately iterate
2580 2020-07-31 Richard Biener <rguenther@suse.de>
2582 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
2584 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
2585 (tag_header): New helper.
2586 (cmp_edge_dest_pre): Likewise.
2587 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
2588 find SCC exits and perform a DFS walk with extra edges to
2589 compute a RPO with adjacent SCC members when requesting an
2590 iteration optimized order and populate the toplevel SCC array.
2591 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
2592 of max_rpo and fill it in from SCC extent info instead.
2594 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
2596 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
2597 (vec_test_lsbb_all_zeros): New define.
2598 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
2600 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
2601 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
2602 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
2603 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
2604 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
2605 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
2606 (xvtlsbbo, xvtlsbbz): New instruction expands.
2608 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
2610 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
2611 * config/riscv/riscv.c (riscv_option_override): Handle
2613 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
2614 flexible stack protector guard settings.
2615 (stack_protect_set_<mode>): Ditto.
2616 (stack_protect_test): Ditto.
2617 (stack_protect_test_<mode>): Ditto.
2618 * config/riscv/riscv.opt (mstack-protector-guard=,
2619 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
2621 * doc/invoke.texi (Option Summary) [RISC-V Options]:
2622 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
2623 -mstack-protector-guard-offset=.
2624 (RISC-V Options): Ditto.
2626 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
2629 * configure: Regenerated.
2631 2020-07-30 Richard Biener <rguenther@suse.de>
2633 PR tree-optimization/96370
2634 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
2635 code parameter and use it instead of picking it up from
2636 the stmt that is being rewritten.
2637 (reassociate_bb): Pass down the operation code.
2639 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
2640 Tom de Vries <tdevries@suse.de>
2642 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
2643 (VECELEM): New mode attribute for a vector's uppercase element mode.
2644 (Vecelem): New mode attribute for a vector's lowercase element mode.
2645 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
2646 (*vec_set<mode>_3): New instructions.
2647 (vec_set<mode>): New expander to generate one of the above insns.
2648 (vec_extract<mode><Vecelem>): New instruction.
2650 2020-07-30 Martin Liska <mliska@suse.cz>
2653 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
2654 -m32. Start using libcall from 128+ bytes.
2656 2020-07-30 Martin Liska <mliska@suse.cz>
2658 * config/i386/x86-tune-costs.h: Change code formatting.
2660 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
2662 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
2664 2020-07-29 Fangrui Song <maskray@google.com>
2667 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
2668 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
2670 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
2672 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
2674 (arm_mve_mode_and_operands_type_check): Declare prototype.
2675 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
2676 _arm_coproc_mem_operand.
2677 (arm_coproc_mem_operand_wb): New function to cover full, limited
2679 (arm_coproc_mem_operand_no_writeback): New constraint for memory
2680 operand with no writeback.
2681 (arm_print_operand): Extend 'E' specifier for memory operand
2682 that does not support writeback.
2683 (arm_mve_mode_and_operands_type_check): New constraint check for
2684 MVE memory operands.
2685 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
2687 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
2689 (*mov_store_vfp_hf16): New pattern for vstr.16.
2690 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
2692 2020-07-29 Richard Biener <rguenther@suse.de>
2694 PR tree-optimization/96349
2695 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
2696 condition runs into a loop PHI with an abnormal entry value give up.
2698 2020-07-29 Richard Biener <rguenther@suse.de>
2700 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
2701 cache if we removed any SIMD UID SSA defs.
2702 * gimple-loop-interchange.cc (pass_linterchange::execute):
2703 Reset the scev cache if we interchanged a loop.
2705 2020-07-29 Richard Biener <rguenther@suse.de>
2707 PR tree-optimization/95679
2708 * tree-ssa-propagate.h
2709 (substitute_and_fold_engine::propagate_into_phi_args): Return
2710 whether anything changed.
2711 * tree-ssa-propagate.c
2712 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
2713 (substitute_and_fold_dom_walker::before_dom_children): Update
2716 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2718 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
2719 Ensure that loop variable npeel_tmp advances in each iteration.
2721 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
2723 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
2725 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
2727 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
2728 default_elf_asm_output_external.
2730 2020-07-28 Sergei Trofimovich <siarheit@google.com>
2733 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
2734 unoptimized callers as undead.
2736 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
2737 Richard Biener <rguenther@suse.de>
2739 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
2740 (parity(~x) -> parity(x)): New simplification.
2741 (parity(x)^parity(y) -> parity(x^y)): New simplification.
2742 (parity(x&1) -> x&1): New simplification.
2743 (popcount(x) -> x>>C): New simplification.
2745 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
2746 Tom de Vries <tdevries@suse.de>
2748 * config/nvptx/nvptx.md (extendqihi2): New instruction.
2749 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
2751 2020-07-28 Jakub Jelinek <jakub@redhat.com>
2754 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
2755 instead of trying to rediscover them in the body.
2756 (initialize_argument_information): Adjust caller.
2758 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
2760 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
2761 to determine peel_iters_epilogue to...
2762 (vect_get_peel_iters_epilogue): ...this new function.
2763 (vect_estimate_min_profitable_iters): Refactor cost calculation on
2764 peel_iters_prologue and peel_iters_epilogue.
2766 2020-07-27 Martin Sebor <msebor@redhat.com>
2768 PR tree-optimization/84079
2769 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
2770 Only allow just-past-the-end references for the most significant
2773 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
2776 * opts.c (check_alignment_argument): Set the -falign-Name
2777 on/off flag on and set the -falign-Name string value null,
2778 when the command-line specified argument is zero.
2780 2020-07-27 Martin Liska <mliska@suse.cz>
2782 PR tree-optimization/96058
2783 * expr.c (string_constant): Build string_constant only
2784 for a type that has same precision as char_type_node
2785 and is an integral type.
2787 2020-07-27 Richard Biener <rguenther@suse.de>
2789 * var-tracking.c (variable_tracking_main_1): Remove call
2790 to mark_dfs_back_edges.
2792 2020-07-27 Martin Liska <mliska@suse.cz>
2794 PR tree-optimization/96128
2795 * tree-vect-generic.c (expand_vector_comparison): Do not expand
2796 vector comparison with VEC_COND_EXPR.
2798 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
2801 * common.opt: Add -fcf-protection=check.
2802 * flag-types.h (cf_protection_level): Add CF_CHECK.
2803 * lto-wrapper.c (merge_and_complain): Issue an error for
2804 mismatching -fcf-protection values with -fcf-protection=check.
2805 Otherwise, merge -fcf-protection values.
2806 * doc/invoke.texi: Document -fcf-protection=check.
2808 2020-07-27 Martin Liska <mliska@suse.cz>
2811 * symbol-summary.h: Call vec_safe_reserve before grow is called
2812 in order to grow to a reasonable size.
2813 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
2816 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
2818 * configure.ac (out-of-tree linker .hidden support): Don't turn off
2819 for mmix-knuth-mmixware.
2820 * configure: Regenerate.
2822 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
2824 * config/rs6000/rs6000.c (rs6000_option_override_internal):
2825 Set the default value for -mblock-ops-unaligned-vsx.
2826 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
2827 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
2829 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
2831 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
2832 with default_asm_output_ident_directive.
2834 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
2836 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
2837 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
2839 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
2840 Clement Chigot <clement.chigot@atos.net>
2842 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
2844 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
2847 (ASM_CPU_SPEC): Remove vsx and altivec options.
2848 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
2851 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
2852 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
2853 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
2856 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
2859 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
2860 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
2862 (CPLUSPLUS_CPP_SPEC): Same.
2865 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
2866 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
2867 * config/rs6000/defaultaix64.h: Delete.
2869 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
2871 * config/rs6000/rs6000.opt: Delete -mpower10.
2873 2020-07-24 Alexandre Oliva <oliva@adacore.com>
2875 * config/i386/intelmic-mkoffload.c
2876 (generate_target_descr_file): Use dumppfx for save_temps
2877 files. Pass -dumpbase et al down to the compiler.
2878 (generate_target_offloadend_file): Likewise.
2879 (generate_host_descr_file): Likewise.
2880 (prepare_target_image): Likewise. Move out_obj_filename
2882 (main): ... here. Detect -dumpbase, set dumppfx too.
2884 2020-07-24 Alexandre Oliva <oliva@adacore.com>
2887 * gcc.c (process_command): Adjust and document conditions to
2890 2020-07-24 Matthias Klose <doko@ubuntu.com>
2892 * config/aarch64/aarch64.c (+aarch64_offload_options,
2893 TARGET_OFFLOAD_OPTIONS): New.
2895 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
2898 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
2900 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
2902 PR rtl-optimization/96298
2903 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
2904 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
2906 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
2908 PR gcov-profile/96267
2909 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
2911 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
2913 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
2914 (rs6000_adjust_vect_cost_per_stmt): ... here.
2915 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
2916 rs6000_adjust_vect_cost_per_stmt.
2918 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
2920 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
2921 IFN_LEN_LOAD and IFN_LEN_STORE.
2922 (get_alias_ptr_type_for_ptr_address): Likewise.
2924 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
2927 * asan.c (asan_shadow_offset_set_p): New.
2928 * asan.h (asan_shadow_offset_set_p): Ditto.
2929 * toplev.c (process_options): Allow -fsanitize=kernel-address
2930 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
2931 asan stack protection is enabled.
2933 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
2936 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
2937 little-endian memory ordering.
2939 2020-07-22 Nathan Sidwell <nathan@acm.org>
2941 * dumpfile.c (parse_dump_option): Deal with filenames
2944 2020-07-22 Nathan Sidwell <nathan@acm.org>
2946 * incpath.c (add_path): Avoid multiple strlen calls.
2948 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2950 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
2951 is not NULL_RTX before use.
2953 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2955 * expr.c (convert_modes): Allow a constant integer to be converted to
2956 any scalar int mode.
2958 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
2960 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
2961 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
2962 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
2963 Change mode parameter to machine_mode.
2964 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
2966 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
2967 Change mode parameter to machine_mode.
2968 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
2969 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
2971 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
2973 * doc/languages.texi: Fix “then”/“than” typo.
2975 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
2978 * config/i386/i386-protos.h (ix86_local_alignment): Add
2979 another function parameter may_lower alignment. Default is
2981 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
2983 (ix86_local_alignment): Amend ix86_local_alignment to accept
2984 another parameter may_lower. If may_lower is true, new align
2985 may be lower than incoming alignment. If may_lower is false,
2986 new align will be greater or equal to incoming alignment.
2987 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
2988 * doc/tm.texi: Regenerate.
2989 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
2991 * target.def (lower_local_decl_alignment): New hook.
2993 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
2996 * config/i386/sync.md (mfence_sse2): Enable for
2997 TARGET_64BIT and TARGET_SSE2.
2998 (mfence_nosse): Always enable.
3000 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3002 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
3004 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
3005 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
3006 msp430_do_not_relax_short_jumps.
3008 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3010 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
3012 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3014 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
3017 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
3019 PR rtl-optimization/89310
3020 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
3022 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3024 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
3025 allocated size and set current_function_static_stack_size, if
3026 flag_stack_usage_info.
3028 2020-07-20 Sergei Trofimovich <siarheit@google.com>
3031 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
3032 to get crtendS.o for !no-pie mode.
3033 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
3035 2020-07-20 Yang Yang <yangyang305@huawei.com>
3037 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
3038 VIEW_CONVERT_EXPRs if the arguments types and return type
3039 of simd clone function are distinct with the vectype of stmt.
3041 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
3044 * config/i386/i386.h (TARGET_AVOID_MFENCE):
3045 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
3046 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
3047 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
3048 referred memory in word_mode.
3049 (mem_thread_fence): Do not generate mfence_sse2 pattern when
3050 TARGET_AVOID_MFENCE is true.
3051 (atomic_store<mode>): Update for rename.
3052 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
3053 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
3055 2020-07-20 Martin Sebor <msebor@redhat.com>
3059 * builtins.c (inline_expand_builtin_string_cmp): Rename...
3060 (inline_expand_builtin_bytecmp): ...to this.
3061 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
3062 (expand_builtin_memory_copy_args): Handle object representations
3063 with embedded nul bytes.
3064 (expand_builtin_memcmp): Same.
3065 (expand_builtin_strcmp): Adjust call to naming change.
3066 (expand_builtin_strncmp): Same.
3067 * expr.c (string_constant): Create empty strings with nonzero size.
3068 * fold-const.c (c_getstr): Rename locals and update comments.
3069 * tree.c (build_string): Accept null pointer argument.
3070 (build_string_literal): Same.
3071 * tree.h (build_string): Provide a default.
3072 (build_string_literal): Same.
3074 2020-07-20 Richard Biener <rguenther@suse.de>
3076 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
3077 write-only post array.
3079 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3082 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
3083 of a bitfield not aligned on byte boundaries try to
3084 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
3085 adjust it depending on endianity.
3087 2020-07-20 Jakub Jelinek <jakub@redhat.com>
3090 * fold-const.c (native_encode_initializer): Handle bit-fields.
3092 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
3094 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3095 Set param_vect_partial_vector_usage to 0 explicitly.
3096 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
3097 * optabs-query.c (get_len_load_store_mode): New function.
3098 * optabs-query.h (get_len_load_store_mode): New declare.
3099 * params.opt (vect-partial-vector-usage): New.
3100 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
3101 handlings for vectorization using length-based partial vectors, call
3102 vect_gen_len for length generation, and rename some variables with
3103 items instead of scalars.
3104 (vect_set_loop_condition_partial_vectors): Add the handlings for
3105 vectorization using length-based partial vectors.
3106 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
3107 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
3108 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
3109 epil_using_partial_vectors_p.
3110 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
3111 for lengths destruction.
3112 (vect_verify_loop_lens): New function.
3113 (vect_analyze_loop): Add handlings for epilogue of loop when it's
3114 marked to use vectorization using partial vectors.
3115 (vect_analyze_loop_2): Add the check to allow only one vectorization
3116 approach using partial vectorization at the same time. Check param
3117 vect-partial-vector-usage for partial vectors decision. Mark
3118 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
3119 considerable to use partial vectors. Call release_vec_loop_controls
3120 for lengths destruction.
3121 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
3122 using length-based partial vectors.
3123 (vect_record_loop_mask): Init factor to 1 for vectorization using
3124 mask-based partial vectors.
3125 (vect_record_loop_len): New function.
3126 (vect_get_loop_len): Likewise.
3127 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
3128 checks for vectorization using length-based partial vectors. Factor
3129 some code to lambda function get_valid_nvectors.
3130 (vectorizable_store): Add handlings when using length-based partial
3132 (vectorizable_load): Likewise.
3133 (vect_gen_len): New function.
3134 * tree-vectorizer.h (struct rgroup_controls): Add field factor
3135 mainly for length-based partial vectors.
3136 (vec_loop_lens): New typedef.
3137 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
3138 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
3139 (LOOP_VINFO_LENS): Likewise.
3140 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
3141 (vect_record_loop_len): New declare.
3142 (vect_get_loop_len): Likewise.
3143 (vect_gen_len): Likewise.
3145 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
3147 * config/mmix/mmix.c (mmix_option_override): Reinstate default
3148 integer-emitting targetm.asm_out pseudos when dumping detailed
3150 (mmix_assemble_integer): Update comment.
3152 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
3156 * config/i386/cpuid.h: Add include guard.
3159 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
3162 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
3164 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
3167 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
3168 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
3169 (define_attr "enabled"): Handle p9.
3171 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
3173 * function.c (assign_parm_setup_block): Use the macro
3174 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
3175 targetm.truly_noop_truncation directly.
3177 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
3181 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
3182 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
3183 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
3184 VF1_AVX512ER_128_256.
3186 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3188 * doc/sourcebuild.texi (dg-set-compiler-env-var,
3189 dg-set-target-env-var): Document.
3191 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3193 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
3195 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3197 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
3200 2020-07-17 Tamar Christina <tamar.christina@arm.com>
3202 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
3203 (parse_field): Use std::string.
3204 (split_words, readline, find_field): New.
3205 (host_detect_local_cpu): Fix truncation issues.
3207 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
3209 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
3210 (ELFOSABI_AMDGPU_HSA): Likewise.
3211 (ELFABIVERSION_AMDGPU_HSA): Likewise.
3212 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
3213 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
3214 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
3217 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3218 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3221 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
3222 (aarch64_expand_vec_perm_const_1): Call it.
3223 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
3224 public, and add a "@" prefix.
3226 2020-07-17 Andrew Pinski <apinksi@marvell.com>
3227 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
3230 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
3231 (aarch64_expand_vec_perm_const_1): Call it.
3233 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
3235 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
3236 Add new field flags.
3237 (VAR1): Add new field FLAG in macro.
3253 (aarch64_general_fold_builtin): Likewise.
3254 (aarch64_general_gimple_fold_builtin): Likewise.
3255 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
3256 each built-in function.
3257 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
3259 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
3262 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
3263 expanders to generate the pattern.
3264 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
3265 '*' to have callable expanders.
3267 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
3268 Segher Boessenkool <segher@kernel.crashing.org>
3271 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
3274 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
3277 * config/i386/sync.md
3278 (peephole2 to remove unneded compare after CMPXCHG):
3279 New pattern, also handle XOR zeroing and load of -1 by OR.
3281 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
3283 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
3284 (ix86_adjust_stack_and_probe): Delete.
3285 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
3286 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
3287 a small dope beyond SIZE bytes.
3288 (ix86_emit_probe_stack_range): Use local variable.
3289 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
3290 and tidy up the stack checking code.
3291 * explow.c (get_stack_check_protect): Fix head comment.
3292 (anti_adjust_stack_and_probe_stack_clash): Likewise.
3293 (allocate_dynamic_stack_space): Add comment.
3294 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
3295 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
3297 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
3299 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
3300 (EM_AMDGPU): New macro.
3301 (ELFOSABI_AMDGPU_HSA): New macro.
3302 (ELFABIVERSION_AMDGPU_HSA): New macro.
3303 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
3304 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
3305 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
3306 (R_AMDGPU_NONE): New macro.
3307 (R_AMDGPU_ABS32_LO): New macro.
3308 (R_AMDGPU_ABS32_HI): New macro.
3309 (R_AMDGPU_ABS64): New macro.
3310 (R_AMDGPU_REL32): New macro.
3311 (R_AMDGPU_REL64): New macro.
3312 (R_AMDGPU_ABS32): New macro.
3313 (R_AMDGPU_GOTPCREL): New macro.
3314 (R_AMDGPU_GOTPCREL32_LO): New macro.
3315 (R_AMDGPU_GOTPCREL32_HI): New macro.
3316 (R_AMDGPU_REL32_LO): New macro.
3317 (R_AMDGPU_REL32_HI): New macro.
3318 (reserved): New macro.
3319 (R_AMDGPU_RELATIVE64): New macro.
3320 (gcn_s1_name): Delete global variable.
3321 (gcn_s2_name): Delete global variable.
3322 (gcn_o_name): Delete global variable.
3323 (gcn_cfile_name): Delete global variable.
3324 (files_to_cleanup): New global variable.
3325 (offload_abi): New global variable.
3326 (tool_cleanup): Use files_to_cleanup, not explicit list.
3327 (copy_early_debug_info): New function.
3328 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
3330 Create files_to_cleanup obstack.
3331 Recognize -march options.
3332 Copy early debug info from input .o files.
3334 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
3336 * Makefile.in (TAGS): Remove 'params.def'.
3338 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
3340 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
3341 targets that return false, indicating SUBREGs shouldn't be
3342 used, also need to provide a trunc?i?i2 optab that performs this
3344 * doc/tm.texi: Regenerate.
3346 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
3349 * config/i386/sync.md
3350 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
3352 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3355 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
3356 member to first_inner_iterations, adjust comment.
3357 * omp-general.c (omp_extract_for_data): Adjust for the above change.
3358 Always use n1first and n2first to compute it, rather than depending
3359 on single_nonrect_cond_code. Similarly, always compute factor
3360 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
3361 depending on single_nonrect_cond_code.
3362 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
3363 to first_inner_iterations and min_inner_iterationsd to
3364 first_inner_iterationsd.
3366 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3369 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
3370 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
3371 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
3372 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
3373 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
3374 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
3375 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
3376 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
3377 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
3378 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
3379 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
3380 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
3381 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
3382 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
3383 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
3384 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
3385 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
3388 2020-07-15 Jakub Jelinek <jakub@redhat.com>
3391 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
3393 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
3394 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
3397 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
3399 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
3401 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
3403 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
3405 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
3406 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
3408 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
3410 PR preprocessor/49973
3412 * common.opt: Handle -ftabstop here instead of in c-family
3413 options. Add -fdiagnostics-column-unit= and
3414 -fdiagnostics-column-origin= options.
3415 * opts.c (common_handle_option): Handle the new options.
3416 * diagnostic-format-json.cc (json_from_expanded_location): Add
3417 diagnostic_context argument. Use it to convert column numbers as per
3419 (json_from_location_range): Likewise.
3420 (json_from_fixit_hint): Likewise.
3421 (json_end_diagnostic): Pass the new context argument to helper
3422 functions above. Add "column-origin" field to the output.
3423 (test_unknown_location): Add the new context argument to calls to
3425 (test_bad_endpoints): Likewise.
3426 * diagnostic-show-locus.c
3427 (exploc_with_display_col::exploc_with_display_col): Support
3429 (layout_point::layout_point): Make use of class
3430 exploc_with_display_col.
3431 (layout_range::layout_range): Likewise.
3432 (struct line_bounds): Clarify that the units are now always
3433 display columns. Rename members accordingly. Add constructor.
3434 (layout::print_source_line): Add support for tab expansion.
3435 (make_range): Adapt to class layout_range changes.
3436 (layout::maybe_add_location_range): Likewise.
3437 (layout::layout): Adapt to class exploc_with_display_col changes.
3438 (layout::calculate_x_offset_display): Support tabstop parameter.
3439 (layout::print_annotation_line): Adapt to struct line_bounds changes.
3440 (layout::print_line): Likewise.
3441 (line_label::line_label): Add diagnostic_context argument.
3442 (get_affected_range): Likewise.
3443 (get_printed_columns): Likewise.
3444 (layout::print_any_labels): Adapt to struct line_label changes.
3445 (class correction): Add m_tabstop member.
3446 (correction::correction): Add tabstop argument.
3447 (correction::compute_display_cols): Use m_tabstop.
3448 (class line_corrections): Add m_context member.
3449 (line_corrections::line_corrections): Add diagnostic_context argument.
3450 (line_corrections::add_hint): Use m_context to handle tabstops.
3451 (layout::print_trailing_fixits): Adapt to class line_corrections
3453 (test_layout_x_offset_display_utf8): Support tabstop parameter.
3454 (test_layout_x_offset_display_tab): New selftest.
3455 (test_one_liner_colorized_utf8): Likewise.
3456 (test_tab_expansion): Likewise.
3457 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
3458 (diagnostic_show_locus_c_tests): Likewise.
3459 (test_overlapped_fixit_printing): Adapt to helper class and
3461 (test_overlapped_fixit_printing_utf8): Likewise.
3462 (test_overlapped_fixit_printing_2): Likewise.
3463 * diagnostic.h (enum diagnostics_column_unit): New enum.
3464 (struct diagnostic_context): Add members for the new options.
3465 (diagnostic_converted_column): Declare.
3466 (json_from_expanded_location): Add new context argument.
3467 * diagnostic.c (diagnostic_initialize): Initialize new members.
3468 (diagnostic_converted_column): New function.
3469 (maybe_line_and_column): Be willing to output a column of 0.
3470 (diagnostic_get_location_text): Convert column number as per the new
3472 (diagnostic_report_current_module): Likewise.
3473 (assert_location_text): Add origin and column_unit arguments for
3474 testing the new functionality.
3475 (test_diagnostic_get_location_text): Test the new functionality.
3476 * doc/invoke.texi: Document the new options and behavior.
3477 * input.h (location_compute_display_column): Add tabstop argument.
3478 * input.c (location_compute_display_column): Likewise.
3479 (test_cpp_utf8): Add selftests for tab expansion.
3480 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
3481 new context argument to json_from_expanded_location().
3483 2020-07-14 Jakub Jelinek <jakub@redhat.com>
3486 * expr.c (expand_constructor): Don't create temporary for store to
3487 volatile MEM if exp has an addressable type.
3489 2020-07-14 Nathan Sidwell <nathan@acm.org>
3491 * hash-map.h (hash_map::get): Note it is a pointer to value.
3492 * incpath.h (incpath_kind): Align comments.
3494 2020-07-14 Nathan Sidwell <nathan@acm.org>
3496 * tree-core.h (tree_decl_with_vis, tree_function_decl):
3497 Note additional padding on 64-bits
3498 * tree.c (cache_integer_cst): Note why no caching of enum literals.
3499 (get_tree_code_name): Robustify error case.
3501 2020-07-14 Nathan Sidwell <nathan@acm.org>
3503 * doc/gty.texi: Fic gt_cleare_cache name.
3504 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
3506 2020-07-14 Jakub Jelinek <jakub@redhat.com>
3508 * omp-general.h (struct omp_for_data): Add adjn1 member.
3509 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
3510 count computing if n1, n2 or step are not INTEGER_CST earlier.
3511 Narrow the outer iterator range if needed so that non-rect loop
3512 has at least one iteration for each outer range iteration. Compute
3514 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
3515 instead of the outer loop's n1.
3517 2020-07-14 Matthias Klose <doko@ubuntu.com>
3520 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
3521 error on different values for -fcf-protection.
3522 (append_compiler_options): Pass -fcf-protection option.
3523 (find_and_merge_options): Add decoded options as parameter,
3524 pass decoded_options to merge_and_complain.
3525 (run_gcc): Pass decoded options to find_and_merge_options.
3526 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
3528 2020-07-13 Alan Modra <amodra@gmail.com>
3530 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
3531 and sibcall_local64.
3532 (sibcall_value_local): Similarly.
3534 2020-07-13 Nathan Sidwell <nathan@acm.org>
3536 * Makefile.in (distclean): Remove long gone cxxmain.c
3538 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
3541 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
3542 length to cmpstrnqi patterns.
3544 2020-07-13 Jakub Jelinek <jakub@redhat.com>
3547 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
3550 2020-07-13 Richard Biener <rguenther@suse.de>
3552 PR tree-optimization/96163
3553 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
3554 at least after region begin.
3556 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3558 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
3559 __ARM_FEATURE_PAC_DEFAULT support.
3561 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3564 * doc/extend.texi: Update the text for __builtin_return_address.
3566 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3569 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
3570 Disable return address signing if __builtin_eh_return is used.
3572 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
3576 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
3577 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
3578 (aarch64_return_addr): Use aarch64_return_addr_rtx.
3579 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
3581 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
3584 * tree.h (virtual_method_call_p): Add a default-false parameter
3585 that indicates whether the function is being called from dump
3587 (obj_type_ref_class): Likewise.
3588 * tree.c (virtual_method_call_p): Likewise.
3589 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
3590 type information for the type when the parameter is false.
3591 * tree-pretty-print.c (dump_generic_node): Update calls to
3592 virtual_method_call_p and obj_type_ref_class accordingly.
3594 2020-07-13 Julian Brown <julian@codesourcery.com>
3595 Thomas Schwinge <thomas@codesourcery.com>
3597 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
3598 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
3599 directives (see also PR92929).
3601 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
3603 * convert.c (convert_to_integer_1): Narrow integer operations
3604 even on targets that require explicit truncation instructions.
3606 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3609 * config/cris/cris-passes.def: New file.
3610 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
3611 * config/cris/cris.c: Add infrastructure bits and pass execute
3612 function cris_postdbr_cmpelim.
3613 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
3615 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3617 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
3619 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3622 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
3623 ("*addi_b_<mode>"): New pattern.
3624 ("*addsi3<setnz>"): Remove stale %-related comment.
3626 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
3628 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
3629 Use match_dup in output template, not match_operand.
3631 2020-07-13 Richard Biener <rguenther@suse.de>
3633 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
3634 (vt_find_locations): Eliminate visited bitmap in favor of
3635 RPO order check. Dump statistics about the number of
3636 local BB dataflow computes.
3638 2020-07-13 Richard Biener <rguenther@suse.de>
3641 * expr.c (expand_constructor): Make a temporary also if we're
3642 storing to volatile memory.
3644 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
3646 * config/rs6000/rs6000.md (rotl_unspec): New
3647 define_insn_and_split.
3649 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
3651 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
3652 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
3654 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
3656 * internal-fn.c (expand_mul_overflow): When checking for signed
3657 overflow from a widening multiplication, we access the truncated
3658 lowpart RES twice, so keep this value in a pseudo register.
3660 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
3662 PR tree-optimization/96146
3663 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
3664 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
3665 involving POLY_INT_CSTs.
3667 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
3670 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
3671 create named section for VAR_DECL or FUNCTION_DECL.
3673 2020-07-10 Joseph Myers <joseph@codesourcery.com>
3675 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
3678 2020-07-10 Alexander Popov <alex.popov@linux.com>
3680 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
3682 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
3685 * expr.c (expand_expr_real_2): When reducing bit fields,
3686 clear the target if it has a different mode from the expression.
3687 (reduce_to_bit_field_precision): Don't do that here. Instead
3688 assert that the target already has the correct mode.
3690 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
3694 * config/arm/arm.c (arm_attribute_table): Add
3695 "Advanced SIMD type".
3696 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
3697 attributes are equal.
3698 * config/arm/arm-builtins.c: Include stringpool.h and
3700 (arm_mangle_builtin_vector_type): Use the mangling recorded
3701 in the "Advanced SIMD type" attribute.
3702 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
3703 attribute to each Advanced SIMD type, using the mangled type
3704 as the attribute's single argument.
3706 2020-07-10 Carl Love <cel@us.ibm.com>
3708 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
3709 (VSX_MM4): New define_mode_iterator.
3710 (vec_mtvsrbmi): New define_insn.
3711 (vec_mtvsr_<mode>): New define_insn.
3712 (vec_cntmb_<mode>): New define_insn.
3713 (vec_extract_<mode>): New define_insn.
3714 (vec_expand_<mode>): New define_insn.
3715 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
3716 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
3717 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
3718 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
3720 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
3721 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
3722 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
3723 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
3724 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
3725 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
3726 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
3727 (BU_P10_OVERLOAD_2): Add defition for cntm.
3728 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
3729 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
3730 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
3731 (altivec_overloaded_builtins): Add overloaded argument entries for
3732 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
3733 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
3734 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
3735 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
3736 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
3737 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
3738 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
3739 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
3740 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
3741 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
3742 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
3743 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
3744 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
3745 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
3746 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
3747 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
3748 P10_BUILTIN_VEXPANDMQ.
3749 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
3750 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
3751 VEXPANDM, VEXTRACTM.
3753 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
3756 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
3757 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
3758 v16qi_ftype_pcvoid with correct number of parameters.
3760 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
3763 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
3764 TARGET_AVX512VL when enabling FMA.
3766 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
3767 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
3768 Iain Apreotesei <iain.apreotesei@arm.com>
3770 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
3772 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
3773 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
3774 (arm_target_insn_ok_for_lob): New function.
3775 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
3776 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
3777 (dls_insn): Add new patterns.
3778 (doloop_end): Modify to select LR when LOB is available.
3779 * config/arm/unspecs.md: Add new unspec.
3780 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
3781 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
3784 2020-07-10 Richard Biener <rguenther@suse.de>
3786 PR tree-optimization/96133
3787 * gimple-fold.c (fold_array_ctor_reference): Do not
3788 recurse to folding a CTOR that does not fully cover the
3791 2020-07-10 Cui,Lili <lili.cui@intel.com>
3793 * common/config/i386/cpuinfo.h
3794 (get_intel_cpu): Handle sapphirerapids.
3795 * common/config/i386/i386-common.c
3796 (processor_names): Add sapphirerapids and alderlake.
3797 (processor_alias_table): Add sapphirerapids and alderlake.
3798 * common/config/i386/i386-cpuinfo.h
3799 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
3800 INTEL_COREI7_ALDERLAKE.
3801 * config.gcc: Add -march=sapphirerapids and alderlake.
3802 * config/i386/driver-i386.c
3803 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
3804 * config/i386/i386-c.c
3805 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
3806 * config/i386/i386-options.c
3807 (m_SAPPHIRERAPIDS) : Define.
3808 (m_ALDERLAKE): Ditto.
3809 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
3810 (processor_cost_table): Add sapphirerapids and alderlake.
3811 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
3812 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
3813 * config/i386/i386.h
3814 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
3815 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
3816 PROCESSOR_ALDERLAKE.
3818 (PTA_CLDEMOTE): Ditto.
3819 (PTA_SERIALIZE): Ditto.
3820 (PTA_TSXLDTRK): New.
3821 (PTA_SAPPHIRERAPIDS): Ditto.
3822 (PTA_ALDERLAKE): Ditto.
3823 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
3824 PROCESSOR_ALDERLAKE.
3825 * doc/extend.texi: Add sapphirerapids and alderlake.
3826 * doc/invoke.texi: Add sapphirerapids and alderlake.
3828 2020-07-10 Martin Liska <mliska@suse.cz>
3830 * dumpfile.c [profile-report]: Add new profile dump.
3831 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
3832 * passes.c (pass_manager::dump_profile_report): Change stderr
3835 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
3837 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
3838 is adjusted by considering peeled prologue for non
3839 vect_use_loop_mask_for_alignment_p cases.
3841 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
3844 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
3845 specific types __vector_quad and __vector_pair, and initialize the
3846 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
3847 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
3848 Remove now unneeded mask variable.
3849 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
3850 OPTION_MASK_MMA flag for power10 if not already set.
3852 2020-07-09 Richard Biener <rguenther@suse.de>
3854 PR tree-optimization/96133
3855 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
3856 status between stmts.
3858 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
3861 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
3862 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
3863 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
3864 (rsqrtv16sf2): Removed.
3866 2020-07-09 Richard Biener <rguenther@suse.de>
3868 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
3869 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
3870 (vect_slp_analyze_instance_alignment): ... this.
3871 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
3872 (vect_verify_datarefs_alignment): Likewise.
3873 (vect_enhance_data_refs_alignment): Do not call
3874 vect_verify_datarefs_alignment.
3875 (vect_slp_analyze_node_alignment): Rename from
3876 vect_slp_analyze_and_verify_node_alignment and do not
3877 call verify_data_ref_alignment.
3878 (vect_slp_analyze_instance_alignment): Rename from
3879 vect_slp_analyze_and_verify_instance_alignment.
3880 * tree-vect-stmts.c (vectorizable_store): Dump when
3881 we vectorize an unaligned access.
3882 (vectorizable_load): Likewise.
3883 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
3884 vect_verify_datarefs_alignment.
3885 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
3887 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
3889 PR tree-optimization/95804
3890 * tree-loop-distribution.c (break_alias_scc_partitions): Force
3891 negative post order to reduction partition.
3893 2020-07-09 Jakub Jelinek <jakub@redhat.com>
3895 * omp-general.h (struct omp_for_data): Add min_inner_iterations
3897 * omp-general.c (omp_extract_for_data): Initialize them and remember
3898 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
3899 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
3900 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
3901 (expand_omp_for_init_vars): For
3902 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
3903 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
3904 using fallback method when possible.
3906 2020-07-09 Omar Tahir <omar.tahir@arm.com>
3908 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
3909 last_moveable_pseudo before returning.
3911 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
3913 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
3914 __ARM_FEATURE_BTI_DEFAULT support.
3916 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3918 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
3920 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
3921 stub registers class.
3922 (aarch64_class_max_nregs): Likewise.
3923 (aarch64_register_move_cost): Likewise.
3924 (aarch64_sls_shared_thunks): Global array to store stub labels.
3925 (aarch64_sls_emit_function_stub): New.
3926 (aarch64_create_blr_label): New.
3927 (aarch64_sls_emit_blr_function_thunks): New.
3928 (aarch64_sls_emit_shared_blr_thunks): New.
3929 (aarch64_asm_file_end): New.
3930 (aarch64_indirect_call_asm): New.
3931 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
3932 (TARGET_ASM_FUNCTION_EPILOGUE): Use
3933 aarch64_sls_emit_blr_function_thunks.
3934 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
3935 (enum reg_class): Add STUB_REGS class.
3936 (machine_function): Introduce `call_via` array for
3937 function-local stub labels.
3938 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
3939 aarch64_indirect_call_asm to emit code when hardening BLR
3941 * config/aarch64/constraints.md (Ucr): New constraint
3942 representing registers for indirect calls. Is GENERAL_REGS
3943 usually, and STUB_REGS when hardening BLR instruction against
3945 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
3946 is also a general register.
3948 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3950 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
3951 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
3952 speculation barrier after BR instruction if needs be.
3953 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
3955 (aarch64_sls_barrier): New.
3956 (aarch64_asm_trampoline_template): Add needed barriers.
3957 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
3959 (TRAMPOLINE_SIZE): Account for barrier.
3960 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
3961 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
3962 Emit barrier if needs be, also account for possible barrier using
3963 "sls_length" attribute.
3964 (sls_length): New attribute.
3965 (length): Determine default using any non-default sls_length
3968 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
3970 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
3972 (aarch64_harden_sls_blr_p): New.
3973 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
3975 (aarch64_harden_sls_retbr_p): New.
3976 (aarch64_harden_sls_blr_p): New.
3977 (aarch64_validate_sls_mitigation): New.
3978 (aarch64_override_options): Parse options for SLS mitigation.
3979 * config/aarch64/aarch64.opt (-mharden-sls): New option.
3980 * doc/invoke.texi: Document new option.
3982 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
3984 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
3985 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
3986 or nested-cycle reduction.
3988 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
3990 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
3991 for fully masking to be more common.
3993 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
3995 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
3997 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
3998 Document __builtin_thread_pointer.
4000 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
4002 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
4003 Abort if any arguments on stack.
4005 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
4007 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
4008 either type has reverse scalar storage order.
4009 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
4010 a memory copy if either type has reverse scalar storage order.
4012 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
4014 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
4015 on to the native compiler, if used.
4016 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
4018 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
4020 * config/rs6000/altivec.h (vec_vmsumudm): New define.
4021 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
4022 (altivec_vmsumudm): New define_insn.
4023 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
4024 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
4025 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
4026 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
4027 * doc/extend.texi: Add document for vmsumudm behind vmsum.
4029 2020-07-08 Richard Biener <rguenther@suse.de>
4031 * tree-vect-stmts.c (get_group_load_store_type): Pass
4032 in the SLP node and the alignment support scheme output.
4034 (get_load_store_type): Likewise.
4035 (vectorizable_store): Adjust.
4036 (vectorizable_load): Likewise.
4038 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
4041 * expr.c (expand_expr_real_2): Get the mode from the type rather
4042 than the rtx, and assert that it is consistent with the mode of
4043 the rtx (where known). Optimize all constant integers, not just
4044 those that can be represented in poly_int64.
4046 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4048 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
4049 (len_store_v16qi): Likewise.
4051 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
4053 * doc/md.texi (len_load_@var{m}): Document.
4054 (len_store_@var{m}): Likewise.
4055 * internal-fn.c (len_load_direct): New macro.
4056 (len_store_direct): Likewise.
4057 (expand_len_load_optab_fn): Likewise.
4058 (expand_len_store_optab_fn): Likewise.
4059 (direct_len_load_optab_supported_p): Likewise.
4060 (direct_len_store_optab_supported_p): Likewise.
4061 (expand_mask_load_optab_fn): New macro. Original renamed to ...
4062 (expand_partial_load_optab_fn): ... here. Add handlings for
4064 (expand_mask_store_optab_fn): New macro. Original renamed to ...
4065 (expand_partial_store_optab_fn): ... here. Add handlings for
4067 (internal_load_fn_p): Handle IFN_LEN_LOAD.
4068 (internal_store_fn_p): Handle IFN_LEN_STORE.
4069 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
4070 * internal-fn.def (LEN_LOAD): New internal function.
4071 (LEN_STORE): Likewise.
4072 * optabs.def (len_load_optab, len_store_optab): New optab.
4074 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
4076 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
4077 thunderx2t99_vector_cost): Likewise.
4079 2020-07-07 Richard Biener <rguenther@suse.de>
4081 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
4082 group overlap condition to allow negative step DR groups.
4083 * tree-vect-stmts.c (get_group_load_store_type): For
4084 multi element SLP groups force VMAT_STRIDED_SLP when the step
4087 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
4089 * doc/generic.texi: Fix typo.
4091 2020-07-07 Richard Biener <rguenther@suse.de>
4093 * lto-streamer-out.c (cmp_symbol_files): Use the computed
4094 order map to sort symbols from the same sub-file together.
4095 (lto_output): Compute a map of sub-file to an order number
4096 it appears in the symbol output array.
4098 2020-07-06 Richard Biener <rguenther@suse.de>
4100 PR tree-optimization/96075
4101 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
4102 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
4103 for the misalignment calculation for negative step.
4105 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
4107 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
4108 (*vsub_addsi4): New instruction.
4110 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4112 * config/cris/cris.md (movulsr): New peephole2.
4114 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
4116 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
4117 Correct gcc_assert of overlapping operands.
4119 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4121 * config/cris/cris.c (cris_select_cc_mode): Always return
4122 CC_NZmode for matching comparisons. Clarify comments.
4123 * config/cris/cris-modes.def: Clarify mode comment.
4124 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
4126 (addsub, addsubbo, nd): New code iterator attributes.
4127 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
4128 iterator constructs instead of match_operator constructs.
4129 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
4130 "*extop<mode>si<setnz>".
4131 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
4132 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
4133 "*extop<mode>si<setnz>_swap".
4135 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
4137 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
4138 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
4140 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
4142 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
4143 were initially created for the assignment of a variable-sized
4144 object and whose source is now a string constant.
4145 * gimple-ssa-store-merging.c (struct merged_store_group): Document
4146 STRING_CST for rhs_code field.
4147 Add string_concatenation boolean field.
4148 (merged_store_group::merged_store_group): Initialize it as well as
4150 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
4151 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
4152 (merged_store_group::apply_stores): Clear it for small regions.
4153 Do not create a power-of-2-sized buffer if it is still true.
4154 And do not set bit_insertion here again.
4155 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
4156 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
4157 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
4158 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
4159 (count_multiple_uses): Return 0 for STRING_CST.
4160 (split_group): Do not split the group for a string concatenation.
4161 (imm_store_chain_info::output_merged_store): Constify and rename
4162 some local variables. Build an array type as destination type
4163 for a string concatenation, as well as a zero mask, and call
4164 build_string to build the source.
4165 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
4166 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
4167 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
4168 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
4169 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
4171 2020-07-03 Martin Jambor <mjambor@suse.cz>
4174 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
4175 mismatched accesses.
4177 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4179 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
4180 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
4182 2020-07-03 Martin Liska <mliska@suse.cz>
4183 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4186 * gcov-dump.c (tag_function): Use gcov_position_t
4189 2020-07-03 Richard Biener <rguenther@suse.de>
4191 PR tree-optimization/96037
4192 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
4194 2020-07-03 Richard Biener <rguenther@suse.de>
4196 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
4197 original non-pattern stmts, look at the pattern stmt
4198 vectorization status.
4200 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
4202 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
4204 2020-07-03 Richard Biener <rguenther@suse.de>
4206 * tree-vectorizer.h (vec_info::insert_on_entry): New.
4207 (vec_info::insert_seq_on_entry): Likewise.
4208 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
4209 (vec_info::insert_seq_on_entry): Likewise.
4210 * tree-vect-stmts.c (vect_init_vector_1): Use
4211 vec_info::insert_on_entry.
4212 (vect_finish_stmt_generation): Set modified bit after
4214 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
4215 by using vec_info::insert_seq_on_entry and bypassing
4217 (vect_schedule_slp_instance): Deal with all-constant
4220 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
4221 Tom de Vries <tdevries@suse.de>
4224 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
4225 to access TYPE_SIZE (type). Return at least the mode's alignment.
4227 2020-07-02 Richard Biener <rguenther@suse.de>
4229 PR tree-optimization/96028
4230 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
4231 we have scalar stmts to use.
4232 (vect_slp_analyze_node_operations): When analyzing a child
4233 failed try externalizing the parent node.
4235 2020-07-02 Martin Jambor <mjambor@suse.cz>
4238 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
4239 argument index if necessary.
4241 2020-07-02 Martin Liska <mliska@suse.cz>
4244 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
4245 (expand_vector_comparison): Do not expand a comparison if all
4246 uses are consumed by a VEC_COND_EXPR.
4247 (expand_vector_operation): Change void return type to bool.
4248 (expand_vector_operations_1): Pass dce_ssa_names.
4250 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
4253 * system.h (NULL): Redefine to nullptr.
4255 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4257 PR tree-optimization/95857
4258 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
4259 base_bb, remember all forced and non-local labels on it and later
4260 treat those as if they have NULL label_to_block. Formatting fix.
4263 2020-07-02 Richard Biener <rguenther@suse.de>
4265 PR tree-optimization/96022
4266 * tree-vect-stmts.c (vectorizable_shift): Only use the
4267 first vector stmt when extracting the scalar shift amount.
4268 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
4269 nodes with all-scalar children from scalars but not stores.
4270 (vect_analyze_slp_instance): Mark the node not failed.
4272 2020-07-02 Felix Yang <felix.yang@huawei.com>
4274 PR tree-optimization/95961
4275 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
4276 number of scalars instead of the number of vectors as an upper bound
4277 for the loop saving info about DR in the hash table. Remove unused
4280 2020-07-02 Jakub Jelinek <jakub@redhat.com>
4282 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
4283 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
4284 OpenMP non-rectangular loops. Use XALLOCAVEC.
4286 2020-07-02 Martin Liska <mliska@suse.cz>
4288 PR gcov-profile/95348
4289 * coverage.c (read_counts_file): Read only COUNTERS that are
4291 * gcov-dump.c (tag_function): Change signature from unsigned to
4293 (tag_blocks): Likewise.
4294 (tag_arcs): Likewise.
4295 (tag_lines): Likewise.
4296 (tag_counters): Likewise.
4297 (tag_summary): Likewise.
4298 * gcov.c (read_count_file): Read all non-zero counters
4301 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
4303 * config/riscv/multilib-generator (arch_canonicalize): Handle
4304 multi-letter extension.
4305 Using underline as separator between different extensions.
4307 2020-07-01 Pip Cet <pipcet@gmail.com>
4309 * spellcheck.c (test_data): Add problematic strings.
4310 (test_metric_conditions): Don't test the triangle inequality
4311 condition, which our distance function does not satisfy.
4313 2020-07-01 Omar Tahir <omar.tahir@arm.com>
4315 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
4316 generate a BTI instruction.
4318 2020-07-01 Jeff Law <law@redhat.com>
4320 PR tree-optimization/94882
4321 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
4323 2020-07-01 Jeff Law <law@redhat.com>
4325 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
4326 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
4328 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
4330 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
4331 for 64bits fpsr/fpcr getter setters builtin variants.
4332 (aarch64_init_fpsr_fpcr_builtins): New function.
4333 (aarch64_general_init_builtins): Modify to make use of the later.
4334 (aarch64_expand_fpsr_fpcr_setter): New function.
4335 (aarch64_general_expand_builtin): Modify to make use of the later.
4336 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
4337 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
4338 generalizing 'get_fpcr', 'set_fpsr'.
4339 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
4341 (fpscr_name): New int attribute.
4342 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
4343 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
4344 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
4347 2020-07-01 Martin Liska <mliska@suse.cz>
4349 * gcov.c (print_usage): Avoid trailing space for -j option.
4351 2020-07-01 Richard Biener <rguenther@suse.de>
4353 PR tree-optimization/95839
4354 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
4355 vectors are not uniform.
4356 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
4358 (vect_build_slp_tree_2): For groups of lane extracts
4359 from a vector register generate a permute node
4360 with a special child representing the pre-existing vector.
4361 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
4362 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
4363 (vectorizable_slp_permutation): Do not generate or cost identity
4365 (vect_schedule_slp_instance): Handle pre-existing vector
4366 that are function arguments.
4368 2020-07-01 Richard Biener <rguenther@suse.de>
4370 * system.h (INCLUDE_ISL): New guarded include.
4371 * graphite-dependences.c: Use it.
4372 * graphite-isl-ast-to-gimple.c: Likewise.
4373 * graphite-optimize-isl.c: Likewise.
4374 * graphite-poly.c: Likewise.
4375 * graphite-scop-detection.c: Likewise.
4376 * graphite-sese-to-poly.c: Likewise.
4377 * graphite.c: Likewise.
4378 * graphite.h: Drop the includes here.
4380 2020-07-01 Martin Liska <mliska@suse.cz>
4382 * gcov.c (print_usage): Shorted option description for -j
4385 2020-07-01 Martin Liska <mliska@suse.cz>
4387 * doc/gcov.texi: Rename 2 options.
4388 * gcov.c (print_usage): Rename -i,--json-format to
4389 -j,--json-format and -j,--human-readable to -H,--human-readable.
4390 (process_args): Fix up parsing. Document obsolete options and
4391 how are they changed.
4393 2020-07-01 Jeff Law <law@redhat.com>
4395 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
4396 (pa_output_ascii): Likewise.
4398 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
4400 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
4402 (riscv_subset_list::parsing_subset_version): Add parameter for
4403 indicate explicitly version, and handle explicitly version.
4404 (riscv_subset_list::handle_implied_ext): Ditto.
4405 (riscv_subset_list::add): Ditto.
4406 (riscv_subset_t::riscv_subset_t): Init new field.
4407 (riscv_subset_list::to_string): Always output version info if version
4408 explicitly specified.
4409 (riscv_subset_list::parsing_subset_version): Handle explicitly
4411 (riscv_subset_list::parse_std_ext): Ditto.
4412 (riscv_subset_list::parse_multiletter_ext): Ditto.
4414 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
4418 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
4419 "Advanced SIMD type".
4420 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
4421 attributes are equal.
4422 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
4424 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
4425 in the "Advanced SIMD type" attribute.
4426 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
4427 attribute to each Advanced SIMD type, using the mangled type
4428 as the attribute's single argument.
4430 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
4433 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
4434 -mgeneral-regs-only is not used.
4436 2020-06-30 Yang Yang <yangyang305@huawei.com>
4438 PR tree-optimization/95855
4439 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
4440 checks to recognize a missed if-conversion opportunity when
4441 judging whether to duplicate a block.
4443 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
4445 * doc/extend.texi: Change references to "future architecture" to
4446 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
4447 references to "future" (because the future is now).
4449 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
4451 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
4453 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
4455 * simplify-rtx.c (simplify_distributive_operation): New function
4456 to un-distribute a binary operation of two binary operations.
4457 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
4458 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
4460 (test_scalar_int_ops): New function for unit self-testing
4461 scalar integer transformations in simplify-rtx.c.
4462 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
4463 (simplify_rtx_c_tests): Call test_scalar_ops.
4465 2020-06-29 Richard Biener <rguenther@suse.de>
4467 PR tree-optimization/95916
4468 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
4469 the case of not vectorized externals.
4471 2020-06-29 Richard Biener <rguenther@suse.de>
4473 * tree-vectorizer.h: Do not include <utility>.
4475 2020-06-29 Martin Liska <mliska@suse.cz>
4477 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
4478 instead of gimple_stmt_iterator::bb.
4479 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
4480 * tree-vectorizer.h: Likewise.
4482 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
4484 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
4485 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
4486 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
4487 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
4488 (gcn_dwarf_register_number): New function.
4489 (gcn_dwarf_register_span): New function.
4490 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
4492 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
4494 PR tree-optimization/95854
4495 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
4496 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
4497 unsigned HOST_WIDE_INT.
4499 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4501 * config/sparc/sparc.c (epilogue_renumber): Remove register.
4502 (sparc_print_operand_address): Likewise.
4503 (sparc_type_code): Likewise.
4504 (set_extends): Likewise.
4506 2020-06-29 Martin Liska <mliska@suse.cz>
4508 PR tree-optimization/92860
4509 * optc-save-gen.awk: Add exceptions for arc target.
4511 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
4513 * doc/sourcebuild.texi: Describe globbing of the
4514 dump file scanning commands "suffix" argument.
4516 2020-06-28 Martin Sebor <msebor@redhat.com>
4519 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
4521 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
4523 * tree.c (get_nonnull_args): Consider the this pointer implicitly
4525 * var-tracking.c (deps_vec): New type.
4526 (var_loc_dep_vec): New function.
4527 (VAR_LOC_DEP_VEC): Use it.
4529 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
4531 * internal-fn.c (direct_mask_load_optab_supported_p): Use
4532 convert_optab_supported_p instead of direct_optab_supported_p.
4533 (direct_mask_store_optab_supported_p): Likewise.
4535 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
4537 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
4538 simplify_using_ranges class.
4539 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
4540 field. Adjust all methods to use new field.
4541 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
4542 simplify_using_ranges class.
4543 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
4544 field. Adjust all methods to use new field.
4545 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
4546 (vrp_prop::vrp_finalize): New vrp_folder argument.
4547 (execute_vrp): Pass folder to vrp_finalize. Use
4548 simplify_using_ranges class.
4549 Remove cleanup_edges_and_switches call.
4550 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
4551 value_range_equiv uses to value_range.
4552 (simplify_using_ranges::op_with_boolean_value_range_p): Use
4553 simplify_using_ranges class.
4554 (check_for_binary_op_overflow): Make static.
4555 (vr_values::extract_range_basic): Pass this to
4556 check_for_binary_op_overflow.
4557 (compare_range_with_value): Change value_range_equiv uses to
4559 (vr_values::vr_values): Initialize simplifier field.
4560 Remove uses of to_remove_edges and to_update_switch_stmts.
4561 (vr_values::~vr_values): Remove uses of to_remove_edges and
4562 to_update_switch_stmts.
4563 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
4565 (vr_values::compare_name_with_value): Same.
4566 (vr_values::compare_names): Same.
4567 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
4568 (vr_values::vrp_evaluate_conditional): Same.
4569 (vr_values::vrp_visit_cond_stmt): Same.
4570 (find_case_label_ranges): Change value_range_equiv uses to
4572 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
4573 (vr_values::simplify_truth_ops_using_ranges): Move to
4574 simplify_using_ranges class.
4575 (vr_values::simplify_div_or_mod_using_ranges): Same.
4576 (vr_values::simplify_min_or_max_using_ranges): Same.
4577 (vr_values::simplify_abs_using_ranges): Same.
4578 (vr_values::simplify_bit_ops_using_ranges): Same.
4579 (test_for_singularity): Change value_range_equiv uses to
4581 (range_fits_type_p): Same.
4582 (vr_values::simplify_cond_using_ranges_1): Same.
4583 (vr_values::simplify_cond_using_ranges_2): Make extern.
4584 (vr_values::fold_cond): Move to simplify_using_ranges class.
4585 (vr_values::simplify_switch_using_ranges): Same.
4586 (vr_values::cleanup_edges_and_switches): Same.
4587 (vr_values::simplify_float_conversion_using_ranges): Same.
4588 (vr_values::simplify_internal_call_using_ranges): Same.
4589 (vr_values::two_valued_val_range_p): Same.
4590 (vr_values::simplify_stmt_using_ranges): Move to...
4591 (simplify_using_ranges::simplify): ...here.
4592 * vr-values.h (class vr_values): Move all the simplification of
4593 statements using ranges methods and code from here...
4594 (class simplify_using_ranges): ...to here.
4595 (simplify_cond_using_ranges_2): New extern prototype.
4597 2020-06-27 Jakub Jelinek <jakub@redhat.com>
4599 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
4600 member, move outer member.
4601 (struct omp_for_data): Add first_nonrect and last_nonrect members.
4602 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
4603 last_nonrect and non_rect_referenced members.
4604 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
4606 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
4607 non-rectangular loops.
4608 (extract_omp_for_update_vars): Likewise.
4609 (expand_omp_for_generic, expand_omp_for_static_nochunk,
4610 expand_omp_for_static_chunk, expand_omp_simd,
4611 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
4612 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
4613 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
4616 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
4619 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
4621 * config/i386/i386.c (ix86_frame_pointer_required): Update
4624 2020-06-26 Yichao Yu <yyc1992@gmail.com>
4626 * multiple_target.c (redirect_to_specific_clone): Fix tests
4627 to check individual attribute rather than an attribute list.
4629 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
4631 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
4632 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
4635 2020-06-26 Marek Polacek <polacek@redhat.com>
4637 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
4638 * doc/standards.texi (C Language): Correct the default dialect.
4639 (C++ Language): Update the default for C++ to gnu++17.
4641 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
4643 * tree-ssa-reassoc.c (dump_range_entry): New function.
4644 (debug_range_entry): New debug function.
4645 (update_range_test): Invoke dump_range_entry for dumping.
4646 (optimize_range_tests_to_bit_test): Merge the entry test in the
4647 bit test when possible and lower the profitability threshold.
4649 2020-06-26 Richard Biener <rguenther@suse.de>
4651 PR tree-optimization/95897
4652 * tree-vectorizer.h (vectorizable_induction): Remove
4653 unused gimple_stmt_iterator * parameter.
4654 * tree-vect-loop.c (vectorizable_induction): Likewise.
4655 (vect_analyze_loop_operations): Adjust.
4656 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
4657 (vect_transform_stmt): Likewise.
4658 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
4659 for fold-left reductions, clarify existing reduction case.
4661 2020-06-25 Nick Clifton <nickc@redhat.com>
4663 * config/m32r/m32r.md (movsicc): Disable pattern.
4665 2020-06-25 Richard Biener <rguenther@suse.de>
4667 PR tree-optimization/95839
4668 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
4669 check on the number of datarefs.
4671 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
4673 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
4674 the insn_data n_operands value to unsigned.
4676 2020-06-25 Richard Biener <rguenther@suse.de>
4678 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
4679 vector defs to determine insertion place.
4681 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
4684 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
4685 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
4686 (PTA_TIGERLAKE): Add PTA_CLWB.
4688 2020-06-25 Richard Biener <rguenther@suse.de>
4690 PR tree-optimization/95866
4691 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
4692 vectorized shift operands. For scalar shifts use lane zero
4693 of a vectorized shift operand.
4695 2020-06-25 Martin Liska <mliska@suse.cz>
4697 PR tree-optimization/95745
4699 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
4700 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
4702 * tree-vect-generic.c (expand_vector_condition): Remove dead
4703 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
4705 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
4708 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
4709 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
4710 (convert_4f32_8f16): New define_expand
4711 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
4713 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
4714 overloaded builtin entry.
4715 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
4716 (vsx_xvcvsphp): New define_insn.
4718 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
4719 Segher Boessenkool <segher@kernel.crashing.org>
4721 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
4723 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
4725 * simplify-rtx.c (simplify_unary_operation_1): Simplify
4726 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
4728 2020-06-24 Richard Biener <rguenther@suse.de>
4730 PR tree-optimization/95866
4731 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
4732 (vect_build_slp_tree_2): Properly reset matches[0],
4733 ignore uniform constants.
4735 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4738 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
4739 (cpu_indicator_init): Likewise.
4740 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
4742 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4745 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
4746 detection with AVX512BF16.
4748 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4751 * common/config/i386/i386-isas.h: New file. Extracted from
4752 gcc/config/i386/i386-builtins.c.
4753 (_isa_names_table): Add option.
4754 (ISA_NAMES_TABLE_START): New.
4755 (ISA_NAMES_TABLE_END): Likewise.
4756 (ISA_NAMES_TABLE_ENTRY): Likewise.
4757 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
4758 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
4759 from enum processor_features.
4760 * config/i386/driver-i386.c: Include
4761 "common/config/i386/cpuinfo.h" and
4762 "common/config/i386/i386-isas.h".
4763 (has_feature): New macro.
4764 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
4765 features. Use has_feature to detect processor features. Call
4766 Call get_intel_cpu to get the newer Intel CPU name. Use
4767 isa_names_table to generate command-line options.
4768 * config/i386/i386-builtins.c: Include
4769 "common/config/i386/i386-isas.h".
4770 (_arch_names_table): Removed.
4771 (isa_names_table): Likewise.
4773 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4776 * common/config/i386/cpuinfo.h: New file.
4777 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
4778 (__processor_model2): New.
4779 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
4780 (has_cpu_feature): New function.
4781 (set_cpu_feature): Likewise.
4782 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
4783 CHECK___builtin_cpu_is. Return AMD CPU name.
4784 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
4785 Use CHECK___builtin_cpu_is. Return Intel CPU name.
4786 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
4787 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
4788 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
4789 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
4790 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
4791 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
4792 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
4793 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
4794 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
4795 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
4796 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
4797 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
4798 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
4799 FEATURE_XSAVEOPT and FEATURE_XSAVES
4800 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
4801 Also update cpu_model2.
4802 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
4803 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
4804 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
4805 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
4806 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
4807 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
4808 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
4809 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
4810 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
4811 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
4812 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
4813 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
4814 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
4815 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
4816 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
4817 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
4818 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
4819 (SIZE_OF_CPU_FEATURES): New.
4820 * config/i386/i386-builtins.c (processor_features): Removed.
4821 (isa_names_table): Replace F_XXX with FEATURE_XXX.
4822 (fold_builtin_cpu): Change __cpu_features2 to an array.
4824 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
4827 * common/config/i386/i386-common.c (processor_alias_table): Add
4828 processor model and priority to each entry.
4829 (pta_size): Updated with -6.
4830 (num_arch_names): New.
4831 * common/config/i386/i386-cpuinfo.h: New file.
4832 * config/i386/i386-builtins.c (feature_priority): Removed.
4833 (processor_model): Likewise.
4834 (_arch_names_table): Likewise.
4835 (arch_names_table): Likewise.
4836 (_isa_names_table): Replace P_ZERO with P_NONE.
4837 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
4838 processor_alias_table.
4839 (fold_builtin_cpu): Replace arch_names_table with
4840 processor_alias_table.
4841 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
4842 (pta): Add model and priority.
4843 (num_arch_names): New.
4845 2020-06-24 Richard Biener <rguenther@suse.de>
4847 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
4849 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
4850 Simplify for new position of vectorized SLP loads.
4851 (vect_slp_analyze_node_dependences): Adjust for it.
4852 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
4853 for the first stmts dataref.
4854 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
4855 (vect_schedule_slp_instance): Emit loads before the
4857 * tree-vect-stmts.c (vectorizable_load): Do what the comment
4858 says and use vect_find_first_scalar_stmt_in_slp.
4860 2020-06-24 Richard Biener <rguenther@suse.de>
4862 PR tree-optimization/95856
4863 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
4866 2020-06-24 Jakub Jelinek <jakub@redhat.com>
4869 * fold-const.c (fold_cond_expr_with_comparison): Optimize
4870 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
4872 2020-06-24 Jakub Jelinek <jakub@redhat.com>
4874 * omp-low.c (lower_omp_for): Fix two pastos.
4876 2020-06-24 Martin Liska <mliska@suse.cz>
4878 * optc-save-gen.awk: Compare string options in cl_optimization_compare
4881 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
4883 * config.gcc: Identify power10 as a 64-bit processor and as valid
4884 for --with-cpu and --with-tune.
4886 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
4888 * Makefile.in (LANG_MAKEFRAGS): Same.
4889 (tmake_file): Use -include.
4892 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
4894 * REVISION: Delete file meant for a private branch.
4896 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
4899 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
4900 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
4902 2020-06-23 Alexandre Oliva <oliva@adacore.com>
4904 * collect-utils.h (dumppfx): New.
4905 * collect-utils.c (dumppfx): Likewise.
4906 * lto-wrapper.c (run_gcc): Set global dumppfx.
4907 (compile_offload_image): Pass a -dumpbase on to mkoffload.
4908 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
4909 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
4911 (compile_native): Pass -dumpbase et al to compiler.
4912 * config/gcn/mkoffload.c (gcn_dumpbase): New.
4913 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
4914 save_temps. Pass -dumpbase et al to offload target compiler.
4915 (compile_native): Pass -dumpbase et al to compiler.
4917 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
4919 * REVISION: New file.
4921 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
4923 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
4924 Update comment for ISA 3.1.
4925 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
4926 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
4927 on AIX, and -mpower10 elsewhere.
4928 * config/rs6000/future.md: Delete.
4929 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
4931 * config/rs6000/power10.md: New file.
4932 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
4933 PPC_PLATFORM_FUTURE.
4934 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
4935 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
4936 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
4937 Use BU_P10_* instead of BU_FUTURE_*.
4938 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
4939 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
4940 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
4941 FUTURE_BUILTIN_VEC_XXEVAL.
4942 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
4943 Update compiler messages.
4944 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
4945 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
4946 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
4948 * config/rs6000/rs6000-string.c: Ditto.
4949 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
4950 instead of "future", reorder it to right after "power9".
4951 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
4952 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
4953 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
4954 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
4955 not ISA_FUTURE_MASKS_SERVER.
4956 (rs6000_opt_masks): Use "power10" instead of "future".
4957 (rs6000_builtin_mask_names): Ditto.
4958 (rs6000_disable_incompatible_switches): Ditto.
4959 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
4960 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
4961 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
4962 not RS6000_BTM_FUTURE.
4963 * config/rs6000/rs6000.md: Use "power10", not "future". Use
4964 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
4966 * config/rs6000/rs6000.opt (mfuture): Delete.
4968 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
4969 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
4971 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
4973 * coretypes.h (first_type): Delete.
4974 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
4976 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4978 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
4979 (arm_mve_hw): Likewise.
4981 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
4984 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
4987 2020-06-22 Richard Biener <rguenther@suse.de>
4989 PR tree-optimization/95770
4990 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
4993 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
4995 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
4996 (gcn_return_in_memory): Return vectors in memory.
4998 2020-06-22 Jakub Jelinek <jakub@redhat.com>
5000 * omp-general.c (omp_extract_for_data): For triangular loops with
5001 all loop invariant expressions constant where the innermost loop is
5002 executed at least once compute number of iterations at compile time.
5004 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5006 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
5007 (DRIVER_SELF_SPECS): New.
5009 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
5011 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
5012 (RISCV_FTYPE_ATYPES0): New.
5013 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
5014 * config/riscv/riscv-ftypes.def: Remove VOID argument.
5016 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
5018 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
5019 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
5022 (ASM_CPU_SPEC): Remove vsx and altivec options.
5023 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
5026 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
5027 (TARGET_DEFAULT): Only define if not BIARCH.
5028 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
5031 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
5034 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
5035 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
5037 (CPLUSPLUS_CPP_SPEC): Same.
5040 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
5041 * config/rs6000/defaultaix64.h: New file.
5042 * config/rs6000/t-aix64: New file.
5044 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5046 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
5047 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
5048 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
5050 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
5051 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
5052 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
5053 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
5054 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
5055 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
5056 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
5057 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
5058 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
5059 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
5060 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
5061 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
5062 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
5063 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
5064 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
5065 Allow zero constants.
5066 (print_operand) <case 'A'>: New output modifier.
5067 (rs6000_split_multireg_move): Add support for inserting accumulator
5068 priming and depriming instructions. Add support for splitting an
5069 assemble accumulator pattern.
5070 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
5071 rs6000_gimple_fold_mma_builtin): New functions.
5072 (RS6000_BUILTIN_M): New macro.
5073 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
5074 (bdesc_mma): Add new MMA built-in support.
5075 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
5076 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
5078 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
5079 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
5080 and rs6000_gimple_fold_mma_builtin.
5081 (rs6000_expand_builtin): Call mma_expand_builtin.
5082 Use RS6000_BTC_OPND_MASK.
5083 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
5084 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
5085 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
5086 VSX_BUILTIN_XVCVBF16SP.
5087 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
5088 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
5089 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
5090 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
5091 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
5092 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
5093 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
5094 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
5095 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
5096 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
5097 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
5098 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
5099 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
5100 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
5101 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
5102 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
5103 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
5104 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
5105 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
5106 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
5107 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
5108 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
5109 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
5110 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
5111 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
5112 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
5113 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
5114 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
5115 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
5116 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
5117 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
5118 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
5119 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
5120 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
5121 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
5122 MMA_AVVI4I4I4): New define_int_iterator.
5123 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
5124 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
5125 avvi4i4i4): New define_int_attr.
5126 (*movpxi): Add zero constant alternative.
5127 (mma_assemble_pair, mma_assemble_acc): New define_expand.
5128 (*mma_assemble_acc): New define_insn_and_split.
5129 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
5130 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
5131 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
5132 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
5133 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
5134 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
5135 (UNSPEC_VSX_XVCVSPBF16): Likewise.
5136 (XVCVBF16): New define_int_iterator.
5137 (xvcvbf16): New define_int_attr.
5138 (vsx_<xvcvbf16>): New define_insn.
5139 * doc/extend.texi: Document the mma built-ins.
5141 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
5142 Michael Meissner <meissner@linux.ibm.com>
5144 * config/rs6000/mma.md: New file.
5145 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
5147 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
5148 for __vector_pair and __vector_quad types.
5149 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
5151 (POWERPC_MASKS): Likewise.
5152 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
5153 (POI, PXI): New partial integer modes.
5154 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
5155 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
5156 (rs6000_hard_regno_mode_ok_uncached): Likewise.
5157 Add support for POImode being allowed in VSX registers and PXImode
5158 being allowed in FP registers.
5159 (rs6000_modes_tieable_p): Adjust comment.
5160 Add support for POImode and PXImode.
5161 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
5162 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
5163 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
5164 Set up appropriate addr_masks for vector pair and vector quad addresses.
5165 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
5166 vector quad registers. Setup reload handlers for POImode and PXImode.
5167 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
5168 (rs6000_option_override_internal): Error if -mmma is specified
5169 without -mcpu=future.
5170 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
5171 (quad_address_p): Change size test to less than 16 bytes.
5172 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
5173 and vector quad instructions.
5174 (avoiding_indexed_address_p): Likewise.
5175 (rs6000_emit_move): Disallow POImode and PXImode moves involving
5177 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
5178 and FP registers for PXImode.
5179 (rs6000_split_multireg_move): Support splitting POImode and PXImode
5181 (rs6000_mangle_type): Adjust comment. Add support for mangling
5182 __vector_pair and __vector_quad types.
5183 (rs6000_opt_masks): Add entry for mma.
5184 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5185 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
5186 (address_to_insn_form): Likewise.
5187 (reg_to_non_prefixed): Likewise.
5188 (rs6000_invalid_conversion): New function.
5189 * config/rs6000/rs6000.h (MASK_MMA): Define.
5190 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
5191 (VECTOR_ALIGNMENT_P): New helper macro.
5192 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
5193 (RS6000_BTM_MMA): Define.
5194 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
5195 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
5196 RS6000_BTI_vector_quad.
5197 (vector_pair_type_node): New.
5198 (vector_quad_type_node): New.
5199 * config/rs6000/rs6000.md: Include mma.md.
5200 (define_mode_iterator RELOAD): Add POI and PXI.
5201 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
5202 * config/rs6000/rs6000.opt (-mmma): New.
5203 * doc/invoke.texi: Document -mmma.
5205 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
5207 PR tree-optimization/95638
5208 * tree-loop-distribution.c (pg_edge_callback_data): New field.
5209 (loop_distribution::break_alias_scc_partitions): Record and restore
5210 postorder information. Fix memory leak.
5212 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
5214 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
5215 (output_file_start): Use const 'char *'.
5217 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
5219 PR tree-optimization/94880
5220 * match.pd (A | B) - B -> (A & ~B): New simplification.
5222 2020-06-19 Richard Biener <rguenther@suse.de>
5224 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
5225 for lane permutations.
5227 2020-06-19 Richard Biener <rguenther@suse.de>
5229 PR tree-optimization/95761
5230 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
5231 vectorized stmts for finding the last one.
5233 2020-06-18 Felix Yang <felix.yang@huawei.com>
5235 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
5236 vect_relevant_for_alignment_p to filter out data references in
5237 the loop whose alignment is irrelevant when trying loop peeling
5240 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
5242 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
5243 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5244 mode iterator for the first operand of ZERO_EXTRACT RTX.
5245 Change ext_register_operand predicate to register_operand.
5246 Rename from *cmpqi_ext_1.
5247 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
5248 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
5249 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
5250 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5251 (*extv<mode>): Use SWI24 mode iterator for the first operand
5252 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5253 to register_operand.
5254 (*extzv<mode>): Use SWI248 mode iterator for the first operand
5255 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5256 to register_operand.
5257 (*extzvqi): Use SWI248 mode iterator instead of SImode for
5258 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
5259 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5261 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
5262 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5263 mode iterator for the first operand of ZERO_EXTRACT RTX.
5264 Change ext_register_operand predicate to register_operand.
5265 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
5266 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
5268 (*insvqi_1): Use SWI248 mode iterator instead of SImode
5269 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
5270 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
5271 predicate to register_operand.
5274 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
5275 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
5276 mode iterator for the first operand of ZERO_EXTRACT RTX.
5277 Change ext_register_operand predicate to register_operand.
5278 (addqi_ext_1): New expander.
5279 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5280 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5281 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5282 to register_operand. Rename from *addqi_ext_1.
5283 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
5284 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5285 (udivmodqi4): Ditto.
5286 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5287 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5288 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5289 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5290 to register_operand. Rename from *testqi_ext_1.
5291 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
5292 (andqi_ext_1): New expander.
5293 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
5294 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5295 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5296 to register_operand. Rename from andqi_ext_1.
5297 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
5298 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
5299 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
5300 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
5301 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
5302 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
5303 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
5304 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
5305 to register_operand. Rename from *xorqi_ext_1_cc.
5306 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
5307 in mode, matching its first operand.
5308 (promote_duplicated_reg): Update for renamed insv<mode>_1.
5309 * config/i386/predicates.md (ext_register_operand): Remove predicate.
5311 2020-06-18 Martin Sebor <msebor@redhat.com>
5315 * builtins.c (compute_objsize): Remove call to
5316 compute_builtin_object_size and instead compute conservative sizes
5319 2020-06-18 Martin Liska <mliska@suse.cz>
5321 * coretypes.h (struct iterator_range): New type.
5322 * tree-vect-patterns.c (vect_determine_precisions): Use
5323 range-based iterator.
5324 (vect_pattern_recog): Likewise.
5325 * tree-vect-slp.c (_bb_vec_info): Likewise.
5326 (_bb_vec_info::~_bb_vec_info): Likewise.
5327 (vect_slp_check_for_constructors): Likewise.
5328 * tree-vectorizer.h:Add new iterators
5329 and functions that use it.
5331 2020-06-18 Martin Liska <mliska@suse.cz>
5333 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
5334 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
5335 of a VEC_COND_EXPR cannot be tcc_comparison and so that
5336 a SSA_NAME needs to be created before we use it for the first
5337 argument of the VEC_COND_EXPR.
5338 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
5340 2020-06-18 Richard Biener <rguenther@suse.de>
5343 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
5344 to the target if necessary.
5345 (expand_vect_cond_mask_optab_fn): Likewise.
5347 2020-06-18 Martin Liska <mliska@suse.cz>
5349 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
5350 vcond as we check for NULL pointer.
5352 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
5354 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
5355 silence empty-body warning with gcc_fallthrough.
5357 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5359 PR tree-optimization/95699
5360 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
5361 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
5362 declarations to the statements that set them where possible.
5364 2020-06-18 Jakub Jelinek <jakub@redhat.com>
5367 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
5368 scalar mode halfvectype other than vector boolean for
5369 VEC_PACK_TRUNC_EXPR.
5371 2020-06-18 Richard Biener <rguenther@suse.de>
5373 * varasm.c (assemble_variable): Make sure to not
5374 defer output when outputting addressed constants.
5375 (output_constant_def_contents): Likewise.
5376 (add_constant_to_table): Take and pass on whether to
5378 (output_addressed_constants): Likewise.
5379 (output_constant_def): Pass on whether to defer output
5380 to add_constant_to_table.
5381 (tree_output_constant_def): Defer output of constants.
5383 2020-06-18 Richard Biener <rguenther@suse.de>
5385 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
5386 (_slp_tree::lane_permutation): New member.
5387 (_slp_tree::code): Likewise.
5388 (SLP_TREE_TWO_OPERATORS): Remove.
5389 (SLP_TREE_LANE_PERMUTATION): New.
5390 (SLP_TREE_CODE): Likewise.
5391 (vect_stmt_dominates_stmt_p): Declare.
5392 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
5393 * tree-vect-stmts.c (vect_model_simple_cost): Remove
5394 SLP_TREE_TWO_OPERATORS handling.
5395 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
5396 (_slp_tree::~_slp_tree): Likewise.
5397 (vect_two_operations_perm_ok_p): Remove.
5398 (vect_build_slp_tree_1): Remove verification of two-operator
5400 (vect_build_slp_tree_2): When we have two different operators
5401 build two computation SLP nodes and a blend.
5402 (vect_print_slp_tree): Print the lane permutation if it exists.
5403 (slp_copy_subtree): Copy it.
5404 (vect_slp_rearrange_stmts): Re-arrange it.
5405 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
5406 VEC_PERM_EXPR explicitely.
5407 (vect_schedule_slp_instance): Likewise. Remove old
5408 SLP_TREE_TWO_OPERATORS code.
5409 (vectorizable_slp_permutation): New function.
5411 2020-06-18 Martin Liska <mliska@suse.cz>
5413 * tree-vect-generic.c (expand_vector_condition): Check
5414 for gassign before inspecting RHS.
5416 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
5418 * gimplify.c (omp_notice_threadprivate_variable)
5419 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
5420 diagnostic. Adjust all users.
5422 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
5424 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
5425 NULL_TREE' check earlier.
5427 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
5429 * doc/extend.texi (attribute access): Fix a typo.
5431 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
5432 Kaipeng Zhou <zhoukaipeng3@huawei.com>
5434 PR tree-optimization/95199
5435 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
5436 strided load/store operations and remove redundant code.
5438 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
5440 * coretypes.h (first_type): New alias template.
5441 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
5442 Remove spurious “...” and split the function type out into a typedef.
5444 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
5446 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
5449 2020-06-17 Richard Biener <rguenther@suse.de>
5451 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
5452 in *vectype parameter.
5453 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
5454 vect_build_slp_tree_1 computed.
5455 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
5456 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
5457 (vect_schedule_slp_instance): Likewise.
5458 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
5459 from SLP_TREE_VECTYPE.
5461 2020-06-17 Richard Biener <rguenther@suse.de>
5463 PR tree-optimization/95717
5464 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
5465 Move BB SSA updating before exit/latch PHI current def copying.
5467 2020-06-17 Martin Liska <mliska@suse.cz>
5469 * Makefile.in: Add new file.
5470 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
5471 not meet this condition.
5472 (do_store_flag): Likewise.
5473 * gimplify.c (gimplify_expr): Gimplify first argument of
5474 VEC_COND_EXPR to be a SSA name.
5475 * internal-fn.c (vec_cond_mask_direct): New.
5476 (vec_cond_direct): Likewise.
5477 (vec_condu_direct): Likewise.
5478 (vec_condeq_direct): Likewise.
5479 (expand_vect_cond_optab_fn): New.
5480 (expand_vec_cond_optab_fn): Likewise.
5481 (expand_vec_condu_optab_fn): Likewise.
5482 (expand_vec_condeq_optab_fn): Likewise.
5483 (expand_vect_cond_mask_optab_fn): Likewise.
5484 (expand_vec_cond_mask_optab_fn): Likewise.
5485 (direct_vec_cond_mask_optab_supported_p): Likewise.
5486 (direct_vec_cond_optab_supported_p): Likewise.
5487 (direct_vec_condu_optab_supported_p): Likewise.
5488 (direct_vec_condeq_optab_supported_p): Likewise.
5489 * internal-fn.def (VCOND): New OPTAB.
5491 (VCONDEQ): Likewise.
5492 (VCOND_MASK): Likewise.
5493 * optabs.c (get_rtx_code): Make it global.
5494 (expand_vec_cond_mask_expr): Removed.
5495 (expand_vec_cond_expr): Removed.
5496 * optabs.h (expand_vec_cond_expr): Likewise.
5497 (vector_compare_rtx): Make it global.
5498 * passes.def: Add new pass_gimple_isel pass.
5499 * tree-cfg.c (verify_gimple_assign_ternary): Add check
5500 for VEC_COND_EXPR about first argument.
5501 * tree-pass.h (make_pass_gimple_isel): New.
5502 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
5503 propagation of the first argument of a VEC_COND_EXPR.
5504 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
5505 first argument of a VEC_COND_EXPR.
5506 (optimize_vec_cond_expr): Likewise.
5507 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
5508 for a first argument of created VEC_COND_EXPR.
5509 (expand_vector_condition): Fix coding style.
5510 * tree-vect-stmts.c (vectorizable_condition): Gimplify
5512 * gimple-isel.cc: New file.
5514 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
5516 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
5517 (BSS_SECTION_ASM_OP): Use ".bss".
5518 (ASM_SPEC): Remove "-mattr=-code-object-v3".
5519 (LINK_SPEC): Add "--export-dynamic".
5520 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
5521 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
5522 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
5523 (load_image): Remove obsolete relocation handling.
5524 Add ".kd" suffix to the symbol names.
5525 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
5526 (gcn_option_override): Update gcn_isa test.
5527 (gcn_kernel_arg_types): Update all the assembler directives.
5528 Remove the obsolete options.
5529 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
5530 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
5532 (output_file_start): Rework assembler file header.
5533 (gcn_hsa_declare_function_name): Rework kernel metadata.
5534 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
5535 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
5536 (PROCESSOR_VEGA10): New enum value.
5537 (PROCESSOR_VEGA20): New enum value.
5539 2020-06-17 Martin Liska <mliska@suse.cz>
5541 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
5543 * gcov-tool.c (print_version): Likewise.
5544 * gcov.c (print_version): Likewise.
5546 2020-06-17 liuhongt <hongtao.liu@intel.com>
5549 * config/i386/i386-expand.c
5550 (ix86_expand_vec_shift_qihi_constant): New function.
5551 * config/i386/i386-protos.h
5552 (ix86_expand_vec_shift_qihi_constant): Declare.
5553 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
5554 V*QImode by constant.
5556 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
5558 PR tree-optimization/95649
5559 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
5560 value is a constant.
5562 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5564 * config.in: Regenerate.
5565 * config/s390/s390.c (print_operand): Emit vector alignment hints
5566 for target z13, if AS accepts them. For other targets the logic
5568 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
5570 * configure: Regenerate.
5571 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
5573 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5575 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
5577 (__arm_vaddq_m_n_s32): Likewise.
5578 (__arm_vaddq_m_n_s16): Likewise.
5579 (__arm_vaddq_m_n_u8): Likewise.
5580 (__arm_vaddq_m_n_u32): Likewise.
5581 (__arm_vaddq_m_n_u16): Likewise.
5582 (__arm_vaddq_m): Modify polymorphic variant.
5584 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5586 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
5587 and constraint of all the operands.
5588 (mve_sqrshrl_sat<supf>_di): Likewise.
5589 (mve_uqrshl_si): Likewise.
5590 (mve_sqrshr_si): Likewise.
5591 (mve_uqshll_di): Likewise.
5592 (mve_urshrl_di): Likewise.
5593 (mve_uqshl_si): Likewise.
5594 (mve_urshr_si): Likewise.
5595 (mve_sqshl_si): Likewise.
5596 (mve_srshr_si): Likewise.
5597 (mve_srshrl_di): Likewise.
5598 (mve_sqshll_di): Likewise.
5599 * config/arm/predicates.md (arm_low_register_operand): Define.
5601 2020-06-16 Jakub Jelinek <jakub@redhat.com>
5603 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
5604 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
5605 or dist_schedule clause on non-rectangular loops. Handle
5606 gimplification of non-rectangular lb/b expressions. When changing
5607 iteration variable, adjust also non-rectangular lb/b expressions
5609 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
5611 (struct omp_for_data): Add non_rect member.
5612 * omp-general.c (omp_extract_for_data): Handle non-rectangular
5613 loops. Fill in non_rect, m1, m2 and outer.
5614 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
5615 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
5616 non-rectangular loop cases and assert for cases that can't be
5618 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
5619 (dump_omp_loop_non_rect_expr): New function.
5620 (dump_generic_node): Handle non-rectangular OpenMP loops.
5621 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
5622 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
5625 2020-06-16 Richard Biener <rguenther@suse.de>
5628 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
5630 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
5633 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
5634 assertion and turn it into a early exit check.
5636 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
5638 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
5639 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
5640 true and all elements are zero, then always clear. Return GS_ERROR
5641 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
5642 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
5643 the type is aggregate non-addressable, ask gimplify_init_constructor
5644 whether it can generate a single access to the target.
5646 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
5648 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
5649 access on the LHS is replaced with a scalar access, propagate the
5650 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
5652 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5654 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
5655 TARGET_THREADPTR reference.
5656 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
5657 targetm.have_tls instead of TARGET_HAVE_TLS.
5658 (xtensa_option_override): Set targetm.have_tls to false in
5659 configurations without THREADPTR.
5661 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5663 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
5665 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
5666 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
5667 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
5668 xtensa_windowed_abi if needed.
5669 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
5671 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
5672 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
5674 (mabi=call0, mabi=windowed): New options.
5675 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
5677 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
5679 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
5680 (TARGET_CAN_ELIMINATE): New macro.
5681 * config/xtensa/xtensa.h
5682 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
5683 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
5684 (HARD_FRAME_POINTER_REGNUM): Define using
5685 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
5686 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
5687 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
5688 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
5690 2020-06-15 Felix Yang <felix.yang@huawei.com>
5692 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
5693 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
5695 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
5697 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
5698 LOOP_VINFO_DATAREFS when possible.
5699 (update_epilogue_loop_vinfo): Likewise.
5701 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
5703 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
5705 (riscv_gpr_save_operation_p): Change type to unsigned for i and
5708 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
5711 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
5713 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
5714 * config/i386/sse.md (mul<mode>3): Drop mask_name since
5715 there's no real simd int8 multiplication instruction with
5716 mask. Also optimize it under TARGET_AVX512BW.
5717 (mulv8qi3): New expander.
5719 2020-06-12 Marco Elver <elver@google.com>
5721 * gimplify.c (gimplify_function_tree): Optimize and do not emit
5722 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
5723 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
5724 * tsan.c (instrument_memory_accesses): Make
5725 fentry_exit_instrument bool depend on new param.
5727 2020-06-12 Felix Yang <felix.yang@huawei.com>
5729 PR tree-optimization/95570
5730 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
5731 (vect_verify_datarefs_alignment): Call it to filter out data references
5732 in the loop whose alignment is irrelevant.
5733 (vect_get_peeling_costs_all_drs): Likewise.
5734 (vect_peeling_supportable): Likewise.
5735 (vect_enhance_data_refs_alignment): Likewise.
5737 2020-06-12 Richard Biener <rguenther@suse.de>
5739 PR tree-optimization/95633
5740 * tree-vect-stmts.c (vectorizable_condition): Properly
5741 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
5743 2020-06-12 Martin Liška <mliska@suse.cz>
5745 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
5746 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
5748 * lto-wrapper.c (merge_and_complain): Wrap option names.
5750 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
5752 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
5753 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
5754 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
5755 (vect_set_loop_condition_masked): Renamed to ...
5756 (vect_set_loop_condition_partial_vectors): ... this. Rename
5757 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
5758 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
5759 (vect_set_loop_condition_unmasked): Renamed to ...
5760 (vect_set_loop_condition_normal): ... this.
5761 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
5762 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
5763 to vect_set_loop_condition_partial_vectors.
5764 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
5765 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
5766 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
5768 (vect_analyze_loop_costing): ... this.
5769 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
5771 (vect_min_prec_for_max_niters): New, factored out from ...
5772 (vect_verify_full_masking): ... this. Rename
5773 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
5774 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
5775 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
5776 (vectorizable_reduction): Update some dumpings with partial
5777 vectors instead of fully-masked.
5778 (vectorizable_live_operation): Likewise.
5779 (vect_iv_limit_for_full_masking): Renamed to ...
5780 (vect_iv_limit_for_partial_vectors): ... this.
5781 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
5782 (check_load_store_for_partial_vectors): ... this. Update some
5783 dumpings with partial vectors instead of fully-masked.
5784 (vectorizable_store): Rename check_load_store_masking to
5785 check_load_store_for_partial_vectors.
5786 (vectorizable_load): Likewise.
5787 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
5788 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
5789 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
5790 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
5791 (vect_iv_limit_for_full_masking): Renamed to ...
5792 (vect_iv_limit_for_partial_vectors): this.
5793 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
5794 Rename iv_type to rgroup_iv_type.
5796 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
5798 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
5799 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
5800 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
5801 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
5802 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
5803 (insn_gen_fn::operator()): Replace overloaded definitions with
5804 a parameter-pack version.
5806 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
5809 * config/i386/i386-features.c (rest_of_insert_endbranch):
5811 (rest_of_insert_endbr_and_patchable_area): Change return type
5812 to void. Add need_endbr and patchable_area_size arguments.
5813 Don't call timevar_push nor timevar_pop. Replace
5814 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
5815 UNSPECV_PATCHABLE_AREA for patchable area.
5816 (pass_data_insert_endbranch): Renamed to ...
5817 (pass_data_insert_endbr_and_patchable_area): This. Change
5818 pass name to endbr_and_patchable_area.
5819 (pass_insert_endbranch): Renamed to ...
5820 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
5821 and patchable_area_size;.
5822 (pass_insert_endbr_and_patchable_area::gate): Set and check
5823 need_endbr and patchable_area_size.
5824 (pass_insert_endbr_and_patchable_area::execute): Call
5825 timevar_push and timevar_pop. Pass need_endbr and
5826 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
5827 (make_pass_insert_endbranch): Renamed to ...
5828 (make_pass_insert_endbr_and_patchable_area): This.
5829 * config/i386/i386-passes.def: Replace pass_insert_endbranch
5830 with pass_insert_endbr_and_patchable_area.
5831 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
5832 (make_pass_insert_endbranch): Renamed to ...
5833 (make_pass_insert_endbr_and_patchable_area): This.
5834 * config/i386/i386.c (ix86_asm_output_function_label): Set
5835 function_label_emitted to true.
5836 (ix86_print_patchable_function_entry): New function.
5837 (ix86_output_patchable_area): Likewise.
5838 (x86_function_profiler): Replace endbr_queued_at_entrance with
5839 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
5840 Call ix86_output_patchable_area to generate patchable area if
5842 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
5843 * config/i386/i386.h (queued_insn_type): New.
5844 (machine_function): Add function_label_emitted. Replace
5845 endbr_queued_at_entrance with insn_queued_at_entrance.
5846 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
5847 (patchable_area): New.
5849 2020-06-11 Martin Liska <mliska@suse.cz>
5851 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
5854 2020-06-11 Martin Liska <mliska@suse.cz>
5857 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
5860 2020-06-11 Martin Liska <mliska@suse.cz>
5861 Jakub Jelinek <jakub@redhat.com>
5864 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
5865 by using Pmode instead of ptr_mode.
5867 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5869 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
5870 (vect_set_loop_control): ... this.
5871 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
5872 (vect_set_loop_masks_directly): Renamed to ...
5873 (vect_set_loop_controls_directly): ... this. Also rename some
5874 variables with ctrl instead of mask. Rename vect_set_loop_mask to
5875 vect_set_loop_control.
5876 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
5877 Also rename some variables with ctrl instead of mask.
5878 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
5879 (release_vec_loop_controls): ... this. Rename rgroup_masks related
5881 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
5882 release_vec_loop_controls.
5883 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
5884 (vect_get_max_nscalars_per_iter): Likewise.
5885 (vect_estimate_min_profitable_iters): Likewise.
5886 (vect_record_loop_mask): Likewise.
5887 (vect_get_loop_mask): Likewise.
5888 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
5889 (struct rgroup_controls): ... this. Also rename mask_type
5890 to type and rename masks to controls.
5892 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5894 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
5895 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
5896 (vect_gen_vector_loop_niters): Likewise.
5897 (vect_do_peeling): Likewise.
5898 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
5899 fully_masked_p to using_partial_vectors_p.
5900 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
5901 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
5902 (determine_peel_for_niter): Likewise.
5903 (vect_estimate_min_profitable_iters): Likewise.
5904 (vect_transform_loop): Likewise.
5905 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
5906 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
5908 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
5910 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
5911 can_fully_mask_p to can_use_partial_vectors_p.
5912 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
5913 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
5914 to saved_can_use_partial_vectors_p.
5915 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
5916 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
5917 (vectorizable_live_operation): Likewise.
5918 * tree-vect-stmts.c (permute_vec_elements): Likewise.
5919 (check_load_store_masking): Likewise.
5920 (vectorizable_operation): Likewise.
5921 (vectorizable_store): Likewise.
5922 (vectorizable_load): Likewise.
5923 (vectorizable_condition): Likewise.
5924 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
5925 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
5926 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
5928 2020-06-11 Martin Liska <mliska@suse.cz>
5930 * optc-save-gen.awk: Quote error string.
5932 2020-06-11 Alexandre Oliva <oliva@adacore.com>
5934 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
5936 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
5938 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
5939 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
5941 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
5942 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
5944 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
5946 * config/riscv/predicates.md (gpr_save_operation): New.
5947 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
5948 (riscv_gpr_save_operation_p): Ditto.
5949 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
5950 Ignore USEs for gpr_save patter.
5951 * config/riscv/riscv.c (gpr_save_reg_order): New.
5952 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
5953 (riscv_gen_gpr_save_insn): New.
5954 (riscv_gpr_save_operation_p): Ditto.
5955 * config/riscv/riscv.md (S3_REGNUM): New.
5962 (S10_REGNUM): Ditto.
5963 (S11_REGNUM): Ditto.
5964 (gpr_save): Model USEs correctly.
5966 2020-06-10 Martin Sebor <msebor@redhat.com>
5970 * builtins.c (inform_access): New function.
5971 (check_access): Call it. Add argument.
5972 (addr_decl_size): Remove.
5973 (get_range): New function.
5974 (compute_objsize): New overload. Only use compute_builtin_object_size
5975 with raw memory function.
5976 (check_memop_access): Pass new argument to compute_objsize and
5978 (expand_builtin_memchr, expand_builtin_strcat): Same.
5979 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
5980 (expand_builtin_stpncpy, check_strncat_sizes): Same.
5981 (expand_builtin_strncat, expand_builtin_strncpy): Same.
5982 (expand_builtin_memcmp): Same.
5983 * builtins.h (check_nul_terminated_array): Declare extern.
5984 (check_access): Add argument.
5985 (struct access_ref, struct access_data): New structs.
5986 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
5987 (builtin_access::overlap): Call it.
5988 * tree-object-size.c (decl_init_size): Declare extern.
5989 (addr_object_size): Correct offset computation.
5990 * tree-object-size.h (decl_init_size): Declare.
5991 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
5992 to maybe_warn_overflow when assigning to an SSA_NAME.
5994 2020-06-10 Richard Biener <rguenther@suse.de>
5996 * tree-vect-loop.c (vect_determine_vectorization_factor):
5998 (_loop_vec_info::_loop_vec_info): Likewise.
5999 (vect_update_vf_for_slp): Likewise.
6000 (vect_analyze_loop_operations): Likewise.
6001 (update_epilogue_loop_vinfo): Likewise.
6002 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
6003 (vect_pattern_recog): Likewise.
6004 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
6005 (_bb_vec_info::_bb_vec_info): Likewise.
6006 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
6009 2020-06-10 Richard Biener <rguenther@suse.de>
6011 PR tree-optimization/95576
6012 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
6014 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
6017 * config/aarch64/aarch64-sve-builtins.h
6018 (sve_switcher::m_old_maximum_field_alignment): New member.
6019 * config/aarch64/aarch64-sve-builtins.cc
6020 (sve_switcher::sve_switcher): Save maximum_field_alignment in
6021 m_old_maximum_field_alignment and clear maximum_field_alignment.
6022 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
6024 2020-06-10 Richard Biener <rguenther@suse.de>
6026 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
6028 (_stmt_vec_info::vec_stmts): Likewise.
6029 (vec_info::stmt_vec_info_ro): New flag.
6030 (vect_finish_replace_stmt): Adjust declaration.
6031 (vect_finish_stmt_generation): Likewise.
6032 (vectorizable_induction): Likewise.
6033 (vect_transform_reduction): Likewise.
6034 (vectorizable_lc_phi): Likewise.
6035 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
6036 allocate stmt infos for increments.
6037 (vect_record_grouped_load_vectors): Adjust.
6038 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6039 (vectorize_fold_left_reduction): Likewise.
6040 (vect_transform_reduction): Likewise.
6041 (vect_transform_cycle_phi): Likewise.
6042 (vectorizable_lc_phi): Likewise.
6043 (vectorizable_induction): Likewise.
6044 (vectorizable_live_operation): Likewise.
6045 (vect_transform_loop): Likewise.
6046 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
6047 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
6048 (vect_get_slp_defs): Likewise.
6049 (vect_transform_slp_perm_load): Likewise.
6050 (vect_schedule_slp_instance): Likewise.
6051 (vectorize_slp_instance_root_stmt): Likewise.
6052 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
6053 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
6054 (vect_finish_replace_stmt): Do not return anything.
6055 (vect_finish_stmt_generation): Likewise.
6056 (vect_build_gather_load_calls): Adjust.
6057 (vectorizable_bswap): Likewise.
6058 (vectorizable_call): Likewise.
6059 (vectorizable_simd_clone_call): Likewise.
6060 (vect_create_vectorized_demotion_stmts): Likewise.
6061 (vectorizable_conversion): Likewise.
6062 (vectorizable_assignment): Likewise.
6063 (vectorizable_shift): Likewise.
6064 (vectorizable_operation): Likewise.
6065 (vectorizable_scan_store): Likewise.
6066 (vectorizable_store): Likewise.
6067 (vectorizable_load): Likewise.
6068 (vectorizable_condition): Likewise.
6069 (vectorizable_comparison): Likewise.
6070 (vect_transform_stmt): Likewise.
6071 * tree-vectorizer.c (vec_info::vec_info): Initialize
6073 (vec_info::replace_stmt): Copy over stmt UID rather than
6074 unsetting/setting a stmt info allocating a new UID.
6075 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
6077 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
6079 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
6081 * gimple-ssa-evrp.c (class evrp_folder): New.
6082 (class evrp_dom_walker): Remove.
6083 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
6084 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
6085 * tree-ssa-copy.c (copy_folder::get_value): Same.
6086 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
6087 Pass stmt to get_value.
6088 (substitute_and_fold_engine::replace_phi_args_in): Same.
6089 (substitute_and_fold_dom_walker::after_dom_children): Call
6091 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
6092 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
6093 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
6094 call virtual functions for folding, pre_folding, and post folding.
6095 Call get_value with PHI. Tweak dump.
6096 * tree-ssa-propagate.h (class substitute_and_fold_engine):
6097 New argument to get_value.
6098 New virtual function pre_fold_bb.
6099 New virtual function post_fold_bb.
6100 New virtual function pre_fold_stmt.
6101 New virtual function post_new_stmt.
6102 New function propagate_into_phi_args.
6103 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
6104 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
6106 (vr_values::fold_cond): New.
6107 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
6108 * vr-values.h (class vr_values): Add
6109 simplify_cond_using_ranges_when_edge_is_known.
6111 2020-06-10 Martin Liska <mliska@suse.cz>
6114 * asan.c (asan_emit_stack_protection): Emit
6115 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
6118 2020-06-10 Tamar Christina <tamar.christina@arm.com>
6120 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
6122 2020-06-10 Richard Biener <rguenther@suse.de>
6124 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
6125 (vect_record_grouped_load_vectors): Likewise.
6126 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
6127 (vectorize_fold_left_reduction): Likewise.
6128 (vect_transform_reduction): Likewise.
6129 (vect_transform_cycle_phi): Likewise.
6130 (vectorizable_lc_phi): Likewise.
6131 (vectorizable_induction): Likewise.
6132 (vectorizable_live_operation): Likewise.
6133 (vect_transform_loop): Likewise.
6134 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
6136 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
6137 (vect_get_vec_def_for_operand): Likewise.
6138 (vect_get_vec_def_for_stmt_copy): Likewise.
6139 (vect_get_vec_defs_for_stmt_copy): Likewise.
6140 (vect_get_vec_defs_for_operand): New function.
6141 (vect_get_vec_defs): Likewise.
6142 (vect_build_gather_load_calls): Adjust.
6143 (vect_get_gather_scatter_ops): Likewise.
6144 (vectorizable_bswap): Likewise.
6145 (vectorizable_call): Likewise.
6146 (vectorizable_simd_clone_call): Likewise.
6147 (vect_get_loop_based_defs): Remove.
6148 (vect_create_vectorized_demotion_stmts): Adjust.
6149 (vectorizable_conversion): Likewise.
6150 (vectorizable_assignment): Likewise.
6151 (vectorizable_shift): Likewise.
6152 (vectorizable_operation): Likewise.
6153 (vectorizable_scan_store): Likewise.
6154 (vectorizable_store): Likewise.
6155 (vectorizable_load): Likewise.
6156 (vectorizable_condition): Likewise.
6157 (vectorizable_comparison): Likewise.
6158 (vect_transform_stmt): Adjust and remove no longer applicable
6160 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
6161 STMT_VINFO_VEC_STMTS.
6162 (vec_info::free_stmt_vec_info): Relase it.
6163 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
6164 (_stmt_vec_info::vec_stmts): Add.
6165 (STMT_VINFO_VEC_STMT): Remove.
6166 (STMT_VINFO_VEC_STMTS): New.
6167 (vect_get_vec_def_for_operand_1): Remove.
6168 (vect_get_vec_def_for_operand): Likewise.
6169 (vect_get_vec_defs_for_stmt_copy): Likewise.
6170 (vect_get_vec_def_for_stmt_copy): Likewise.
6171 (vect_get_vec_defs): New overloads.
6172 (vect_get_vec_defs_for_operand): New.
6173 (vect_get_slp_defs): Declare.
6175 2020-06-10 Qian Chao <qianchao9@huawei.com>
6177 PR tree-optimization/95569
6178 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
6180 2020-06-10 Martin Liska <mliska@suse.cz>
6182 PR tree-optimization/92860
6183 * optc-save-gen.awk: Generate new function cl_optimization_compare.
6184 * opth-gen.awk: Generate declaration of the function.
6186 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6188 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6189 'future' PowerPC platform.
6190 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6191 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6192 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6194 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6195 (rs6000_clone_map): Add 'future' system target_clones support.
6197 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
6199 * Makefile.in (ZSTD_INC): Define.
6200 (ZSTD_LIB): Include ZSTD_LDFLAGS.
6201 (CFLAGS-lto-compress.o): Add ZSTD_INC.
6202 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
6204 * configure: Rebuilt.
6206 2020-06-09 Jason Merrill <jason@redhat.com>
6209 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
6211 2020-06-09 Marco Elver <elver@google.com>
6213 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
6214 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
6215 builtin for volatile instrumentation of reads/writes.
6216 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
6217 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
6218 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
6219 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
6220 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
6221 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
6222 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
6223 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
6224 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
6225 * tsan.c (get_memory_access_decl): Argument if access is
6226 volatile. If param tsan-distinguish-volatile is non-zero, and
6227 access if volatile, return volatile instrumentation decl.
6228 (instrument_expr): Check if access is volatile.
6230 2020-06-09 Richard Biener <rguenther@suse.de>
6232 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
6234 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
6236 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6237 omp_finish_file): With in_lto_p, stream out all offload-table
6238 items even if the symtab_node does not exist.
6240 2020-06-09 Richard Biener <rguenther@suse.de>
6242 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
6244 2020-06-09 Martin Liska <mliska@suse.cz>
6246 * gcov-dump.c (print_usage): Fix spacing for --raw option
6249 2020-06-09 Martin Liska <mliska@suse.cz>
6251 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
6252 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
6253 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
6254 Handle all sanitizer options.
6255 (can_inline_edge_p): Use renamed CIF_* enum value.
6257 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
6259 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
6261 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
6262 (@aarch64_bic<mode>): Enable unpacked BIC.
6263 (*bic<mode>3): Enable unpacked BIC.
6265 2020-06-09 Martin Liska <mliska@suse.cz>
6267 PR gcov-profile/95365
6268 * doc/gcov.texi: Compile and link one example in 2 steps.
6270 2020-06-09 Jakub Jelinek <jakub@redhat.com>
6272 PR tree-optimization/95527
6273 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
6275 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
6277 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
6278 'future' PowerPC platform.
6279 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
6280 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
6281 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
6283 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
6284 (rs6000_clone_map): Add 'future' system target_clones support.
6286 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
6290 * omp-offload.c (add_decls_addresses_to_decl_constructor,
6291 omp_finish_file): Skip removed items.
6292 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
6293 to this node for variables and functions.
6295 2020-06-08 Jason Merrill <jason@redhat.com>
6297 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
6298 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
6299 * configure: Regenerate.
6301 2020-06-08 Martin Sebor <msebor@redhat.com>
6303 * postreload.c (reload_cse_simplify_operands): Clear first array element
6304 before using it. Assert a precondition.
6306 2020-06-08 Jakub Jelinek <jakub@redhat.com>
6309 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
6310 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
6311 type is vector boolean.
6313 2020-06-08 Tamar Christina <tamar.christina@arm.com>
6315 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
6317 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6319 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
6320 instead of VFP_REGS.
6322 2020-06-08 Martin Liska <mliska@suse.cz>
6324 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
6325 in all vcond* patterns.
6327 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
6329 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
6330 Define. No longer include <algorithm>.
6332 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
6334 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
6335 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
6336 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
6337 (parityhi2, parityqi2): New expanders.
6338 (parityhi2_cmp): Implement set parity flag with xorb insn.
6339 (parityqi2_cmp): Implement set parity flag with testb insn.
6340 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
6342 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6345 * config/rs6000/rs6000.c (rs6000_option_override_internal):
6346 Override flag_cunroll_grow_size.
6348 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
6350 * common.opt (flag_cunroll_grow_size): New flag.
6351 * toplev.c (process_options): Set flag_cunroll_grow_size.
6352 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
6353 Use flag_cunroll_grow_size.
6355 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
6358 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
6359 (ipa_odr_summary_write): Update streaming.
6360 (ipa_odr_read_section): Update streaming.
6362 2020-06-06 Alexandre Oliva <oliva@adacore.com>
6365 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
6367 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
6368 Julian Brown <julian@codesourcery.com>
6370 * gimplify.c (gimplify_adjust_omp_clauses): Remove
6371 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
6373 2020-06-05 Richard Biener <rguenther@suse.de>
6375 PR tree-optimization/95539
6376 * tree-vect-data-refs.c
6377 (vect_slp_analyze_and_verify_instance_alignment): Use
6378 SLP_TREE_REPRESENTATIVE for the data-ref check.
6379 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
6380 back to the first scalar stmt rather than the
6381 SLP_TREE_REPRESENTATIVE to match previous behavior.
6383 2020-06-05 Felix Yang <felix.yang@huawei.com>
6386 * expr.c (emit_move_insn): Check src and dest of the copy to see
6387 if one or both of them are subregs, try to remove the subregs when
6388 innermode and outermode are equal in size and the mode change involves
6389 an implicit round trip through memory.
6391 2020-06-05 Jakub Jelinek <jakub@redhat.com>
6394 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
6395 define_insn_and_split patterns.
6396 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
6397 define_insn patterns.
6399 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
6401 * alloc-pool.h (object_allocator::remove_raw): New.
6402 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
6403 (occurrence::occurrence): Add.
6404 (occurrence::~occurrence): Likewise.
6405 (occurrence::new): Likewise.
6406 (occurrence::delete): Likewise.
6408 (insert_bb): Use new occurence (...) instead of occ_new.
6409 (register_division_in): Likewise.
6410 (free_bb): Use delete occ instead of manually removing
6413 2020-06-05 Richard Biener <rguenther@suse.de>
6416 * cfgexpand.c (expand_debug_expr): Avoid calling
6417 set_mem_attributes_minus_bitpos when we were expanding
6419 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
6420 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
6421 special-cases we do not want MEM_EXPRs for. Assert
6422 we end up with reasonable MEM_EXPRs.
6424 2020-06-05 Lili Cui <lili.cui@intel.com>
6427 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
6429 2020-06-04 Martin Sebor <msebor@redhat.com>
6433 * attribs.c (init_attr_rdwr_indices): Move function here.
6434 * attribs.h (rdwr_access_hash, rdwr_map): Define.
6435 (attr_access): Add 'none'.
6436 (init_attr_rdwr_indices): Declared function.
6437 * builtins.c (warn_for_access)): New function.
6438 (check_access): Call it.
6439 * builtins.h (checK-access): Add an optional argument.
6440 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
6441 (init_attr_rdwr_indices): Declare extern.
6442 (append_attrname): Handle attr_access::none.
6443 (maybe_warn_rdwr_sizes): Same.
6444 (initialize_argument_information): Update comments.
6445 * doc/extend.texi (attribute access): Document 'none'.
6446 * tree-ssa-uninit.c (struct wlimits): New.
6447 (maybe_warn_operand): New function.
6448 (maybe_warn_pass_by_reference): Same.
6449 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
6450 Also call for function calls.
6451 (pass_late_warn_uninitialized::execute): Adjust comments.
6452 (execute_early_warn_uninitialized): Same.
6454 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
6457 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
6458 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
6459 reload if the original insn has it too.
6461 2020-06-04 Richard Biener <rguenther@suse.de>
6463 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
6464 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
6466 2020-06-04 Martin Jambor <mjambor@suse.cz>
6469 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
6470 exceptions check to...
6471 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
6473 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
6474 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
6477 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6480 * config/arm/predicates.md (mve_scatter_memory): Define to
6481 match (mem (reg)) for scatter store memory.
6482 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
6483 define_insn to define_expand.
6484 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
6485 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
6486 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
6487 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
6488 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
6489 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
6490 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
6491 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
6492 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
6493 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
6494 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
6495 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
6496 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
6497 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
6498 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
6499 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
6500 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
6501 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
6502 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
6503 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
6504 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
6506 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
6507 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
6508 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
6509 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
6510 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
6511 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
6512 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
6513 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
6514 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
6515 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
6516 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
6517 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
6518 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
6519 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
6520 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
6521 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
6522 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
6523 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
6524 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
6525 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
6527 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6529 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
6531 (__arm_vbicq_n_s16): Likewise.
6532 (__arm_vbicq_n_u32): Likewise.
6533 (__arm_vbicq_n_s32): Likewise.
6534 (__arm_vbicq): Modify polymorphic variant.
6536 2020-06-04 Richard Biener <rguenther@suse.de>
6538 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
6539 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
6540 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
6541 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
6542 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
6544 (vect_get_slp_defs): ... here.
6545 (vect_get_slp_vect_def): New function.
6547 2020-06-04 Richard Biener <rguenther@suse.de>
6549 * tree-vectorizer.h (_slp_tree::lanes): New.
6550 (SLP_TREE_LANES): Likewise.
6551 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
6552 (vectorizable_reduction): Likewise.
6553 (vect_transform_cycle_phi): Likewise.
6554 (vectorizable_induction): Likewise.
6555 (vectorizable_live_operation): Likewise.
6556 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
6557 (vect_create_new_slp_node): Likewise.
6558 (slp_copy_subtree): Copy it.
6559 (vect_optimize_slp): Use it.
6560 (vect_slp_analyze_node_operations_1): Likewise.
6561 (vect_slp_convert_to_external): Likewise.
6562 (vect_bb_vectorization_profitable_p): Likewise.
6563 * tree-vect-stmts.c (vectorizable_load): Likewise.
6564 (get_vectype_for_scalar_type): Likewise.
6566 2020-06-04 Richard Biener <rguenther@suse.de>
6568 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
6569 (vect_build_slp_tree_2): Simplify building all external op
6571 (vect_slp_analyze_node_operations): Remove push/pop of
6572 STMT_VINFO_DEF_TYPE.
6573 (vect_schedule_slp_instance): Likewise.
6574 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
6575 stmt_info, use the vect_is_simple_use overload combining
6576 SLP and stmt_info analysis.
6577 (vect_is_simple_cond): Likewise.
6578 (vectorizable_store): Adjust.
6579 (vectorizable_condition): Likewise.
6580 (vect_is_simple_use): Fully handle invariant SLP nodes
6581 here. Amend stmt_info operand extraction with COND_EXPR
6583 * tree-vect-loop.c (vectorizable_reduction): Deal with
6584 COND_EXPR representation ugliness.
6586 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
6589 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
6590 Refine from *vcvtps2ph_store<mask_name>.
6591 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
6592 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
6593 (*vcvtps2ph256<merge_mask_name>): New define_insn.
6594 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
6595 * config/i386/subst.md (merge_mask): New define_subst.
6596 (merge_mask_name): New define_subst_attr.
6597 (merge_mask_operand3): Ditto.
6599 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
6601 PR tree-optimization/89430
6603 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
6604 remove ssa_name_ver, store, offset fields.
6605 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
6606 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
6607 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
6610 2020-06-04 Andreas Schwab <schwab@suse.de>
6613 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
6615 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
6617 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
6618 (trunc<mode><pmov_dst_3_lower>2): Refine from
6619 trunc<mode><pmov_dst_3>2.
6621 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
6623 * match.pd (tanh/sinh -> 1/cosh): New simplification.
6625 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
6628 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
6629 is_lfs_stfs_insn and make it recognize lfs as well.
6630 (prefixed_store_p): Use is_lfs_stfs_insn().
6631 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
6633 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
6635 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
6637 (odr_enums): New static var.
6638 (struct odr_enum_val): New struct.
6639 (class odr_enum): New struct.
6640 (odr_enum_map): New hashtable.
6641 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
6642 (add_type_duplicate): Likewise.
6643 (free_odr_warning_data): Do not free TYPE_VALUES.
6644 (register_odr_enum): New function.
6645 (ipa_odr_summary_write): New function.
6646 (ipa_odr_read_section): New function.
6647 (ipa_odr_summary_read): New function.
6648 (class pass_ipa_odr): New pass.
6649 (make_pass_ipa_odr): New function.
6650 * ipa-utils.h (register_odr_enum): Declare.
6651 * lto-section-in.c: (lto_section_name): Add odr_types section.
6652 * lto-streamer.h (enum lto_section_type): Add odr_types section.
6653 * passes.def: Add odr_types pass.
6654 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
6656 (hash_tree): Likewise.
6657 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
6659 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
6661 * timevar.def (TV_IPA_ODR): New timervar.
6662 * tree-pass.h (make_pass_ipa_odr): Declare.
6663 * tree.c (free_lang_data_in_type): Regiser ODR types.
6665 2020-06-03 Romain Naour <romain.naour@gmail.com>
6667 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
6670 2020-06-03 Richard Biener <rguenther@suse.de>
6672 PR tree-optimization/95487
6673 * tree-vect-stmts.c (vectorizable_store): Use a truth type
6674 for the scatter mask.
6676 2020-06-03 Richard Biener <rguenther@suse.de>
6678 PR tree-optimization/95495
6679 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
6680 SLP_TREE_REPRESENTATIVE in the shift assertion.
6682 2020-06-03 Tom Tromey <tromey@adacore.com>
6684 * spellcheck.c (CASE_COST): New define.
6685 (BASE_COST): New define.
6686 (get_edit_distance): Recognize case changes.
6687 (get_edit_distance_cutoff): Update.
6688 (test_edit_distances): Update.
6689 (get_old_cutoff): Update.
6690 (test_find_closest_string): Add case sensitivity test.
6692 2020-06-03 Richard Biener <rguenther@suse.de>
6694 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
6695 the cost vector to unset the visited flag on stmts.
6697 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
6699 * gimplify.c (omp_notice_variable): Use new hook.
6700 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
6701 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
6702 (LANG_HOOKS_DECLS): Add it.
6703 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
6704 (lhd_omp_predetermined_mapping): New.
6705 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
6707 2020-06-03 Jan Hubicka <jh@suse.cz>
6709 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
6710 add LTO_first_tree_tag and LTO_first_gimple_tag.
6711 (lto_tag_is_tree_code_p): Update.
6712 (lto_tag_is_gimple_code_p): Update.
6713 (lto_gimple_code_to_tag): Update.
6714 (lto_tag_to_gimple_code): Update.
6715 (lto_tree_code_to_tag): Update.
6716 (lto_tag_to_tree_code): Update.
6718 2020-06-02 Felix Yang <felix.yang@huawei.com>
6721 * config/aarch64/aarch64.c (aarch64_short_vector_p):
6722 Leave later code to report an error if SVE is disabled.
6724 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
6726 * config/aarch64/aarch64-cores.def (zeus): Define.
6727 * config/aarch64/aarch64-tune.md: Regenerate.
6728 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
6730 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
6733 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
6735 (is_stfs_insn): New helper function.
6737 2020-06-02 Jan Hubicka <jh@suse.cz>
6739 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
6741 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
6743 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
6745 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
6746 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
6747 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
6749 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
6752 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
6753 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
6755 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6757 * config/s390/s390.c (print_operand): Emit vector alignment
6760 2020-06-02 Martin Liska <mliska@suse.cz>
6762 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
6763 as they have variable number of counters.
6764 * gcov-dump.c (main): Add new option -r.
6765 (print_usage): Likewise.
6766 (tag_counters): All new raw format.
6767 * gcov-io.h (struct gcov_kvp): New.
6768 (GCOV_TOPN_VALUES): Remove.
6769 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
6770 (GCOV_TOPN_MEM_COUNTERS): New.
6771 (GCOV_TOPN_DISK_COUNTERS): Likewise.
6772 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
6773 * ipa-profile.c (ipa_profile_generate_summary): Use
6774 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
6775 (ipa_profile_write_edge_summary): Likewise.
6776 (ipa_profile_read_edge_summary): Likewise.
6777 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
6778 * profile.c (sort_hist_values): Sort variable number
6780 (compute_value_histograms): Special case for TOP N counters
6781 that have dynamic number of key-value pairs.
6782 * value-prof.c (dump_histogram_value): Dump variable number
6784 (stream_in_histogram_value): Stream in variable number
6785 of key-value pairs for TOP N counter.
6786 (get_nth_most_common_value): Deal with variable number
6788 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
6790 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
6792 * doc/gcov-dump.texi: Document new -r option.
6794 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
6797 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
6799 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
6801 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
6802 returns (const_int 0) for the destination, then emit nothing.
6804 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
6806 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
6807 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
6808 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
6809 LTO_const_decl_ref, LTO_imported_decl_ref,
6810 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
6811 LTO_namelist_decl_ref; add LTO_global_stream_ref.
6812 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
6813 (lto_input_scc): Update.
6814 (lto_input_tree_1): Update.
6815 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
6816 * lto-streamer.c (lto_tag_name): Update.
6818 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
6820 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
6821 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
6822 * lto-cgraph.c (lto_output_node): Likewise.
6823 (lto_output_varpool_node): Likewise.
6824 (output_offload_tables): Likewise.
6825 (input_node): Likewise.
6826 (input_varpool_node): Likewise.
6827 (input_offload_tables): Likewise.
6828 * lto-streamer-in.c (lto_input_tree_ref): Declare.
6829 (lto_input_var_decl_ref): Declare.
6830 (lto_input_fn_decl_ref): Declare.
6831 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
6832 (lto_output_var_decl_index): Rename to ..
6833 (lto_output_var_decl_ref): ... this.
6834 (lto_output_fn_decl_index): Rename to ...
6835 (lto_output_fn_decl_ref): ... this.
6836 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
6837 (DEFINE_DECL_STREAM_FUNCS): Remove.
6838 (lto_output_var_decl_index): Remove.
6839 (lto_output_fn_decl_index): Remove.
6840 (lto_output_var_decl_ref): Declare.
6841 (lto_output_fn_decl_ref): Declare.
6842 (lto_input_var_decl_ref): Declare.
6843 (lto_input_fn_decl_ref): Declare.
6845 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
6847 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
6848 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
6849 dump infomation if there is no adjusted parameter.
6850 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
6852 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
6854 * Makefile.in (gimple-array-bounds.o): New.
6855 * tree-vrp.c: Move array bounds code...
6856 * gimple-array-bounds.cc: ...here...
6857 * gimple-array-bounds.h: ...and here.
6859 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
6861 * Makefile.in (OBJS): Add value-range-equiv.o.
6862 * tree-vrp.c (*value_range_equiv*): Move to...
6863 * value-range-equiv.cc: ...here.
6864 * tree-vrp.h (class value_range_equiv): Move to...
6865 * value-range-equiv.h: ...here.
6866 * vr-values.h: Include value-range-equiv.h.
6868 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
6871 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
6872 lattice for simple pass-through by-ref argument.
6874 2020-05-31 Jeff Law <law@redhat.com>
6876 * lra.c (add_auto_inc_notes): Remove function.
6877 * reload1.c (add_auto_inc_notes): Similarly. Move into...
6878 * rtlanal.c (add_auto_inc_notes): New function.
6879 * rtl.h (add_auto_inc_notes): Add prototype.
6880 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
6883 2020-05-31 Jan Hubicka <jh@suse.cz>
6885 * lto-section-out.c (lto_output_decl_index): Remove.
6886 (lto_output_field_decl_index): Move to lto-streamer-out.c
6887 (lto_output_fn_decl_index): Move to lto-streamer-out.c
6888 (lto_output_namespace_decl_index): Remove.
6889 (lto_output_var_decl_index): Remove.
6890 (lto_output_type_decl_index): Remove.
6891 (lto_output_type_ref_index): Remove.
6892 * lto-streamer-out.c (output_type_ref): Remove.
6893 (lto_get_index): New function.
6894 (lto_output_tree_ref): Remove.
6895 (lto_indexable_tree_ref): New function.
6896 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
6897 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
6898 (stream_write_tree_ref): Update.
6899 (lto_output_tree): Update.
6900 * lto-streamer.h (lto_output_decl_index): Remove prototype.
6901 (lto_output_field_decl_index): Remove prototype.
6902 (lto_output_namespace_decl_index): Remove prototype.
6903 (lto_output_type_decl_index): Remove prototype.
6904 (lto_output_type_ref_index): Remove prototype.
6905 (lto_output_var_decl_index): Move.
6906 (lto_output_fn_decl_index): Move
6908 2020-05-31 Jakub Jelinek <jakub@redhat.com>
6911 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
6914 2020-05-31 Jeff Law <law@redhat.com>
6916 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
6918 2020-05-31 Jim Wilson <jimw@sifive.com>
6920 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
6922 2020-05-30 Jonathan Yong <10walls@gmail.com>
6924 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
6925 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
6926 import library, but also contains some functions that invoke
6927 others in KERNEL32.DLL.
6929 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
6931 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
6932 (altivec_vmrglw_direct): Ditto.
6933 (altivec_vperm_<mode>_direct): Ditto.
6934 (altivec_vperm_v8hiv16qi): Ditto.
6935 (*altivec_vperm_<mode>_uns_internal): Ditto.
6936 (*altivec_vpermr_<mode>_internal): Ditto.
6937 (vperm_v8hiv4si): Ditto.
6938 (vperm_v16qiv8hi): Ditto.
6940 2020-05-29 Jan Hubicka <jh@suse.cz>
6942 * lto-streamer-in.c (streamer_read_chain): Move here from
6944 (stream_read_tree_ref): New.
6945 (lto_input_tree_1): Simplify.
6946 * lto-streamer-out.c (stream_write_tree_ref): New.
6947 (lto_write_tree_1): Simplify.
6948 (lto_output_tree_1): Simplify.
6949 (DFS::DFS_write_tree): Simplify.
6950 (streamer_write_chain): Move here from tree-stremaer-out.c.
6951 * lto-streamer.h (lto_output_tree_ref): Update prototype.
6952 (stream_read_tree_ref): Declare
6953 (stream_write_tree_ref): Declare
6954 * tree-streamer-in.c (streamer_read_chain): Update to use
6955 stream_read_tree_ref.
6956 (lto_input_ts_common_tree_pointers): Likewise.
6957 (lto_input_ts_vector_tree_pointers): Likewise.
6958 (lto_input_ts_poly_tree_pointers): Likewise.
6959 (lto_input_ts_complex_tree_pointers): Likewise.
6960 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
6961 (lto_input_ts_decl_common_tree_pointers): Likewise.
6962 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
6963 (lto_input_ts_field_decl_tree_pointers): Likewise.
6964 (lto_input_ts_function_decl_tree_pointers): Likewise.
6965 (lto_input_ts_type_common_tree_pointers): Likewise.
6966 (lto_input_ts_type_non_common_tree_pointers): Likewise.
6967 (lto_input_ts_list_tree_pointers): Likewise.
6968 (lto_input_ts_vec_tree_pointers): Likewise.
6969 (lto_input_ts_exp_tree_pointers): Likewise.
6970 (lto_input_ts_block_tree_pointers): Likewise.
6971 (lto_input_ts_binfo_tree_pointers): Likewise.
6972 (lto_input_ts_constructor_tree_pointers): Likewise.
6973 (lto_input_ts_omp_clause_tree_pointers): Likewise.
6974 * tree-streamer-out.c (streamer_write_chain): Update to use
6975 stream_write_tree_ref.
6976 (write_ts_common_tree_pointers): Likewise.
6977 (write_ts_vector_tree_pointers): Likewise.
6978 (write_ts_poly_tree_pointers): Likewise.
6979 (write_ts_complex_tree_pointers): Likewise.
6980 (write_ts_decl_minimal_tree_pointers): Likewise.
6981 (write_ts_decl_common_tree_pointers): Likewise.
6982 (write_ts_decl_non_common_tree_pointers): Likewise.
6983 (write_ts_decl_with_vis_tree_pointers): Likewise.
6984 (write_ts_field_decl_tree_pointers): Likewise.
6985 (write_ts_function_decl_tree_pointers): Likewise.
6986 (write_ts_type_common_tree_pointers): Likewise.
6987 (write_ts_type_non_common_tree_pointers): Likewise.
6988 (write_ts_list_tree_pointers): Likewise.
6989 (write_ts_vec_tree_pointers): Likewise.
6990 (write_ts_exp_tree_pointers): Likewise.
6991 (write_ts_block_tree_pointers): Likewise.
6992 (write_ts_binfo_tree_pointers): Likewise.
6993 (write_ts_constructor_tree_pointers): Likewise.
6994 (write_ts_omp_clause_tree_pointers): Likewise.
6995 (streamer_write_tree_body): Likewise.
6996 (streamer_write_integer_cst): Likewise.
6997 * tree-streamer.h (streamer_read_chain):Declare.
6998 (streamer_write_chain):Declare.
6999 (streamer_write_tree_body): Update prototype.
7000 (streamer_write_integer_cst): Update prototype.
7002 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
7005 * configure: Regenerated.
7007 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
7009 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
7010 (add<mode>3_vcc_zext_dup_exec): Likewise.
7011 (add<mode>3_vcc_zext_dup2): Likewise.
7012 (add<mode>3_vcc_zext_dup2_exec): Likewise.
7014 2020-05-29 Richard Biener <rguenther@suse.de>
7016 PR tree-optimization/95272
7017 * tree-vectorizer.h (_slp_tree::representative): Add.
7018 (SLP_TREE_REPRESENTATIVE): Likewise.
7019 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
7021 (vectorizable_live_operation): Use the representative to
7022 attach the reduction info to.
7023 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
7024 SLP_TREE_REPRESENTATIVE.
7025 (vect_create_new_slp_node): Likewise.
7026 (slp_copy_subtree): Copy it.
7027 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
7028 (vect_slp_analyze_node_operations_1): Pass the representative
7029 to vect_analyze_stmt.
7030 (vect_schedule_slp_instance): Pass the representative to
7031 vect_transform_stmt.
7033 2020-05-29 Richard Biener <rguenther@suse.de>
7035 PR tree-optimization/95356
7036 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
7037 node hacking during analysis.
7039 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
7042 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
7044 2020-05-29 Richard Biener <rguenther@suse.de>
7046 PR tree-optimization/95403
7047 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
7050 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7053 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
7054 declare variant cgraph node removal callback.
7056 2020-05-29 Jakub Jelinek <jakub@redhat.com>
7059 * expr.c (store_expr): If expr_size is constant and significantly
7060 larger than TREE_STRING_LENGTH, set temp to just the
7061 TREE_STRING_LENGTH portion of the STRING_CST.
7063 2020-05-29 Richard Biener <rguenther@suse.de>
7065 PR tree-optimization/95393
7066 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
7067 to build the min/max expression so we simplify cases like
7068 MAX(0, s) immediately.
7070 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
7072 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
7073 for unpacked EOR, ORR, AND.
7075 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
7077 * Makefile.in: don't look for libiberty in the "pic" subdirectory
7078 when building for Mingw. Add dependency on xgcc with the proper
7081 2020-05-28 Jeff Law <law@redhat.com>
7083 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
7085 2020-05-28 Jeff Law <law@redhat.com>
7087 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
7088 make a nonzero adjustment to the memory offset.
7089 (b<ior,xor>hi_msx): Turn into a splitter.
7091 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
7093 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7094 Fix off-by-one error.
7096 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7098 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
7099 wb_candidate1 and wb_candidate2.
7100 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
7101 wb_candidate1 and wb_candidate2 if we decided not to use them.
7103 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
7106 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
7107 we have at least some CFI operations when using a frame pointer.
7108 Only redefine the CFA if we have CFI operations.
7110 2020-05-28 Richard Biener <rguenther@suse.de>
7112 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
7113 case for !SLP_TREE_VECTYPE.
7114 (vect_slp_analyze_node_operations): Adjust.
7116 2020-05-28 Richard Biener <rguenther@suse.de>
7118 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
7119 (SLP_TREE_VEC_DEFS): Likewise.
7120 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
7121 (_slp_tree::~_slp_tree): Likewise.
7122 (vect_mask_constant_operand_p): Remove unused function.
7123 (vect_get_constant_vectors): Rename to...
7124 (vect_create_constant_vectors): ... this. Take the
7125 invariant node as argument and code generate it. Remove
7126 dead code, remove temporary asserts. Pass a NULL stmt_info
7127 to vect_init_vector.
7128 (vect_get_slp_defs): Simplify.
7129 (vect_schedule_slp_instance): Code-generate externals and
7130 invariants using vect_create_constant_vectors.
7132 2020-05-28 Richard Biener <rguenther@suse.de>
7134 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
7135 Conditionalize stmt_info use, assert the new stmt cannot throw
7137 (vect_finish_stmt_generation): Adjust assert.
7139 2020-05-28 Richard Biener <rguenther@suse.de>
7141 PR tree-optimization/95273
7142 PR tree-optimization/95356
7143 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
7144 what we set the vector type of the shift operand SLP node
7147 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
7149 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
7152 2020-05-28 Martin Liska <mliska@suse.cz>
7155 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
7156 rename ipcp-unit-growth to ipa-cp-unit-growth.
7158 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
7160 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
7161 from *avx512vl_<code>v2div2qi_store and refine memory size of
7163 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
7164 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
7165 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
7166 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
7167 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
7168 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
7169 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
7170 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
7171 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
7172 (*avx512vl_<code>v2div2si2_store_1): Ditto.
7173 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
7174 (*avx512f_<code>v8div16qi2_store_1): Ditto.
7175 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
7176 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
7177 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
7178 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
7179 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
7180 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
7181 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
7182 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
7183 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
7184 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
7185 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
7186 (*avx512vl_<code>v2div2si2_store_2): Ditto.
7187 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
7188 (*avx512f_<code>v8div16qi2_store_2): Ditto.
7189 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
7190 * config/i386/i386-builtin-types.def: Adjust builtin type.
7191 * config/i386/i386-expand.c: Ditto.
7192 * config/i386/i386-builtin.def: Adjust builtin.
7193 * config/i386/avx512fintrin.h: Ditto.
7194 * config/i386/avx512vlbwintrin.h: Ditto.
7195 * config/i386/avx512vlintrin.h: Ditto.
7197 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
7199 PR gcov-profile/95332
7200 * gcov-io.c (gcov_var::endian): Move field.
7201 (from_file): Add IN_GCOV_TOOL check.
7202 * gcov-io.h (gcov_magic): Ditto.
7204 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
7206 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
7208 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
7210 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
7212 * builtin-types.def (BT_UINT128): New primitive type.
7213 (BT_FN_UINT128_UINT128): New function type.
7214 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
7215 * doc/extend.texi (__builtin_bswap128): Document it.
7216 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
7217 (is_inexpensive_builtin): Likewise.
7218 * fold-const-call.c (fold_const_call_ss): Likewise.
7219 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
7220 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
7221 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
7222 (vectorizable_call): Likewise.
7223 * optabs.c (expand_unop): Always use the double word path for it.
7224 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
7225 * tree.h (uint128_type_node): New global type.
7226 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
7228 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7230 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
7231 (mmx_hsubv2sf3): Ditto.
7232 (mmx_haddsubv2sf3): New expander.
7233 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
7234 RTL template to model horizontal subtraction and addition.
7235 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
7238 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7241 * config/i386/sse.md
7242 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
7243 Remove %q operand modifier from insn template.
7244 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
7246 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
7248 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
7249 Enable insn pattern for TARGET_MMX_WITH_SSE.
7250 (*mmx_movshdup): New insn pattern.
7251 (*mmx_movsldup): Ditto.
7252 (*mmx_movss): Ditto.
7253 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7255 (expand_vec_perm_movs): Handle E_V2SFmode.
7256 (expand_vec_perm_even_odd): Ditto.
7257 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
7258 is already handled by standard shuffle patterns.
7260 2020-05-27 Richard Biener <rguenther@suse.de>
7262 PR tree-optimization/95295
7263 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
7264 merging stores from paths.
7266 2020-05-27 Richard Biener <rguenther@suse.de>
7268 PR tree-optimization/95356
7269 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
7270 type for the shift operand.
7272 2020-05-27 Richard Biener <rguenther@suse.de>
7274 PR tree-optimization/95335
7275 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
7276 lvisited for nodes made external.
7278 2020-05-27 Richard Biener <rguenther@suse.de>
7280 * dump-context.h (debug_dump_context): New class.
7281 (dump_context): Make it friend.
7282 * dumpfile.c (debug_dump_context::debug_dump_context):
7284 (debug_dump_context::~debug_dump_context): Likewise.
7285 * tree-vect-slp.c: Include dump-context.h.
7286 (vect_print_slp_tree): Dump a single SLP node.
7287 (debug): New overload for slp_tree.
7288 (vect_print_slp_graph): Rename from vect_print_slp_tree and
7290 (vect_analyze_slp_instance): Adjust.
7292 2020-05-27 Jakub Jelinek <jakub@redhat.com>
7295 * omp-general.c (omp_declare_variant_remove_hook): New function.
7296 (omp_resolve_declare_variant): Always return base if it is already
7297 declare_variant_alt magic decl itself. Register
7298 omp_declare_variant_remove_hook as cgraph node removal hook.
7300 2020-05-27 Jeff Law <law@redhat.com>
7302 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
7303 for the primary input operand.
7304 (tstsi_variable_bit_qi): Similarly.
7306 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7308 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
7310 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
7313 * ipa-utils.h (odr_type_p): Also permit calls with
7314 only flag_generate_offload set.
7316 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7318 * gcc.c (validate_switches): Add braced parameter. Adjust all
7319 callers. Expected and skip trailing brace only if braced.
7320 Return after handling one atom otherwise.
7321 (DUMPS_OPTIONS): New.
7322 (cpp_debug_options): Define in terms of it.
7324 2020-05-26 Richard Biener <rguenther@suse.de>
7326 PR tree-optimization/95327
7327 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
7328 when we are not using a scalar shift.
7330 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
7332 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
7333 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
7334 Handle E_V2SImode and E_V4HImode.
7335 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
7336 Assert that E_V2SImode is already handled.
7337 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
7338 is already handled by standard shuffle patterns.
7340 2020-05-26 Jan Hubicka <jh@suse.cz>
7342 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
7345 2020-05-26 Jakub Jelinek <jakub@redhat.com>
7348 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
7349 * omp-general.h (find_combined_omp_for): Declare.
7350 * omp-general.c: Include tree-iterator.h.
7351 (find_combined_omp_for): New function, moved from gimplify.c.
7353 2020-05-26 Alexandre Oliva <oliva@adacore.com>
7355 * common.opt (aux_base_name): Define.
7356 (dumpbase, dumpdir): Mark as Driver options.
7357 (-dumpbase, -dumpdir): Likewise.
7358 (dumpbase-ext, -dumpbase-ext): New.
7359 (auxbase, auxbase-strip): Drop.
7360 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
7362 (-o): Introduce the notion of primary output, mention it
7363 influences auxiliary and dump output names as well, add
7365 (-save-temps): Adjust, move examples into -dump*.
7366 (-save-temps=cwd, -save-temps=obj): Likewise.
7367 (-fdump-final-insns): Adjust.
7368 * dwarf2out.c (gen_producer_string): Drop auxbase and
7369 auxbase_strip; add dumpbase_ext.
7370 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
7371 (save_temps_prefix, save_temps_length): Drop.
7372 (save_temps_overrides_dumpdir): New.
7373 (dumpdir, dumpbase, dumpbase_ext): New.
7374 (dumpdir_length, dumpdir_trailing_dash_added): New.
7375 (outbase, outbase_length): New.
7376 (The Specs Language): Introduce %". Adjust %b and %B.
7377 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
7378 Precede object file with %w when it's the primary output.
7379 (cpp_debug_options): Do not pass on incoming -dumpdir,
7380 -dumpbase and -dumpbase-ext options; recompute them with
7382 (cc1_options): Drop auxbase with and without compare-debug;
7383 use cpp_debug_options instead of dumpbase. Mark asm output
7384 with %w when it's the primary output.
7385 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
7386 %:replace-exception. Add %:dumps.
7387 (driver_handle_option): Implement -save-temps=*/-dumpdir
7388 mutual overriding logic. Save dumpdir, dumpbase and
7389 dumpbase-ext options. Do not save output_file in
7391 (adds_single_suffix_p): New.
7392 (single_input_file_index): New.
7393 (process_command): Combine output dir, output base name, and
7394 dumpbase into dumpdir and outbase.
7395 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
7396 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
7397 and outbase instead of input_basename in %b, %B and in
7398 -save-temps aux files. Handle empty argument %".
7399 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
7400 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
7401 naming. Spec-quote the computed -fdump-final-insns file name.
7402 (debug_auxbase_opt): Drop.
7403 (compare_debug_self_opt_spec_function): Drop auxbase-strip
7405 (compare_debug_auxbase_opt_spec_function): Drop.
7406 (not_actual_file_p): New.
7407 (replace_extension_spec_func): Drop.
7408 (dumps_spec_func): New.
7409 (convert_white_space): Split-out parts into...
7410 (quote_string, whitespace_to_convert_p): ... these. New.
7411 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
7412 (driver::finalize): Release and reset new variables; drop
7414 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
7415 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
7416 empty string otherwise.
7417 (DUMPBASE_SUFFIX): Drop leading period.
7418 (debug_objcopy): Use concat.
7419 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
7420 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
7421 component. Simplify temp file names.
7422 * opts.c (finish_options): Drop aux base name handling.
7423 (common_handle_option): Drop auxbase-strip handling.
7424 * toplev.c (print_switch_values): Drop auxbase, add
7426 (process_options): Derive aux_base_name from dump_base_name
7428 (lang_dependent_init): Compute dump_base_ext along with
7429 dump_base_name. Disable stack usage and callgraph-info during
7430 lto generation and compare-debug recompilation.
7432 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
7433 Uroš Bizjak <ubizjak@gmail.com>
7437 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
7438 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
7439 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
7440 float<floatunssuffix>v2div2sf2.
7441 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
7442 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
7443 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
7444 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7445 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
7446 * config/i386/i386-builtin.def: Ditto.
7447 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
7448 subregs when both omode and imode are vector mode and
7449 have the same inner mode.
7451 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
7453 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
7454 Only turn MEM_REFs into bit-field stores for small bit-field regions.
7455 (imm_store_chain_info::output_merged_store): Be prepared for sources
7456 with non-integral type in the bit-field insertion case.
7457 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
7458 the largest size for the bit-field case.
7460 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
7462 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
7463 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
7464 (*vec_dupv4hi): Redefine as define_insn.
7465 Remove alternative with general register input.
7466 (*vec_dupv2si): Ditto.
7468 2020-05-25 Richard Biener <rguenther@suse.de>
7470 PR tree-optimization/95309
7471 * tree-vect-slp.c (vect_get_constant_vectors): Move number
7472 of vector computation ...
7473 (vect_slp_analyze_node_operations): ... to analysis phase.
7475 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
7477 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
7478 * lto-streamer.h (streamer_debugging): New constant
7479 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
7480 streamer_debugging check.
7481 (streamer_get_pickled_tree): Likewise.
7482 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
7484 2020-05-25 Richard Biener <rguenther@suse.de>
7486 PR tree-optimization/95308
7487 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
7488 test for TARGET_MEM_REFs.
7490 2020-05-25 Richard Biener <rguenther@suse.de>
7492 PR tree-optimization/95295
7493 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
7494 RHSes and drop to full sm_other if they are not equal.
7496 2020-05-25 Richard Biener <rguenther@suse.de>
7498 PR tree-optimization/95271
7499 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
7500 children vector type.
7501 (vectorizable_call): Pass down slp ops.
7503 2020-05-25 Richard Biener <rguenther@suse.de>
7505 PR tree-optimization/95297
7506 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
7507 skip updating operand 1 vector type.
7509 2020-05-25 Richard Biener <rguenther@suse.de>
7511 PR tree-optimization/95284
7512 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
7515 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
7518 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
7519 (trunc<mode><sf2dfmode_lower>2) New expander.
7520 (extend<sf2dfmode_lower><mode>2): Ditto.
7522 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
7524 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
7525 ubsan_{data,type},ASAN symbols linker-visible.
7527 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7529 * lto-streamer-out.c (DFS::DFS): Silence warning.
7531 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
7534 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
7535 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
7537 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7539 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
7542 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7544 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
7545 * lto-streamer-out.c (create_output_block): Fix whitespace
7546 (lto_write_tree_1): Add (debug) dump.
7547 (DFS::DFS): Add dump.
7548 (DFS::DFS_write_tree_body): Do not dump here.
7549 (lto_output_tree): Improve dumping; do not stream ref when not needed.
7550 (produce_asm_for_decls): Fix whitespace.
7551 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
7552 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
7554 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
7557 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
7558 (truncv32hiv32qi2): Ditto.
7559 (trunc<ssedoublemodelower><mode>2): Ditto.
7560 (trunc<mode><pmov_dst_3>2): Ditto.
7561 (trunc<mode><pmov_dst_mode_4>2): Ditto.
7562 (truncv2div2si2): Ditto.
7563 (truncv8div8qi2): Ditto.
7564 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
7565 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
7566 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
7567 *avx512vl_<code><mode>v<ssescalarnum>qi2.
7569 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
7572 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
7575 2020-05-22 Richard Biener <rguenther@suse.de>
7577 PR tree-optimization/95268
7578 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
7581 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7583 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
7586 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
7588 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
7589 (lto_input_scc): Optimize streaming of entry lengths.
7590 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
7591 (DFS::DFS): Optimize stremaing of entry lengths
7593 2020-05-22 Richard Biener <rguenther@suse.de>
7596 * doc/invoke.texi (flto): Document behavior of diagnostic
7599 2020-05-22 Richard Biener <rguenther@suse.de>
7601 * tree-vectorizer.h (vect_is_simple_use): New overload.
7602 (vect_maybe_update_slp_op_vectype): New.
7603 * tree-vect-stmts.c (vect_is_simple_use): New overload
7604 accessing operands of SLP vs. non-SLP operation transparently.
7605 (vect_maybe_update_slp_op_vectype): New function updating
7606 the possibly shared SLP operands vector type.
7607 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
7608 using the new vect_is_simple_use overload; update SLP invariant
7609 operand nodes vector type.
7610 (vectorizable_comparison): Likewise.
7611 (vectorizable_call): Likewise.
7612 (vectorizable_conversion): Likewise.
7613 (vectorizable_shift): Likewise.
7614 (vectorizable_store): Likewise.
7615 (vectorizable_condition): Likewise.
7616 (vectorizable_assignment): Likewise.
7617 * tree-vect-loop.c (vectorizable_reduction): Likewise.
7618 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
7619 present SLP_TREE_VECTYPE and check it matches previous
7622 2020-05-22 Richard Biener <rguenther@suse.de>
7624 PR tree-optimization/95248
7625 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
7627 2020-05-22 Richard Biener <rguenther@suse.de>
7629 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
7630 (_slp_tree::~_slp_tree): Likewise.
7631 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
7633 (_slp_tree::~_slp_tree): Implement.
7634 (vect_free_slp_tree): Simplify.
7635 (vect_create_new_slp_node): Likewise. Add nops parameter.
7636 (vect_build_slp_tree_2): Adjust.
7637 (vect_analyze_slp_instance): Likewise.
7639 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7641 * adjust-alignment.c: Include memmodel.h.
7643 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
7646 * config/i386/cpuid.h: Use hexadecimal in comments.
7648 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
7651 * config/i386/i386-builtins.c (processor_features): Move
7652 F_AVX512VP2INTERSECT after F_AVX512BF16.
7653 (isa_names_table): Likewise.
7655 2020-05-21 Martin Liska <mliska@suse.cz>
7657 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
7658 Handle OPT_moutline_atomics.
7659 * config/aarch64/aarch64.c: Add outline-atomics to
7661 * doc/extend.texi: Document the newly added target attribute.
7663 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
7667 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
7668 operands 1 and 2 commutative. Manually swap operands.
7669 (*mmx_nabsv2sf2): Ditto.
7672 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7674 * config/i386/i386.md (*<code>tf2_1):
7675 Mark operands 1 and 2 commutative.
7676 (*nabstf2_1): Ditto.
7677 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
7678 commutative. Do not swap operands.
7679 (*nabs<mode>2): Ditto.
7681 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
7684 * config/i386/sse.md (<code>v8qiv8hi2): Use
7685 simplify_gen_subreg instead of simplify_subreg.
7686 (<code>v8qiv8si2): Ditto.
7687 (<code>v4qiv4si2): Ditto.
7688 (<code>v4hiv4si2): Ditto.
7689 (<code>v8qiv8di2): Ditto.
7690 (<code>v4qiv4di2): Ditto.
7691 (<code>v2qiv2di2): Ditto.
7692 (<code>v4hiv4di2): Ditto.
7693 (<code>v2hiv2di2): Ditto.
7694 (<code>v2siv2di2): Ditto.
7696 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
7699 * config/i386/i386.md (*pushsi2_rex64):
7700 Use "e" constraint instead of "i".
7702 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
7704 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
7705 (lto_input_tree_1): Strenghten sanity check.
7706 (lto_input_tree): Update call of lto_input_scc.
7707 * lto-streamer-out.c: Include ipa-utils.h
7708 (create_output_block): Initialize local_trees if merigng is going
7710 (destroy_output_block): Destroy local_trees.
7711 (DFS): Add max_local_entry.
7712 (local_tree_p): New function.
7713 (DFS::DFS): Initialize and maintain it.
7714 (DFS::DFS_write_tree): Decide on streaming format.
7715 (lto_output_tree): Stream inline singleton SCCs
7716 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
7717 (struct output_block): Add local_trees.
7718 (lto_input_scc): Update prototype.
7720 2020-05-20 Patrick Palka <ppalka@redhat.com>
7723 * hash-table.h (hash_table::find_with_hash): Move up the call to
7726 2020-05-20 Martin Liska <mliska@suse.cz>
7728 * lto-compress.c (lto_compression_zstd): Fill up
7729 num_compressed_il_bytes.
7730 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
7732 2020-05-20 Richard Biener <rguenther@suse.de>
7734 PR tree-optimization/95219
7735 * tree-vect-loop.c (vectorizable_induction): Reduce
7736 group_size before computing the number of required IVs.
7738 2020-05-20 Richard Biener <rguenther@suse.de>
7741 * tree-inline.c (remap_gimple_stmt): Revert adjusting
7742 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
7744 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7745 Andre Vieira <andre.simoesdiasvieira@arm.com>
7748 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
7750 (mve_vector_mem_operand): Likewise.
7751 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
7752 the load from memory to a core register is legitimate for give mode.
7753 (mve_vector_mem_operand): Define function.
7754 (arm_print_operand): Modify comment.
7755 (arm_mode_base_reg_class): Define.
7756 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
7757 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
7758 * config/arm/constraints.md (Ux): Likewise.
7760 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
7761 add support for missing Vector Store Register and Vector Load Register.
7762 Add a new alternative to support load from memory to PC (or label) in
7764 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
7765 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
7766 mve_memory_operand and also modify the MVE instructions to emit.
7767 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
7768 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
7769 mve_memory_operand and also modify the MVE instructions to emit.
7770 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
7771 mve_memory_operand and also modify the MVE instructions to emit.
7772 (mve_vldrhq_z_fv8hf): Likewise.
7773 (mve_vldrhq_z_<supf><mode>): Likewise.
7774 (mve_vldrwq_fv4sf): Likewise.
7775 (mve_vldrwq_<supf>v4si): Likewise.
7776 (mve_vldrwq_z_fv4sf): Likewise.
7777 (mve_vldrwq_z_<supf>v4si): Likewise.
7778 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
7779 (mve_vld1q_<supf><mode>): Likewise.
7780 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
7782 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
7783 mve_memory_operand and also modify the MVE instructions to emit.
7784 (mve_vstrhq_p_<supf><mode>): Likewise.
7785 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
7787 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
7788 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
7789 instructions to emit.
7790 (mve_vstrwq_p_<supf>v4si): Likewise.
7791 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
7792 * config/arm/predicates.md (mve_memory_operand): Define.
7794 2020-05-30 Richard Biener <rguenther@suse.de>
7797 * c-fold.c (c_fully_fold_internal): Enhance guard on
7800 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
7803 * Makefile.in (OBJS): Add adjust-alignment.o.
7804 * adjust-alignment.c (pass_data_adjust_alignment): New.
7805 (pass_adjust_alignment): New.
7806 (pass_adjust_alignment::execute): New.
7807 (make_pass_adjust_alignment): New.
7808 * tree-pass.h (make_pass_adjust_alignment): New.
7809 * passes.def: Add pass_adjust_alignment.
7811 2020-05-19 Alex Coplan <alex.coplan@arm.com>
7814 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
7815 identity permutation.
7817 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
7819 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
7820 msp430_small, msp430_large and size24plus DejaGNU effective
7822 Improve grammar in descriptions for size20plus and size32plus effective
7825 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
7827 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
7828 callee saved registers only in xBPF.
7829 (bpf_expand_prologue): Save callee saved registers only in xBPF.
7830 (bpf_expand_epilogue): Likewise for restoring.
7831 * doc/invoke.texi (eBPF Options): Document this is activated by
7834 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
7836 * config/bpf/bpf.opt (mxbpf): New option.
7837 * doc/invoke.texi (Option Summary): Add -mxbpf.
7838 (eBPF Options): Document -mxbbpf.
7840 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
7843 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
7844 (<code>v32qiv32hi2): Ditto.
7845 (<code>v8qiv8hi2): Ditto.
7846 (<code>v16qiv16si2): Ditto.
7847 (<code>v8qiv8si2): Ditto.
7848 (<code>v4qiv4si2): Ditto.
7849 (<code>v16hiv16si2): Ditto.
7850 (<code>v8hiv8si2): Ditto.
7851 (<code>v4hiv4si2): Ditto.
7852 (<code>v8qiv8di2): Ditto.
7853 (<code>v4qiv4di2): Ditto.
7854 (<code>v2qiv2di2): Ditto.
7855 (<code>v8hiv8di2): Ditto.
7856 (<code>v4hiv4di2): Ditto.
7857 (<code>v2hiv2di2): Ditto.
7858 (<code>v8siv8di2): Ditto.
7859 (<code>v4siv4di2): Ditto.
7860 (<code>v2siv2di2): Ditto.
7862 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
7864 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
7865 (riscv_implied_info): New.
7866 (riscv_subset_list): Add handle_implied_ext.
7867 (riscv_subset_list::to_string): New parameter version_p to
7868 control output format.
7869 (riscv_subset_list::handle_implied_ext): New.
7870 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
7871 (riscv_arch_str): New parameter version_p to control output format.
7872 (riscv_expand_arch): New.
7873 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
7875 * config/riscv/riscv.h (riscv_expand_arch): New,
7876 (EXTRA_SPEC_FUNCTIONS): Define.
7877 (ASM_SPEC): Transform -march= via riscv_expand_arch.
7879 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
7881 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
7882 parse_multiletter_ext.
7883 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
7884 adjust parsing order for 's' and 'x'.
7886 2020-05-19 Richard Biener <rguenther@suse.de>
7888 * tree-vectorizer.h (_slp_tree::vectype): Add field.
7889 (SLP_TREE_VECTYPE): New.
7890 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
7892 (vect_create_new_slp_node): Likewise.
7893 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
7895 (vect_slp_analyze_node_operations): Walk nodes children for
7897 (vect_get_constant_vectors): Use local scope op variable.
7898 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
7899 (vect_model_simple_cost): Adjust.
7900 (vect_model_store_cost): Likewise.
7901 (vectorizable_store): Likewise.
7903 2020-05-18 Martin Sebor <msebor@redhat.com>
7906 * tree-object-size.c (decl_init_size): New function.
7907 (addr_object_size): Call it.
7908 * tree.h (last_field): Declare.
7909 (first_field): Add attribute nonnull.
7911 2020-05-18 Martin Sebor <msebor@redhat.com>
7914 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
7915 * tree.c (component_ref_size): Correct the handling or array members
7917 Drop a pointless test.
7918 Rename a local variable.
7920 2020-05-18 Jason Merrill <jason@redhat.com>
7922 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
7923 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
7925 2020-05-14 Jason Merrill <jason@redhat.com>
7927 * doc/install.texi (Prerequisites): Update boostrap compiler
7928 requirement to C++11/GCC 4.8.
7930 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7932 PR tree-optimization/94952
7933 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
7934 Initialize variables bitpos, bitregion_start, and bitregion_end in
7935 order to silence warnings about use of uninitialized variables.
7937 2020-05-18 Carl Love <cel@us.ibm.com>
7940 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
7941 first_match_index_<mode>.
7942 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
7943 additional test cases with zero vector elements.
7945 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7948 * config/i386/i386-expand.c (ix86_expand_int_movcc):
7949 Avoid reversing a non-trapping comparison to a trapping one.
7951 2020-05-18 Alex Coplan <alex.coplan@arm.com>
7953 * config/arm/arm.c (output_move_double): Fix codegen when loading into
7954 a register pair with an odd base register.
7956 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
7958 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
7959 Do not emit FLAGS_REG clobber for TFmode.
7960 * config/i386/i386.md (*<code>tf2_1): Rewrite as
7961 define_insn_and_split. Mark operands 1 and 2 commutative.
7962 (*nabstf2_1): Ditto.
7963 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
7964 Do not swap memory operands. Simplify RTX generation.
7965 (neg abs SSE splitter): Ditto.
7966 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
7967 commutative. Do not swap operands. Simplify RTX generation.
7968 (*nabs<mode>2): Ditto.
7970 2020-05-18 Richard Biener <rguenther@suse.de>
7972 * tree-vect-slp.c (vect_slp_bb): Start after labels.
7973 (vect_get_constant_vectors): Really place init stmt after scalar defs.
7974 * tree-vect-stmts.c (vect_init_vector_1): Insert before
7977 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
7979 * config/i386/driver-i386.c (host_detect_local_cpu): Support
7980 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
7983 2020-05-18 Richard Biener <rguenther@suse.de>
7986 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
7987 when inlining into a non-call EH function.
7989 2020-05-18 Richard Biener <rguenther@suse.de>
7991 PR tree-optimization/95172
7992 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
7993 eventually need the conditional processing.
7994 (execute_sm_exit): When processing an orderd sequence
7995 avoid doing any conditional processing.
7996 (hoist_memory_references): Pass down whether all edges
7997 have ordered processing for a ref to execute_sm.
7999 2020-05-17 Jeff Law <law@redhat.com>
8001 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
8002 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
8003 into a single pattern using pc_or_label_operand.
8004 * config/h8300/combiner.md (bit branch patterns): Likewise.
8005 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
8007 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
8010 * config/i386/i386-features.c (has_non_address_hard_reg):
8012 (pseudo_reg_set): This. Return the SET expression. Ignore
8013 pseudo register push.
8014 (general_scalar_to_vector_candidate_p): Combine single_set and
8015 has_non_address_hard_reg calls to pseudo_reg_set.
8016 (timode_scalar_to_vector_candidate_p): Likewise.
8017 * config/i386/i386.md (*pushv1ti2): New pattern.
8019 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8022 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8024 * tree-vrp.c (operand_less_p): Move to...
8025 * vr-values.c (operand_less_p): ...here.
8026 * tree-vrp.h (operand_less_p): Remove.
8028 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8030 * tree-vrp.c (operand_less_p): Move to...
8031 * vr-values.c (operand_less_p): ...here.
8032 * tree-vrp.h (operand_less_p): Remove.
8034 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8036 * tree-vrp.c (class vrp_insert): Remove prototype for
8039 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8041 * tree-vrp.c (class live_names): New.
8042 (live_on_edge): Move into live_names.
8043 (build_assert_expr_for): Move into vrp_insert.
8044 (find_assert_locations_in_bb): Rename from
8045 find_assert_locations_1.
8046 (process_assert_insertions_for): Move into vrp_insert.
8047 (compare_assert_loc): Same.
8048 (remove_range_assertions): Same.
8049 (dump_asserts_for): Rename to vrp_insert::dump.
8050 (debug_asserts_for): Rename to vrp_insert::debug.
8051 (dump_all_asserts): Rename to vrp_insert::dump.
8052 (debug_all_asserts): Rename to vrp_insert::debug.
8054 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
8056 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
8057 check_array_ref, check_mem_ref, and search_for_addr_array
8059 (class array_bounds_checker): ...here.
8060 (class check_array_bounds_dom_walker): Adjust to use
8061 array_bounds_checker.
8062 (check_all_array_refs): Move into array_bounds_checker and rename
8064 (class vrp_folder): Make fold_predicate_in private.
8066 2020-05-15 Jeff Law <law@redhat.com>
8068 * config/h8300/h8300.md (SFI iterator): New iterator for
8070 * config/h8300/peepholes.md (memory comparison): Use mode
8071 iterator to consolidate 3 patterns into one.
8072 (stack allocation and stack store): Handle SFmode. Handle
8075 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
8077 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
8078 RS6000_BTM_POWERPC64.
8080 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8082 * config/i386/i386.md (SWI48DWI): New mode iterator.
8083 (*push<mode>2): Allow XMM registers.
8084 (*pushdi2_rex64): Ditto.
8085 (*pushsi2_rex64): Ditto.
8087 (push XMM reg splitter): New splitter
8089 (*pushdf) Change "x" operand constraint to "v".
8090 (*pushsf_rex64): Ditto.
8093 2020-05-15 Richard Biener <rguenther@suse.de>
8095 PR tree-optimization/92260
8096 * tree-vect-slp.c (vect_get_constant_vectors): Compute
8097 the number of vector stmts in a canonical way.
8099 2020-05-15 Martin Liska <mliska@suse.cz>
8101 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
8104 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
8106 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
8108 2020-05-15 Richard Biener <rguenther@suse.de>
8110 PR tree-optimization/95133
8111 * gimple-ssa-split-paths.c
8112 (find_block_to_duplicate_for_splitting_paths): Check for
8115 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
8117 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
8119 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
8121 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
8124 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
8125 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
8128 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
8131 * config/i386/i386.md (isa): Add sse3_noavx.
8132 (enabled): Handle sse3_noavx.
8134 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
8135 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
8136 alternatives. Match commutative vec_select selector operands.
8137 (*mmx_haddv2sf3_low): New insn pattern.
8139 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
8140 (*mmx_hsubv2sf3_low): New insn pattern.
8142 2020-05-15 Richard Biener <rguenther@suse.de>
8144 PR tree-optimization/33315
8145 * tree-ssa-sink.c: Include tree-eh.h.
8146 (sink_stats): Add commoned member.
8147 (sink_common_stores_to_bb): New function implementing store
8148 commoning by sinking to the successor.
8149 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
8150 (pass_sink_code::execute): Likewise. Record commoned stores
8153 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
8155 PR rtl-optimization/37451, part of PR target/61837
8156 * loop-doloop.c (doloop_simplify_count): New function. Simplify
8157 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
8158 (doloop_modify): Call doloop_simplify_count.
8160 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8163 * doc/sourcebuild.texi: Document effective target lgccjit.
8165 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
8167 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
8168 define_expand, and rename the original to ...
8169 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
8170 (add<mode>3_zext_dup_exec): Likewise, with ...
8171 (add<mode>3_vcc_zext_dup_exec): ... this.
8172 (add<mode>3_zext_dup2): Likewise, with ...
8173 (add<mode>3_zext_dup_exec): ... this.
8174 (add<mode>3_zext_dup2_exec): Likewise, with ...
8175 (add<mode>3_zext_dup2): ... this.
8176 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
8177 addv64di3_zext* calls to use addv64di3_vcc_zext*.
8179 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8182 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
8183 (extendv2sfv2df2): Ditto.
8185 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
8187 * configure: Regenerated.
8189 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8191 * config/arm/arm.c (reg_needs_saving_p): New function.
8192 (use_return_insn): Use reg_needs_saving_p.
8193 (arm_get_vfp_saved_size): Likewise.
8194 (arm_compute_frame_layout): Likewise.
8195 (arm_save_coproc_regs): Likewise.
8196 (thumb1_expand_epilogue): Likewise.
8197 (arm_expand_epilogue_apcs_frame): Likewise.
8198 (arm_expand_epilogue): Likewise.
8200 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
8202 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
8204 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8207 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
8209 (floatv2siv2df2): New expander.
8210 (floatunsv2siv2df2): New insn pattern.
8212 (fix_truncv2dfv2si2): New expander.
8213 (fixuns_truncv2dfv2si2): New insn pattern.
8215 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
8218 * config/aarch64/aarch64-sve-builtins.cc
8219 (handle_arm_sve_vector_bits_attribute): Create a copy of the
8220 original type's TYPE_MAIN_VARIANT, then reapply all the differences
8221 between the original type and its main variant.
8223 2020-05-14 Richard Biener <rguenther@suse.de>
8226 * real.c (real_to_decimal_for_mode): Make sure we handle
8227 a zero with nonzero exponent.
8229 2020-05-14 Jakub Jelinek <jakub@redhat.com>
8231 * Makefile.in (GTFILES): Add omp-general.c.
8232 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
8233 calls_declare_variant_alt members and initialize them in the
8235 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
8236 calls to declare_variant_alt nodes.
8237 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
8238 and calls_declare_variant_alt.
8239 (input_overwrite_node): Read them back.
8240 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
8242 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
8244 (tree_function_versioning): Copy calls_declare_variant_alt bit.
8245 * omp-offload.c (execute_omp_device_lower): Call
8246 omp_resolve_declare_variant on direct function calls.
8247 (pass_omp_device_lower::gate): Also enable for
8248 calls_declare_variant_alt functions.
8249 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
8250 (omp_context_selector_matches): Handle the case when
8251 cfun->curr_properties has PROP_gimple_any bit set.
8252 (struct omp_declare_variant_entry): New type.
8253 (struct omp_declare_variant_base_entry): New type.
8254 (struct omp_declare_variant_hasher): New type.
8255 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
8257 (omp_declare_variants): New variable.
8258 (struct omp_declare_variant_alt_hasher): New type.
8259 (omp_declare_variant_alt_hasher::hash,
8260 omp_declare_variant_alt_hasher::equal): New methods.
8261 (omp_declare_variant_alt): New variables.
8262 (omp_resolve_late_declare_variant): New function.
8263 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
8264 when called late. Create a magic declare_variant_alt fndecl and
8265 cgraph node and return that if decision needs to be deferred until
8266 after gimplification.
8267 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
8271 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
8272 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
8273 entry block if info->after_stmt is NULL, otherwise add after that stmt
8274 and update it after adding each stmt.
8275 (ipa_simd_modify_function_body): Initialize info.after_stmt.
8277 * function.h (struct function): Add has_omp_target bit.
8278 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
8280 (omp_discover_declare_target_tgt_fn_r): ... this.
8281 (omp_discover_declare_target_var_r): Call
8282 omp_discover_declare_target_tgt_fn_r instead of
8283 omp_discover_declare_target_fn_r.
8284 (omp_discover_implicit_declare_target): Also queue functions with
8285 has_omp_target bit set, for those walk with
8286 omp_discover_declare_target_fn_r, for declare target to functions
8287 walk with omp_discover_declare_target_tgt_fn_r.
8289 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
8292 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
8293 Add SSE/AVX alternative. Change operand predicates from
8294 nonimmediate_operand to register_mmxmem_operand.
8295 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8296 (fix_truncv2sfv2si2): New expander.
8297 (fixuns_truncv2sfv2si2): New insn pattern.
8299 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
8300 Add SSE/AVX alternative. Change operand predicates from
8301 nonimmediate_operand to register_mmxmem_operand.
8302 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8303 (floatv2siv2sf2): New expander.
8304 (floatunsv2siv2sf2): New insn pattern.
8306 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
8308 (IX86_BUILTIN_PI2FD): Ditto.
8310 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8312 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
8314 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
8317 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8319 * config/s390/s390.c (allocate_stack_space): Add missing updates
8320 of last_probe_offset.
8322 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
8324 * config/s390/s390.md ("allocate_stack"): Call
8325 anti_adjust_stack_and_probe_stack_clash when stack clash
8326 protection is enabled.
8327 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
8328 prototype. Remove static.
8329 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
8332 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
8334 * config/rs6000/altivec.h (vec_extractl): New #define.
8335 (vec_extracth): Likewise.
8336 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
8337 (UNSPEC_EXTRACTR): Likewise.
8338 (vextractl<mode>): New expansion.
8339 (vextractl<mode>_internal): New insn.
8340 (vextractr<mode>): New expansion.
8341 (vextractr<mode>_internal): New insn.
8342 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
8343 New built-in function.
8344 (__builtin_altivec_vextduhvlx): Likewise.
8345 (__builtin_altivec_vextduwvlx): Likewise.
8346 (__builtin_altivec_vextddvlx): Likewise.
8347 (__builtin_altivec_vextdubvhx): Likewise.
8348 (__builtin_altivec_vextduhvhx): Likewise.
8349 (__builtin_altivec_vextduwvhx): Likewise.
8350 (__builtin_altivec_vextddvhx): Likewise.
8351 (__builtin_vec_extractl): New overloaded built-in function.
8352 (__builtin_vec_extracth): Likewise.
8353 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8354 Define overloaded forms of __builtin_vec_extractl and
8355 __builtin_vec_extracth.
8356 (builtin_function_type): Add cases to mark arguments of new
8357 built-in functions as unsigned.
8358 (rs6000_common_init_builtins): Add
8359 opaque_ftype_opaque_opaque_opaque_opaque.
8360 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
8361 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8362 for a Future Architecture): Add description of vec_extractl and
8363 vec_extractr built-in functions.
8365 2020-05-13 Richard Biener <rguenther@suse.de>
8367 * target.def (add_stmt_cost): Add new vectype parameter.
8368 * targhooks.c (default_add_stmt_cost): Adjust.
8369 * targhooks.h (default_add_stmt_cost): Likewise.
8370 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
8372 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
8373 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
8374 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
8376 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
8377 (dump_stmt_cost): Add new vectype parameter.
8378 (add_stmt_cost): Likewise.
8379 (record_stmt_cost): Likewise.
8380 (record_stmt_cost): Add overload with old signature.
8381 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
8383 (vect_get_known_peeling_cost): Likewise.
8384 (vect_estimate_min_profitable_iters): Likewise.
8385 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
8386 * tree-vect-stmts.c (record_stmt_cost): Likewise.
8387 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
8388 and pass down correct vectype and NULL stmt_info.
8389 (vect_model_simple_cost): Adjust.
8390 (vect_model_store_cost): Likewise.
8392 2020-05-13 Richard Biener <rguenther@suse.de>
8394 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
8395 (_slp_instance::group_size): Likewise.
8396 * tree-vect-loop.c (vectorizable_reduction): The group size
8397 is the number of lanes in the node.
8398 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
8399 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
8400 verify it matches the instance trees number of lanes.
8401 (vect_slp_analyze_node_operations_1): Use the numer of lanes
8402 in the node as group size.
8403 (vect_bb_vectorization_profitable_p): Use the instance root
8404 number of lanes for the size of life.
8405 (vect_schedule_slp_instance): Use the number of lanes as
8407 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
8408 parameter. Use the number of lanes of the load for the group
8409 size in the gap adjustment code.
8410 (vect_analyze_stmt): Adjust.
8411 (vect_transform_stmt): Likewise.
8413 2020-05-13 Jakub Jelinek <jakub@redhat.com>
8416 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
8417 if the last insn is a note.
8419 PR tree-optimization/95060
8420 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
8421 if it is the single use of the FMA internal builtin.
8423 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
8425 PR tree-optimization/94969
8426 * tree-data-dependence.c (constant_access_functions): Rename to...
8427 (invariant_access_functions): ...this. Add parameter. Check for
8428 invariant access function, rather than constant.
8429 (build_classic_dist_vector): Call above function.
8430 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
8432 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
8435 * doc/extend.texi (x86Operandmodifiers): Document more x86
8437 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
8439 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
8441 * tree-vrp.c (class vrp_insert): New.
8442 (insert_range_assertions): Move to class vrp_insert.
8443 (dump_all_asserts): Same as above.
8444 (dump_asserts_for): Same as above.
8445 (live): Same as above.
8446 (need_assert_for): Same as above.
8447 (live_on_edge): Same as above.
8448 (finish_register_edge_assert_for): Same as above.
8449 (find_switch_asserts): Same as above.
8450 (find_assert_locations): Same as above.
8451 (find_assert_locations_1): Same as above.
8452 (find_conditional_asserts): Same as above.
8453 (process_assert_insertions): Same as above.
8454 (register_new_assert_for): Same as above.
8455 (vrp_prop): New variable fun.
8456 (vrp_initialize): New parameter.
8457 (identify_jump_threads): Same as above.
8458 (execute_vrp): Same as above.
8461 2020-05-12 Keith Packard <keith.packard@sifive.com>
8463 * config/riscv/riscv.c (riscv_unique_section): New.
8464 (TARGET_ASM_UNIQUE_SECTION): New.
8466 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
8468 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
8469 * config/riscv/riscv-passes.def: New file.
8470 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
8471 * config/riscv/riscv-shorten-memrefs.c: New file.
8472 * config/riscv/riscv.c (tree-pass.h): New include.
8473 (riscv_compressed_reg_p): New Function
8474 (riscv_compressed_lw_offset_p): Likewise.
8475 (riscv_compressed_lw_address_p): Likewise.
8476 (riscv_shorten_lw_offset): Likewise.
8477 (riscv_legitimize_address): Attempt to convert base + large_offset
8478 to compressible new_base + small_offset.
8479 (riscv_address_cost): Make anticipated compressed load/stores
8480 cheaper for code size than uncompressed load/stores.
8481 (riscv_register_priority): Move compressed register check to
8482 riscv_compressed_reg_p.
8483 * config/riscv/riscv.h (C_S_BITS): Define.
8484 (CSW_MAX_OFFSET): Define.
8485 * config/riscv/riscv.opt (mshorten-memefs): New option.
8486 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
8487 (PASSES_EXTRA): Add riscv-passes.def.
8488 * doc/invoke.texi: Document -mshorten-memrefs.
8490 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
8491 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
8492 * doc/tm.texi: Regenerate.
8493 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
8494 * sched-deps.c (attempt_change): Use old address if it is cheaper than
8496 * target.def (new_address_profitable_p): New hook.
8497 * targhooks.c (default_new_address_profitable_p): New function.
8498 * targhooks.h (default_new_address_profitable_p): Declare.
8500 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8503 * config/i386/mmx.md (copysignv2sf3): New expander.
8504 (xorsignv2sf3): Ditto.
8505 (signbitv2sf3): Ditto.
8507 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8510 * config/i386/mmx.md (fmav2sf4): New insn pattern.
8515 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
8517 * Makefile.in (CET_HOST_FLAGS): New.
8518 (COMPILER): Add $(CET_HOST_FLAGS).
8519 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
8520 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
8522 * aclocal.m4: Regenerated.
8523 * configure: Likewise.
8525 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
8528 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
8529 (*mmx_<code>v2sf2): New insn_and_split pattern.
8530 (*mmx_nabsv2sf2): Ditto.
8531 (*mmx_andnotv2sf3): New insn pattern.
8532 (*mmx_<code>v2sf3): Ditto.
8533 * config/i386/i386.md (absneg_op): New code attribute.
8534 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
8535 (ix86_build_signbit_mask): Ditto.
8537 2020-05-12 Richard Biener <rguenther@suse.de>
8539 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
8542 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8544 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
8545 Update prototype to include "local" argument.
8546 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
8547 "local" argument. Handle local common decls.
8548 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
8549 msp430_output_aligned_decl_common call with 0 for "local" argument.
8550 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
8552 2020-05-12 Richard Biener <rguenther@suse.de>
8554 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
8556 2020-05-12 Martin Liska <mliska@suse.cz>
8560 * sanopt.c (sanitize_rewrite_addressable_params):
8561 Clear DECL_NOT_GIMPLE_REG_P for argument.
8563 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8565 PR tree-optimization/94980
8566 * tree-vect-generic.c (expand_vector_comparison): Use
8567 vector_element_bits_tree to get the element size in bits,
8568 rather than using TYPE_SIZE.
8569 (expand_vector_condition, vector_element): Likewise.
8571 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8573 PR tree-optimization/94980
8574 * tree-vect-generic.c (build_replicated_const): Take the number
8575 of bits as a parameter, instead of the type of the elements.
8576 (do_plus_minus): Update accordingly, using vector_element_bits
8577 to calculate the correct number of bits.
8578 (do_negate): Likewise.
8580 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
8582 PR tree-optimization/94980
8583 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
8584 * tree.c (vector_element_bits, vector_element_bits_tree): New.
8585 * match.pd: Use the new functions instead of determining the
8586 vector element size directly from TYPE_SIZE(_UNIT).
8587 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
8588 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
8589 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
8590 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
8591 (expand_vector_conversion): Likewise.
8592 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
8593 a divisor. Convert the dividend to bits to compensate.
8594 * tree-vect-loop.c (vectorizable_live_operation): Call
8595 vector_element_bits instead of open-coding it.
8597 2020-05-12 Jakub Jelinek <jakub@redhat.com>
8599 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
8600 * omp-offload.c: Include context.h.
8601 (omp_declare_target_fn_p, omp_declare_target_var_p,
8602 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
8603 omp_discover_implicit_declare_target): New functions.
8604 * cgraphunit.c (analyze_functions): Call
8605 omp_discover_implicit_declare_target.
8607 2020-05-12 Richard Biener <rguenther@suse.de>
8609 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
8610 literal constant &MEM[..] to a constant literal.
8612 2020-05-12 Richard Biener <rguenther@suse.de>
8614 PR tree-optimization/95045
8615 * dbgcnt.def (lim): Add debug-counter.
8616 * tree-ssa-loop-im.c: Include dbgcnt.h.
8617 (find_refs_for_sm): Use lim debug counter for store motion
8619 (do_store_motion): Rename form store_motion. Commit edge
8621 (store_motion_loop): ... here.
8622 (tree_ssa_lim): Adjust.
8624 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8626 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
8627 (vec_ctzm): Rename to vec_cnttzm.
8628 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
8629 Change fourth operand for vec_ternarylogic to require
8630 compatibility with unsigned SImode rather than unsigned QImode.
8631 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8632 Remove overloaded forms of vec_gnb that are no longer needed.
8633 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8634 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
8635 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
8636 vec_gnb; move vec_ternarylogic documentation into this section
8637 and replace const unsigned char with const unsigned int as its
8640 2020-05-11 Carl Love <cel@us.ibm.com>
8642 * config/rs6000/altivec.h (vec_genpcvm): New #define.
8643 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
8645 (XXGENPCVM_V8HI): Likewise.
8646 (XXGENPCVM_V4SI): Likewise.
8647 (XXGENPCVM_V2DI): Likewise.
8648 (XXGENPCVM): New overloaded built-in instantiation.
8649 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
8650 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
8651 (altivec_expand_builtin): Add special handling for
8652 FUTURE_BUILTIN_VEC_XXGENPCVM.
8653 (builtin_function_type): Add handling for
8654 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
8655 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
8656 (UNSPEC_XXGENPCV): New constant.
8657 (xxgenpcvm_<mode>_internal): New insn.
8658 (xxgenpcvm_<mode>): New expansion.
8659 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
8661 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8663 * config/rs6000/altivec.h (vec_strir): New #define.
8664 (vec_stril): Likewise.
8665 (vec_strir_p): Likewise.
8666 (vec_stril_p): Likewise.
8667 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
8668 (UNSPEC_VSTRIL): Likewise.
8669 (vstrir_<mode>): New expansion.
8670 (vstrir_code_<mode>): New insn.
8671 (vstrir_p_<mode>): New expansion.
8672 (vstrir_p_code_<mode>): New insn.
8673 (vstril_<mode>): New expansion.
8674 (vstril_code_<mode>): New insn.
8675 (vstril_p_<mode>): New expansion.
8676 (vstril_p_code_<mode>): New insn.
8677 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
8678 New built-in function.
8679 (__builtin_altivec_vstrihr): Likewise.
8680 (__builtin_altivec_vstribl): Likewise.
8681 (__builtin_altivec_vstrihl): Likewise.
8682 (__builtin_altivec_vstribr_p): Likewise.
8683 (__builtin_altivec_vstrihr_p): Likewise.
8684 (__builtin_altivec_vstribl_p): Likewise.
8685 (__builtin_altivec_vstrihl_p): Likewise.
8686 (__builtin_vec_strir): New overloaded built-in function.
8687 (__builtin_vec_stril): Likewise.
8688 (__builtin_vec_strir_p): Likewise.
8689 (__builtin_vec_stril_p): Likewise.
8690 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8691 Define overloaded forms of __builtin_vec_strir,
8692 __builtin_vec_stril, __builtin_vec_strir_p, and
8693 __builtin_vec_stril_p.
8694 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8695 for a Future Architecture): Add description of vec_stril,
8696 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
8698 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
8700 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
8701 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
8703 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
8704 * config/rs6000/rs6000-builtin.def: Add handling of new macro
8706 (BU_FUTURE_V_4): New macro. Use it.
8707 (BU_FUTURE_OVERLOAD_4): Likewise.
8708 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
8709 handling for quaternary built-in functions.
8710 (altivec_resolve_overloaded_builtin): Add special-case handling
8711 for __builtin_vec_xxeval.
8712 * config/rs6000/rs6000-call.c: Add handling of new macro
8713 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
8714 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
8715 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
8716 (altivec_overloaded_builtins): Add definitions for
8717 FUTURE_BUILTIN_VEC_XXEVAL.
8718 (bdesc_4arg): New array.
8719 (htm_expand_builtin): Add handling for quaternary built-in
8721 (rs6000_expand_quaternop_builtin): New function.
8722 (rs6000_expand_builtin): Add handling for quaternary built-in
8724 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
8725 for unsigned QImode and unsigned HImode.
8726 (builtin_quaternary_function_type): New function.
8727 (rs6000_common_init_builtins): Add handling of quaternary
8729 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
8731 (RS6000_BTC_PREDICATE): Change value of constant.
8732 (RS6000_BTC_ABS): Likewise.
8733 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
8734 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
8735 for a Future Architecture): Add description of vec_ternarylogic
8738 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8740 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
8742 (__builtin_pextd): Likewise.
8743 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
8744 (UNSPEC_PEXTD): Likewise.
8747 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
8748 a Future Architecture): Add descriptions of __builtin_pdepd and
8749 __builtin_pextd functions.
8751 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8753 * config/rs6000/altivec.h (vec_clrl): New #define.
8754 (vec_clrr): Likewise.
8755 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
8756 (UNSPEC_VCLRRB): Likewise.
8759 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
8761 (__builtin_altivec_vclrrb): Likewise.
8762 (__builtin_vec_clrl): New overloaded built-in function.
8763 (__builtin_vec_clrr): Likewise.
8764 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8765 Define overloaded forms of __builtin_vec_clrl and
8767 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8768 for a Future Architecture): Add descriptions of vec_clrl and
8771 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8773 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
8774 built-in function definition.
8775 (__builtin_cnttzdm): Likewise.
8776 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
8777 (UNSPEC_CNTTZDM): Likewise.
8778 (cntlzdm): New insn.
8779 (cnttzdm): Likewise.
8780 * doc/extend.texi (Basic PowerPC Built-in Functions available for
8781 a Future Architecture): Add descriptions of __builtin_cntlzdm and
8782 __builtin_cnttzdm functions.
8784 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8787 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
8789 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8791 * config/rs6000/altivec.h (vec_cfuge): New #define.
8792 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
8793 (vcfuged): New insn.
8794 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
8795 New built-in function.
8796 * config/rs6000/rs6000-call.c (builtin_function_type): Add
8797 handling for FUTURE_BUILTIN_VCFUGED case.
8798 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8799 for a Future Architecture): Add description of vec_cfuge built-in
8802 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8804 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
8806 (BU_FUTURE_MISC_1): Likewise.
8807 (BU_FUTURE_MISC_2): Likewise.
8808 (BU_FUTURE_MISC_3): Likewise.
8809 (__builtin_cfuged): New built-in function definition.
8810 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
8812 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
8813 a Future Architecture): New subsubsection.
8815 2020-05-11 Richard Biener <rguenther@suse.de>
8817 PR tree-optimization/95049
8818 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
8819 between different constants.
8821 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
8823 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
8825 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8826 Bill Schmidt <wschmidt@linux.ibm.com>
8828 * config/rs6000/altivec.h (vec_gnb): New #define.
8829 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
8831 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
8833 (BU_FUTURE_OVERLOAD_2): Likewise.
8834 (BU_FUTURE_OVERLOAD_3): Likewise.
8835 (__builtin_altivec_gnb): New built-in function.
8836 (__buiiltin_vec_gnb): New overloaded built-in function.
8837 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
8838 Define overloaded forms of __builtin_vec_gnb.
8839 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
8840 of __builtin_vec_gnb.
8841 (builtin_function_type): Mark return value and arguments unsigned
8842 for FUTURE_BUILTIN_VGNB.
8843 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
8844 for a Future Architecture): Add description of vec_gnb built-in
8847 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8848 Bill Schmidt <wschmidt@linux.ibm.com>
8850 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
8852 (vec_pext): Likewise.
8853 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
8854 (UNSPEC_VPEXTD): Likewise.
8857 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
8859 (__builtin_altivec_vpextd): Likewise.
8860 * config/rs6000/rs6000-call.c (builtin_function_type): Add
8861 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
8863 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
8864 for a Future Architecture): Add description of vec_pdep and
8865 vec_pext built-in functions.
8867 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
8868 Bill Schmidt <wschmidt@linux.ibm.com>
8870 * config/rs6000/altivec.h (vec_clzm): New macro.
8871 (vec_ctzm): Likewise.
8872 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
8873 (UNSPEC_VCTZDM): Likewise.
8876 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
8877 (BU_FUTURE_V_1): Likewise.
8878 (BU_FUTURE_V_2): Likewise.
8879 (BU_FUTURE_V_3): Likewise.
8880 (__builtin_altivec_vclzdm): New builtin definition.
8881 (__builtin_altivec_vctzdm): Likewise.
8882 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
8883 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
8885 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
8886 value and parameter types to be unsigned for VCLZDM and VCTZDM.
8887 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
8888 support for TARGET_FUTURE flag.
8889 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
8890 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
8891 for a Future Architecture): New subsubsection.
8893 2020-05-11 Richard Biener <rguenther@suse.de>
8895 PR tree-optimization/94988
8896 PR tree-optimization/95025
8897 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
8898 (sm_seq_push_down): Take extra parameter denoting where we
8900 (execute_sm_exit): Re-issue sm_other stores in the correct
8902 (sm_seq_valid_bb): When always executed, allow sm_other to
8903 prevail inbetween sm_ord and record their stored value.
8904 (hoist_memory_references): Adjust refs_not_supported propagation
8905 and prune sm_other from the end of the ordered sequences.
8907 2020-05-11 Felix Yang <felix.yang@huawei.com>
8910 * config/aarch64/aarch64.md (mov<mode>):
8911 Bitcasts to the equivalent integer mode using gen_lowpart
8912 instead of doing FAIL for scalar floating point move.
8914 2020-05-11 Alex Coplan <alex.coplan@arm.com>
8916 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
8917 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
8918 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
8919 (*csinv3_uxtw_insn2): New.
8920 (*csinv3_uxtw_insn3): New.
8921 * config/aarch64/iterators.md (neg_not_cs): New.
8923 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8926 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
8927 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
8928 (*mmx_addv2sf3): Ditto.
8929 (*mmx_subv2sf3): Ditto.
8930 (*mmx_mulv2sf3): Ditto.
8931 (*mmx_<code>v2sf3): Ditto.
8932 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8934 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
8937 * config/i386/i386.c (ix86_vector_mode_supported_p):
8938 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
8939 * config/i386/mmx.md (*mov<mode>_internal): Do not set
8940 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
8942 (mmx_addv2sf3): Change operand predicates from
8943 nonimmediate_operand to register_mmxmem_operand.
8944 (addv2sf3): New expander.
8945 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
8946 predicates from nonimmediate_operand to register_mmxmem_operand.
8947 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8949 (mmx_subv2sf3): Change operand predicate from
8950 nonimmediate_operand to register_mmxmem_operand.
8951 (mmx_subrv2sf3): Ditto.
8952 (subv2sf3): New expander.
8953 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
8954 predicates from nonimmediate_operand to register_mmxmem_operand.
8955 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8957 (mmx_mulv2sf3): Change operand predicates from
8958 nonimmediate_operand to register_mmxmem_operand.
8959 (mulv2sf3): New expander.
8960 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
8961 predicates from nonimmediate_operand to register_mmxmem_operand.
8962 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8964 (mmx_<code>v2sf3): Change operand predicates from
8965 nonimmediate_operand to register_mmxmem_operand.
8966 (<code>v2sf3): New expander.
8967 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
8968 predicates from nonimmediate_operand to register_mmxmem_operand.
8969 Enable instruction pattern for TARGET_MMX_WITH_SSE.
8970 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8972 2020-05-11 Martin Liska <mliska@suse.cz>
8975 * common.opt: Fix typo in option description.
8977 2020-05-11 Martin Liska <mliska@suse.cz>
8979 PR gcov-profile/94928
8980 * gcov-io.h: Add caveat about coverage format parsing and
8981 possible outdated documentation.
8983 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
8985 PR tree-optimization/83403
8986 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
8987 determine_value_range, Add fold conversion of MULT_EXPR, fix the
8990 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
8992 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
8993 __ILP32__ for 32-bit targets.
8995 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
8997 * tree.h (expr_align): Delete.
8998 * tree.c (expr_align): Likewise.
9000 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
9002 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
9003 from end_of_function_needs.
9005 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
9006 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
9008 * config/cris/t-elfmulti: Remove crisv32 multilib.
9009 * config/cris: Remove shared-library and CRIS v32 support.
9011 Move trivially from cc0 to reg:CC model, removing most optimizations.
9012 * config/cris/cris.md: Remove all side-effect patterns and their
9013 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
9014 to all but post-reload control-flow and movem insns. Remove
9015 constraints on all modified expanders. Remove obsoleted cc0-related
9017 (attr "cc"): Remove alternative "rev".
9018 (mode_iterator BWDD, DI_, SI_): New.
9019 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
9020 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
9021 ("mstep_shift", "mstep_mul"): Remove patterns.
9022 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
9023 * config/cris/cris.c: Change all non-condition-code,
9024 non-control-flow emitted insns to add a parallel with clobber of
9025 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
9026 emit_insn to use of emit_move_insn, gen_add2_insn or
9027 cris_emit_insn, as convenient.
9028 (cris_reg_overlap_mentioned_p)
9029 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
9030 (cris_movem_load_rest_p): Don't assume all elements in a
9032 (cris_store_multiple_op_p): Ditto.
9033 (cris_emit_insn): New function.
9034 * cris/cris-protos.h (cris_emit_insn): Declare.
9037 * config/cris/cris.md (zcond): New code_iterator.
9038 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
9040 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
9042 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
9044 * config/cris/cris.md ("movsi"): For memory destination
9045 post-reload, generate clobberless variant. Similarly for a
9046 zero-source post-reload.
9047 ("*mov_tomem<mode>_split"): New split.
9048 ("*mov_tomem<mode>"): New insn.
9049 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
9050 "Q>m" for less-than-SImode.
9051 ("*mov_fromzero<mode>_split"): New split.
9052 ("*mov_fromzero<mode>"): New insn.
9054 Prepare for cmpelim pass to eliminate redundant compare insns.
9055 * config/cris/cris-modes.def: New file.
9056 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
9057 (cris_notice_update_cc): Remove left-over declaration.
9058 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
9059 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
9060 * config/cris/cris.h (SELECT_CC_MODE): Define.
9061 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
9063 (cond): New code_iterator.
9064 (nzcond): Replacement for incorrect ncond. All callers changed.
9065 (nzvccond): Replacement for ocond. All callers changed.
9066 (rnzcond): Replacement for rcond. All callers changed.
9067 (xCC): New code_attr.
9068 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
9070 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
9071 CCmode with iteration over NZVCSET.
9072 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
9074 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
9075 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
9076 ("*btst<mode>"): Similarly, from "*btst".
9077 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
9078 iterating over cond instead of matching the comparison with
9079 ordered_comparison_operator.
9080 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
9081 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
9083 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
9084 NZVCUSE. Remove FIXME.
9085 ("*b<nzcond:code>_reversed<mode>"): Similarly from
9086 "*b<ncond:code>_reversed", over NZUSE.
9087 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
9088 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
9089 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
9090 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9091 depending on CC_NZmode vs. CCmode. Remove FIXME.
9092 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
9093 "*b<rcond:code>_reversed", over NZUSE.
9094 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
9095 iterating over cond instead of matching the comparison with
9096 ordered_comparison_operator.
9097 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
9098 iterating over NZUSE.
9099 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
9100 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
9101 depending on CC_NZmode vs. CCmode.
9102 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
9103 NZVCUSE. Remove FIXME.
9104 ("cc"): Comment on new use.
9105 ("cc_enabled"): New attribute.
9106 ("enabled"): Make default fall back to cc_enabled.
9107 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
9108 default_subst_attrs.
9109 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
9110 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
9111 "*movsi_internal". Correct contents of, and rename attribute
9112 "cc" to "cc<cccc><ccnz><ccnzvc>".
9113 ("anz", "anzvc", "acc"): New define_subst_attrs.
9114 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
9115 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
9116 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
9117 "movqi". Correct contents of, and rename "cc" attribute to
9118 "cc<cccc><ccnz><ccnzvc>".
9119 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
9120 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
9121 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
9122 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
9123 Rename from "extend<mode>si2".
9124 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
9125 Similar, from "zero_extend<mode>si2".
9126 ("*adddi3<setnz>"): Rename from "*adddi3".
9127 ("*subdi3<setnz>"): Similarly from "*subdi3".
9128 ("*addsi3<setnz>"): Similarly from "*addsi3".
9129 ("*subsi3<setnz>"): Similarly from "*subsi3".
9130 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
9131 "cc" attribute to "cc<ccnz>".
9132 ("*addqi3<setnz>"): Similarly from "*addqi3".
9133 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
9134 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
9136 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
9137 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
9138 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
9139 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
9140 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
9141 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
9142 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
9143 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
9145 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
9147 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
9149 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
9151 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
9153 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
9155 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
9156 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
9157 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
9158 (znnCC, rznnCC): New code_attrs.
9159 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
9160 obseolete comment. Add belt-and-suspenders mode-test to condition.
9161 Add fixme regarding remaining matched-but-not-generated case.
9162 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
9163 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
9164 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
9165 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
9166 Handle output of CC_ZnNmode.
9167 ("*b<nzcond:code>_reversed<mode>"): Ditto.
9169 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
9170 NEG too. Correct comment.
9171 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
9174 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
9176 * ira-color.c (update_costs_from_allocno): Remove
9177 conflict_cost_update_p argument. Propagate costs only along
9178 threads. Always do conflict cost update. Add printing debugging
9180 (update_costs_from_copies): Add printing debugging info.
9181 (restore_costs_from_copies): Ditto.
9182 (assign_hard_reg): Improve debug info.
9183 (push_only_colorable): Ditto. Call update_costs_from_prefs.
9184 (color_allocnos): Remove update_costs_from_prefs.
9186 2020-05-08 Richard Biener <rguenther@suse.de>
9188 * tree-vectorizer.h (vec_info::slp_loads): New.
9189 (vect_optimize_slp): Declare.
9190 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
9191 nothing when there are no loads.
9192 (vect_gather_slp_loads): Gather loads into a vector.
9193 (vect_supported_load_permutation_p): Remove.
9194 (vect_analyze_slp_instance): Do not verify permutation
9196 (vect_analyze_slp): Optimize permutations of reductions
9197 after all SLP instances have been gathered and gather
9199 (vect_optimize_slp): New function split out from
9200 vect_supported_load_permutation_p. Elide some permutations.
9201 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
9202 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
9203 * tree-vect-stmts.c (vectorizable_load): Check whether
9204 the load can be permuted. When generating code assert we can.
9206 2020-05-08 Richard Biener <rguenther@suse.de>
9208 * tree-ssa-sccvn.c (rpo_avail): Change type to
9209 eliminate_dom_walker *.
9210 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
9211 use the DOM walker availability.
9212 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
9213 with vn_valueize as valueization callback.
9214 (vn_reference_maybe_forwprop_address): Likewise.
9215 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
9216 array_ref_low_bound.
9218 2020-05-08 Jakub Jelinek <jakub@redhat.com>
9220 PR tree-optimization/94786
9221 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
9225 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
9229 * tree.c (get_narrower): Reuse the op temporary instead of
9232 PR tree-optimization/94783
9233 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
9236 PR tree-optimization/94956
9237 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
9238 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
9240 PR tree-optimization/94913
9241 * match.pd (A - B + -1 >= A to B >= A): New simplification.
9242 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
9243 true for TYPE_UNSIGNED integral types.
9246 PR rtl-optimization/94516
9247 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
9249 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
9250 Call df_notes_rescan if that argument is not true and returning true.
9251 * combine.c (adjust_for_new_dest): Pass true as second argument to
9252 remove_reg_equal_equiv_notes.
9253 * postreload.c (reload_combine_recognize_pattern): Don't call
9256 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9258 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
9260 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
9261 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
9262 (*neg_ne_<mode>): Likewise.
9264 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
9266 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
9268 (*setbcr_<un>signed_<GPR:mode>): Likewise.
9269 (cstore<mode>4): Use setbc[r] if available.
9270 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
9271 (eq<mode>3): Use setbc for TARGET_FUTURE.
9272 (*eq<mode>3): Avoid for TARGET_FUTURE.
9273 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
9274 else for non-Pmode, use gen_eq and gen_xor.
9275 (*ne<mode>3): Avoid for TARGET_FUTURE.
9276 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
9278 2020-05-07 Jeff Law <law@redhat.com>
9280 * config/h8300/h8300.md: Move expanders and patterns into
9281 files based on functionality.
9282 * config/h8300/addsub.md: New file.
9283 * config/h8300/bitfield.md: New file
9284 * config/h8300/combiner.md: New file
9285 * config/h8300/divmod.md: New file
9286 * config/h8300/extensions.md: New file
9287 * config/h8300/jumpcall.md: New file
9288 * config/h8300/logical.md: New file
9289 * config/h8300/movepush.md: New file
9290 * config/h8300/multiply.md: New file
9291 * config/h8300/other.md: New file
9292 * config/h8300/proepi.md: New file
9293 * config/h8300/shiftrotate.md: New file
9294 * config/h8300/testcompare.md: New file
9296 * config/h8300/h8300.md (adds/subs splitters): Merge into single
9298 (negation expanders and patterns): Simplify and combine using
9300 (one_cmpl expanders and patterns): Likewise.
9301 (tablejump, indirect_jump patterns ): Likewise.
9302 (shift and rotate expanders and patterns): Likewise.
9303 (absolute value expander and pattern): Drop expander, rename pattern
9305 (peephole2 patterns): Move into...
9306 * config/h8300/peepholes.md: New file.
9308 * config/h8300/constraints.md (L and N): Simplify now that we're not
9309 longer supporting the original H8/300 chip.
9310 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
9311 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
9312 (shift_alg_hi, shift_alg_si): Similarly.
9313 (h8300_option_overrides): Similarly. Default to H8/300H. If
9314 compiling for H8/S, then turn off H8/300H. Do not update the
9315 shift_alg tables for H8/300 port.
9316 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
9318 (push, split_adds_subs, h8300_rtx_costs): Likewise.
9319 (h8300_print_operand, compute_mov_length): Likewise.
9320 (output_plussi, compute_plussi_length): Likewise.
9321 (compute_plussi_cc, output_logical_op): Likewise.
9322 (compute_logical_op_length, compute_logical_op_cc): Likewise.
9323 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
9324 (output_a_shift, compute_a_shift_length): Likewise.
9325 (output_a_rotate, compute_a_rotate_length): Likewise.
9326 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
9327 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
9328 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
9329 (attr_cpu, TARGET_H8300): Remove.
9330 (TARGET_DEFAULT): Update.
9331 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
9332 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
9333 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
9334 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
9335 * config/h8300/h8300.md: Simplify patterns throughout.
9336 * config/h8300/t-h8300: Update multilib configuration.
9338 * config/h8300/h8300.h (LINK_SPEC): Remove.
9339 (USER_LABEL_PREFIX): Likewise.
9341 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
9342 (h8300_option_override): Remove remnants of COFF support.
9344 2020-05-07 Alan Modra <amodra@gmail.com>
9346 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
9347 set_rtx_cost with set_src_cost.
9348 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
9350 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
9352 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
9353 redundant half vector handlings for no peeling gaps.
9355 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
9357 * tree-ssa-operands.c (operands_scanner): New class.
9358 (operands_bitmap_obstack): Remove.
9359 (n_initialized): Remove.
9360 (build_uses): Move to operands_scanner class.
9361 (build_vuse): Same as above.
9362 (build_vdef): Same as above.
9363 (verify_ssa_operands): Same as above.
9364 (finalize_ssa_uses): Same as above.
9365 (cleanup_build_arrays): Same as above.
9366 (finalize_ssa_stmt_operands): Same as above.
9367 (start_ssa_stmt_operands): Same as above.
9368 (append_use): Same as above.
9369 (append_vdef): Same as above.
9370 (add_virtual_operand): Same as above.
9371 (add_stmt_operand): Same as above.
9372 (get_mem_ref_operands): Same as above.
9373 (get_tmr_operands): Same as above.
9374 (maybe_add_call_vops): Same as above.
9375 (get_asm_stmt_operands): Same as above.
9376 (get_expr_operands): Same as above.
9377 (parse_ssa_operands): Same as above.
9378 (finalize_ssa_defs): Same as above.
9379 (build_ssa_operands): Same as above, plus create a C-like wrapper.
9380 (update_stmt_operands): Create an instance of operands_scanner.
9382 2020-05-07 Richard Biener <rguenther@suse.de>
9385 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
9386 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
9387 (refered_from_nonlocal_var): Likewise.
9388 (ipa_pta_execute): Likewise.
9390 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
9392 * gcc/tree-ssa-struct-alias.c: Fix comments
9394 2020-05-07 Martin Liska <mliska@suse.cz>
9396 * doc/invoke.texi: Fix 2 optindex entries.
9398 2020-05-07 Richard Biener <rguenther@suse.de>
9401 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
9402 (tree_decl_common::not_gimple_reg_flag): ... to this.
9403 * tree.h (DECL_GIMPLE_REG_P): Rename ...
9404 (DECL_NOT_GIMPLE_REG_P): ... to this.
9405 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
9406 (create_tmp_reg): Simplify.
9407 (create_tmp_reg_fn): Likewise.
9408 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
9409 * gimplify.c (create_tmp_from_val): Simplify.
9410 (gimplify_bind_expr): Likewise.
9411 (gimplify_compound_literal_expr): Likewise.
9412 (gimplify_function_tree): Likewise.
9413 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
9414 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
9415 (asan_add_global): Copy it.
9416 * cgraphunit.c (cgraph_node::expand_thunk): Force args
9418 * function.c (gimplify_parameters): Copy
9419 DECL_NOT_GIMPLE_REG_P.
9420 * ipa-param-manipulation.c
9421 (ipa_param_body_adjustments::common_initialization): Simplify.
9422 (ipa_param_body_adjustments::reset_debug_stmts): Copy
9423 DECL_NOT_GIMPLE_REG_P.
9424 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
9425 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
9426 * tree-cfg.c (make_blocks_1): Simplify.
9427 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
9428 * tree-eh.c (lower_eh_constructs_2): Simplify.
9429 * tree-inline.c (declare_return_variable): Adjust and
9431 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
9432 (copy_result_decl_to_var): Likewise.
9433 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
9434 * tree-nested.c (create_tmp_var_for): Simplify.
9435 * tree-parloops.c (separate_decls_in_region_name): Copy
9436 DECL_NOT_GIMPLE_REG_P.
9437 * tree-sra.c (create_access_replacement): Adjust and
9438 generalize partial def support.
9439 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
9440 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
9441 * tree-ssa.c (maybe_optimize_var): Handle clearing of
9442 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
9444 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
9445 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
9446 DECL_NOT_GIMPLE_REG_P.
9447 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
9448 * cfgexpand.c (avoid_type_punning_on_regs): New.
9449 (discover_nonconstant_array_refs): Call
9450 avoid_type_punning_on_regs to avoid unsupported mode punning.
9452 2020-05-07 Alex Coplan <alex.coplan@arm.com>
9454 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
9457 2020-05-07 Richard Biener <rguenther@suse.de>
9459 PR tree-optimization/57359
9460 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
9461 (in_mem_ref::dep_loop): Repurpose.
9462 (LOOP_DEP_BIT): Remove.
9463 (enum dep_kind): New.
9464 (enum dep_state): Likewise.
9465 (record_loop_dependence): New function to populate the
9467 (query_loop_dependence): New function to query the dependence
9469 (memory_accesses::refs_in_loop): Rename to ...
9470 (memory_accesses::refs_loaded_in_loop): ... this and change to
9472 (outermost_indep_loop): Adjust.
9473 (mem_ref_alloc): Likewise.
9474 (gather_mem_refs_stmt): Likewise.
9475 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
9476 (struct sm_aux): New.
9477 (execute_sm): Split code generation on exits, record state
9479 (enum sm_kind): New.
9480 (execute_sm_exit): Exit code generation part.
9481 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
9482 dependence checking on stores reached from exits.
9483 (sm_seq_valid_bb): New function gathering SM stores on exits.
9484 (hoist_memory_references): Re-implement.
9485 (refs_independent_p): Add tbaa_p parameter and pass it down.
9486 (record_dep_loop): Remove.
9487 (ref_indep_loop_p_1): Fold into ...
9488 (ref_indep_loop_p): ... this and generalize for three kinds
9489 of dependence queries.
9490 (can_sm_ref_p): Adjust according to hoist_memory_references
9492 (store_motion_loop): Don't do anything if the set of SM
9493 candidates is empty.
9494 (tree_ssa_lim_initialize): Adjust.
9495 (tree_ssa_lim_finalize): Likewise.
9497 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
9498 Pierre-Marie de Rodat <derodat@adacore.com>
9500 * dwarf2out.c (add_data_member_location_attribute): Take into account
9501 the variant part offset in the computation of the data bit offset.
9502 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
9503 in the call to field_byte_offset.
9504 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
9505 confusing assertion.
9506 (analyze_variant_discr): Deal with boolean subtypes.
9508 2020-05-07 Martin Liska <mliska@suse.cz>
9510 * lto-wrapper.c: Split arguments of MAKE environment
9513 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
9515 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
9516 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
9517 fenv_var and new_fenv_var.
9519 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9522 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
9524 (avx512dq_vextract<shuffletype>64x2_1_maskm,
9525 avx512f_vextract<shuffletype>32x4_1_maskm,
9526 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
9527 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
9529 (*avx512dq_vextract<shuffletype>64x2_1,
9530 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
9531 define_insns. Even in the masked variant allow memory output but in
9532 that case use 0 rather than 0C constraint on the source of masked-out
9534 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
9536 (*avx512f_vextract<shuffletype>32x4_1,
9537 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
9538 Even in the masked variant allow memory output but in that case use
9539 0 rather than 0C constraint on the source of masked-out elts.
9540 (vec_extract_lo_<mode><mask_name>): Split into ...
9541 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
9542 define_insns. Even in the masked variant allow memory output but in
9543 that case use 0 rather than 0C constraint on the source of masked-out
9545 (vec_extract_hi_<mode><mask_name>): Split into ...
9546 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
9547 define_insns. Even in the masked variant allow memory output but in
9548 that case use 0 rather than 0C constraint on the source of masked-out
9551 2020-05-06 qing zhao <qing.zhao@oracle.com>
9554 * common.opt: Add -flarge-source-files.
9555 * doc/invoke.texi: Document it.
9556 * toplev.c (process_options): set line_table->default_range_bits
9557 to 0 when flag_large_source_files is true.
9559 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
9562 * config/i386/predicates.md (add_comparison_operator): New predicate.
9563 * config/i386/i386.md (compare->add splitter): New splitters.
9565 2020-05-06 Richard Biener <rguenther@suse.de>
9567 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
9568 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
9569 Remove slp_instance parameter, just iterate over all scalar stmts.
9570 (vect_slp_analyze_instance_dependence): Adjust and likewise.
9571 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
9573 (vect_schedule_slp): Just iterate over all scalar stmts.
9574 (vect_supported_load_permutation_p): Adjust.
9575 (vect_transform_slp_perm_load): Remove slp_instance parameter,
9576 instead use the number of lanes in the node as group size.
9577 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
9578 factor instead of slp_instance as parameter.
9579 (vectorizable_load): Adjust.
9581 2020-05-06 Andreas Schwab <schwab@suse.de>
9583 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
9584 (aarch64_get_extension_string_for_isa_flags): Don't declare.
9586 2020-05-06 Richard Biener <rguenther@suse.de>
9589 * cfgloopmanip.c (create_preheader): Require non-complex
9590 preheader edge for CP_SIMPLE_PREHEADERS.
9592 2020-05-06 Richard Biener <rguenther@suse.de>
9594 PR tree-optimization/94963
9595 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
9596 no-warning marking of the conditional store.
9597 (execute_sm): Instead mark the uninitialized state
9598 on loop entry to be not warned about.
9600 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
9602 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
9603 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
9604 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
9605 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
9607 * config/i386/i386-builtin.def: Add new builtins.
9608 * config/i386/i386-c.c (ix86_target_macros_internal): Define
9610 * config/i386/i386-options.c (ix86_target_string): Add
9612 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
9613 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
9615 * config/i386/i386.md (define_c_enum "unspec"): Add
9616 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
9617 (TSXLDTRK): New define_int_iterator.
9618 ("<tsxldtrk>"): New define_insn.
9619 * config/i386/i386.opt: Add -mtsxldtrk.
9620 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
9621 * config/i386/tsxldtrkintrin.h: New.
9622 * doc/invoke.texi: Document -mtsxldtrk.
9624 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9626 PR tree-optimization/94921
9627 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
9630 2020-05-06 Richard Biener <rguenther@suse.de>
9632 PR tree-optimization/94965
9633 * tree-vect-stmts.c (vectorizable_load): Fix typo.
9635 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9637 * doc/install.texi: Replace Sun with Solaris as appropriate.
9638 (Tools/packages necessary for building GCC, Perl version between
9639 5.6.1 and 5.6.24): Remove Solaris 8 reference.
9640 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
9642 (Specific, i?86-*-solaris2*): Update version references for
9643 Solaris 11.3 and later. Remove gas 2.26 caveat.
9644 (Specific, *-*-solaris2*): Update version references for
9645 Solaris 11.3 and later. Remove boehm-gc reference.
9646 Document GMP, MPFR caveats on Solaris 11.3.
9647 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
9648 (Specific, sparc64-*-solaris2*): Likewise.
9649 Document --build requirement.
9651 2020-05-06 Jakub Jelinek <jakub@redhat.com>
9654 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
9655 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
9657 PR rtl-optimization/94873
9658 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
9659 note if SET_SRC (set) has side-effects.
9661 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
9662 Wei Xiao <wei3.xiao@intel.com>
9664 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
9665 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
9666 (ix86_handle_option): Handle -mserialize.
9667 * config.gcc (serializeintrin.h): New header file.
9668 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
9669 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
9671 * config/i386/i386-builtin.def: Add new builtin.
9672 * config/i386/i386-c.c (__SERIALIZE__): New macro.
9673 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
9675 * (ix86_valid_target_attribute_inner_p): Add target attribute
9677 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
9679 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
9680 (serialize): New define_insn.
9681 * config/i386/i386.opt (mserialize): New option
9682 * config/i386/immintrin.h: Include serailizeintrin.h.
9683 * config/i386/serializeintrin.h: New header file.
9684 * doc/invoke.texi: Add documents for -mserialize.
9686 2020-05-06 Richard Biener <rguenther@suse.de>
9688 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
9689 to/from pointer conversion checking.
9691 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
9693 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
9695 * config/rs6000/rs6000-c.c: Likewise.
9696 * config/rs6000/rs6000-call.c: Likewise.
9697 * config/rs6000/rs6000.c: Likewise.
9699 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
9701 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
9702 (RTEMS_ENDFILE_SPEC): Likewise.
9703 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
9704 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
9705 (LIB_SPECS): Support -nodefaultlibs option.
9706 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
9707 (RTEMS_ENDFILE_SPEC): Likewise.
9708 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
9709 (RTEMS_ENDFILE_SPEC): Likewise.
9710 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
9711 (RTEMS_ENDFILE_SPEC): Likewise.
9713 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9715 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
9716 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
9718 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9720 * config/pru/pru.h: Mark R3.w0 as caller saved.
9722 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9724 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
9725 and gen_doloop_begin_internal.
9726 (pru_reorg_loop): Use gen_pruloop with mode.
9727 * config/pru/pru.md: Use new @insn syntax.
9729 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
9731 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
9733 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
9735 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
9736 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
9737 (addqi3_cconly_overflow): Ditto.
9738 (umulv<mode>4): Ditto.
9739 (<s>mul<mode>3_highpart): Ditto.
9740 (tls_global_dynamic_32): Ditto.
9741 (tls_local_dynamic_base_32): Ditto.
9748 (*adddi_4): Remove "m" constraint from scratch operand.
9749 (*add<mode>_4): Ditto.
9751 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9753 PR rtl-optimization/94516
9754 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
9755 with sp = reg, add REG_EQUAL note with sp + const.
9756 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
9757 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
9758 postreload sp = sp + const to sp = reg optimization if needed and
9760 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
9761 reg = sp insn with sp + const REG_EQUAL note. Adjust
9762 try_apply_stack_adjustment caller, call
9763 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
9764 (combine_stack_adjustments): Allocate and free LIVE bitmap,
9765 adjust combine_stack_adjustments_for_block caller.
9767 2020-05-05 Martin Liska <mliska@suse.cz>
9769 PR gcov-profile/93623
9770 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
9773 2020-05-05 Martin Liska <mliska@suse.cz>
9775 * opt-functions.awk (opt_args_non_empty): New function.
9776 * opt-read.awk: Use the function for various option arguments.
9778 2020-05-05 Martin Liska <mliska@suse.cz>
9781 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
9782 report warning when the jobserver is not detected.
9784 2020-05-05 Martin Liska <mliska@suse.cz>
9786 PR gcov-profile/94636
9787 * gcov.c (main): Print total lines summary at the end.
9788 (generate_results): Expect file_name always being non-null.
9789 Print newline after intermediate file is printed in order to align with
9790 what we do for normal files.
9792 2020-05-05 Martin Liska <mliska@suse.cz>
9794 * dumpfile.c (dump_switch_p): Change return type
9795 and print option suggestion.
9796 * dumpfile.h: Change return type.
9797 * opts-global.c (handle_common_deferred_options):
9798 Move error into dump_switch_p function.
9800 2020-05-05 Martin Liska <mliska@suse.cz>
9803 * alloc-pool.h: Use const for some arguments.
9804 * bitmap.h: Likewise.
9805 * mem-stats.h: Likewise.
9806 * sese.h (get_entry_bb): Likewise.
9807 (get_exit_bb): Likewise.
9809 2020-05-05 Richard Biener <rguenther@suse.de>
9811 * tree-vect-slp.c (struct vdhs_data): New.
9812 (vect_detect_hybrid_slp): New walker.
9813 (vect_detect_hybrid_slp): Rewrite.
9815 2020-05-05 Richard Biener <rguenther@suse.de>
9818 * tree-ssa-structalias.c (ipa_pta_execute): Use
9819 varpool_node::externally_visible_p ().
9820 (refered_from_nonlocal_var): Likewise.
9822 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
9824 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
9825 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
9826 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
9828 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
9830 * gimplify.c (gimplify_init_constructor): Do not put the constructor
9831 into static memory if it is not complete.
9833 2020-05-05 Richard Biener <rguenther@suse.de>
9835 PR tree-optimization/94949
9836 * tree-ssa-loop-im.c (execute_sm): Check whether we use
9837 the multithreaded model or always compute the stored value
9838 before eliding a load.
9840 2020-05-05 Alex Coplan <alex.coplan@arm.com>
9842 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
9844 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9846 PR tree-optimization/94800
9847 * match.pd (X + (X << C) to X * (1 + (1 << C)),
9848 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
9852 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
9854 PR tree-optimization/94914
9855 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
9858 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
9860 * config/i386/i386.md (*testqi_ext_3): Use
9861 int_nonimmediate_operand instead of manual mode checks.
9862 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
9863 Use int_nonimmediate_operand predicate. Rewrite
9864 define_insn_and_split pattern to a combine pass splitter.
9866 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9868 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
9869 * configure: Regenerate.
9871 2020-05-05 Jakub Jelinek <jakub@redhat.com>
9874 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
9875 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
9876 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
9877 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
9879 2020-05-04 Clement Chigot <clement.chigot@atos.net>
9880 David Edelsohn <dje.gcc@gmail.com>
9882 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
9883 for fmodl, frexpl, ldexpl and modfl builtins.
9885 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
9888 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
9889 chosen lhs is different from the gcall lhs.
9890 (expand_mask_load_optab_fn): Likewise.
9891 (expand_gather_load_optab_fn): Likewise.
9893 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
9896 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
9897 (EQ compare->LTU compare splitter): New splitter.
9898 (NE compare->NEG splitter): Ditto.
9900 2020-05-04 Marek Polacek <polacek@redhat.com>
9903 2020-04-30 Marek Polacek <polacek@redhat.com>
9906 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
9907 (check_aligned_type): Check if TYPE_USER_ALIGN match.
9909 2020-05-04 Richard Biener <rguenther@suse.de>
9911 PR tree-optimization/93891
9912 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
9913 the original reference tree for assessing access alignment.
9915 2020-05-04 Richard Biener <rguenther@suse.de>
9917 PR tree-optimization/39612
9918 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
9919 (set_ref_loaded_in_loop): New.
9920 (mark_ref_loaded): Likewise.
9921 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
9922 (execute_sm): Avoid issueing a load when it was not there.
9923 (execute_sm_if_changed): Avoid issueing warnings for the
9926 2020-05-04 Martin Jambor <mjambor@suse.cz>
9929 * tree-inline.c (tree_function_versioning): Leave any type conversion
9930 of replacements to setup_one_parameter and its friend
9931 force_value_to_type.
9933 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
9936 * config/i386/predicates.md (shr_comparison_operator): New predicate.
9937 * config/i386/i386.md (compare->shr splitter): New splitters.
9939 2020-05-04 Jakub Jelinek <jakub@redhat.com>
9941 PR tree-optimization/94718
9942 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
9944 PR tree-optimization/94718
9945 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
9946 replace two nop conversions on bit_{and,ior,xor} argument
9947 and result with just one conversion on the result or another argument.
9949 PR tree-optimization/94718
9950 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
9951 -> (X ^ Y) & C eqne 0 optimization to ...
9952 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
9954 * opts.c (get_option_html_page): Instead of hardcoding a list of
9955 options common between C/C++ and Fortran only use gfortran/
9956 documentation for warnings that have CL_Fortran set but not
9959 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
9961 * config/i386/i386-expand.c (ix86_expand_int_movcc):
9962 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
9963 (emit_memmov): Ditto.
9964 (emit_memset): Ditto.
9965 (ix86_expand_strlensi_unroll_1): Ditto.
9966 (release_scratch_register_on_entry): Ditto.
9967 (gen_frame_set): Ditto.
9968 (ix86_emit_restore_reg_using_pop): Ditto.
9969 (ix86_emit_outlined_ms2sysv_restore): Ditto.
9970 (ix86_expand_epilogue): Ditto.
9971 (ix86_expand_split_stack_prologue): Ditto.
9972 * config/i386/i386.md (push immediate splitter): Ditto.
9976 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
9978 PR translation/93861
9979 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
9982 2020-05-02 Jakub Jelinek <jakub@redhat.com>
9984 * config/tilegx/tilegx.md
9985 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
9986 rather than just <n>.
9988 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
9991 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
9992 and crtl->patch_area_entry.
9993 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
9994 * opts.c (common_handle_option): Limit
9995 function_entry_patch_area_size and function_entry_patch_area_start
9996 to USHRT_MAX. Fix a typo in error message.
9997 * varasm.c (assemble_start_function): Use crtl->patch_area_size
9998 and crtl->patch_area_entry.
9999 * doc/invoke.texi: Document the maximum value for
10000 -fpatchable-function-entry.
10002 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
10004 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
10005 Override SUBTARGET_SHADOW_OFFSET macro.
10007 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
10009 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
10010 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
10011 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
10012 * config/i386/freebsd.h: Likewise.
10013 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
10014 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
10016 2020-04-30 Alexandre Oliva <oliva@adacore.com>
10018 * doc/sourcebuild.texi (Effective-Target Keywords): Document
10019 the newly-introduced fileio effective target.
10021 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
10023 PR rtl-optimization/94740
10024 * cse.c (cse_process_notes_1): Replace with...
10025 (cse_process_note_1): ...this new function, acting as a
10026 simplify_replace_fn_rtx callback to process_note. Handle only
10027 REGs and MEMs directly. Validate the MEM if cse_process_note
10028 changes its address.
10029 (cse_process_notes): Replace with...
10030 (cse_process_note): ...this new function.
10031 (cse_extended_basic_block): Update accordingly, iterating over
10032 the register notes and passing individual notes to cse_process_note.
10034 2020-04-30 Carl Love <cel@us.ibm.com>
10036 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
10038 2020-04-30 Martin Jambor <mjambor@suse.cz>
10041 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
10042 saved by the inliner and thunks which had their call inlined.
10043 * ipa-inline-transform.c (save_inline_function_body): Fill in
10044 former_clone_of of new body holders.
10046 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10048 * BASE-VER: Set to 11.0.0.
10050 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
10052 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
10054 2020-04-30 Marek Polacek <polacek@redhat.com>
10057 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
10058 (check_aligned_type): Check if TYPE_USER_ALIGN match.
10060 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10062 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
10063 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
10064 * doc/invoke.texi (moutline-atomics): Document as on by default.
10066 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
10069 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
10070 the check for NOTE_INSN_DELETED_LABEL.
10072 2020-04-30 Jakub Jelinek <jakub@redhat.com>
10074 * configure.ac (--with-documentation-root-url,
10075 --with-changes-root-url): Diagnose URL not ending with /,
10076 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
10077 * opts.h (get_changes_url): Remove.
10078 * opts.c (get_changes_url): Remove.
10079 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
10080 or -DCHANGES_ROOT_URL.
10081 * doc/install.texi (--with-documentation-root-url,
10082 --with-changes-root-url): Document.
10083 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
10084 get_changes_url and free, change url variable type to const char * and
10085 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
10086 * config/s390/s390.c (s390_function_arg_vector,
10087 s390_function_arg_float): Likewise.
10088 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10090 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10092 * config.in: Regenerate.
10093 * configure: Regenerate.
10095 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
10098 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
10100 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
10102 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
10103 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
10105 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
10107 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
10108 Change constraint for vlrl/vstrl to jb4.
10110 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10112 * var-tracking.c (vt_initialize): Move variables pre and post
10113 into inner block and initialize both in order to fix warning
10114 about uninitialized use. Remove unnecessary checks for
10115 frame_pointer_needed.
10117 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10119 * toplev.c (output_stack_usage_1): Ensure that first
10120 argument to fprintf is not null.
10122 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10124 * configure.ac (-with-changes-root-url): New configure option,
10125 defaulting to https://gcc.gnu.org/.
10126 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
10128 * pretty-print.c (get_end_url_string): New function.
10129 (pp_format): Handle %{ and %} for URLs.
10130 (pp_begin_url): Use pp_string instead of pp_printf.
10131 (pp_end_url): Use get_end_url_string.
10132 * opts.h (get_changes_url): Declare.
10133 * opts.c (get_changes_url): New function.
10134 * config/rs6000/rs6000-call.c: Include opts.h.
10135 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
10136 of just in GCC 10.1 in diagnostics and add URL.
10137 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
10138 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
10140 * config/s390/s390.c (s390_function_arg_vector,
10141 s390_function_arg_float): Likewise.
10142 * configure: Regenerated.
10145 * config/s390/s390.c (s390_function_arg_vector,
10146 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
10147 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
10148 passed to the function rather than the type of the single element.
10149 Rename cxx17_empty_base_seen variable to empty_base_seen, change
10150 type to int, and adjust diagnostics depending on if the field
10151 has [[no_unique_attribute]] or not.
10154 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
10155 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
10156 used in casts into parens.
10157 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
10158 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
10159 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
10160 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
10161 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
10162 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
10163 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
10164 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
10165 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
10166 _mm256_mask_cmp_epu8_mask): Likewise.
10167 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
10168 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
10169 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
10170 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
10173 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
10174 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
10175 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
10176 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
10177 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
10178 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
10179 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
10180 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
10181 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
10182 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
10183 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
10184 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
10185 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
10187 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
10188 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
10189 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
10190 as mask vector containing -1.0 or -1.0f elts, but instead vector
10191 with all bits set using _mm*_cmpeq_p? with zero operands.
10192 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
10193 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
10194 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
10195 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
10196 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
10197 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
10198 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
10199 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
10200 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
10201 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
10202 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
10203 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
10204 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
10205 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
10206 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
10207 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
10208 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
10210 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
10211 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
10212 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
10213 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
10214 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
10215 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
10216 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
10217 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
10218 _mm512_mask_prefetch_i64scatter_ps): Likewise.
10219 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
10220 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
10221 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
10222 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
10223 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
10224 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
10225 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
10226 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
10227 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
10228 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
10229 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
10230 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
10231 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
10232 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
10233 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
10234 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
10235 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
10236 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
10237 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
10238 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
10239 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
10240 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
10241 _mm_mask_i64scatter_epi64): Likewise.
10243 2020-04-29 Jeff Law <law@redhat.com>
10245 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
10246 division instructions are 4 bytes long.
10248 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10251 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
10252 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10253 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
10254 take address of TARGET_EXPR of fenv_var with void_node initializer.
10257 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10259 PR tree-optimization/94774
10260 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
10263 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10265 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
10266 * calls.c (cxx17_empty_base_field_p): New function. Check
10267 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
10270 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
10273 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
10274 Allow -fcf-protection with -mindirect-branch=thunk-extern and
10275 -mfunction-return=thunk-extern.
10276 * doc/invoke.texi: Update notes for -fcf-protection=branch with
10277 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
10279 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10281 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
10283 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10285 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
10286 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
10287 fenv_var and new_fenv_var.
10289 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10291 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
10292 effective-target keyword.
10293 (arm_arch_v8a_hard_multilib): Likewise.
10294 (arm_arch_v8a_hard): Document new dg-add-options keyword.
10295 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
10296 code is deprecated and has not been updated to handle
10297 DECL_FIELD_ABI_IGNORED.
10298 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10299 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10300 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10301 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10302 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10303 something actually is a HFA or HVA. Record whether we see a
10304 [[no_unique_address]] field that previous GCCs would not have
10305 ignored in this way.
10306 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
10307 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10308 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
10309 diagnostic messages.
10310 (arm_needs_doubleword_align): Add a comment explaining why we
10311 consider even zero-sized fields.
10313 2020-04-29 Richard Biener <rguenther@suse.de>
10314 Li Zekun <lizekun1@huawei.com>
10317 * tree.c (component_ref_size): Guard against error_mark_node
10318 DECL_INITIAL as it happens with LTO.
10320 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
10322 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
10323 comment explaining why we consider even zero-sized fields.
10324 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
10325 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
10326 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
10327 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
10328 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
10329 something actually is a HFA or HVA. Record whether we see a
10330 [[no_unique_address]] field that previous GCCs would not have
10331 ignored in this way.
10332 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
10333 whether diagnostics should be suppressed. Update the calls to
10334 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
10335 [[no_unique_address]] case.
10336 (aarch64_return_in_msb): Update call accordingly, never silencing
10338 (aarch64_function_value): Likewise.
10339 (aarch64_return_in_memory_1): Likewise.
10340 (aarch64_init_cumulative_args): Likewise.
10341 (aarch64_gimplify_va_arg_expr): Likewise.
10342 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
10343 use it to decide whether arch64_vfp_is_call_or_return_candidate
10345 (aarch64_pass_by_reference): Update calls accordingly.
10346 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
10347 to decide whether arch64_vfp_is_call_or_return_candidate should be
10350 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
10353 * config/aarch64/aarch64-builtins.c
10354 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
10355 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
10358 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
10360 * configure.ac <$enable_offload_targets>: Do parsing as done
10362 * configure: Regenerate.
10364 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
10365 * configure: Regenerate.
10368 * rtlanal.c (set_noop_p): Handle non-constant selectors.
10371 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
10373 (TARGET_EXCEPT_UNWIND_INFO): Define.
10375 2020-04-29 Jakub Jelinek <jakub@redhat.com>
10378 * config/gcn/gcn.md (*mov<mode>_insn): Use
10379 'reg_overlap_mentioned_p' to check for overlap.
10382 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
10383 instead of cxx17_empty_base_field_p.
10386 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
10387 DECL_FIELD_ABI_IGNORED.
10388 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
10389 * calls.h (cxx17_empty_base_field_p): Change into a temporary
10390 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
10392 * calls.c (cxx17_empty_base_field_p): Remove.
10393 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
10394 DECL_FIELD_ABI_IGNORED.
10395 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
10396 * lto-streamer-out.c (hash_tree): Likewise.
10397 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
10398 cxx17_empty_base_seen to empty_base_seen, change type to int *,
10399 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
10400 cxx17_empty_base_field_p, if "no_unique_address" attribute is
10401 present, propagate that to the caller too.
10402 (rs6000_discover_homogeneous_aggregate): Adjust
10403 rs6000_aggregate_candidate caller, emit different diagnostics
10404 when c++17 empty base fields are present and when empty
10405 [[no_unique_address]] fields are present.
10406 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
10407 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
10410 2020-04-29 Richard Biener <rguenther@suse.de>
10412 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
10413 Just check whether the stmt stores.
10415 2020-04-28 Alexandre Oliva <oliva@adacore.com>
10418 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
10419 output operand in emulation. Don't overwrite pseudos.
10421 2020-04-28 Jeff Law <law@redhat.com>
10423 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
10424 multiply patterns are 4 bytes long.
10426 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10428 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
10429 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
10431 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
10432 Jakub Jelinek <jakub@redhat.com>
10435 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
10436 base class artificial fields.
10437 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
10438 decision is different after this fix.
10440 2020-04-28 David Malcolm <dmalcolm@redhat.com>
10446 * doc/invoke.texi (Static Analyzer Options): Remove
10447 -Wanalyzer-use-of-uninitialized-value.
10448 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
10450 2020-04-28 Jakub Jelinek <jakub@redhat.com>
10452 PR tree-optimization/94809
10453 * tree.c (build_call_expr_internal_loc_array): Call
10454 process_call_operands.
10456 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
10458 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
10459 * config/aarch64/aarch64-tune.md: Regenerate.
10460 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
10461 (thunderx3t110_regmove_cost): Likewise.
10462 (thunderx3t110_vector_cost): Likewise.
10463 (thunderx3t110_prefetch_tune): Likewise.
10464 (thunderx3t110_tunings): Likewise.
10465 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
10467 * config/aarch64/thunderx3t110.md: New file.
10468 * config/aarch64/aarch64.md: Include thunderx3t110.md.
10469 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
10471 2020-04-28 Jakub Jelinek <jakub@redhat.com>
10474 * config/s390/s390.c (s390_function_arg_vector,
10475 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
10477 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
10479 PR tree-optimization/94727
10480 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
10481 operands are invariant booleans, use the mask type associated with the
10482 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
10483 (vectorizable_condition): Pass vectype unconditionally to
10484 vect_is_simple_cond.
10486 2020-04-27 Jakub Jelinek <jakub@redhat.com>
10489 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
10490 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
10491 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
10493 2020-04-27 David Malcolm <dmalcolm@redhat.com>
10496 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
10497 default value, so that it can by supplied by get_option_html_page.
10498 * configure: Regenerate.
10499 * opts.c: Include "selftest.h".
10500 (get_option_html_page): New function.
10501 (get_option_url): Use it. Reformat to place comments next to the
10502 expressions they refer to.
10503 (selftest::test_get_option_html_page): New.
10504 (selftest::opts_c_tests): New.
10505 * selftest-run-tests.c (selftest::run_tests): Call
10506 selftest::opts_c_tests.
10507 * selftest.h (selftest::opts_c_tests): New decl.
10509 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
10511 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
10512 UINTVAL to CONST_INTs.
10514 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10516 * config/arm/constraints.md (e): Remove constraint.
10517 (Te): Define constraint.
10518 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
10519 operand 0 from "e" to "Te".
10520 (vaddvaq_<supf><mode>): Likewise.
10521 (vaddvq_p_<supf><mode>): Likewise.
10522 (vmladavq_<supf><mode>): Likewise.
10523 (vmladavxq_s<mode>): Likewise.
10524 (vmlsdavq_s<mode>): Likewise.
10525 (vmlsdavxq_s<mode>): Likewise.
10526 (vaddvaq_p_<supf><mode>): Likewise.
10527 (vmladavaq_<supf><mode>): Likewise.
10528 (vmladavq_p_<supf><mode>): Likewise.
10529 (vmladavxq_p_s<mode>): Likewise.
10530 (vmlsdavq_p_s<mode>): Likewise.
10531 (vmlsdavxq_p_s<mode>): Likewise.
10532 (vmlsdavaxq_s<mode>): Likewise.
10533 (vmlsdavaq_s<mode>): Likewise.
10534 (vmladavaxq_s<mode>): Likewise.
10535 (vmladavaq_p_<supf><mode>): Likewise.
10536 (vmladavaxq_p_s<mode>): Likewise.
10537 (vmlsdavaq_p_s<mode>): Likewise.
10538 (vmlsdavaxq_p_s<mode>): Likewise.
10540 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
10542 * config/arm/arm.c (output_move_neon): Only get the first operand if
10545 2020-04-27 Felix Yang <felix.yang@huawei.com>
10547 PR tree-optimization/94784
10548 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
10549 assert around so that it checks that the two vectors have equal
10550 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
10551 types is a useless_type_conversion_p.
10553 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
10556 * dwarf2cfi.c (struct GTY): Add ra_mangled.
10557 (cfi_row_equal_p): Check ra_mangled.
10558 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
10559 this only handles the sparc logic now.
10560 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
10561 the aarch64 specific logic.
10562 (dwarf2out_frame_debug): Update to use the new subroutines.
10563 (change_cfi_row): Check ra_mangled.
10565 2020-04-27 Jakub Jelinek <jakub@redhat.com>
10568 * config/s390/s390.c (s390_function_arg_vector,
10569 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
10571 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
10573 * common/config/rs6000/rs6000-common.c
10574 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
10576 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
10579 2020-04-27 Martin Liska <mliska@suse.cz>
10582 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
10583 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
10585 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
10588 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
10590 (rs6000_emit_prologue_components):
10591 Check with frame_pointer_needed_indeed.
10592 (rs6000_emit_epilogue_components): Likewise.
10593 (rs6000_emit_prologue): Likewise.
10594 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
10596 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
10598 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
10599 stack frame when debugging and flag_compare_debug is enabled.
10601 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
10603 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
10604 enable PC-relative addressing for -mcpu=future.
10605 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
10606 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
10607 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
10608 suppress PC-relative addressing.
10609 (rs6000_option_override_internal): Split up error messages
10610 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
10611 system supports it.
10613 2020-04-25 Jakub Jelinek <jakub@redhat.com>
10614 Richard Biener <rguenther@suse.de>
10616 PR tree-optimization/94734
10617 PR tree-optimization/89430
10618 * tree-ssa-phiopt.c: Include tree-eh.h.
10619 (cond_store_replacement): Return false if an automatic variable
10620 access could trap. If -fstore-data-races, don't return false
10621 just because an automatic variable is addressable.
10623 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
10625 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
10627 (add<mode>_sext_dup2_exec): Likewise.
10629 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
10632 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
10633 endian byteshift_val calculation.
10635 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
10637 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
10639 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
10641 * config/aarch64/arm_sve.h: Add a comment.
10643 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
10645 PR rtl-optimization/94708
10646 * combine.c (simplify_if_then_else): Add check for
10647 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
10649 2020-04-23 Martin Sebor <msebor@redhat.com>
10652 * common.opt (-Wno-frame-larger-than): New option.
10653 (-Wno-larger-than, -Wno-stack-usage): Same.
10655 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
10657 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
10659 (mov<mode>_exec): Likewise.
10660 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
10661 (<convop><mode><vndi>2_exec): Likewise.
10663 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
10665 PR tree-optimization/94717
10666 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
10667 of the stores doesn't have the same landing pad number as the first.
10668 (coalesce_immediate_stores): Do not try to coalesce the store using
10669 bswap if it doesn't have the same landing pad number as the first.
10671 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
10673 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
10674 Replace outdated link to ELFv2 ABI.
10676 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10679 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
10682 PR middle-end/94724
10683 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
10684 temporarily with non-final second operand and updating it later,
10685 push COMPOUND_EXPRs into a vector and process it in reverse,
10686 creating COMPOUND_EXPRs with the final operands.
10688 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
10691 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
10692 bti c and bti j handling.
10694 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
10695 Thomas Schwinge <thomas@codesourcery.com>
10697 PR middle-end/93488
10699 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
10700 t_async and the wait arguments.
10702 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
10704 PR tree-optimization/94727
10705 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
10706 comparing invariant scalar booleans.
10708 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
10709 Jakub Jelinek <jakub@redhat.com>
10712 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
10713 empty base class artificial fields.
10714 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
10715 different after this fix.
10717 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10720 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
10721 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
10722 if the same type has been diagnosed most recently already.
10724 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10726 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
10728 (__arm_vbicq_n_s16): Likewise.
10729 (__arm_vbicq_n_u32): Likewise.
10730 (__arm_vbicq_n_s32): Likewise.
10731 (__arm_vbicq): Likewise.
10732 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
10733 (__arm_vbicq_n_s32): Likewise.
10734 (__arm_vbicq_n_u16): Likewise.
10735 (__arm_vbicq_n_u32): Likewise.
10736 (__arm_vdupq_m_n_s8): Likewise.
10737 (__arm_vdupq_m_n_s16): Likewise.
10738 (__arm_vdupq_m_n_s32): Likewise.
10739 (__arm_vdupq_m_n_u8): Likewise.
10740 (__arm_vdupq_m_n_u16): Likewise.
10741 (__arm_vdupq_m_n_u32): Likewise.
10742 (__arm_vdupq_m_n_f16): Likewise.
10743 (__arm_vdupq_m_n_f32): Likewise.
10744 (__arm_vldrhq_gather_offset_s16): Likewise.
10745 (__arm_vldrhq_gather_offset_s32): Likewise.
10746 (__arm_vldrhq_gather_offset_u16): Likewise.
10747 (__arm_vldrhq_gather_offset_u32): Likewise.
10748 (__arm_vldrhq_gather_offset_f16): Likewise.
10749 (__arm_vldrhq_gather_offset_z_s16): Likewise.
10750 (__arm_vldrhq_gather_offset_z_s32): Likewise.
10751 (__arm_vldrhq_gather_offset_z_u16): Likewise.
10752 (__arm_vldrhq_gather_offset_z_u32): Likewise.
10753 (__arm_vldrhq_gather_offset_z_f16): Likewise.
10754 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
10755 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
10756 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
10757 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
10758 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
10759 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
10760 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
10761 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
10762 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
10763 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
10764 (__arm_vldrwq_gather_offset_s32): Likewise.
10765 (__arm_vldrwq_gather_offset_u32): Likewise.
10766 (__arm_vldrwq_gather_offset_f32): Likewise.
10767 (__arm_vldrwq_gather_offset_z_s32): Likewise.
10768 (__arm_vldrwq_gather_offset_z_u32): Likewise.
10769 (__arm_vldrwq_gather_offset_z_f32): Likewise.
10770 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
10771 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
10772 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
10773 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
10774 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
10775 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
10776 (__arm_vdwdupq_x_n_u8): Likewise.
10777 (__arm_vdwdupq_x_n_u16): Likewise.
10778 (__arm_vdwdupq_x_n_u32): Likewise.
10779 (__arm_viwdupq_x_n_u8): Likewise.
10780 (__arm_viwdupq_x_n_u16): Likewise.
10781 (__arm_viwdupq_x_n_u32): Likewise.
10782 (__arm_vidupq_x_n_u8): Likewise.
10783 (__arm_vddupq_x_n_u8): Likewise.
10784 (__arm_vidupq_x_n_u16): Likewise.
10785 (__arm_vddupq_x_n_u16): Likewise.
10786 (__arm_vidupq_x_n_u32): Likewise.
10787 (__arm_vddupq_x_n_u32): Likewise.
10788 (__arm_vldrdq_gather_offset_s64): Likewise.
10789 (__arm_vldrdq_gather_offset_u64): Likewise.
10790 (__arm_vldrdq_gather_offset_z_s64): Likewise.
10791 (__arm_vldrdq_gather_offset_z_u64): Likewise.
10792 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
10793 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
10794 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
10795 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
10796 (__arm_vidupq_m_n_u8): Likewise.
10797 (__arm_vidupq_m_n_u16): Likewise.
10798 (__arm_vidupq_m_n_u32): Likewise.
10799 (__arm_vddupq_m_n_u8): Likewise.
10800 (__arm_vddupq_m_n_u16): Likewise.
10801 (__arm_vddupq_m_n_u32): Likewise.
10802 (__arm_vidupq_n_u16): Likewise.
10803 (__arm_vidupq_n_u32): Likewise.
10804 (__arm_vidupq_n_u8): Likewise.
10805 (__arm_vddupq_n_u16): Likewise.
10806 (__arm_vddupq_n_u32): Likewise.
10807 (__arm_vddupq_n_u8): Likewise.
10809 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
10811 * doc/install.texi (D-Specific Options): Document
10812 --enable-libphobos-checking and --with-libphobos-druntime-only.
10814 2020-04-23 Jakub Jelinek <jakub@redhat.com>
10817 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
10818 cxx17_empty_base_seen argument. Pass it to recursive calls.
10819 Ignore cxx17_empty_base_field_p fields after setting
10820 *cxx17_empty_base_seen to true.
10821 (rs6000_discover_homogeneous_aggregate): Adjust
10822 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
10823 aggregates with C++17 empty base fields.
10826 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
10827 if last_decl is error_mark_node or has such a TREE_TYPE.
10830 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
10831 if last_decl is error_mark_node or has such a TREE_TYPE.
10833 2020-04-22 Felix Yang <felix.yang@huawei.com>
10836 * config/aarch64/aarch64.h (TARGET_SVE):
10837 Add && !TARGET_GENERAL_REGS_ONLY.
10838 (TARGET_SVE2): Add && TARGET_SVE.
10839 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
10840 TARGET_SVE2_SM4): Add && TARGET_SVE2.
10841 * config/aarch64/aarch64-sve-builtins.h
10842 (sve_switcher::m_old_general_regs_only): New member.
10843 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
10845 (reported_missing_registers_p): New variable.
10846 (check_required_extensions): Call check_required_registers before
10847 return if all required extenstions are present.
10848 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
10849 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
10850 global_options.x_target_flags.
10851 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
10852 global_options.x_target_flags if m_old_general_regs_only is true.
10854 2020-04-22 Zackery Spytz <zspytz@gmail.com>
10856 * doc/extend.exi: Add "free" to list of other builtin functions
10859 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
10862 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
10863 if TARGET_PREFIXED.
10864 (store_quadpti): Ditto.
10865 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
10866 plq will be used and doesn't need it.
10867 (atomic_store<mode>): Ditto, for pstq.
10869 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
10871 * doc/invoke.texi: Update flags turned on by -O3.
10873 2020-04-22 Jakub Jelinek <jakub@redhat.com>
10876 * config/ia64/ia64.c (hfa_element_mode): Ignore
10877 cxx17_empty_base_field_p fields.
10880 * calls.h (cxx17_empty_base_field_p): Declare.
10881 * calls.c (cxx17_empty_base_field_p): Define.
10883 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
10885 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
10887 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
10888 Andre Vieira <andre.simoesdiasvieira@arm.com>
10889 Mihail Ionescu <mihail.ionescu@arm.com>
10891 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
10892 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
10893 (ALL_QUIRKS): Add quirk_no_asmcpu.
10894 (cortex-m55): Define new cpu.
10895 * config/arm/arm-tables.opt: Regenerate.
10896 * config/arm/arm-tune.md: Likewise.
10897 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
10899 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
10901 PR tree-optimization/94700
10902 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
10903 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
10904 of similarly-structured but distinct vector types.
10906 2020-04-21 Martin Sebor <msebor@redhat.com>
10908 PR middle-end/94647
10909 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
10910 the computation of the lower bound of the source access size.
10911 (builtin_access::generic_overlap): Remove a hack for setting ranges
10912 of overlap offsets.
10914 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
10916 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
10917 (ASM_WEAKEN_DECL): New define.
10918 (HAVE_GAS_WEAKREF): Undefine.
10920 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
10922 PR tree-optimization/94683
10923 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
10924 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
10925 but distinct vector types.
10927 2020-04-21 Jakub Jelinek <jakub@redhat.com>
10930 * stor-layout.c (place_field, finalize_record_size): Don't emit
10931 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
10932 * ubsan.c (ubsan_get_type_descriptor_type,
10933 ubsan_get_source_location_type, ubsan_create_data): Set
10935 * asan.c (asan_global_struct): Likewise.
10937 2020-04-21 Duan bo <duanbo3@huawei.com>
10940 * config/aarch64/aarch64.c: Add an error message for option conflict.
10941 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
10942 incompatible with -fpic, -fPIC and -mabi=ilp32.
10944 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
10947 * omp-low.c (new_omp_context): Remove assignments to
10948 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
10950 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
10952 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
10953 ("popcountv2di2_vx"): Use simplify_gen_subreg.
10955 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
10958 * config/s390/s390-builtin-types.def: Add 3 new function modes.
10959 * config/s390/s390-builtins.def: Add mode dependent low-level
10960 builtin and map the overloaded builtins to these.
10961 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
10962 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
10964 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
10966 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
10967 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
10968 estimated VF and is no worse at double the estimated VF.
10970 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
10973 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
10974 order of arguments to rtx_vector_builder.
10975 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
10976 When extending the trailing constants to a full vector, replace any
10977 variables with zeros.
10979 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
10982 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
10985 2020-04-20 Martin Liska <mliska@suse.cz>
10987 * symtab.c (symtab_node::dump_references): Add space after
10989 (symtab_node::dump_referring): Likewise.
10991 2020-04-18 Jeff Law <law@redhat.com>
10994 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
10997 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
10999 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
11000 attributes): Document d_runtime_has_std_library.
11002 2020-04-17 Jeff Law <law@redhat.com>
11004 PR rtl-optimization/90275
11005 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
11006 when the destination has a REG_UNUSED note.
11008 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
11010 PR middle-end/94635
11011 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
11014 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
11016 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
11017 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
11018 cost of load and store insns if one loop iteration has enough scalar
11019 elements to use an Advanced SIMD LDP or STP.
11020 (aarch64_add_stmt_cost): Update call accordingly.
11022 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11023 Jeff Law <law@redhat.com>
11026 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
11027 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
11028 or pos + len >= 32, or pos + len is equal to operands[2] precision
11029 and operands[2] is not a register operand. During splitting perform
11030 SImode AND if operands[0] doesn't have CCZmode and pos + len is
11031 equal to mode precision.
11033 2020-04-17 Richard Biener <rguenther@suse.de>
11036 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
11038 * dwarf2out.c (dw_val_equal_p): Fix pasto in
11039 dw_val_class_vms_delta comparison.
11040 * optabs.c (expand_binop_directly): Fix pasto in commutation
11042 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
11045 2020-04-17 Jakub Jelinek <jakub@redhat.com>
11047 PR rtl-optimization/94618
11048 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
11049 insn is the BB_END of its block, but also when it is only followed
11050 by DEBUG_INSNs in its block.
11052 PR tree-optimization/94621
11053 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
11054 Move id->adjust_array_error_bounds check first in the condition.
11056 2020-04-17 Martin Liska <mliska@suse.cz>
11057 Jonathan Yong <10walls@gmail.com>
11059 PR gcov-profile/94570
11060 * coverage.c (coverage_init): Use separator properly.
11062 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
11064 PR rtl-optimization/93974
11065 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
11066 (rs6000_cannot_substitute_mem_equiv_p): New function.
11068 2020-04-16 Martin Jambor <mjambor@suse.cz>
11071 * ipa-inline.h (ipa_saved_clone_sources): Declare.
11072 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
11073 (save_inline_function_body): Link the new body holder with the
11075 * cgraph.c: Include ipa-inline.h.
11076 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
11077 the statement in ipa_saved_clone_sources.
11078 * cgraphunit.c: Include ipa-inline.h.
11079 (expand_all_functions): Free ipa_saved_clone_sources.
11081 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11084 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
11085 the VNx16BI lowpart of the recursively-generated constant.
11087 2020-04-16 Martin Liska <mliska@suse.cz>
11088 Jakub Jelinek <jakub@redhat.com>
11091 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
11092 DECL_IS_REPLACEABLE_OPERATOR during cloning.
11093 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
11094 (propagate_necessity): Check operator names.
11096 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
11098 PR rtl-optimization/94605
11099 * early-remat.c (early_remat::process_block): Handle insns that
11100 set multiple candidate registers.
11101 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
11103 PR gcov-profile/93401
11104 * common.opt (profile-prefix-path): New option.
11105 * coverae.c: Include diagnostics.h.
11106 (coverage_init): Strip profile prefix path.
11107 * doc/invoke.texi (-fprofile-prefix-path): Document.
11109 2020-04-16 Richard Biener <rguenther@suse.de>
11111 PR middle-end/94614
11112 * expr.c (emit_move_multi_word): Do not generate code when
11113 the destination part is undefined_operand_subword_p.
11114 * lower-subreg.c (resolve_clobber): Look through a paradoxica
11117 2020-04-16 Martin Jambor <mjambor@suse.cz>
11119 PR tree-optimization/94598
11120 * tree-sra.c (verify_sra_access_forest): Fix verification of total
11121 scalarization accesses under access to one-element arrays.
11123 2020-04-16 Jakub Jelinek <jakub@redhat.com>
11126 * function.c (assign_parm_find_data_types): Add workaround for
11127 BROKEN_VALUE_INITIALIZATION compilers.
11129 2020-04-16 Richard Biener <rguenther@suse.de>
11131 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
11134 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
11137 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
11138 Require OPTION_MASK_ISA_SSE2.
11140 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
11143 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
11144 Don't construct a dump_context temporary to call static method.
11146 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
11148 * config/aarch64/falkor-tag-collision-avoidance.c
11149 (valid_src_p): Check for aarch64_address_info type before
11150 accessing base field.
11152 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
11154 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
11155 (V_sz_elem2): Remove unused mode attribute.
11157 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
11159 * config/arm/arm.md (arm_movdi): Disallow for MVE.
11161 2020-04-15 Richard Biener <rguenther@suse.de>
11163 PR middle-end/94539
11164 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
11165 alias_sets_conflict_p for pointers.
11167 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
11170 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
11171 (extendhisi2_internal): Add %v1 before the load instructions.
11173 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
11176 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
11177 use PC-relative addressing for TLS references.
11179 2020-04-14 Martin Jambor <mjambor@suse.cz>
11182 * ipa-sra.c: Include internal-fn.h.
11183 (enum isra_scan_context): Update comment.
11184 (scan_function): Treat calls to internal_functions like loads or stores.
11186 2020-04-14 Yang Yang <yangyang305@huawei.com>
11188 PR tree-optimization/94574
11189 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
11190 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
11192 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
11195 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
11197 2020-04-13 Martin Sebor <msebor@redhat.com>
11199 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
11200 -Wformat-truncation. Move -Wzero-length-bounds last.
11201 (-Wrestrict): Document positive form of option enabled by -Wall.
11203 2020-04-13 Zachary Spytz <zspytz@gmail.com>
11205 * doc/extend.texi: Add realloc to list of built-in functions
11206 are recognized by the compiler.
11208 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
11211 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
11212 pointer in word_mode for eh_return epilogues.
11214 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11216 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
11217 memory references in %B, %C and %D operand selectors when the inner
11218 operand is a post increment address.
11220 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11222 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
11223 reference by 4 bytes, and %D memory reference by 6 bytes.
11225 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
11228 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
11229 condition for V4SI, V8HI and V16QI modes.
11231 2020-04-11 Jakub Jelinek <jakub@redhat.com>
11235 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
11238 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
11240 PR middle-end/89433
11241 PR middle-end/93465
11242 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
11243 "#pragma omp declare target" has also been applied.
11245 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
11247 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
11248 when to emit the epilogue_helper insn.
11249 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
11252 2020-04-09 Jakub Jelinek <jakub@redhat.com>
11255 * cselib.h (cselib_record_sp_cfa_base_equiv,
11256 cselib_sp_derived_value_p): Declare.
11257 * cselib.c (cselib_record_sp_cfa_base_equiv,
11258 cselib_sp_derived_value_p): New functions.
11259 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
11260 cselib_sp_derived_value_p values.
11261 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
11262 start of extended basic blocks other than the first one
11263 for !frame_pointer_needed functions.
11265 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11267 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
11268 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
11269 (aarch64_sve2048_hw): Document.
11270 * config/aarch64/aarch64-protos.h
11271 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
11272 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
11273 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
11274 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
11276 (find_type_suffix_for_scalar_type): Use it instead of comparing
11277 TYPE_MAIN_VARIANTs.
11278 (function_resolver::infer_vector_or_tuple_type): Likewise.
11279 (function_resolver::require_vector_type): Likewise.
11280 (handle_arm_sve_vector_bits_attribute): New function.
11281 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
11282 (aarch64_attribute_table): Add arm_sve_vector_bits.
11283 (aarch64_return_in_memory_1):
11284 (pure_scalable_type_info::piece::get_rtx): New function.
11285 (pure_scalable_type_info::num_zr): Likewise.
11286 (pure_scalable_type_info::num_pr): Likewise.
11287 (pure_scalable_type_info::get_rtx): Likewise.
11288 (pure_scalable_type_info::analyze): Likewise.
11289 (pure_scalable_type_info::analyze_registers): Likewise.
11290 (pure_scalable_type_info::analyze_array): Likewise.
11291 (pure_scalable_type_info::analyze_record): Likewise.
11292 (pure_scalable_type_info::add_piece): Likewise.
11293 (aarch64_some_values_include_pst_objects_p): Likewise.
11294 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
11295 to analyze whether the type is returned in SVE registers.
11296 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
11297 is passed in SVE registers.
11298 (aarch64_pass_by_reference_1): New function, extracted from...
11299 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
11300 to analyze whether the type is a pure scalable type and, if so,
11301 whether it should be passed by reference.
11302 (aarch64_return_in_msb): Return false for pure scalable types.
11303 (aarch64_function_value_1): Fold back into...
11304 (aarch64_function_value): ...this function. Use
11305 pure_scalable_type_info to analyze whether the type is a pure
11306 scalable type and, if so, which registers it should use. Handle
11307 types that include pure scalable types but are not themselves
11308 pure scalable types.
11309 (aarch64_return_in_memory_1): New function, split out from...
11310 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
11311 to analyze whether the type is a pure scalable type and, if so,
11312 whether it should be returned by reference.
11313 (aarch64_layout_arg): Remove orig_mode argument. Use
11314 pure_scalable_type_info to analyze whether the type is a pure
11315 scalable type and, if so, which registers it should use. Handle
11316 types that include pure scalable types but are not themselves
11317 pure scalable types.
11318 (aarch64_function_arg): Update call accordingly.
11319 (aarch64_function_arg_advance): Likewise.
11320 (aarch64_pad_reg_upward): On big-endian targets, return false for
11321 pure scalable types that are smaller than 16 bytes.
11322 (aarch64_member_type_forces_blk): New function.
11323 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
11324 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
11325 correspond to built-in SVE types. Do not rely on a vector mode
11326 if the type includes an pure scalable type. When returning true,
11327 assert that the mode is not an SVE mode.
11328 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
11329 built-in types here. When returning true, assert that the type
11330 does not have an SVE mode.
11331 (aarch64_can_change_mode_class): Don't allow anything to change
11332 between a predicate mode and a non-predicate mode. Also don't
11333 allow changes between SVE vector modes and other modes that
11334 might be bigger than 128 bits.
11335 (aarch64_invalid_binary_op): Reject binary operations that mix
11336 SVE and GNU vector types.
11337 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
11339 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11341 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
11342 "SVE sizeless type".
11343 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
11344 (sizeless_type_p): New functions.
11345 (register_builtin_types): Apply make_type_sizeless to the type.
11346 (register_tuple_type): Likewise.
11347 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
11349 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
11351 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
11354 2020-04-09 Martin Jambor <mjambor@suse.cz>
11355 Richard Biener <rguenther@suse.de>
11357 PR tree-optimization/94482
11358 * tree-sra.c (create_access_replacement): Dump new replacement with
11360 (sra_modify_expr): Fix handling of cases when the original EXPR writes
11361 to only part of the replacement.
11362 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
11363 the first operand of combinations into REAL/IMAGPART_EXPR and
11366 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
11368 * doc/sourcebuild.texi (check-function-bodies): Treat the third
11369 parameter as a list of option regexps and require each regexp
11372 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
11375 * config/aarch64/falkor-tag-collision-avoidance.c
11376 (valid_src_p): Fix missing rtx type check.
11378 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
11379 Richard Biener <rguenther@suse.de>
11381 PR tree-optimization/93674
11382 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
11383 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
11384 or non-mode precision type, add candidate in unsigned type with the
11387 2020-04-08 Clement Chigot <clement.chigot@atos.net>
11389 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
11390 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
11391 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
11393 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11395 PR middle-end/94526
11396 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
11398 * reload1.c (eliminate_regs_1): Avoid creating
11399 (plus (reg) (const_int 0)) in DEBUG_INSNs.
11401 PR tree-optimization/94524
11402 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
11403 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
11404 op1 rather than op1 itself at the end. Punt for signed modulo by
11405 most negative constant.
11406 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
11407 modulo by most negative constant.
11409 2020-04-08 Richard Biener <rguenther@suse.de>
11411 PR rtl-optimization/93946
11412 * cse.c (cse_insn): Record the tabled expression in
11413 src_related. Verify a redundant store removal is valid.
11415 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
11418 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
11419 ENDBR at function entry if function will be called indirectly.
11421 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11424 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
11427 2020-04-08 Martin Liska <mliska@suse.cz>
11430 * gimple.c (gimple_call_operator_delete_p): Rename to...
11431 (gimple_call_replaceable_operator_delete_p): ... this.
11432 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
11433 * gimple.h (gimple_call_operator_delete_p): Rename to ...
11434 (gimple_call_replaceable_operator_delete_p): ... this.
11435 * tree-core.h (tree_function_decl): Add replaceable_operator
11437 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
11438 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
11439 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
11440 (eliminate_unnecessary_stmts): Likewise.
11441 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
11442 Pack DECL_IS_REPLACEABLE_OPERATOR.
11443 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
11444 Unpack the field here.
11445 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
11446 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
11447 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
11448 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
11449 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
11450 replaceable operator flags.
11452 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
11453 Matthew Malcomson <matthew.malcomson@arm.com>
11455 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
11456 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
11457 (CX_TERNARY_QUALIFIERS): Likewise.
11458 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
11459 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
11460 (arm_init_acle_builtins): Initialize CDE builtins.
11461 (arm_expand_acle_builtin): Check CDE constant operands.
11462 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
11463 of CDE constant operand.
11464 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
11466 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
11467 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
11468 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
11469 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
11470 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
11471 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
11472 * config/arm/arm_cde_builtins.def: New file.
11473 * config/arm/iterators.md (V_reg): New attribute of SI.
11474 * config/arm/predicates.md (const_int_coproc_operand): New.
11475 (const_int_vcde1_operand, const_int_vcde2_operand): New.
11476 (const_int_vcde3_operand): New.
11477 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
11478 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
11479 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
11480 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
11482 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
11484 * config.gcc: Add arm_cde.h.
11485 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
11486 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
11487 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
11488 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
11489 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
11490 * config/arm/arm.h (TARGET_CDE): New macro.
11491 * config/arm/arm_cde.h: New file.
11492 * doc/invoke.texi: Document CDE options +cdecp[0-7].
11493 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
11495 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
11497 2020-04-08 Jakub Jelinek <jakub@redhat.com>
11499 PR rtl-optimization/94516
11500 * postreload.c: Include rtl-iter.h.
11501 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
11502 looking for all MEMs with RTX_AUTOINC operand.
11503 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
11505 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
11507 * omp-grid.c (grid_eliminate_combined_simd_part): Use
11508 OMP_CLAUSE_CODE to access the omp clause code.
11510 2020-04-07 Jeff Law <law@redhat.com>
11512 PR rtl-optimization/92264
11513 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
11514 the destination is the stack pointer.
11516 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11518 PR rtl-optimization/94291
11519 PR rtl-optimization/84169
11520 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
11521 must be a REG or SUBREG of REG; if it is not one of these, don't
11524 2020-04-07 Richard Biener <rguenther@suse.de>
11526 PR middle-end/94479
11527 * gimplify.c (gimplify_addr_expr): Also consider generated
11530 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11532 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
11534 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11536 * config/arm/arm_mve.h: Cast some pointers to expected types.
11538 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11540 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
11541 same with '__arm_' prefix.
11543 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11545 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
11547 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11549 * config/arm/arm.c (arm_mve_immediate_check): Removed.
11550 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
11551 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
11552 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
11553 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
11554 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
11555 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
11557 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11559 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
11561 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11563 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
11564 * config/arm/mve/md: Fix v[id]wdup patterns.
11566 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11568 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
11569 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
11571 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11573 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
11574 and remove const_ptr enums.
11576 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
11578 * config/arm/arm_mve.h (vsubq_n): Merge with...
11580 (vmulq_n): Merge with...
11582 (__ARM_mve_typeid): Simplify scalar and constant detection.
11584 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11587 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
11588 for inter-lane permutation for 64-byte modes.
11591 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
11592 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
11593 Assume it is a REG after that instead of testing it and doing FAIL
11594 otherwise. Formatting fix.
11596 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
11598 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
11600 2020-04-07 Jakub Jelinek <jakub@redhat.com>
11603 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
11604 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
11606 2020-04-06 Jakub Jelinek <jakub@redhat.com>
11608 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
11609 + const0_rtx return the SP_DERIVED_VALUE_P.
11611 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
11613 PR rtl-optimization/92989
11614 * lra-lives.c (process_bb_lives): Do not treat eh_return data
11615 registers as being live at the beginning of the EH receiver.
11617 2020-04-05 Zachary Spytz <zspytz@gmail.com>
11619 * extend.texi: Add free to list of ISO C90 functions that
11620 are recognized by the compiler.
11622 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
11624 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
11625 for fast_interrupt.
11627 * config/microblaze/microblaze.md (trap): Update output pattern.
11629 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
11630 Jakub Jelinek <jakub@redhat.com>
11633 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
11634 arrays, pointer-to-members, function types and qualifiers when
11635 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
11636 to emit type again on definition.
11638 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
11641 * ipa-fnsummary.c (vrp_will_run_p): New function.
11642 (fre_will_run_p): New function.
11643 (evaluate_properties_for_edge): Use it.
11644 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
11645 !optimize_debug to optimize_debug.
11647 2020-04-04 Jakub Jelinek <jakub@redhat.com>
11649 PR rtl-optimization/94468
11650 * cselib.c (references_value_p): Formatting fix.
11651 (cselib_useless_value_p): New function.
11652 (discard_useless_locs, discard_useless_values,
11653 cselib_invalidate_regno_val, cselib_invalidate_mem,
11654 cselib_record_set): Use it instead of
11655 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
11658 * tree-iterator.h (expr_single): Declare.
11659 * tree-iterator.c (expr_single): New function.
11660 * tree.h (protected_set_expr_location_if_unset): Declare.
11661 * tree.c (protected_set_expr_location): Use expr_single.
11662 (protected_set_expr_location_if_unset): New function.
11664 2020-04-03 Jeff Law <law@redhat.com>
11666 PR rtl-optimization/92264
11667 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
11668 reloading of auto-increment addressing modes.
11670 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
11673 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
11676 2020-04-03 Jeff Law <law@redhat.com>
11678 PR rtl-optimization/92264
11679 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
11680 post-increment addressing of source operands as well as residuals
11681 when computing any adjustments to the input pointer.
11683 2020-04-03 Jakub Jelinek <jakub@redhat.com>
11686 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
11687 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
11688 second half of first lane from first lane of second operand and
11689 first half of second lane from second lane of first operand.
11691 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
11693 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
11695 2020-04-03 Tamar Christina <tamar.christina@arm.com>
11698 * common/config/aarch64/aarch64-common.c
11699 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
11701 2020-04-03 Richard Biener <rguenther@suse.de>
11703 PR middle-end/94465
11704 * tree.c (array_ref_low_bound): Deal with released SSA names
11707 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
11709 * config/gcn/gcn.c (print_operand): Handle unordered comparison
11711 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
11712 comparison operators.
11714 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
11716 PR tree-optimization/94443
11717 * tree-vect-loop.c (vectorizable_live_operation): Use
11718 gsi_insert_seq_before to replace gsi_insert_before.
11720 2020-04-03 Martin Liska <mliska@suse.cz>
11723 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
11724 Compare type attributes for gimple_call_fntypes.
11726 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
11728 * alias.c (get_alias_set): Fix comment typos.
11730 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
11733 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
11734 attribute checking used by TYPE.
11736 2020-04-02 Martin Jambor <mjambor@suse.cz>
11739 * ipa-sra.c (struct caller_issues): New fields candidate and
11740 call_from_outside_comdat.
11741 (check_for_caller_issues): Check for calls from outsied of
11742 candidate's same_comdat_group.
11743 (check_all_callers_for_issues): Set up issues.candidate, check result
11745 (mark_callers_calls_comdat_local): New function.
11746 (process_isra_node_results): Set calls_comdat_local of callers if
11749 2020-04-02 Richard Biener <rguenther@suse.de>
11752 * common.opt (ffinite-loops): Initialize to zero.
11753 * opts.c (default_options_table): Remove OPT_ffinite_loops
11755 * cfgloop.h (loop::finite_p): New member.
11756 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
11757 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
11759 * lto-streamer-in.c (input_cfg): Stream finite_p.
11760 * lto-streamer-out.c (output_cfg): Likewise.
11761 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
11762 from flag_finite_loops at CFG build time.
11763 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
11764 finite_p flag instead of flag_finite_loops.
11765 * doc/invoke.texi (ffinite-loops): Adjust documentation of
11768 2020-04-02 Richard Biener <rguenther@suse.de>
11771 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
11772 DW_TAG_imported_unit.
11774 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
11776 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
11777 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
11780 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
11782 PR tree-optimization/94401
11783 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
11784 access type when loading halves of vector to avoid peeling for gaps.
11786 2020-04-02 Jakub Jelinek <jakub@redhat.com>
11788 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
11789 between a string literal and MIPS_SYSVERSION_SPEC macro.
11791 2020-04-02 Martin Jambor <mjambor@suse.cz>
11793 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
11795 2020-04-02 Jakub Jelinek <jakub@redhat.com>
11797 PR rtl-optimization/92264
11798 * params.opt (-param=max-find-base-term-values=): Decrease default
11801 PR rtl-optimization/92264
11802 * rtl.h (struct rtx_def): Mention that call bit is used as
11803 SP_DERIVED_VALUE_P in cselib.c.
11804 * cselib.c (SP_DERIVED_VALUE_P): Define.
11805 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
11806 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
11807 val_rtx and sp based expression where offsets cancel each other.
11808 (preserve_constants_and_equivs): Formatting fix.
11809 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
11810 locs list for cfa_base_preserved_val if needed. Formatting fix.
11811 (autoinc_split): If the to be returned value is a REG, MEM or
11812 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
11813 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
11814 (rtx_equal_for_cselib_1): Call autoinc_split even if both
11815 expressions are PLUS in Pmode with CONST_INT second operands.
11816 Handle SP_DERIVED_VALUE_P cases.
11817 (cselib_hash_plus_const_int): New function.
11818 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
11819 second operand, as well as for PRE_DEC etc. that ought to be
11820 hashed the same way.
11821 (cselib_subst_to_values): Substitute PLUS with Pmode and
11822 CONST_INT operand if the first operand is a VALUE which has
11823 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
11824 SP_DERIVED_VALUE_P + adjusted offset.
11825 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
11826 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
11827 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
11828 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
11829 on the sp value before calling cselib_add_permanent_equiv on the
11831 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
11832 in the insn without REG_INC note.
11833 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
11834 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
11837 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
11838 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
11840 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11843 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
11844 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
11845 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
11846 intrinsic defintion by adding a new builtin call to writeback into base
11848 (__arm_vldrdq_gather_base_wb_u64): Likewise.
11849 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
11850 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
11851 (__arm_vldrwq_gather_base_wb_s32): Likewise.
11852 (__arm_vldrwq_gather_base_wb_u32): Likewise.
11853 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
11854 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
11855 (__arm_vldrwq_gather_base_wb_f32): Likewise.
11856 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
11857 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
11858 builtin's qualifier.
11859 (vldrdq_gather_base_wb_z_u): Likewise.
11860 (vldrwq_gather_base_wb_u): Likewise.
11861 (vldrdq_gather_base_wb_u): Likewise.
11862 (vldrwq_gather_base_wb_z_s): Likewise.
11863 (vldrwq_gather_base_wb_z_f): Likewise.
11864 (vldrdq_gather_base_wb_z_s): Likewise.
11865 (vldrwq_gather_base_wb_s): Likewise.
11866 (vldrwq_gather_base_wb_f): Likewise.
11867 (vldrdq_gather_base_wb_s): Likewise.
11868 (vldrwq_gather_base_nowb_z_u): Define builtin.
11869 (vldrdq_gather_base_nowb_z_u): Likewise.
11870 (vldrwq_gather_base_nowb_u): Likewise.
11871 (vldrdq_gather_base_nowb_u): Likewise.
11872 (vldrwq_gather_base_nowb_z_s): Likewise.
11873 (vldrwq_gather_base_nowb_z_f): Likewise.
11874 (vldrdq_gather_base_nowb_z_s): Likewise.
11875 (vldrwq_gather_base_nowb_s): Likewise.
11876 (vldrwq_gather_base_nowb_f): Likewise.
11877 (vldrdq_gather_base_nowb_s): Likewise.
11878 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
11880 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
11881 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
11882 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
11883 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
11884 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
11885 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
11886 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
11887 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
11888 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
11889 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
11890 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
11892 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
11894 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
11895 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
11896 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
11897 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
11898 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
11899 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
11900 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
11901 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
11902 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
11904 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
11905 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
11906 Remove constraints from expander.
11907 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
11908 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
11909 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
11910 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
11911 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
11912 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
11914 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
11916 PR rtl-optimization/94123
11917 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
11918 flag_split_wide_types_early.
11920 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
11922 * doc/extend.texi (Common Function Attributes): Fix typo.
11924 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
11927 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
11930 2020-04-01 Zackery Spytz <zspytz@gmail.com>
11932 * doc/extend.texi: Fix a typo in the documentation of the
11933 copy function attribute.
11935 2020-04-01 Jakub Jelinek <jakub@redhat.com>
11937 PR middle-end/94423
11938 * tree-object-size.c (pass_object_sizes::execute): Don't call
11939 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
11940 call replace_call_with_value.
11942 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
11944 PR tree-optimization/94043
11945 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
11946 phi for vec_lhs and use it for lane extraction.
11948 2020-03-31 Felix Yang <felix.yang@huawei.com>
11950 PR tree-optimization/94398
11951 * tree-vect-stmts.c (vectorizable_store): Instead of calling
11952 vect_supportable_dr_alignment, set alignment_support_scheme to
11953 dr_unaligned_supported for gather-scatter accesses.
11954 (vectorizable_load): Likewise.
11956 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
11958 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
11959 New mode iterators.
11960 (vnsi, VnSI, vndi, VnDI): New mode attributes.
11961 (mov<mode>): Use <VnDI> in place of V64DI.
11962 (mov<mode>_exec): Likewise.
11963 (mov<mode>_sgprbase): Likewise.
11964 (reload_out<mode>): Likewise.
11965 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
11966 (gather_load<mode>v64si): Rename to ...
11967 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
11968 and <VnDI> in place of V64DI.
11969 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
11970 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
11971 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
11972 (scatter_store<mode>v64si): Rename to ...
11973 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
11974 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
11975 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
11976 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
11977 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
11978 (ds_bpermute<mode>): Use <VnSI>.
11979 (addv64si3_vcc<exec_vcc>): Rename to ...
11980 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
11981 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
11982 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
11983 (addcv64si3<exec_vcc>): Rename to ...
11984 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
11985 (subv64si3_vcc<exec_vcc>): Rename to ...
11986 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
11987 (subcv64si3<exec_vcc>): Rename to ...
11988 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
11989 (addv64di3): Rename to ...
11990 (add<mode>3): ... this, and use V_DI.
11991 (addv64di3_exec): Rename to ...
11992 (add<mode>3_exec): ... this, and use V_DI.
11993 (subv64di3): Rename to ...
11994 (sub<mode>3): ... this, and use V_DI.
11995 (subv64di3_exec): Rename to ...
11996 (sub<mode>3_exec): ... this, and use V_DI.
11997 (addv64di3_zext): Rename to ...
11998 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
11999 (addv64di3_zext_exec): Rename to ...
12000 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12001 (addv64di3_zext_dup): Rename to ...
12002 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
12003 (addv64di3_zext_dup_exec): Rename to ...
12004 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
12005 (addv64di3_zext_dup2): Rename to ...
12006 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12007 (addv64di3_zext_dup2_exec): Rename to ...
12008 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12009 (addv64di3_sext_dup2): Rename to ...
12010 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
12011 (addv64di3_sext_dup2_exec): Rename to ...
12012 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
12013 (<su>mulv64si3_highpart<exec>): Rename to ...
12014 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
12015 (mulv64di3): Rename to ...
12016 (mul<mode>3): ... this, and use V_DI and <VnSI>.
12017 (mulv64di3_exec): Rename to ...
12018 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
12019 (mulv64di3_zext): Rename to ...
12020 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
12021 (mulv64di3_zext_exec): Rename to ...
12022 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
12023 (mulv64di3_zext_dup2): Rename to ...
12024 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
12025 (mulv64di3_zext_dup2_exec): Rename to ...
12026 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
12027 (<expander>v64di3): Rename to ...
12028 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
12029 (<expander>v64di3_exec): Rename to ...
12030 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
12031 (<expander>v64si3<exec>): Rename to ...
12032 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12033 (v<expander>v64si3<exec>): Rename to ...
12034 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
12035 (<expander>v64si3<exec>): Rename to ...
12036 (<expander><vnsi>3<exec>): ... this, and use V_SI.
12037 (subv64df3<exec>): Rename to ...
12038 (sub<mode>3<exec>): ... this, and use V_DF.
12039 (truncv64di<mode>2): Rename to ...
12040 (trunc<vndi><mode>2): ... this, and use <VnDI>.
12041 (truncv64di<mode>2_exec): Rename to ...
12042 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
12043 (<convop><mode>v64di2): Rename to ...
12044 (<convop><mode><vndi>2): ... this, and use <VnDI>.
12045 (<convop><mode>v64di2_exec): Rename to ...
12046 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
12047 (vec_cmp<u>v64qidi): Rename to ...
12048 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
12049 (vec_cmp<u>v64qidi_exec): Rename to ...
12050 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
12051 (vcond_mask_<mode>di): Use <VnDI>.
12052 (maskload<mode>di): Likewise.
12053 (maskstore<mode>di): Likewise.
12054 (mask_gather_load<mode>v64si): Rename to ...
12055 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12056 (mask_scatter_store<mode>v64si): Rename to ...
12057 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
12058 (*<reduc_op>_dpp_shr_v64di): Rename to ...
12059 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12060 (*plus_carry_in_dpp_shr_v64si): Rename to ...
12061 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
12062 (*plus_carry_dpp_shr_v64di): Rename to ...
12063 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
12064 (vec_seriesv64si): Rename to ...
12065 (vec_series<mode>): ... this, and use V_SI.
12066 (vec_seriesv64di): Rename to ...
12067 (vec_series<mode>): ... this, and use V_DI.
12069 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12071 * config/arc/arc.c (arc_print_operand): Use
12072 HOST_WIDE_INT_PRINT_DEC macro.
12074 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
12076 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
12078 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12080 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
12082 (__arm_vbicq): Likewise.
12084 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
12086 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
12088 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12090 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
12091 common section of both MVE Integer and MVE Floating Point.
12092 (vaddvq): Likewise.
12093 (vaddlvq_p): Likewise.
12094 (vaddvaq): Likewise.
12095 (vaddvq_p): Likewise.
12096 (vcmpcsq): Likewise.
12097 (vmlsdavxq): Likewise.
12098 (vmlsdavq): Likewise.
12099 (vmladavxq): Likewise.
12100 (vmladavq): Likewise.
12101 (vminvq): Likewise.
12102 (vminavq): Likewise.
12103 (vmaxvq): Likewise.
12104 (vmaxavq): Likewise.
12105 (vmlaldavq): Likewise.
12106 (vcmphiq): Likewise.
12107 (vaddlvaq): Likewise.
12108 (vrmlaldavhq): Likewise.
12109 (vrmlaldavhxq): Likewise.
12110 (vrmlsldavhq): Likewise.
12111 (vrmlsldavhxq): Likewise.
12112 (vmlsldavxq): Likewise.
12113 (vmlsldavq): Likewise.
12114 (vabavq): Likewise.
12115 (vrmlaldavhaq): Likewise.
12116 (vcmpgeq_m_n): Likewise.
12117 (vmlsdavxq_p): Likewise.
12118 (vmlsdavq_p): Likewise.
12119 (vmlsdavaxq): Likewise.
12120 (vmlsdavaq): Likewise.
12121 (vaddvaq_p): Likewise.
12122 (vcmpcsq_m_n): Likewise.
12123 (vcmpcsq_m): Likewise.
12124 (vmladavxq_p): Likewise.
12125 (vmladavq_p): Likewise.
12126 (vmladavaxq): Likewise.
12127 (vmladavaq): Likewise.
12128 (vminvq_p): Likewise.
12129 (vminavq_p): Likewise.
12130 (vmaxvq_p): Likewise.
12131 (vmaxavq_p): Likewise.
12132 (vcmphiq_m): Likewise.
12133 (vaddlvaq_p): Likewise.
12134 (vmlaldavaq): Likewise.
12135 (vmlaldavaxq): Likewise.
12136 (vmlaldavq_p): Likewise.
12137 (vmlaldavxq_p): Likewise.
12138 (vmlsldavaq): Likewise.
12139 (vmlsldavaxq): Likewise.
12140 (vmlsldavq_p): Likewise.
12141 (vmlsldavxq_p): Likewise.
12142 (vrmlaldavhaxq): Likewise.
12143 (vrmlaldavhq_p): Likewise.
12144 (vrmlaldavhxq_p): Likewise.
12145 (vrmlsldavhaq): Likewise.
12146 (vrmlsldavhaxq): Likewise.
12147 (vrmlsldavhq_p): Likewise.
12148 (vrmlsldavhxq_p): Likewise.
12149 (vabavq_p): Likewise.
12150 (vmladavaq_p): Likewise.
12151 (vstrbq_scatter_offset): Likewise.
12152 (vstrbq_p): Likewise.
12153 (vstrbq_scatter_offset_p): Likewise.
12154 (vstrdq_scatter_base_p): Likewise.
12155 (vstrdq_scatter_base): Likewise.
12156 (vstrdq_scatter_offset_p): Likewise.
12157 (vstrdq_scatter_offset): Likewise.
12158 (vstrdq_scatter_shifted_offset_p): Likewise.
12159 (vstrdq_scatter_shifted_offset): Likewise.
12160 (vmaxq_x): Likewise.
12161 (vminq_x): Likewise.
12162 (vmovlbq_x): Likewise.
12163 (vmovltq_x): Likewise.
12164 (vmulhq_x): Likewise.
12165 (vmullbq_int_x): Likewise.
12166 (vmullbq_poly_x): Likewise.
12167 (vmulltq_int_x): Likewise.
12168 (vmulltq_poly_x): Likewise.
12169 (vstrbq): Likewise.
12171 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12174 * config/aarch64/constraints.md (Uph): New constraint.
12175 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
12176 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
12179 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
12180 Jakub Jelinek <jakub@redhat.com>
12182 PR middle-end/94412
12183 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
12184 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
12186 2020-03-31 Jakub Jelinek <jakub@redhat.com>
12188 PR tree-optimization/94403
12189 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
12190 ENUMERAL_TYPE lhs_type.
12192 PR rtl-optimization/94344
12193 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
12194 conversions, either on both operands of |^+ or just one. Handle
12195 also extra same precision conversion on RSHIFT_EXPR first operand
12196 provided RSHIFT_EXPR is performed in unsigned type.
12198 2020-03-30 David Malcolm <dmalcolm@redhat.com>
12200 * lra.c (finish_insn_code_data_once): Set the array elements
12201 to NULL after freeing them.
12203 2020-03-30 Andreas Schwab <schwab@suse.de>
12205 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
12208 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
12210 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
12211 to skip defining builtins based on builtin_mask.
12213 2020-03-30 Jakub Jelinek <jakub@redhat.com>
12216 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
12217 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
12218 operand is a register. Don't enable masked variants for V*[QH]Imode.
12221 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
12222 <store_mask_constraint> instead of m in output operand constraint.
12223 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
12226 2020-03-30 Alan Modra <amodra@gmail.com>
12228 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
12229 (rs6000_indirect_call_template_1): Adjust to suit.
12230 * config/rs6000/rs6000.md (call_local): Merge call_local32,
12231 call_local64, and call_local_aix.
12232 (call_value_local): Simlarly.
12233 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
12234 and disable pattern when CALL_LONG.
12235 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
12236 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
12237 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
12239 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
12242 * doc/invoke.texi: Update -falign-functions, -falign-loops and
12243 -falign-jumps documentation.
12245 2020-03-29 Martin Liska <mliska@suse.cz>
12248 * cgraphunit.c (process_function_and_variable_attributes): Remove
12249 double 'attribute' words.
12251 2020-03-29 John David Anglin <dave.anglin@bell.net>
12253 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
12256 2020-03-28 Jakub Jelinek <jakub@redhat.com>
12259 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
12260 to true after setting size to integer_one_node.
12262 PR tree-optimization/94329
12263 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
12264 on the last stmt in a bb, make sure gsi_prev isn't done immediately
12267 2020-03-27 Alan Modra <amodra@gmail.com>
12270 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
12271 for PLT16_LO and PLT_PCREL.
12272 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
12273 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
12274 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
12276 2020-03-27 Martin Sebor <msebor@redhat.com>
12279 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
12281 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
12283 * config/gcn/gcn-valu.md:
12284 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
12285 (VEC_1REG_MODE): Delete.
12286 (VEC_1REG_ALT): Delete.
12287 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
12288 (VEC_1REG_INT_MODE): Delete.
12289 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
12290 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
12291 (VEC_2REG_MODE): Rename to V_2REG throughout.
12292 (VEC_REG_MODE): Rename to V_noHI throughout.
12293 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
12294 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
12295 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
12296 (VEC_INT_MODE): Delete.
12297 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
12298 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
12299 (FP_MODE): Delete and replace with FP throughout.
12300 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
12301 (VCMP_MODE): Rename to V_noQI throughout and move to top.
12302 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
12303 * config/gcn/gcn.md (FP): New mode iterator.
12304 (FP_1REG): New mode iterator.
12306 2020-03-27 David Malcolm <dmalcolm@redhat.com>
12308 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
12309 now emits two .dot files.
12310 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
12311 (graphviz_out::end_tr): Only close a TR, not a TD.
12312 (graphviz_out::begin_td): New.
12313 (graphviz_out::end_td): New.
12314 (graphviz_out::begin_trtd): New, replacing the old implementation
12315 of graphviz_out::begin_tr.
12316 (graphviz_out::end_tdtr): New, replacing the old implementation
12317 of graphviz_out::end_tr.
12318 * graphviz.h (graphviz_out::begin_td): New decl.
12319 (graphviz_out::end_td): New decl.
12320 (graphviz_out::begin_trtd): New decl.
12321 (graphviz_out::end_tdtr): New decl.
12323 2020-03-27 Richard Biener <rguenther@suse.de>
12326 * dwarf2out.c (should_emit_struct_debug): Return false for
12329 2020-03-27 Richard Biener <rguenther@suse.de>
12331 PR tree-optimization/94352
12332 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
12334 (ssa_propagation_engine::ssa_propagate): ... here after
12335 initializing curr_order.
12337 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
12339 PR tree-optimization/90332
12340 * tree-vect-stmts.c (vector_vector_composition_type): New function.
12341 (get_group_load_store_type): Adjust to call
12342 vector_vector_composition_type, extend it to construct with scalar
12344 (vectorizable_load): Likewise.
12346 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
12348 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
12349 (create_ddg_dep_no_link): Likewise.
12350 (add_cross_iteration_register_deps): Move debug instruction check.
12351 Other minor refactoring.
12352 (add_intra_loop_mem_dep): Do not check for debug instructions.
12353 (add_inter_loop_mem_dep): Likewise.
12354 (build_intra_loop_deps): Likewise.
12355 (create_ddg): Do not include debug insns into the graph.
12356 * ddg.h (struct ddg): Remove num_debug field.
12357 * modulo-sched.c (doloop_register_get): Adjust condition.
12358 (res_MII): Remove DDG num_debug field usage.
12359 (sms_schedule_by_order): Use assertion against debug insns.
12360 (ps_has_conflicts): Drop debug insn check.
12362 2020-03-26 Jakub Jelinek <jakub@redhat.com>
12365 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
12366 that contains exactly one non-DEBUG_BEGIN_STMT statement.
12369 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
12370 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
12371 a single non-debug stmt followed by one or more debug stmts.
12372 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
12373 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
12374 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
12375 gimple_seq_last to check if outer_stmt gbind could be reused and
12376 if yes and it is surrounded by any debug stmts, move them into the
12379 PR rtl-optimization/92264
12380 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
12381 for sp based values in !frame_pointer_needed
12382 && !ACCUMULATE_OUTGOING_ARGS functions.
12384 2020-03-26 Felix Yang <felix.yang@huawei.com>
12386 PR tree-optimization/94269
12387 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
12389 operation to single basic block.
12391 2020-03-25 Jeff Law <law@redhat.com>
12393 PR rtl-optimization/90275
12394 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
12397 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12400 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
12401 mode rather than VOIDmode.
12403 2020-03-25 Martin Sebor <msebor@redhat.com>
12405 PR middle-end/94004
12406 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
12407 even for alloca calls resulting from system macro expansion.
12408 Include inlining context in all warnings.
12410 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
12413 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
12414 FPRs to change between SDmode and DDmode.
12416 2020-03-25 Martin Sebor <msebor@redhat.com>
12418 PR tree-optimization/94131
12419 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
12421 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
12422 types have constant sizes.
12424 2020-03-25 Martin Liska <mliska@suse.cz>
12427 * configure.ac: Report error only when --with-zstd
12429 * configure: Regenerate.
12431 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12434 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
12435 INSN_CODE (insn) to -1 when changing the pattern.
12437 2020-03-25 Martin Liska <mliska@suse.cz>
12441 * config/i386/i386-features.c (make_resolver_func): Drop
12442 public flag for resolver.
12443 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
12444 group for resolver and drop public flag if possible.
12445 * multiple_target.c (create_dispatcher_calls): Drop unique_name
12446 and resolution as we want to enable LTO privatization of the default
12449 2020-03-25 Martin Liska <mliska@suse.cz>
12452 * configure.ac: Respect --without-zstd and report
12453 error when we can't find header file with --with-zstd.
12454 * configure: Regenerate.
12456 2020-03-25 Jakub Jelinek <jakub@redhat.com>
12458 PR middle-end/94303
12459 * varasm.c (output_constructor_array_range): If local->index
12460 RANGE_EXPR doesn't start at the current location in the constructor,
12461 skip needed number of bytes using assemble_zeros or assert we don't
12465 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
12466 counter instead of DECL_UID.
12468 PR tree-optimization/94300
12469 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
12470 is positive, make sure that off + size isn't larger than needed_len.
12472 2020-03-25 Richard Biener <rguenther@suse.de>
12473 Jakub Jelinek <jakub@redhat.com>
12476 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
12478 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
12480 * doc/sourcebuild.texi (ARM-specific attributes): Add
12482 (Features for dg-add-options): Add arm_fp_dp.
12484 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
12487 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
12489 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
12492 * omp-offload.c (omp_finish_file): Fix target-link handling if
12493 targetm_common.have_named_sections is false.
12495 2020-03-24 Jakub Jelinek <jakub@redhat.com>
12498 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
12499 instead of GEN_INT.
12502 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
12503 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
12504 If not after and at *incr_pos is a debug stmt, set stmt location to
12505 location of next non-debug stmt after it if any.
12508 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
12509 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
12510 worklist or set GF_PLF_2 just because it is used in a debug stmt in
12511 another bb. Formatting improvements.
12514 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
12515 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
12516 regardless of whether TREE_NO_WARNING is set on it or whether
12517 warn_unused_function is true or not.
12519 2020-03-23 Jeff Law <law@redhat.com>
12521 PR rtl-optimization/90275
12524 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
12525 (simplify_logical_relational_operation): Use it.
12527 2020-03-23 Jakub Jelinek <jakub@redhat.com>
12530 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
12531 ultimate rhs and if returned something different, reconstructing
12532 the COMPOUND_EXPRs.
12534 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
12536 * opts.c (print_filtered_help): Improve the help text for alias options.
12538 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12539 Andre Vieira <andre.simoesdiasvieira@arm.com>
12540 Mihail Ionescu <mihail.ionescu@arm.com>
12542 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
12543 (vshlcq_m_u8): Likewise.
12544 (vshlcq_m_s16): Likewise.
12545 (vshlcq_m_u16): Likewise.
12546 (vshlcq_m_s32): Likewise.
12547 (vshlcq_m_u32): Likewise.
12548 (__arm_vshlcq_m_s8): Define intrinsic.
12549 (__arm_vshlcq_m_u8): Likewise.
12550 (__arm_vshlcq_m_s16): Likewise.
12551 (__arm_vshlcq_m_u16): Likewise.
12552 (__arm_vshlcq_m_s32): Likewise.
12553 (__arm_vshlcq_m_u32): Likewise.
12554 (vshlcq_m): Define polymorphic variant.
12555 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
12556 Use builtin qualifier.
12557 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
12558 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
12559 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
12560 (mve_vshlcq_m_<supf><mode>): Likewise.
12562 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12564 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
12565 (UQSHL_QUALIFIERS): Likewise.
12566 (ASRL_QUALIFIERS): Likewise.
12567 (SQSHL_QUALIFIERS): Likewise.
12568 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
12570 (sqrshr): Define macro.
12571 (sqrshrl): Likewise.
12572 (sqrshrl_sat48): Likewise.
12574 (sqshll): Likewise.
12576 (srshrl): Likewise.
12577 (uqrshl): Likewise.
12578 (uqrshll): Likewise.
12579 (uqrshll_sat48): Likewise.
12581 (uqshll): Likewise.
12583 (urshrl): Likewise.
12586 (__arm_lsll): Define intrinsic.
12587 (__arm_asrl): Likewise.
12588 (__arm_uqrshll): Likewise.
12589 (__arm_uqrshll_sat48): Likewise.
12590 (__arm_sqrshrl): Likewise.
12591 (__arm_sqrshrl_sat48): Likewise.
12592 (__arm_uqshll): Likewise.
12593 (__arm_urshrl): Likewise.
12594 (__arm_srshrl): Likewise.
12595 (__arm_sqshll): Likewise.
12596 (__arm_uqrshl): Likewise.
12597 (__arm_sqrshr): Likewise.
12598 (__arm_uqshl): Likewise.
12599 (__arm_urshr): Likewise.
12600 (__arm_sqshl): Likewise.
12601 (__arm_srshr): Likewise.
12602 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
12604 (UQSHL_QUALIFIERS): Likewise.
12605 (ASRL_QUALIFIERS): Likewise.
12606 (SQSHL_QUALIFIERS): Likewise.
12607 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
12608 (mve_sqrshrl_sat<supf>_di): Likewise.
12609 (mve_uqrshl_si): Likewise.
12610 (mve_sqrshr_si): Likewise.
12611 (mve_uqshll_di): Likewise.
12612 (mve_urshrl_di): Likewise.
12613 (mve_uqshl_si): Likewise.
12614 (mve_urshr_si): Likewise.
12615 (mve_sqshl_si): Likewise.
12616 (mve_srshr_si): Likewise.
12617 (mve_srshrl_di): Likewise.
12618 (mve_sqshll_di): Likewise.
12620 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12621 Andre Vieira <andre.simoesdiasvieira@arm.com>
12622 Mihail Ionescu <mihail.ionescu@arm.com>
12624 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
12625 (vsetq_lane_f32): Likewise.
12626 (vsetq_lane_s16): Likewise.
12627 (vsetq_lane_s32): Likewise.
12628 (vsetq_lane_s8): Likewise.
12629 (vsetq_lane_s64): Likewise.
12630 (vsetq_lane_u8): Likewise.
12631 (vsetq_lane_u16): Likewise.
12632 (vsetq_lane_u32): Likewise.
12633 (vsetq_lane_u64): Likewise.
12634 (vgetq_lane_f16): Likewise.
12635 (vgetq_lane_f32): Likewise.
12636 (vgetq_lane_s16): Likewise.
12637 (vgetq_lane_s32): Likewise.
12638 (vgetq_lane_s8): Likewise.
12639 (vgetq_lane_s64): Likewise.
12640 (vgetq_lane_u8): Likewise.
12641 (vgetq_lane_u16): Likewise.
12642 (vgetq_lane_u32): Likewise.
12643 (vgetq_lane_u64): Likewise.
12644 (__ARM_NUM_LANES): Likewise.
12645 (__ARM_LANEQ): Likewise.
12646 (__ARM_CHECK_LANEQ): Likewise.
12647 (__arm_vsetq_lane_s16): Define intrinsic.
12648 (__arm_vsetq_lane_s32): Likewise.
12649 (__arm_vsetq_lane_s8): Likewise.
12650 (__arm_vsetq_lane_s64): Likewise.
12651 (__arm_vsetq_lane_u8): Likewise.
12652 (__arm_vsetq_lane_u16): Likewise.
12653 (__arm_vsetq_lane_u32): Likewise.
12654 (__arm_vsetq_lane_u64): Likewise.
12655 (__arm_vgetq_lane_s16): Likewise.
12656 (__arm_vgetq_lane_s32): Likewise.
12657 (__arm_vgetq_lane_s8): Likewise.
12658 (__arm_vgetq_lane_s64): Likewise.
12659 (__arm_vgetq_lane_u8): Likewise.
12660 (__arm_vgetq_lane_u16): Likewise.
12661 (__arm_vgetq_lane_u32): Likewise.
12662 (__arm_vgetq_lane_u64): Likewise.
12663 (__arm_vsetq_lane_f16): Likewise.
12664 (__arm_vsetq_lane_f32): Likewise.
12665 (__arm_vgetq_lane_f16): Likewise.
12666 (__arm_vgetq_lane_f32): Likewise.
12667 (vgetq_lane): Define polymorphic variant.
12668 (vsetq_lane): Likewise.
12669 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
12671 (mve_vec_extractv2didi): Likewise.
12672 (mve_vec_extract_sext_internal<mode>): Likewise.
12673 (mve_vec_extract_zext_internal<mode>): Likewise.
12674 (mve_vec_set<mode>_internal): Likewise.
12675 (mve_vec_setv2di_internal): Likewise.
12676 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
12678 (vec_extract<mode><V_elem_l>): Rename to
12679 "neon_vec_extract<mode><V_elem_l>".
12680 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
12681 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
12682 pattern common for MVE and NEON.
12683 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
12686 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
12688 * config/arm/mve.md (earlyclobber_32): New mode attribute.
12689 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
12690 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
12692 2020-03-23 Richard Biener <rguenther@suse.de>
12694 PR tree-optimization/94261
12695 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
12696 IL operand swapping code.
12697 (vect_slp_rearrange_stmts): Do not arrange isomorphic
12698 nodes that would need operation code adjustments.
12700 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
12702 * doc/install.texi (amdgcn-*-amdhsa): Renamed
12703 from amdgcn-unknown-amdhsa; change
12704 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
12706 2020-03-23 Richard Biener <rguenther@suse.de>
12709 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
12710 directly rather than also folding it via build_fold_addr_expr.
12712 2020-03-23 Richard Biener <rguenther@suse.de>
12714 PR tree-optimization/94266
12715 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
12716 addresses of TARGET_MEM_REFs.
12718 2020-03-23 Martin Liska <mliska@suse.cz>
12721 * symtab.c (symtab_node::clone_references): Save speculative_id
12722 as ref may be overwritten by create_reference.
12723 (symtab_node::clone_referring): Likewise.
12724 (symtab_node::clone_reference): Likewise.
12726 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
12728 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
12729 references to Darwin.
12730 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
12731 unconditionally and comment on why.
12733 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
12735 * config/darwin.c (darwin_mergeable_constant_section): Collect
12736 section anchor checks into the caller.
12737 (machopic_select_section): Collect section anchor checks into
12738 the determination of 'effective zero-size' objects. When the
12739 size is unknown, assume it is non-zero, and thus return the
12740 'generic' section for the DECL.
12742 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
12745 * config/darwin.opt: Amend options descriptions.
12747 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
12749 PR rtl-optimization/94052
12750 * lra-constraints.c (simplify_operand_subreg): Reload the inner
12751 register of a paradoxical subreg if simplify_subreg_regno fails
12752 to give a valid hard register for the outer mode.
12754 2020-03-20 Martin Jambor <mjambor@suse.cz>
12756 PR tree-optimization/93435
12757 * params.opt (sra-max-propagations): New parameter.
12758 * tree-sra.c (propagation_budget): New variable.
12759 (budget_for_propagation_access): New function.
12760 (propagate_subaccesses_from_rhs): Use it.
12761 (propagate_subaccesses_from_lhs): Likewise.
12762 (propagate_all_subaccesses): Set up and destroy propagation_budget.
12764 2020-03-20 Carl Love <cel@us.ibm.com>
12767 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12768 Add check for TARGET_FPRND for Power 7 or newer.
12770 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
12773 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
12774 (cgraph_edge::redirect_callee): Move here; likewise.
12775 (cgraph_node::remove_callees): Update calls_comdat_local flag.
12776 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
12778 (cgraph_node::check_calls_comdat_local_p): New member function.
12779 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
12780 (cgraph_edge::redirect_callee): Move offline.
12781 * ipa-fnsummary.c (compute_fn_summary): Do not compute
12782 calls_comdat_local flag here.
12783 * ipa-inline-transform.c (inline_call): Fix updating of
12784 calls_comdat_local flag.
12785 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
12786 * symtab.c (symtab_node::add_to_same_comdat_group): Update
12787 calls_comdat_local flag.
12789 2020-03-20 Richard Biener <rguenther@suse.de>
12791 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
12792 from the possibly modified root.
12794 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12795 Andre Vieira <andre.simoesdiasvieira@arm.com>
12796 Mihail Ionescu <mihail.ionescu@arm.com>
12798 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
12799 (vst1q_p_s8): Likewise.
12800 (vst2q_s8): Likewise.
12801 (vst2q_u8): Likewise.
12802 (vld1q_z_u8): Likewise.
12803 (vld1q_z_s8): Likewise.
12804 (vld2q_s8): Likewise.
12805 (vld2q_u8): Likewise.
12806 (vld4q_s8): Likewise.
12807 (vld4q_u8): Likewise.
12808 (vst1q_p_u16): Likewise.
12809 (vst1q_p_s16): Likewise.
12810 (vst2q_s16): Likewise.
12811 (vst2q_u16): Likewise.
12812 (vld1q_z_u16): Likewise.
12813 (vld1q_z_s16): Likewise.
12814 (vld2q_s16): Likewise.
12815 (vld2q_u16): Likewise.
12816 (vld4q_s16): Likewise.
12817 (vld4q_u16): Likewise.
12818 (vst1q_p_u32): Likewise.
12819 (vst1q_p_s32): Likewise.
12820 (vst2q_s32): Likewise.
12821 (vst2q_u32): Likewise.
12822 (vld1q_z_u32): Likewise.
12823 (vld1q_z_s32): Likewise.
12824 (vld2q_s32): Likewise.
12825 (vld2q_u32): Likewise.
12826 (vld4q_s32): Likewise.
12827 (vld4q_u32): Likewise.
12828 (vld4q_f16): Likewise.
12829 (vld2q_f16): Likewise.
12830 (vld1q_z_f16): Likewise.
12831 (vst2q_f16): Likewise.
12832 (vst1q_p_f16): Likewise.
12833 (vld4q_f32): Likewise.
12834 (vld2q_f32): Likewise.
12835 (vld1q_z_f32): Likewise.
12836 (vst2q_f32): Likewise.
12837 (vst1q_p_f32): Likewise.
12838 (__arm_vst1q_p_u8): Define intrinsic.
12839 (__arm_vst1q_p_s8): Likewise.
12840 (__arm_vst2q_s8): Likewise.
12841 (__arm_vst2q_u8): Likewise.
12842 (__arm_vld1q_z_u8): Likewise.
12843 (__arm_vld1q_z_s8): Likewise.
12844 (__arm_vld2q_s8): Likewise.
12845 (__arm_vld2q_u8): Likewise.
12846 (__arm_vld4q_s8): Likewise.
12847 (__arm_vld4q_u8): Likewise.
12848 (__arm_vst1q_p_u16): Likewise.
12849 (__arm_vst1q_p_s16): Likewise.
12850 (__arm_vst2q_s16): Likewise.
12851 (__arm_vst2q_u16): Likewise.
12852 (__arm_vld1q_z_u16): Likewise.
12853 (__arm_vld1q_z_s16): Likewise.
12854 (__arm_vld2q_s16): Likewise.
12855 (__arm_vld2q_u16): Likewise.
12856 (__arm_vld4q_s16): Likewise.
12857 (__arm_vld4q_u16): Likewise.
12858 (__arm_vst1q_p_u32): Likewise.
12859 (__arm_vst1q_p_s32): Likewise.
12860 (__arm_vst2q_s32): Likewise.
12861 (__arm_vst2q_u32): Likewise.
12862 (__arm_vld1q_z_u32): Likewise.
12863 (__arm_vld1q_z_s32): Likewise.
12864 (__arm_vld2q_s32): Likewise.
12865 (__arm_vld2q_u32): Likewise.
12866 (__arm_vld4q_s32): Likewise.
12867 (__arm_vld4q_u32): Likewise.
12868 (__arm_vld4q_f16): Likewise.
12869 (__arm_vld2q_f16): Likewise.
12870 (__arm_vld1q_z_f16): Likewise.
12871 (__arm_vst2q_f16): Likewise.
12872 (__arm_vst1q_p_f16): Likewise.
12873 (__arm_vld4q_f32): Likewise.
12874 (__arm_vld2q_f32): Likewise.
12875 (__arm_vld1q_z_f32): Likewise.
12876 (__arm_vst2q_f32): Likewise.
12877 (__arm_vst1q_p_f32): Likewise.
12878 (vld1q_z): Define polymorphic variant.
12881 (vst1q_p): Likewise.
12883 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
12885 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
12886 (mve_vld2q<mode>): Likewise.
12887 (mve_vld4q<mode>): Likewise.
12889 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12890 Andre Vieira <andre.simoesdiasvieira@arm.com>
12891 Mihail Ionescu <mihail.ionescu@arm.com>
12893 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
12894 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
12895 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
12896 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
12897 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
12898 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
12899 * config/arm/arm_mve.h (vadciq_s32): Define macro.
12900 (vadciq_u32): Likewise.
12901 (vadciq_m_s32): Likewise.
12902 (vadciq_m_u32): Likewise.
12903 (vadcq_s32): Likewise.
12904 (vadcq_u32): Likewise.
12905 (vadcq_m_s32): Likewise.
12906 (vadcq_m_u32): Likewise.
12907 (vsbciq_s32): Likewise.
12908 (vsbciq_u32): Likewise.
12909 (vsbciq_m_s32): Likewise.
12910 (vsbciq_m_u32): Likewise.
12911 (vsbcq_s32): Likewise.
12912 (vsbcq_u32): Likewise.
12913 (vsbcq_m_s32): Likewise.
12914 (vsbcq_m_u32): Likewise.
12915 (__arm_vadciq_s32): Define intrinsic.
12916 (__arm_vadciq_u32): Likewise.
12917 (__arm_vadciq_m_s32): Likewise.
12918 (__arm_vadciq_m_u32): Likewise.
12919 (__arm_vadcq_s32): Likewise.
12920 (__arm_vadcq_u32): Likewise.
12921 (__arm_vadcq_m_s32): Likewise.
12922 (__arm_vadcq_m_u32): Likewise.
12923 (__arm_vsbciq_s32): Likewise.
12924 (__arm_vsbciq_u32): Likewise.
12925 (__arm_vsbciq_m_s32): Likewise.
12926 (__arm_vsbciq_m_u32): Likewise.
12927 (__arm_vsbcq_s32): Likewise.
12928 (__arm_vsbcq_u32): Likewise.
12929 (__arm_vsbcq_m_s32): Likewise.
12930 (__arm_vsbcq_m_u32): Likewise.
12931 (vadciq_m): Define polymorphic variant.
12932 (vadciq): Likewise.
12933 (vadcq_m): Likewise.
12935 (vsbciq_m): Likewise.
12936 (vsbciq): Likewise.
12937 (vsbcq_m): Likewise.
12939 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
12941 (BINOP_UNONE_UNONE_UNONE): Likewise.
12942 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12943 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
12944 * config/arm/mve.md (VADCIQ): Define iterator.
12945 (VADCIQ_M): Likewise.
12947 (VSBCQ_M): Likewise.
12948 (VSBCIQ): Likewise.
12949 (VSBCIQ_M): Likewise.
12951 (VADCQ_M): Likewise.
12952 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
12953 (mve_vadciq_<supf>v4si): Likewise.
12954 (mve_vadcq_m_<supf>v4si): Likewise.
12955 (mve_vadcq_<supf>v4si): Likewise.
12956 (mve_vsbciq_m_<supf>v4si): Likewise.
12957 (mve_vsbciq_<supf>v4si): Likewise.
12958 (mve_vsbcq_m_<supf>v4si): Likewise.
12959 (mve_vsbcq_<supf>v4si): Likewise.
12960 (get_fpscr_nzcvqc): Define isns.
12961 (set_fpscr_nzcvqc): Define isns.
12962 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
12963 (UNSPEC_SET_FPSCR_NZCVQC): Define.
12965 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12967 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
12968 (vddupq_x_n_u16): Likewise.
12969 (vddupq_x_n_u32): Likewise.
12970 (vddupq_x_wb_u8): Likewise.
12971 (vddupq_x_wb_u16): Likewise.
12972 (vddupq_x_wb_u32): Likewise.
12973 (vdwdupq_x_n_u8): Likewise.
12974 (vdwdupq_x_n_u16): Likewise.
12975 (vdwdupq_x_n_u32): Likewise.
12976 (vdwdupq_x_wb_u8): Likewise.
12977 (vdwdupq_x_wb_u16): Likewise.
12978 (vdwdupq_x_wb_u32): Likewise.
12979 (vidupq_x_n_u8): Likewise.
12980 (vidupq_x_n_u16): Likewise.
12981 (vidupq_x_n_u32): Likewise.
12982 (vidupq_x_wb_u8): Likewise.
12983 (vidupq_x_wb_u16): Likewise.
12984 (vidupq_x_wb_u32): Likewise.
12985 (viwdupq_x_n_u8): Likewise.
12986 (viwdupq_x_n_u16): Likewise.
12987 (viwdupq_x_n_u32): Likewise.
12988 (viwdupq_x_wb_u8): Likewise.
12989 (viwdupq_x_wb_u16): Likewise.
12990 (viwdupq_x_wb_u32): Likewise.
12991 (vdupq_x_n_s8): Likewise.
12992 (vdupq_x_n_s16): Likewise.
12993 (vdupq_x_n_s32): Likewise.
12994 (vdupq_x_n_u8): Likewise.
12995 (vdupq_x_n_u16): Likewise.
12996 (vdupq_x_n_u32): Likewise.
12997 (vminq_x_s8): Likewise.
12998 (vminq_x_s16): Likewise.
12999 (vminq_x_s32): Likewise.
13000 (vminq_x_u8): Likewise.
13001 (vminq_x_u16): Likewise.
13002 (vminq_x_u32): Likewise.
13003 (vmaxq_x_s8): Likewise.
13004 (vmaxq_x_s16): Likewise.
13005 (vmaxq_x_s32): Likewise.
13006 (vmaxq_x_u8): Likewise.
13007 (vmaxq_x_u16): Likewise.
13008 (vmaxq_x_u32): Likewise.
13009 (vabdq_x_s8): Likewise.
13010 (vabdq_x_s16): Likewise.
13011 (vabdq_x_s32): Likewise.
13012 (vabdq_x_u8): Likewise.
13013 (vabdq_x_u16): Likewise.
13014 (vabdq_x_u32): Likewise.
13015 (vabsq_x_s8): Likewise.
13016 (vabsq_x_s16): Likewise.
13017 (vabsq_x_s32): Likewise.
13018 (vaddq_x_s8): Likewise.
13019 (vaddq_x_s16): Likewise.
13020 (vaddq_x_s32): Likewise.
13021 (vaddq_x_n_s8): Likewise.
13022 (vaddq_x_n_s16): Likewise.
13023 (vaddq_x_n_s32): Likewise.
13024 (vaddq_x_u8): Likewise.
13025 (vaddq_x_u16): Likewise.
13026 (vaddq_x_u32): Likewise.
13027 (vaddq_x_n_u8): Likewise.
13028 (vaddq_x_n_u16): Likewise.
13029 (vaddq_x_n_u32): Likewise.
13030 (vclsq_x_s8): Likewise.
13031 (vclsq_x_s16): Likewise.
13032 (vclsq_x_s32): Likewise.
13033 (vclzq_x_s8): Likewise.
13034 (vclzq_x_s16): Likewise.
13035 (vclzq_x_s32): Likewise.
13036 (vclzq_x_u8): Likewise.
13037 (vclzq_x_u16): Likewise.
13038 (vclzq_x_u32): Likewise.
13039 (vnegq_x_s8): Likewise.
13040 (vnegq_x_s16): Likewise.
13041 (vnegq_x_s32): Likewise.
13042 (vmulhq_x_s8): Likewise.
13043 (vmulhq_x_s16): Likewise.
13044 (vmulhq_x_s32): Likewise.
13045 (vmulhq_x_u8): Likewise.
13046 (vmulhq_x_u16): Likewise.
13047 (vmulhq_x_u32): Likewise.
13048 (vmullbq_poly_x_p8): Likewise.
13049 (vmullbq_poly_x_p16): Likewise.
13050 (vmullbq_int_x_s8): Likewise.
13051 (vmullbq_int_x_s16): Likewise.
13052 (vmullbq_int_x_s32): Likewise.
13053 (vmullbq_int_x_u8): Likewise.
13054 (vmullbq_int_x_u16): Likewise.
13055 (vmullbq_int_x_u32): Likewise.
13056 (vmulltq_poly_x_p8): Likewise.
13057 (vmulltq_poly_x_p16): Likewise.
13058 (vmulltq_int_x_s8): Likewise.
13059 (vmulltq_int_x_s16): Likewise.
13060 (vmulltq_int_x_s32): Likewise.
13061 (vmulltq_int_x_u8): Likewise.
13062 (vmulltq_int_x_u16): Likewise.
13063 (vmulltq_int_x_u32): Likewise.
13064 (vmulq_x_s8): Likewise.
13065 (vmulq_x_s16): Likewise.
13066 (vmulq_x_s32): Likewise.
13067 (vmulq_x_n_s8): Likewise.
13068 (vmulq_x_n_s16): Likewise.
13069 (vmulq_x_n_s32): Likewise.
13070 (vmulq_x_u8): Likewise.
13071 (vmulq_x_u16): Likewise.
13072 (vmulq_x_u32): Likewise.
13073 (vmulq_x_n_u8): Likewise.
13074 (vmulq_x_n_u16): Likewise.
13075 (vmulq_x_n_u32): Likewise.
13076 (vsubq_x_s8): Likewise.
13077 (vsubq_x_s16): Likewise.
13078 (vsubq_x_s32): Likewise.
13079 (vsubq_x_n_s8): Likewise.
13080 (vsubq_x_n_s16): Likewise.
13081 (vsubq_x_n_s32): Likewise.
13082 (vsubq_x_u8): Likewise.
13083 (vsubq_x_u16): Likewise.
13084 (vsubq_x_u32): Likewise.
13085 (vsubq_x_n_u8): Likewise.
13086 (vsubq_x_n_u16): Likewise.
13087 (vsubq_x_n_u32): Likewise.
13088 (vcaddq_rot90_x_s8): Likewise.
13089 (vcaddq_rot90_x_s16): Likewise.
13090 (vcaddq_rot90_x_s32): Likewise.
13091 (vcaddq_rot90_x_u8): Likewise.
13092 (vcaddq_rot90_x_u16): Likewise.
13093 (vcaddq_rot90_x_u32): Likewise.
13094 (vcaddq_rot270_x_s8): Likewise.
13095 (vcaddq_rot270_x_s16): Likewise.
13096 (vcaddq_rot270_x_s32): Likewise.
13097 (vcaddq_rot270_x_u8): Likewise.
13098 (vcaddq_rot270_x_u16): Likewise.
13099 (vcaddq_rot270_x_u32): Likewise.
13100 (vhaddq_x_n_s8): Likewise.
13101 (vhaddq_x_n_s16): Likewise.
13102 (vhaddq_x_n_s32): Likewise.
13103 (vhaddq_x_n_u8): Likewise.
13104 (vhaddq_x_n_u16): Likewise.
13105 (vhaddq_x_n_u32): Likewise.
13106 (vhaddq_x_s8): Likewise.
13107 (vhaddq_x_s16): Likewise.
13108 (vhaddq_x_s32): Likewise.
13109 (vhaddq_x_u8): Likewise.
13110 (vhaddq_x_u16): Likewise.
13111 (vhaddq_x_u32): Likewise.
13112 (vhcaddq_rot90_x_s8): Likewise.
13113 (vhcaddq_rot90_x_s16): Likewise.
13114 (vhcaddq_rot90_x_s32): Likewise.
13115 (vhcaddq_rot270_x_s8): Likewise.
13116 (vhcaddq_rot270_x_s16): Likewise.
13117 (vhcaddq_rot270_x_s32): Likewise.
13118 (vhsubq_x_n_s8): Likewise.
13119 (vhsubq_x_n_s16): Likewise.
13120 (vhsubq_x_n_s32): Likewise.
13121 (vhsubq_x_n_u8): Likewise.
13122 (vhsubq_x_n_u16): Likewise.
13123 (vhsubq_x_n_u32): Likewise.
13124 (vhsubq_x_s8): Likewise.
13125 (vhsubq_x_s16): Likewise.
13126 (vhsubq_x_s32): Likewise.
13127 (vhsubq_x_u8): Likewise.
13128 (vhsubq_x_u16): Likewise.
13129 (vhsubq_x_u32): Likewise.
13130 (vrhaddq_x_s8): Likewise.
13131 (vrhaddq_x_s16): Likewise.
13132 (vrhaddq_x_s32): Likewise.
13133 (vrhaddq_x_u8): Likewise.
13134 (vrhaddq_x_u16): Likewise.
13135 (vrhaddq_x_u32): Likewise.
13136 (vrmulhq_x_s8): Likewise.
13137 (vrmulhq_x_s16): Likewise.
13138 (vrmulhq_x_s32): Likewise.
13139 (vrmulhq_x_u8): Likewise.
13140 (vrmulhq_x_u16): Likewise.
13141 (vrmulhq_x_u32): Likewise.
13142 (vandq_x_s8): Likewise.
13143 (vandq_x_s16): Likewise.
13144 (vandq_x_s32): Likewise.
13145 (vandq_x_u8): Likewise.
13146 (vandq_x_u16): Likewise.
13147 (vandq_x_u32): Likewise.
13148 (vbicq_x_s8): Likewise.
13149 (vbicq_x_s16): Likewise.
13150 (vbicq_x_s32): Likewise.
13151 (vbicq_x_u8): Likewise.
13152 (vbicq_x_u16): Likewise.
13153 (vbicq_x_u32): Likewise.
13154 (vbrsrq_x_n_s8): Likewise.
13155 (vbrsrq_x_n_s16): Likewise.
13156 (vbrsrq_x_n_s32): Likewise.
13157 (vbrsrq_x_n_u8): Likewise.
13158 (vbrsrq_x_n_u16): Likewise.
13159 (vbrsrq_x_n_u32): Likewise.
13160 (veorq_x_s8): Likewise.
13161 (veorq_x_s16): Likewise.
13162 (veorq_x_s32): Likewise.
13163 (veorq_x_u8): Likewise.
13164 (veorq_x_u16): Likewise.
13165 (veorq_x_u32): Likewise.
13166 (vmovlbq_x_s8): Likewise.
13167 (vmovlbq_x_s16): Likewise.
13168 (vmovlbq_x_u8): Likewise.
13169 (vmovlbq_x_u16): Likewise.
13170 (vmovltq_x_s8): Likewise.
13171 (vmovltq_x_s16): Likewise.
13172 (vmovltq_x_u8): Likewise.
13173 (vmovltq_x_u16): Likewise.
13174 (vmvnq_x_s8): Likewise.
13175 (vmvnq_x_s16): Likewise.
13176 (vmvnq_x_s32): Likewise.
13177 (vmvnq_x_u8): Likewise.
13178 (vmvnq_x_u16): Likewise.
13179 (vmvnq_x_u32): Likewise.
13180 (vmvnq_x_n_s16): Likewise.
13181 (vmvnq_x_n_s32): Likewise.
13182 (vmvnq_x_n_u16): Likewise.
13183 (vmvnq_x_n_u32): Likewise.
13184 (vornq_x_s8): Likewise.
13185 (vornq_x_s16): Likewise.
13186 (vornq_x_s32): Likewise.
13187 (vornq_x_u8): Likewise.
13188 (vornq_x_u16): Likewise.
13189 (vornq_x_u32): Likewise.
13190 (vorrq_x_s8): Likewise.
13191 (vorrq_x_s16): Likewise.
13192 (vorrq_x_s32): Likewise.
13193 (vorrq_x_u8): Likewise.
13194 (vorrq_x_u16): Likewise.
13195 (vorrq_x_u32): Likewise.
13196 (vrev16q_x_s8): Likewise.
13197 (vrev16q_x_u8): Likewise.
13198 (vrev32q_x_s8): Likewise.
13199 (vrev32q_x_s16): Likewise.
13200 (vrev32q_x_u8): Likewise.
13201 (vrev32q_x_u16): Likewise.
13202 (vrev64q_x_s8): Likewise.
13203 (vrev64q_x_s16): Likewise.
13204 (vrev64q_x_s32): Likewise.
13205 (vrev64q_x_u8): Likewise.
13206 (vrev64q_x_u16): Likewise.
13207 (vrev64q_x_u32): Likewise.
13208 (vrshlq_x_s8): Likewise.
13209 (vrshlq_x_s16): Likewise.
13210 (vrshlq_x_s32): Likewise.
13211 (vrshlq_x_u8): Likewise.
13212 (vrshlq_x_u16): Likewise.
13213 (vrshlq_x_u32): Likewise.
13214 (vshllbq_x_n_s8): Likewise.
13215 (vshllbq_x_n_s16): Likewise.
13216 (vshllbq_x_n_u8): Likewise.
13217 (vshllbq_x_n_u16): Likewise.
13218 (vshlltq_x_n_s8): Likewise.
13219 (vshlltq_x_n_s16): Likewise.
13220 (vshlltq_x_n_u8): Likewise.
13221 (vshlltq_x_n_u16): Likewise.
13222 (vshlq_x_s8): Likewise.
13223 (vshlq_x_s16): Likewise.
13224 (vshlq_x_s32): Likewise.
13225 (vshlq_x_u8): Likewise.
13226 (vshlq_x_u16): Likewise.
13227 (vshlq_x_u32): Likewise.
13228 (vshlq_x_n_s8): Likewise.
13229 (vshlq_x_n_s16): Likewise.
13230 (vshlq_x_n_s32): Likewise.
13231 (vshlq_x_n_u8): Likewise.
13232 (vshlq_x_n_u16): Likewise.
13233 (vshlq_x_n_u32): Likewise.
13234 (vrshrq_x_n_s8): Likewise.
13235 (vrshrq_x_n_s16): Likewise.
13236 (vrshrq_x_n_s32): Likewise.
13237 (vrshrq_x_n_u8): Likewise.
13238 (vrshrq_x_n_u16): Likewise.
13239 (vrshrq_x_n_u32): Likewise.
13240 (vshrq_x_n_s8): Likewise.
13241 (vshrq_x_n_s16): Likewise.
13242 (vshrq_x_n_s32): Likewise.
13243 (vshrq_x_n_u8): Likewise.
13244 (vshrq_x_n_u16): Likewise.
13245 (vshrq_x_n_u32): Likewise.
13246 (vdupq_x_n_f16): Likewise.
13247 (vdupq_x_n_f32): Likewise.
13248 (vminnmq_x_f16): Likewise.
13249 (vminnmq_x_f32): Likewise.
13250 (vmaxnmq_x_f16): Likewise.
13251 (vmaxnmq_x_f32): Likewise.
13252 (vabdq_x_f16): Likewise.
13253 (vabdq_x_f32): Likewise.
13254 (vabsq_x_f16): Likewise.
13255 (vabsq_x_f32): Likewise.
13256 (vaddq_x_f16): Likewise.
13257 (vaddq_x_f32): Likewise.
13258 (vaddq_x_n_f16): Likewise.
13259 (vaddq_x_n_f32): Likewise.
13260 (vnegq_x_f16): Likewise.
13261 (vnegq_x_f32): Likewise.
13262 (vmulq_x_f16): Likewise.
13263 (vmulq_x_f32): Likewise.
13264 (vmulq_x_n_f16): Likewise.
13265 (vmulq_x_n_f32): Likewise.
13266 (vsubq_x_f16): Likewise.
13267 (vsubq_x_f32): Likewise.
13268 (vsubq_x_n_f16): Likewise.
13269 (vsubq_x_n_f32): Likewise.
13270 (vcaddq_rot90_x_f16): Likewise.
13271 (vcaddq_rot90_x_f32): Likewise.
13272 (vcaddq_rot270_x_f16): Likewise.
13273 (vcaddq_rot270_x_f32): Likewise.
13274 (vcmulq_x_f16): Likewise.
13275 (vcmulq_x_f32): Likewise.
13276 (vcmulq_rot90_x_f16): Likewise.
13277 (vcmulq_rot90_x_f32): Likewise.
13278 (vcmulq_rot180_x_f16): Likewise.
13279 (vcmulq_rot180_x_f32): Likewise.
13280 (vcmulq_rot270_x_f16): Likewise.
13281 (vcmulq_rot270_x_f32): Likewise.
13282 (vcvtaq_x_s16_f16): Likewise.
13283 (vcvtaq_x_s32_f32): Likewise.
13284 (vcvtaq_x_u16_f16): Likewise.
13285 (vcvtaq_x_u32_f32): Likewise.
13286 (vcvtnq_x_s16_f16): Likewise.
13287 (vcvtnq_x_s32_f32): Likewise.
13288 (vcvtnq_x_u16_f16): Likewise.
13289 (vcvtnq_x_u32_f32): Likewise.
13290 (vcvtpq_x_s16_f16): Likewise.
13291 (vcvtpq_x_s32_f32): Likewise.
13292 (vcvtpq_x_u16_f16): Likewise.
13293 (vcvtpq_x_u32_f32): Likewise.
13294 (vcvtmq_x_s16_f16): Likewise.
13295 (vcvtmq_x_s32_f32): Likewise.
13296 (vcvtmq_x_u16_f16): Likewise.
13297 (vcvtmq_x_u32_f32): Likewise.
13298 (vcvtbq_x_f32_f16): Likewise.
13299 (vcvttq_x_f32_f16): Likewise.
13300 (vcvtq_x_f16_u16): Likewise.
13301 (vcvtq_x_f16_s16): Likewise.
13302 (vcvtq_x_f32_s32): Likewise.
13303 (vcvtq_x_f32_u32): Likewise.
13304 (vcvtq_x_n_f16_s16): Likewise.
13305 (vcvtq_x_n_f16_u16): Likewise.
13306 (vcvtq_x_n_f32_s32): Likewise.
13307 (vcvtq_x_n_f32_u32): Likewise.
13308 (vcvtq_x_s16_f16): Likewise.
13309 (vcvtq_x_s32_f32): Likewise.
13310 (vcvtq_x_u16_f16): Likewise.
13311 (vcvtq_x_u32_f32): Likewise.
13312 (vcvtq_x_n_s16_f16): Likewise.
13313 (vcvtq_x_n_s32_f32): Likewise.
13314 (vcvtq_x_n_u16_f16): Likewise.
13315 (vcvtq_x_n_u32_f32): Likewise.
13316 (vrndq_x_f16): Likewise.
13317 (vrndq_x_f32): Likewise.
13318 (vrndnq_x_f16): Likewise.
13319 (vrndnq_x_f32): Likewise.
13320 (vrndmq_x_f16): Likewise.
13321 (vrndmq_x_f32): Likewise.
13322 (vrndpq_x_f16): Likewise.
13323 (vrndpq_x_f32): Likewise.
13324 (vrndaq_x_f16): Likewise.
13325 (vrndaq_x_f32): Likewise.
13326 (vrndxq_x_f16): Likewise.
13327 (vrndxq_x_f32): Likewise.
13328 (vandq_x_f16): Likewise.
13329 (vandq_x_f32): Likewise.
13330 (vbicq_x_f16): Likewise.
13331 (vbicq_x_f32): Likewise.
13332 (vbrsrq_x_n_f16): Likewise.
13333 (vbrsrq_x_n_f32): Likewise.
13334 (veorq_x_f16): Likewise.
13335 (veorq_x_f32): Likewise.
13336 (vornq_x_f16): Likewise.
13337 (vornq_x_f32): Likewise.
13338 (vorrq_x_f16): Likewise.
13339 (vorrq_x_f32): Likewise.
13340 (vrev32q_x_f16): Likewise.
13341 (vrev64q_x_f16): Likewise.
13342 (vrev64q_x_f32): Likewise.
13343 (__arm_vddupq_x_n_u8): Define intrinsic.
13344 (__arm_vddupq_x_n_u16): Likewise.
13345 (__arm_vddupq_x_n_u32): Likewise.
13346 (__arm_vddupq_x_wb_u8): Likewise.
13347 (__arm_vddupq_x_wb_u16): Likewise.
13348 (__arm_vddupq_x_wb_u32): Likewise.
13349 (__arm_vdwdupq_x_n_u8): Likewise.
13350 (__arm_vdwdupq_x_n_u16): Likewise.
13351 (__arm_vdwdupq_x_n_u32): Likewise.
13352 (__arm_vdwdupq_x_wb_u8): Likewise.
13353 (__arm_vdwdupq_x_wb_u16): Likewise.
13354 (__arm_vdwdupq_x_wb_u32): Likewise.
13355 (__arm_vidupq_x_n_u8): Likewise.
13356 (__arm_vidupq_x_n_u16): Likewise.
13357 (__arm_vidupq_x_n_u32): Likewise.
13358 (__arm_vidupq_x_wb_u8): Likewise.
13359 (__arm_vidupq_x_wb_u16): Likewise.
13360 (__arm_vidupq_x_wb_u32): Likewise.
13361 (__arm_viwdupq_x_n_u8): Likewise.
13362 (__arm_viwdupq_x_n_u16): Likewise.
13363 (__arm_viwdupq_x_n_u32): Likewise.
13364 (__arm_viwdupq_x_wb_u8): Likewise.
13365 (__arm_viwdupq_x_wb_u16): Likewise.
13366 (__arm_viwdupq_x_wb_u32): Likewise.
13367 (__arm_vdupq_x_n_s8): Likewise.
13368 (__arm_vdupq_x_n_s16): Likewise.
13369 (__arm_vdupq_x_n_s32): Likewise.
13370 (__arm_vdupq_x_n_u8): Likewise.
13371 (__arm_vdupq_x_n_u16): Likewise.
13372 (__arm_vdupq_x_n_u32): Likewise.
13373 (__arm_vminq_x_s8): Likewise.
13374 (__arm_vminq_x_s16): Likewise.
13375 (__arm_vminq_x_s32): Likewise.
13376 (__arm_vminq_x_u8): Likewise.
13377 (__arm_vminq_x_u16): Likewise.
13378 (__arm_vminq_x_u32): Likewise.
13379 (__arm_vmaxq_x_s8): Likewise.
13380 (__arm_vmaxq_x_s16): Likewise.
13381 (__arm_vmaxq_x_s32): Likewise.
13382 (__arm_vmaxq_x_u8): Likewise.
13383 (__arm_vmaxq_x_u16): Likewise.
13384 (__arm_vmaxq_x_u32): Likewise.
13385 (__arm_vabdq_x_s8): Likewise.
13386 (__arm_vabdq_x_s16): Likewise.
13387 (__arm_vabdq_x_s32): Likewise.
13388 (__arm_vabdq_x_u8): Likewise.
13389 (__arm_vabdq_x_u16): Likewise.
13390 (__arm_vabdq_x_u32): Likewise.
13391 (__arm_vabsq_x_s8): Likewise.
13392 (__arm_vabsq_x_s16): Likewise.
13393 (__arm_vabsq_x_s32): Likewise.
13394 (__arm_vaddq_x_s8): Likewise.
13395 (__arm_vaddq_x_s16): Likewise.
13396 (__arm_vaddq_x_s32): Likewise.
13397 (__arm_vaddq_x_n_s8): Likewise.
13398 (__arm_vaddq_x_n_s16): Likewise.
13399 (__arm_vaddq_x_n_s32): Likewise.
13400 (__arm_vaddq_x_u8): Likewise.
13401 (__arm_vaddq_x_u16): Likewise.
13402 (__arm_vaddq_x_u32): Likewise.
13403 (__arm_vaddq_x_n_u8): Likewise.
13404 (__arm_vaddq_x_n_u16): Likewise.
13405 (__arm_vaddq_x_n_u32): Likewise.
13406 (__arm_vclsq_x_s8): Likewise.
13407 (__arm_vclsq_x_s16): Likewise.
13408 (__arm_vclsq_x_s32): Likewise.
13409 (__arm_vclzq_x_s8): Likewise.
13410 (__arm_vclzq_x_s16): Likewise.
13411 (__arm_vclzq_x_s32): Likewise.
13412 (__arm_vclzq_x_u8): Likewise.
13413 (__arm_vclzq_x_u16): Likewise.
13414 (__arm_vclzq_x_u32): Likewise.
13415 (__arm_vnegq_x_s8): Likewise.
13416 (__arm_vnegq_x_s16): Likewise.
13417 (__arm_vnegq_x_s32): Likewise.
13418 (__arm_vmulhq_x_s8): Likewise.
13419 (__arm_vmulhq_x_s16): Likewise.
13420 (__arm_vmulhq_x_s32): Likewise.
13421 (__arm_vmulhq_x_u8): Likewise.
13422 (__arm_vmulhq_x_u16): Likewise.
13423 (__arm_vmulhq_x_u32): Likewise.
13424 (__arm_vmullbq_poly_x_p8): Likewise.
13425 (__arm_vmullbq_poly_x_p16): Likewise.
13426 (__arm_vmullbq_int_x_s8): Likewise.
13427 (__arm_vmullbq_int_x_s16): Likewise.
13428 (__arm_vmullbq_int_x_s32): Likewise.
13429 (__arm_vmullbq_int_x_u8): Likewise.
13430 (__arm_vmullbq_int_x_u16): Likewise.
13431 (__arm_vmullbq_int_x_u32): Likewise.
13432 (__arm_vmulltq_poly_x_p8): Likewise.
13433 (__arm_vmulltq_poly_x_p16): Likewise.
13434 (__arm_vmulltq_int_x_s8): Likewise.
13435 (__arm_vmulltq_int_x_s16): Likewise.
13436 (__arm_vmulltq_int_x_s32): Likewise.
13437 (__arm_vmulltq_int_x_u8): Likewise.
13438 (__arm_vmulltq_int_x_u16): Likewise.
13439 (__arm_vmulltq_int_x_u32): Likewise.
13440 (__arm_vmulq_x_s8): Likewise.
13441 (__arm_vmulq_x_s16): Likewise.
13442 (__arm_vmulq_x_s32): Likewise.
13443 (__arm_vmulq_x_n_s8): Likewise.
13444 (__arm_vmulq_x_n_s16): Likewise.
13445 (__arm_vmulq_x_n_s32): Likewise.
13446 (__arm_vmulq_x_u8): Likewise.
13447 (__arm_vmulq_x_u16): Likewise.
13448 (__arm_vmulq_x_u32): Likewise.
13449 (__arm_vmulq_x_n_u8): Likewise.
13450 (__arm_vmulq_x_n_u16): Likewise.
13451 (__arm_vmulq_x_n_u32): Likewise.
13452 (__arm_vsubq_x_s8): Likewise.
13453 (__arm_vsubq_x_s16): Likewise.
13454 (__arm_vsubq_x_s32): Likewise.
13455 (__arm_vsubq_x_n_s8): Likewise.
13456 (__arm_vsubq_x_n_s16): Likewise.
13457 (__arm_vsubq_x_n_s32): Likewise.
13458 (__arm_vsubq_x_u8): Likewise.
13459 (__arm_vsubq_x_u16): Likewise.
13460 (__arm_vsubq_x_u32): Likewise.
13461 (__arm_vsubq_x_n_u8): Likewise.
13462 (__arm_vsubq_x_n_u16): Likewise.
13463 (__arm_vsubq_x_n_u32): Likewise.
13464 (__arm_vcaddq_rot90_x_s8): Likewise.
13465 (__arm_vcaddq_rot90_x_s16): Likewise.
13466 (__arm_vcaddq_rot90_x_s32): Likewise.
13467 (__arm_vcaddq_rot90_x_u8): Likewise.
13468 (__arm_vcaddq_rot90_x_u16): Likewise.
13469 (__arm_vcaddq_rot90_x_u32): Likewise.
13470 (__arm_vcaddq_rot270_x_s8): Likewise.
13471 (__arm_vcaddq_rot270_x_s16): Likewise.
13472 (__arm_vcaddq_rot270_x_s32): Likewise.
13473 (__arm_vcaddq_rot270_x_u8): Likewise.
13474 (__arm_vcaddq_rot270_x_u16): Likewise.
13475 (__arm_vcaddq_rot270_x_u32): Likewise.
13476 (__arm_vhaddq_x_n_s8): Likewise.
13477 (__arm_vhaddq_x_n_s16): Likewise.
13478 (__arm_vhaddq_x_n_s32): Likewise.
13479 (__arm_vhaddq_x_n_u8): Likewise.
13480 (__arm_vhaddq_x_n_u16): Likewise.
13481 (__arm_vhaddq_x_n_u32): Likewise.
13482 (__arm_vhaddq_x_s8): Likewise.
13483 (__arm_vhaddq_x_s16): Likewise.
13484 (__arm_vhaddq_x_s32): Likewise.
13485 (__arm_vhaddq_x_u8): Likewise.
13486 (__arm_vhaddq_x_u16): Likewise.
13487 (__arm_vhaddq_x_u32): Likewise.
13488 (__arm_vhcaddq_rot90_x_s8): Likewise.
13489 (__arm_vhcaddq_rot90_x_s16): Likewise.
13490 (__arm_vhcaddq_rot90_x_s32): Likewise.
13491 (__arm_vhcaddq_rot270_x_s8): Likewise.
13492 (__arm_vhcaddq_rot270_x_s16): Likewise.
13493 (__arm_vhcaddq_rot270_x_s32): Likewise.
13494 (__arm_vhsubq_x_n_s8): Likewise.
13495 (__arm_vhsubq_x_n_s16): Likewise.
13496 (__arm_vhsubq_x_n_s32): Likewise.
13497 (__arm_vhsubq_x_n_u8): Likewise.
13498 (__arm_vhsubq_x_n_u16): Likewise.
13499 (__arm_vhsubq_x_n_u32): Likewise.
13500 (__arm_vhsubq_x_s8): Likewise.
13501 (__arm_vhsubq_x_s16): Likewise.
13502 (__arm_vhsubq_x_s32): Likewise.
13503 (__arm_vhsubq_x_u8): Likewise.
13504 (__arm_vhsubq_x_u16): Likewise.
13505 (__arm_vhsubq_x_u32): Likewise.
13506 (__arm_vrhaddq_x_s8): Likewise.
13507 (__arm_vrhaddq_x_s16): Likewise.
13508 (__arm_vrhaddq_x_s32): Likewise.
13509 (__arm_vrhaddq_x_u8): Likewise.
13510 (__arm_vrhaddq_x_u16): Likewise.
13511 (__arm_vrhaddq_x_u32): Likewise.
13512 (__arm_vrmulhq_x_s8): Likewise.
13513 (__arm_vrmulhq_x_s16): Likewise.
13514 (__arm_vrmulhq_x_s32): Likewise.
13515 (__arm_vrmulhq_x_u8): Likewise.
13516 (__arm_vrmulhq_x_u16): Likewise.
13517 (__arm_vrmulhq_x_u32): Likewise.
13518 (__arm_vandq_x_s8): Likewise.
13519 (__arm_vandq_x_s16): Likewise.
13520 (__arm_vandq_x_s32): Likewise.
13521 (__arm_vandq_x_u8): Likewise.
13522 (__arm_vandq_x_u16): Likewise.
13523 (__arm_vandq_x_u32): Likewise.
13524 (__arm_vbicq_x_s8): Likewise.
13525 (__arm_vbicq_x_s16): Likewise.
13526 (__arm_vbicq_x_s32): Likewise.
13527 (__arm_vbicq_x_u8): Likewise.
13528 (__arm_vbicq_x_u16): Likewise.
13529 (__arm_vbicq_x_u32): Likewise.
13530 (__arm_vbrsrq_x_n_s8): Likewise.
13531 (__arm_vbrsrq_x_n_s16): Likewise.
13532 (__arm_vbrsrq_x_n_s32): Likewise.
13533 (__arm_vbrsrq_x_n_u8): Likewise.
13534 (__arm_vbrsrq_x_n_u16): Likewise.
13535 (__arm_vbrsrq_x_n_u32): Likewise.
13536 (__arm_veorq_x_s8): Likewise.
13537 (__arm_veorq_x_s16): Likewise.
13538 (__arm_veorq_x_s32): Likewise.
13539 (__arm_veorq_x_u8): Likewise.
13540 (__arm_veorq_x_u16): Likewise.
13541 (__arm_veorq_x_u32): Likewise.
13542 (__arm_vmovlbq_x_s8): Likewise.
13543 (__arm_vmovlbq_x_s16): Likewise.
13544 (__arm_vmovlbq_x_u8): Likewise.
13545 (__arm_vmovlbq_x_u16): Likewise.
13546 (__arm_vmovltq_x_s8): Likewise.
13547 (__arm_vmovltq_x_s16): Likewise.
13548 (__arm_vmovltq_x_u8): Likewise.
13549 (__arm_vmovltq_x_u16): Likewise.
13550 (__arm_vmvnq_x_s8): Likewise.
13551 (__arm_vmvnq_x_s16): Likewise.
13552 (__arm_vmvnq_x_s32): Likewise.
13553 (__arm_vmvnq_x_u8): Likewise.
13554 (__arm_vmvnq_x_u16): Likewise.
13555 (__arm_vmvnq_x_u32): Likewise.
13556 (__arm_vmvnq_x_n_s16): Likewise.
13557 (__arm_vmvnq_x_n_s32): Likewise.
13558 (__arm_vmvnq_x_n_u16): Likewise.
13559 (__arm_vmvnq_x_n_u32): Likewise.
13560 (__arm_vornq_x_s8): Likewise.
13561 (__arm_vornq_x_s16): Likewise.
13562 (__arm_vornq_x_s32): Likewise.
13563 (__arm_vornq_x_u8): Likewise.
13564 (__arm_vornq_x_u16): Likewise.
13565 (__arm_vornq_x_u32): Likewise.
13566 (__arm_vorrq_x_s8): Likewise.
13567 (__arm_vorrq_x_s16): Likewise.
13568 (__arm_vorrq_x_s32): Likewise.
13569 (__arm_vorrq_x_u8): Likewise.
13570 (__arm_vorrq_x_u16): Likewise.
13571 (__arm_vorrq_x_u32): Likewise.
13572 (__arm_vrev16q_x_s8): Likewise.
13573 (__arm_vrev16q_x_u8): Likewise.
13574 (__arm_vrev32q_x_s8): Likewise.
13575 (__arm_vrev32q_x_s16): Likewise.
13576 (__arm_vrev32q_x_u8): Likewise.
13577 (__arm_vrev32q_x_u16): Likewise.
13578 (__arm_vrev64q_x_s8): Likewise.
13579 (__arm_vrev64q_x_s16): Likewise.
13580 (__arm_vrev64q_x_s32): Likewise.
13581 (__arm_vrev64q_x_u8): Likewise.
13582 (__arm_vrev64q_x_u16): Likewise.
13583 (__arm_vrev64q_x_u32): Likewise.
13584 (__arm_vrshlq_x_s8): Likewise.
13585 (__arm_vrshlq_x_s16): Likewise.
13586 (__arm_vrshlq_x_s32): Likewise.
13587 (__arm_vrshlq_x_u8): Likewise.
13588 (__arm_vrshlq_x_u16): Likewise.
13589 (__arm_vrshlq_x_u32): Likewise.
13590 (__arm_vshllbq_x_n_s8): Likewise.
13591 (__arm_vshllbq_x_n_s16): Likewise.
13592 (__arm_vshllbq_x_n_u8): Likewise.
13593 (__arm_vshllbq_x_n_u16): Likewise.
13594 (__arm_vshlltq_x_n_s8): Likewise.
13595 (__arm_vshlltq_x_n_s16): Likewise.
13596 (__arm_vshlltq_x_n_u8): Likewise.
13597 (__arm_vshlltq_x_n_u16): Likewise.
13598 (__arm_vshlq_x_s8): Likewise.
13599 (__arm_vshlq_x_s16): Likewise.
13600 (__arm_vshlq_x_s32): Likewise.
13601 (__arm_vshlq_x_u8): Likewise.
13602 (__arm_vshlq_x_u16): Likewise.
13603 (__arm_vshlq_x_u32): Likewise.
13604 (__arm_vshlq_x_n_s8): Likewise.
13605 (__arm_vshlq_x_n_s16): Likewise.
13606 (__arm_vshlq_x_n_s32): Likewise.
13607 (__arm_vshlq_x_n_u8): Likewise.
13608 (__arm_vshlq_x_n_u16): Likewise.
13609 (__arm_vshlq_x_n_u32): Likewise.
13610 (__arm_vrshrq_x_n_s8): Likewise.
13611 (__arm_vrshrq_x_n_s16): Likewise.
13612 (__arm_vrshrq_x_n_s32): Likewise.
13613 (__arm_vrshrq_x_n_u8): Likewise.
13614 (__arm_vrshrq_x_n_u16): Likewise.
13615 (__arm_vrshrq_x_n_u32): Likewise.
13616 (__arm_vshrq_x_n_s8): Likewise.
13617 (__arm_vshrq_x_n_s16): Likewise.
13618 (__arm_vshrq_x_n_s32): Likewise.
13619 (__arm_vshrq_x_n_u8): Likewise.
13620 (__arm_vshrq_x_n_u16): Likewise.
13621 (__arm_vshrq_x_n_u32): Likewise.
13622 (__arm_vdupq_x_n_f16): Likewise.
13623 (__arm_vdupq_x_n_f32): Likewise.
13624 (__arm_vminnmq_x_f16): Likewise.
13625 (__arm_vminnmq_x_f32): Likewise.
13626 (__arm_vmaxnmq_x_f16): Likewise.
13627 (__arm_vmaxnmq_x_f32): Likewise.
13628 (__arm_vabdq_x_f16): Likewise.
13629 (__arm_vabdq_x_f32): Likewise.
13630 (__arm_vabsq_x_f16): Likewise.
13631 (__arm_vabsq_x_f32): Likewise.
13632 (__arm_vaddq_x_f16): Likewise.
13633 (__arm_vaddq_x_f32): Likewise.
13634 (__arm_vaddq_x_n_f16): Likewise.
13635 (__arm_vaddq_x_n_f32): Likewise.
13636 (__arm_vnegq_x_f16): Likewise.
13637 (__arm_vnegq_x_f32): Likewise.
13638 (__arm_vmulq_x_f16): Likewise.
13639 (__arm_vmulq_x_f32): Likewise.
13640 (__arm_vmulq_x_n_f16): Likewise.
13641 (__arm_vmulq_x_n_f32): Likewise.
13642 (__arm_vsubq_x_f16): Likewise.
13643 (__arm_vsubq_x_f32): Likewise.
13644 (__arm_vsubq_x_n_f16): Likewise.
13645 (__arm_vsubq_x_n_f32): Likewise.
13646 (__arm_vcaddq_rot90_x_f16): Likewise.
13647 (__arm_vcaddq_rot90_x_f32): Likewise.
13648 (__arm_vcaddq_rot270_x_f16): Likewise.
13649 (__arm_vcaddq_rot270_x_f32): Likewise.
13650 (__arm_vcmulq_x_f16): Likewise.
13651 (__arm_vcmulq_x_f32): Likewise.
13652 (__arm_vcmulq_rot90_x_f16): Likewise.
13653 (__arm_vcmulq_rot90_x_f32): Likewise.
13654 (__arm_vcmulq_rot180_x_f16): Likewise.
13655 (__arm_vcmulq_rot180_x_f32): Likewise.
13656 (__arm_vcmulq_rot270_x_f16): Likewise.
13657 (__arm_vcmulq_rot270_x_f32): Likewise.
13658 (__arm_vcvtaq_x_s16_f16): Likewise.
13659 (__arm_vcvtaq_x_s32_f32): Likewise.
13660 (__arm_vcvtaq_x_u16_f16): Likewise.
13661 (__arm_vcvtaq_x_u32_f32): Likewise.
13662 (__arm_vcvtnq_x_s16_f16): Likewise.
13663 (__arm_vcvtnq_x_s32_f32): Likewise.
13664 (__arm_vcvtnq_x_u16_f16): Likewise.
13665 (__arm_vcvtnq_x_u32_f32): Likewise.
13666 (__arm_vcvtpq_x_s16_f16): Likewise.
13667 (__arm_vcvtpq_x_s32_f32): Likewise.
13668 (__arm_vcvtpq_x_u16_f16): Likewise.
13669 (__arm_vcvtpq_x_u32_f32): Likewise.
13670 (__arm_vcvtmq_x_s16_f16): Likewise.
13671 (__arm_vcvtmq_x_s32_f32): Likewise.
13672 (__arm_vcvtmq_x_u16_f16): Likewise.
13673 (__arm_vcvtmq_x_u32_f32): Likewise.
13674 (__arm_vcvtbq_x_f32_f16): Likewise.
13675 (__arm_vcvttq_x_f32_f16): Likewise.
13676 (__arm_vcvtq_x_f16_u16): Likewise.
13677 (__arm_vcvtq_x_f16_s16): Likewise.
13678 (__arm_vcvtq_x_f32_s32): Likewise.
13679 (__arm_vcvtq_x_f32_u32): Likewise.
13680 (__arm_vcvtq_x_n_f16_s16): Likewise.
13681 (__arm_vcvtq_x_n_f16_u16): Likewise.
13682 (__arm_vcvtq_x_n_f32_s32): Likewise.
13683 (__arm_vcvtq_x_n_f32_u32): Likewise.
13684 (__arm_vcvtq_x_s16_f16): Likewise.
13685 (__arm_vcvtq_x_s32_f32): Likewise.
13686 (__arm_vcvtq_x_u16_f16): Likewise.
13687 (__arm_vcvtq_x_u32_f32): Likewise.
13688 (__arm_vcvtq_x_n_s16_f16): Likewise.
13689 (__arm_vcvtq_x_n_s32_f32): Likewise.
13690 (__arm_vcvtq_x_n_u16_f16): Likewise.
13691 (__arm_vcvtq_x_n_u32_f32): Likewise.
13692 (__arm_vrndq_x_f16): Likewise.
13693 (__arm_vrndq_x_f32): Likewise.
13694 (__arm_vrndnq_x_f16): Likewise.
13695 (__arm_vrndnq_x_f32): Likewise.
13696 (__arm_vrndmq_x_f16): Likewise.
13697 (__arm_vrndmq_x_f32): Likewise.
13698 (__arm_vrndpq_x_f16): Likewise.
13699 (__arm_vrndpq_x_f32): Likewise.
13700 (__arm_vrndaq_x_f16): Likewise.
13701 (__arm_vrndaq_x_f32): Likewise.
13702 (__arm_vrndxq_x_f16): Likewise.
13703 (__arm_vrndxq_x_f32): Likewise.
13704 (__arm_vandq_x_f16): Likewise.
13705 (__arm_vandq_x_f32): Likewise.
13706 (__arm_vbicq_x_f16): Likewise.
13707 (__arm_vbicq_x_f32): Likewise.
13708 (__arm_vbrsrq_x_n_f16): Likewise.
13709 (__arm_vbrsrq_x_n_f32): Likewise.
13710 (__arm_veorq_x_f16): Likewise.
13711 (__arm_veorq_x_f32): Likewise.
13712 (__arm_vornq_x_f16): Likewise.
13713 (__arm_vornq_x_f32): Likewise.
13714 (__arm_vorrq_x_f16): Likewise.
13715 (__arm_vorrq_x_f32): Likewise.
13716 (__arm_vrev32q_x_f16): Likewise.
13717 (__arm_vrev64q_x_f16): Likewise.
13718 (__arm_vrev64q_x_f32): Likewise.
13719 (vabdq_x): Define polymorphic variant.
13720 (vabsq_x): Likewise.
13721 (vaddq_x): Likewise.
13722 (vandq_x): Likewise.
13723 (vbicq_x): Likewise.
13724 (vbrsrq_x): Likewise.
13725 (vcaddq_rot270_x): Likewise.
13726 (vcaddq_rot90_x): Likewise.
13727 (vcmulq_rot180_x): Likewise.
13728 (vcmulq_rot270_x): Likewise.
13729 (vcmulq_x): Likewise.
13730 (vcvtq_x): Likewise.
13731 (vcvtq_x_n): Likewise.
13732 (vcvtnq_m): Likewise.
13733 (veorq_x): Likewise.
13734 (vmaxnmq_x): Likewise.
13735 (vminnmq_x): Likewise.
13736 (vmulq_x): Likewise.
13737 (vnegq_x): Likewise.
13738 (vornq_x): Likewise.
13739 (vorrq_x): Likewise.
13740 (vrev32q_x): Likewise.
13741 (vrev64q_x): Likewise.
13742 (vrndaq_x): Likewise.
13743 (vrndmq_x): Likewise.
13744 (vrndnq_x): Likewise.
13745 (vrndpq_x): Likewise.
13746 (vrndq_x): Likewise.
13747 (vrndxq_x): Likewise.
13748 (vsubq_x): Likewise.
13749 (vcmulq_rot90_x): Likewise.
13750 (vadciq): Likewise.
13751 (vclsq_x): Likewise.
13752 (vclzq_x): Likewise.
13753 (vhaddq_x): Likewise.
13754 (vhcaddq_rot270_x): Likewise.
13755 (vhcaddq_rot90_x): Likewise.
13756 (vhsubq_x): Likewise.
13757 (vmaxq_x): Likewise.
13758 (vminq_x): Likewise.
13759 (vmovlbq_x): Likewise.
13760 (vmovltq_x): Likewise.
13761 (vmulhq_x): Likewise.
13762 (vmullbq_int_x): Likewise.
13763 (vmullbq_poly_x): Likewise.
13764 (vmulltq_int_x): Likewise.
13765 (vmulltq_poly_x): Likewise.
13766 (vmvnq_x): Likewise.
13767 (vrev16q_x): Likewise.
13768 (vrhaddq_x): Likewise.
13769 (vrmulhq_x): Likewise.
13770 (vrshlq_x): Likewise.
13771 (vrshrq_x): Likewise.
13772 (vshllbq_x): Likewise.
13773 (vshlltq_x): Likewise.
13774 (vshlq_x_n): Likewise.
13775 (vshlq_x): Likewise.
13776 (vdwdupq_x_u8): Likewise.
13777 (vdwdupq_x_u16): Likewise.
13778 (vdwdupq_x_u32): Likewise.
13779 (viwdupq_x_u8): Likewise.
13780 (viwdupq_x_u16): Likewise.
13781 (viwdupq_x_u32): Likewise.
13782 (vidupq_x_u8): Likewise.
13783 (vddupq_x_u8): Likewise.
13784 (vidupq_x_u16): Likewise.
13785 (vddupq_x_u16): Likewise.
13786 (vidupq_x_u32): Likewise.
13787 (vddupq_x_u32): Likewise.
13788 (vshrq_x): Likewise.
13790 2020-03-20 Richard Biener <rguenther@suse.de>
13792 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
13793 to vectorize for CTOR defs.
13795 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13796 Andre Vieira <andre.simoesdiasvieira@arm.com>
13797 Mihail Ionescu <mihail.ionescu@arm.com>
13799 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
13801 (LDRGBWBU_QUALIFIERS): Likewise.
13802 (LDRGBWBS_Z_QUALIFIERS): Likewise.
13803 (LDRGBWBU_Z_QUALIFIERS): Likewise.
13804 (STRSBWBS_QUALIFIERS): Likewise.
13805 (STRSBWBU_QUALIFIERS): Likewise.
13806 (STRSBWBS_P_QUALIFIERS): Likewise.
13807 (STRSBWBU_P_QUALIFIERS): Likewise.
13808 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
13809 (vldrdq_gather_base_wb_u64): Likewise.
13810 (vldrdq_gather_base_wb_z_s64): Likewise.
13811 (vldrdq_gather_base_wb_z_u64): Likewise.
13812 (vldrwq_gather_base_wb_f32): Likewise.
13813 (vldrwq_gather_base_wb_s32): Likewise.
13814 (vldrwq_gather_base_wb_u32): Likewise.
13815 (vldrwq_gather_base_wb_z_f32): Likewise.
13816 (vldrwq_gather_base_wb_z_s32): Likewise.
13817 (vldrwq_gather_base_wb_z_u32): Likewise.
13818 (vstrdq_scatter_base_wb_p_s64): Likewise.
13819 (vstrdq_scatter_base_wb_p_u64): Likewise.
13820 (vstrdq_scatter_base_wb_s64): Likewise.
13821 (vstrdq_scatter_base_wb_u64): Likewise.
13822 (vstrwq_scatter_base_wb_p_s32): Likewise.
13823 (vstrwq_scatter_base_wb_p_f32): Likewise.
13824 (vstrwq_scatter_base_wb_p_u32): Likewise.
13825 (vstrwq_scatter_base_wb_s32): Likewise.
13826 (vstrwq_scatter_base_wb_u32): Likewise.
13827 (vstrwq_scatter_base_wb_f32): Likewise.
13828 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
13829 (__arm_vldrdq_gather_base_wb_u64): Likewise.
13830 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
13831 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
13832 (__arm_vldrwq_gather_base_wb_s32): Likewise.
13833 (__arm_vldrwq_gather_base_wb_u32): Likewise.
13834 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
13835 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
13836 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
13837 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
13838 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
13839 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
13840 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
13841 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
13842 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
13843 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
13844 (__arm_vldrwq_gather_base_wb_f32): Likewise.
13845 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
13846 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
13847 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
13848 (vstrwq_scatter_base_wb): Define polymorphic variant.
13849 (vstrwq_scatter_base_wb_p): Likewise.
13850 (vstrdq_scatter_base_wb_p): Likewise.
13851 (vstrdq_scatter_base_wb): Likewise.
13852 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
13854 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
13856 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
13857 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
13858 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
13859 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
13860 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
13861 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
13862 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
13863 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
13864 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
13865 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
13866 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
13867 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
13868 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
13869 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
13870 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
13871 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
13872 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
13873 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
13874 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
13875 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
13876 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
13877 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
13878 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
13879 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
13880 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
13881 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
13882 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
13883 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
13884 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
13886 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13887 Andre Vieira <andre.simoesdiasvieira@arm.com>
13888 Mihail Ionescu <mihail.ionescu@arm.com>
13890 * config/arm/arm-builtins.c
13891 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
13893 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
13894 (vddupq_m_n_u32): Likewise.
13895 (vddupq_m_n_u16): Likewise.
13896 (vddupq_m_wb_u8): Likewise.
13897 (vddupq_m_wb_u16): Likewise.
13898 (vddupq_m_wb_u32): Likewise.
13899 (vddupq_n_u8): Likewise.
13900 (vddupq_n_u32): Likewise.
13901 (vddupq_n_u16): Likewise.
13902 (vddupq_wb_u8): Likewise.
13903 (vddupq_wb_u16): Likewise.
13904 (vddupq_wb_u32): Likewise.
13905 (vdwdupq_m_n_u8): Likewise.
13906 (vdwdupq_m_n_u32): Likewise.
13907 (vdwdupq_m_n_u16): Likewise.
13908 (vdwdupq_m_wb_u8): Likewise.
13909 (vdwdupq_m_wb_u32): Likewise.
13910 (vdwdupq_m_wb_u16): Likewise.
13911 (vdwdupq_n_u8): Likewise.
13912 (vdwdupq_n_u32): Likewise.
13913 (vdwdupq_n_u16): Likewise.
13914 (vdwdupq_wb_u8): Likewise.
13915 (vdwdupq_wb_u32): Likewise.
13916 (vdwdupq_wb_u16): Likewise.
13917 (vidupq_m_n_u8): Likewise.
13918 (vidupq_m_n_u32): Likewise.
13919 (vidupq_m_n_u16): Likewise.
13920 (vidupq_m_wb_u8): Likewise.
13921 (vidupq_m_wb_u16): Likewise.
13922 (vidupq_m_wb_u32): Likewise.
13923 (vidupq_n_u8): Likewise.
13924 (vidupq_n_u32): Likewise.
13925 (vidupq_n_u16): Likewise.
13926 (vidupq_wb_u8): Likewise.
13927 (vidupq_wb_u16): Likewise.
13928 (vidupq_wb_u32): Likewise.
13929 (viwdupq_m_n_u8): Likewise.
13930 (viwdupq_m_n_u32): Likewise.
13931 (viwdupq_m_n_u16): Likewise.
13932 (viwdupq_m_wb_u8): Likewise.
13933 (viwdupq_m_wb_u32): Likewise.
13934 (viwdupq_m_wb_u16): Likewise.
13935 (viwdupq_n_u8): Likewise.
13936 (viwdupq_n_u32): Likewise.
13937 (viwdupq_n_u16): Likewise.
13938 (viwdupq_wb_u8): Likewise.
13939 (viwdupq_wb_u32): Likewise.
13940 (viwdupq_wb_u16): Likewise.
13941 (__arm_vddupq_m_n_u8): Define intrinsic.
13942 (__arm_vddupq_m_n_u32): Likewise.
13943 (__arm_vddupq_m_n_u16): Likewise.
13944 (__arm_vddupq_m_wb_u8): Likewise.
13945 (__arm_vddupq_m_wb_u16): Likewise.
13946 (__arm_vddupq_m_wb_u32): Likewise.
13947 (__arm_vddupq_n_u8): Likewise.
13948 (__arm_vddupq_n_u32): Likewise.
13949 (__arm_vddupq_n_u16): Likewise.
13950 (__arm_vdwdupq_m_n_u8): Likewise.
13951 (__arm_vdwdupq_m_n_u32): Likewise.
13952 (__arm_vdwdupq_m_n_u16): Likewise.
13953 (__arm_vdwdupq_m_wb_u8): Likewise.
13954 (__arm_vdwdupq_m_wb_u32): Likewise.
13955 (__arm_vdwdupq_m_wb_u16): Likewise.
13956 (__arm_vdwdupq_n_u8): Likewise.
13957 (__arm_vdwdupq_n_u32): Likewise.
13958 (__arm_vdwdupq_n_u16): Likewise.
13959 (__arm_vdwdupq_wb_u8): Likewise.
13960 (__arm_vdwdupq_wb_u32): Likewise.
13961 (__arm_vdwdupq_wb_u16): Likewise.
13962 (__arm_vidupq_m_n_u8): Likewise.
13963 (__arm_vidupq_m_n_u32): Likewise.
13964 (__arm_vidupq_m_n_u16): Likewise.
13965 (__arm_vidupq_n_u8): Likewise.
13966 (__arm_vidupq_m_wb_u8): Likewise.
13967 (__arm_vidupq_m_wb_u16): Likewise.
13968 (__arm_vidupq_m_wb_u32): Likewise.
13969 (__arm_vidupq_n_u32): Likewise.
13970 (__arm_vidupq_n_u16): Likewise.
13971 (__arm_vidupq_wb_u8): Likewise.
13972 (__arm_vidupq_wb_u16): Likewise.
13973 (__arm_vidupq_wb_u32): Likewise.
13974 (__arm_vddupq_wb_u8): Likewise.
13975 (__arm_vddupq_wb_u16): Likewise.
13976 (__arm_vddupq_wb_u32): Likewise.
13977 (__arm_viwdupq_m_n_u8): Likewise.
13978 (__arm_viwdupq_m_n_u32): Likewise.
13979 (__arm_viwdupq_m_n_u16): Likewise.
13980 (__arm_viwdupq_m_wb_u8): Likewise.
13981 (__arm_viwdupq_m_wb_u32): Likewise.
13982 (__arm_viwdupq_m_wb_u16): Likewise.
13983 (__arm_viwdupq_n_u8): Likewise.
13984 (__arm_viwdupq_n_u32): Likewise.
13985 (__arm_viwdupq_n_u16): Likewise.
13986 (__arm_viwdupq_wb_u8): Likewise.
13987 (__arm_viwdupq_wb_u32): Likewise.
13988 (__arm_viwdupq_wb_u16): Likewise.
13989 (vidupq_m): Define polymorphic variant.
13990 (vddupq_m): Likewise.
13991 (vidupq_u16): Likewise.
13992 (vidupq_u32): Likewise.
13993 (vidupq_u8): Likewise.
13994 (vddupq_u16): Likewise.
13995 (vddupq_u32): Likewise.
13996 (vddupq_u8): Likewise.
13997 (viwdupq_m): Likewise.
13998 (viwdupq_u16): Likewise.
13999 (viwdupq_u32): Likewise.
14000 (viwdupq_u8): Likewise.
14001 (vdwdupq_m): Likewise.
14002 (vdwdupq_u16): Likewise.
14003 (vdwdupq_u32): Likewise.
14004 (vdwdupq_u8): Likewise.
14005 * config/arm/arm_mve_builtins.def
14006 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
14008 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
14009 (mve_vidupq_u<mode>_insn): Likewise.
14010 (mve_vidupq_m_n_u<mode>): Likewise.
14011 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
14012 (mve_vddupq_n_u<mode>): Likewise.
14013 (mve_vddupq_u<mode>_insn): Likewise.
14014 (mve_vddupq_m_n_u<mode>): Likewise.
14015 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
14016 (mve_vdwdupq_n_u<mode>): Likewise.
14017 (mve_vdwdupq_wb_u<mode>): Likewise.
14018 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
14019 (mve_vdwdupq_m_n_u<mode>): Likewise.
14020 (mve_vdwdupq_m_wb_u<mode>): Likewise.
14021 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
14022 (mve_viwdupq_n_u<mode>): Likewise.
14023 (mve_viwdupq_wb_u<mode>): Likewise.
14024 (mve_viwdupq_wb_u<mode>_insn): Likewise.
14025 (mve_viwdupq_m_n_u<mode>): Likewise.
14026 (mve_viwdupq_m_wb_u<mode>): Likewise.
14027 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
14029 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14031 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
14032 (vreinterpretq_s16_s64): Likewise.
14033 (vreinterpretq_s16_s8): Likewise.
14034 (vreinterpretq_s16_u16): Likewise.
14035 (vreinterpretq_s16_u32): Likewise.
14036 (vreinterpretq_s16_u64): Likewise.
14037 (vreinterpretq_s16_u8): Likewise.
14038 (vreinterpretq_s32_s16): Likewise.
14039 (vreinterpretq_s32_s64): Likewise.
14040 (vreinterpretq_s32_s8): Likewise.
14041 (vreinterpretq_s32_u16): Likewise.
14042 (vreinterpretq_s32_u32): Likewise.
14043 (vreinterpretq_s32_u64): Likewise.
14044 (vreinterpretq_s32_u8): Likewise.
14045 (vreinterpretq_s64_s16): Likewise.
14046 (vreinterpretq_s64_s32): Likewise.
14047 (vreinterpretq_s64_s8): Likewise.
14048 (vreinterpretq_s64_u16): Likewise.
14049 (vreinterpretq_s64_u32): Likewise.
14050 (vreinterpretq_s64_u64): Likewise.
14051 (vreinterpretq_s64_u8): Likewise.
14052 (vreinterpretq_s8_s16): Likewise.
14053 (vreinterpretq_s8_s32): Likewise.
14054 (vreinterpretq_s8_s64): Likewise.
14055 (vreinterpretq_s8_u16): Likewise.
14056 (vreinterpretq_s8_u32): Likewise.
14057 (vreinterpretq_s8_u64): Likewise.
14058 (vreinterpretq_s8_u8): Likewise.
14059 (vreinterpretq_u16_s16): Likewise.
14060 (vreinterpretq_u16_s32): Likewise.
14061 (vreinterpretq_u16_s64): Likewise.
14062 (vreinterpretq_u16_s8): Likewise.
14063 (vreinterpretq_u16_u32): Likewise.
14064 (vreinterpretq_u16_u64): Likewise.
14065 (vreinterpretq_u16_u8): Likewise.
14066 (vreinterpretq_u32_s16): Likewise.
14067 (vreinterpretq_u32_s32): Likewise.
14068 (vreinterpretq_u32_s64): Likewise.
14069 (vreinterpretq_u32_s8): Likewise.
14070 (vreinterpretq_u32_u16): Likewise.
14071 (vreinterpretq_u32_u64): Likewise.
14072 (vreinterpretq_u32_u8): Likewise.
14073 (vreinterpretq_u64_s16): Likewise.
14074 (vreinterpretq_u64_s32): Likewise.
14075 (vreinterpretq_u64_s64): Likewise.
14076 (vreinterpretq_u64_s8): Likewise.
14077 (vreinterpretq_u64_u16): Likewise.
14078 (vreinterpretq_u64_u32): Likewise.
14079 (vreinterpretq_u64_u8): Likewise.
14080 (vreinterpretq_u8_s16): Likewise.
14081 (vreinterpretq_u8_s32): Likewise.
14082 (vreinterpretq_u8_s64): Likewise.
14083 (vreinterpretq_u8_s8): Likewise.
14084 (vreinterpretq_u8_u16): Likewise.
14085 (vreinterpretq_u8_u32): Likewise.
14086 (vreinterpretq_u8_u64): Likewise.
14087 (vreinterpretq_s32_f16): Likewise.
14088 (vreinterpretq_s32_f32): Likewise.
14089 (vreinterpretq_u16_f16): Likewise.
14090 (vreinterpretq_u16_f32): Likewise.
14091 (vreinterpretq_u32_f16): Likewise.
14092 (vreinterpretq_u32_f32): Likewise.
14093 (vreinterpretq_u64_f16): Likewise.
14094 (vreinterpretq_u64_f32): Likewise.
14095 (vreinterpretq_u8_f16): Likewise.
14096 (vreinterpretq_u8_f32): Likewise.
14097 (vreinterpretq_f16_f32): Likewise.
14098 (vreinterpretq_f16_s16): Likewise.
14099 (vreinterpretq_f16_s32): Likewise.
14100 (vreinterpretq_f16_s64): Likewise.
14101 (vreinterpretq_f16_s8): Likewise.
14102 (vreinterpretq_f16_u16): Likewise.
14103 (vreinterpretq_f16_u32): Likewise.
14104 (vreinterpretq_f16_u64): Likewise.
14105 (vreinterpretq_f16_u8): Likewise.
14106 (vreinterpretq_f32_f16): Likewise.
14107 (vreinterpretq_f32_s16): Likewise.
14108 (vreinterpretq_f32_s32): Likewise.
14109 (vreinterpretq_f32_s64): Likewise.
14110 (vreinterpretq_f32_s8): Likewise.
14111 (vreinterpretq_f32_u16): Likewise.
14112 (vreinterpretq_f32_u32): Likewise.
14113 (vreinterpretq_f32_u64): Likewise.
14114 (vreinterpretq_f32_u8): Likewise.
14115 (vreinterpretq_s16_f16): Likewise.
14116 (vreinterpretq_s16_f32): Likewise.
14117 (vreinterpretq_s64_f16): Likewise.
14118 (vreinterpretq_s64_f32): Likewise.
14119 (vreinterpretq_s8_f16): Likewise.
14120 (vreinterpretq_s8_f32): Likewise.
14121 (vuninitializedq_u8): Likewise.
14122 (vuninitializedq_u16): Likewise.
14123 (vuninitializedq_u32): Likewise.
14124 (vuninitializedq_u64): Likewise.
14125 (vuninitializedq_s8): Likewise.
14126 (vuninitializedq_s16): Likewise.
14127 (vuninitializedq_s32): Likewise.
14128 (vuninitializedq_s64): Likewise.
14129 (vuninitializedq_f16): Likewise.
14130 (vuninitializedq_f32): Likewise.
14131 (__arm_vuninitializedq_u8): Define intrinsic.
14132 (__arm_vuninitializedq_u16): Likewise.
14133 (__arm_vuninitializedq_u32): Likewise.
14134 (__arm_vuninitializedq_u64): Likewise.
14135 (__arm_vuninitializedq_s8): Likewise.
14136 (__arm_vuninitializedq_s16): Likewise.
14137 (__arm_vuninitializedq_s32): Likewise.
14138 (__arm_vuninitializedq_s64): Likewise.
14139 (__arm_vreinterpretq_s16_s32): Likewise.
14140 (__arm_vreinterpretq_s16_s64): Likewise.
14141 (__arm_vreinterpretq_s16_s8): Likewise.
14142 (__arm_vreinterpretq_s16_u16): Likewise.
14143 (__arm_vreinterpretq_s16_u32): Likewise.
14144 (__arm_vreinterpretq_s16_u64): Likewise.
14145 (__arm_vreinterpretq_s16_u8): Likewise.
14146 (__arm_vreinterpretq_s32_s16): Likewise.
14147 (__arm_vreinterpretq_s32_s64): Likewise.
14148 (__arm_vreinterpretq_s32_s8): Likewise.
14149 (__arm_vreinterpretq_s32_u16): Likewise.
14150 (__arm_vreinterpretq_s32_u32): Likewise.
14151 (__arm_vreinterpretq_s32_u64): Likewise.
14152 (__arm_vreinterpretq_s32_u8): Likewise.
14153 (__arm_vreinterpretq_s64_s16): Likewise.
14154 (__arm_vreinterpretq_s64_s32): Likewise.
14155 (__arm_vreinterpretq_s64_s8): Likewise.
14156 (__arm_vreinterpretq_s64_u16): Likewise.
14157 (__arm_vreinterpretq_s64_u32): Likewise.
14158 (__arm_vreinterpretq_s64_u64): Likewise.
14159 (__arm_vreinterpretq_s64_u8): Likewise.
14160 (__arm_vreinterpretq_s8_s16): Likewise.
14161 (__arm_vreinterpretq_s8_s32): Likewise.
14162 (__arm_vreinterpretq_s8_s64): Likewise.
14163 (__arm_vreinterpretq_s8_u16): Likewise.
14164 (__arm_vreinterpretq_s8_u32): Likewise.
14165 (__arm_vreinterpretq_s8_u64): Likewise.
14166 (__arm_vreinterpretq_s8_u8): Likewise.
14167 (__arm_vreinterpretq_u16_s16): Likewise.
14168 (__arm_vreinterpretq_u16_s32): Likewise.
14169 (__arm_vreinterpretq_u16_s64): Likewise.
14170 (__arm_vreinterpretq_u16_s8): Likewise.
14171 (__arm_vreinterpretq_u16_u32): Likewise.
14172 (__arm_vreinterpretq_u16_u64): Likewise.
14173 (__arm_vreinterpretq_u16_u8): Likewise.
14174 (__arm_vreinterpretq_u32_s16): Likewise.
14175 (__arm_vreinterpretq_u32_s32): Likewise.
14176 (__arm_vreinterpretq_u32_s64): Likewise.
14177 (__arm_vreinterpretq_u32_s8): Likewise.
14178 (__arm_vreinterpretq_u32_u16): Likewise.
14179 (__arm_vreinterpretq_u32_u64): Likewise.
14180 (__arm_vreinterpretq_u32_u8): Likewise.
14181 (__arm_vreinterpretq_u64_s16): Likewise.
14182 (__arm_vreinterpretq_u64_s32): Likewise.
14183 (__arm_vreinterpretq_u64_s64): Likewise.
14184 (__arm_vreinterpretq_u64_s8): Likewise.
14185 (__arm_vreinterpretq_u64_u16): Likewise.
14186 (__arm_vreinterpretq_u64_u32): Likewise.
14187 (__arm_vreinterpretq_u64_u8): Likewise.
14188 (__arm_vreinterpretq_u8_s16): Likewise.
14189 (__arm_vreinterpretq_u8_s32): Likewise.
14190 (__arm_vreinterpretq_u8_s64): Likewise.
14191 (__arm_vreinterpretq_u8_s8): Likewise.
14192 (__arm_vreinterpretq_u8_u16): Likewise.
14193 (__arm_vreinterpretq_u8_u32): Likewise.
14194 (__arm_vreinterpretq_u8_u64): Likewise.
14195 (__arm_vuninitializedq_f16): Likewise.
14196 (__arm_vuninitializedq_f32): Likewise.
14197 (__arm_vreinterpretq_s32_f16): Likewise.
14198 (__arm_vreinterpretq_s32_f32): Likewise.
14199 (__arm_vreinterpretq_s16_f16): Likewise.
14200 (__arm_vreinterpretq_s16_f32): Likewise.
14201 (__arm_vreinterpretq_s64_f16): Likewise.
14202 (__arm_vreinterpretq_s64_f32): Likewise.
14203 (__arm_vreinterpretq_s8_f16): Likewise.
14204 (__arm_vreinterpretq_s8_f32): Likewise.
14205 (__arm_vreinterpretq_u16_f16): Likewise.
14206 (__arm_vreinterpretq_u16_f32): Likewise.
14207 (__arm_vreinterpretq_u32_f16): Likewise.
14208 (__arm_vreinterpretq_u32_f32): Likewise.
14209 (__arm_vreinterpretq_u64_f16): Likewise.
14210 (__arm_vreinterpretq_u64_f32): Likewise.
14211 (__arm_vreinterpretq_u8_f16): Likewise.
14212 (__arm_vreinterpretq_u8_f32): Likewise.
14213 (__arm_vreinterpretq_f16_f32): Likewise.
14214 (__arm_vreinterpretq_f16_s16): Likewise.
14215 (__arm_vreinterpretq_f16_s32): Likewise.
14216 (__arm_vreinterpretq_f16_s64): Likewise.
14217 (__arm_vreinterpretq_f16_s8): Likewise.
14218 (__arm_vreinterpretq_f16_u16): Likewise.
14219 (__arm_vreinterpretq_f16_u32): Likewise.
14220 (__arm_vreinterpretq_f16_u64): Likewise.
14221 (__arm_vreinterpretq_f16_u8): Likewise.
14222 (__arm_vreinterpretq_f32_f16): Likewise.
14223 (__arm_vreinterpretq_f32_s16): Likewise.
14224 (__arm_vreinterpretq_f32_s32): Likewise.
14225 (__arm_vreinterpretq_f32_s64): Likewise.
14226 (__arm_vreinterpretq_f32_s8): Likewise.
14227 (__arm_vreinterpretq_f32_u16): Likewise.
14228 (__arm_vreinterpretq_f32_u32): Likewise.
14229 (__arm_vreinterpretq_f32_u64): Likewise.
14230 (__arm_vreinterpretq_f32_u8): Likewise.
14231 (vuninitializedq): Define polymorphic variant.
14232 (vreinterpretq_f16): Likewise.
14233 (vreinterpretq_f32): Likewise.
14234 (vreinterpretq_s16): Likewise.
14235 (vreinterpretq_s32): Likewise.
14236 (vreinterpretq_s64): Likewise.
14237 (vreinterpretq_s8): Likewise.
14238 (vreinterpretq_u16): Likewise.
14239 (vreinterpretq_u32): Likewise.
14240 (vreinterpretq_u64): Likewise.
14241 (vreinterpretq_u8): Likewise.
14243 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14244 Andre Vieira <andre.simoesdiasvieira@arm.com>
14245 Mihail Ionescu <mihail.ionescu@arm.com>
14247 * config/arm/arm_mve.h (vaddq_s8): Define macro.
14248 (vaddq_s16): Likewise.
14249 (vaddq_s32): Likewise.
14250 (vaddq_u8): Likewise.
14251 (vaddq_u16): Likewise.
14252 (vaddq_u32): Likewise.
14253 (vaddq_f16): Likewise.
14254 (vaddq_f32): Likewise.
14255 (__arm_vaddq_s8): Define intrinsic.
14256 (__arm_vaddq_s16): Likewise.
14257 (__arm_vaddq_s32): Likewise.
14258 (__arm_vaddq_u8): Likewise.
14259 (__arm_vaddq_u16): Likewise.
14260 (__arm_vaddq_u32): Likewise.
14261 (__arm_vaddq_f16): Likewise.
14262 (__arm_vaddq_f32): Likewise.
14263 (vaddq): Define polymorphic variant.
14264 * config/arm/iterators.md (VNIM): Define mode iterator for common types
14265 Neon, IWMMXT and MVE.
14266 (VNINOTM): Likewise.
14267 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
14268 (mve_vaddq_f<mode>): Define RTL pattern.
14269 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
14270 (addv8hf3_neon): Define RTL pattern.
14271 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
14273 (addv8hf3): Define standard RTL pattern for MVE and Neon.
14274 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
14276 2020-03-20 Martin Liska <mliska@suse.cz>
14279 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
14280 build_ref_for_offset function was used and it transforms off to bytes
14283 2020-03-20 Richard Biener <rguenther@suse.de>
14285 PR tree-optimization/94266
14286 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
14287 type of the underlying object to adjust for the containing
14288 field if available.
14290 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14292 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
14293 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
14294 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
14296 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14298 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
14300 2020-03-20 Jakub Jelinek <jakub@redhat.com>
14302 PR tree-optimization/94224
14303 * gimple-ssa-store-merging.c
14304 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
14305 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
14308 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
14310 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
14312 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14315 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
14316 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
14318 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
14321 * cgraphunit.c (process_function_and_variable_attributes): warn
14322 for flatten attribute on alias.
14323 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
14325 2020-03-19 Martin Liska <mliska@suse.cz>
14327 * lto-section-in.c: Add ext_symtab.
14328 * lto-streamer-out.c (write_symbol_extension_info): New.
14329 (produce_symtab_extension): New.
14330 (produce_asm_for_decls): Stream also produce_symtab_extension.
14331 * lto-streamer.h (enum lto_section_type): New section.
14333 2020-03-19 Jakub Jelinek <jakub@redhat.com>
14335 PR tree-optimization/94211
14336 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
14337 instead of estimate_num_insns for bb_seq (middle_bb). Rename
14338 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
14341 2020-03-19 Richard Biener <rguenther@suse.de>
14344 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
14345 and build_ref_for_offset.
14347 2020-03-19 Richard Biener <rguenther@suse.de>
14349 PR middle-end/94216
14350 * fold-const.c (fold_binary_loc): Avoid using
14351 build_fold_addr_expr when we really want an ADDR_EXPR.
14353 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
14355 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
14358 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
14360 PR rtl-optimization/90275
14361 * cse.c (cse_insn): Delete no-op register moves too.
14363 2020-03-18 Martin Sebor <msebor@redhat.com>
14366 * cgraphunit.c (process_function_and_variable_attributes): Also
14367 complain about weakref function definitions and drop all effects
14370 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14371 Mihail Ionescu <mihail.ionescu@arm.com>
14372 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14374 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
14375 (vstrdq_scatter_base_p_u64): Likewise.
14376 (vstrdq_scatter_base_s64): Likewise.
14377 (vstrdq_scatter_base_u64): Likewise.
14378 (vstrdq_scatter_offset_p_s64): Likewise.
14379 (vstrdq_scatter_offset_p_u64): Likewise.
14380 (vstrdq_scatter_offset_s64): Likewise.
14381 (vstrdq_scatter_offset_u64): Likewise.
14382 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
14383 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
14384 (vstrdq_scatter_shifted_offset_s64): Likewise.
14385 (vstrdq_scatter_shifted_offset_u64): Likewise.
14386 (vstrhq_scatter_offset_f16): Likewise.
14387 (vstrhq_scatter_offset_p_f16): Likewise.
14388 (vstrhq_scatter_shifted_offset_f16): Likewise.
14389 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
14390 (vstrwq_scatter_base_f32): Likewise.
14391 (vstrwq_scatter_base_p_f32): Likewise.
14392 (vstrwq_scatter_offset_f32): Likewise.
14393 (vstrwq_scatter_offset_p_f32): Likewise.
14394 (vstrwq_scatter_offset_p_s32): Likewise.
14395 (vstrwq_scatter_offset_p_u32): Likewise.
14396 (vstrwq_scatter_offset_s32): Likewise.
14397 (vstrwq_scatter_offset_u32): Likewise.
14398 (vstrwq_scatter_shifted_offset_f32): Likewise.
14399 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
14400 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
14401 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
14402 (vstrwq_scatter_shifted_offset_s32): Likewise.
14403 (vstrwq_scatter_shifted_offset_u32): Likewise.
14404 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
14405 (__arm_vstrdq_scatter_base_p_u64): Likewise.
14406 (__arm_vstrdq_scatter_base_s64): Likewise.
14407 (__arm_vstrdq_scatter_base_u64): Likewise.
14408 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
14409 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
14410 (__arm_vstrdq_scatter_offset_s64): Likewise.
14411 (__arm_vstrdq_scatter_offset_u64): Likewise.
14412 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
14413 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
14414 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
14415 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
14416 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
14417 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
14418 (__arm_vstrwq_scatter_offset_s32): Likewise.
14419 (__arm_vstrwq_scatter_offset_u32): Likewise.
14420 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
14421 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
14422 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
14423 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
14424 (__arm_vstrhq_scatter_offset_f16): Likewise.
14425 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
14426 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
14427 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
14428 (__arm_vstrwq_scatter_base_f32): Likewise.
14429 (__arm_vstrwq_scatter_base_p_f32): Likewise.
14430 (__arm_vstrwq_scatter_offset_f32): Likewise.
14431 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
14432 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
14433 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
14434 (vstrhq_scatter_offset): Define polymorphic variant.
14435 (vstrhq_scatter_offset_p): Likewise.
14436 (vstrhq_scatter_shifted_offset): Likewise.
14437 (vstrhq_scatter_shifted_offset_p): Likewise.
14438 (vstrwq_scatter_base): Likewise.
14439 (vstrwq_scatter_base_p): Likewise.
14440 (vstrwq_scatter_offset): Likewise.
14441 (vstrwq_scatter_offset_p): Likewise.
14442 (vstrwq_scatter_shifted_offset): Likewise.
14443 (vstrwq_scatter_shifted_offset_p): Likewise.
14444 (vstrdq_scatter_base_p): Likewise.
14445 (vstrdq_scatter_base): Likewise.
14446 (vstrdq_scatter_offset_p): Likewise.
14447 (vstrdq_scatter_offset): Likewise.
14448 (vstrdq_scatter_shifted_offset_p): Likewise.
14449 (vstrdq_scatter_shifted_offset): Likewise.
14450 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
14451 (STRSBS_P): Likewise.
14452 (STRSBU): Likewise.
14453 (STRSBU_P): Likewise.
14455 (STRSS_P): Likewise.
14457 (STRSU_P): Likewise.
14458 * config/arm/constraints.md (Ri): Define.
14459 * config/arm/mve.md (VSTRDSBQ): Define iterator.
14460 (VSTRDSOQ): Likewise.
14461 (VSTRDSSOQ): Likewise.
14462 (VSTRWSOQ): Likewise.
14463 (VSTRWSSOQ): Likewise.
14464 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
14465 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
14466 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
14467 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
14468 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
14469 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
14470 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
14471 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
14472 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
14473 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
14474 (mve_vstrwq_scatter_base_fv4sf): Likewise.
14475 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
14476 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
14477 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
14478 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
14479 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
14480 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
14481 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
14482 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
14483 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
14484 * config/arm/predicates.md (Ri): Define predicate to check immediate
14485 is the range +/-1016 and multiple of 8.
14487 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14488 Mihail Ionescu <mihail.ionescu@arm.com>
14489 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14491 * config/arm/arm_mve.h (vst1q_f32): Define macro.
14492 (vst1q_f16): Likewise.
14493 (vst1q_s8): Likewise.
14494 (vst1q_s32): Likewise.
14495 (vst1q_s16): Likewise.
14496 (vst1q_u8): Likewise.
14497 (vst1q_u32): Likewise.
14498 (vst1q_u16): Likewise.
14499 (vstrhq_f16): Likewise.
14500 (vstrhq_scatter_offset_s32): Likewise.
14501 (vstrhq_scatter_offset_s16): Likewise.
14502 (vstrhq_scatter_offset_u32): Likewise.
14503 (vstrhq_scatter_offset_u16): Likewise.
14504 (vstrhq_scatter_offset_p_s32): Likewise.
14505 (vstrhq_scatter_offset_p_s16): Likewise.
14506 (vstrhq_scatter_offset_p_u32): Likewise.
14507 (vstrhq_scatter_offset_p_u16): Likewise.
14508 (vstrhq_scatter_shifted_offset_s32): Likewise.
14509 (vstrhq_scatter_shifted_offset_s16): Likewise.
14510 (vstrhq_scatter_shifted_offset_u32): Likewise.
14511 (vstrhq_scatter_shifted_offset_u16): Likewise.
14512 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
14513 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
14514 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
14515 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
14516 (vstrhq_s32): Likewise.
14517 (vstrhq_s16): Likewise.
14518 (vstrhq_u32): Likewise.
14519 (vstrhq_u16): Likewise.
14520 (vstrhq_p_f16): Likewise.
14521 (vstrhq_p_s32): Likewise.
14522 (vstrhq_p_s16): Likewise.
14523 (vstrhq_p_u32): Likewise.
14524 (vstrhq_p_u16): Likewise.
14525 (vstrwq_f32): Likewise.
14526 (vstrwq_s32): Likewise.
14527 (vstrwq_u32): Likewise.
14528 (vstrwq_p_f32): Likewise.
14529 (vstrwq_p_s32): Likewise.
14530 (vstrwq_p_u32): Likewise.
14531 (__arm_vst1q_s8): Define intrinsic.
14532 (__arm_vst1q_s32): Likewise.
14533 (__arm_vst1q_s16): Likewise.
14534 (__arm_vst1q_u8): Likewise.
14535 (__arm_vst1q_u32): Likewise.
14536 (__arm_vst1q_u16): Likewise.
14537 (__arm_vstrhq_scatter_offset_s32): Likewise.
14538 (__arm_vstrhq_scatter_offset_s16): Likewise.
14539 (__arm_vstrhq_scatter_offset_u32): Likewise.
14540 (__arm_vstrhq_scatter_offset_u16): Likewise.
14541 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
14542 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
14543 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
14544 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
14545 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
14546 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
14547 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
14548 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
14549 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
14550 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
14551 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
14552 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
14553 (__arm_vstrhq_s32): Likewise.
14554 (__arm_vstrhq_s16): Likewise.
14555 (__arm_vstrhq_u32): Likewise.
14556 (__arm_vstrhq_u16): Likewise.
14557 (__arm_vstrhq_p_s32): Likewise.
14558 (__arm_vstrhq_p_s16): Likewise.
14559 (__arm_vstrhq_p_u32): Likewise.
14560 (__arm_vstrhq_p_u16): Likewise.
14561 (__arm_vstrwq_s32): Likewise.
14562 (__arm_vstrwq_u32): Likewise.
14563 (__arm_vstrwq_p_s32): Likewise.
14564 (__arm_vstrwq_p_u32): Likewise.
14565 (__arm_vstrwq_p_f32): Likewise.
14566 (__arm_vstrwq_f32): Likewise.
14567 (__arm_vst1q_f32): Likewise.
14568 (__arm_vst1q_f16): Likewise.
14569 (__arm_vstrhq_f16): Likewise.
14570 (__arm_vstrhq_p_f16): Likewise.
14571 (vst1q): Define polymorphic variant.
14572 (vstrhq): Likewise.
14573 (vstrhq_p): Likewise.
14574 (vstrhq_scatter_offset_p): Likewise.
14575 (vstrhq_scatter_offset): Likewise.
14576 (vstrhq_scatter_shifted_offset_p): Likewise.
14577 (vstrhq_scatter_shifted_offset): Likewise.
14578 (vstrwq_p): Likewise.
14579 (vstrwq): Likewise.
14580 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
14581 (STRS_P): Likewise.
14583 (STRSS_P): Likewise.
14585 (STRSU_P): Likewise.
14587 (STRU_P): Likewise.
14588 * config/arm/mve.md (VST1Q): Define iterator.
14589 (VSTRHSOQ): Likewise.
14590 (VSTRHSSOQ): Likewise.
14591 (VSTRHQ): Likewise.
14592 (VSTRWQ): Likewise.
14593 (mve_vstrhq_fv8hf): Define RTL pattern.
14594 (mve_vstrhq_p_fv8hf): Likewise.
14595 (mve_vstrhq_p_<supf><mode>): Likewise.
14596 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
14597 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
14598 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
14599 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
14600 (mve_vstrhq_<supf><mode>): Likewise.
14601 (mve_vstrwq_fv4sf): Likewise.
14602 (mve_vstrwq_p_fv4sf): Likewise.
14603 (mve_vstrwq_p_<supf>v4si): Likewise.
14604 (mve_vstrwq_<supf>v4si): Likewise.
14605 (mve_vst1q_f<mode>): Define expand.
14606 (mve_vst1q_<supf><mode>): Likewise.
14608 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14609 Mihail Ionescu <mihail.ionescu@arm.com>
14610 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14612 * config/arm/arm_mve.h (vld1q_s8): Define macro.
14613 (vld1q_s32): Likewise.
14614 (vld1q_s16): Likewise.
14615 (vld1q_u8): Likewise.
14616 (vld1q_u32): Likewise.
14617 (vld1q_u16): Likewise.
14618 (vldrhq_gather_offset_s32): Likewise.
14619 (vldrhq_gather_offset_s16): Likewise.
14620 (vldrhq_gather_offset_u32): Likewise.
14621 (vldrhq_gather_offset_u16): Likewise.
14622 (vldrhq_gather_offset_z_s32): Likewise.
14623 (vldrhq_gather_offset_z_s16): Likewise.
14624 (vldrhq_gather_offset_z_u32): Likewise.
14625 (vldrhq_gather_offset_z_u16): Likewise.
14626 (vldrhq_gather_shifted_offset_s32): Likewise.
14627 (vldrhq_gather_shifted_offset_s16): Likewise.
14628 (vldrhq_gather_shifted_offset_u32): Likewise.
14629 (vldrhq_gather_shifted_offset_u16): Likewise.
14630 (vldrhq_gather_shifted_offset_z_s32): Likewise.
14631 (vldrhq_gather_shifted_offset_z_s16): Likewise.
14632 (vldrhq_gather_shifted_offset_z_u32): Likewise.
14633 (vldrhq_gather_shifted_offset_z_u16): Likewise.
14634 (vldrhq_s32): Likewise.
14635 (vldrhq_s16): Likewise.
14636 (vldrhq_u32): Likewise.
14637 (vldrhq_u16): Likewise.
14638 (vldrhq_z_s32): Likewise.
14639 (vldrhq_z_s16): Likewise.
14640 (vldrhq_z_u32): Likewise.
14641 (vldrhq_z_u16): Likewise.
14642 (vldrwq_s32): Likewise.
14643 (vldrwq_u32): Likewise.
14644 (vldrwq_z_s32): Likewise.
14645 (vldrwq_z_u32): Likewise.
14646 (vld1q_f32): Likewise.
14647 (vld1q_f16): Likewise.
14648 (vldrhq_f16): Likewise.
14649 (vldrhq_z_f16): Likewise.
14650 (vldrwq_f32): Likewise.
14651 (vldrwq_z_f32): Likewise.
14652 (__arm_vld1q_s8): Define intrinsic.
14653 (__arm_vld1q_s32): Likewise.
14654 (__arm_vld1q_s16): Likewise.
14655 (__arm_vld1q_u8): Likewise.
14656 (__arm_vld1q_u32): Likewise.
14657 (__arm_vld1q_u16): Likewise.
14658 (__arm_vldrhq_gather_offset_s32): Likewise.
14659 (__arm_vldrhq_gather_offset_s16): Likewise.
14660 (__arm_vldrhq_gather_offset_u32): Likewise.
14661 (__arm_vldrhq_gather_offset_u16): Likewise.
14662 (__arm_vldrhq_gather_offset_z_s32): Likewise.
14663 (__arm_vldrhq_gather_offset_z_s16): Likewise.
14664 (__arm_vldrhq_gather_offset_z_u32): Likewise.
14665 (__arm_vldrhq_gather_offset_z_u16): Likewise.
14666 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
14667 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
14668 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
14669 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
14670 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
14671 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
14672 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
14673 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
14674 (__arm_vldrhq_s32): Likewise.
14675 (__arm_vldrhq_s16): Likewise.
14676 (__arm_vldrhq_u32): Likewise.
14677 (__arm_vldrhq_u16): Likewise.
14678 (__arm_vldrhq_z_s32): Likewise.
14679 (__arm_vldrhq_z_s16): Likewise.
14680 (__arm_vldrhq_z_u32): Likewise.
14681 (__arm_vldrhq_z_u16): Likewise.
14682 (__arm_vldrwq_s32): Likewise.
14683 (__arm_vldrwq_u32): Likewise.
14684 (__arm_vldrwq_z_s32): Likewise.
14685 (__arm_vldrwq_z_u32): Likewise.
14686 (__arm_vld1q_f32): Likewise.
14687 (__arm_vld1q_f16): Likewise.
14688 (__arm_vldrwq_f32): Likewise.
14689 (__arm_vldrwq_z_f32): Likewise.
14690 (__arm_vldrhq_z_f16): Likewise.
14691 (__arm_vldrhq_f16): Likewise.
14692 (vld1q): Define polymorphic variant.
14693 (vldrhq_gather_offset): Likewise.
14694 (vldrhq_gather_offset_z): Likewise.
14695 (vldrhq_gather_shifted_offset): Likewise.
14696 (vldrhq_gather_shifted_offset_z): Likewise.
14697 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
14699 (LDRU_Z): Likewise.
14700 (LDRS_Z): Likewise.
14701 (LDRGU_Z): Likewise.
14703 (LDRGS_Z): Likewise.
14705 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
14706 (V_sz_elem1): Likewise.
14707 (VLD1Q): Define iterator.
14708 (VLDRHGOQ): Likewise.
14709 (VLDRHGSOQ): Likewise.
14710 (VLDRHQ): Likewise.
14711 (VLDRWQ): Likewise.
14712 (mve_vldrhq_fv8hf): Define RTL pattern.
14713 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14714 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14715 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14716 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14717 (mve_vldrhq_<supf><mode>): Likewise.
14718 (mve_vldrhq_z_fv8hf): Likewise.
14719 (mve_vldrhq_z_<supf><mode>): Likewise.
14720 (mve_vldrwq_fv4sf): Likewise.
14721 (mve_vldrwq_<supf>v4si): Likewise.
14722 (mve_vldrwq_z_fv4sf): Likewise.
14723 (mve_vldrwq_z_<supf>v4si): Likewise.
14724 (mve_vld1q_f<mode>): Define RTL expand pattern.
14725 (mve_vld1q_<supf><mode>): Likewise.
14727 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14728 Mihail Ionescu <mihail.ionescu@arm.com>
14729 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14731 * config/arm/arm_mve.h (vld1q_s8): Define macro.
14732 (vld1q_s32): Likewise.
14733 (vld1q_s16): Likewise.
14734 (vld1q_u8): Likewise.
14735 (vld1q_u32): Likewise.
14736 (vld1q_u16): Likewise.
14737 (vldrhq_gather_offset_s32): Likewise.
14738 (vldrhq_gather_offset_s16): Likewise.
14739 (vldrhq_gather_offset_u32): Likewise.
14740 (vldrhq_gather_offset_u16): Likewise.
14741 (vldrhq_gather_offset_z_s32): Likewise.
14742 (vldrhq_gather_offset_z_s16): Likewise.
14743 (vldrhq_gather_offset_z_u32): Likewise.
14744 (vldrhq_gather_offset_z_u16): Likewise.
14745 (vldrhq_gather_shifted_offset_s32): Likewise.
14746 (vldrhq_gather_shifted_offset_s16): Likewise.
14747 (vldrhq_gather_shifted_offset_u32): Likewise.
14748 (vldrhq_gather_shifted_offset_u16): Likewise.
14749 (vldrhq_gather_shifted_offset_z_s32): Likewise.
14750 (vldrhq_gather_shifted_offset_z_s16): Likewise.
14751 (vldrhq_gather_shifted_offset_z_u32): Likewise.
14752 (vldrhq_gather_shifted_offset_z_u16): Likewise.
14753 (vldrhq_s32): Likewise.
14754 (vldrhq_s16): Likewise.
14755 (vldrhq_u32): Likewise.
14756 (vldrhq_u16): Likewise.
14757 (vldrhq_z_s32): Likewise.
14758 (vldrhq_z_s16): Likewise.
14759 (vldrhq_z_u32): Likewise.
14760 (vldrhq_z_u16): Likewise.
14761 (vldrwq_s32): Likewise.
14762 (vldrwq_u32): Likewise.
14763 (vldrwq_z_s32): Likewise.
14764 (vldrwq_z_u32): Likewise.
14765 (vld1q_f32): Likewise.
14766 (vld1q_f16): Likewise.
14767 (vldrhq_f16): Likewise.
14768 (vldrhq_z_f16): Likewise.
14769 (vldrwq_f32): Likewise.
14770 (vldrwq_z_f32): Likewise.
14771 (__arm_vld1q_s8): Define intrinsic.
14772 (__arm_vld1q_s32): Likewise.
14773 (__arm_vld1q_s16): Likewise.
14774 (__arm_vld1q_u8): Likewise.
14775 (__arm_vld1q_u32): Likewise.
14776 (__arm_vld1q_u16): Likewise.
14777 (__arm_vldrhq_gather_offset_s32): Likewise.
14778 (__arm_vldrhq_gather_offset_s16): Likewise.
14779 (__arm_vldrhq_gather_offset_u32): Likewise.
14780 (__arm_vldrhq_gather_offset_u16): Likewise.
14781 (__arm_vldrhq_gather_offset_z_s32): Likewise.
14782 (__arm_vldrhq_gather_offset_z_s16): Likewise.
14783 (__arm_vldrhq_gather_offset_z_u32): Likewise.
14784 (__arm_vldrhq_gather_offset_z_u16): Likewise.
14785 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
14786 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
14787 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
14788 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
14789 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
14790 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
14791 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
14792 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
14793 (__arm_vldrhq_s32): Likewise.
14794 (__arm_vldrhq_s16): Likewise.
14795 (__arm_vldrhq_u32): Likewise.
14796 (__arm_vldrhq_u16): Likewise.
14797 (__arm_vldrhq_z_s32): Likewise.
14798 (__arm_vldrhq_z_s16): Likewise.
14799 (__arm_vldrhq_z_u32): Likewise.
14800 (__arm_vldrhq_z_u16): Likewise.
14801 (__arm_vldrwq_s32): Likewise.
14802 (__arm_vldrwq_u32): Likewise.
14803 (__arm_vldrwq_z_s32): Likewise.
14804 (__arm_vldrwq_z_u32): Likewise.
14805 (__arm_vld1q_f32): Likewise.
14806 (__arm_vld1q_f16): Likewise.
14807 (__arm_vldrwq_f32): Likewise.
14808 (__arm_vldrwq_z_f32): Likewise.
14809 (__arm_vldrhq_z_f16): Likewise.
14810 (__arm_vldrhq_f16): Likewise.
14811 (vld1q): Define polymorphic variant.
14812 (vldrhq_gather_offset): Likewise.
14813 (vldrhq_gather_offset_z): Likewise.
14814 (vldrhq_gather_shifted_offset): Likewise.
14815 (vldrhq_gather_shifted_offset_z): Likewise.
14816 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
14818 (LDRU_Z): Likewise.
14819 (LDRS_Z): Likewise.
14820 (LDRGU_Z): Likewise.
14822 (LDRGS_Z): Likewise.
14824 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
14825 (V_sz_elem1): Likewise.
14826 (VLD1Q): Define iterator.
14827 (VLDRHGOQ): Likewise.
14828 (VLDRHGSOQ): Likewise.
14829 (VLDRHQ): Likewise.
14830 (VLDRWQ): Likewise.
14831 (mve_vldrhq_fv8hf): Define RTL pattern.
14832 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14833 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14834 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14835 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14836 (mve_vldrhq_<supf><mode>): Likewise.
14837 (mve_vldrhq_z_fv8hf): Likewise.
14838 (mve_vldrhq_z_<supf><mode>): Likewise.
14839 (mve_vldrwq_fv4sf): Likewise.
14840 (mve_vldrwq_<supf>v4si): Likewise.
14841 (mve_vldrwq_z_fv4sf): Likewise.
14842 (mve_vldrwq_z_<supf>v4si): Likewise.
14843 (mve_vld1q_f<mode>): Define RTL expand pattern.
14844 (mve_vld1q_<supf><mode>): Likewise.
14846 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14847 Mihail Ionescu <mihail.ionescu@arm.com>
14848 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14850 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
14852 (LDRGBU_Z_QUALIFIERS): Likewise.
14853 (LDRGS_Z_QUALIFIERS): Likewise.
14854 (LDRGU_Z_QUALIFIERS): Likewise.
14855 (LDRS_Z_QUALIFIERS): Likewise.
14856 (LDRU_Z_QUALIFIERS): Likewise.
14857 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
14858 (vldrbq_gather_offset_z_u8): Likewise.
14859 (vldrbq_gather_offset_z_s32): Likewise.
14860 (vldrbq_gather_offset_z_u16): Likewise.
14861 (vldrbq_gather_offset_z_u32): Likewise.
14862 (vldrbq_gather_offset_z_s8): Likewise.
14863 (vldrbq_z_s16): Likewise.
14864 (vldrbq_z_u8): Likewise.
14865 (vldrbq_z_s8): Likewise.
14866 (vldrbq_z_s32): Likewise.
14867 (vldrbq_z_u16): Likewise.
14868 (vldrbq_z_u32): Likewise.
14869 (vldrwq_gather_base_z_u32): Likewise.
14870 (vldrwq_gather_base_z_s32): Likewise.
14871 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
14872 (__arm_vldrbq_gather_offset_z_s32): Likewise.
14873 (__arm_vldrbq_gather_offset_z_s16): Likewise.
14874 (__arm_vldrbq_gather_offset_z_u8): Likewise.
14875 (__arm_vldrbq_gather_offset_z_u32): Likewise.
14876 (__arm_vldrbq_gather_offset_z_u16): Likewise.
14877 (__arm_vldrbq_z_s8): Likewise.
14878 (__arm_vldrbq_z_s32): Likewise.
14879 (__arm_vldrbq_z_s16): Likewise.
14880 (__arm_vldrbq_z_u8): Likewise.
14881 (__arm_vldrbq_z_u32): Likewise.
14882 (__arm_vldrbq_z_u16): Likewise.
14883 (__arm_vldrwq_gather_base_z_s32): Likewise.
14884 (__arm_vldrwq_gather_base_z_u32): Likewise.
14885 (vldrbq_gather_offset_z): Define polymorphic variant.
14886 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
14888 (LDRGBU_Z_QUALIFIERS): Likewise.
14889 (LDRGS_Z_QUALIFIERS): Likewise.
14890 (LDRGU_Z_QUALIFIERS): Likewise.
14891 (LDRS_Z_QUALIFIERS): Likewise.
14892 (LDRU_Z_QUALIFIERS): Likewise.
14893 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
14895 (mve_vldrbq_z_<supf><mode>): Likewise.
14896 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
14898 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14899 Mihail Ionescu <mihail.ionescu@arm.com>
14900 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14902 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
14904 (STRU_P_QUALIFIERS): Likewise.
14905 (STRSU_P_QUALIFIERS): Likewise.
14906 (STRSS_P_QUALIFIERS): Likewise.
14907 (STRSBS_P_QUALIFIERS): Likewise.
14908 (STRSBU_P_QUALIFIERS): Likewise.
14909 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
14910 (vstrbq_p_s32): Likewise.
14911 (vstrbq_p_s16): Likewise.
14912 (vstrbq_p_u8): Likewise.
14913 (vstrbq_p_u32): Likewise.
14914 (vstrbq_p_u16): Likewise.
14915 (vstrbq_scatter_offset_p_s8): Likewise.
14916 (vstrbq_scatter_offset_p_s32): Likewise.
14917 (vstrbq_scatter_offset_p_s16): Likewise.
14918 (vstrbq_scatter_offset_p_u8): Likewise.
14919 (vstrbq_scatter_offset_p_u32): Likewise.
14920 (vstrbq_scatter_offset_p_u16): Likewise.
14921 (vstrwq_scatter_base_p_s32): Likewise.
14922 (vstrwq_scatter_base_p_u32): Likewise.
14923 (__arm_vstrbq_p_s8): Define intrinsic.
14924 (__arm_vstrbq_p_s32): Likewise.
14925 (__arm_vstrbq_p_s16): Likewise.
14926 (__arm_vstrbq_p_u8): Likewise.
14927 (__arm_vstrbq_p_u32): Likewise.
14928 (__arm_vstrbq_p_u16): Likewise.
14929 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
14930 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
14931 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
14932 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
14933 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
14934 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
14935 (__arm_vstrwq_scatter_base_p_s32): Likewise.
14936 (__arm_vstrwq_scatter_base_p_u32): Likewise.
14937 (vstrbq_p): Define polymorphic variant.
14938 (vstrbq_scatter_offset_p): Likewise.
14939 (vstrwq_scatter_base_p): Likewise.
14940 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
14942 (STRU_P_QUALIFIERS): Likewise.
14943 (STRSU_P_QUALIFIERS): Likewise.
14944 (STRSS_P_QUALIFIERS): Likewise.
14945 (STRSBS_P_QUALIFIERS): Likewise.
14946 (STRSBU_P_QUALIFIERS): Likewise.
14947 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
14949 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
14950 (mve_vstrbq_p_<supf><mode>): Likewise.
14952 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14953 Mihail Ionescu <mihail.ionescu@arm.com>
14954 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14956 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
14958 (LDRGS_QUALIFIERS): Likewise.
14959 (LDRS_QUALIFIERS): Likewise.
14960 (LDRU_QUALIFIERS): Likewise.
14961 (LDRGBS_QUALIFIERS): Likewise.
14962 (LDRGBU_QUALIFIERS): Likewise.
14963 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
14964 (vldrbq_gather_offset_s8): Likewise.
14965 (vldrbq_s8): Likewise.
14966 (vldrbq_u8): Likewise.
14967 (vldrbq_gather_offset_u16): Likewise.
14968 (vldrbq_gather_offset_s16): Likewise.
14969 (vldrbq_s16): Likewise.
14970 (vldrbq_u16): Likewise.
14971 (vldrbq_gather_offset_u32): Likewise.
14972 (vldrbq_gather_offset_s32): Likewise.
14973 (vldrbq_s32): Likewise.
14974 (vldrbq_u32): Likewise.
14975 (vldrwq_gather_base_s32): Likewise.
14976 (vldrwq_gather_base_u32): Likewise.
14977 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
14978 (__arm_vldrbq_gather_offset_s8): Likewise.
14979 (__arm_vldrbq_s8): Likewise.
14980 (__arm_vldrbq_u8): Likewise.
14981 (__arm_vldrbq_gather_offset_u16): Likewise.
14982 (__arm_vldrbq_gather_offset_s16): Likewise.
14983 (__arm_vldrbq_s16): Likewise.
14984 (__arm_vldrbq_u16): Likewise.
14985 (__arm_vldrbq_gather_offset_u32): Likewise.
14986 (__arm_vldrbq_gather_offset_s32): Likewise.
14987 (__arm_vldrbq_s32): Likewise.
14988 (__arm_vldrbq_u32): Likewise.
14989 (__arm_vldrwq_gather_base_s32): Likewise.
14990 (__arm_vldrwq_gather_base_u32): Likewise.
14991 (vldrbq_gather_offset): Define polymorphic variant.
14992 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
14994 (LDRGS_QUALIFIERS): Likewise.
14995 (LDRS_QUALIFIERS): Likewise.
14996 (LDRU_QUALIFIERS): Likewise.
14997 (LDRGBS_QUALIFIERS): Likewise.
14998 (LDRGBU_QUALIFIERS): Likewise.
14999 * config/arm/mve.md (VLDRBGOQ): Define iterator.
15000 (VLDRBQ): Likewise.
15001 (VLDRWGBQ): Likewise.
15002 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
15003 (mve_vldrbq_<supf><mode>): Likewise.
15004 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
15006 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15007 Mihail Ionescu <mihail.ionescu@arm.com>
15008 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15010 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
15011 (STRU_QUALIFIERS): Likewise.
15012 (STRSS_QUALIFIERS): Likewise.
15013 (STRSU_QUALIFIERS): Likewise.
15014 (STRSBS_QUALIFIERS): Likewise.
15015 (STRSBU_QUALIFIERS): Likewise.
15016 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
15017 (vstrbq_u8): Likewise.
15018 (vstrbq_u16): Likewise.
15019 (vstrbq_scatter_offset_s8): Likewise.
15020 (vstrbq_scatter_offset_u8): Likewise.
15021 (vstrbq_scatter_offset_u16): Likewise.
15022 (vstrbq_s16): Likewise.
15023 (vstrbq_u32): Likewise.
15024 (vstrbq_scatter_offset_s16): Likewise.
15025 (vstrbq_scatter_offset_u32): Likewise.
15026 (vstrbq_s32): Likewise.
15027 (vstrbq_scatter_offset_s32): Likewise.
15028 (vstrwq_scatter_base_s32): Likewise.
15029 (vstrwq_scatter_base_u32): Likewise.
15030 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
15031 (__arm_vstrbq_scatter_offset_s32): Likewise.
15032 (__arm_vstrbq_scatter_offset_s16): Likewise.
15033 (__arm_vstrbq_scatter_offset_u8): Likewise.
15034 (__arm_vstrbq_scatter_offset_u32): Likewise.
15035 (__arm_vstrbq_scatter_offset_u16): Likewise.
15036 (__arm_vstrbq_s8): Likewise.
15037 (__arm_vstrbq_s32): Likewise.
15038 (__arm_vstrbq_s16): Likewise.
15039 (__arm_vstrbq_u8): Likewise.
15040 (__arm_vstrbq_u32): Likewise.
15041 (__arm_vstrbq_u16): Likewise.
15042 (__arm_vstrwq_scatter_base_s32): Likewise.
15043 (__arm_vstrwq_scatter_base_u32): Likewise.
15044 (vstrbq): Define polymorphic variant.
15045 (vstrbq_scatter_offset): Likewise.
15046 (vstrwq_scatter_base): Likewise.
15047 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
15049 (STRU_QUALIFIERS): Likewise.
15050 (STRSS_QUALIFIERS): Likewise.
15051 (STRSU_QUALIFIERS): Likewise.
15052 (STRSBS_QUALIFIERS): Likewise.
15053 (STRSBU_QUALIFIERS): Likewise.
15054 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
15055 (VSTRWSBQ): Define iterators.
15056 (VSTRBSOQ): Likewise.
15057 (VSTRBQ): Likewise.
15058 (mve_vstrbq_<supf><mode>): Define RTL pattern.
15059 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
15060 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
15062 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15063 Mihail Ionescu <mihail.ionescu@arm.com>
15064 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15066 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
15067 (vabdq_m_f16): Likewise.
15068 (vaddq_m_f32): Likewise.
15069 (vaddq_m_f16): Likewise.
15070 (vaddq_m_n_f32): Likewise.
15071 (vaddq_m_n_f16): Likewise.
15072 (vandq_m_f32): Likewise.
15073 (vandq_m_f16): Likewise.
15074 (vbicq_m_f32): Likewise.
15075 (vbicq_m_f16): Likewise.
15076 (vbrsrq_m_n_f32): Likewise.
15077 (vbrsrq_m_n_f16): Likewise.
15078 (vcaddq_rot270_m_f32): Likewise.
15079 (vcaddq_rot270_m_f16): Likewise.
15080 (vcaddq_rot90_m_f32): Likewise.
15081 (vcaddq_rot90_m_f16): Likewise.
15082 (vcmlaq_m_f32): Likewise.
15083 (vcmlaq_m_f16): Likewise.
15084 (vcmlaq_rot180_m_f32): Likewise.
15085 (vcmlaq_rot180_m_f16): Likewise.
15086 (vcmlaq_rot270_m_f32): Likewise.
15087 (vcmlaq_rot270_m_f16): Likewise.
15088 (vcmlaq_rot90_m_f32): Likewise.
15089 (vcmlaq_rot90_m_f16): Likewise.
15090 (vcmulq_m_f32): Likewise.
15091 (vcmulq_m_f16): Likewise.
15092 (vcmulq_rot180_m_f32): Likewise.
15093 (vcmulq_rot180_m_f16): Likewise.
15094 (vcmulq_rot270_m_f32): Likewise.
15095 (vcmulq_rot270_m_f16): Likewise.
15096 (vcmulq_rot90_m_f32): Likewise.
15097 (vcmulq_rot90_m_f16): Likewise.
15098 (vcvtq_m_n_s32_f32): Likewise.
15099 (vcvtq_m_n_s16_f16): Likewise.
15100 (vcvtq_m_n_u32_f32): Likewise.
15101 (vcvtq_m_n_u16_f16): Likewise.
15102 (veorq_m_f32): Likewise.
15103 (veorq_m_f16): Likewise.
15104 (vfmaq_m_f32): Likewise.
15105 (vfmaq_m_f16): Likewise.
15106 (vfmaq_m_n_f32): Likewise.
15107 (vfmaq_m_n_f16): Likewise.
15108 (vfmasq_m_n_f32): Likewise.
15109 (vfmasq_m_n_f16): Likewise.
15110 (vfmsq_m_f32): Likewise.
15111 (vfmsq_m_f16): Likewise.
15112 (vmaxnmq_m_f32): Likewise.
15113 (vmaxnmq_m_f16): Likewise.
15114 (vminnmq_m_f32): Likewise.
15115 (vminnmq_m_f16): Likewise.
15116 (vmulq_m_f32): Likewise.
15117 (vmulq_m_f16): Likewise.
15118 (vmulq_m_n_f32): Likewise.
15119 (vmulq_m_n_f16): Likewise.
15120 (vornq_m_f32): Likewise.
15121 (vornq_m_f16): Likewise.
15122 (vorrq_m_f32): Likewise.
15123 (vorrq_m_f16): Likewise.
15124 (vsubq_m_f32): Likewise.
15125 (vsubq_m_f16): Likewise.
15126 (vsubq_m_n_f32): Likewise.
15127 (vsubq_m_n_f16): Likewise.
15128 (__attribute__): Likewise.
15129 (__arm_vabdq_m_f32): Likewise.
15130 (__arm_vabdq_m_f16): Likewise.
15131 (__arm_vaddq_m_f32): Likewise.
15132 (__arm_vaddq_m_f16): Likewise.
15133 (__arm_vaddq_m_n_f32): Likewise.
15134 (__arm_vaddq_m_n_f16): Likewise.
15135 (__arm_vandq_m_f32): Likewise.
15136 (__arm_vandq_m_f16): Likewise.
15137 (__arm_vbicq_m_f32): Likewise.
15138 (__arm_vbicq_m_f16): Likewise.
15139 (__arm_vbrsrq_m_n_f32): Likewise.
15140 (__arm_vbrsrq_m_n_f16): Likewise.
15141 (__arm_vcaddq_rot270_m_f32): Likewise.
15142 (__arm_vcaddq_rot270_m_f16): Likewise.
15143 (__arm_vcaddq_rot90_m_f32): Likewise.
15144 (__arm_vcaddq_rot90_m_f16): Likewise.
15145 (__arm_vcmlaq_m_f32): Likewise.
15146 (__arm_vcmlaq_m_f16): Likewise.
15147 (__arm_vcmlaq_rot180_m_f32): Likewise.
15148 (__arm_vcmlaq_rot180_m_f16): Likewise.
15149 (__arm_vcmlaq_rot270_m_f32): Likewise.
15150 (__arm_vcmlaq_rot270_m_f16): Likewise.
15151 (__arm_vcmlaq_rot90_m_f32): Likewise.
15152 (__arm_vcmlaq_rot90_m_f16): Likewise.
15153 (__arm_vcmulq_m_f32): Likewise.
15154 (__arm_vcmulq_m_f16): Likewise.
15155 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
15156 (__arm_vcmulq_rot180_m_f16): Likewise.
15157 (__arm_vcmulq_rot270_m_f32): Likewise.
15158 (__arm_vcmulq_rot270_m_f16): Likewise.
15159 (__arm_vcmulq_rot90_m_f32): Likewise.
15160 (__arm_vcmulq_rot90_m_f16): Likewise.
15161 (__arm_vcvtq_m_n_s32_f32): Likewise.
15162 (__arm_vcvtq_m_n_s16_f16): Likewise.
15163 (__arm_vcvtq_m_n_u32_f32): Likewise.
15164 (__arm_vcvtq_m_n_u16_f16): Likewise.
15165 (__arm_veorq_m_f32): Likewise.
15166 (__arm_veorq_m_f16): Likewise.
15167 (__arm_vfmaq_m_f32): Likewise.
15168 (__arm_vfmaq_m_f16): Likewise.
15169 (__arm_vfmaq_m_n_f32): Likewise.
15170 (__arm_vfmaq_m_n_f16): Likewise.
15171 (__arm_vfmasq_m_n_f32): Likewise.
15172 (__arm_vfmasq_m_n_f16): Likewise.
15173 (__arm_vfmsq_m_f32): Likewise.
15174 (__arm_vfmsq_m_f16): Likewise.
15175 (__arm_vmaxnmq_m_f32): Likewise.
15176 (__arm_vmaxnmq_m_f16): Likewise.
15177 (__arm_vminnmq_m_f32): Likewise.
15178 (__arm_vminnmq_m_f16): Likewise.
15179 (__arm_vmulq_m_f32): Likewise.
15180 (__arm_vmulq_m_f16): Likewise.
15181 (__arm_vmulq_m_n_f32): Likewise.
15182 (__arm_vmulq_m_n_f16): Likewise.
15183 (__arm_vornq_m_f32): Likewise.
15184 (__arm_vornq_m_f16): Likewise.
15185 (__arm_vorrq_m_f32): Likewise.
15186 (__arm_vorrq_m_f16): Likewise.
15187 (__arm_vsubq_m_f32): Likewise.
15188 (__arm_vsubq_m_f16): Likewise.
15189 (__arm_vsubq_m_n_f32): Likewise.
15190 (__arm_vsubq_m_n_f16): Likewise.
15191 (vabdq_m): Define polymorphic variant.
15192 (vaddq_m): Likewise.
15193 (vaddq_m_n): Likewise.
15194 (vandq_m): Likewise.
15195 (vbicq_m): Likewise.
15196 (vbrsrq_m_n): Likewise.
15197 (vcaddq_rot270_m): Likewise.
15198 (vcaddq_rot90_m): Likewise.
15199 (vcmlaq_m): Likewise.
15200 (vcmlaq_rot180_m): Likewise.
15201 (vcmlaq_rot270_m): Likewise.
15202 (vcmlaq_rot90_m): Likewise.
15203 (vcmulq_m): Likewise.
15204 (vcmulq_rot180_m): Likewise.
15205 (vcmulq_rot270_m): Likewise.
15206 (vcmulq_rot90_m): Likewise.
15207 (veorq_m): Likewise.
15208 (vfmaq_m): Likewise.
15209 (vfmaq_m_n): Likewise.
15210 (vfmasq_m_n): Likewise.
15211 (vfmsq_m): Likewise.
15212 (vmaxnmq_m): Likewise.
15213 (vminnmq_m): Likewise.
15214 (vmulq_m): Likewise.
15215 (vmulq_m_n): Likewise.
15216 (vornq_m): Likewise.
15217 (vsubq_m): Likewise.
15218 (vsubq_m_n): Likewise.
15219 (vorrq_m): Likewise.
15220 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15222 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15223 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15224 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
15225 (mve_vaddq_m_f<mode>): Likewise.
15226 (mve_vaddq_m_n_f<mode>): Likewise.
15227 (mve_vandq_m_f<mode>): Likewise.
15228 (mve_vbicq_m_f<mode>): Likewise.
15229 (mve_vbrsrq_m_n_f<mode>): Likewise.
15230 (mve_vcaddq_rot270_m_f<mode>): Likewise.
15231 (mve_vcaddq_rot90_m_f<mode>): Likewise.
15232 (mve_vcmlaq_m_f<mode>): Likewise.
15233 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
15234 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
15235 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
15236 (mve_vcmulq_m_f<mode>): Likewise.
15237 (mve_vcmulq_rot180_m_f<mode>): Likewise.
15238 (mve_vcmulq_rot270_m_f<mode>): Likewise.
15239 (mve_vcmulq_rot90_m_f<mode>): Likewise.
15240 (mve_veorq_m_f<mode>): Likewise.
15241 (mve_vfmaq_m_f<mode>): Likewise.
15242 (mve_vfmaq_m_n_f<mode>): Likewise.
15243 (mve_vfmasq_m_n_f<mode>): Likewise.
15244 (mve_vfmsq_m_f<mode>): Likewise.
15245 (mve_vmaxnmq_m_f<mode>): Likewise.
15246 (mve_vminnmq_m_f<mode>): Likewise.
15247 (mve_vmulq_m_f<mode>): Likewise.
15248 (mve_vmulq_m_n_f<mode>): Likewise.
15249 (mve_vornq_m_f<mode>): Likewise.
15250 (mve_vorrq_m_f<mode>): Likewise.
15251 (mve_vsubq_m_f<mode>): Likewise.
15252 (mve_vsubq_m_n_f<mode>): Likewise.
15254 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15255 Mihail Ionescu <mihail.ionescu@arm.com>
15256 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15258 * config/arm/arm-protos.h (arm_mve_immediate_check):
15259 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
15260 mode and interger value.
15261 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
15262 (vmlaldavaq_p_s16): Likewise.
15263 (vmlaldavaq_p_u32): Likewise.
15264 (vmlaldavaq_p_u16): Likewise.
15265 (vmlaldavaxq_p_s32): Likewise.
15266 (vmlaldavaxq_p_s16): Likewise.
15267 (vmlaldavaxq_p_u32): Likewise.
15268 (vmlaldavaxq_p_u16): Likewise.
15269 (vmlsldavaq_p_s32): Likewise.
15270 (vmlsldavaq_p_s16): Likewise.
15271 (vmlsldavaxq_p_s32): Likewise.
15272 (vmlsldavaxq_p_s16): Likewise.
15273 (vmullbq_poly_m_p8): Likewise.
15274 (vmullbq_poly_m_p16): Likewise.
15275 (vmulltq_poly_m_p8): Likewise.
15276 (vmulltq_poly_m_p16): Likewise.
15277 (vqdmullbq_m_n_s32): Likewise.
15278 (vqdmullbq_m_n_s16): Likewise.
15279 (vqdmullbq_m_s32): Likewise.
15280 (vqdmullbq_m_s16): Likewise.
15281 (vqdmulltq_m_n_s32): Likewise.
15282 (vqdmulltq_m_n_s16): Likewise.
15283 (vqdmulltq_m_s32): Likewise.
15284 (vqdmulltq_m_s16): Likewise.
15285 (vqrshrnbq_m_n_s32): Likewise.
15286 (vqrshrnbq_m_n_s16): Likewise.
15287 (vqrshrnbq_m_n_u32): Likewise.
15288 (vqrshrnbq_m_n_u16): Likewise.
15289 (vqrshrntq_m_n_s32): Likewise.
15290 (vqrshrntq_m_n_s16): Likewise.
15291 (vqrshrntq_m_n_u32): Likewise.
15292 (vqrshrntq_m_n_u16): Likewise.
15293 (vqrshrunbq_m_n_s32): Likewise.
15294 (vqrshrunbq_m_n_s16): Likewise.
15295 (vqrshruntq_m_n_s32): Likewise.
15296 (vqrshruntq_m_n_s16): Likewise.
15297 (vqshrnbq_m_n_s32): Likewise.
15298 (vqshrnbq_m_n_s16): Likewise.
15299 (vqshrnbq_m_n_u32): Likewise.
15300 (vqshrnbq_m_n_u16): Likewise.
15301 (vqshrntq_m_n_s32): Likewise.
15302 (vqshrntq_m_n_s16): Likewise.
15303 (vqshrntq_m_n_u32): Likewise.
15304 (vqshrntq_m_n_u16): Likewise.
15305 (vqshrunbq_m_n_s32): Likewise.
15306 (vqshrunbq_m_n_s16): Likewise.
15307 (vqshruntq_m_n_s32): Likewise.
15308 (vqshruntq_m_n_s16): Likewise.
15309 (vrmlaldavhaq_p_s32): Likewise.
15310 (vrmlaldavhaq_p_u32): Likewise.
15311 (vrmlaldavhaxq_p_s32): Likewise.
15312 (vrmlsldavhaq_p_s32): Likewise.
15313 (vrmlsldavhaxq_p_s32): Likewise.
15314 (vrshrnbq_m_n_s32): Likewise.
15315 (vrshrnbq_m_n_s16): Likewise.
15316 (vrshrnbq_m_n_u32): Likewise.
15317 (vrshrnbq_m_n_u16): Likewise.
15318 (vrshrntq_m_n_s32): Likewise.
15319 (vrshrntq_m_n_s16): Likewise.
15320 (vrshrntq_m_n_u32): Likewise.
15321 (vrshrntq_m_n_u16): Likewise.
15322 (vshllbq_m_n_s8): Likewise.
15323 (vshllbq_m_n_s16): Likewise.
15324 (vshllbq_m_n_u8): Likewise.
15325 (vshllbq_m_n_u16): Likewise.
15326 (vshlltq_m_n_s8): Likewise.
15327 (vshlltq_m_n_s16): Likewise.
15328 (vshlltq_m_n_u8): Likewise.
15329 (vshlltq_m_n_u16): Likewise.
15330 (vshrnbq_m_n_s32): Likewise.
15331 (vshrnbq_m_n_s16): Likewise.
15332 (vshrnbq_m_n_u32): Likewise.
15333 (vshrnbq_m_n_u16): Likewise.
15334 (vshrntq_m_n_s32): Likewise.
15335 (vshrntq_m_n_s16): Likewise.
15336 (vshrntq_m_n_u32): Likewise.
15337 (vshrntq_m_n_u16): Likewise.
15338 (__arm_vmlaldavaq_p_s32): Define intrinsic.
15339 (__arm_vmlaldavaq_p_s16): Likewise.
15340 (__arm_vmlaldavaq_p_u32): Likewise.
15341 (__arm_vmlaldavaq_p_u16): Likewise.
15342 (__arm_vmlaldavaxq_p_s32): Likewise.
15343 (__arm_vmlaldavaxq_p_s16): Likewise.
15344 (__arm_vmlaldavaxq_p_u32): Likewise.
15345 (__arm_vmlaldavaxq_p_u16): Likewise.
15346 (__arm_vmlsldavaq_p_s32): Likewise.
15347 (__arm_vmlsldavaq_p_s16): Likewise.
15348 (__arm_vmlsldavaxq_p_s32): Likewise.
15349 (__arm_vmlsldavaxq_p_s16): Likewise.
15350 (__arm_vmullbq_poly_m_p8): Likewise.
15351 (__arm_vmullbq_poly_m_p16): Likewise.
15352 (__arm_vmulltq_poly_m_p8): Likewise.
15353 (__arm_vmulltq_poly_m_p16): Likewise.
15354 (__arm_vqdmullbq_m_n_s32): Likewise.
15355 (__arm_vqdmullbq_m_n_s16): Likewise.
15356 (__arm_vqdmullbq_m_s32): Likewise.
15357 (__arm_vqdmullbq_m_s16): Likewise.
15358 (__arm_vqdmulltq_m_n_s32): Likewise.
15359 (__arm_vqdmulltq_m_n_s16): Likewise.
15360 (__arm_vqdmulltq_m_s32): Likewise.
15361 (__arm_vqdmulltq_m_s16): Likewise.
15362 (__arm_vqrshrnbq_m_n_s32): Likewise.
15363 (__arm_vqrshrnbq_m_n_s16): Likewise.
15364 (__arm_vqrshrnbq_m_n_u32): Likewise.
15365 (__arm_vqrshrnbq_m_n_u16): Likewise.
15366 (__arm_vqrshrntq_m_n_s32): Likewise.
15367 (__arm_vqrshrntq_m_n_s16): Likewise.
15368 (__arm_vqrshrntq_m_n_u32): Likewise.
15369 (__arm_vqrshrntq_m_n_u16): Likewise.
15370 (__arm_vqrshrunbq_m_n_s32): Likewise.
15371 (__arm_vqrshrunbq_m_n_s16): Likewise.
15372 (__arm_vqrshruntq_m_n_s32): Likewise.
15373 (__arm_vqrshruntq_m_n_s16): Likewise.
15374 (__arm_vqshrnbq_m_n_s32): Likewise.
15375 (__arm_vqshrnbq_m_n_s16): Likewise.
15376 (__arm_vqshrnbq_m_n_u32): Likewise.
15377 (__arm_vqshrnbq_m_n_u16): Likewise.
15378 (__arm_vqshrntq_m_n_s32): Likewise.
15379 (__arm_vqshrntq_m_n_s16): Likewise.
15380 (__arm_vqshrntq_m_n_u32): Likewise.
15381 (__arm_vqshrntq_m_n_u16): Likewise.
15382 (__arm_vqshrunbq_m_n_s32): Likewise.
15383 (__arm_vqshrunbq_m_n_s16): Likewise.
15384 (__arm_vqshruntq_m_n_s32): Likewise.
15385 (__arm_vqshruntq_m_n_s16): Likewise.
15386 (__arm_vrmlaldavhaq_p_s32): Likewise.
15387 (__arm_vrmlaldavhaq_p_u32): Likewise.
15388 (__arm_vrmlaldavhaxq_p_s32): Likewise.
15389 (__arm_vrmlsldavhaq_p_s32): Likewise.
15390 (__arm_vrmlsldavhaxq_p_s32): Likewise.
15391 (__arm_vrshrnbq_m_n_s32): Likewise.
15392 (__arm_vrshrnbq_m_n_s16): Likewise.
15393 (__arm_vrshrnbq_m_n_u32): Likewise.
15394 (__arm_vrshrnbq_m_n_u16): Likewise.
15395 (__arm_vrshrntq_m_n_s32): Likewise.
15396 (__arm_vrshrntq_m_n_s16): Likewise.
15397 (__arm_vrshrntq_m_n_u32): Likewise.
15398 (__arm_vrshrntq_m_n_u16): Likewise.
15399 (__arm_vshllbq_m_n_s8): Likewise.
15400 (__arm_vshllbq_m_n_s16): Likewise.
15401 (__arm_vshllbq_m_n_u8): Likewise.
15402 (__arm_vshllbq_m_n_u16): Likewise.
15403 (__arm_vshlltq_m_n_s8): Likewise.
15404 (__arm_vshlltq_m_n_s16): Likewise.
15405 (__arm_vshlltq_m_n_u8): Likewise.
15406 (__arm_vshlltq_m_n_u16): Likewise.
15407 (__arm_vshrnbq_m_n_s32): Likewise.
15408 (__arm_vshrnbq_m_n_s16): Likewise.
15409 (__arm_vshrnbq_m_n_u32): Likewise.
15410 (__arm_vshrnbq_m_n_u16): Likewise.
15411 (__arm_vshrntq_m_n_s32): Likewise.
15412 (__arm_vshrntq_m_n_s16): Likewise.
15413 (__arm_vshrntq_m_n_u32): Likewise.
15414 (__arm_vshrntq_m_n_u16): Likewise.
15415 (vmullbq_poly_m): Define polymorphic variant.
15416 (vmulltq_poly_m): Likewise.
15417 (vshllbq_m): Likewise.
15418 (vshrntq_m_n): Likewise.
15419 (vshrnbq_m_n): Likewise.
15420 (vshlltq_m_n): Likewise.
15421 (vshllbq_m_n): Likewise.
15422 (vrshrntq_m_n): Likewise.
15423 (vrshrnbq_m_n): Likewise.
15424 (vqshruntq_m_n): Likewise.
15425 (vqshrunbq_m_n): Likewise.
15426 (vqdmullbq_m_n): Likewise.
15427 (vqdmullbq_m): Likewise.
15428 (vqdmulltq_m_n): Likewise.
15429 (vqdmulltq_m): Likewise.
15430 (vqrshrnbq_m_n): Likewise.
15431 (vqrshrntq_m_n): Likewise.
15432 (vqrshrunbq_m_n): Likewise.
15433 (vqrshruntq_m_n): Likewise.
15434 (vqshrnbq_m_n): Likewise.
15435 (vqshrntq_m_n): Likewise.
15436 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
15437 builtin qualifiers.
15438 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
15439 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
15440 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
15441 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
15442 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
15443 (VMLALDAVAXQ_P): Likewise.
15444 (VQRSHRNBQ_M_N): Likewise.
15445 (VQRSHRNTQ_M_N): Likewise.
15446 (VQSHRNBQ_M_N): Likewise.
15447 (VQSHRNTQ_M_N): Likewise.
15448 (VRSHRNBQ_M_N): Likewise.
15449 (VRSHRNTQ_M_N): Likewise.
15450 (VSHLLBQ_M_N): Likewise.
15451 (VSHLLTQ_M_N): Likewise.
15452 (VSHRNBQ_M_N): Likewise.
15453 (VSHRNTQ_M_N): Likewise.
15454 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
15455 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
15456 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
15457 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
15458 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
15459 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
15460 (mve_vrmlaldavhaq_p_sv4si): Likewise.
15461 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
15462 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
15463 (mve_vshllbq_m_n_<supf><mode>): Likewise.
15464 (mve_vshlltq_m_n_<supf><mode>): Likewise.
15465 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
15466 (mve_vshrntq_m_n_<supf><mode>): Likewise.
15467 (mve_vmlsldavaq_p_s<mode>): Likewise.
15468 (mve_vmlsldavaxq_p_s<mode>): Likewise.
15469 (mve_vmullbq_poly_m_p<mode>): Likewise.
15470 (mve_vmulltq_poly_m_p<mode>): Likewise.
15471 (mve_vqdmullbq_m_n_s<mode>): Likewise.
15472 (mve_vqdmullbq_m_s<mode>): Likewise.
15473 (mve_vqdmulltq_m_n_s<mode>): Likewise.
15474 (mve_vqdmulltq_m_s<mode>): Likewise.
15475 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
15476 (mve_vqrshruntq_m_n_s<mode>): Likewise.
15477 (mve_vqshrunbq_m_n_s<mode>): Likewise.
15478 (mve_vqshruntq_m_n_s<mode>): Likewise.
15479 (mve_vrmlaldavhaq_p_uv4si): Likewise.
15480 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
15481 (mve_vrmlsldavhaq_p_sv4si): Likewise.
15482 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
15484 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
15485 Mihail Ionescu <mihail.ionescu@arm.com>
15486 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15488 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
15489 (vabdq_m_s32): Likewise.
15490 (vabdq_m_s16): Likewise.
15491 (vabdq_m_u8): Likewise.
15492 (vabdq_m_u32): Likewise.
15493 (vabdq_m_u16): Likewise.
15494 (vaddq_m_n_s8): Likewise.
15495 (vaddq_m_n_s32): Likewise.
15496 (vaddq_m_n_s16): Likewise.
15497 (vaddq_m_n_u8): Likewise.
15498 (vaddq_m_n_u32): Likewise.
15499 (vaddq_m_n_u16): Likewise.
15500 (vaddq_m_s8): Likewise.
15501 (vaddq_m_s32): Likewise.
15502 (vaddq_m_s16): Likewise.
15503 (vaddq_m_u8): Likewise.
15504 (vaddq_m_u32): Likewise.
15505 (vaddq_m_u16): Likewise.
15506 (vandq_m_s8): Likewise.
15507 (vandq_m_s32): Likewise.
15508 (vandq_m_s16): Likewise.
15509 (vandq_m_u8): Likewise.
15510 (vandq_m_u32): Likewise.
15511 (vandq_m_u16): Likewise.
15512 (vbicq_m_s8): Likewise.
15513 (vbicq_m_s32): Likewise.
15514 (vbicq_m_s16): Likewise.
15515 (vbicq_m_u8): Likewise.
15516 (vbicq_m_u32): Likewise.
15517 (vbicq_m_u16): Likewise.
15518 (vbrsrq_m_n_s8): Likewise.
15519 (vbrsrq_m_n_s32): Likewise.
15520 (vbrsrq_m_n_s16): Likewise.
15521 (vbrsrq_m_n_u8): Likewise.
15522 (vbrsrq_m_n_u32): Likewise.
15523 (vbrsrq_m_n_u16): Likewise.
15524 (vcaddq_rot270_m_s8): Likewise.
15525 (vcaddq_rot270_m_s32): Likewise.
15526 (vcaddq_rot270_m_s16): Likewise.
15527 (vcaddq_rot270_m_u8): Likewise.
15528 (vcaddq_rot270_m_u32): Likewise.
15529 (vcaddq_rot270_m_u16): Likewise.
15530 (vcaddq_rot90_m_s8): Likewise.
15531 (vcaddq_rot90_m_s32): Likewise.
15532 (vcaddq_rot90_m_s16): Likewise.
15533 (vcaddq_rot90_m_u8): Likewise.
15534 (vcaddq_rot90_m_u32): Likewise.
15535 (vcaddq_rot90_m_u16): Likewise.
15536 (veorq_m_s8): Likewise.
15537 (veorq_m_s32): Likewise.
15538 (veorq_m_s16): Likewise.
15539 (veorq_m_u8): Likewise.
15540 (veorq_m_u32): Likewise.
15541 (veorq_m_u16): Likewise.
15542 (vhaddq_m_n_s8): Likewise.
15543 (vhaddq_m_n_s32): Likewise.
15544 (vhaddq_m_n_s16): Likewise.
15545 (vhaddq_m_n_u8): Likewise.
15546 (vhaddq_m_n_u32): Likewise.
15547 (vhaddq_m_n_u16): Likewise.
15548 (vhaddq_m_s8): Likewise.
15549 (vhaddq_m_s32): Likewise.
15550 (vhaddq_m_s16): Likewise.
15551 (vhaddq_m_u8): Likewise.
15552 (vhaddq_m_u32): Likewise.
15553 (vhaddq_m_u16): Likewise.
15554 (vhcaddq_rot270_m_s8): Likewise.
15555 (vhcaddq_rot270_m_s32): Likewise.
15556 (vhcaddq_rot270_m_s16): Likewise.
15557 (vhcaddq_rot90_m_s8): Likewise.
15558 (vhcaddq_rot90_m_s32): Likewise.
15559 (vhcaddq_rot90_m_s16): Likewise.
15560 (vhsubq_m_n_s8): Likewise.
15561 (vhsubq_m_n_s32): Likewise.
15562 (vhsubq_m_n_s16): Likewise.
15563 (vhsubq_m_n_u8): Likewise.
15564 (vhsubq_m_n_u32): Likewise.
15565 (vhsubq_m_n_u16): Likewise.
15566 (vhsubq_m_s8): Likewise.
15567 (vhsubq_m_s32): Likewise.
15568 (vhsubq_m_s16): Likewise.
15569 (vhsubq_m_u8): Likewise.
15570 (vhsubq_m_u32): Likewise.
15571 (vhsubq_m_u16): Likewise.
15572 (vmaxq_m_s8): Likewise.
15573 (vmaxq_m_s32): Likewise.
15574 (vmaxq_m_s16): Likewise.
15575 (vmaxq_m_u8): Likewise.
15576 (vmaxq_m_u32): Likewise.
15577 (vmaxq_m_u16): Likewise.
15578 (vminq_m_s8): Likewise.
15579 (vminq_m_s32): Likewise.
15580 (vminq_m_s16): Likewise.
15581 (vminq_m_u8): Likewise.
15582 (vminq_m_u32): Likewise.
15583 (vminq_m_u16): Likewise.
15584 (vmladavaq_p_s8): Likewise.
15585 (vmladavaq_p_s32): Likewise.
15586 (vmladavaq_p_s16): Likewise.
15587 (vmladavaq_p_u8): Likewise.
15588 (vmladavaq_p_u32): Likewise.
15589 (vmladavaq_p_u16): Likewise.
15590 (vmladavaxq_p_s8): Likewise.
15591 (vmladavaxq_p_s32): Likewise.
15592 (vmladavaxq_p_s16): Likewise.
15593 (vmlaq_m_n_s8): Likewise.
15594 (vmlaq_m_n_s32): Likewise.
15595 (vmlaq_m_n_s16): Likewise.
15596 (vmlaq_m_n_u8): Likewise.
15597 (vmlaq_m_n_u32): Likewise.
15598 (vmlaq_m_n_u16): Likewise.
15599 (vmlasq_m_n_s8): Likewise.
15600 (vmlasq_m_n_s32): Likewise.
15601 (vmlasq_m_n_s16): Likewise.
15602 (vmlasq_m_n_u8): Likewise.
15603 (vmlasq_m_n_u32): Likewise.
15604 (vmlasq_m_n_u16): Likewise.
15605 (vmlsdavaq_p_s8): Likewise.
15606 (vmlsdavaq_p_s32): Likewise.
15607 (vmlsdavaq_p_s16): Likewise.
15608 (vmlsdavaxq_p_s8): Likewise.
15609 (vmlsdavaxq_p_s32): Likewise.
15610 (vmlsdavaxq_p_s16): Likewise.
15611 (vmulhq_m_s8): Likewise.
15612 (vmulhq_m_s32): Likewise.
15613 (vmulhq_m_s16): Likewise.
15614 (vmulhq_m_u8): Likewise.
15615 (vmulhq_m_u32): Likewise.
15616 (vmulhq_m_u16): Likewise.
15617 (vmullbq_int_m_s8): Likewise.
15618 (vmullbq_int_m_s32): Likewise.
15619 (vmullbq_int_m_s16): Likewise.
15620 (vmullbq_int_m_u8): Likewise.
15621 (vmullbq_int_m_u32): Likewise.
15622 (vmullbq_int_m_u16): Likewise.
15623 (vmulltq_int_m_s8): Likewise.
15624 (vmulltq_int_m_s32): Likewise.
15625 (vmulltq_int_m_s16): Likewise.
15626 (vmulltq_int_m_u8): Likewise.
15627 (vmulltq_int_m_u32): Likewise.
15628 (vmulltq_int_m_u16): Likewise.
15629 (vmulq_m_n_s8): Likewise.
15630 (vmulq_m_n_s32): Likewise.
15631 (vmulq_m_n_s16): Likewise.
15632 (vmulq_m_n_u8): Likewise.
15633 (vmulq_m_n_u32): Likewise.
15634 (vmulq_m_n_u16): Likewise.
15635 (vmulq_m_s8): Likewise.
15636 (vmulq_m_s32): Likewise.
15637 (vmulq_m_s16): Likewise.
15638 (vmulq_m_u8): Likewise.
15639 (vmulq_m_u32): Likewise.
15640 (vmulq_m_u16): Likewise.
15641 (vornq_m_s8): Likewise.
15642 (vornq_m_s32): Likewise.
15643 (vornq_m_s16): Likewise.
15644 (vornq_m_u8): Likewise.
15645 (vornq_m_u32): Likewise.
15646 (vornq_m_u16): Likewise.
15647 (vorrq_m_s8): Likewise.
15648 (vorrq_m_s32): Likewise.
15649 (vorrq_m_s16): Likewise.
15650 (vorrq_m_u8): Likewise.
15651 (vorrq_m_u32): Likewise.
15652 (vorrq_m_u16): Likewise.
15653 (vqaddq_m_n_s8): Likewise.
15654 (vqaddq_m_n_s32): Likewise.
15655 (vqaddq_m_n_s16): Likewise.
15656 (vqaddq_m_n_u8): Likewise.
15657 (vqaddq_m_n_u32): Likewise.
15658 (vqaddq_m_n_u16): Likewise.
15659 (vqaddq_m_s8): Likewise.
15660 (vqaddq_m_s32): Likewise.
15661 (vqaddq_m_s16): Likewise.
15662 (vqaddq_m_u8): Likewise.
15663 (vqaddq_m_u32): Likewise.
15664 (vqaddq_m_u16): Likewise.
15665 (vqdmladhq_m_s8): Likewise.
15666 (vqdmladhq_m_s32): Likewise.
15667 (vqdmladhq_m_s16): Likewise.
15668 (vqdmladhxq_m_s8): Likewise.
15669 (vqdmladhxq_m_s32): Likewise.
15670 (vqdmladhxq_m_s16): Likewise.
15671 (vqdmlahq_m_n_s8): Likewise.
15672 (vqdmlahq_m_n_s32): Likewise.
15673 (vqdmlahq_m_n_s16): Likewise.
15674 (vqdmlahq_m_n_u8): Likewise.
15675 (vqdmlahq_m_n_u32): Likewise.
15676 (vqdmlahq_m_n_u16): Likewise.
15677 (vqdmlsdhq_m_s8): Likewise.
15678 (vqdmlsdhq_m_s32): Likewise.
15679 (vqdmlsdhq_m_s16): Likewise.
15680 (vqdmlsdhxq_m_s8): Likewise.
15681 (vqdmlsdhxq_m_s32): Likewise.
15682 (vqdmlsdhxq_m_s16): Likewise.
15683 (vqdmulhq_m_n_s8): Likewise.
15684 (vqdmulhq_m_n_s32): Likewise.
15685 (vqdmulhq_m_n_s16): Likewise.
15686 (vqdmulhq_m_s8): Likewise.
15687 (vqdmulhq_m_s32): Likewise.
15688 (vqdmulhq_m_s16): Likewise.
15689 (vqrdmladhq_m_s8): Likewise.
15690 (vqrdmladhq_m_s32): Likewise.
15691 (vqrdmladhq_m_s16): Likewise.
15692 (vqrdmladhxq_m_s8): Likewise.
15693 (vqrdmladhxq_m_s32): Likewise.
15694 (vqrdmladhxq_m_s16): Likewise.
15695 (vqrdmlahq_m_n_s8): Likewise.
15696 (vqrdmlahq_m_n_s32): Likewise.
15697 (vqrdmlahq_m_n_s16): Likewise.
15698 (vqrdmlahq_m_n_u8): Likewise.
15699 (vqrdmlahq_m_n_u32): Likewise.
15700 (vqrdmlahq_m_n_u16): Likewise.
15701 (vqrdmlashq_m_n_s8): Likewise.
15702 (vqrdmlashq_m_n_s32): Likewise.
15703 (vqrdmlashq_m_n_s16): Likewise.
15704 (vqrdmlashq_m_n_u8): Likewise.
15705 (vqrdmlashq_m_n_u32): Likewise.
15706 (vqrdmlashq_m_n_u16): Likewise.
15707 (vqrdmlsdhq_m_s8): Likewise.
15708 (vqrdmlsdhq_m_s32): Likewise.
15709 (vqrdmlsdhq_m_s16): Likewise.
15710 (vqrdmlsdhxq_m_s8): Likewise.
15711 (vqrdmlsdhxq_m_s32): Likewise.
15712 (vqrdmlsdhxq_m_s16): Likewise.
15713 (vqrdmulhq_m_n_s8): Likewise.
15714 (vqrdmulhq_m_n_s32): Likewise.
15715 (vqrdmulhq_m_n_s16): Likewise.
15716 (vqrdmulhq_m_s8): Likewise.
15717 (vqrdmulhq_m_s32): Likewise.
15718 (vqrdmulhq_m_s16): Likewise.
15719 (vqrshlq_m_s8): Likewise.
15720 (vqrshlq_m_s32): Likewise.
15721 (vqrshlq_m_s16): Likewise.
15722 (vqrshlq_m_u8): Likewise.
15723 (vqrshlq_m_u32): Likewise.
15724 (vqrshlq_m_u16): Likewise.
15725 (vqshlq_m_n_s8): Likewise.
15726 (vqshlq_m_n_s32): Likewise.
15727 (vqshlq_m_n_s16): Likewise.
15728 (vqshlq_m_n_u8): Likewise.
15729 (vqshlq_m_n_u32): Likewise.
15730 (vqshlq_m_n_u16): Likewise.
15731 (vqshlq_m_s8): Likewise.
15732 (vqshlq_m_s32): Likewise.
15733 (vqshlq_m_s16): Likewise.
15734 (vqshlq_m_u8): Likewise.
15735 (vqshlq_m_u32): Likewise.
15736 (vqshlq_m_u16): Likewise.
15737 (vqsubq_m_n_s8): Likewise.
15738 (vqsubq_m_n_s32): Likewise.
15739 (vqsubq_m_n_s16): Likewise.
15740 (vqsubq_m_n_u8): Likewise.
15741 (vqsubq_m_n_u32): Likewise.
15742 (vqsubq_m_n_u16): Likewise.
15743 (vqsubq_m_s8): Likewise.
15744 (vqsubq_m_s32): Likewise.
15745 (vqsubq_m_s16): Likewise.
15746 (vqsubq_m_u8): Likewise.
15747 (vqsubq_m_u32): Likewise.
15748 (vqsubq_m_u16): Likewise.
15749 (vrhaddq_m_s8): Likewise.
15750 (vrhaddq_m_s32): Likewise.
15751 (vrhaddq_m_s16): Likewise.
15752 (vrhaddq_m_u8): Likewise.
15753 (vrhaddq_m_u32): Likewise.
15754 (vrhaddq_m_u16): Likewise.
15755 (vrmulhq_m_s8): Likewise.
15756 (vrmulhq_m_s32): Likewise.
15757 (vrmulhq_m_s16): Likewise.
15758 (vrmulhq_m_u8): Likewise.
15759 (vrmulhq_m_u32): Likewise.
15760 (vrmulhq_m_u16): Likewise.
15761 (vrshlq_m_s8): Likewise.
15762 (vrshlq_m_s32): Likewise.
15763 (vrshlq_m_s16): Likewise.
15764 (vrshlq_m_u8): Likewise.
15765 (vrshlq_m_u32): Likewise.
15766 (vrshlq_m_u16): Likewise.
15767 (vrshrq_m_n_s8): Likewise.
15768 (vrshrq_m_n_s32): Likewise.
15769 (vrshrq_m_n_s16): Likewise.
15770 (vrshrq_m_n_u8): Likewise.
15771 (vrshrq_m_n_u32): Likewise.
15772 (vrshrq_m_n_u16): Likewise.
15773 (vshlq_m_n_s8): Likewise.
15774 (vshlq_m_n_s32): Likewise.
15775 (vshlq_m_n_s16): Likewise.
15776 (vshlq_m_n_u8): Likewise.
15777 (vshlq_m_n_u32): Likewise.
15778 (vshlq_m_n_u16): Likewise.
15779 (vshrq_m_n_s8): Likewise.
15780 (vshrq_m_n_s32): Likewise.
15781 (vshrq_m_n_s16): Likewise.
15782 (vshrq_m_n_u8): Likewise.
15783 (vshrq_m_n_u32): Likewise.
15784 (vshrq_m_n_u16): Likewise.
15785 (vsliq_m_n_s8): Likewise.
15786 (vsliq_m_n_s32): Likewise.
15787 (vsliq_m_n_s16): Likewise.
15788 (vsliq_m_n_u8): Likewise.
15789 (vsliq_m_n_u32): Likewise.
15790 (vsliq_m_n_u16): Likewise.
15791 (vsubq_m_n_s8): Likewise.
15792 (vsubq_m_n_s32): Likewise.
15793 (vsubq_m_n_s16): Likewise.
15794 (vsubq_m_n_u8): Likewise.
15795 (vsubq_m_n_u32): Likewise.
15796 (vsubq_m_n_u16): Likewise.
15797 (__arm_vabdq_m_s8): Define intrinsic.
15798 (__arm_vabdq_m_s32): Likewise.
15799 (__arm_vabdq_m_s16): Likewise.
15800 (__arm_vabdq_m_u8): Likewise.
15801 (__arm_vabdq_m_u32): Likewise.
15802 (__arm_vabdq_m_u16): Likewise.
15803 (__arm_vaddq_m_n_s8): Likewise.
15804 (__arm_vaddq_m_n_s32): Likewise.
15805 (__arm_vaddq_m_n_s16): Likewise.
15806 (__arm_vaddq_m_n_u8): Likewise.
15807 (__arm_vaddq_m_n_u32): Likewise.
15808 (__arm_vaddq_m_n_u16): Likewise.
15809 (__arm_vaddq_m_s8): Likewise.
15810 (__arm_vaddq_m_s32): Likewise.
15811 (__arm_vaddq_m_s16): Likewise.
15812 (__arm_vaddq_m_u8): Likewise.
15813 (__arm_vaddq_m_u32): Likewise.
15814 (__arm_vaddq_m_u16): Likewise.
15815 (__arm_vandq_m_s8): Likewise.
15816 (__arm_vandq_m_s32): Likewise.
15817 (__arm_vandq_m_s16): Likewise.
15818 (__arm_vandq_m_u8): Likewise.
15819 (__arm_vandq_m_u32): Likewise.
15820 (__arm_vandq_m_u16): Likewise.
15821 (__arm_vbicq_m_s8): Likewise.
15822 (__arm_vbicq_m_s32): Likewise.
15823 (__arm_vbicq_m_s16): Likewise.
15824 (__arm_vbicq_m_u8): Likewise.
15825 (__arm_vbicq_m_u32): Likewise.
15826 (__arm_vbicq_m_u16): Likewise.
15827 (__arm_vbrsrq_m_n_s8): Likewise.
15828 (__arm_vbrsrq_m_n_s32): Likewise.
15829 (__arm_vbrsrq_m_n_s16): Likewise.
15830 (__arm_vbrsrq_m_n_u8): Likewise.
15831 (__arm_vbrsrq_m_n_u32): Likewise.
15832 (__arm_vbrsrq_m_n_u16): Likewise.
15833 (__arm_vcaddq_rot270_m_s8): Likewise.
15834 (__arm_vcaddq_rot270_m_s32): Likewise.
15835 (__arm_vcaddq_rot270_m_s16): Likewise.
15836 (__arm_vcaddq_rot270_m_u8): Likewise.
15837 (__arm_vcaddq_rot270_m_u32): Likewise.
15838 (__arm_vcaddq_rot270_m_u16): Likewise.
15839 (__arm_vcaddq_rot90_m_s8): Likewise.
15840 (__arm_vcaddq_rot90_m_s32): Likewise.
15841 (__arm_vcaddq_rot90_m_s16): Likewise.
15842 (__arm_vcaddq_rot90_m_u8): Likewise.
15843 (__arm_vcaddq_rot90_m_u32): Likewise.
15844 (__arm_vcaddq_rot90_m_u16): Likewise.
15845 (__arm_veorq_m_s8): Likewise.
15846 (__arm_veorq_m_s32): Likewise.
15847 (__arm_veorq_m_s16): Likewise.
15848 (__arm_veorq_m_u8): Likewise.
15849 (__arm_veorq_m_u32): Likewise.
15850 (__arm_veorq_m_u16): Likewise.
15851 (__arm_vhaddq_m_n_s8): Likewise.
15852 (__arm_vhaddq_m_n_s32): Likewise.
15853 (__arm_vhaddq_m_n_s16): Likewise.
15854 (__arm_vhaddq_m_n_u8): Likewise.
15855 (__arm_vhaddq_m_n_u32): Likewise.
15856 (__arm_vhaddq_m_n_u16): Likewise.
15857 (__arm_vhaddq_m_s8): Likewise.
15858 (__arm_vhaddq_m_s32): Likewise.
15859 (__arm_vhaddq_m_s16): Likewise.
15860 (__arm_vhaddq_m_u8): Likewise.
15861 (__arm_vhaddq_m_u32): Likewise.
15862 (__arm_vhaddq_m_u16): Likewise.
15863 (__arm_vhcaddq_rot270_m_s8): Likewise.
15864 (__arm_vhcaddq_rot270_m_s32): Likewise.
15865 (__arm_vhcaddq_rot270_m_s16): Likewise.
15866 (__arm_vhcaddq_rot90_m_s8): Likewise.
15867 (__arm_vhcaddq_rot90_m_s32): Likewise.
15868 (__arm_vhcaddq_rot90_m_s16): Likewise.
15869 (__arm_vhsubq_m_n_s8): Likewise.
15870 (__arm_vhsubq_m_n_s32): Likewise.
15871 (__arm_vhsubq_m_n_s16): Likewise.
15872 (__arm_vhsubq_m_n_u8): Likewise.
15873 (__arm_vhsubq_m_n_u32): Likewise.
15874 (__arm_vhsubq_m_n_u16): Likewise.
15875 (__arm_vhsubq_m_s8): Likewise.
15876 (__arm_vhsubq_m_s32): Likewise.
15877 (__arm_vhsubq_m_s16): Likewise.
15878 (__arm_vhsubq_m_u8): Likewise.
15879 (__arm_vhsubq_m_u32): Likewise.
15880 (__arm_vhsubq_m_u16): Likewise.
15881 (__arm_vmaxq_m_s8): Likewise.
15882 (__arm_vmaxq_m_s32): Likewise.
15883 (__arm_vmaxq_m_s16): Likewise.
15884 (__arm_vmaxq_m_u8): Likewise.
15885 (__arm_vmaxq_m_u32): Likewise.
15886 (__arm_vmaxq_m_u16): Likewise.
15887 (__arm_vminq_m_s8): Likewise.
15888 (__arm_vminq_m_s32): Likewise.
15889 (__arm_vminq_m_s16): Likewise.
15890 (__arm_vminq_m_u8): Likewise.
15891 (__arm_vminq_m_u32): Likewise.
15892 (__arm_vminq_m_u16): Likewise.
15893 (__arm_vmladavaq_p_s8): Likewise.
15894 (__arm_vmladavaq_p_s32): Likewise.
15895 (__arm_vmladavaq_p_s16): Likewise.
15896 (__arm_vmladavaq_p_u8): Likewise.
15897 (__arm_vmladavaq_p_u32): Likewise.
15898 (__arm_vmladavaq_p_u16): Likewise.
15899 (__arm_vmladavaxq_p_s8): Likewise.
15900 (__arm_vmladavaxq_p_s32): Likewise.
15901 (__arm_vmladavaxq_p_s16): Likewise.
15902 (__arm_vmlaq_m_n_s8): Likewise.
15903 (__arm_vmlaq_m_n_s32): Likewise.
15904 (__arm_vmlaq_m_n_s16): Likewise.
15905 (__arm_vmlaq_m_n_u8): Likewise.
15906 (__arm_vmlaq_m_n_u32): Likewise.
15907 (__arm_vmlaq_m_n_u16): Likewise.
15908 (__arm_vmlasq_m_n_s8): Likewise.
15909 (__arm_vmlasq_m_n_s32): Likewise.
15910 (__arm_vmlasq_m_n_s16): Likewise.
15911 (__arm_vmlasq_m_n_u8): Likewise.
15912 (__arm_vmlasq_m_n_u32): Likewise.
15913 (__arm_vmlasq_m_n_u16): Likewise.
15914 (__arm_vmlsdavaq_p_s8): Likewise.
15915 (__arm_vmlsdavaq_p_s32): Likewise.
15916 (__arm_vmlsdavaq_p_s16): Likewise.
15917 (__arm_vmlsdavaxq_p_s8): Likewise.
15918 (__arm_vmlsdavaxq_p_s32): Likewise.
15919 (__arm_vmlsdavaxq_p_s16): Likewise.
15920 (__arm_vmulhq_m_s8): Likewise.
15921 (__arm_vmulhq_m_s32): Likewise.
15922 (__arm_vmulhq_m_s16): Likewise.
15923 (__arm_vmulhq_m_u8): Likewise.
15924 (__arm_vmulhq_m_u32): Likewise.
15925 (__arm_vmulhq_m_u16): Likewise.
15926 (__arm_vmullbq_int_m_s8): Likewise.
15927 (__arm_vmullbq_int_m_s32): Likewise.
15928 (__arm_vmullbq_int_m_s16): Likewise.
15929 (__arm_vmullbq_int_m_u8): Likewise.
15930 (__arm_vmullbq_int_m_u32): Likewise.
15931 (__arm_vmullbq_int_m_u16): Likewise.
15932 (__arm_vmulltq_int_m_s8): Likewise.
15933 (__arm_vmulltq_int_m_s32): Likewise.
15934 (__arm_vmulltq_int_m_s16): Likewise.
15935 (__arm_vmulltq_int_m_u8): Likewise.
15936 (__arm_vmulltq_int_m_u32): Likewise.
15937 (__arm_vmulltq_int_m_u16): Likewise.
15938 (__arm_vmulq_m_n_s8): Likewise.
15939 (__arm_vmulq_m_n_s32): Likewise.
15940 (__arm_vmulq_m_n_s16): Likewise.
15941 (__arm_vmulq_m_n_u8): Likewise.
15942 (__arm_vmulq_m_n_u32): Likewise.
15943 (__arm_vmulq_m_n_u16): Likewise.
15944 (__arm_vmulq_m_s8): Likewise.
15945 (__arm_vmulq_m_s32): Likewise.
15946 (__arm_vmulq_m_s16): Likewise.
15947 (__arm_vmulq_m_u8): Likewise.
15948 (__arm_vmulq_m_u32): Likewise.
15949 (__arm_vmulq_m_u16): Likewise.
15950 (__arm_vornq_m_s8): Likewise.
15951 (__arm_vornq_m_s32): Likewise.
15952 (__arm_vornq_m_s16): Likewise.
15953 (__arm_vornq_m_u8): Likewise.
15954 (__arm_vornq_m_u32): Likewise.
15955 (__arm_vornq_m_u16): Likewise.
15956 (__arm_vorrq_m_s8): Likewise.
15957 (__arm_vorrq_m_s32): Likewise.
15958 (__arm_vorrq_m_s16): Likewise.
15959 (__arm_vorrq_m_u8): Likewise.
15960 (__arm_vorrq_m_u32): Likewise.
15961 (__arm_vorrq_m_u16): Likewise.
15962 (__arm_vqaddq_m_n_s8): Likewise.
15963 (__arm_vqaddq_m_n_s32): Likewise.
15964 (__arm_vqaddq_m_n_s16): Likewise.
15965 (__arm_vqaddq_m_n_u8): Likewise.
15966 (__arm_vqaddq_m_n_u32): Likewise.
15967 (__arm_vqaddq_m_n_u16): Likewise.
15968 (__arm_vqaddq_m_s8): Likewise.
15969 (__arm_vqaddq_m_s32): Likewise.
15970 (__arm_vqaddq_m_s16): Likewise.
15971 (__arm_vqaddq_m_u8): Likewise.
15972 (__arm_vqaddq_m_u32): Likewise.
15973 (__arm_vqaddq_m_u16): Likewise.
15974 (__arm_vqdmladhq_m_s8): Likewise.
15975 (__arm_vqdmladhq_m_s32): Likewise.
15976 (__arm_vqdmladhq_m_s16): Likewise.
15977 (__arm_vqdmladhxq_m_s8): Likewise.
15978 (__arm_vqdmladhxq_m_s32): Likewise.
15979 (__arm_vqdmladhxq_m_s16): Likewise.
15980 (__arm_vqdmlahq_m_n_s8): Likewise.
15981 (__arm_vqdmlahq_m_n_s32): Likewise.
15982 (__arm_vqdmlahq_m_n_s16): Likewise.
15983 (__arm_vqdmlahq_m_n_u8): Likewise.
15984 (__arm_vqdmlahq_m_n_u32): Likewise.
15985 (__arm_vqdmlahq_m_n_u16): Likewise.
15986 (__arm_vqdmlsdhq_m_s8): Likewise.
15987 (__arm_vqdmlsdhq_m_s32): Likewise.
15988 (__arm_vqdmlsdhq_m_s16): Likewise.
15989 (__arm_vqdmlsdhxq_m_s8): Likewise.
15990 (__arm_vqdmlsdhxq_m_s32): Likewise.
15991 (__arm_vqdmlsdhxq_m_s16): Likewise.
15992 (__arm_vqdmulhq_m_n_s8): Likewise.
15993 (__arm_vqdmulhq_m_n_s32): Likewise.
15994 (__arm_vqdmulhq_m_n_s16): Likewise.
15995 (__arm_vqdmulhq_m_s8): Likewise.
15996 (__arm_vqdmulhq_m_s32): Likewise.
15997 (__arm_vqdmulhq_m_s16): Likewise.
15998 (__arm_vqrdmladhq_m_s8): Likewise.
15999 (__arm_vqrdmladhq_m_s32): Likewise.
16000 (__arm_vqrdmladhq_m_s16): Likewise.
16001 (__arm_vqrdmladhxq_m_s8): Likewise.
16002 (__arm_vqrdmladhxq_m_s32): Likewise.
16003 (__arm_vqrdmladhxq_m_s16): Likewise.
16004 (__arm_vqrdmlahq_m_n_s8): Likewise.
16005 (__arm_vqrdmlahq_m_n_s32): Likewise.
16006 (__arm_vqrdmlahq_m_n_s16): Likewise.
16007 (__arm_vqrdmlahq_m_n_u8): Likewise.
16008 (__arm_vqrdmlahq_m_n_u32): Likewise.
16009 (__arm_vqrdmlahq_m_n_u16): Likewise.
16010 (__arm_vqrdmlashq_m_n_s8): Likewise.
16011 (__arm_vqrdmlashq_m_n_s32): Likewise.
16012 (__arm_vqrdmlashq_m_n_s16): Likewise.
16013 (__arm_vqrdmlashq_m_n_u8): Likewise.
16014 (__arm_vqrdmlashq_m_n_u32): Likewise.
16015 (__arm_vqrdmlashq_m_n_u16): Likewise.
16016 (__arm_vqrdmlsdhq_m_s8): Likewise.
16017 (__arm_vqrdmlsdhq_m_s32): Likewise.
16018 (__arm_vqrdmlsdhq_m_s16): Likewise.
16019 (__arm_vqrdmlsdhxq_m_s8): Likewise.
16020 (__arm_vqrdmlsdhxq_m_s32): Likewise.
16021 (__arm_vqrdmlsdhxq_m_s16): Likewise.
16022 (__arm_vqrdmulhq_m_n_s8): Likewise.
16023 (__arm_vqrdmulhq_m_n_s32): Likewise.
16024 (__arm_vqrdmulhq_m_n_s16): Likewise.
16025 (__arm_vqrdmulhq_m_s8): Likewise.
16026 (__arm_vqrdmulhq_m_s32): Likewise.
16027 (__arm_vqrdmulhq_m_s16): Likewise.
16028 (__arm_vqrshlq_m_s8): Likewise.
16029 (__arm_vqrshlq_m_s32): Likewise.
16030 (__arm_vqrshlq_m_s16): Likewise.
16031 (__arm_vqrshlq_m_u8): Likewise.
16032 (__arm_vqrshlq_m_u32): Likewise.
16033 (__arm_vqrshlq_m_u16): Likewise.
16034 (__arm_vqshlq_m_n_s8): Likewise.
16035 (__arm_vqshlq_m_n_s32): Likewise.
16036 (__arm_vqshlq_m_n_s16): Likewise.
16037 (__arm_vqshlq_m_n_u8): Likewise.
16038 (__arm_vqshlq_m_n_u32): Likewise.
16039 (__arm_vqshlq_m_n_u16): Likewise.
16040 (__arm_vqshlq_m_s8): Likewise.
16041 (__arm_vqshlq_m_s32): Likewise.
16042 (__arm_vqshlq_m_s16): Likewise.
16043 (__arm_vqshlq_m_u8): Likewise.
16044 (__arm_vqshlq_m_u32): Likewise.
16045 (__arm_vqshlq_m_u16): Likewise.
16046 (__arm_vqsubq_m_n_s8): Likewise.
16047 (__arm_vqsubq_m_n_s32): Likewise.
16048 (__arm_vqsubq_m_n_s16): Likewise.
16049 (__arm_vqsubq_m_n_u8): Likewise.
16050 (__arm_vqsubq_m_n_u32): Likewise.
16051 (__arm_vqsubq_m_n_u16): Likewise.
16052 (__arm_vqsubq_m_s8): Likewise.
16053 (__arm_vqsubq_m_s32): Likewise.
16054 (__arm_vqsubq_m_s16): Likewise.
16055 (__arm_vqsubq_m_u8): Likewise.
16056 (__arm_vqsubq_m_u32): Likewise.
16057 (__arm_vqsubq_m_u16): Likewise.
16058 (__arm_vrhaddq_m_s8): Likewise.
16059 (__arm_vrhaddq_m_s32): Likewise.
16060 (__arm_vrhaddq_m_s16): Likewise.
16061 (__arm_vrhaddq_m_u8): Likewise.
16062 (__arm_vrhaddq_m_u32): Likewise.
16063 (__arm_vrhaddq_m_u16): Likewise.
16064 (__arm_vrmulhq_m_s8): Likewise.
16065 (__arm_vrmulhq_m_s32): Likewise.
16066 (__arm_vrmulhq_m_s16): Likewise.
16067 (__arm_vrmulhq_m_u8): Likewise.
16068 (__arm_vrmulhq_m_u32): Likewise.
16069 (__arm_vrmulhq_m_u16): Likewise.
16070 (__arm_vrshlq_m_s8): Likewise.
16071 (__arm_vrshlq_m_s32): Likewise.
16072 (__arm_vrshlq_m_s16): Likewise.
16073 (__arm_vrshlq_m_u8): Likewise.
16074 (__arm_vrshlq_m_u32): Likewise.
16075 (__arm_vrshlq_m_u16): Likewise.
16076 (__arm_vrshrq_m_n_s8): Likewise.
16077 (__arm_vrshrq_m_n_s32): Likewise.
16078 (__arm_vrshrq_m_n_s16): Likewise.
16079 (__arm_vrshrq_m_n_u8): Likewise.
16080 (__arm_vrshrq_m_n_u32): Likewise.
16081 (__arm_vrshrq_m_n_u16): Likewise.
16082 (__arm_vshlq_m_n_s8): Likewise.
16083 (__arm_vshlq_m_n_s32): Likewise.
16084 (__arm_vshlq_m_n_s16): Likewise.
16085 (__arm_vshlq_m_n_u8): Likewise.
16086 (__arm_vshlq_m_n_u32): Likewise.
16087 (__arm_vshlq_m_n_u16): Likewise.
16088 (__arm_vshrq_m_n_s8): Likewise.
16089 (__arm_vshrq_m_n_s32): Likewise.
16090 (__arm_vshrq_m_n_s16): Likewise.
16091 (__arm_vshrq_m_n_u8): Likewise.
16092 (__arm_vshrq_m_n_u32): Likewise.
16093 (__arm_vshrq_m_n_u16): Likewise.
16094 (__arm_vsliq_m_n_s8): Likewise.
16095 (__arm_vsliq_m_n_s32): Likewise.
16096 (__arm_vsliq_m_n_s16): Likewise.
16097 (__arm_vsliq_m_n_u8): Likewise.
16098 (__arm_vsliq_m_n_u32): Likewise.
16099 (__arm_vsliq_m_n_u16): Likewise.
16100 (__arm_vsubq_m_n_s8): Likewise.
16101 (__arm_vsubq_m_n_s32): Likewise.
16102 (__arm_vsubq_m_n_s16): Likewise.
16103 (__arm_vsubq_m_n_u8): Likewise.
16104 (__arm_vsubq_m_n_u32): Likewise.
16105 (__arm_vsubq_m_n_u16): Likewise.
16106 (vqdmladhq_m): Define polymorphic variant.
16107 (vqdmladhxq_m): Likewise.
16108 (vqdmlsdhq_m): Likewise.
16109 (vqdmlsdhxq_m): Likewise.
16110 (vabdq_m): Likewise.
16111 (vandq_m): Likewise.
16112 (vbicq_m): Likewise.
16113 (vbrsrq_m_n): Likewise.
16114 (vcaddq_rot270_m): Likewise.
16115 (vcaddq_rot90_m): Likewise.
16116 (veorq_m): Likewise.
16117 (vmaxq_m): Likewise.
16118 (vminq_m): Likewise.
16119 (vmladavaq_p): Likewise.
16120 (vmlaq_m_n): Likewise.
16121 (vmlasq_m_n): Likewise.
16122 (vmulhq_m): Likewise.
16123 (vmullbq_int_m): Likewise.
16124 (vmulltq_int_m): Likewise.
16125 (vornq_m): Likewise.
16126 (vorrq_m): Likewise.
16127 (vqdmlahq_m_n): Likewise.
16128 (vqrdmlahq_m_n): Likewise.
16129 (vqrdmlashq_m_n): Likewise.
16130 (vqrshlq_m): Likewise.
16131 (vqshlq_m_n): Likewise.
16132 (vqshlq_m): Likewise.
16133 (vrhaddq_m): Likewise.
16134 (vrmulhq_m): Likewise.
16135 (vrshlq_m): Likewise.
16136 (vrshrq_m_n): Likewise.
16137 (vshlq_m_n): Likewise.
16138 (vshrq_m_n): Likewise.
16139 (vsliq_m): Likewise.
16140 (vaddq_m_n): Likewise.
16141 (vaddq_m): Likewise.
16142 (vhaddq_m_n): Likewise.
16143 (vhaddq_m): Likewise.
16144 (vhcaddq_rot270_m): Likewise.
16145 (vhcaddq_rot90_m): Likewise.
16146 (vhsubq_m): Likewise.
16147 (vhsubq_m_n): Likewise.
16148 (vmulq_m_n): Likewise.
16149 (vmulq_m): Likewise.
16150 (vqaddq_m_n): Likewise.
16151 (vqaddq_m): Likewise.
16152 (vqdmulhq_m_n): Likewise.
16153 (vqdmulhq_m): Likewise.
16154 (vsubq_m_n): Likewise.
16155 (vsliq_m_n): Likewise.
16156 (vqsubq_m_n): Likewise.
16157 (vqsubq_m): Likewise.
16158 (vqrdmulhq_m): Likewise.
16159 (vqrdmulhq_m_n): Likewise.
16160 (vqrdmlsdhxq_m): Likewise.
16161 (vqrdmlsdhq_m): Likewise.
16162 (vqrdmladhq_m): Likewise.
16163 (vqrdmladhxq_m): Likewise.
16164 (vmlsdavaxq_p): Likewise.
16165 (vmlsdavaq_p): Likewise.
16166 (vmladavaxq_p): Likewise.
16167 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
16169 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
16170 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
16171 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
16172 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
16173 * config/arm/mve.md (VHSUBQ_M): Define iterators.
16174 (VSLIQ_M_N): Likewise.
16175 (VQRDMLAHQ_M_N): Likewise.
16176 (VRSHLQ_M): Likewise.
16177 (VMINQ_M): Likewise.
16178 (VMULLBQ_INT_M): Likewise.
16179 (VMULHQ_M): Likewise.
16180 (VMULQ_M): Likewise.
16181 (VHSUBQ_M_N): Likewise.
16182 (VHADDQ_M_N): Likewise.
16183 (VORRQ_M): Likewise.
16184 (VRMULHQ_M): Likewise.
16185 (VQADDQ_M): Likewise.
16186 (VRSHRQ_M_N): Likewise.
16187 (VQSUBQ_M_N): Likewise.
16188 (VADDQ_M): Likewise.
16189 (VORNQ_M): Likewise.
16190 (VQDMLAHQ_M_N): Likewise.
16191 (VRHADDQ_M): Likewise.
16192 (VQSHLQ_M): Likewise.
16193 (VANDQ_M): Likewise.
16194 (VBICQ_M): Likewise.
16195 (VSHLQ_M_N): Likewise.
16196 (VCADDQ_ROT270_M): Likewise.
16197 (VQRSHLQ_M): Likewise.
16198 (VQADDQ_M_N): Likewise.
16199 (VADDQ_M_N): Likewise.
16200 (VMAXQ_M): Likewise.
16201 (VQSUBQ_M): Likewise.
16202 (VMLASQ_M_N): Likewise.
16203 (VMLADAVAQ_P): Likewise.
16204 (VBRSRQ_M_N): Likewise.
16205 (VMULQ_M_N): Likewise.
16206 (VCADDQ_ROT90_M): Likewise.
16207 (VMULLTQ_INT_M): Likewise.
16208 (VEORQ_M): Likewise.
16209 (VSHRQ_M_N): Likewise.
16210 (VSUBQ_M_N): Likewise.
16211 (VHADDQ_M): Likewise.
16212 (VABDQ_M): Likewise.
16213 (VQRDMLASHQ_M_N): Likewise.
16214 (VMLAQ_M_N): Likewise.
16215 (VQSHLQ_M_N): Likewise.
16216 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
16217 (mve_vaddq_m_n_<supf><mode>): Likewise.
16218 (mve_vaddq_m_<supf><mode>): Likewise.
16219 (mve_vandq_m_<supf><mode>): Likewise.
16220 (mve_vbicq_m_<supf><mode>): Likewise.
16221 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
16222 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
16223 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
16224 (mve_veorq_m_<supf><mode>): Likewise.
16225 (mve_vhaddq_m_n_<supf><mode>): Likewise.
16226 (mve_vhaddq_m_<supf><mode>): Likewise.
16227 (mve_vhsubq_m_n_<supf><mode>): Likewise.
16228 (mve_vhsubq_m_<supf><mode>): Likewise.
16229 (mve_vmaxq_m_<supf><mode>): Likewise.
16230 (mve_vminq_m_<supf><mode>): Likewise.
16231 (mve_vmladavaq_p_<supf><mode>): Likewise.
16232 (mve_vmlaq_m_n_<supf><mode>): Likewise.
16233 (mve_vmlasq_m_n_<supf><mode>): Likewise.
16234 (mve_vmulhq_m_<supf><mode>): Likewise.
16235 (mve_vmullbq_int_m_<supf><mode>): Likewise.
16236 (mve_vmulltq_int_m_<supf><mode>): Likewise.
16237 (mve_vmulq_m_n_<supf><mode>): Likewise.
16238 (mve_vmulq_m_<supf><mode>): Likewise.
16239 (mve_vornq_m_<supf><mode>): Likewise.
16240 (mve_vorrq_m_<supf><mode>): Likewise.
16241 (mve_vqaddq_m_n_<supf><mode>): Likewise.
16242 (mve_vqaddq_m_<supf><mode>): Likewise.
16243 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
16244 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
16245 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
16246 (mve_vqrshlq_m_<supf><mode>): Likewise.
16247 (mve_vqshlq_m_n_<supf><mode>): Likewise.
16248 (mve_vqshlq_m_<supf><mode>): Likewise.
16249 (mve_vqsubq_m_n_<supf><mode>): Likewise.
16250 (mve_vqsubq_m_<supf><mode>): Likewise.
16251 (mve_vrhaddq_m_<supf><mode>): Likewise.
16252 (mve_vrmulhq_m_<supf><mode>): Likewise.
16253 (mve_vrshlq_m_<supf><mode>): Likewise.
16254 (mve_vrshrq_m_n_<supf><mode>): Likewise.
16255 (mve_vshlq_m_n_<supf><mode>): Likewise.
16256 (mve_vshrq_m_n_<supf><mode>): Likewise.
16257 (mve_vsliq_m_n_<supf><mode>): Likewise.
16258 (mve_vsubq_m_n_<supf><mode>): Likewise.
16259 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
16260 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
16261 (mve_vmladavaxq_p_s<mode>): Likewise.
16262 (mve_vmlsdavaq_p_s<mode>): Likewise.
16263 (mve_vmlsdavaxq_p_s<mode>): Likewise.
16264 (mve_vqdmladhq_m_s<mode>): Likewise.
16265 (mve_vqdmladhxq_m_s<mode>): Likewise.
16266 (mve_vqdmlsdhq_m_s<mode>): Likewise.
16267 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
16268 (mve_vqdmulhq_m_n_s<mode>): Likewise.
16269 (mve_vqdmulhq_m_s<mode>): Likewise.
16270 (mve_vqrdmladhq_m_s<mode>): Likewise.
16271 (mve_vqrdmladhxq_m_s<mode>): Likewise.
16272 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
16273 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
16274 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
16275 (mve_vqrdmulhq_m_s<mode>): Likewise.
16277 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16278 Mihail Ionescu <mihail.ionescu@arm.com>
16279 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16281 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
16282 Define builtin qualifier.
16283 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16284 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16285 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16286 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16287 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16288 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16289 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16290 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
16291 (vsubq_m_s8): Likewise.
16292 (vcvtq_m_n_f16_u16): Likewise.
16293 (vqshluq_m_n_s8): Likewise.
16294 (vabavq_p_s8): Likewise.
16295 (vsriq_m_n_u8): Likewise.
16296 (vshlq_m_u8): Likewise.
16297 (vsubq_m_u8): Likewise.
16298 (vabavq_p_u8): Likewise.
16299 (vshlq_m_s8): Likewise.
16300 (vcvtq_m_n_f16_s16): Likewise.
16301 (vsriq_m_n_s16): Likewise.
16302 (vsubq_m_s16): Likewise.
16303 (vcvtq_m_n_f32_u32): Likewise.
16304 (vqshluq_m_n_s16): Likewise.
16305 (vabavq_p_s16): Likewise.
16306 (vsriq_m_n_u16): Likewise.
16307 (vshlq_m_u16): Likewise.
16308 (vsubq_m_u16): Likewise.
16309 (vabavq_p_u16): Likewise.
16310 (vshlq_m_s16): Likewise.
16311 (vcvtq_m_n_f32_s32): Likewise.
16312 (vsriq_m_n_s32): Likewise.
16313 (vsubq_m_s32): Likewise.
16314 (vqshluq_m_n_s32): Likewise.
16315 (vabavq_p_s32): Likewise.
16316 (vsriq_m_n_u32): Likewise.
16317 (vshlq_m_u32): Likewise.
16318 (vsubq_m_u32): Likewise.
16319 (vabavq_p_u32): Likewise.
16320 (vshlq_m_s32): Likewise.
16321 (__arm_vsriq_m_n_s8): Define intrinsic.
16322 (__arm_vsubq_m_s8): Likewise.
16323 (__arm_vqshluq_m_n_s8): Likewise.
16324 (__arm_vabavq_p_s8): Likewise.
16325 (__arm_vsriq_m_n_u8): Likewise.
16326 (__arm_vshlq_m_u8): Likewise.
16327 (__arm_vsubq_m_u8): Likewise.
16328 (__arm_vabavq_p_u8): Likewise.
16329 (__arm_vshlq_m_s8): Likewise.
16330 (__arm_vsriq_m_n_s16): Likewise.
16331 (__arm_vsubq_m_s16): Likewise.
16332 (__arm_vqshluq_m_n_s16): Likewise.
16333 (__arm_vabavq_p_s16): Likewise.
16334 (__arm_vsriq_m_n_u16): Likewise.
16335 (__arm_vshlq_m_u16): Likewise.
16336 (__arm_vsubq_m_u16): Likewise.
16337 (__arm_vabavq_p_u16): Likewise.
16338 (__arm_vshlq_m_s16): Likewise.
16339 (__arm_vsriq_m_n_s32): Likewise.
16340 (__arm_vsubq_m_s32): Likewise.
16341 (__arm_vqshluq_m_n_s32): Likewise.
16342 (__arm_vabavq_p_s32): Likewise.
16343 (__arm_vsriq_m_n_u32): Likewise.
16344 (__arm_vshlq_m_u32): Likewise.
16345 (__arm_vsubq_m_u32): Likewise.
16346 (__arm_vabavq_p_u32): Likewise.
16347 (__arm_vshlq_m_s32): Likewise.
16348 (__arm_vcvtq_m_n_f16_u16): Likewise.
16349 (__arm_vcvtq_m_n_f16_s16): Likewise.
16350 (__arm_vcvtq_m_n_f32_u32): Likewise.
16351 (__arm_vcvtq_m_n_f32_s32): Likewise.
16352 (vcvtq_m_n): Define polymorphic variant.
16353 (vqshluq_m_n): Likewise.
16354 (vshlq_m): Likewise.
16355 (vsriq_m_n): Likewise.
16356 (vsubq_m): Likewise.
16357 (vabavq_p): Likewise.
16358 * config/arm/arm_mve_builtins.def
16359 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
16360 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
16361 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16362 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16363 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
16364 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16365 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
16366 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
16367 * config/arm/mve.md (VABAVQ_P): Define iterator.
16368 (VSHLQ_M): Likewise.
16369 (VSRIQ_M_N): Likewise.
16370 (VSUBQ_M): Likewise.
16371 (VCVTQ_M_N_TO_F): Likewise.
16372 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
16373 (mve_vqshluq_m_n_s<mode>): Likewise.
16374 (mve_vshlq_m_<supf><mode>): Likewise.
16375 (mve_vsriq_m_n_<supf><mode>): Likewise.
16376 (mve_vsubq_m_<supf><mode>): Likewise.
16377 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
16379 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
16380 Mihail Ionescu <mihail.ionescu@arm.com>
16381 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16383 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
16384 (vrmlsldavhaq_s32): Likewise.
16385 (vrmlsldavhaxq_s32): Likewise.
16386 (vaddlvaq_p_s32): Likewise.
16387 (vcvtbq_m_f16_f32): Likewise.
16388 (vcvtbq_m_f32_f16): Likewise.
16389 (vcvttq_m_f16_f32): Likewise.
16390 (vcvttq_m_f32_f16): Likewise.
16391 (vrev16q_m_s8): Likewise.
16392 (vrev32q_m_f16): Likewise.
16393 (vrmlaldavhq_p_s32): Likewise.
16394 (vrmlaldavhxq_p_s32): Likewise.
16395 (vrmlsldavhq_p_s32): Likewise.
16396 (vrmlsldavhxq_p_s32): Likewise.
16397 (vaddlvaq_p_u32): Likewise.
16398 (vrev16q_m_u8): Likewise.
16399 (vrmlaldavhq_p_u32): Likewise.
16400 (vmvnq_m_n_s16): Likewise.
16401 (vorrq_m_n_s16): Likewise.
16402 (vqrshrntq_n_s16): Likewise.
16403 (vqshrnbq_n_s16): Likewise.
16404 (vqshrntq_n_s16): Likewise.
16405 (vrshrnbq_n_s16): Likewise.
16406 (vrshrntq_n_s16): Likewise.
16407 (vshrnbq_n_s16): Likewise.
16408 (vshrntq_n_s16): Likewise.
16409 (vcmlaq_f16): Likewise.
16410 (vcmlaq_rot180_f16): Likewise.
16411 (vcmlaq_rot270_f16): Likewise.
16412 (vcmlaq_rot90_f16): Likewise.
16413 (vfmaq_f16): Likewise.
16414 (vfmaq_n_f16): Likewise.
16415 (vfmasq_n_f16): Likewise.
16416 (vfmsq_f16): Likewise.
16417 (vmlaldavaq_s16): Likewise.
16418 (vmlaldavaxq_s16): Likewise.
16419 (vmlsldavaq_s16): Likewise.
16420 (vmlsldavaxq_s16): Likewise.
16421 (vabsq_m_f16): Likewise.
16422 (vcvtmq_m_s16_f16): Likewise.
16423 (vcvtnq_m_s16_f16): Likewise.
16424 (vcvtpq_m_s16_f16): Likewise.
16425 (vcvtq_m_s16_f16): Likewise.
16426 (vdupq_m_n_f16): Likewise.
16427 (vmaxnmaq_m_f16): Likewise.
16428 (vmaxnmavq_p_f16): Likewise.
16429 (vmaxnmvq_p_f16): Likewise.
16430 (vminnmaq_m_f16): Likewise.
16431 (vminnmavq_p_f16): Likewise.
16432 (vminnmvq_p_f16): Likewise.
16433 (vmlaldavq_p_s16): Likewise.
16434 (vmlaldavxq_p_s16): Likewise.
16435 (vmlsldavq_p_s16): Likewise.
16436 (vmlsldavxq_p_s16): Likewise.
16437 (vmovlbq_m_s8): Likewise.
16438 (vmovltq_m_s8): Likewise.
16439 (vmovnbq_m_s16): Likewise.
16440 (vmovntq_m_s16): Likewise.
16441 (vnegq_m_f16): Likewise.
16442 (vpselq_f16): Likewise.
16443 (vqmovnbq_m_s16): Likewise.
16444 (vqmovntq_m_s16): Likewise.
16445 (vrev32q_m_s8): Likewise.
16446 (vrev64q_m_f16): Likewise.
16447 (vrndaq_m_f16): Likewise.
16448 (vrndmq_m_f16): Likewise.
16449 (vrndnq_m_f16): Likewise.
16450 (vrndpq_m_f16): Likewise.
16451 (vrndq_m_f16): Likewise.
16452 (vrndxq_m_f16): Likewise.
16453 (vcmpeqq_m_n_f16): Likewise.
16454 (vcmpgeq_m_f16): Likewise.
16455 (vcmpgeq_m_n_f16): Likewise.
16456 (vcmpgtq_m_f16): Likewise.
16457 (vcmpgtq_m_n_f16): Likewise.
16458 (vcmpleq_m_f16): Likewise.
16459 (vcmpleq_m_n_f16): Likewise.
16460 (vcmpltq_m_f16): Likewise.
16461 (vcmpltq_m_n_f16): Likewise.
16462 (vcmpneq_m_f16): Likewise.
16463 (vcmpneq_m_n_f16): Likewise.
16464 (vmvnq_m_n_u16): Likewise.
16465 (vorrq_m_n_u16): Likewise.
16466 (vqrshruntq_n_s16): Likewise.
16467 (vqshrunbq_n_s16): Likewise.
16468 (vqshruntq_n_s16): Likewise.
16469 (vcvtmq_m_u16_f16): Likewise.
16470 (vcvtnq_m_u16_f16): Likewise.
16471 (vcvtpq_m_u16_f16): Likewise.
16472 (vcvtq_m_u16_f16): Likewise.
16473 (vqmovunbq_m_s16): Likewise.
16474 (vqmovuntq_m_s16): Likewise.
16475 (vqrshrntq_n_u16): Likewise.
16476 (vqshrnbq_n_u16): Likewise.
16477 (vqshrntq_n_u16): Likewise.
16478 (vrshrnbq_n_u16): Likewise.
16479 (vrshrntq_n_u16): Likewise.
16480 (vshrnbq_n_u16): Likewise.
16481 (vshrntq_n_u16): Likewise.
16482 (vmlaldavaq_u16): Likewise.
16483 (vmlaldavaxq_u16): Likewise.
16484 (vmlaldavq_p_u16): Likewise.
16485 (vmlaldavxq_p_u16): Likewise.
16486 (vmovlbq_m_u8): Likewise.
16487 (vmovltq_m_u8): Likewise.
16488 (vmovnbq_m_u16): Likewise.
16489 (vmovntq_m_u16): Likewise.
16490 (vqmovnbq_m_u16): Likewise.
16491 (vqmovntq_m_u16): Likewise.
16492 (vrev32q_m_u8): Likewise.
16493 (vmvnq_m_n_s32): Likewise.
16494 (vorrq_m_n_s32): Likewise.
16495 (vqrshrntq_n_s32): Likewise.
16496 (vqshrnbq_n_s32): Likewise.
16497 (vqshrntq_n_s32): Likewise.
16498 (vrshrnbq_n_s32): Likewise.
16499 (vrshrntq_n_s32): Likewise.
16500 (vshrnbq_n_s32): Likewise.
16501 (vshrntq_n_s32): Likewise.
16502 (vcmlaq_f32): Likewise.
16503 (vcmlaq_rot180_f32): Likewise.
16504 (vcmlaq_rot270_f32): Likewise.
16505 (vcmlaq_rot90_f32): Likewise.
16506 (vfmaq_f32): Likewise.
16507 (vfmaq_n_f32): Likewise.
16508 (vfmasq_n_f32): Likewise.
16509 (vfmsq_f32): Likewise.
16510 (vmlaldavaq_s32): Likewise.
16511 (vmlaldavaxq_s32): Likewise.
16512 (vmlsldavaq_s32): Likewise.
16513 (vmlsldavaxq_s32): Likewise.
16514 (vabsq_m_f32): Likewise.
16515 (vcvtmq_m_s32_f32): Likewise.
16516 (vcvtnq_m_s32_f32): Likewise.
16517 (vcvtpq_m_s32_f32): Likewise.
16518 (vcvtq_m_s32_f32): Likewise.
16519 (vdupq_m_n_f32): Likewise.
16520 (vmaxnmaq_m_f32): Likewise.
16521 (vmaxnmavq_p_f32): Likewise.
16522 (vmaxnmvq_p_f32): Likewise.
16523 (vminnmaq_m_f32): Likewise.
16524 (vminnmavq_p_f32): Likewise.
16525 (vminnmvq_p_f32): Likewise.
16526 (vmlaldavq_p_s32): Likewise.
16527 (vmlaldavxq_p_s32): Likewise.
16528 (vmlsldavq_p_s32): Likewise.
16529 (vmlsldavxq_p_s32): Likewise.
16530 (vmovlbq_m_s16): Likewise.
16531 (vmovltq_m_s16): Likewise.
16532 (vmovnbq_m_s32): Likewise.
16533 (vmovntq_m_s32): Likewise.
16534 (vnegq_m_f32): Likewise.
16535 (vpselq_f32): Likewise.
16536 (vqmovnbq_m_s32): Likewise.
16537 (vqmovntq_m_s32): Likewise.
16538 (vrev32q_m_s16): Likewise.
16539 (vrev64q_m_f32): Likewise.
16540 (vrndaq_m_f32): Likewise.
16541 (vrndmq_m_f32): Likewise.
16542 (vrndnq_m_f32): Likewise.
16543 (vrndpq_m_f32): Likewise.
16544 (vrndq_m_f32): Likewise.
16545 (vrndxq_m_f32): Likewise.
16546 (vcmpeqq_m_n_f32): Likewise.
16547 (vcmpgeq_m_f32): Likewise.
16548 (vcmpgeq_m_n_f32): Likewise.
16549 (vcmpgtq_m_f32): Likewise.
16550 (vcmpgtq_m_n_f32): Likewise.
16551 (vcmpleq_m_f32): Likewise.
16552 (vcmpleq_m_n_f32): Likewise.
16553 (vcmpltq_m_f32): Likewise.
16554 (vcmpltq_m_n_f32): Likewise.
16555 (vcmpneq_m_f32): Likewise.
16556 (vcmpneq_m_n_f32): Likewise.
16557 (vmvnq_m_n_u32): Likewise.
16558 (vorrq_m_n_u32): Likewise.
16559 (vqrshruntq_n_s32): Likewise.
16560 (vqshrunbq_n_s32): Likewise.
16561 (vqshruntq_n_s32): Likewise.
16562 (vcvtmq_m_u32_f32): Likewise.
16563 (vcvtnq_m_u32_f32): Likewise.
16564 (vcvtpq_m_u32_f32): Likewise.
16565 (vcvtq_m_u32_f32): Likewise.
16566 (vqmovunbq_m_s32): Likewise.
16567 (vqmovuntq_m_s32): Likewise.
16568 (vqrshrntq_n_u32): Likewise.
16569 (vqshrnbq_n_u32): Likewise.
16570 (vqshrntq_n_u32): Likewise.
16571 (vrshrnbq_n_u32): Likewise.
16572 (vrshrntq_n_u32): Likewise.
16573 (vshrnbq_n_u32): Likewise.
16574 (vshrntq_n_u32): Likewise.
16575 (vmlaldavaq_u32): Likewise.
16576 (vmlaldavaxq_u32): Likewise.
16577 (vmlaldavq_p_u32): Likewise.
16578 (vmlaldavxq_p_u32): Likewise.
16579 (vmovlbq_m_u16): Likewise.
16580 (vmovltq_m_u16): Likewise.
16581 (vmovnbq_m_u32): Likewise.
16582 (vmovntq_m_u32): Likewise.
16583 (vqmovnbq_m_u32): Likewise.
16584 (vqmovntq_m_u32): Likewise.
16585 (vrev32q_m_u16): Likewise.
16586 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
16587 (__arm_vrmlsldavhaq_s32): Likewise.
16588 (__arm_vrmlsldavhaxq_s32): Likewise.
16589 (__arm_vaddlvaq_p_s32): Likewise.
16590 (__arm_vrev16q_m_s8): Likewise.
16591 (__arm_vrmlaldavhq_p_s32): Likewise.
16592 (__arm_vrmlaldavhxq_p_s32): Likewise.
16593 (__arm_vrmlsldavhq_p_s32): Likewise.
16594 (__arm_vrmlsldavhxq_p_s32): Likewise.
16595 (__arm_vaddlvaq_p_u32): Likewise.
16596 (__arm_vrev16q_m_u8): Likewise.
16597 (__arm_vrmlaldavhq_p_u32): Likewise.
16598 (__arm_vmvnq_m_n_s16): Likewise.
16599 (__arm_vorrq_m_n_s16): Likewise.
16600 (__arm_vqrshrntq_n_s16): Likewise.
16601 (__arm_vqshrnbq_n_s16): Likewise.
16602 (__arm_vqshrntq_n_s16): Likewise.
16603 (__arm_vrshrnbq_n_s16): Likewise.
16604 (__arm_vrshrntq_n_s16): Likewise.
16605 (__arm_vshrnbq_n_s16): Likewise.
16606 (__arm_vshrntq_n_s16): Likewise.
16607 (__arm_vmlaldavaq_s16): Likewise.
16608 (__arm_vmlaldavaxq_s16): Likewise.
16609 (__arm_vmlsldavaq_s16): Likewise.
16610 (__arm_vmlsldavaxq_s16): Likewise.
16611 (__arm_vmlaldavq_p_s16): Likewise.
16612 (__arm_vmlaldavxq_p_s16): Likewise.
16613 (__arm_vmlsldavq_p_s16): Likewise.
16614 (__arm_vmlsldavxq_p_s16): Likewise.
16615 (__arm_vmovlbq_m_s8): Likewise.
16616 (__arm_vmovltq_m_s8): Likewise.
16617 (__arm_vmovnbq_m_s16): Likewise.
16618 (__arm_vmovntq_m_s16): Likewise.
16619 (__arm_vqmovnbq_m_s16): Likewise.
16620 (__arm_vqmovntq_m_s16): Likewise.
16621 (__arm_vrev32q_m_s8): Likewise.
16622 (__arm_vmvnq_m_n_u16): Likewise.
16623 (__arm_vorrq_m_n_u16): Likewise.
16624 (__arm_vqrshruntq_n_s16): Likewise.
16625 (__arm_vqshrunbq_n_s16): Likewise.
16626 (__arm_vqshruntq_n_s16): Likewise.
16627 (__arm_vqmovunbq_m_s16): Likewise.
16628 (__arm_vqmovuntq_m_s16): Likewise.
16629 (__arm_vqrshrntq_n_u16): Likewise.
16630 (__arm_vqshrnbq_n_u16): Likewise.
16631 (__arm_vqshrntq_n_u16): Likewise.
16632 (__arm_vrshrnbq_n_u16): Likewise.
16633 (__arm_vrshrntq_n_u16): Likewise.
16634 (__arm_vshrnbq_n_u16): Likewise.
16635 (__arm_vshrntq_n_u16): Likewise.
16636 (__arm_vmlaldavaq_u16): Likewise.
16637 (__arm_vmlaldavaxq_u16): Likewise.
16638 (__arm_vmlaldavq_p_u16): Likewise.
16639 (__arm_vmlaldavxq_p_u16): Likewise.
16640 (__arm_vmovlbq_m_u8): Likewise.
16641 (__arm_vmovltq_m_u8): Likewise.
16642 (__arm_vmovnbq_m_u16): Likewise.
16643 (__arm_vmovntq_m_u16): Likewise.
16644 (__arm_vqmovnbq_m_u16): Likewise.
16645 (__arm_vqmovntq_m_u16): Likewise.
16646 (__arm_vrev32q_m_u8): Likewise.
16647 (__arm_vmvnq_m_n_s32): Likewise.
16648 (__arm_vorrq_m_n_s32): Likewise.
16649 (__arm_vqrshrntq_n_s32): Likewise.
16650 (__arm_vqshrnbq_n_s32): Likewise.
16651 (__arm_vqshrntq_n_s32): Likewise.
16652 (__arm_vrshrnbq_n_s32): Likewise.
16653 (__arm_vrshrntq_n_s32): Likewise.
16654 (__arm_vshrnbq_n_s32): Likewise.
16655 (__arm_vshrntq_n_s32): Likewise.
16656 (__arm_vmlaldavaq_s32): Likewise.
16657 (__arm_vmlaldavaxq_s32): Likewise.
16658 (__arm_vmlsldavaq_s32): Likewise.
16659 (__arm_vmlsldavaxq_s32): Likewise.
16660 (__arm_vmlaldavq_p_s32): Likewise.
16661 (__arm_vmlaldavxq_p_s32): Likewise.
16662 (__arm_vmlsldavq_p_s32): Likewise.
16663 (__arm_vmlsldavxq_p_s32): Likewise.
16664 (__arm_vmovlbq_m_s16): Likewise.
16665 (__arm_vmovltq_m_s16): Likewise.
16666 (__arm_vmovnbq_m_s32): Likewise.
16667 (__arm_vmovntq_m_s32): Likewise.
16668 (__arm_vqmovnbq_m_s32): Likewise.
16669 (__arm_vqmovntq_m_s32): Likewise.
16670 (__arm_vrev32q_m_s16): Likewise.
16671 (__arm_vmvnq_m_n_u32): Likewise.
16672 (__arm_vorrq_m_n_u32): Likewise.
16673 (__arm_vqrshruntq_n_s32): Likewise.
16674 (__arm_vqshrunbq_n_s32): Likewise.
16675 (__arm_vqshruntq_n_s32): Likewise.
16676 (__arm_vqmovunbq_m_s32): Likewise.
16677 (__arm_vqmovuntq_m_s32): Likewise.
16678 (__arm_vqrshrntq_n_u32): Likewise.
16679 (__arm_vqshrnbq_n_u32): Likewise.
16680 (__arm_vqshrntq_n_u32): Likewise.
16681 (__arm_vrshrnbq_n_u32): Likewise.
16682 (__arm_vrshrntq_n_u32): Likewise.
16683 (__arm_vshrnbq_n_u32): Likewise.
16684 (__arm_vshrntq_n_u32): Likewise.
16685 (__arm_vmlaldavaq_u32): Likewise.
16686 (__arm_vmlaldavaxq_u32): Likewise.
16687 (__arm_vmlaldavq_p_u32): Likewise.
16688 (__arm_vmlaldavxq_p_u32): Likewise.
16689 (__arm_vmovlbq_m_u16): Likewise.
16690 (__arm_vmovltq_m_u16): Likewise.
16691 (__arm_vmovnbq_m_u32): Likewise.
16692 (__arm_vmovntq_m_u32): Likewise.
16693 (__arm_vqmovnbq_m_u32): Likewise.
16694 (__arm_vqmovntq_m_u32): Likewise.
16695 (__arm_vrev32q_m_u16): Likewise.
16696 (__arm_vcvtbq_m_f16_f32): Likewise.
16697 (__arm_vcvtbq_m_f32_f16): Likewise.
16698 (__arm_vcvttq_m_f16_f32): Likewise.
16699 (__arm_vcvttq_m_f32_f16): Likewise.
16700 (__arm_vrev32q_m_f16): Likewise.
16701 (__arm_vcmlaq_f16): Likewise.
16702 (__arm_vcmlaq_rot180_f16): Likewise.
16703 (__arm_vcmlaq_rot270_f16): Likewise.
16704 (__arm_vcmlaq_rot90_f16): Likewise.
16705 (__arm_vfmaq_f16): Likewise.
16706 (__arm_vfmaq_n_f16): Likewise.
16707 (__arm_vfmasq_n_f16): Likewise.
16708 (__arm_vfmsq_f16): Likewise.
16709 (__arm_vabsq_m_f16): Likewise.
16710 (__arm_vcvtmq_m_s16_f16): Likewise.
16711 (__arm_vcvtnq_m_s16_f16): Likewise.
16712 (__arm_vcvtpq_m_s16_f16): Likewise.
16713 (__arm_vcvtq_m_s16_f16): Likewise.
16714 (__arm_vdupq_m_n_f16): Likewise.
16715 (__arm_vmaxnmaq_m_f16): Likewise.
16716 (__arm_vmaxnmavq_p_f16): Likewise.
16717 (__arm_vmaxnmvq_p_f16): Likewise.
16718 (__arm_vminnmaq_m_f16): Likewise.
16719 (__arm_vminnmavq_p_f16): Likewise.
16720 (__arm_vminnmvq_p_f16): Likewise.
16721 (__arm_vnegq_m_f16): Likewise.
16722 (__arm_vpselq_f16): Likewise.
16723 (__arm_vrev64q_m_f16): Likewise.
16724 (__arm_vrndaq_m_f16): Likewise.
16725 (__arm_vrndmq_m_f16): Likewise.
16726 (__arm_vrndnq_m_f16): Likewise.
16727 (__arm_vrndpq_m_f16): Likewise.
16728 (__arm_vrndq_m_f16): Likewise.
16729 (__arm_vrndxq_m_f16): Likewise.
16730 (__arm_vcmpeqq_m_n_f16): Likewise.
16731 (__arm_vcmpgeq_m_f16): Likewise.
16732 (__arm_vcmpgeq_m_n_f16): Likewise.
16733 (__arm_vcmpgtq_m_f16): Likewise.
16734 (__arm_vcmpgtq_m_n_f16): Likewise.
16735 (__arm_vcmpleq_m_f16): Likewise.
16736 (__arm_vcmpleq_m_n_f16): Likewise.
16737 (__arm_vcmpltq_m_f16): Likewise.
16738 (__arm_vcmpltq_m_n_f16): Likewise.
16739 (__arm_vcmpneq_m_f16): Likewise.
16740 (__arm_vcmpneq_m_n_f16): Likewise.
16741 (__arm_vcvtmq_m_u16_f16): Likewise.
16742 (__arm_vcvtnq_m_u16_f16): Likewise.
16743 (__arm_vcvtpq_m_u16_f16): Likewise.
16744 (__arm_vcvtq_m_u16_f16): Likewise.
16745 (__arm_vcmlaq_f32): Likewise.
16746 (__arm_vcmlaq_rot180_f32): Likewise.
16747 (__arm_vcmlaq_rot270_f32): Likewise.
16748 (__arm_vcmlaq_rot90_f32): Likewise.
16749 (__arm_vfmaq_f32): Likewise.
16750 (__arm_vfmaq_n_f32): Likewise.
16751 (__arm_vfmasq_n_f32): Likewise.
16752 (__arm_vfmsq_f32): Likewise.
16753 (__arm_vabsq_m_f32): Likewise.
16754 (__arm_vcvtmq_m_s32_f32): Likewise.
16755 (__arm_vcvtnq_m_s32_f32): Likewise.
16756 (__arm_vcvtpq_m_s32_f32): Likewise.
16757 (__arm_vcvtq_m_s32_f32): Likewise.
16758 (__arm_vdupq_m_n_f32): Likewise.
16759 (__arm_vmaxnmaq_m_f32): Likewise.
16760 (__arm_vmaxnmavq_p_f32): Likewise.
16761 (__arm_vmaxnmvq_p_f32): Likewise.
16762 (__arm_vminnmaq_m_f32): Likewise.
16763 (__arm_vminnmavq_p_f32): Likewise.
16764 (__arm_vminnmvq_p_f32): Likewise.
16765 (__arm_vnegq_m_f32): Likewise.
16766 (__arm_vpselq_f32): Likewise.
16767 (__arm_vrev64q_m_f32): Likewise.
16768 (__arm_vrndaq_m_f32): Likewise.
16769 (__arm_vrndmq_m_f32): Likewise.
16770 (__arm_vrndnq_m_f32): Likewise.
16771 (__arm_vrndpq_m_f32): Likewise.
16772 (__arm_vrndq_m_f32): Likewise.
16773 (__arm_vrndxq_m_f32): Likewise.
16774 (__arm_vcmpeqq_m_n_f32): Likewise.
16775 (__arm_vcmpgeq_m_f32): Likewise.
16776 (__arm_vcmpgeq_m_n_f32): Likewise.
16777 (__arm_vcmpgtq_m_f32): Likewise.
16778 (__arm_vcmpgtq_m_n_f32): Likewise.
16779 (__arm_vcmpleq_m_f32): Likewise.
16780 (__arm_vcmpleq_m_n_f32): Likewise.
16781 (__arm_vcmpltq_m_f32): Likewise.
16782 (__arm_vcmpltq_m_n_f32): Likewise.
16783 (__arm_vcmpneq_m_f32): Likewise.
16784 (__arm_vcmpneq_m_n_f32): Likewise.
16785 (__arm_vcvtmq_m_u32_f32): Likewise.
16786 (__arm_vcvtnq_m_u32_f32): Likewise.
16787 (__arm_vcvtpq_m_u32_f32): Likewise.
16788 (__arm_vcvtq_m_u32_f32): Likewise.
16789 (vcvtq_m): Define polymorphic variant.
16790 (vabsq_m): Likewise.
16791 (vcmlaq): Likewise.
16792 (vcmlaq_rot180): Likewise.
16793 (vcmlaq_rot270): Likewise.
16794 (vcmlaq_rot90): Likewise.
16795 (vcmpeqq_m_n): Likewise.
16796 (vcmpgeq_m_n): Likewise.
16797 (vrndxq_m): Likewise.
16798 (vrndq_m): Likewise.
16799 (vrndpq_m): Likewise.
16800 (vcmpgtq_m_n): Likewise.
16801 (vcmpgtq_m): Likewise.
16802 (vcmpleq_m): Likewise.
16803 (vcmpleq_m_n): Likewise.
16804 (vcmpltq_m_n): Likewise.
16805 (vcmpltq_m): Likewise.
16806 (vcmpneq_m): Likewise.
16807 (vcmpneq_m_n): Likewise.
16808 (vcvtbq_m): Likewise.
16809 (vcvttq_m): Likewise.
16810 (vcvtmq_m): Likewise.
16811 (vcvtnq_m): Likewise.
16812 (vcvtpq_m): Likewise.
16813 (vdupq_m_n): Likewise.
16814 (vfmaq_n): Likewise.
16816 (vfmasq_n): Likewise.
16818 (vmaxnmaq_m): Likewise.
16819 (vmaxnmavq_m): Likewise.
16820 (vmaxnmvq_m): Likewise.
16821 (vmaxnmavq_p): Likewise.
16822 (vmaxnmvq_p): Likewise.
16823 (vminnmaq_m): Likewise.
16824 (vminnmavq_p): Likewise.
16825 (vminnmvq_p): Likewise.
16826 (vrndnq_m): Likewise.
16827 (vrndaq_m): Likewise.
16828 (vrndmq_m): Likewise.
16829 (vrev64q_m): Likewise.
16830 (vrev32q_m): Likewise.
16831 (vpselq): Likewise.
16832 (vnegq_m): Likewise.
16833 (vcmpgeq_m): Likewise.
16834 (vshrntq_n): Likewise.
16835 (vrshrntq_n): Likewise.
16836 (vmovlbq_m): Likewise.
16837 (vmovnbq_m): Likewise.
16838 (vmovntq_m): Likewise.
16839 (vmvnq_m_n): Likewise.
16840 (vmvnq_m): Likewise.
16841 (vshrnbq_n): Likewise.
16842 (vrshrnbq_n): Likewise.
16843 (vqshruntq_n): Likewise.
16844 (vrev16q_m): Likewise.
16845 (vqshrunbq_n): Likewise.
16846 (vqshrntq_n): Likewise.
16847 (vqrshruntq_n): Likewise.
16848 (vqrshrntq_n): Likewise.
16849 (vqshrnbq_n): Likewise.
16850 (vqmovuntq_m): Likewise.
16851 (vqmovntq_m): Likewise.
16852 (vqmovnbq_m): Likewise.
16853 (vorrq_m_n): Likewise.
16854 (vmovltq_m): Likewise.
16855 (vqmovunbq_m): Likewise.
16856 (vaddlvaq_p): Likewise.
16857 (vmlaldavaq): Likewise.
16858 (vmlaldavaxq): Likewise.
16859 (vmlaldavq_p): Likewise.
16860 (vmlaldavxq_p): Likewise.
16861 (vmlsldavaq): Likewise.
16862 (vmlsldavaxq): Likewise.
16863 (vmlsldavq_p): Likewise.
16864 (vmlsldavxq_p): Likewise.
16865 (vrmlaldavhaxq): Likewise.
16866 (vrmlaldavhq_p): Likewise.
16867 (vrmlaldavhxq_p): Likewise.
16868 (vrmlsldavhaq): Likewise.
16869 (vrmlsldavhaxq): Likewise.
16870 (vrmlsldavhq_p): Likewise.
16871 (vrmlsldavhxq_p): Likewise.
16872 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
16874 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
16875 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
16876 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
16877 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
16878 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
16879 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
16880 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
16881 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
16882 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
16883 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
16884 (MVE_pred3): Likewise.
16885 (MVE_constraint1): Likewise.
16886 (MVE_pred1): Likewise.
16887 (VMLALDAVQ_P): Define iterator.
16888 (VQMOVNBQ_M): Likewise.
16889 (VMOVLTQ_M): Likewise.
16890 (VMOVNBQ_M): Likewise.
16891 (VRSHRNTQ_N): Likewise.
16892 (VORRQ_M_N): Likewise.
16893 (VREV32Q_M): Likewise.
16894 (VREV16Q_M): Likewise.
16895 (VQRSHRNTQ_N): Likewise.
16896 (VMOVNTQ_M): Likewise.
16897 (VMOVLBQ_M): Likewise.
16898 (VMLALDAVAQ): Likewise.
16899 (VQSHRNBQ_N): Likewise.
16900 (VSHRNBQ_N): Likewise.
16901 (VRSHRNBQ_N): Likewise.
16902 (VMLALDAVXQ_P): Likewise.
16903 (VQMOVNTQ_M): Likewise.
16904 (VMVNQ_M_N): Likewise.
16905 (VQSHRNTQ_N): Likewise.
16906 (VMLALDAVAXQ): Likewise.
16907 (VSHRNTQ_N): Likewise.
16908 (VCVTMQ_M): Likewise.
16909 (VCVTNQ_M): Likewise.
16910 (VCVTPQ_M): Likewise.
16911 (VCVTQ_M_N_FROM_F): Likewise.
16912 (VCVTQ_M_FROM_F): Likewise.
16913 (VRMLALDAVHQ_P): Likewise.
16914 (VADDLVAQ_P): Likewise.
16915 (mve_vrndq_m_f<mode>): Define RTL pattern.
16916 (mve_vabsq_m_f<mode>): Likewise.
16917 (mve_vaddlvaq_p_<supf>v4si): Likewise.
16918 (mve_vcmlaq_f<mode>): Likewise.
16919 (mve_vcmlaq_rot180_f<mode>): Likewise.
16920 (mve_vcmlaq_rot270_f<mode>): Likewise.
16921 (mve_vcmlaq_rot90_f<mode>): Likewise.
16922 (mve_vcmpeqq_m_n_f<mode>): Likewise.
16923 (mve_vcmpgeq_m_f<mode>): Likewise.
16924 (mve_vcmpgeq_m_n_f<mode>): Likewise.
16925 (mve_vcmpgtq_m_f<mode>): Likewise.
16926 (mve_vcmpgtq_m_n_f<mode>): Likewise.
16927 (mve_vcmpleq_m_f<mode>): Likewise.
16928 (mve_vcmpleq_m_n_f<mode>): Likewise.
16929 (mve_vcmpltq_m_f<mode>): Likewise.
16930 (mve_vcmpltq_m_n_f<mode>): Likewise.
16931 (mve_vcmpneq_m_f<mode>): Likewise.
16932 (mve_vcmpneq_m_n_f<mode>): Likewise.
16933 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
16934 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
16935 (mve_vcvttq_m_f16_f32v8hf): Likewise.
16936 (mve_vcvttq_m_f32_f16v4sf): Likewise.
16937 (mve_vdupq_m_n_f<mode>): Likewise.
16938 (mve_vfmaq_f<mode>): Likewise.
16939 (mve_vfmaq_n_f<mode>): Likewise.
16940 (mve_vfmasq_n_f<mode>): Likewise.
16941 (mve_vfmsq_f<mode>): Likewise.
16942 (mve_vmaxnmaq_m_f<mode>): Likewise.
16943 (mve_vmaxnmavq_p_f<mode>): Likewise.
16944 (mve_vmaxnmvq_p_f<mode>): Likewise.
16945 (mve_vminnmaq_m_f<mode>): Likewise.
16946 (mve_vminnmavq_p_f<mode>): Likewise.
16947 (mve_vminnmvq_p_f<mode>): Likewise.
16948 (mve_vmlaldavaq_<supf><mode>): Likewise.
16949 (mve_vmlaldavaxq_<supf><mode>): Likewise.
16950 (mve_vmlaldavq_p_<supf><mode>): Likewise.
16951 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
16952 (mve_vmlsldavaq_s<mode>): Likewise.
16953 (mve_vmlsldavaxq_s<mode>): Likewise.
16954 (mve_vmlsldavq_p_s<mode>): Likewise.
16955 (mve_vmlsldavxq_p_s<mode>): Likewise.
16956 (mve_vmovlbq_m_<supf><mode>): Likewise.
16957 (mve_vmovltq_m_<supf><mode>): Likewise.
16958 (mve_vmovnbq_m_<supf><mode>): Likewise.
16959 (mve_vmovntq_m_<supf><mode>): Likewise.
16960 (mve_vmvnq_m_n_<supf><mode>): Likewise.
16961 (mve_vnegq_m_f<mode>): Likewise.
16962 (mve_vorrq_m_n_<supf><mode>): Likewise.
16963 (mve_vpselq_f<mode>): Likewise.
16964 (mve_vqmovnbq_m_<supf><mode>): Likewise.
16965 (mve_vqmovntq_m_<supf><mode>): Likewise.
16966 (mve_vqmovunbq_m_s<mode>): Likewise.
16967 (mve_vqmovuntq_m_s<mode>): Likewise.
16968 (mve_vqrshrntq_n_<supf><mode>): Likewise.
16969 (mve_vqrshruntq_n_s<mode>): Likewise.
16970 (mve_vqshrnbq_n_<supf><mode>): Likewise.
16971 (mve_vqshrntq_n_<supf><mode>): Likewise.
16972 (mve_vqshrunbq_n_s<mode>): Likewise.
16973 (mve_vqshruntq_n_s<mode>): Likewise.
16974 (mve_vrev32q_m_fv8hf): Likewise.
16975 (mve_vrev32q_m_<supf><mode>): Likewise.
16976 (mve_vrev64q_m_f<mode>): Likewise.
16977 (mve_vrmlaldavhaxq_sv4si): Likewise.
16978 (mve_vrmlaldavhxq_p_sv4si): Likewise.
16979 (mve_vrmlsldavhaxq_sv4si): Likewise.
16980 (mve_vrmlsldavhq_p_sv4si): Likewise.
16981 (mve_vrmlsldavhxq_p_sv4si): Likewise.
16982 (mve_vrndaq_m_f<mode>): Likewise.
16983 (mve_vrndmq_m_f<mode>): Likewise.
16984 (mve_vrndnq_m_f<mode>): Likewise.
16985 (mve_vrndpq_m_f<mode>): Likewise.
16986 (mve_vrndxq_m_f<mode>): Likewise.
16987 (mve_vrshrnbq_n_<supf><mode>): Likewise.
16988 (mve_vrshrntq_n_<supf><mode>): Likewise.
16989 (mve_vshrnbq_n_<supf><mode>): Likewise.
16990 (mve_vshrntq_n_<supf><mode>): Likewise.
16991 (mve_vcvtmq_m_<supf><mode>): Likewise.
16992 (mve_vcvtpq_m_<supf><mode>): Likewise.
16993 (mve_vcvtnq_m_<supf><mode>): Likewise.
16994 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
16995 (mve_vrev16q_m_<supf>v16qi): Likewise.
16996 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
16997 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
16998 (mve_vrmlsldavhaq_sv4si): Likewise.
17000 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
17001 Mihail Ionescu <mihail.ionescu@arm.com>
17002 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17004 * config/arm/arm_mve.h (vpselq_u8): Define macro.
17005 (vpselq_s8): Likewise.
17006 (vrev64q_m_u8): Likewise.
17007 (vqrdmlashq_n_u8): Likewise.
17008 (vqrdmlahq_n_u8): Likewise.
17009 (vqdmlahq_n_u8): Likewise.
17010 (vmvnq_m_u8): Likewise.
17011 (vmlasq_n_u8): Likewise.
17012 (vmlaq_n_u8): Likewise.
17013 (vmladavq_p_u8): Likewise.
17014 (vmladavaq_u8): Likewise.
17015 (vminvq_p_u8): Likewise.
17016 (vmaxvq_p_u8): Likewise.
17017 (vdupq_m_n_u8): Likewise.
17018 (vcmpneq_m_u8): Likewise.
17019 (vcmpneq_m_n_u8): Likewise.
17020 (vcmphiq_m_u8): Likewise.
17021 (vcmphiq_m_n_u8): Likewise.
17022 (vcmpeqq_m_u8): Likewise.
17023 (vcmpeqq_m_n_u8): Likewise.
17024 (vcmpcsq_m_u8): Likewise.
17025 (vcmpcsq_m_n_u8): Likewise.
17026 (vclzq_m_u8): Likewise.
17027 (vaddvaq_p_u8): Likewise.
17028 (vsriq_n_u8): Likewise.
17029 (vsliq_n_u8): Likewise.
17030 (vshlq_m_r_u8): Likewise.
17031 (vrshlq_m_n_u8): Likewise.
17032 (vqshlq_m_r_u8): Likewise.
17033 (vqrshlq_m_n_u8): Likewise.
17034 (vminavq_p_s8): Likewise.
17035 (vminaq_m_s8): Likewise.
17036 (vmaxavq_p_s8): Likewise.
17037 (vmaxaq_m_s8): Likewise.
17038 (vcmpneq_m_s8): Likewise.
17039 (vcmpneq_m_n_s8): Likewise.
17040 (vcmpltq_m_s8): Likewise.
17041 (vcmpltq_m_n_s8): Likewise.
17042 (vcmpleq_m_s8): Likewise.
17043 (vcmpleq_m_n_s8): Likewise.
17044 (vcmpgtq_m_s8): Likewise.
17045 (vcmpgtq_m_n_s8): Likewise.
17046 (vcmpgeq_m_s8): Likewise.
17047 (vcmpgeq_m_n_s8): Likewise.
17048 (vcmpeqq_m_s8): Likewise.
17049 (vcmpeqq_m_n_s8): Likewise.
17050 (vshlq_m_r_s8): Likewise.
17051 (vrshlq_m_n_s8): Likewise.
17052 (vrev64q_m_s8): Likewise.
17053 (vqshlq_m_r_s8): Likewise.
17054 (vqrshlq_m_n_s8): Likewise.
17055 (vqnegq_m_s8): Likewise.
17056 (vqabsq_m_s8): Likewise.
17057 (vnegq_m_s8): Likewise.
17058 (vmvnq_m_s8): Likewise.
17059 (vmlsdavxq_p_s8): Likewise.
17060 (vmlsdavq_p_s8): Likewise.
17061 (vmladavxq_p_s8): Likewise.
17062 (vmladavq_p_s8): Likewise.
17063 (vminvq_p_s8): Likewise.
17064 (vmaxvq_p_s8): Likewise.
17065 (vdupq_m_n_s8): Likewise.
17066 (vclzq_m_s8): Likewise.
17067 (vclsq_m_s8): Likewise.
17068 (vaddvaq_p_s8): Likewise.
17069 (vabsq_m_s8): Likewise.
17070 (vqrdmlsdhxq_s8): Likewise.
17071 (vqrdmlsdhq_s8): Likewise.
17072 (vqrdmlashq_n_s8): Likewise.
17073 (vqrdmlahq_n_s8): Likewise.
17074 (vqrdmladhxq_s8): Likewise.
17075 (vqrdmladhq_s8): Likewise.
17076 (vqdmlsdhxq_s8): Likewise.
17077 (vqdmlsdhq_s8): Likewise.
17078 (vqdmlahq_n_s8): Likewise.
17079 (vqdmladhxq_s8): Likewise.
17080 (vqdmladhq_s8): Likewise.
17081 (vmlsdavaxq_s8): Likewise.
17082 (vmlsdavaq_s8): Likewise.
17083 (vmlasq_n_s8): Likewise.
17084 (vmlaq_n_s8): Likewise.
17085 (vmladavaxq_s8): Likewise.
17086 (vmladavaq_s8): Likewise.
17087 (vsriq_n_s8): Likewise.
17088 (vsliq_n_s8): Likewise.
17089 (vpselq_u16): Likewise.
17090 (vpselq_s16): Likewise.
17091 (vrev64q_m_u16): Likewise.
17092 (vqrdmlashq_n_u16): Likewise.
17093 (vqrdmlahq_n_u16): Likewise.
17094 (vqdmlahq_n_u16): Likewise.
17095 (vmvnq_m_u16): Likewise.
17096 (vmlasq_n_u16): Likewise.
17097 (vmlaq_n_u16): Likewise.
17098 (vmladavq_p_u16): Likewise.
17099 (vmladavaq_u16): Likewise.
17100 (vminvq_p_u16): Likewise.
17101 (vmaxvq_p_u16): Likewise.
17102 (vdupq_m_n_u16): Likewise.
17103 (vcmpneq_m_u16): Likewise.
17104 (vcmpneq_m_n_u16): Likewise.
17105 (vcmphiq_m_u16): Likewise.
17106 (vcmphiq_m_n_u16): Likewise.
17107 (vcmpeqq_m_u16): Likewise.
17108 (vcmpeqq_m_n_u16): Likewise.
17109 (vcmpcsq_m_u16): Likewise.
17110 (vcmpcsq_m_n_u16): Likewise.
17111 (vclzq_m_u16): Likewise.
17112 (vaddvaq_p_u16): Likewise.
17113 (vsriq_n_u16): Likewise.
17114 (vsliq_n_u16): Likewise.
17115 (vshlq_m_r_u16): Likewise.
17116 (vrshlq_m_n_u16): Likewise.
17117 (vqshlq_m_r_u16): Likewise.
17118 (vqrshlq_m_n_u16): Likewise.
17119 (vminavq_p_s16): Likewise.
17120 (vminaq_m_s16): Likewise.
17121 (vmaxavq_p_s16): Likewise.
17122 (vmaxaq_m_s16): Likewise.
17123 (vcmpneq_m_s16): Likewise.
17124 (vcmpneq_m_n_s16): Likewise.
17125 (vcmpltq_m_s16): Likewise.
17126 (vcmpltq_m_n_s16): Likewise.
17127 (vcmpleq_m_s16): Likewise.
17128 (vcmpleq_m_n_s16): Likewise.
17129 (vcmpgtq_m_s16): Likewise.
17130 (vcmpgtq_m_n_s16): Likewise.
17131 (vcmpgeq_m_s16): Likewise.
17132 (vcmpgeq_m_n_s16): Likewise.
17133 (vcmpeqq_m_s16): Likewise.
17134 (vcmpeqq_m_n_s16): Likewise.
17135 (vshlq_m_r_s16): Likewise.
17136 (vrshlq_m_n_s16): Likewise.
17137 (vrev64q_m_s16): Likewise.
17138 (vqshlq_m_r_s16): Likewise.
17139 (vqrshlq_m_n_s16): Likewise.
17140 (vqnegq_m_s16): Likewise.
17141 (vqabsq_m_s16): Likewise.
17142 (vnegq_m_s16): Likewise.
17143 (vmvnq_m_s16): Likewise.
17144 (vmlsdavxq_p_s16): Likewise.
17145 (vmlsdavq_p_s16): Likewise.
17146 (vmladavxq_p_s16): Likewise.
17147 (vmladavq_p_s16): Likewise.
17148 (vminvq_p_s16): Likewise.
17149 (vmaxvq_p_s16): Likewise.
17150 (vdupq_m_n_s16): Likewise.
17151 (vclzq_m_s16): Likewise.
17152 (vclsq_m_s16): Likewise.
17153 (vaddvaq_p_s16): Likewise.
17154 (vabsq_m_s16): Likewise.
17155 (vqrdmlsdhxq_s16): Likewise.
17156 (vqrdmlsdhq_s16): Likewise.
17157 (vqrdmlashq_n_s16): Likewise.
17158 (vqrdmlahq_n_s16): Likewise.
17159 (vqrdmladhxq_s16): Likewise.
17160 (vqrdmladhq_s16): Likewise.
17161 (vqdmlsdhxq_s16): Likewise.
17162 (vqdmlsdhq_s16): Likewise.
17163 (vqdmlahq_n_s16): Likewise.
17164 (vqdmladhxq_s16): Likewise.
17165 (vqdmladhq_s16): Likewise.
17166 (vmlsdavaxq_s16): Likewise.
17167 (vmlsdavaq_s16): Likewise.
17168 (vmlasq_n_s16): Likewise.
17169 (vmlaq_n_s16): Likewise.
17170 (vmladavaxq_s16): Likewise.
17171 (vmladavaq_s16): Likewise.
17172 (vsriq_n_s16): Likewise.
17173 (vsliq_n_s16): Likewise.
17174 (vpselq_u32): Likewise.
17175 (vpselq_s32): Likewise.
17176 (vrev64q_m_u32): Likewise.
17177 (vqrdmlashq_n_u32): Likewise.
17178 (vqrdmlahq_n_u32): Likewise.
17179 (vqdmlahq_n_u32): Likewise.
17180 (vmvnq_m_u32): Likewise.
17181 (vmlasq_n_u32): Likewise.
17182 (vmlaq_n_u32): Likewise.
17183 (vmladavq_p_u32): Likewise.
17184 (vmladavaq_u32): Likewise.
17185 (vminvq_p_u32): Likewise.
17186 (vmaxvq_p_u32): Likewise.
17187 (vdupq_m_n_u32): Likewise.
17188 (vcmpneq_m_u32): Likewise.
17189 (vcmpneq_m_n_u32): Likewise.
17190 (vcmphiq_m_u32): Likewise.
17191 (vcmphiq_m_n_u32): Likewise.
17192 (vcmpeqq_m_u32): Likewise.
17193 (vcmpeqq_m_n_u32): Likewise.
17194 (vcmpcsq_m_u32): Likewise.
17195 (vcmpcsq_m_n_u32): Likewise.
17196 (vclzq_m_u32): Likewise.
17197 (vaddvaq_p_u32): Likewise.
17198 (vsriq_n_u32): Likewise.
17199 (vsliq_n_u32): Likewise.
17200 (vshlq_m_r_u32): Likewise.
17201 (vrshlq_m_n_u32): Likewise.
17202 (vqshlq_m_r_u32): Likewise.
17203 (vqrshlq_m_n_u32): Likewise.
17204 (vminavq_p_s32): Likewise.
17205 (vminaq_m_s32): Likewise.
17206 (vmaxavq_p_s32): Likewise.
17207 (vmaxaq_m_s32): Likewise.
17208 (vcmpneq_m_s32): Likewise.
17209 (vcmpneq_m_n_s32): Likewise.
17210 (vcmpltq_m_s32): Likewise.
17211 (vcmpltq_m_n_s32): Likewise.
17212 (vcmpleq_m_s32): Likewise.
17213 (vcmpleq_m_n_s32): Likewise.
17214 (vcmpgtq_m_s32): Likewise.
17215 (vcmpgtq_m_n_s32): Likewise.
17216 (vcmpgeq_m_s32): Likewise.
17217 (vcmpgeq_m_n_s32): Likewise.
17218 (vcmpeqq_m_s32): Likewise.
17219 (vcmpeqq_m_n_s32): Likewise.
17220 (vshlq_m_r_s32): Likewise.
17221 (vrshlq_m_n_s32): Likewise.
17222 (vrev64q_m_s32): Likewise.
17223 (vqshlq_m_r_s32): Likewise.
17224 (vqrshlq_m_n_s32): Likewise.
17225 (vqnegq_m_s32): Likewise.
17226 (vqabsq_m_s32): Likewise.
17227 (vnegq_m_s32): Likewise.
17228 (vmvnq_m_s32): Likewise.
17229 (vmlsdavxq_p_s32): Likewise.
17230 (vmlsdavq_p_s32): Likewise.
17231 (vmladavxq_p_s32): Likewise.
17232 (vmladavq_p_s32): Likewise.
17233 (vminvq_p_s32): Likewise.
17234 (vmaxvq_p_s32): Likewise.
17235 (vdupq_m_n_s32): Likewise.
17236 (vclzq_m_s32): Likewise.
17237 (vclsq_m_s32): Likewise.
17238 (vaddvaq_p_s32): Likewise.
17239 (vabsq_m_s32): Likewise.
17240 (vqrdmlsdhxq_s32): Likewise.
17241 (vqrdmlsdhq_s32): Likewise.
17242 (vqrdmlashq_n_s32): Likewise.
17243 (vqrdmlahq_n_s32): Likewise.
17244 (vqrdmladhxq_s32): Likewise.
17245 (vqrdmladhq_s32): Likewise.
17246 (vqdmlsdhxq_s32): Likewise.
17247 (vqdmlsdhq_s32): Likewise.
17248 (vqdmlahq_n_s32): Likewise.
17249 (vqdmladhxq_s32): Likewise.
17250 (vqdmladhq_s32): Likewise.
17251 (vmlsdavaxq_s32): Likewise.
17252 (vmlsdavaq_s32): Likewise.
17253 (vmlasq_n_s32): Likewise.
17254 (vmlaq_n_s32): Likewise.
17255 (vmladavaxq_s32): Likewise.
17256 (vmladavaq_s32): Likewise.
17257 (vsriq_n_s32): Likewise.
17258 (vsliq_n_s32): Likewise.
17259 (vpselq_u64): Likewise.
17260 (vpselq_s64): Likewise.
17261 (__arm_vpselq_u8): Define intrinsic.
17262 (__arm_vpselq_s8): Likewise.
17263 (__arm_vrev64q_m_u8): Likewise.
17264 (__arm_vqrdmlashq_n_u8): Likewise.
17265 (__arm_vqrdmlahq_n_u8): Likewise.
17266 (__arm_vqdmlahq_n_u8): Likewise.
17267 (__arm_vmvnq_m_u8): Likewise.
17268 (__arm_vmlasq_n_u8): Likewise.
17269 (__arm_vmlaq_n_u8): Likewise.
17270 (__arm_vmladavq_p_u8): Likewise.
17271 (__arm_vmladavaq_u8): Likewise.
17272 (__arm_vminvq_p_u8): Likewise.
17273 (__arm_vmaxvq_p_u8): Likewise.
17274 (__arm_vdupq_m_n_u8): Likewise.
17275 (__arm_vcmpneq_m_u8): Likewise.
17276 (__arm_vcmpneq_m_n_u8): Likewise.
17277 (__arm_vcmphiq_m_u8): Likewise.
17278 (__arm_vcmphiq_m_n_u8): Likewise.
17279 (__arm_vcmpeqq_m_u8): Likewise.
17280 (__arm_vcmpeqq_m_n_u8): Likewise.
17281 (__arm_vcmpcsq_m_u8): Likewise.
17282 (__arm_vcmpcsq_m_n_u8): Likewise.
17283 (__arm_vclzq_m_u8): Likewise.
17284 (__arm_vaddvaq_p_u8): Likewise.
17285 (__arm_vsriq_n_u8): Likewise.
17286 (__arm_vsliq_n_u8): Likewise.
17287 (__arm_vshlq_m_r_u8): Likewise.
17288 (__arm_vrshlq_m_n_u8): Likewise.
17289 (__arm_vqshlq_m_r_u8): Likewise.
17290 (__arm_vqrshlq_m_n_u8): Likewise.
17291 (__arm_vminavq_p_s8): Likewise.
17292 (__arm_vminaq_m_s8): Likewise.
17293 (__arm_vmaxavq_p_s8): Likewise.
17294 (__arm_vmaxaq_m_s8): Likewise.
17295 (__arm_vcmpneq_m_s8): Likewise.
17296 (__arm_vcmpneq_m_n_s8): Likewise.
17297 (__arm_vcmpltq_m_s8): Likewise.
17298 (__arm_vcmpltq_m_n_s8): Likewise.
17299 (__arm_vcmpleq_m_s8): Likewise.
17300 (__arm_vcmpleq_m_n_s8): Likewise.
17301 (__arm_vcmpgtq_m_s8): Likewise.
17302 (__arm_vcmpgtq_m_n_s8): Likewise.
17303 (__arm_vcmpgeq_m_s8): Likewise.
17304 (__arm_vcmpgeq_m_n_s8): Likewise.
17305 (__arm_vcmpeqq_m_s8): Likewise.
17306 (__arm_vcmpeqq_m_n_s8): Likewise.
17307 (__arm_vshlq_m_r_s8): Likewise.
17308 (__arm_vrshlq_m_n_s8): Likewise.
17309 (__arm_vrev64q_m_s8): Likewise.
17310 (__arm_vqshlq_m_r_s8): Likewise.
17311 (__arm_vqrshlq_m_n_s8): Likewise.
17312 (__arm_vqnegq_m_s8): Likewise.
17313 (__arm_vqabsq_m_s8): Likewise.
17314 (__arm_vnegq_m_s8): Likewise.
17315 (__arm_vmvnq_m_s8): Likewise.
17316 (__arm_vmlsdavxq_p_s8): Likewise.
17317 (__arm_vmlsdavq_p_s8): Likewise.
17318 (__arm_vmladavxq_p_s8): Likewise.
17319 (__arm_vmladavq_p_s8): Likewise.
17320 (__arm_vminvq_p_s8): Likewise.
17321 (__arm_vmaxvq_p_s8): Likewise.
17322 (__arm_vdupq_m_n_s8): Likewise.
17323 (__arm_vclzq_m_s8): Likewise.
17324 (__arm_vclsq_m_s8): Likewise.
17325 (__arm_vaddvaq_p_s8): Likewise.
17326 (__arm_vabsq_m_s8): Likewise.
17327 (__arm_vqrdmlsdhxq_s8): Likewise.
17328 (__arm_vqrdmlsdhq_s8): Likewise.
17329 (__arm_vqrdmlashq_n_s8): Likewise.
17330 (__arm_vqrdmlahq_n_s8): Likewise.
17331 (__arm_vqrdmladhxq_s8): Likewise.
17332 (__arm_vqrdmladhq_s8): Likewise.
17333 (__arm_vqdmlsdhxq_s8): Likewise.
17334 (__arm_vqdmlsdhq_s8): Likewise.
17335 (__arm_vqdmlahq_n_s8): Likewise.
17336 (__arm_vqdmladhxq_s8): Likewise.
17337 (__arm_vqdmladhq_s8): Likewise.
17338 (__arm_vmlsdavaxq_s8): Likewise.
17339 (__arm_vmlsdavaq_s8): Likewise.
17340 (__arm_vmlasq_n_s8): Likewise.
17341 (__arm_vmlaq_n_s8): Likewise.
17342 (__arm_vmladavaxq_s8): Likewise.
17343 (__arm_vmladavaq_s8): Likewise.
17344 (__arm_vsriq_n_s8): Likewise.
17345 (__arm_vsliq_n_s8): Likewise.
17346 (__arm_vpselq_u16): Likewise.
17347 (__arm_vpselq_s16): Likewise.
17348 (__arm_vrev64q_m_u16): Likewise.
17349 (__arm_vqrdmlashq_n_u16): Likewise.
17350 (__arm_vqrdmlahq_n_u16): Likewise.
17351 (__arm_vqdmlahq_n_u16): Likewise.
17352 (__arm_vmvnq_m_u16): Likewise.
17353 (__arm_vmlasq_n_u16): Likewise.
17354 (__arm_vmlaq_n_u16): Likewise.
17355 (__arm_vmladavq_p_u16): Likewise.
17356 (__arm_vmladavaq_u16): Likewise.
17357 (__arm_vminvq_p_u16): Likewise.
17358 (__arm_vmaxvq_p_u16): Likewise.
17359 (__arm_vdupq_m_n_u16): Likewise.
17360 (__arm_vcmpneq_m_u16): Likewise.
17361 (__arm_vcmpneq_m_n_u16): Likewise.
17362 (__arm_vcmphiq_m_u16): Likewise.
17363 (__arm_vcmphiq_m_n_u16): Likewise.
17364 (__arm_vcmpeqq_m_u16): Likewise.
17365 (__arm_vcmpeqq_m_n_u16): Likewise.
17366 (__arm_vcmpcsq_m_u16): Likewise.
17367 (__arm_vcmpcsq_m_n_u16): Likewise.
17368 (__arm_vclzq_m_u16): Likewise.
17369 (__arm_vaddvaq_p_u16): Likewise.
17370 (__arm_vsriq_n_u16): Likewise.
17371 (__arm_vsliq_n_u16): Likewise.
17372 (__arm_vshlq_m_r_u16): Likewise.
17373 (__arm_vrshlq_m_n_u16): Likewise.
17374 (__arm_vqshlq_m_r_u16): Likewise.
17375 (__arm_vqrshlq_m_n_u16): Likewise.
17376 (__arm_vminavq_p_s16): Likewise.
17377 (__arm_vminaq_m_s16): Likewise.
17378 (__arm_vmaxavq_p_s16): Likewise.
17379 (__arm_vmaxaq_m_s16): Likewise.
17380 (__arm_vcmpneq_m_s16): Likewise.
17381 (__arm_vcmpneq_m_n_s16): Likewise.
17382 (__arm_vcmpltq_m_s16): Likewise.
17383 (__arm_vcmpltq_m_n_s16): Likewise.
17384 (__arm_vcmpleq_m_s16): Likewise.
17385 (__arm_vcmpleq_m_n_s16): Likewise.
17386 (__arm_vcmpgtq_m_s16): Likewise.
17387 (__arm_vcmpgtq_m_n_s16): Likewise.
17388 (__arm_vcmpgeq_m_s16): Likewise.
17389 (__arm_vcmpgeq_m_n_s16): Likewise.
17390 (__arm_vcmpeqq_m_s16): Likewise.
17391 (__arm_vcmpeqq_m_n_s16): Likewise.
17392 (__arm_vshlq_m_r_s16): Likewise.
17393 (__arm_vrshlq_m_n_s16): Likewise.
17394 (__arm_vrev64q_m_s16): Likewise.
17395 (__arm_vqshlq_m_r_s16): Likewise.
17396 (__arm_vqrshlq_m_n_s16): Likewise.
17397 (__arm_vqnegq_m_s16): Likewise.
17398 (__arm_vqabsq_m_s16): Likewise.
17399 (__arm_vnegq_m_s16): Likewise.
17400 (__arm_vmvnq_m_s16): Likewise.
17401 (__arm_vmlsdavxq_p_s16): Likewise.
17402 (__arm_vmlsdavq_p_s16): Likewise.
17403 (__arm_vmladavxq_p_s16): Likewise.
17404 (__arm_vmladavq_p_s16): Likewise.
17405 (__arm_vminvq_p_s16): Likewise.
17406 (__arm_vmaxvq_p_s16): Likewise.
17407 (__arm_vdupq_m_n_s16): Likewise.
17408 (__arm_vclzq_m_s16): Likewise.
17409 (__arm_vclsq_m_s16): Likewise.
17410 (__arm_vaddvaq_p_s16): Likewise.
17411 (__arm_vabsq_m_s16): Likewise.
17412 (__arm_vqrdmlsdhxq_s16): Likewise.
17413 (__arm_vqrdmlsdhq_s16): Likewise.
17414 (__arm_vqrdmlashq_n_s16): Likewise.
17415 (__arm_vqrdmlahq_n_s16): Likewise.
17416 (__arm_vqrdmladhxq_s16): Likewise.
17417 (__arm_vqrdmladhq_s16): Likewise.
17418 (__arm_vqdmlsdhxq_s16): Likewise.
17419 (__arm_vqdmlsdhq_s16): Likewise.
17420 (__arm_vqdmlahq_n_s16): Likewise.
17421 (__arm_vqdmladhxq_s16): Likewise.
17422 (__arm_vqdmladhq_s16): Likewise.
17423 (__arm_vmlsdavaxq_s16): Likewise.
17424 (__arm_vmlsdavaq_s16): Likewise.
17425 (__arm_vmlasq_n_s16): Likewise.
17426 (__arm_vmlaq_n_s16): Likewise.
17427 (__arm_vmladavaxq_s16): Likewise.
17428 (__arm_vmladavaq_s16): Likewise.
17429 (__arm_vsriq_n_s16): Likewise.
17430 (__arm_vsliq_n_s16): Likewise.
17431 (__arm_vpselq_u32): Likewise.
17432 (__arm_vpselq_s32): Likewise.
17433 (__arm_vrev64q_m_u32): Likewise.
17434 (__arm_vqrdmlashq_n_u32): Likewise.
17435 (__arm_vqrdmlahq_n_u32): Likewise.
17436 (__arm_vqdmlahq_n_u32): Likewise.
17437 (__arm_vmvnq_m_u32): Likewise.
17438 (__arm_vmlasq_n_u32): Likewise.
17439 (__arm_vmlaq_n_u32): Likewise.
17440 (__arm_vmladavq_p_u32): Likewise.
17441 (__arm_vmladavaq_u32): Likewise.
17442 (__arm_vminvq_p_u32): Likewise.
17443 (__arm_vmaxvq_p_u32): Likewise.
17444 (__arm_vdupq_m_n_u32): Likewise.
17445 (__arm_vcmpneq_m_u32): Likewise.
17446 (__arm_vcmpneq_m_n_u32): Likewise.
17447 (__arm_vcmphiq_m_u32): Likewise.
17448 (__arm_vcmphiq_m_n_u32): Likewise.
17449 (__arm_vcmpeqq_m_u32): Likewise.
17450 (__arm_vcmpeqq_m_n_u32): Likewise.
17451 (__arm_vcmpcsq_m_u32): Likewise.
17452 (__arm_vcmpcsq_m_n_u32): Likewise.
17453 (__arm_vclzq_m_u32): Likewise.
17454 (__arm_vaddvaq_p_u32): Likewise.
17455 (__arm_vsriq_n_u32): Likewise.
17456 (__arm_vsliq_n_u32): Likewise.
17457 (__arm_vshlq_m_r_u32): Likewise.
17458 (__arm_vrshlq_m_n_u32): Likewise.
17459 (__arm_vqshlq_m_r_u32): Likewise.
17460 (__arm_vqrshlq_m_n_u32): Likewise.
17461 (__arm_vminavq_p_s32): Likewise.
17462 (__arm_vminaq_m_s32): Likewise.
17463 (__arm_vmaxavq_p_s32): Likewise.
17464 (__arm_vmaxaq_m_s32): Likewise.
17465 (__arm_vcmpneq_m_s32): Likewise.
17466 (__arm_vcmpneq_m_n_s32): Likewise.
17467 (__arm_vcmpltq_m_s32): Likewise.
17468 (__arm_vcmpltq_m_n_s32): Likewise.
17469 (__arm_vcmpleq_m_s32): Likewise.
17470 (__arm_vcmpleq_m_n_s32): Likewise.
17471 (__arm_vcmpgtq_m_s32): Likewise.
17472 (__arm_vcmpgtq_m_n_s32): Likewise.
17473 (__arm_vcmpgeq_m_s32): Likewise.
17474 (__arm_vcmpgeq_m_n_s32): Likewise.
17475 (__arm_vcmpeqq_m_s32): Likewise.
17476 (__arm_vcmpeqq_m_n_s32): Likewise.
17477 (__arm_vshlq_m_r_s32): Likewise.
17478 (__arm_vrshlq_m_n_s32): Likewise.
17479 (__arm_vrev64q_m_s32): Likewise.
17480 (__arm_vqshlq_m_r_s32): Likewise.
17481 (__arm_vqrshlq_m_n_s32): Likewise.
17482 (__arm_vqnegq_m_s32): Likewise.
17483 (__arm_vqabsq_m_s32): Likewise.
17484 (__arm_vnegq_m_s32): Likewise.
17485 (__arm_vmvnq_m_s32): Likewise.
17486 (__arm_vmlsdavxq_p_s32): Likewise.
17487 (__arm_vmlsdavq_p_s32): Likewise.
17488 (__arm_vmladavxq_p_s32): Likewise.
17489 (__arm_vmladavq_p_s32): Likewise.
17490 (__arm_vminvq_p_s32): Likewise.
17491 (__arm_vmaxvq_p_s32): Likewise.
17492 (__arm_vdupq_m_n_s32): Likewise.
17493 (__arm_vclzq_m_s32): Likewise.
17494 (__arm_vclsq_m_s32): Likewise.
17495 (__arm_vaddvaq_p_s32): Likewise.
17496 (__arm_vabsq_m_s32): Likewise.
17497 (__arm_vqrdmlsdhxq_s32): Likewise.
17498 (__arm_vqrdmlsdhq_s32): Likewise.
17499 (__arm_vqrdmlashq_n_s32): Likewise.
17500 (__arm_vqrdmlahq_n_s32): Likewise.
17501 (__arm_vqrdmladhxq_s32): Likewise.
17502 (__arm_vqrdmladhq_s32): Likewise.
17503 (__arm_vqdmlsdhxq_s32): Likewise.
17504 (__arm_vqdmlsdhq_s32): Likewise.
17505 (__arm_vqdmlahq_n_s32): Likewise.
17506 (__arm_vqdmladhxq_s32): Likewise.
17507 (__arm_vqdmladhq_s32): Likewise.
17508 (__arm_vmlsdavaxq_s32): Likewise.
17509 (__arm_vmlsdavaq_s32): Likewise.
17510 (__arm_vmlasq_n_s32): Likewise.
17511 (__arm_vmlaq_n_s32): Likewise.
17512 (__arm_vmladavaxq_s32): Likewise.
17513 (__arm_vmladavaq_s32): Likewise.
17514 (__arm_vsriq_n_s32): Likewise.
17515 (__arm_vsliq_n_s32): Likewise.
17516 (__arm_vpselq_u64): Likewise.
17517 (__arm_vpselq_s64): Likewise.
17518 (vcmpneq_m_n): Define polymorphic variant.
17519 (vcmpneq_m): Likewise.
17520 (vqrdmlsdhq): Likewise.
17521 (vqrdmlsdhxq): Likewise.
17522 (vqrshlq_m_n): Likewise.
17523 (vqshlq_m_r): Likewise.
17524 (vrev64q_m): Likewise.
17525 (vrshlq_m_n): Likewise.
17526 (vshlq_m_r): Likewise.
17527 (vsliq_n): Likewise.
17528 (vsriq_n): Likewise.
17529 (vqrdmlashq_n): Likewise.
17530 (vqrdmlahq): Likewise.
17531 (vqrdmladhxq): Likewise.
17532 (vqrdmladhq): Likewise.
17533 (vqnegq_m): Likewise.
17534 (vqdmlsdhxq): Likewise.
17535 (vabsq_m): Likewise.
17536 (vclsq_m): Likewise.
17537 (vclzq_m): Likewise.
17538 (vcmpgeq_m): Likewise.
17539 (vcmpgeq_m_n): Likewise.
17540 (vdupq_m_n): Likewise.
17541 (vmaxaq_m): Likewise.
17542 (vmlaq_n): Likewise.
17543 (vmlasq_n): Likewise.
17544 (vmvnq_m): Likewise.
17545 (vnegq_m): Likewise.
17546 (vpselq): Likewise.
17547 (vqdmlahq_n): Likewise.
17548 (vqrdmlahq_n): Likewise.
17549 (vqdmlsdhq): Likewise.
17550 (vqdmladhq): Likewise.
17551 (vqabsq_m): Likewise.
17552 (vminaq_m): Likewise.
17553 (vrmlaldavhaq): Likewise.
17554 (vmlsdavxq_p): Likewise.
17555 (vmlsdavq_p): Likewise.
17556 (vmlsdavaxq): Likewise.
17557 (vmlsdavaq): Likewise.
17558 (vaddvaq_p): Likewise.
17559 (vcmpcsq_m_n): Likewise.
17560 (vcmpcsq_m): Likewise.
17561 (vcmpeqq_m_n): Likewise.
17562 (vcmpeqq_m): Likewise.
17563 (vmladavxq_p): Likewise.
17564 (vmladavq_p): Likewise.
17565 (vmladavaxq): Likewise.
17566 (vmladavaq): Likewise.
17567 (vminvq_p): Likewise.
17568 (vminavq_p): Likewise.
17569 (vmaxvq_p): Likewise.
17570 (vmaxavq_p): Likewise.
17571 (vcmpltq_m_n): Likewise.
17572 (vcmpltq_m): Likewise.
17573 (vcmpleq_m): Likewise.
17574 (vcmpleq_m_n): Likewise.
17575 (vcmphiq_m_n): Likewise.
17576 (vcmphiq_m): Likewise.
17577 (vcmpgtq_m_n): Likewise.
17578 (vcmpgtq_m): Likewise.
17579 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
17581 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
17582 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
17583 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
17584 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
17585 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
17586 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
17587 * config/arm/constraints.md (Rc): Define constraint to check constant is
17588 in the range of 0 to 15.
17589 (Re): Define constraint to check constant is in the range of 0 to 31.
17590 * config/arm/mve.md (VADDVAQ_P): Define iterator.
17591 (VCLZQ_M): Likewise.
17592 (VCMPEQQ_M_N): Likewise.
17593 (VCMPEQQ_M): Likewise.
17594 (VCMPNEQ_M_N): Likewise.
17595 (VCMPNEQ_M): Likewise.
17596 (VDUPQ_M_N): Likewise.
17597 (VMAXVQ_P): Likewise.
17598 (VMINVQ_P): Likewise.
17599 (VMLADAVAQ): Likewise.
17600 (VMLADAVQ_P): Likewise.
17601 (VMLAQ_N): Likewise.
17602 (VMLASQ_N): Likewise.
17603 (VMVNQ_M): Likewise.
17604 (VPSELQ): Likewise.
17605 (VQDMLAHQ_N): Likewise.
17606 (VQRDMLAHQ_N): Likewise.
17607 (VQRDMLASHQ_N): Likewise.
17608 (VQRSHLQ_M_N): Likewise.
17609 (VQSHLQ_M_R): Likewise.
17610 (VREV64Q_M): Likewise.
17611 (VRSHLQ_M_N): Likewise.
17612 (VSHLQ_M_R): Likewise.
17613 (VSLIQ_N): Likewise.
17614 (VSRIQ_N): Likewise.
17615 (mve_vabsq_m_s<mode>): Define RTL pattern.
17616 (mve_vaddvaq_p_<supf><mode>): Likewise.
17617 (mve_vclsq_m_s<mode>): Likewise.
17618 (mve_vclzq_m_<supf><mode>): Likewise.
17619 (mve_vcmpcsq_m_n_u<mode>): Likewise.
17620 (mve_vcmpcsq_m_u<mode>): Likewise.
17621 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
17622 (mve_vcmpeqq_m_<supf><mode>): Likewise.
17623 (mve_vcmpgeq_m_n_s<mode>): Likewise.
17624 (mve_vcmpgeq_m_s<mode>): Likewise.
17625 (mve_vcmpgtq_m_n_s<mode>): Likewise.
17626 (mve_vcmpgtq_m_s<mode>): Likewise.
17627 (mve_vcmphiq_m_n_u<mode>): Likewise.
17628 (mve_vcmphiq_m_u<mode>): Likewise.
17629 (mve_vcmpleq_m_n_s<mode>): Likewise.
17630 (mve_vcmpleq_m_s<mode>): Likewise.
17631 (mve_vcmpltq_m_n_s<mode>): Likewise.
17632 (mve_vcmpltq_m_s<mode>): Likewise.
17633 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
17634 (mve_vcmpneq_m_<supf><mode>): Likewise.
17635 (mve_vdupq_m_n_<supf><mode>): Likewise.
17636 (mve_vmaxaq_m_s<mode>): Likewise.
17637 (mve_vmaxavq_p_s<mode>): Likewise.
17638 (mve_vmaxvq_p_<supf><mode>): Likewise.
17639 (mve_vminaq_m_s<mode>): Likewise.
17640 (mve_vminavq_p_s<mode>): Likewise.
17641 (mve_vminvq_p_<supf><mode>): Likewise.
17642 (mve_vmladavaq_<supf><mode>): Likewise.
17643 (mve_vmladavq_p_<supf><mode>): Likewise.
17644 (mve_vmladavxq_p_s<mode>): Likewise.
17645 (mve_vmlaq_n_<supf><mode>): Likewise.
17646 (mve_vmlasq_n_<supf><mode>): Likewise.
17647 (mve_vmlsdavq_p_s<mode>): Likewise.
17648 (mve_vmlsdavxq_p_s<mode>): Likewise.
17649 (mve_vmvnq_m_<supf><mode>): Likewise.
17650 (mve_vnegq_m_s<mode>): Likewise.
17651 (mve_vpselq_<supf><mode>): Likewise.
17652 (mve_vqabsq_m_s<mode>): Likewise.
17653 (mve_vqdmlahq_n_<supf><mode>): Likewise.
17654 (mve_vqnegq_m_s<mode>): Likewise.
17655 (mve_vqrdmladhq_s<mode>): Likewise.
17656 (mve_vqrdmladhxq_s<mode>): Likewise.
17657 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
17658 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
17659 (mve_vqrdmlsdhq_s<mode>): Likewise.
17660 (mve_vqrdmlsdhxq_s<mode>): Likewise.
17661 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
17662 (mve_vqshlq_m_r_<supf><mode>): Likewise.
17663 (mve_vrev64q_m_<supf><mode>): Likewise.
17664 (mve_vrshlq_m_n_<supf><mode>): Likewise.
17665 (mve_vshlq_m_r_<supf><mode>): Likewise.
17666 (mve_vsliq_n_<supf><mode>): Likewise.
17667 (mve_vsriq_n_<supf><mode>): Likewise.
17668 (mve_vqdmlsdhxq_s<mode>): Likewise.
17669 (mve_vqdmlsdhq_s<mode>): Likewise.
17670 (mve_vqdmladhxq_s<mode>): Likewise.
17671 (mve_vqdmladhq_s<mode>): Likewise.
17672 (mve_vmlsdavaxq_s<mode>): Likewise.
17673 (mve_vmlsdavaq_s<mode>): Likewise.
17674 (mve_vmladavaxq_s<mode>): Likewise.
17675 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
17676 matching constraint Rc.
17677 (mve_imm_31): Define predicate to check the matching constraint Re.
17679 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
17681 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
17682 (vec_cmp<mode>di_dup): Likewise.
17683 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
17685 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
17687 * config/gcn/gcn-valu.md (COND_MODE): Delete.
17688 (COND_INT_MODE): Delete.
17689 (cond_op): Add "mult".
17690 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
17691 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
17693 2020-03-18 Richard Biener <rguenther@suse.de>
17695 PR middle-end/94206
17696 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
17697 partial int modes or not mode-precision integer types for
17700 2020-03-18 Jakub Jelinek <jakub@redhat.com>
17702 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
17704 * config/arc/arc.c (frame_stack_add): Likewise.
17705 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
17707 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
17708 * tree-ssa-strlen.h (handle_printf_call): Likewise.
17709 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
17710 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
17712 2020-03-18 Duan bo <duanbo3@huawei.com>
17715 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
17716 (@ldr_got_tiny_<mode>): New pattern.
17717 (ldr_got_tiny_sidi): Likewise.
17718 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
17719 them to handle SYMBOL_TINY_GOT for ILP32.
17721 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
17723 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
17724 call-preserved for SVE PCS functions.
17725 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
17726 Optimize the case in which there are no following vector save slots.
17728 2020-03-18 Richard Biener <rguenther@suse.de>
17730 PR middle-end/94188
17731 * fold-const.c (build_fold_addr_expr): Convert address to
17733 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
17734 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
17735 to build the ADDR_EXPR which we don't really want to simplify.
17736 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
17737 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
17738 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
17739 (simplify_builtin_call): Strip useless type conversions.
17740 * tree-ssa-strlen.c (new_strinfo): Likewise.
17742 2020-03-17 Alexey Neyman <stilor@att.net>
17745 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
17746 the debug level is terse and the declaration is public. Do not
17747 generate type info.
17748 (dwarf2out_decl): Same.
17749 (add_type_attribute): Return immediately if debug level is
17752 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
17754 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
17756 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17757 Mihail Ionescu <mihail.ionescu@arm.com>
17758 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17760 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
17761 Define qualifier for ternary operands.
17762 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17763 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17764 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17765 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17766 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17767 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17768 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17769 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
17770 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17771 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17772 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17773 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17774 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
17775 * config/arm/arm_mve.h (vabavq_s8): Define macro.
17776 (vabavq_s16): Likewise.
17777 (vabavq_s32): Likewise.
17778 (vbicq_m_n_s16): Likewise.
17779 (vbicq_m_n_s32): Likewise.
17780 (vbicq_m_n_u16): Likewise.
17781 (vbicq_m_n_u32): Likewise.
17782 (vcmpeqq_m_f16): Likewise.
17783 (vcmpeqq_m_f32): Likewise.
17784 (vcvtaq_m_s16_f16): Likewise.
17785 (vcvtaq_m_u16_f16): Likewise.
17786 (vcvtaq_m_s32_f32): Likewise.
17787 (vcvtaq_m_u32_f32): Likewise.
17788 (vcvtq_m_f16_s16): Likewise.
17789 (vcvtq_m_f16_u16): Likewise.
17790 (vcvtq_m_f32_s32): Likewise.
17791 (vcvtq_m_f32_u32): Likewise.
17792 (vqrshrnbq_n_s16): Likewise.
17793 (vqrshrnbq_n_u16): Likewise.
17794 (vqrshrnbq_n_s32): Likewise.
17795 (vqrshrnbq_n_u32): Likewise.
17796 (vqrshrunbq_n_s16): Likewise.
17797 (vqrshrunbq_n_s32): Likewise.
17798 (vrmlaldavhaq_s32): Likewise.
17799 (vrmlaldavhaq_u32): Likewise.
17800 (vshlcq_s8): Likewise.
17801 (vshlcq_u8): Likewise.
17802 (vshlcq_s16): Likewise.
17803 (vshlcq_u16): Likewise.
17804 (vshlcq_s32): Likewise.
17805 (vshlcq_u32): Likewise.
17806 (vabavq_u8): Likewise.
17807 (vabavq_u16): Likewise.
17808 (vabavq_u32): Likewise.
17809 (__arm_vabavq_s8): Define intrinsic.
17810 (__arm_vabavq_s16): Likewise.
17811 (__arm_vabavq_s32): Likewise.
17812 (__arm_vabavq_u8): Likewise.
17813 (__arm_vabavq_u16): Likewise.
17814 (__arm_vabavq_u32): Likewise.
17815 (__arm_vbicq_m_n_s16): Likewise.
17816 (__arm_vbicq_m_n_s32): Likewise.
17817 (__arm_vbicq_m_n_u16): Likewise.
17818 (__arm_vbicq_m_n_u32): Likewise.
17819 (__arm_vqrshrnbq_n_s16): Likewise.
17820 (__arm_vqrshrnbq_n_u16): Likewise.
17821 (__arm_vqrshrnbq_n_s32): Likewise.
17822 (__arm_vqrshrnbq_n_u32): Likewise.
17823 (__arm_vqrshrunbq_n_s16): Likewise.
17824 (__arm_vqrshrunbq_n_s32): Likewise.
17825 (__arm_vrmlaldavhaq_s32): Likewise.
17826 (__arm_vrmlaldavhaq_u32): Likewise.
17827 (__arm_vshlcq_s8): Likewise.
17828 (__arm_vshlcq_u8): Likewise.
17829 (__arm_vshlcq_s16): Likewise.
17830 (__arm_vshlcq_u16): Likewise.
17831 (__arm_vshlcq_s32): Likewise.
17832 (__arm_vshlcq_u32): Likewise.
17833 (__arm_vcmpeqq_m_f16): Likewise.
17834 (__arm_vcmpeqq_m_f32): Likewise.
17835 (__arm_vcvtaq_m_s16_f16): Likewise.
17836 (__arm_vcvtaq_m_u16_f16): Likewise.
17837 (__arm_vcvtaq_m_s32_f32): Likewise.
17838 (__arm_vcvtaq_m_u32_f32): Likewise.
17839 (__arm_vcvtq_m_f16_s16): Likewise.
17840 (__arm_vcvtq_m_f16_u16): Likewise.
17841 (__arm_vcvtq_m_f32_s32): Likewise.
17842 (__arm_vcvtq_m_f32_u32): Likewise.
17843 (vcvtaq_m): Define polymorphic variant.
17844 (vcvtq_m): Likewise.
17845 (vabavq): Likewise.
17846 (vshlcq): Likewise.
17847 (vbicq_m_n): Likewise.
17848 (vqrshrnbq_n): Likewise.
17849 (vqrshrunbq_n): Likewise.
17850 * config/arm/arm_mve_builtins.def
17851 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
17852 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
17853 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17854 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
17855 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
17856 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
17857 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
17858 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17859 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
17860 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
17861 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
17862 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
17863 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
17864 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
17865 * config/arm/mve.md (VBICQ_M_N): Define iterator.
17866 (VCVTAQ_M): Likewise.
17867 (VCVTQ_M_TO_F): Likewise.
17868 (VQRSHRNBQ_N): Likewise.
17869 (VABAVQ): Likewise.
17870 (VSHLCQ): Likewise.
17871 (VRMLALDAVHAQ): Likewise.
17872 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
17873 (mve_vcmpeqq_m_f<mode>): Likewise.
17874 (mve_vcvtaq_m_<supf><mode>): Likewise.
17875 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
17876 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
17877 (mve_vqrshrunbq_n_s<mode>): Likewise.
17878 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
17879 (mve_vabavq_<supf><mode>): Likewise.
17880 (mve_vshlcq_<supf><mode>): Likewise.
17881 (mve_vshlcq_<supf><mode>): Likewise.
17882 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
17883 (mve_vshlcq_carry_<supf><mode>): Likewise.
17885 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17886 Mihail Ionescu <mihail.ionescu@arm.com>
17887 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17889 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
17890 (vqmovnbq_u16): Likewise.
17891 (vmulltq_poly_p8): Likewise.
17892 (vmullbq_poly_p8): Likewise.
17893 (vmovntq_u16): Likewise.
17894 (vmovnbq_u16): Likewise.
17895 (vmlaldavxq_u16): Likewise.
17896 (vmlaldavq_u16): Likewise.
17897 (vqmovuntq_s16): Likewise.
17898 (vqmovunbq_s16): Likewise.
17899 (vshlltq_n_u8): Likewise.
17900 (vshllbq_n_u8): Likewise.
17901 (vorrq_n_u16): Likewise.
17902 (vbicq_n_u16): Likewise.
17903 (vcmpneq_n_f16): Likewise.
17904 (vcmpneq_f16): Likewise.
17905 (vcmpltq_n_f16): Likewise.
17906 (vcmpltq_f16): Likewise.
17907 (vcmpleq_n_f16): Likewise.
17908 (vcmpleq_f16): Likewise.
17909 (vcmpgtq_n_f16): Likewise.
17910 (vcmpgtq_f16): Likewise.
17911 (vcmpgeq_n_f16): Likewise.
17912 (vcmpgeq_f16): Likewise.
17913 (vcmpeqq_n_f16): Likewise.
17914 (vcmpeqq_f16): Likewise.
17915 (vsubq_f16): Likewise.
17916 (vqmovntq_s16): Likewise.
17917 (vqmovnbq_s16): Likewise.
17918 (vqdmulltq_s16): Likewise.
17919 (vqdmulltq_n_s16): Likewise.
17920 (vqdmullbq_s16): Likewise.
17921 (vqdmullbq_n_s16): Likewise.
17922 (vorrq_f16): Likewise.
17923 (vornq_f16): Likewise.
17924 (vmulq_n_f16): Likewise.
17925 (vmulq_f16): Likewise.
17926 (vmovntq_s16): Likewise.
17927 (vmovnbq_s16): Likewise.
17928 (vmlsldavxq_s16): Likewise.
17929 (vmlsldavq_s16): Likewise.
17930 (vmlaldavxq_s16): Likewise.
17931 (vmlaldavq_s16): Likewise.
17932 (vminnmvq_f16): Likewise.
17933 (vminnmq_f16): Likewise.
17934 (vminnmavq_f16): Likewise.
17935 (vminnmaq_f16): Likewise.
17936 (vmaxnmvq_f16): Likewise.
17937 (vmaxnmq_f16): Likewise.
17938 (vmaxnmavq_f16): Likewise.
17939 (vmaxnmaq_f16): Likewise.
17940 (veorq_f16): Likewise.
17941 (vcmulq_rot90_f16): Likewise.
17942 (vcmulq_rot270_f16): Likewise.
17943 (vcmulq_rot180_f16): Likewise.
17944 (vcmulq_f16): Likewise.
17945 (vcaddq_rot90_f16): Likewise.
17946 (vcaddq_rot270_f16): Likewise.
17947 (vbicq_f16): Likewise.
17948 (vandq_f16): Likewise.
17949 (vaddq_n_f16): Likewise.
17950 (vabdq_f16): Likewise.
17951 (vshlltq_n_s8): Likewise.
17952 (vshllbq_n_s8): Likewise.
17953 (vorrq_n_s16): Likewise.
17954 (vbicq_n_s16): Likewise.
17955 (vqmovntq_u32): Likewise.
17956 (vqmovnbq_u32): Likewise.
17957 (vmulltq_poly_p16): Likewise.
17958 (vmullbq_poly_p16): Likewise.
17959 (vmovntq_u32): Likewise.
17960 (vmovnbq_u32): Likewise.
17961 (vmlaldavxq_u32): Likewise.
17962 (vmlaldavq_u32): Likewise.
17963 (vqmovuntq_s32): Likewise.
17964 (vqmovunbq_s32): Likewise.
17965 (vshlltq_n_u16): Likewise.
17966 (vshllbq_n_u16): Likewise.
17967 (vorrq_n_u32): Likewise.
17968 (vbicq_n_u32): Likewise.
17969 (vcmpneq_n_f32): Likewise.
17970 (vcmpneq_f32): Likewise.
17971 (vcmpltq_n_f32): Likewise.
17972 (vcmpltq_f32): Likewise.
17973 (vcmpleq_n_f32): Likewise.
17974 (vcmpleq_f32): Likewise.
17975 (vcmpgtq_n_f32): Likewise.
17976 (vcmpgtq_f32): Likewise.
17977 (vcmpgeq_n_f32): Likewise.
17978 (vcmpgeq_f32): Likewise.
17979 (vcmpeqq_n_f32): Likewise.
17980 (vcmpeqq_f32): Likewise.
17981 (vsubq_f32): Likewise.
17982 (vqmovntq_s32): Likewise.
17983 (vqmovnbq_s32): Likewise.
17984 (vqdmulltq_s32): Likewise.
17985 (vqdmulltq_n_s32): Likewise.
17986 (vqdmullbq_s32): Likewise.
17987 (vqdmullbq_n_s32): Likewise.
17988 (vorrq_f32): Likewise.
17989 (vornq_f32): Likewise.
17990 (vmulq_n_f32): Likewise.
17991 (vmulq_f32): Likewise.
17992 (vmovntq_s32): Likewise.
17993 (vmovnbq_s32): Likewise.
17994 (vmlsldavxq_s32): Likewise.
17995 (vmlsldavq_s32): Likewise.
17996 (vmlaldavxq_s32): Likewise.
17997 (vmlaldavq_s32): Likewise.
17998 (vminnmvq_f32): Likewise.
17999 (vminnmq_f32): Likewise.
18000 (vminnmavq_f32): Likewise.
18001 (vminnmaq_f32): Likewise.
18002 (vmaxnmvq_f32): Likewise.
18003 (vmaxnmq_f32): Likewise.
18004 (vmaxnmavq_f32): Likewise.
18005 (vmaxnmaq_f32): Likewise.
18006 (veorq_f32): Likewise.
18007 (vcmulq_rot90_f32): Likewise.
18008 (vcmulq_rot270_f32): Likewise.
18009 (vcmulq_rot180_f32): Likewise.
18010 (vcmulq_f32): Likewise.
18011 (vcaddq_rot90_f32): Likewise.
18012 (vcaddq_rot270_f32): Likewise.
18013 (vbicq_f32): Likewise.
18014 (vandq_f32): Likewise.
18015 (vaddq_n_f32): Likewise.
18016 (vabdq_f32): Likewise.
18017 (vshlltq_n_s16): Likewise.
18018 (vshllbq_n_s16): Likewise.
18019 (vorrq_n_s32): Likewise.
18020 (vbicq_n_s32): Likewise.
18021 (vrmlaldavhq_u32): Likewise.
18022 (vctp8q_m): Likewise.
18023 (vctp64q_m): Likewise.
18024 (vctp32q_m): Likewise.
18025 (vctp16q_m): Likewise.
18026 (vaddlvaq_u32): Likewise.
18027 (vrmlsldavhxq_s32): Likewise.
18028 (vrmlsldavhq_s32): Likewise.
18029 (vrmlaldavhxq_s32): Likewise.
18030 (vrmlaldavhq_s32): Likewise.
18031 (vcvttq_f16_f32): Likewise.
18032 (vcvtbq_f16_f32): Likewise.
18033 (vaddlvaq_s32): Likewise.
18034 (__arm_vqmovntq_u16): Define intrinsic.
18035 (__arm_vqmovnbq_u16): Likewise.
18036 (__arm_vmulltq_poly_p8): Likewise.
18037 (__arm_vmullbq_poly_p8): Likewise.
18038 (__arm_vmovntq_u16): Likewise.
18039 (__arm_vmovnbq_u16): Likewise.
18040 (__arm_vmlaldavxq_u16): Likewise.
18041 (__arm_vmlaldavq_u16): Likewise.
18042 (__arm_vqmovuntq_s16): Likewise.
18043 (__arm_vqmovunbq_s16): Likewise.
18044 (__arm_vshlltq_n_u8): Likewise.
18045 (__arm_vshllbq_n_u8): Likewise.
18046 (__arm_vorrq_n_u16): Likewise.
18047 (__arm_vbicq_n_u16): Likewise.
18048 (__arm_vcmpneq_n_f16): Likewise.
18049 (__arm_vcmpneq_f16): Likewise.
18050 (__arm_vcmpltq_n_f16): Likewise.
18051 (__arm_vcmpltq_f16): Likewise.
18052 (__arm_vcmpleq_n_f16): Likewise.
18053 (__arm_vcmpleq_f16): Likewise.
18054 (__arm_vcmpgtq_n_f16): Likewise.
18055 (__arm_vcmpgtq_f16): Likewise.
18056 (__arm_vcmpgeq_n_f16): Likewise.
18057 (__arm_vcmpgeq_f16): Likewise.
18058 (__arm_vcmpeqq_n_f16): Likewise.
18059 (__arm_vcmpeqq_f16): Likewise.
18060 (__arm_vsubq_f16): Likewise.
18061 (__arm_vqmovntq_s16): Likewise.
18062 (__arm_vqmovnbq_s16): Likewise.
18063 (__arm_vqdmulltq_s16): Likewise.
18064 (__arm_vqdmulltq_n_s16): Likewise.
18065 (__arm_vqdmullbq_s16): Likewise.
18066 (__arm_vqdmullbq_n_s16): Likewise.
18067 (__arm_vorrq_f16): Likewise.
18068 (__arm_vornq_f16): Likewise.
18069 (__arm_vmulq_n_f16): Likewise.
18070 (__arm_vmulq_f16): Likewise.
18071 (__arm_vmovntq_s16): Likewise.
18072 (__arm_vmovnbq_s16): Likewise.
18073 (__arm_vmlsldavxq_s16): Likewise.
18074 (__arm_vmlsldavq_s16): Likewise.
18075 (__arm_vmlaldavxq_s16): Likewise.
18076 (__arm_vmlaldavq_s16): Likewise.
18077 (__arm_vminnmvq_f16): Likewise.
18078 (__arm_vminnmq_f16): Likewise.
18079 (__arm_vminnmavq_f16): Likewise.
18080 (__arm_vminnmaq_f16): Likewise.
18081 (__arm_vmaxnmvq_f16): Likewise.
18082 (__arm_vmaxnmq_f16): Likewise.
18083 (__arm_vmaxnmavq_f16): Likewise.
18084 (__arm_vmaxnmaq_f16): Likewise.
18085 (__arm_veorq_f16): Likewise.
18086 (__arm_vcmulq_rot90_f16): Likewise.
18087 (__arm_vcmulq_rot270_f16): Likewise.
18088 (__arm_vcmulq_rot180_f16): Likewise.
18089 (__arm_vcmulq_f16): Likewise.
18090 (__arm_vcaddq_rot90_f16): Likewise.
18091 (__arm_vcaddq_rot270_f16): Likewise.
18092 (__arm_vbicq_f16): Likewise.
18093 (__arm_vandq_f16): Likewise.
18094 (__arm_vaddq_n_f16): Likewise.
18095 (__arm_vabdq_f16): Likewise.
18096 (__arm_vshlltq_n_s8): Likewise.
18097 (__arm_vshllbq_n_s8): Likewise.
18098 (__arm_vorrq_n_s16): Likewise.
18099 (__arm_vbicq_n_s16): Likewise.
18100 (__arm_vqmovntq_u32): Likewise.
18101 (__arm_vqmovnbq_u32): Likewise.
18102 (__arm_vmulltq_poly_p16): Likewise.
18103 (__arm_vmullbq_poly_p16): Likewise.
18104 (__arm_vmovntq_u32): Likewise.
18105 (__arm_vmovnbq_u32): Likewise.
18106 (__arm_vmlaldavxq_u32): Likewise.
18107 (__arm_vmlaldavq_u32): Likewise.
18108 (__arm_vqmovuntq_s32): Likewise.
18109 (__arm_vqmovunbq_s32): Likewise.
18110 (__arm_vshlltq_n_u16): Likewise.
18111 (__arm_vshllbq_n_u16): Likewise.
18112 (__arm_vorrq_n_u32): Likewise.
18113 (__arm_vbicq_n_u32): Likewise.
18114 (__arm_vcmpneq_n_f32): Likewise.
18115 (__arm_vcmpneq_f32): Likewise.
18116 (__arm_vcmpltq_n_f32): Likewise.
18117 (__arm_vcmpltq_f32): Likewise.
18118 (__arm_vcmpleq_n_f32): Likewise.
18119 (__arm_vcmpleq_f32): Likewise.
18120 (__arm_vcmpgtq_n_f32): Likewise.
18121 (__arm_vcmpgtq_f32): Likewise.
18122 (__arm_vcmpgeq_n_f32): Likewise.
18123 (__arm_vcmpgeq_f32): Likewise.
18124 (__arm_vcmpeqq_n_f32): Likewise.
18125 (__arm_vcmpeqq_f32): Likewise.
18126 (__arm_vsubq_f32): Likewise.
18127 (__arm_vqmovntq_s32): Likewise.
18128 (__arm_vqmovnbq_s32): Likewise.
18129 (__arm_vqdmulltq_s32): Likewise.
18130 (__arm_vqdmulltq_n_s32): Likewise.
18131 (__arm_vqdmullbq_s32): Likewise.
18132 (__arm_vqdmullbq_n_s32): Likewise.
18133 (__arm_vorrq_f32): Likewise.
18134 (__arm_vornq_f32): Likewise.
18135 (__arm_vmulq_n_f32): Likewise.
18136 (__arm_vmulq_f32): Likewise.
18137 (__arm_vmovntq_s32): Likewise.
18138 (__arm_vmovnbq_s32): Likewise.
18139 (__arm_vmlsldavxq_s32): Likewise.
18140 (__arm_vmlsldavq_s32): Likewise.
18141 (__arm_vmlaldavxq_s32): Likewise.
18142 (__arm_vmlaldavq_s32): Likewise.
18143 (__arm_vminnmvq_f32): Likewise.
18144 (__arm_vminnmq_f32): Likewise.
18145 (__arm_vminnmavq_f32): Likewise.
18146 (__arm_vminnmaq_f32): Likewise.
18147 (__arm_vmaxnmvq_f32): Likewise.
18148 (__arm_vmaxnmq_f32): Likewise.
18149 (__arm_vmaxnmavq_f32): Likewise.
18150 (__arm_vmaxnmaq_f32): Likewise.
18151 (__arm_veorq_f32): Likewise.
18152 (__arm_vcmulq_rot90_f32): Likewise.
18153 (__arm_vcmulq_rot270_f32): Likewise.
18154 (__arm_vcmulq_rot180_f32): Likewise.
18155 (__arm_vcmulq_f32): Likewise.
18156 (__arm_vcaddq_rot90_f32): Likewise.
18157 (__arm_vcaddq_rot270_f32): Likewise.
18158 (__arm_vbicq_f32): Likewise.
18159 (__arm_vandq_f32): Likewise.
18160 (__arm_vaddq_n_f32): Likewise.
18161 (__arm_vabdq_f32): Likewise.
18162 (__arm_vshlltq_n_s16): Likewise.
18163 (__arm_vshllbq_n_s16): Likewise.
18164 (__arm_vorrq_n_s32): Likewise.
18165 (__arm_vbicq_n_s32): Likewise.
18166 (__arm_vrmlaldavhq_u32): Likewise.
18167 (__arm_vctp8q_m): Likewise.
18168 (__arm_vctp64q_m): Likewise.
18169 (__arm_vctp32q_m): Likewise.
18170 (__arm_vctp16q_m): Likewise.
18171 (__arm_vaddlvaq_u32): Likewise.
18172 (__arm_vrmlsldavhxq_s32): Likewise.
18173 (__arm_vrmlsldavhq_s32): Likewise.
18174 (__arm_vrmlaldavhxq_s32): Likewise.
18175 (__arm_vrmlaldavhq_s32): Likewise.
18176 (__arm_vcvttq_f16_f32): Likewise.
18177 (__arm_vcvtbq_f16_f32): Likewise.
18178 (__arm_vaddlvaq_s32): Likewise.
18179 (vst4q): Define polymorphic variant.
18180 (vrndxq): Likewise.
18182 (vrndpq): Likewise.
18183 (vrndnq): Likewise.
18184 (vrndmq): Likewise.
18185 (vrndaq): Likewise.
18186 (vrev64q): Likewise.
18188 (vdupq_n): Likewise.
18190 (vrev32q): Likewise.
18191 (vcvtbq_f32): Likewise.
18192 (vcvttq_f32): Likewise.
18194 (vsubq_n): Likewise.
18195 (vbrsrq_n): Likewise.
18196 (vcvtq_n): Likewise.
18200 (vaddq_n): Likewise.
18204 (vmulq_n): Likewise.
18206 (vcaddq_rot270): Likewise.
18207 (vcmpeqq_n): Likewise.
18208 (vcmpeqq): Likewise.
18209 (vcaddq_rot90): Likewise.
18210 (vcmpgeq_n): Likewise.
18211 (vcmpgeq): Likewise.
18212 (vcmpgtq_n): Likewise.
18213 (vcmpgtq): Likewise.
18214 (vcmpgtq): Likewise.
18215 (vcmpleq_n): Likewise.
18216 (vcmpleq_n): Likewise.
18217 (vcmpleq): Likewise.
18218 (vcmpleq): Likewise.
18219 (vcmpltq_n): Likewise.
18220 (vcmpltq_n): Likewise.
18221 (vcmpltq): Likewise.
18222 (vcmpltq): Likewise.
18223 (vcmpneq_n): Likewise.
18224 (vcmpneq_n): Likewise.
18225 (vcmpneq): Likewise.
18226 (vcmpneq): Likewise.
18227 (vcmulq): Likewise.
18228 (vcmulq): Likewise.
18229 (vcmulq_rot180): Likewise.
18230 (vcmulq_rot180): Likewise.
18231 (vcmulq_rot270): Likewise.
18232 (vcmulq_rot270): Likewise.
18233 (vcmulq_rot90): Likewise.
18234 (vcmulq_rot90): Likewise.
18237 (vmaxnmaq): Likewise.
18238 (vmaxnmaq): Likewise.
18239 (vmaxnmavq): Likewise.
18240 (vmaxnmavq): Likewise.
18241 (vmaxnmq): Likewise.
18242 (vmaxnmq): Likewise.
18243 (vmaxnmvq): Likewise.
18244 (vmaxnmvq): Likewise.
18245 (vminnmaq): Likewise.
18246 (vminnmaq): Likewise.
18247 (vminnmavq): Likewise.
18248 (vminnmavq): Likewise.
18249 (vminnmq): Likewise.
18250 (vminnmq): Likewise.
18251 (vminnmvq): Likewise.
18252 (vminnmvq): Likewise.
18253 (vbicq_n): Likewise.
18254 (vqmovntq): Likewise.
18255 (vqmovntq): Likewise.
18256 (vqmovnbq): Likewise.
18257 (vqmovnbq): Likewise.
18258 (vmulltq_poly): Likewise.
18259 (vmulltq_poly): Likewise.
18260 (vmullbq_poly): Likewise.
18261 (vmullbq_poly): Likewise.
18262 (vmovntq): Likewise.
18263 (vmovntq): Likewise.
18264 (vmovnbq): Likewise.
18265 (vmovnbq): Likewise.
18266 (vmlaldavxq): Likewise.
18267 (vmlaldavxq): Likewise.
18268 (vqmovuntq): Likewise.
18269 (vqmovuntq): Likewise.
18270 (vshlltq_n): Likewise.
18271 (vshlltq_n): Likewise.
18272 (vshllbq_n): Likewise.
18273 (vshllbq_n): Likewise.
18274 (vorrq_n): Likewise.
18275 (vorrq_n): Likewise.
18276 (vmlaldavq): Likewise.
18277 (vmlaldavq): Likewise.
18278 (vqmovunbq): Likewise.
18279 (vqmovunbq): Likewise.
18280 (vqdmulltq_n): Likewise.
18281 (vqdmulltq_n): Likewise.
18282 (vqdmulltq): Likewise.
18283 (vqdmulltq): Likewise.
18284 (vqdmullbq_n): Likewise.
18285 (vqdmullbq_n): Likewise.
18286 (vqdmullbq): Likewise.
18287 (vqdmullbq): Likewise.
18288 (vaddlvaq): Likewise.
18289 (vaddlvaq): Likewise.
18290 (vrmlaldavhq): Likewise.
18291 (vrmlaldavhq): Likewise.
18292 (vrmlaldavhxq): Likewise.
18293 (vrmlaldavhxq): Likewise.
18294 (vrmlsldavhq): Likewise.
18295 (vrmlsldavhq): Likewise.
18296 (vrmlsldavhxq): Likewise.
18297 (vrmlsldavhxq): Likewise.
18298 (vmlsldavxq): Likewise.
18299 (vmlsldavxq): Likewise.
18300 (vmlsldavq): Likewise.
18301 (vmlsldavq): Likewise.
18302 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
18303 (BINOP_NONE_NONE_NONE): Likewise.
18304 (BINOP_UNONE_NONE_NONE): Likewise.
18305 (BINOP_UNONE_UNONE_IMM): Likewise.
18306 (BINOP_UNONE_UNONE_NONE): Likewise.
18307 (BINOP_UNONE_UNONE_UNONE): Likewise.
18308 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
18309 (mve_vaddlvaq_<supf>v4si): Likewise.
18310 (mve_vaddq_n_f<mode>): Likewise.
18311 (mve_vandq_f<mode>): Likewise.
18312 (mve_vbicq_f<mode>): Likewise.
18313 (mve_vbicq_n_<supf><mode>): Likewise.
18314 (mve_vcaddq_rot270_f<mode>): Likewise.
18315 (mve_vcaddq_rot90_f<mode>): Likewise.
18316 (mve_vcmpeqq_f<mode>): Likewise.
18317 (mve_vcmpeqq_n_f<mode>): Likewise.
18318 (mve_vcmpgeq_f<mode>): Likewise.
18319 (mve_vcmpgeq_n_f<mode>): Likewise.
18320 (mve_vcmpgtq_f<mode>): Likewise.
18321 (mve_vcmpgtq_n_f<mode>): Likewise.
18322 (mve_vcmpleq_f<mode>): Likewise.
18323 (mve_vcmpleq_n_f<mode>): Likewise.
18324 (mve_vcmpltq_f<mode>): Likewise.
18325 (mve_vcmpltq_n_f<mode>): Likewise.
18326 (mve_vcmpneq_f<mode>): Likewise.
18327 (mve_vcmpneq_n_f<mode>): Likewise.
18328 (mve_vcmulq_f<mode>): Likewise.
18329 (mve_vcmulq_rot180_f<mode>): Likewise.
18330 (mve_vcmulq_rot270_f<mode>): Likewise.
18331 (mve_vcmulq_rot90_f<mode>): Likewise.
18332 (mve_vctp<mode1>q_mhi): Likewise.
18333 (mve_vcvtbq_f16_f32v8hf): Likewise.
18334 (mve_vcvttq_f16_f32v8hf): Likewise.
18335 (mve_veorq_f<mode>): Likewise.
18336 (mve_vmaxnmaq_f<mode>): Likewise.
18337 (mve_vmaxnmavq_f<mode>): Likewise.
18338 (mve_vmaxnmq_f<mode>): Likewise.
18339 (mve_vmaxnmvq_f<mode>): Likewise.
18340 (mve_vminnmaq_f<mode>): Likewise.
18341 (mve_vminnmavq_f<mode>): Likewise.
18342 (mve_vminnmq_f<mode>): Likewise.
18343 (mve_vminnmvq_f<mode>): Likewise.
18344 (mve_vmlaldavq_<supf><mode>): Likewise.
18345 (mve_vmlaldavxq_<supf><mode>): Likewise.
18346 (mve_vmlsldavq_s<mode>): Likewise.
18347 (mve_vmlsldavxq_s<mode>): Likewise.
18348 (mve_vmovnbq_<supf><mode>): Likewise.
18349 (mve_vmovntq_<supf><mode>): Likewise.
18350 (mve_vmulq_f<mode>): Likewise.
18351 (mve_vmulq_n_f<mode>): Likewise.
18352 (mve_vornq_f<mode>): Likewise.
18353 (mve_vorrq_f<mode>): Likewise.
18354 (mve_vorrq_n_<supf><mode>): Likewise.
18355 (mve_vqdmullbq_n_s<mode>): Likewise.
18356 (mve_vqdmullbq_s<mode>): Likewise.
18357 (mve_vqdmulltq_n_s<mode>): Likewise.
18358 (mve_vqdmulltq_s<mode>): Likewise.
18359 (mve_vqmovnbq_<supf><mode>): Likewise.
18360 (mve_vqmovntq_<supf><mode>): Likewise.
18361 (mve_vqmovunbq_s<mode>): Likewise.
18362 (mve_vqmovuntq_s<mode>): Likewise.
18363 (mve_vrmlaldavhxq_sv4si): Likewise.
18364 (mve_vrmlsldavhq_sv4si): Likewise.
18365 (mve_vrmlsldavhxq_sv4si): Likewise.
18366 (mve_vshllbq_n_<supf><mode>): Likewise.
18367 (mve_vshlltq_n_<supf><mode>): Likewise.
18368 (mve_vsubq_f<mode>): Likewise.
18369 (mve_vmulltq_poly_p<mode>): Likewise.
18370 (mve_vmullbq_poly_p<mode>): Likewise.
18371 (mve_vrmlaldavhq_<supf>v4si): Likewise.
18373 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
18374 Mihail Ionescu <mihail.ionescu@arm.com>
18375 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
18377 * config/arm/arm_mve.h (vsubq_u8): Define macro.
18378 (vsubq_n_u8): Likewise.
18379 (vrmulhq_u8): Likewise.
18380 (vrhaddq_u8): Likewise.
18381 (vqsubq_u8): Likewise.
18382 (vqsubq_n_u8): Likewise.
18383 (vqaddq_u8): Likewise.
18384 (vqaddq_n_u8): Likewise.
18385 (vorrq_u8): Likewise.
18386 (vornq_u8): Likewise.
18387 (vmulq_u8): Likewise.
18388 (vmulq_n_u8): Likewise.
18389 (vmulltq_int_u8): Likewise.
18390 (vmullbq_int_u8): Likewise.
18391 (vmulhq_u8): Likewise.
18392 (vmladavq_u8): Likewise.
18393 (vminvq_u8): Likewise.
18394 (vminq_u8): Likewise.
18395 (vmaxvq_u8): Likewise.
18396 (vmaxq_u8): Likewise.
18397 (vhsubq_u8): Likewise.
18398 (vhsubq_n_u8): Likewise.
18399 (vhaddq_u8): Likewise.
18400 (vhaddq_n_u8): Likewise.
18401 (veorq_u8): Likewise.
18402 (vcmpneq_n_u8): Likewise.
18403 (vcmphiq_u8): Likewise.
18404 (vcmphiq_n_u8): Likewise.
18405 (vcmpeqq_u8): Likewise.
18406 (vcmpeqq_n_u8): Likewise.
18407 (vcmpcsq_u8): Likewise.
18408 (vcmpcsq_n_u8): Likewise.
18409 (vcaddq_rot90_u8): Likewise.
18410 (vcaddq_rot270_u8): Likewise.
18411 (vbicq_u8): Likewise.
18412 (vandq_u8): Likewise.
18413 (vaddvq_p_u8): Likewise.
18414 (vaddvaq_u8): Likewise.
18415 (vaddq_n_u8): Likewise.
18416 (vabdq_u8): Likewise.
18417 (vshlq_r_u8): Likewise.
18418 (vrshlq_u8): Likewise.
18419 (vrshlq_n_u8): Likewise.
18420 (vqshlq_u8): Likewise.
18421 (vqshlq_r_u8): Likewise.
18422 (vqrshlq_u8): Likewise.
18423 (vqrshlq_n_u8): Likewise.
18424 (vminavq_s8): Likewise.
18425 (vminaq_s8): Likewise.
18426 (vmaxavq_s8): Likewise.
18427 (vmaxaq_s8): Likewise.
18428 (vbrsrq_n_u8): Likewise.
18429 (vshlq_n_u8): Likewise.
18430 (vrshrq_n_u8): Likewise.
18431 (vqshlq_n_u8): Likewise.
18432 (vcmpneq_n_s8): Likewise.
18433 (vcmpltq_s8): Likewise.
18434 (vcmpltq_n_s8): Likewise.
18435 (vcmpleq_s8): Likewise.
18436 (vcmpleq_n_s8): Likewise.
18437 (vcmpgtq_s8): Likewise.
18438 (vcmpgtq_n_s8): Likewise.
18439 (vcmpgeq_s8): Likewise.
18440 (vcmpgeq_n_s8): Likewise.
18441 (vcmpeqq_s8): Likewise.
18442 (vcmpeqq_n_s8): Likewise.
18443 (vqshluq_n_s8): Likewise.
18444 (vaddvq_p_s8): Likewise.
18445 (vsubq_s8): Likewise.
18446 (vsubq_n_s8): Likewise.
18447 (vshlq_r_s8): Likewise.
18448 (vrshlq_s8): Likewise.
18449 (vrshlq_n_s8): Likewise.
18450 (vrmulhq_s8): Likewise.
18451 (vrhaddq_s8): Likewise.
18452 (vqsubq_s8): Likewise.
18453 (vqsubq_n_s8): Likewise.
18454 (vqshlq_s8): Likewise.
18455 (vqshlq_r_s8): Likewise.
18456 (vqrshlq_s8): Likewise.
18457 (vqrshlq_n_s8): Likewise.
18458 (vqrdmulhq_s8): Likewise.
18459 (vqrdmulhq_n_s8): Likewise.
18460 (vqdmulhq_s8): Likewise.
18461 (vqdmulhq_n_s8): Likewise.
18462 (vqaddq_s8): Likewise.
18463 (vqaddq_n_s8): Likewise.
18464 (vorrq_s8): Likewise.
18465 (vornq_s8): Likewise.
18466 (vmulq_s8): Likewise.
18467 (vmulq_n_s8): Likewise.
18468 (vmulltq_int_s8): Likewise.
18469 (vmullbq_int_s8): Likewise.
18470 (vmulhq_s8): Likewise.
18471 (vmlsdavxq_s8): Likewise.
18472 (vmlsdavq_s8): Likewise.
18473 (vmladavxq_s8): Likewise.
18474 (vmladavq_s8): Likewise.
18475 (vminvq_s8): Likewise.
18476 (vminq_s8): Likewise.
18477 (vmaxvq_s8): Likewise.
18478 (vmaxq_s8): Likewise.
18479 (vhsubq_s8): Likewise.
18480 (vhsubq_n_s8): Likewise.
18481 (vhcaddq_rot90_s8): Likewise.
18482 (vhcaddq_rot270_s8): Likewise.
18483 (vhaddq_s8): Likewise.
18484 (vhaddq_n_s8): Likewise.
18485 (veorq_s8): Likewise.
18486 (vcaddq_rot90_s8): Likewise.
18487 (vcaddq_rot270_s8): Likewise.
18488 (vbrsrq_n_s8): Likewise.
18489 (vbicq_s8): Likewise.
18490 (vandq_s8): Likewise.
18491 (vaddvaq_s8): Likewise.
18492 (vaddq_n_s8): Likewise.
18493 (vabdq_s8): Likewise.
18494 (vshlq_n_s8): Likewise.
18495 (vrshrq_n_s8): Likewise.
18496 (vqshlq_n_s8): Likewise.
18497 (vsubq_u16): Likewise.
18498 (vsubq_n_u16): Likewise.
18499 (vrmulhq_u16): Likewise.
18500 (vrhaddq_u16): Likewise.
18501 (vqsubq_u16): Likewise.
18502 (vqsubq_n_u16): Likewise.
18503 (vqaddq_u16): Likewise.
18504 (vqaddq_n_u16): Likewise.
18505 (vorrq_u16): Likewise.
18506 (vornq_u16): Likewise.
18507 (vmulq_u16): Likewise.
18508 (vmulq_n_u16): Likewise.
18509 (vmulltq_int_u16): Likewise.
18510 (vmullbq_int_u16): Likewise.
18511 (vmulhq_u16): Likewise.
18512 (vmladavq_u16): Likewise.
18513 (vminvq_u16): Likewise.
18514 (vminq_u16): Likewise.
18515 (vmaxvq_u16): Likewise.
18516 (vmaxq_u16): Likewise.
18517 (vhsubq_u16): Likewise.
18518 (vhsubq_n_u16): Likewise.
18519 (vhaddq_u16): Likewise.
18520 (vhaddq_n_u16): Likewise.
18521 (veorq_u16): Likewise.
18522 (vcmpneq_n_u16): Likewise.
18523 (vcmphiq_u16): Likewise.
18524 (vcmphiq_n_u16): Likewise.
18525 (vcmpeqq_u16): Likewise.
18526 (vcmpeqq_n_u16): Likewise.
18527 (vcmpcsq_u16): Likewise.
18528 (vcmpcsq_n_u16): Likewise.
18529 (vcaddq_rot90_u16): Likewise.
18530 (vcaddq_rot270_u16): Likewise.
18531 (vbicq_u16): Likewise.
18532 (vandq_u16): Likewise.
18533 (vaddvq_p_u16): Likewise.
18534 (vaddvaq_u16): Likewise.
18535 (vaddq_n_u16): Likewise.
18536 (vabdq_u16): Likewise.
18537 (vshlq_r_u16): Likewise.
18538 (vrshlq_u16): Likewise.
18539 (vrshlq_n_u16): Likewise.
18540 (vqshlq_u16): Likewise.
18541 (vqshlq_r_u16): Likewise.
18542 (vqrshlq_u16): Likewise.
18543 (vqrshlq_n_u16): Likewise.
18544 (vminavq_s16): Likewise.
18545 (vminaq_s16): Likewise.
18546 (vmaxavq_s16): Likewise.
18547 (vmaxaq_s16): Likewise.
18548 (vbrsrq_n_u16): Likewise.
18549 (vshlq_n_u16): Likewise.
18550 (vrshrq_n_u16): Likewise.
18551 (vqshlq_n_u16): Likewise.
18552 (vcmpneq_n_s16): Likewise.
18553 (vcmpltq_s16): Likewise.
18554 (vcmpltq_n_s16): Likewise.
18555 (vcmpleq_s16): Likewise.
18556 (vcmpleq_n_s16): Likewise.
18557 (vcmpgtq_s16): Likewise.
18558 (vcmpgtq_n_s16): Likewise.
18559 (vcmpgeq_s16): Likewise.
18560 (vcmpgeq_n_s16): Likewise.
18561 (vcmpeqq_s16): Likewise.
18562 (vcmpeqq_n_s16): Likewise.
18563 (vqshluq_n_s16): Likewise.
18564 (vaddvq_p_s16): Likewise.
18565 (vsubq_s16): Likewise.
18566 (vsubq_n_s16): Likewise.
18567 (vshlq_r_s16): Likewise.
18568 (vrshlq_s16): Likewise.
18569 (vrshlq_n_s16): Likewise.
18570 (vrmulhq_s16): Likewise.
18571 (vrhaddq_s16): Likewise.
18572 (vqsubq_s16): Likewise.
18573 (vqsubq_n_s16): Likewise.
18574 (vqshlq_s16): Likewise.
18575 (vqshlq_r_s16): Likewise.
18576 (vqrshlq_s16): Likewise.
18577 (vqrshlq_n_s16): Likewise.
18578 (vqrdmulhq_s16): Likewise.
18579 (vqrdmulhq_n_s16): Likewise.
18580 (vqdmulhq_s16): Likewise.
18581 (vqdmulhq_n_s16): Likewise.
18582 (vqaddq_s16): Likewise.
18583 (vqaddq_n_s16): Likewise.
18584 (vorrq_s16): Likewise.
18585 (vornq_s16): Likewise.
18586 (vmulq_s16): Likewise.
18587 (vmulq_n_s16): Likewise.
18588 (vmulltq_int_s16): Likewise.
18589 (vmullbq_int_s16): Likewise.
18590 (vmulhq_s16): Likewise.
18591 (vmlsdavxq_s16): Likewise.
18592 (vmlsdavq_s16): Likewise.
18593 (vmladavxq_s16): Likewise.
18594 (vmladavq_s16): Likewise.
18595 (vminvq_s16): Likewise.
18596 (vminq_s16): Likewise.
18597 (vmaxvq_s16): Likewise.
18598 (vmaxq_s16): Likewise.
18599 (vhsubq_s16): Likewise.
18600 (vhsubq_n_s16): Likewise.
18601 (vhcaddq_rot90_s16): Likewise.
18602 (vhcaddq_rot270_s16): Likewise.
18603 (vhaddq_s16): Likewise.
18604 (vhaddq_n_s16): Likewise.
18605 (veorq_s16): Likewise.
18606 (vcaddq_rot90_s16): Likewise.
18607 (vcaddq_rot270_s16): Likewise.
18608 (vbrsrq_n_s16): Likewise.
18609 (vbicq_s16): Likewise.
18610 (vandq_s16): Likewise.
18611 (vaddvaq_s16): Likewise.
18612 (vaddq_n_s16): Likewise.
18613 (vabdq_s16): Likewise.
18614 (vshlq_n_s16): Likewise.
18615 (vrshrq_n_s16): Likewise.
18616 (vqshlq_n_s16): Likewise.
18617 (vsubq_u32): Likewise.
18618 (vsubq_n_u32): Likewise.
18619 (vrmulhq_u32): Likewise.
18620 (vrhaddq_u32): Likewise.
18621 (vqsubq_u32): Likewise.
18622 (vqsubq_n_u32): Likewise.
18623 (vqaddq_u32): Likewise.
18624 (vqaddq_n_u32): Likewise.
18625 (vorrq_u32): Likewise.
18626 (vornq_u32): Likewise.
18627 (vmulq_u32): Likewise.
18628 (vmulq_n_u32): Likewise.
18629 (vmulltq_int_u32): Likewise.
18630 (vmullbq_int_u32): Likewise.
18631 (vmulhq_u32): Likewise.
18632 (vmladavq_u32): Likewise.
18633 (vminvq_u32): Likewise.
18634 (vminq_u32): Likewise.
18635 (vmaxvq_u32): Likewise.
18636 (vmaxq_u32): Likewise.
18637 (vhsubq_u32): Likewise.
18638 (vhsubq_n_u32): Likewise.
18639 (vhaddq_u32): Likewise.
18640 (vhaddq_n_u32): Likewise.
18641 (veorq_u32): Likewise.
18642 (vcmpneq_n_u32): Likewise.
18643 (vcmphiq_u32): Likewise.
18644 (vcmphiq_n_u32): Likewise.
18645 (vcmpeqq_u32): Likewise.
18646 (vcmpeqq_n_u32): Likewise.
18647 (vcmpcsq_u32): Likewise.
18648 (vcmpcsq_n_u32): Likewise.
18649 (vcaddq_rot90_u32): Likewise.
18650 (vcaddq_rot270_u32): Likewise.
18651 (vbicq_u32): Likewise.
18652 (vandq_u32): Likewise.
18653 (vaddvq_p_u32): Likewise.
18654 (vaddvaq_u32): Likewise.
18655 (vaddq_n_u32): Likewise.
18656 (vabdq_u32): Likewise.
18657 (vshlq_r_u32): Likewise.
18658 (vrshlq_u32): Likewise.
18659 (vrshlq_n_u32): Likewise.
18660 (vqshlq_u32): Likewise.
18661 (vqshlq_r_u32): Likewise.
18662 (vqrshlq_u32): Likewise.
18663 (vqrshlq_n_u32): Likewise.
18664 (vminavq_s32): Likewise.
18665 (vminaq_s32): Likewise.
18666 (vmaxavq_s32): Likewise.
18667 (vmaxaq_s32): Likewise.
18668 (vbrsrq_n_u32): Likewise.
18669 (vshlq_n_u32): Likewise.
18670 (vrshrq_n_u32): Likewise.
18671 (vqshlq_n_u32): Likewise.
18672 (vcmpneq_n_s32): Likewise.
18673 (vcmpltq_s32): Likewise.
18674 (vcmpltq_n_s32): Likewise.
18675 (vcmpleq_s32): Likewise.
18676 (vcmpleq_n_s32): Likewise.
18677 (vcmpgtq_s32): Likewise.
18678 (vcmpgtq_n_s32): Likewise.
18679 (vcmpgeq_s32): Likewise.
18680 (vcmpgeq_n_s32): Likewise.
18681 (vcmpeqq_s32): Likewise.
18682 (vcmpeqq_n_s32): Likewise.
18683 (vqshluq_n_s32): Likewise.
18684 (vaddvq_p_s32): Likewise.
18685 (vsubq_s32): Likewise.
18686 (vsubq_n_s32): Likewise.
18687 (vshlq_r_s32): Likewise.
18688 (vrshlq_s32): Likewise.
18689 (vrshlq_n_s32): Likewise.
18690 (vrmulhq_s32): Likewise.
18691 (vrhaddq_s32): Likewise.
18692 (vqsubq_s32): Likewise.
18693 (vqsubq_n_s32): Likewise.
18694 (vqshlq_s32): Likewise.
18695 (vqshlq_r_s32): Likewise.
18696 (vqrshlq_s32): Likewise.
18697 (vqrshlq_n_s32): Likewise.
18698 (vqrdmulhq_s32): Likewise.
18699 (vqrdmulhq_n_s32): Likewise.
18700 (vqdmulhq_s32): Likewise.
18701 (vqdmulhq_n_s32): Likewise.
18702 (vqaddq_s32): Likewise.
18703 (vqaddq_n_s32): Likewise.
18704 (vorrq_s32): Likewise.
18705 (vornq_s32): Likewise.
18706 (vmulq_s32): Likewise.
18707 (vmulq_n_s32): Likewise.
18708 (vmulltq_int_s32): Likewise.
18709 (vmullbq_int_s32): Likewise.
18710 (vmulhq_s32): Likewise.
18711 (vmlsdavxq_s32): Likewise.
18712 (vmlsdavq_s32): Likewise.
18713 (vmladavxq_s32): Likewise.
18714 (vmladavq_s32): Likewise.
18715 (vminvq_s32): Likewise.
18716 (vminq_s32): Likewise.
18717 (vmaxvq_s32): Likewise.
18718 (vmaxq_s32): Likewise.
18719 (vhsubq_s32): Likewise.
18720 (vhsubq_n_s32): Likewise.
18721 (vhcaddq_rot90_s32): Likewise.
18722 (vhcaddq_rot270_s32): Likewise.
18723 (vhaddq_s32): Likewise.
18724 (vhaddq_n_s32): Likewise.
18725 (veorq_s32): Likewise.
18726 (vcaddq_rot90_s32): Likewise.
18727 (vcaddq_rot270_s32): Likewise.
18728 (vbrsrq_n_s32): Likewise.
18729 (vbicq_s32): Likewise.
18730 (vandq_s32): Likewise.
18731 (vaddvaq_s32): Likewise.
18732 (vaddq_n_s32): Likewise.
18733 (vabdq_s32): Likewise.
18734 (vshlq_n_s32): Likewise.
18735 (vrshrq_n_s32): Likewise.
18736 (vqshlq_n_s32): Likewise.
18737 (__arm_vsubq_u8): Define intrinsic.
18738 (__arm_vsubq_n_u8): Likewise.
18739 (__arm_vrmulhq_u8): Likewise.
18740 (__arm_vrhaddq_u8): Likewise.
18741 (__arm_vqsubq_u8): Likewise.
18742 (__arm_vqsubq_n_u8): Likewise.
18743 (__arm_vqaddq_u8): Likewise.
18744 (__arm_vqaddq_n_u8): Likewise.
18745 (__arm_vorrq_u8): Likewise.
18746 (__arm_vornq_u8): Likewise.
18747 (__arm_vmulq_u8): Likewise.
18748 (__arm_vmulq_n_u8): Likewise.
18749 (__arm_vmulltq_int_u8): Likewise.
18750 (__arm_vmullbq_int_u8): Likewise.
18751 (__arm_vmulhq_u8): Likewise.
18752 (__arm_vmladavq_u8): Likewise.
18753 (__arm_vminvq_u8): Likewise.
18754 (__arm_vminq_u8): Likewise.
18755 (__arm_vmaxvq_u8): Likewise.
18756 (__arm_vmaxq_u8): Likewise.
18757 (__arm_vhsubq_u8): Likewise.
18758 (__arm_vhsubq_n_u8): Likewise.
18759 (__arm_vhaddq_u8): Likewise.
18760 (__arm_vhaddq_n_u8): Likewise.
18761 (__arm_veorq_u8): Likewise.
18762 (__arm_vcmpneq_n_u8): Likewise.
18763 (__arm_vcmphiq_u8): Likewise.
18764 (__arm_vcmphiq_n_u8): Likewise.
18765 (__arm_vcmpeqq_u8): Likewise.
18766 (__arm_vcmpeqq_n_u8): Likewise.
18767 (__arm_vcmpcsq_u8): Likewise.
18768 (__arm_vcmpcsq_n_u8): Likewise.
18769 (__arm_vcaddq_rot90_u8): Likewise.
18770 (__arm_vcaddq_rot270_u8): Likewise.
18771 (__arm_vbicq_u8): Likewise.
18772 (__arm_vandq_u8): Likewise.
18773 (__arm_vaddvq_p_u8): Likewise.
18774 (__arm_vaddvaq_u8): Likewise.
18775 (__arm_vaddq_n_u8): Likewise.
18776 (__arm_vabdq_u8): Likewise.
18777 (__arm_vshlq_r_u8): Likewise.
18778 (__arm_vrshlq_u8): Likewise.
18779 (__arm_vrshlq_n_u8): Likewise.
18780 (__arm_vqshlq_u8): Likewise.
18781 (__arm_vqshlq_r_u8): Likewise.
18782 (__arm_vqrshlq_u8): Likewise.
18783 (__arm_vqrshlq_n_u8): Likewise.
18784 (__arm_vminavq_s8): Likewise.
18785 (__arm_vminaq_s8): Likewise.
18786 (__arm_vmaxavq_s8): Likewise.
18787 (__arm_vmaxaq_s8): Likewise.
18788 (__arm_vbrsrq_n_u8): Likewise.
18789 (__arm_vshlq_n_u8): Likewise.
18790 (__arm_vrshrq_n_u8): Likewise.
18791 (__arm_vqshlq_n_u8): Likewise.
18792 (__arm_vcmpneq_n_s8): Likewise.
18793 (__arm_vcmpltq_s8): Likewise.
18794 (__arm_vcmpltq_n_s8): Likewise.
18795 (__arm_vcmpleq_s8): Likewise.
18796 (__arm_vcmpleq_n_s8): Likewise.
18797 (__arm_vcmpgtq_s8): Likewise.
18798 (__arm_vcmpgtq_n_s8): Likewise.
18799 (__arm_vcmpgeq_s8): Likewise.
18800 (__arm_vcmpgeq_n_s8): Likewise.
18801 (__arm_vcmpeqq_s8): Likewise.
18802 (__arm_vcmpeqq_n_s8): Likewise.
18803 (__arm_vqshluq_n_s8): Likewise.
18804 (__arm_vaddvq_p_s8): Likewise.
18805 (__arm_vsubq_s8): Likewise.
18806 (__arm_vsubq_n_s8): Likewise.
18807 (__arm_vshlq_r_s8): Likewise.
18808 (__arm_vrshlq_s8): Likewise.
18809 (__arm_vrshlq_n_s8): Likewise.
18810 (__arm_vrmulhq_s8): Likewise.
18811 (__arm_vrhaddq_s8): Likewise.
18812 (__arm_vqsubq_s8): Likewise.
18813 (__arm_vqsubq_n_s8): Likewise.
18814 (__arm_vqshlq_s8): Likewise.
18815 (__arm_vqshlq_r_s8): Likewise.
18816 (__arm_vqrshlq_s8): Likewise.
18817 (__arm_vqrshlq_n_s8): Likewise.
18818 (__arm_vqrdmulhq_s8): Likewise.
18819 (__arm_vqrdmulhq_n_s8): Likewise.
18820 (__arm_vqdmulhq_s8): Likewise.
18821 (__arm_vqdmulhq_n_s8): Likewise.
18822 (__arm_vqaddq_s8): Likewise.
18823 (__arm_vqaddq_n_s8): Likewise.
18824 (__arm_vorrq_s8): Likewise.
18825 (__arm_vornq_s8): Likewise.
18826 (__arm_vmulq_s8): Likewise.
18827 (__arm_vmulq_n_s8): Likewise.
18828 (__arm_vmulltq_int_s8): Likewise.
18829 (__arm_vmullbq_int_s8): Likewise.
18830 (__arm_vmulhq_s8): Likewise.
18831 (__arm_vmlsdavxq_s8): Likewise.
18832 (__arm_vmlsdavq_s8): Likewise.
18833 (__arm_vmladavxq_s8): Likewise.
18834 (__arm_vmladavq_s8): Likewise.
18835 (__arm_vminvq_s8): Likewise.
18836 (__arm_vminq_s8): Likewise.
18837 (__arm_vmaxvq_s8): Likewise.
18838 (__arm_vmaxq_s8): Likewise.
18839 (__arm_vhsubq_s8): Likewise.
18840 (__arm_vhsubq_n_s8): Likewise.
18841 (__arm_vhcaddq_rot90_s8): Likewise.
18842 (__arm_vhcaddq_rot270_s8): Likewise.
18843 (__arm_vhaddq_s8): Likewise.
18844 (__arm_vhaddq_n_s8): Likewise.
18845 (__arm_veorq_s8): Likewise.
18846 (__arm_vcaddq_rot90_s8): Likewise.
18847 (__arm_vcaddq_rot270_s8): Likewise.
18848 (__arm_vbrsrq_n_s8): Likewise.
18849 (__arm_vbicq_s8): Likewise.
18850 (__arm_vandq_s8): Likewise.
18851 (__arm_vaddvaq_s8): Likewise.
18852 (__arm_vaddq_n_s8): Likewise.
18853 (__arm_vabdq_s8): Likewise.
18854 (__arm_vshlq_n_s8): Likewise.
18855 (__arm_vrshrq_n_s8): Likewise.
18856 (__arm_vqshlq_n_s8): Likewise.
18857 (__arm_vsubq_u16): Likewise.
18858 (__arm_vsubq_n_u16): Likewise.
18859 (__arm_vrmulhq_u16): Likewise.
18860 (__arm_vrhaddq_u16): Likewise.
18861 (__arm_vqsubq_u16): Likewise.
18862 (__arm_vqsubq_n_u16): Likewise.
18863 (__arm_vqaddq_u16): Likewise.
18864 (__arm_vqaddq_n_u16): Likewise.
18865 (__arm_vorrq_u16): Likewise.
18866 (__arm_vornq_u16): Likewise.
18867 (__arm_vmulq_u16): Likewise.
18868 (__arm_vmulq_n_u16): Likewise.
18869 (__arm_vmulltq_int_u16): Likewise.
18870 (__arm_vmullbq_int_u16): Likewise.
18871 (__arm_vmulhq_u16): Likewise.
18872 (__arm_vmladavq_u16): Likewise.
18873 (__arm_vminvq_u16): Likewise.
18874 (__arm_vminq_u16): Likewise.
18875 (__arm_vmaxvq_u16): Likewise.
18876 (__arm_vmaxq_u16): Likewise.
18877 (__arm_vhsubq_u16): Likewise.
18878 (__arm_vhsubq_n_u16): Likewise.
18879 (__arm_vhaddq_u16): Likewise.
18880 (__arm_vhaddq_n_u16): Likewise.
18881 (__arm_veorq_u16): Likewise.
18882 (__arm_vcmpneq_n_u16): Likewise.
18883 (__arm_vcmphiq_u16): Likewise.
18884 (__arm_vcmphiq_n_u16): Likewise.
18885 (__arm_vcmpeqq_u16): Likewise.
18886 (__arm_vcmpeqq_n_u16): Likewise.
18887 (__arm_vcmpcsq_u16): Likewise.
18888 (__arm_vcmpcsq_n_u16): Likewise.
18889 (__arm_vcaddq_rot90_u16): Likewise.
18890 (__arm_vcaddq_rot270_u16): Likewise.
18891 (__arm_vbicq_u16): Likewise.
18892 (__arm_vandq_u16): Likewise.
18893 (__arm_vaddvq_p_u16): Likewise.
18894 (__arm_vaddvaq_u16): Likewise.
18895 (__arm_vaddq_n_u16): Likewise.
18896 (__arm_vabdq_u16): Likewise.
18897 (__arm_vshlq_r_u16): Likewise.
18898 (__arm_vrshlq_u16): Likewise.
18899 (__arm_vrshlq_n_u16): Likewise.
18900 (__arm_vqshlq_u16): Likewise.
18901 (__arm_vqshlq_r_u16): Likewise.
18902 (__arm_vqrshlq_u16): Likewise.
18903 (__arm_vqrshlq_n_u16): Likewise.
18904 (__arm_vminavq_s16): Likewise.
18905 (__arm_vminaq_s16): Likewise.
18906 (__arm_vmaxavq_s16): Likewise.
18907 (__arm_vmaxaq_s16): Likewise.
18908 (__arm_vbrsrq_n_u16): Likewise.
18909 (__arm_vshlq_n_u16): Likewise.
18910 (__arm_vrshrq_n_u16): Likewise.
18911 (__arm_vqshlq_n_u16): Likewise.
18912 (__arm_vcmpneq_n_s16): Likewise.
18913 (__arm_vcmpltq_s16): Likewise.
18914 (__arm_vcmpltq_n_s16): Likewise.
18915 (__arm_vcmpleq_s16): Likewise.
18916 (__arm_vcmpleq_n_s16): Likewise.
18917 (__arm_vcmpgtq_s16): Likewise.
18918 (__arm_vcmpgtq_n_s16): Likewise.
18919 (__arm_vcmpgeq_s16): Likewise.
18920 (__arm_vcmpgeq_n_s16): Likewise.
18921 (__arm_vcmpeqq_s16): Likewise.
18922 (__arm_vcmpeqq_n_s16): Likewise.
18923 (__arm_vqshluq_n_s16): Likewise.
18924 (__arm_vaddvq_p_s16): Likewise.
18925 (__arm_vsubq_s16): Likewise.
18926 (__arm_vsubq_n_s16): Likewise.
18927 (__arm_vshlq_r_s16): Likewise.
18928 (__arm_vrshlq_s16): Likewise.
18929 (__arm_vrshlq_n_s16): Likewise.
18930 (__arm_vrmulhq_s16): Likewise.
18931 (__arm_vrhaddq_s16): Likewise.
18932 (__arm_vqsubq_s16): Likewise.
18933 (__arm_vqsubq_n_s16): Likewise.
18934 (__arm_vqshlq_s16): Likewise.
18935 (__arm_vqshlq_r_s16): Likewise.
18936 (__arm_vqrshlq_s16): Likewise.
18937 (__arm_vqrshlq_n_s16): Likewise.
18938 (__arm_vqrdmulhq_s16): Likewise.
18939 (__arm_vqrdmulhq_n_s16): Likewise.
18940 (__arm_vqdmulhq_s16): Likewise.
18941 (__arm_vqdmulhq_n_s16): Likewise.
18942 (__arm_vqaddq_s16): Likewise.
18943 (__arm_vqaddq_n_s16): Likewise.
18944 (__arm_vorrq_s16): Likewise.
18945 (__arm_vornq_s16): Likewise.
18946 (__arm_vmulq_s16): Likewise.
18947 (__arm_vmulq_n_s16): Likewise.
18948 (__arm_vmulltq_int_s16): Likewise.
18949 (__arm_vmullbq_int_s16): Likewise.
18950 (__arm_vmulhq_s16): Likewise.
18951 (__arm_vmlsdavxq_s16): Likewise.
18952 (__arm_vmlsdavq_s16): Likewise.
18953 (__arm_vmladavxq_s16): Likewise.
18954 (__arm_vmladavq_s16): Likewise.
18955 (__arm_vminvq_s16): Likewise.
18956 (__arm_vminq_s16): Likewise.
18957 (__arm_vmaxvq_s16): Likewise.
18958 (__arm_vmaxq_s16): Likewise.
18959 (__arm_vhsubq_s16): Likewise.
18960 (__arm_vhsubq_n_s16): Likewise.
18961 (__arm_vhcaddq_rot90_s16): Likewise.
18962 (__arm_vhcaddq_rot270_s16): Likewise.
18963 (__arm_vhaddq_s16): Likewise.
18964 (__arm_vhaddq_n_s16): Likewise.
18965 (__arm_veorq_s16): Likewise.
18966 (__arm_vcaddq_rot90_s16): Likewise.
18967 (__arm_vcaddq_rot270_s16): Likewise.
18968 (__arm_vbrsrq_n_s16): Likewise.
18969 (__arm_vbicq_s16): Likewise.
18970 (__arm_vandq_s16): Likewise.
18971 (__arm_vaddvaq_s16): Likewise.
18972 (__arm_vaddq_n_s16): Likewise.
18973 (__arm_vabdq_s16): Likewise.
18974 (__arm_vshlq_n_s16): Likewise.
18975 (__arm_vrshrq_n_s16): Likewise.
18976 (__arm_vqshlq_n_s16): Likewise.
18977 (__arm_vsubq_u32): Likewise.
18978 (__arm_vsubq_n_u32): Likewise.
18979 (__arm_vrmulhq_u32): Likewise.
18980 (__arm_vrhaddq_u32): Likewise.
18981 (__arm_vqsubq_u32): Likewise.
18982 (__arm_vqsubq_n_u32): Likewise.
18983 (__arm_vqaddq_u32): Likewise.
18984 (__arm_vqaddq_n_u32): Likewise.
18985 (__arm_vorrq_u32): Likewise.
18986 (__arm_vornq_u32): Likewise.
18987 (__arm_vmulq_u32): Likewise.
18988 (__arm_vmulq_n_u32): Likewise.
18989 (__arm_vmulltq_int_u32): Likewise.
18990 (__arm_vmullbq_int_u32): Likewise.
18991 (__arm_vmulhq_u32): Likewise.
18992 (__arm_vmladavq_u32): Likewise.
18993 (__arm_vminvq_u32): Likewise.
18994 (__arm_vminq_u32): Likewise.
18995 (__arm_vmaxvq_u32): Likewise.
18996 (__arm_vmaxq_u32): Likewise.
18997 (__arm_vhsubq_u32): Likewise.
18998 (__arm_vhsubq_n_u32): Likewise.
18999 (__arm_vhaddq_u32): Likewise.
19000 (__arm_vhaddq_n_u32): Likewise.
19001 (__arm_veorq_u32): Likewise.
19002 (__arm_vcmpneq_n_u32): Likewise.
19003 (__arm_vcmphiq_u32): Likewise.
19004 (__arm_vcmphiq_n_u32): Likewise.
19005 (__arm_vcmpeqq_u32): Likewise.
19006 (__arm_vcmpeqq_n_u32): Likewise.
19007 (__arm_vcmpcsq_u32): Likewise.
19008 (__arm_vcmpcsq_n_u32): Likewise.
19009 (__arm_vcaddq_rot90_u32): Likewise.
19010 (__arm_vcaddq_rot270_u32): Likewise.
19011 (__arm_vbicq_u32): Likewise.
19012 (__arm_vandq_u32): Likewise.
19013 (__arm_vaddvq_p_u32): Likewise.
19014 (__arm_vaddvaq_u32): Likewise.
19015 (__arm_vaddq_n_u32): Likewise.
19016 (__arm_vabdq_u32): Likewise.
19017 (__arm_vshlq_r_u32): Likewise.
19018 (__arm_vrshlq_u32): Likewise.
19019 (__arm_vrshlq_n_u32): Likewise.
19020 (__arm_vqshlq_u32): Likewise.
19021 (__arm_vqshlq_r_u32): Likewise.
19022 (__arm_vqrshlq_u32): Likewise.
19023 (__arm_vqrshlq_n_u32): Likewise.
19024 (__arm_vminavq_s32): Likewise.
19025 (__arm_vminaq_s32): Likewise.
19026 (__arm_vmaxavq_s32): Likewise.
19027 (__arm_vmaxaq_s32): Likewise.
19028 (__arm_vbrsrq_n_u32): Likewise.
19029 (__arm_vshlq_n_u32): Likewise.
19030 (__arm_vrshrq_n_u32): Likewise.
19031 (__arm_vqshlq_n_u32): Likewise.
19032 (__arm_vcmpneq_n_s32): Likewise.
19033 (__arm_vcmpltq_s32): Likewise.
19034 (__arm_vcmpltq_n_s32): Likewise.
19035 (__arm_vcmpleq_s32): Likewise.
19036 (__arm_vcmpleq_n_s32): Likewise.
19037 (__arm_vcmpgtq_s32): Likewise.
19038 (__arm_vcmpgtq_n_s32): Likewise.
19039 (__arm_vcmpgeq_s32): Likewise.
19040 (__arm_vcmpgeq_n_s32): Likewise.
19041 (__arm_vcmpeqq_s32): Likewise.
19042 (__arm_vcmpeqq_n_s32): Likewise.
19043 (__arm_vqshluq_n_s32): Likewise.
19044 (__arm_vaddvq_p_s32): Likewise.
19045 (__arm_vsubq_s32): Likewise.
19046 (__arm_vsubq_n_s32): Likewise.
19047 (__arm_vshlq_r_s32): Likewise.
19048 (__arm_vrshlq_s32): Likewise.
19049 (__arm_vrshlq_n_s32): Likewise.
19050 (__arm_vrmulhq_s32): Likewise.
19051 (__arm_vrhaddq_s32): Likewise.
19052 (__arm_vqsubq_s32): Likewise.
19053 (__arm_vqsubq_n_s32): Likewise.
19054 (__arm_vqshlq_s32): Likewise.
19055 (__arm_vqshlq_r_s32): Likewise.
19056 (__arm_vqrshlq_s32): Likewise.
19057 (__arm_vqrshlq_n_s32): Likewise.
19058 (__arm_vqrdmulhq_s32): Likewise.
19059 (__arm_vqrdmulhq_n_s32): Likewise.
19060 (__arm_vqdmulhq_s32): Likewise.
19061 (__arm_vqdmulhq_n_s32): Likewise.
19062 (__arm_vqaddq_s32): Likewise.
19063 (__arm_vqaddq_n_s32): Likewise.
19064 (__arm_vorrq_s32): Likewise.
19065 (__arm_vornq_s32): Likewise.
19066 (__arm_vmulq_s32): Likewise.
19067 (__arm_vmulq_n_s32): Likewise.
19068 (__arm_vmulltq_int_s32): Likewise.
19069 (__arm_vmullbq_int_s32): Likewise.
19070 (__arm_vmulhq_s32): Likewise.
19071 (__arm_vmlsdavxq_s32): Likewise.
19072 (__arm_vmlsdavq_s32): Likewise.
19073 (__arm_vmladavxq_s32): Likewise.
19074 (__arm_vmladavq_s32): Likewise.
19075 (__arm_vminvq_s32): Likewise.
19076 (__arm_vminq_s32): Likewise.
19077 (__arm_vmaxvq_s32): Likewise.
19078 (__arm_vmaxq_s32): Likewise.
19079 (__arm_vhsubq_s32): Likewise.
19080 (__arm_vhsubq_n_s32): Likewise.
19081 (__arm_vhcaddq_rot90_s32): Likewise.
19082 (__arm_vhcaddq_rot270_s32): Likewise.
19083 (__arm_vhaddq_s32): Likewise.
19084 (__arm_vhaddq_n_s32): Likewise.
19085 (__arm_veorq_s32): Likewise.
19086 (__arm_vcaddq_rot90_s32): Likewise.
19087 (__arm_vcaddq_rot270_s32): Likewise.
19088 (__arm_vbrsrq_n_s32): Likewise.
19089 (__arm_vbicq_s32): Likewise.
19090 (__arm_vandq_s32): Likewise.
19091 (__arm_vaddvaq_s32): Likewise.
19092 (__arm_vaddq_n_s32): Likewise.
19093 (__arm_vabdq_s32): Likewise.
19094 (__arm_vshlq_n_s32): Likewise.
19095 (__arm_vrshrq_n_s32): Likewise.
19096 (__arm_vqshlq_n_s32): Likewise.
19097 (vsubq): Define polymorphic variant.
19098 (vsubq_n): Likewise.
19099 (vshlq_r): Likewise.
19100 (vrshlq_n): Likewise.
19101 (vrshlq): Likewise.
19102 (vrmulhq): Likewise.
19103 (vrhaddq): Likewise.
19104 (vqsubq_n): Likewise.
19105 (vqsubq): Likewise.
19106 (vqshlq): Likewise.
19107 (vqshlq_r): Likewise.
19108 (vqshluq): Likewise.
19109 (vrshrq_n): Likewise.
19110 (vshlq_n): Likewise.
19111 (vqshluq_n): Likewise.
19112 (vqshlq_n): Likewise.
19113 (vqrshlq_n): Likewise.
19114 (vqrshlq): Likewise.
19115 (vqrdmulhq_n): Likewise.
19116 (vqrdmulhq): Likewise.
19117 (vqdmulhq_n): Likewise.
19118 (vqdmulhq): Likewise.
19119 (vqaddq_n): Likewise.
19120 (vqaddq): Likewise.
19121 (vorrq_n): Likewise.
19124 (vmulq_n): Likewise.
19126 (vmulltq_int): Likewise.
19127 (vmullbq_int): Likewise.
19128 (vmulhq): Likewise.
19130 (vminaq): Likewise.
19132 (vmaxaq): Likewise.
19133 (vhsubq_n): Likewise.
19134 (vhsubq): Likewise.
19135 (vhcaddq_rot90): Likewise.
19136 (vhcaddq_rot270): Likewise.
19137 (vhaddq_n): Likewise.
19138 (vhaddq): Likewise.
19140 (vcaddq_rot90): Likewise.
19141 (vcaddq_rot270): Likewise.
19142 (vbrsrq_n): Likewise.
19143 (vbicq_n): Likewise.
19146 (vaddq_n): Likewise.
19149 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
19150 (BINOP_NONE_NONE_NONE): Likewise.
19151 (BINOP_NONE_NONE_UNONE): Likewise.
19152 (BINOP_UNONE_NONE_IMM): Likewise.
19153 (BINOP_UNONE_NONE_NONE): Likewise.
19154 (BINOP_UNONE_UNONE_IMM): Likewise.
19155 (BINOP_UNONE_UNONE_NONE): Likewise.
19156 (BINOP_UNONE_UNONE_UNONE): Likewise.
19157 * config/arm/constraints.md (Ra): Define constraint to check constant is
19158 in the range of 0 to 7.
19159 (Rg): Define constriant to check the constant is one among 1, 2, 4
19161 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
19162 (mve_vaddq_n_<supf>): Likewise.
19163 (mve_vaddvaq_<supf>): Likewise.
19164 (mve_vaddvq_p_<supf>): Likewise.
19165 (mve_vandq_<supf>): Likewise.
19166 (mve_vbicq_<supf>): Likewise.
19167 (mve_vbrsrq_n_<supf>): Likewise.
19168 (mve_vcaddq_rot270_<supf>): Likewise.
19169 (mve_vcaddq_rot90_<supf>): Likewise.
19170 (mve_vcmpcsq_n_u): Likewise.
19171 (mve_vcmpcsq_u): Likewise.
19172 (mve_vcmpeqq_n_<supf>): Likewise.
19173 (mve_vcmpeqq_<supf>): Likewise.
19174 (mve_vcmpgeq_n_s): Likewise.
19175 (mve_vcmpgeq_s): Likewise.
19176 (mve_vcmpgtq_n_s): Likewise.
19177 (mve_vcmpgtq_s): Likewise.
19178 (mve_vcmphiq_n_u): Likewise.
19179 (mve_vcmphiq_u): Likewise.
19180 (mve_vcmpleq_n_s): Likewise.
19181 (mve_vcmpleq_s): Likewise.
19182 (mve_vcmpltq_n_s): Likewise.
19183 (mve_vcmpltq_s): Likewise.
19184 (mve_vcmpneq_n_<supf>): Likewise.
19185 (mve_vddupq_n_u): Likewise.
19186 (mve_veorq_<supf>): Likewise.
19187 (mve_vhaddq_n_<supf>): Likewise.
19188 (mve_vhaddq_<supf>): Likewise.
19189 (mve_vhcaddq_rot270_s): Likewise.
19190 (mve_vhcaddq_rot90_s): Likewise.
19191 (mve_vhsubq_n_<supf>): Likewise.
19192 (mve_vhsubq_<supf>): Likewise.
19193 (mve_vidupq_n_u): Likewise.
19194 (mve_vmaxaq_s): Likewise.
19195 (mve_vmaxavq_s): Likewise.
19196 (mve_vmaxq_<supf>): Likewise.
19197 (mve_vmaxvq_<supf>): Likewise.
19198 (mve_vminaq_s): Likewise.
19199 (mve_vminavq_s): Likewise.
19200 (mve_vminq_<supf>): Likewise.
19201 (mve_vminvq_<supf>): Likewise.
19202 (mve_vmladavq_<supf>): Likewise.
19203 (mve_vmladavxq_s): Likewise.
19204 (mve_vmlsdavq_s): Likewise.
19205 (mve_vmlsdavxq_s): Likewise.
19206 (mve_vmulhq_<supf>): Likewise.
19207 (mve_vmullbq_int_<supf>): Likewise.
19208 (mve_vmulltq_int_<supf>): Likewise.
19209 (mve_vmulq_n_<supf>): Likewise.
19210 (mve_vmulq_<supf>): Likewise.
19211 (mve_vornq_<supf>): Likewise.
19212 (mve_vorrq_<supf>): Likewise.
19213 (mve_vqaddq_n_<supf>): Likewise.
19214 (mve_vqaddq_<supf>): Likewise.
19215 (mve_vqdmulhq_n_s): Likewise.
19216 (mve_vqdmulhq_s): Likewise.
19217 (mve_vqrdmulhq_n_s): Likewise.
19218 (mve_vqrdmulhq_s): Likewise.
19219 (mve_vqrshlq_n_<supf>): Likewise.
19220 (mve_vqrshlq_<supf>): Likewise.
19221 (mve_vqshlq_n_<supf>): Likewise.
19222 (mve_vqshlq_r_<supf>): Likewise.
19223 (mve_vqshlq_<supf>): Likewise.
19224 (mve_vqshluq_n_s): Likewise.
19225 (mve_vqsubq_n_<supf>): Likewise.
19226 (mve_vqsubq_<supf>): Likewise.
19227 (mve_vrhaddq_<supf>): Likewise.
19228 (mve_vrmulhq_<supf>): Likewise.
19229 (mve_vrshlq_n_<supf>): Likewise.
19230 (mve_vrshlq_<supf>): Likewise.
19231 (mve_vrshrq_n_<supf>): Likewise.
19232 (mve_vshlq_n_<supf>): Likewise.
19233 (mve_vshlq_r_<supf>): Likewise.
19234 (mve_vsubq_n_<supf>): Likewise.
19235 (mve_vsubq_<supf>): Likewise.
19236 * config/arm/predicates.md (mve_imm_7): Define predicate to check
19237 the matching constraint Ra.
19238 (mve_imm_selective_upto_8): Define predicate to check the matching
19241 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19242 Mihail Ionescu <mihail.ionescu@arm.com>
19243 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19245 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
19246 qualifier for binary operands.
19247 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19248 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19249 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
19250 (vaddlvq_p_u32): Likewise.
19251 (vcmpneq_s8): Likewise.
19252 (vcmpneq_s16): Likewise.
19253 (vcmpneq_s32): Likewise.
19254 (vcmpneq_u8): Likewise.
19255 (vcmpneq_u16): Likewise.
19256 (vcmpneq_u32): Likewise.
19257 (vshlq_s8): Likewise.
19258 (vshlq_s16): Likewise.
19259 (vshlq_s32): Likewise.
19260 (vshlq_u8): Likewise.
19261 (vshlq_u16): Likewise.
19262 (vshlq_u32): Likewise.
19263 (__arm_vaddlvq_p_s32): Define intrinsic.
19264 (__arm_vaddlvq_p_u32): Likewise.
19265 (__arm_vcmpneq_s8): Likewise.
19266 (__arm_vcmpneq_s16): Likewise.
19267 (__arm_vcmpneq_s32): Likewise.
19268 (__arm_vcmpneq_u8): Likewise.
19269 (__arm_vcmpneq_u16): Likewise.
19270 (__arm_vcmpneq_u32): Likewise.
19271 (__arm_vshlq_s8): Likewise.
19272 (__arm_vshlq_s16): Likewise.
19273 (__arm_vshlq_s32): Likewise.
19274 (__arm_vshlq_u8): Likewise.
19275 (__arm_vshlq_u16): Likewise.
19276 (__arm_vshlq_u32): Likewise.
19277 (vaddlvq_p): Define polymorphic variant.
19278 (vcmpneq): Likewise.
19280 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
19282 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
19283 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
19284 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
19285 (mve_vcmpneq_<supf><mode>): Likewise.
19286 (mve_vshlq_<supf><mode>): Likewise.
19288 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19289 Mihail Ionescu <mihail.ionescu@arm.com>
19290 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19292 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
19293 qualifier for binary operands.
19294 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19295 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19296 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
19297 (vcvtq_n_s32_f32): Likewise.
19298 (vcvtq_n_u16_f16): Likewise.
19299 (vcvtq_n_u32_f32): Likewise.
19300 (vcreateq_u8): Likewise.
19301 (vcreateq_u16): Likewise.
19302 (vcreateq_u32): Likewise.
19303 (vcreateq_u64): Likewise.
19304 (vcreateq_s8): Likewise.
19305 (vcreateq_s16): Likewise.
19306 (vcreateq_s32): Likewise.
19307 (vcreateq_s64): Likewise.
19308 (vshrq_n_s8): Likewise.
19309 (vshrq_n_s16): Likewise.
19310 (vshrq_n_s32): Likewise.
19311 (vshrq_n_u8): Likewise.
19312 (vshrq_n_u16): Likewise.
19313 (vshrq_n_u32): Likewise.
19314 (__arm_vcreateq_u8): Define intrinsic.
19315 (__arm_vcreateq_u16): Likewise.
19316 (__arm_vcreateq_u32): Likewise.
19317 (__arm_vcreateq_u64): Likewise.
19318 (__arm_vcreateq_s8): Likewise.
19319 (__arm_vcreateq_s16): Likewise.
19320 (__arm_vcreateq_s32): Likewise.
19321 (__arm_vcreateq_s64): Likewise.
19322 (__arm_vshrq_n_s8): Likewise.
19323 (__arm_vshrq_n_s16): Likewise.
19324 (__arm_vshrq_n_s32): Likewise.
19325 (__arm_vshrq_n_u8): Likewise.
19326 (__arm_vshrq_n_u16): Likewise.
19327 (__arm_vshrq_n_u32): Likewise.
19328 (__arm_vcvtq_n_s16_f16): Likewise.
19329 (__arm_vcvtq_n_s32_f32): Likewise.
19330 (__arm_vcvtq_n_u16_f16): Likewise.
19331 (__arm_vcvtq_n_u32_f32): Likewise.
19332 (vshrq_n): Define polymorphic variant.
19333 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
19335 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
19336 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
19337 * config/arm/constraints.md (Rb): Define constraint to check constant is
19338 in the range of 1 to 8.
19339 (Rf): Define constraint to check constant is in the range of 1 to 32.
19340 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
19341 (mve_vshrq_n_<supf><mode>): Likewise.
19342 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
19343 * config/arm/predicates.md (mve_imm_8): Define predicate to check
19344 the matching constraint Rb.
19345 (mve_imm_32): Define predicate to check the matching constraint Rf.
19347 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19348 Mihail Ionescu <mihail.ionescu@arm.com>
19349 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19351 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
19352 qualifier for binary operands.
19353 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19354 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19355 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19356 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
19357 (vsubq_n_f32): Likewise.
19358 (vbrsrq_n_f16): Likewise.
19359 (vbrsrq_n_f32): Likewise.
19360 (vcvtq_n_f16_s16): Likewise.
19361 (vcvtq_n_f32_s32): Likewise.
19362 (vcvtq_n_f16_u16): Likewise.
19363 (vcvtq_n_f32_u32): Likewise.
19364 (vcreateq_f16): Likewise.
19365 (vcreateq_f32): Likewise.
19366 (__arm_vsubq_n_f16): Define intrinsic.
19367 (__arm_vsubq_n_f32): Likewise.
19368 (__arm_vbrsrq_n_f16): Likewise.
19369 (__arm_vbrsrq_n_f32): Likewise.
19370 (__arm_vcvtq_n_f16_s16): Likewise.
19371 (__arm_vcvtq_n_f32_s32): Likewise.
19372 (__arm_vcvtq_n_f16_u16): Likewise.
19373 (__arm_vcvtq_n_f32_u32): Likewise.
19374 (__arm_vcreateq_f16): Likewise.
19375 (__arm_vcreateq_f32): Likewise.
19376 (vsubq): Define polymorphic variant.
19377 (vbrsrq): Likewise.
19378 (vcvtq_n): Likewise.
19379 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
19381 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
19382 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
19383 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
19384 * config/arm/constraints.md (Rd): Define constraint to check constant is
19385 in the range of 1 to 16.
19386 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
19387 mve_vbrsrq_n_f<mode>: Likewise.
19388 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
19389 mve_vcreateq_f<mode>: Likewise.
19390 * config/arm/predicates.md (mve_imm_16): Define predicate to check
19391 the matching constraint Rd.
19393 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19394 Mihail Ionescu <mihail.ionescu@arm.com>
19395 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19397 * config/arm/arm-builtins.c (hi_UP): Define mode.
19398 * config/arm/arm.h (IS_VPR_REGNUM): Move.
19399 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
19400 (APSRQ_REGNUM): Modify.
19401 (APSRGE_REGNUM): Modify.
19402 * config/arm/arm_mve.h (vctp16q): Define macro.
19403 (vctp32q): Likewise.
19404 (vctp64q): Likewise.
19405 (vctp8q): Likewise.
19407 (__arm_vctp16q): Define intrinsic.
19408 (__arm_vctp32q): Likewise.
19409 (__arm_vctp64q): Likewise.
19410 (__arm_vctp8q): Likewise.
19411 (__arm_vpnot): Likewise.
19412 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
19414 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
19415 (mve_vpnothi): Likewise.
19417 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19418 Mihail Ionescu <mihail.ionescu@arm.com>
19419 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19421 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
19422 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
19423 (vdupq_n_s16): Likewise.
19424 (vdupq_n_s32): Likewise.
19425 (vabsq_s8): Likewise.
19426 (vabsq_s16): Likewise.
19427 (vabsq_s32): Likewise.
19428 (vclsq_s8): Likewise.
19429 (vclsq_s16): Likewise.
19430 (vclsq_s32): Likewise.
19431 (vclzq_s8): Likewise.
19432 (vclzq_s16): Likewise.
19433 (vclzq_s32): Likewise.
19434 (vnegq_s8): Likewise.
19435 (vnegq_s16): Likewise.
19436 (vnegq_s32): Likewise.
19437 (vaddlvq_s32): Likewise.
19438 (vaddvq_s8): Likewise.
19439 (vaddvq_s16): Likewise.
19440 (vaddvq_s32): Likewise.
19441 (vmovlbq_s8): Likewise.
19442 (vmovlbq_s16): Likewise.
19443 (vmovltq_s8): Likewise.
19444 (vmovltq_s16): Likewise.
19445 (vmvnq_s8): Likewise.
19446 (vmvnq_s16): Likewise.
19447 (vmvnq_s32): Likewise.
19448 (vrev16q_s8): Likewise.
19449 (vrev32q_s8): Likewise.
19450 (vrev32q_s16): Likewise.
19451 (vqabsq_s8): Likewise.
19452 (vqabsq_s16): Likewise.
19453 (vqabsq_s32): Likewise.
19454 (vqnegq_s8): Likewise.
19455 (vqnegq_s16): Likewise.
19456 (vqnegq_s32): Likewise.
19457 (vcvtaq_s16_f16): Likewise.
19458 (vcvtaq_s32_f32): Likewise.
19459 (vcvtnq_s16_f16): Likewise.
19460 (vcvtnq_s32_f32): Likewise.
19461 (vcvtpq_s16_f16): Likewise.
19462 (vcvtpq_s32_f32): Likewise.
19463 (vcvtmq_s16_f16): Likewise.
19464 (vcvtmq_s32_f32): Likewise.
19465 (vmvnq_u8): Likewise.
19466 (vmvnq_u16): Likewise.
19467 (vmvnq_u32): Likewise.
19468 (vdupq_n_u8): Likewise.
19469 (vdupq_n_u16): Likewise.
19470 (vdupq_n_u32): Likewise.
19471 (vclzq_u8): Likewise.
19472 (vclzq_u16): Likewise.
19473 (vclzq_u32): Likewise.
19474 (vaddvq_u8): Likewise.
19475 (vaddvq_u16): Likewise.
19476 (vaddvq_u32): Likewise.
19477 (vrev32q_u8): Likewise.
19478 (vrev32q_u16): Likewise.
19479 (vmovltq_u8): Likewise.
19480 (vmovltq_u16): Likewise.
19481 (vmovlbq_u8): Likewise.
19482 (vmovlbq_u16): Likewise.
19483 (vrev16q_u8): Likewise.
19484 (vaddlvq_u32): Likewise.
19485 (vcvtpq_u16_f16): Likewise.
19486 (vcvtpq_u32_f32): Likewise.
19487 (vcvtnq_u16_f16): Likewise.
19488 (vcvtmq_u16_f16): Likewise.
19489 (vcvtmq_u32_f32): Likewise.
19490 (vcvtaq_u16_f16): Likewise.
19491 (vcvtaq_u32_f32): Likewise.
19492 (__arm_vdupq_n_s8): Define intrinsic.
19493 (__arm_vdupq_n_s16): Likewise.
19494 (__arm_vdupq_n_s32): Likewise.
19495 (__arm_vabsq_s8): Likewise.
19496 (__arm_vabsq_s16): Likewise.
19497 (__arm_vabsq_s32): Likewise.
19498 (__arm_vclsq_s8): Likewise.
19499 (__arm_vclsq_s16): Likewise.
19500 (__arm_vclsq_s32): Likewise.
19501 (__arm_vclzq_s8): Likewise.
19502 (__arm_vclzq_s16): Likewise.
19503 (__arm_vclzq_s32): Likewise.
19504 (__arm_vnegq_s8): Likewise.
19505 (__arm_vnegq_s16): Likewise.
19506 (__arm_vnegq_s32): Likewise.
19507 (__arm_vaddlvq_s32): Likewise.
19508 (__arm_vaddvq_s8): Likewise.
19509 (__arm_vaddvq_s16): Likewise.
19510 (__arm_vaddvq_s32): Likewise.
19511 (__arm_vmovlbq_s8): Likewise.
19512 (__arm_vmovlbq_s16): Likewise.
19513 (__arm_vmovltq_s8): Likewise.
19514 (__arm_vmovltq_s16): Likewise.
19515 (__arm_vmvnq_s8): Likewise.
19516 (__arm_vmvnq_s16): Likewise.
19517 (__arm_vmvnq_s32): Likewise.
19518 (__arm_vrev16q_s8): Likewise.
19519 (__arm_vrev32q_s8): Likewise.
19520 (__arm_vrev32q_s16): Likewise.
19521 (__arm_vqabsq_s8): Likewise.
19522 (__arm_vqabsq_s16): Likewise.
19523 (__arm_vqabsq_s32): Likewise.
19524 (__arm_vqnegq_s8): Likewise.
19525 (__arm_vqnegq_s16): Likewise.
19526 (__arm_vqnegq_s32): Likewise.
19527 (__arm_vmvnq_u8): Likewise.
19528 (__arm_vmvnq_u16): Likewise.
19529 (__arm_vmvnq_u32): Likewise.
19530 (__arm_vdupq_n_u8): Likewise.
19531 (__arm_vdupq_n_u16): Likewise.
19532 (__arm_vdupq_n_u32): Likewise.
19533 (__arm_vclzq_u8): Likewise.
19534 (__arm_vclzq_u16): Likewise.
19535 (__arm_vclzq_u32): Likewise.
19536 (__arm_vaddvq_u8): Likewise.
19537 (__arm_vaddvq_u16): Likewise.
19538 (__arm_vaddvq_u32): Likewise.
19539 (__arm_vrev32q_u8): Likewise.
19540 (__arm_vrev32q_u16): Likewise.
19541 (__arm_vmovltq_u8): Likewise.
19542 (__arm_vmovltq_u16): Likewise.
19543 (__arm_vmovlbq_u8): Likewise.
19544 (__arm_vmovlbq_u16): Likewise.
19545 (__arm_vrev16q_u8): Likewise.
19546 (__arm_vaddlvq_u32): Likewise.
19547 (__arm_vcvtpq_u16_f16): Likewise.
19548 (__arm_vcvtpq_u32_f32): Likewise.
19549 (__arm_vcvtnq_u16_f16): Likewise.
19550 (__arm_vcvtmq_u16_f16): Likewise.
19551 (__arm_vcvtmq_u32_f32): Likewise.
19552 (__arm_vcvtaq_u16_f16): Likewise.
19553 (__arm_vcvtaq_u32_f32): Likewise.
19554 (__arm_vcvtaq_s16_f16): Likewise.
19555 (__arm_vcvtaq_s32_f32): Likewise.
19556 (__arm_vcvtnq_s16_f16): Likewise.
19557 (__arm_vcvtnq_s32_f32): Likewise.
19558 (__arm_vcvtpq_s16_f16): Likewise.
19559 (__arm_vcvtpq_s32_f32): Likewise.
19560 (__arm_vcvtmq_s16_f16): Likewise.
19561 (__arm_vcvtmq_s32_f32): Likewise.
19562 (vdupq_n): Define polymorphic variant.
19567 (vaddlvq): Likewise.
19568 (vaddvq): Likewise.
19569 (vmovlbq): Likewise.
19570 (vmovltq): Likewise.
19572 (vrev16q): Likewise.
19573 (vrev32q): Likewise.
19574 (vqabsq): Likewise.
19575 (vqnegq): Likewise.
19576 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
19577 (UNOP_SNONE_NONE): Likewise.
19578 (UNOP_UNONE_UNONE): Likewise.
19579 (UNOP_UNONE_NONE): Likewise.
19580 * config/arm/constraints.md (e): Define new constriant to allow only
19582 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
19583 (mve_vnegq_s<mode>): Likewise.
19584 (mve_vmvnq_<supf><mode>): Likewise.
19585 (mve_vdupq_n_<supf><mode>): Likewise.
19586 (mve_vclzq_<supf><mode>): Likewise.
19587 (mve_vclsq_s<mode>): Likewise.
19588 (mve_vaddvq_<supf><mode>): Likewise.
19589 (mve_vabsq_s<mode>): Likewise.
19590 (mve_vrev32q_<supf><mode>): Likewise.
19591 (mve_vmovltq_<supf><mode>): Likewise.
19592 (mve_vmovlbq_<supf><mode>): Likewise.
19593 (mve_vcvtpq_<supf><mode>): Likewise.
19594 (mve_vcvtnq_<supf><mode>): Likewise.
19595 (mve_vcvtmq_<supf><mode>): Likewise.
19596 (mve_vcvtaq_<supf><mode>): Likewise.
19597 (mve_vrev16q_<supf>v16qi): Likewise.
19598 (mve_vaddlvq_<supf>v4si): Likewise.
19600 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19602 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
19604 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
19606 * read-rtl-function.c (find_param_by_name,
19607 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
19609 * spellcheck.c (get_edit_distance_cutoff): Likewise.
19610 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
19611 * tree.def (SWITCH_EXPR): Likewise.
19612 * selftest.c (assert_str_contains): Likewise.
19613 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
19615 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
19616 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
19617 * langhooks.h (struct lang_hooks_for_decls): Likewise.
19618 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
19619 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
19621 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
19622 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
19623 * tree.c (component_ref_size): Likewise.
19624 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
19625 * gimple-ssa-sprintf.c (get_string_length, format_string,
19626 format_directive): Likewise.
19627 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
19628 * input.c (string_concat_db::get_string_concatenation,
19629 test_lexer_string_locations_ucn4): Likewise.
19630 * cfgexpand.c (pass_expand::execute): Likewise.
19631 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
19632 maybe_diag_overlap): Likewise.
19633 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
19634 * shrink-wrap.c (spread_components): Likewise.
19635 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
19637 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
19639 * dwarf2out.c (dwarf2out_early_finish): Likewise.
19640 * gimple-ssa-store-merging.c: Likewise.
19641 * ira-costs.c (record_operand_costs): Likewise.
19642 * tree-vect-loop.c (vectorizable_reduction): Likewise.
19643 * target.def (dispatch): Likewise.
19644 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
19645 in documentation text.
19646 * doc/tm.texi: Regenerated.
19647 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
19648 duplicated word issue in a comment.
19649 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
19650 * config/i386/i386-features.c (remove_partial_avx_dependency):
19652 * config/msp430/msp430.c (msp430_select_section): Likewise.
19653 * config/gcn/gcn-run.c (load_image): Likewise.
19654 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
19655 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
19656 * config/aarch64/falkor-tag-collision-avoidance.c
19657 (single_dest_per_chain): Likewise.
19658 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
19659 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
19660 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
19661 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
19663 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
19664 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
19665 * config/rs6000/rs6000-logue.c
19666 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
19667 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
19668 Fix various other issues in the comment.
19670 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
19672 * config/arm/t-rmprofile: create new multilib for
19673 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
19676 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19678 PR tree-optimization/94015
19679 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
19680 function where EXP is address of the bytes being stored rather than
19681 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
19682 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
19683 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
19684 calling native_encode_expr if host or target doesn't have 8-bit
19685 chars. Formatting fixes.
19686 (count_nonzero_bytes_addr): New function.
19688 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19689 Mihail Ionescu <mihail.ionescu@arm.com>
19690 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19692 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
19693 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
19694 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
19695 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
19696 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
19697 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
19698 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
19699 (vmvnq_n_s32): Likewise.
19700 (vrev64q_s8): Likewise.
19701 (vrev64q_s16): Likewise.
19702 (vrev64q_s32): Likewise.
19703 (vcvtq_s16_f16): Likewise.
19704 (vcvtq_s32_f32): Likewise.
19705 (vrev64q_u8): Likewise.
19706 (vrev64q_u16): Likewise.
19707 (vrev64q_u32): Likewise.
19708 (vmvnq_n_u16): Likewise.
19709 (vmvnq_n_u32): Likewise.
19710 (vcvtq_u16_f16): Likewise.
19711 (vcvtq_u32_f32): Likewise.
19712 (__arm_vmvnq_n_s16): Define intrinsic.
19713 (__arm_vmvnq_n_s32): Likewise.
19714 (__arm_vrev64q_s8): Likewise.
19715 (__arm_vrev64q_s16): Likewise.
19716 (__arm_vrev64q_s32): Likewise.
19717 (__arm_vrev64q_u8): Likewise.
19718 (__arm_vrev64q_u16): Likewise.
19719 (__arm_vrev64q_u32): Likewise.
19720 (__arm_vmvnq_n_u16): Likewise.
19721 (__arm_vmvnq_n_u32): Likewise.
19722 (__arm_vcvtq_s16_f16): Likewise.
19723 (__arm_vcvtq_s32_f32): Likewise.
19724 (__arm_vcvtq_u16_f16): Likewise.
19725 (__arm_vcvtq_u32_f32): Likewise.
19726 (vrev64q): Define polymorphic variant.
19727 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
19728 (UNOP_SNONE_NONE): Likewise.
19729 (UNOP_SNONE_IMM): Likewise.
19730 (UNOP_UNONE_UNONE): Likewise.
19731 (UNOP_UNONE_NONE): Likewise.
19732 (UNOP_UNONE_IMM): Likewise.
19733 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
19734 (mve_vcvtq_from_f_<supf><mode>): Likewise.
19735 (mve_vmvnq_n_<supf><mode>): Likewise.
19737 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19738 Mihail Ionescu <mihail.ionescu@arm.com>
19739 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19741 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
19742 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
19743 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
19744 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
19745 (vrndxq_f32): Likewise.
19746 (vrndq_f16) Likewise.
19747 (vrndq_f32): Likewise.
19748 (vrndpq_f16): Likewise.
19749 (vrndpq_f32): Likewise.
19750 (vrndnq_f16): Likewise.
19751 (vrndnq_f32): Likewise.
19752 (vrndmq_f16): Likewise.
19753 (vrndmq_f32): Likewise.
19754 (vrndaq_f16): Likewise.
19755 (vrndaq_f32): Likewise.
19756 (vrev64q_f16): Likewise.
19757 (vrev64q_f32): Likewise.
19758 (vnegq_f16): Likewise.
19759 (vnegq_f32): Likewise.
19760 (vdupq_n_f16): Likewise.
19761 (vdupq_n_f32): Likewise.
19762 (vabsq_f16): Likewise.
19763 (vabsq_f32): Likewise.
19764 (vrev32q_f16): Likewise.
19765 (vcvttq_f32_f16): Likewise.
19766 (vcvtbq_f32_f16): Likewise.
19767 (vcvtq_f16_s16): Likewise.
19768 (vcvtq_f32_s32): Likewise.
19769 (vcvtq_f16_u16): Likewise.
19770 (vcvtq_f32_u32): Likewise.
19771 (__arm_vrndxq_f16): Define intrinsic.
19772 (__arm_vrndxq_f32): Likewise.
19773 (__arm_vrndq_f16): Likewise.
19774 (__arm_vrndq_f32): Likewise.
19775 (__arm_vrndpq_f16): Likewise.
19776 (__arm_vrndpq_f32): Likewise.
19777 (__arm_vrndnq_f16): Likewise.
19778 (__arm_vrndnq_f32): Likewise.
19779 (__arm_vrndmq_f16): Likewise.
19780 (__arm_vrndmq_f32): Likewise.
19781 (__arm_vrndaq_f16): Likewise.
19782 (__arm_vrndaq_f32): Likewise.
19783 (__arm_vrev64q_f16): Likewise.
19784 (__arm_vrev64q_f32): Likewise.
19785 (__arm_vnegq_f16): Likewise.
19786 (__arm_vnegq_f32): Likewise.
19787 (__arm_vdupq_n_f16): Likewise.
19788 (__arm_vdupq_n_f32): Likewise.
19789 (__arm_vabsq_f16): Likewise.
19790 (__arm_vabsq_f32): Likewise.
19791 (__arm_vrev32q_f16): Likewise.
19792 (__arm_vcvttq_f32_f16): Likewise.
19793 (__arm_vcvtbq_f32_f16): Likewise.
19794 (__arm_vcvtq_f16_s16): Likewise.
19795 (__arm_vcvtq_f32_s32): Likewise.
19796 (__arm_vcvtq_f16_u16): Likewise.
19797 (__arm_vcvtq_f32_u32): Likewise.
19798 (vrndxq): Define polymorphic variants.
19800 (vrndpq): Likewise.
19801 (vrndnq): Likewise.
19802 (vrndmq): Likewise.
19803 (vrndaq): Likewise.
19804 (vrev64q): Likewise.
19807 (vrev32q): Likewise.
19808 (vcvtbq_f32): Likewise.
19809 (vcvttq_f32): Likewise.
19811 * config/arm/arm_mve_builtins.def (VAR2): Define.
19813 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
19814 (mve_vrndq_f<mode>): Likewise.
19815 (mve_vrndpq_f<mode>): Likewise.
19816 (mve_vrndnq_f<mode>): Likewise.
19817 (mve_vrndmq_f<mode>): Likewise.
19818 (mve_vrndaq_f<mode>): Likewise.
19819 (mve_vrev64q_f<mode>): Likewise.
19820 (mve_vnegq_f<mode>): Likewise.
19821 (mve_vdupq_n_f<mode>): Likewise.
19822 (mve_vabsq_f<mode>): Likewise.
19823 (mve_vrev32q_fv8hf): Likewise.
19824 (mve_vcvttq_f32_f16v4sf): Likewise.
19825 (mve_vcvtbq_f32_f16v4sf): Likewise.
19826 (mve_vcvtq_to_f_<supf><mode>): Likewise.
19828 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19829 Mihail Ionescu <mihail.ionescu@arm.com>
19830 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19832 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
19834 (ARM_BUILTIN_MVE_PATTERN_START): Define.
19835 (arm_init_mve_builtins): Define function.
19836 (arm_init_builtins): Add TARGET_HAVE_MVE check.
19837 (arm_expand_builtin_1): Check the range of fcode.
19838 (arm_expand_mve_builtin): Define function to expand MVE builtins.
19839 (arm_expand_builtin): Check the range of fcode.
19840 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
19842 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
19843 (vst4q_s8): Define macro.
19844 (vst4q_s16): Likewise.
19845 (vst4q_s32): Likewise.
19846 (vst4q_u8): Likewise.
19847 (vst4q_u16): Likewise.
19848 (vst4q_u32): Likewise.
19849 (vst4q_f16): Likewise.
19850 (vst4q_f32): Likewise.
19851 (__arm_vst4q_s8): Define inline builtin.
19852 (__arm_vst4q_s16): Likewise.
19853 (__arm_vst4q_s32): Likewise.
19854 (__arm_vst4q_u8): Likewise.
19855 (__arm_vst4q_u16): Likewise.
19856 (__arm_vst4q_u32): Likewise.
19857 (__arm_vst4q_f16): Likewise.
19858 (__arm_vst4q_f32): Likewise.
19859 (__ARM_mve_typeid): Define macro with MVE types.
19860 (__ARM_mve_coerce): Define macro with _Generic feature.
19861 (vst4q): Define polymorphic variant for different vst4q builtins.
19862 * config/arm/arm_mve_builtins.def: New file.
19863 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
19865 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
19866 (unspec): Define unspec.
19867 (mve_vst4q<mode>): Define RTL pattern.
19868 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
19870 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
19872 (define_split): Allow OI mode split for MVE after reload.
19873 (define_split): Allow XI mode split for MVE after reload.
19874 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
19875 (arm-builtins.o): Likewise.
19877 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
19879 * c-typeck.c (process_init_element): Handle constructor_type with
19880 type size represented by POLY_INT_CST.
19882 2020-03-17 Jakub Jelinek <jakub@redhat.com>
19884 PR tree-optimization/94187
19885 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
19886 nchars - offset < nbytes.
19888 PR middle-end/94189
19889 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
19890 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
19891 for code-generation.
19893 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
19896 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
19897 after changing memory subreg.
19899 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19900 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19902 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
19903 emulator calls for dobule precision arithmetic operations for MVE.
19905 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19906 Mihail Ionescu <mihail.ionescu@arm.com>
19907 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19909 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
19910 feature bit is on and -mfpu=auto is passed as compiler option, do not
19911 generate error on not finding any matching fpu. Because in this case
19912 fpu is not required.
19913 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
19914 enabled for MVE and also for all VFP extensions.
19915 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
19917 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
19918 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
19919 along with feature bits mve_float.
19920 (mve): Modify add options in armv8.1-m.main arch for MVE.
19921 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
19923 * config/arm/arm.c (use_return_insn): Replace the
19924 check with TARGET_VFP_BASE.
19925 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
19927 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
19928 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
19930 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
19931 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
19933 (arm_compute_frame_layout): Likewise.
19934 (arm_save_coproc_regs): Likewise.
19935 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
19937 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
19938 with equivalent macro TARGET_VFP_BASE.
19939 (arm_expand_epilogue_apcs_frame): Likewise.
19940 (arm_expand_epilogue): Likewise.
19941 (arm_conditional_register_usage): Likewise.
19942 (arm_declare_function_name): Add check to skip printing .fpu directive
19943 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
19945 * config/arm/arm.h (TARGET_VFP_BASE): Define.
19946 * config/arm/arm.md (arch): Add "mve" to arch.
19947 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
19948 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
19949 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
19950 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
19952 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
19953 to not allow for MVE.
19954 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
19956 (VUNSPEC_GET_FPSCR): Define.
19957 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
19958 instructions which move to general-purpose Register from Floating-point
19959 Special register and vice-versa.
19960 (thumb2_movhi_fp16): Likewise.
19961 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
19962 with MCR and MRC instructions which set and get Floating-point Status
19963 and Control Register (FPSCR).
19964 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
19966 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
19967 float move patterns in MVE.
19968 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
19969 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
19970 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
19971 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
19972 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
19973 TARGET_VFP_BASE check.
19974 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
19975 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
19977 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
19978 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
19982 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
19983 Mihail Ionescu <mihail.ionescu@arm.com>
19984 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
19986 * config.gcc (arm_mve.h): Include mve intrinsics header file.
19987 * config/arm/aout.h (p0): Add new register name for MVE predicated
19989 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
19990 common to Neon and MVE.
19991 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
19992 (arm_init_simd_builtin_types): Disable poly types for MVE.
19993 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
19994 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
19995 ARM_BUILTIN_NEON_LANE_CHECK.
19996 (mve_dereference_pointer): Add function.
19997 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
19999 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
20000 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
20001 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
20002 with floating point enabled.
20003 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
20004 simd_immediate_valid_for_move.
20005 (simd_immediate_valid_for_move): Renamed from
20006 neon_immediate_valid_for_move function.
20007 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
20008 error if vfpv2 feature bit is disabled and mve feature bit is also
20009 disabled for HARD_FLOAT_ABI.
20010 (use_return_insn): Check to not push VFP regs for MVE.
20011 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
20013 (aapcs_vfp_allocate_return_reg): Likewise.
20014 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
20015 address operand for MVE.
20016 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
20017 (neon_valid_immediate): Rename to simd_valid_immediate.
20018 (simd_valid_immediate): Rename from neon_valid_immediate.
20019 (simd_valid_immediate): MVE check on size of vector is 128 bits.
20020 (neon_immediate_valid_for_move): Rename to
20021 simd_immediate_valid_for_move.
20022 (simd_immediate_valid_for_move): Rename from
20023 neon_immediate_valid_for_move.
20024 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
20026 (neon_make_constant): Modify call to neon_valid_immediate function.
20027 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
20029 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
20030 (arm_compute_frame_layout): Calculate space for saved VFP registers for
20032 (arm_save_coproc_regs): Save coproc registers for MVE.
20033 (arm_print_operand): Add case 'E' to print memory operands for MVE.
20034 (arm_print_operand_address): Check to print register number for MVE.
20035 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
20036 (arm_modes_tieable_p): Check to allow structure mode for MVE.
20037 (arm_regno_class): Add VPR_REGNUM check.
20038 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
20040 (arm_expand_epilogue): MVE check for enabling pop instructions in
20042 (arm_print_asm_arch_directives): Modify function to disable print of
20043 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20045 (arm_vector_mode_supported_p): Check for modes available in MVE interger
20046 and MVE floating point.
20047 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
20049 (arm_conditional_register_usage): Enable usage of conditional regsiter
20051 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
20052 (arm_declare_function_name): Modify function to disable print of
20053 .arch_extension "mve" and "fp" for cases where MVE is enabled with
20055 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
20056 when target general registers are required.
20057 (TARGET_HAVE_MVE_FLOAT): Likewise.
20058 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
20060 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
20061 which indicate this is not available for across function calls.
20062 (FIRST_PSEUDO_REGISTER): Modify.
20063 (VALID_MVE_MODE): Define valid MVE mode.
20064 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
20065 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
20066 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
20067 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
20069 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
20070 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
20071 (enum reg_class): Add VPR_REG entry.
20072 (REG_CLASS_NAMES): Add VPR_REG entry.
20073 * config/arm/arm.md (VPR_REGNUM): Define.
20074 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
20075 "unconditional" instructions.
20076 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
20077 (movdf_soft_insn): Modify RTL to not allow for MVE.
20078 (vfp_pop_multiple_with_writeback): Enable for MVE.
20079 (include "mve.md"): Include mve.md file.
20080 * config/arm/arm_mve.h: Add MVE intrinsics head file.
20081 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
20082 for vector predicated operands.
20083 * config/arm/iterators.md (VNIM1): Define.
20084 (VNINOTM1): Define.
20085 (VHFBF_split): Define
20086 * config/arm/mve.md: New file.
20087 (mve_mov<mode>): Define RTL for move, store and load in MVE.
20088 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
20090 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
20091 simd_immediate_valid_for_move.
20092 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
20093 is common to MVE and NEON to vec-common.md file.
20094 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
20095 * config/arm/predicates.md (vpr_register_operand): Define.
20096 * config/arm/t-arm: Add mve.md file.
20097 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
20099 (mve_store): Add MVE instructions mve_store to attribute "type".
20100 (mve_load): Add MVE instructions mve_load to attribute "type".
20101 (is_mve_type): Define attribute.
20102 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
20103 standard move patterns in MVE along with NEON and IWMMXT with mode
20105 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
20106 and IWMMXT with mode iterator V8HF.
20107 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
20109 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
20110 simd_immediate_valid_for_move.
20113 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
20116 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
20117 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20119 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
20121 2020-03-16 Jakub Jelinek <jakub@redhat.com>
20124 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
20127 PR tree-optimization/94166
20128 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
20129 as secondary comparison key.
20131 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
20133 PR tree-optimization/94125
20134 * tree-loop-distribution.c
20135 (loop_distribution::break_alias_scc_partitions): Update post order
20136 number for merged scc.
20138 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
20141 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
20143 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
20144 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
20145 and ext_sse_reg_operand check.
20147 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
20149 * common.opt: Avoid redundancy in the help text.
20150 * config/arc/arc.opt: Likewise.
20151 * config/cr16/cr16.opt: Likewise.
20153 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20155 PR middle-end/93566
20156 * tree-nested.c (convert_nonlocal_omp_clauses,
20157 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
20158 with C/C++ array sections.
20160 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
20163 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
20164 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
20167 2020-03-14 Jakub Jelinek <jakub@redhat.com>
20169 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
20170 "a an" to "an" in a comment.
20171 * hsa-common.h (is_a_helper): Likewise.
20172 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
20173 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
20174 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
20176 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
20179 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
20180 64-bit value by 64 bits (UB).
20182 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
20184 PR rtl-optimization/92303
20185 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
20187 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
20189 PR rtl-optimization/94148
20190 PR rtl-optimization/94042
20191 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
20192 (df_worklist_propagate_forward): New parameter last_change_age, use
20193 that instead of bb->aux.
20194 (df_worklist_propagate_backward): Ditto.
20195 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
20197 2020-03-13 Richard Biener <rguenther@suse.de>
20199 PR tree-optimization/94163
20200 * tree-ssa-pre.c (create_expression_by_pieces): Check
20201 whether alignment would be zero.
20203 2020-03-13 Martin Liska <mliska@suse.cz>
20206 * lto-wrapper.c (run_gcc): Use concat for appending
20207 to collect_gcc_options.
20209 2020-03-13 Jakub Jelinek <jakub@redhat.com>
20212 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
20213 instead of GEN_INT.
20215 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
20218 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
20219 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
20220 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
20221 TARGET_AVX512VL and ext_sse_reg_operand check.
20223 2020-03-13 Bu Le <bule1@huawei.com>
20226 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
20227 (-param=aarch64-double-recp-precision=): New options.
20228 * doc/invoke.texi: Document them.
20229 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
20230 instead of hard-coding the choice of 1 for float and 2 for double.
20232 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20234 PR rtl-optimization/94119
20235 * resource.h (clear_hashed_info_until_next_barrier): Declare.
20236 * resource.c (clear_hashed_info_until_next_barrier): New function.
20237 * reorg.c (add_to_delay_list): Fix formatting.
20238 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
20239 the next instruction after removing a BARRIER.
20241 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
20243 PR middle-end/92071
20244 * expmed.c (store_integral_bit_field): For fields larger than a word,
20245 call extract_bit_field on the value if the mode is BLKmode. Remove
20246 specific path for big-endian targets and tidy things up a little bit.
20248 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
20250 PR rtl-optimization/90275
20251 * cse.c (cse_insn): Delete no-op register moves too.
20253 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
20255 * config/rx/rx.md (CTRLREG_CPEN): Remove.
20256 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
20258 2020-03-12 Richard Biener <rguenther@suse.de>
20260 PR tree-optimization/94103
20261 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
20262 punning when the mode precision is not sufficient.
20264 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
20267 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
20268 MODE_V1DF and MODE_V2SF.
20269 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
20270 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
20273 2020-03-12 Jakub Jelinek <jakub@redhat.com>
20275 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
20276 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
20277 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
20278 * doc/tm.texi: Regenerated.
20280 PR tree-optimization/94130
20281 * tree-ssa-dse.c: Include gimplify.h.
20282 (increment_start_addr): If stmt has lhs, drop the lhs from call and
20283 set it after the call to the original value of the first argument.
20285 (decrement_count): Formatting fix.
20287 2020-03-11 Delia Burduv <delia.burduv@arm.com>
20289 * config/arm/arm-builtins.c
20290 (arm_init_simd_builtin_scalar_types): New.
20291 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
20292 (vld2q_bf16): Used new builtin type.
20293 (vld3_bf16): Used new builtin type.
20294 (vld3q_bf16): Used new builtin type.
20295 (vld4_bf16): Used new builtin type.
20296 (vld4q_bf16): Used new builtin type.
20297 (vld2_dup_bf16): Used new builtin type.
20298 (vld2q_dup_bf16): Used new builtin type.
20299 (vld3_dup_bf16): Used new builtin type.
20300 (vld3q_dup_bf16): Used new builtin type.
20301 (vld4_dup_bf16): Used new builtin type.
20302 (vld4q_dup_bf16): Used new builtin type.
20304 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20307 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
20308 at the start to switch to data section. Don't print extra newline if
20309 .globl directive has not been emitted.
20311 2020-03-11 Richard Biener <rguenther@suse.de>
20313 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
20316 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
20318 PR middle-end/93961
20319 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
20320 whose type is a qualified union.
20322 2020-03-11 Jakub Jelinek <jakub@redhat.com>
20325 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
20326 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
20329 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
20331 (get_nth_most_common_value): Use abs_hwi instead of abs.
20333 PR middle-end/94111
20334 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
20335 is rvc_normal, otherwise use real_to_decimal to print the number to
20338 PR tree-optimization/94114
20339 * tree-loop-distribution.c (generate_memset_builtin): Call
20340 rewrite_to_non_trapping_overflow even on mem.
20341 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
20344 2020-03-10 Jeff Law <law@redhat.com>
20346 * config/bfin/bfin.md (movsi_insv): Add length attribute.
20348 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
20351 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
20352 NAN and SIGNED_ZEROR for smax/smin.
20354 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
20357 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
20358 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
20360 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20362 * loop-iv.c (find_simple_exit): Make it static.
20363 * cfgloop.h: Remove the corresponding prototype.
20365 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
20367 * ddg.c (create_ddg): Fix intendation.
20368 (set_recurrence_length): Likewise.
20369 (create_ddg_all_sccs): Likewise.
20371 2020-03-10 Jakub Jelinek <jakub@redhat.com>
20374 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
20375 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
20378 2020-03-09 Jason Merrill <jason@redhat.com>
20380 * gdbinit.in (pgs): Fix typo in documentation.
20382 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
20386 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20388 PR rtl-optimization/93564
20389 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20390 do not honor reg alloc order.
20392 2020-03-09 Andrew Pinski <apinski@marvell.com>
20394 PR inline-asm/94095
20395 * doc/extend.texi (x86 Operand Modifiers): Fix column
20398 2020-03-09 Martin Liska <mliska@suse.cz>
20401 * config/rs6000/rs6000.c (rs6000_option_override_internal):
20402 Remove set of str_align_loops and str_align_jumps as these
20403 should be set in previous 2 conditions in the function.
20405 2020-03-09 Jakub Jelinek <jakub@redhat.com>
20407 PR rtl-optimization/94045
20408 * params.opt (-param=max-find-base-term-values=): New option.
20409 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
20410 in a single toplevel find_base_term call.
20412 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
20415 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
20416 * config/aarch64/aarch64-simd.md
20417 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
20418 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
20419 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
20420 * config/aarch64/arm_neon.h:
20421 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
20422 (vmlal_lane_u16): Likewise.
20423 (vmlal_lane_s32): Likewise.
20424 (vmlal_lane_u32): Likewise.
20425 (vmlal_laneq_s16): Likewise.
20426 (vmlal_laneq_u16): Likewise.
20427 (vmlal_laneq_s32): Likewise.
20428 (vmlal_laneq_u32): Likewise.
20429 (vmull_lane_s16): Likewise.
20430 (vmull_lane_u16): Likewise.
20431 (vmull_lane_s32): Likewise.
20432 (vmull_lane_u32): Likewise.
20433 (vmull_laneq_s16): Likewise.
20434 (vmull_laneq_u16): Likewise.
20435 (vmull_laneq_s32): Likewise.
20436 (vmull_laneq_u32): Likewise.
20437 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
20440 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
20442 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
20443 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
20444 (aarch64_mls_elt<mode>): Likewise.
20445 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
20446 (aarch64_fma4_elt<mode>): Likewise.
20447 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
20448 (aarch64_fma4_elt_to_64v2df): Likewise.
20449 (aarch64_fnma4_elt<mode>): Likewise.
20450 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
20451 (aarch64_fnma4_elt_to_64v2df): Likewise.
20453 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20455 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
20456 Specify movprfx attribute.
20457 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
20459 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
20462 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
20464 (TARGET_NO_FP_IN_TOC): Same.
20465 * config/rs6000/aix71.h: Same.
20466 * config/rs6000/aix72.h: Same.
20468 2020-03-06 Andrew Pinski <apinski@marvell.com>
20469 Jeff Law <law@redhat.com>
20471 PR rtl-optimization/93996
20472 * haifa-sched.c (remove_notes): Be more careful when adding
20475 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20477 * config/arm/arm_neon.h (vld2_bf16): New.
20483 (vld2_dup_bf16): New.
20484 (vld2q_dup_bf16): New.
20485 (vld3_dup_bf16): New.
20486 (vld3q_dup_bf16): New.
20487 (vld4_dup_bf16): New.
20488 (vld4q_dup_bf16): New.
20489 * config/arm/arm_neon_builtins.def
20490 (vld2): Changed to VAR13 and added v4bf, v8bf
20491 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
20492 (vld3): Changed to VAR13 and added v4bf, v8bf
20493 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
20494 (vld4): Changed to VAR13 and added v4bf, v8bf
20495 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
20496 * config/arm/iterators.md (VDXBF2): New iterator.
20497 *config/arm/neon.md (neon_vld2): Use new iterators.
20498 (neon_vld2_dup<mode): Use new iterators.
20499 (neon_vld3<mode>): Likewise.
20500 (neon_vld3qa<mode>): Likewise.
20501 (neon_vld3qb<mode>): Likewise.
20502 (neon_vld3_dup<mode>): Likewise.
20503 (neon_vld4<mode>): Likewise.
20504 (neon_vld4qa<mode>): Likewise.
20505 (neon_vld4qb<mode>): Likewise.
20506 (neon_vld4_dup<mode>): Likewise.
20507 (neon_vld2_dupv8bf): New.
20508 (neon_vld3_dupv8bf): Likewise.
20509 (neon_vld4_dupv8bf): Likewise.
20511 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20513 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
20514 (bfloat16x8x2_t): New typedef.
20515 (bfloat16x4x3_t): New typedef.
20516 (bfloat16x8x3_t): New typedef.
20517 (bfloat16x4x4_t): New typedef.
20518 (bfloat16x8x4_t): New typedef.
20525 * config/arm/arm-builtins.c (v2bf_UP): Define.
20527 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
20528 * config/arm/arm-modes.def (V2BF): New mode.
20529 * config/arm/arm-simd-builtin-types.def
20530 (Bfloat16x2_t): New entry.
20531 * config/arm/arm_neon_builtins.def
20532 (vst2): Changed to VAR13 and added v4bf, v8bf
20533 (vst3): Changed to VAR13 and added v4bf, v8bf
20534 (vst4): Changed to VAR13 and added v4bf, v8bf
20535 * config/arm/iterators.md (VDXBF): New iterator.
20536 (VQ2BF): New iterator.
20537 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
20538 (neon_vst2<mode>): Used new iterators.
20539 (neon_vst3<mode>): Used new iterators.
20540 (neon_vst3<mode>): Used new iterators.
20541 (neon_vst3qa<mode>): Used new iterators.
20542 (neon_vst3qb<mode>): Used new iterators.
20543 (neon_vst4<mode>): Used new iterators.
20544 (neon_vst4<mode>): Used new iterators.
20545 (neon_vst4qa<mode>): Used new iterators.
20546 (neon_vst4qb<mode>): Used new iterators.
20548 2020-03-06 Delia Burduv <delia.burduv@arm.com>
20550 * config/aarch64/aarch64-simd-builtins.def
20551 (bfcvtn): New built-in function.
20552 (bfcvtn_q): New built-in function.
20553 (bfcvtn2): New built-in function.
20554 (bfcvt): New built-in function.
20555 * config/aarch64/aarch64-simd.md
20556 (aarch64_bfcvtn<q><mode>): New pattern.
20557 (aarch64_bfcvtn2v8bf): New pattern.
20558 (aarch64_bfcvtbf): New pattern.
20559 * config/aarch64/arm_bf16.h (float32_t): New typedef.
20560 (vcvth_bf16_f32): New intrinsic.
20561 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
20562 (vcvtq_low_bf16_f32): New intrinsic.
20563 (vcvtq_high_bf16_f32): New intrinsic.
20564 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
20565 (UNSPEC_BFCVTN): New UNSPEC.
20566 (UNSPEC_BFCVTN2): New UNSPEC.
20567 (UNSPEC_BFCVT): New UNSPEC.
20568 * config/arm/types.md (bf_cvt): New type.
20570 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
20572 * config/s390/s390.md ("tabort"): Get rid of two consecutive
20573 blanks in format string.
20575 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
20579 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
20580 * config/i386/i386.c (ix86_get_ssemov): New function.
20581 (ix86_output_ssemov): Likewise.
20582 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
20583 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
20585 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
20586 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
20587 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
20588 (*movti_internal): Likewise.
20589 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
20591 2020-03-05 Jeff Law <law@redhat.com>
20593 PR tree-optimization/91890
20594 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
20595 Use gimple_or_expr_nonartificial_location.
20596 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
20597 Use gimple_or_expr_nonartificial_location.
20598 * gimple.c (gimple_or_expr_nonartificial_location): New function.
20599 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
20600 * tree-ssa-strlen.c (maybe_warn_overflow): Use
20601 gimple_or_expr_nonartificial_location.
20602 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
20603 (maybe_warn_pointless_strcmp): Likewise.
20605 2020-03-05 Jakub Jelinek <jakub@redhat.com>
20608 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
20609 SRC and MASK arguments to __m128 from __m128d.
20610 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
20612 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
20614 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
20615 argument to __m128i from __m128d.
20616 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
20618 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
20619 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
20622 2020-03-05 Delia Burduv <delia.burduv@arm.com>
20624 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
20625 (vbfmlalbq_f32): New.
20626 (vbfmlaltq_f32): New.
20627 (vbfmlalbq_lane_f32): New.
20628 (vbfmlaltq_lane_f32): New.
20629 (vbfmlalbq_laneq_f32): New.
20630 (vbfmlaltq_laneq_f32): New.
20631 * config/arm/arm_neon_builtins.def (vmmla): New.
20636 (vfmab_laneq): New.
20637 (vfmat_laneq): New.
20638 * config/arm/iterators.md (BF_MA): New int iterator.
20639 (bt): New int attribute.
20640 (VQXBF): Copy of VQX with V8BF.
20641 * config/arm/neon.md (neon_vmmlav8bf): New insn.
20642 (neon_vfma<bt>v8bf): New insn.
20643 (neon_vfma<bt>_lanev8bf): New insn.
20644 (neon_vfma<bt>_laneqv8bf): New expand.
20645 (neon_vget_high<mode>): Changed iterator to VQXBF.
20646 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
20647 (UNSPEC_BFMAB): New UNSPEC.
20648 (UNSPEC_BFMAT): New UNSPEC.
20650 2020-03-05 Jakub Jelinek <jakub@redhat.com>
20652 PR middle-end/93399
20653 * tree-pretty-print.h (pretty_print_string): Declare.
20654 * tree-pretty-print.c (pretty_print_string): Remove forward
20655 declaration, no longer static. Change nbytes parameter type
20656 from unsigned to size_t.
20657 * print-rtl.c (print_value) <case CONST_STRING>: Use
20658 pretty_print_string and for shrink way too long strings.
20660 2020-03-05 Richard Biener <rguenther@suse.de>
20661 Jakub Jelinek <jakub@redhat.com>
20663 PR tree-optimization/93582
20664 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
20665 last operand as signed when looking for memset offset. Formatting
20668 2020-03-04 Andrew Pinski <apinski@marvell.com>
20671 * value-prof.c (dump_histogram_value): Use std::abs.
20673 2020-03-04 Martin Sebor <msebor@redhat.com>
20675 PR tree-optimization/93986
20676 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
20677 operands to the same precision widest_int to avoid ICEs.
20679 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
20682 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
20683 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
20684 for OPTION_MASK_ALTIVEC.
20686 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20688 * config.gcc: Include the glibc-stdint.h header for zTPF.
20690 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20692 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
20693 direct FPR-GPR copies.
20694 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
20697 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
20699 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
20700 operands to the prologue_tpf expander.
20701 (s390_emit_epilogue): Likewise.
20702 (s390_option_override_internal): Do error checking and setup for
20704 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
20705 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
20706 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
20707 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
20708 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
20709 operands for the check flag and the branch target.
20710 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
20711 ("mtpf-trace-hook-prologue-target")
20712 ("mtpf-trace-hook-epilogue-check")
20713 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
20715 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
20716 options are for debugging purposes and will not be documented
20719 2020-03-04 Jakub Jelinek <jakub@redhat.com>
20722 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
20724 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
20725 argument. Change pd argument so that it can be modified. Turn
20726 constant non-CONSTRUCTOR store into non-constant if it is too large.
20727 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
20729 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
20732 2020-02-04 Richard Biener <rguenther@suse.de>
20734 PR tree-optimization/93964
20735 * graphite-isl-ast-to-gimple.c
20736 (gcc_expression_from_isl_ast_expr_id): Add intermediate
20737 conversion for pointer to integer converts.
20738 * graphite-scop-detection.c (assign_parameter_index_in_region):
20741 2020-03-04 Martin Liska <mliska@suse.cz>
20745 * doc/invoke.texi: Clarify --help=language and --help=common
20748 2020-03-04 Jakub Jelinek <jakub@redhat.com>
20750 PR tree-optimization/94001
20751 * tree-tailcall.c (process_assignment): Before comparing op1 to
20752 *ass_var, verify *ass_var is non-NULL.
20754 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
20757 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
20760 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
20762 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
20763 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
20764 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
20765 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
20766 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
20767 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
20768 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
20769 (V_bf_low, V_bf_cvt_m): New mode attributes.
20770 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
20771 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
20772 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
20773 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
20774 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
20776 2020-03-03 Jakub Jelinek <jakub@redhat.com>
20778 PR tree-optimization/93582
20779 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
20780 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
20781 members, initialize them in the constructor and if mask is non-NULL,
20782 artificially push_partial_def {} for the portions of the mask that
20784 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
20785 val and return (void *)-1. Formatting fix.
20786 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
20788 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
20789 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
20791 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
20793 (visit_stmt): Formatting fix.
20795 2020-03-03 Richard Biener <rguenther@suse.de>
20797 PR tree-optimization/93946
20798 * alias.h (refs_same_for_tbaa_p): Declare.
20799 * alias.c (refs_same_for_tbaa_p): New function.
20800 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
20802 * tree-ssa-scopedtables.h
20803 (avail_exprs_stack::lookup_avail_expr): Add output argument
20804 giving access to the hashtable entry.
20805 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
20807 * tree-ssa-dom.c: Include alias.h.
20808 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
20809 removing redundant store.
20810 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
20811 (ao_ref_init_from_vn_reference): Adjust prototype.
20812 (vn_reference_lookup_pieces): Likewise.
20813 (vn_reference_insert_pieces): Likewise.
20814 * tree-ssa-sccvn.c: Track base alias set in addition to alias
20816 (eliminate_dom_walker::eliminate_stmt): Also check base alias
20817 set when removing redundant stores.
20818 (visit_reference_op_store): Likewise.
20819 * dse.c (record_store): Adjust valdity check for redundant
20822 2020-03-03 Jakub Jelinek <jakub@redhat.com>
20825 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
20827 PR rtl-optimization/94002
20828 * explow.c (plus_constant): Punt if cst has VOIDmode and
20829 get_pool_mode is different from mode.
20831 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20833 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
20834 address has an offset which fits the scalling constraint for a
20835 load/store operation.
20836 (legitimate_scaled_address_p): Update use
20837 leigitimate_small_data_address_p.
20838 (arc_print_operand): Likewise.
20839 (arc_legitimate_address_p): Likewise.
20840 (legitimate_small_data_address_p): Likewise.
20842 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20844 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
20845 (fnmasf4_fpu): Likewise.
20847 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20849 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
20851 (subdi3): Likewise.
20852 (adddi3_i): Remove pattern.
20853 (subdi3_i): Likewise.
20855 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
20857 * config/arc/arc.md (eh_return): Add length info.
20859 2020-03-02 David Malcolm <dmalcolm@redhat.com>
20861 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
20863 2020-03-02 David Malcolm <dmalcolm@redhat.com>
20865 * doc/invoke.texi (Static Analyzer Options): Add
20866 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
20869 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
20872 * config/i386/i386.md (movstrict<mode>): Allow only
20873 registers with VALID_INT_MODE_P modes.
20875 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
20877 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
20878 (reduc_insn): Use 'U' and 'B' operand codes.
20879 (reduc_<reduc_op>_scal_<mode>): Allow all types.
20880 (reduc_<reduc_op>_scal_v64di): Delete.
20881 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
20882 (*plus_carry_dpp_shr_v64si): Change to ...
20883 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
20884 (mov_from_lane63_v64di): Change to ...
20885 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
20886 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
20887 Support UNSPEC_MOV_DPP_SHR output formats.
20888 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
20889 Add "use_extends" reductions.
20890 (print_operand_address): Add 'I' and 'U' codes.
20891 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
20893 2020-03-02 Martin Liska <mliska@suse.cz>
20895 * lto-wrapper.c: Fix typo in comment about
20896 C++ standard version.
20898 2020-03-01 Martin Sebor <msebor@redhat.com>
20901 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
20903 2020-03-01 Martin Sebor <msebor@redhat.com>
20905 PR middle-end/93829
20906 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
20907 of a pointer in the outermost ADDR_EXPRs.
20909 2020-02-28 Jeff Law <law@redhat.com>
20911 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
20912 * config/v850/v850.c (v850_asm_trampoline_template): Update
20915 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
20918 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
20921 2020-02-28 Martin Liska <mliska@suse.cz>
20924 * configure.ac: Improve detection of ld_date by requiring
20925 either two dashes or none.
20926 * configure: Regenerate.
20928 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
20930 PR rtl-optimization/93564
20931 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
20932 do not honor reg alloc order.
20934 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
20937 * config/aarch64/aarch64.c (aarch64_override_options): Fix
20938 misleading warning string.
20940 2020-02-27 Martin Sebor <msebor@redhat.com>
20942 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
20944 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
20947 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
20948 Split the insn into two parts. This insn only does variable
20949 extract from a register.
20950 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
20951 variable extract from memory.
20952 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
20953 only does variable extract from a register.
20954 (vsx_extract_v4sf_var_load): New insn, do variable extract from
20956 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
20957 into two parts. This insn only does variable extract from a
20959 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
20960 do variable extract from memory.
20962 2020-02-27 Martin Jambor <mjambor@suse.cz>
20963 Feng Xue <fxue@os.amperecomputing.com>
20966 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
20967 new function calls_same_node_or_its_all_contexts_clone_p.
20968 (cgraph_edge_brings_value_p): Use it.
20969 (cgraph_edge_brings_value_p): Likewise.
20970 (self_recursive_pass_through_p): Return false if caller is a clone.
20971 (self_recursive_agg_pass_through_p): Likewise.
20973 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
20975 PR middle-end/92152
20976 * alias.c (ends_tbaa_access_path_p): Break out from ...
20977 (component_uses_parent_alias_set_from): ... here.
20978 * alias.h (ends_tbaa_access_path_p): Declare.
20979 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
20980 handle trailing arrays past end of tbaa access path.
20981 (aliasing_component_refs_p): ... here; likewise.
20982 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
20983 path; disambiguate also past end of it.
20984 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
20987 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
20989 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
20990 beginning of the file.
20991 (vcreate_bf16, vcombine_bf16): New.
20992 (vdup_n_bf16, vdupq_n_bf16): New.
20993 (vdup_lane_bf16, vdup_laneq_bf16): New.
20994 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
20995 (vduph_lane_bf16, vduph_laneq_bf16): New.
20996 (vset_lane_bf16, vsetq_lane_bf16): New.
20997 (vget_lane_bf16, vgetq_lane_bf16): New.
20998 (vget_high_bf16, vget_low_bf16): New.
20999 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21000 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21001 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21002 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21003 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21004 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21005 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21006 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21007 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21008 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21009 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
21010 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21011 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21012 (vreinterpretq_bf16_p128): New.
21013 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21014 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21015 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21016 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21017 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21018 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21019 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21020 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21021 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21022 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21023 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21024 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21025 (vreinterpretq_p128_bf16): New.
21026 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
21027 (V_elem): Likewise.
21028 (V_elem_l): Likewise.
21029 (VD_LANE): Likewise.
21031 (V_DOUBLE): Likewise.
21032 (VDQX): Add V4BF and V8BF.
21033 (V_two_elem, V_three_elem, V_four_elem): Likewise.
21035 (V_HALF): Likewise.
21036 (V_double_vector_mode): Likewise.
21037 (V_cmp_result): Likewise.
21038 (V_uf_sclr): Likewise.
21039 (V_sz_elem): Likewise.
21040 (Is_d_reg): Likewise.
21041 (V_mode_nunits): Likewise.
21042 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
21044 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21046 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
21047 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
21048 (<expander><mode>3<exec>): Likewise.
21049 (<expander><mode>3): New.
21050 (v<expander><mode>3): New.
21051 (<expander><mode>3): New.
21052 (<expander><mode>3<exec>): Rename to ...
21053 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
21054 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
21056 2020-02-27 Alexandre Oliva <oliva@adacore.com>
21058 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
21061 2020-02-27 Richard Biener <rguenther@suse.de>
21063 PR tree-optimization/93508
21064 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
21065 non-_CHK variants. Valueize their length arguments.
21067 2020-02-27 Richard Biener <rguenther@suse.de>
21069 PR tree-optimization/93953
21070 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
21071 to the hash-map entry.
21073 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
21075 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
21077 2020-02-27 Mark Williams <mwilliams@fb.com>
21079 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
21080 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
21081 -ffile-prefix-map and -fmacro-prefix-map.
21082 * lto-streamer-out.c: Include file-prefix-map.h.
21083 (lto_output_location): Remap the file part of locations.
21085 2020-02-27 Jakub Jelinek <jakub@redhat.com>
21088 * gimplify.c (gimplify_init_constructor): Don't promote readonly
21089 DECL_REGISTER variables to TREE_STATIC.
21091 PR tree-optimization/93582
21092 PR tree-optimization/93945
21093 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
21094 non-zero INTEGER_CST second argument and ref->offset or ref->size
21095 not a multiple of BITS_PER_UNIT.
21097 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
21099 * doc/install.texi (Binaries): Update description of BullFreeware.
21101 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
21105 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
21106 C++ Language Options, Warning Options, and Static Analyzer
21107 Options lists. Document negative form of options enabled by
21108 default. Move some things around to more accurately sort
21109 warnings by category.
21110 (C++ Dialect Options, Warning Options, Static Analyzer
21111 Options): Document negative form of options when enabled by
21112 default. Move some things around to more accurately sort
21113 warnings by category. Add some missing index entries.
21114 Light copy-editing.
21116 2020-02-26 Carl Love <cel@us.ibm.com>
21119 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
21120 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
21121 for the vector unsigned short arguments. It is also listed as the
21122 name of the built-in for arguments vector unsigned short,
21123 vector unsigned int and vector unsigned long long built-ins. The
21124 name of the builtins for these arguments should be:
21125 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
21126 __builtin_crypto_vpmsumd respectively.
21128 2020-02-26 Richard Biener <rguenther@suse.de>
21130 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
21131 and load permutation.
21133 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
21135 PR middle-end/93843
21136 * optabs-tree.c (supportable_convert_operation): Reject types with
21139 2020-02-26 David Malcolm <dmalcolm@redhat.com>
21141 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
21143 2020-02-26 Jakub Jelinek <jakub@redhat.com>
21145 PR tree-optimization/93820
21146 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
21147 argument to ALL_INTEGER_CST_P boolean.
21148 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
21149 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
21150 adjacent INTEGER_CST store into merged_store->only_constants like
21153 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21156 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
21158 * cfghooks.c (verify_flow_info): Likewise.
21159 * predict.c (combine_predictions_for_bb): Likewise.
21160 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
21161 sucessor -> successor.
21162 (find_traces_1_round): Fix comment typo, destinarion -> destination.
21163 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
21165 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
21166 message typo, sucessors -> successors.
21168 2020-02-25 Martin Sebor <msebor@redhat.com>
21170 * doc/extend.texi (attribute access): Correct an example.
21172 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21174 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
21176 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
21177 (VAR15, VAR16): New.
21178 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
21179 (VD): Enable for V4BF.
21181 (VQ): Enable for V8BF.
21183 (VQ_NO2E): Likewise.
21184 (VDBL, Vdbl): Add V4BF.
21185 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
21186 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
21187 (bfloat16x8x2_t): Likewise.
21188 (bfloat16x4x3_t): Likewise.
21189 (bfloat16x8x3_t): Likewise.
21190 (bfloat16x4x4_t): Likewise.
21191 (bfloat16x8x4_t): Likewise.
21192 (vcombine_bf16): New.
21193 (vld1_bf16, vld1_bf16_x2): New.
21194 (vld1_bf16_x3, vld1_bf16_x4): New.
21195 (vld1q_bf16, vld1q_bf16_x2): New.
21196 (vld1q_bf16_x3, vld1q_bf16_x4): New.
21197 (vld1_lane_bf16): New.
21198 (vld1q_lane_bf16): New.
21199 (vld1_dup_bf16): New.
21200 (vld1q_dup_bf16): New.
21203 (vld2_dup_bf16): New.
21204 (vld2q_dup_bf16): New.
21207 (vld3_dup_bf16): New.
21208 (vld3q_dup_bf16): New.
21211 (vld4_dup_bf16): New.
21212 (vld4q_dup_bf16): New.
21213 (vst1_bf16, vst1_bf16_x2): New.
21214 (vst1_bf16_x3, vst1_bf16_x4): New.
21215 (vst1q_bf16, vst1q_bf16_x2): New.
21216 (vst1q_bf16_x3, vst1q_bf16_x4): New.
21217 (vst1_lane_bf16): New.
21218 (vst1q_lane_bf16): New.
21226 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
21228 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
21229 (VALL_F16): Likewise.
21230 (VALLDI_F16): Likewise.
21232 (Vetype): Likewise.
21233 (vswap_width_name): Likewise.
21234 (VSWAP_WIDTH): Likewise.
21238 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
21239 (vget_lane_bf16, vgetq_lane_bf16): New.
21240 (vcreate_bf16): New.
21241 (vdup_n_bf16, vdupq_n_bf16): New.
21242 (vdup_lane_bf16, vdup_laneq_bf16): New.
21243 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
21244 (vduph_lane_bf16, vduph_laneq_bf16): New.
21245 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
21246 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
21247 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
21248 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
21249 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
21250 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
21251 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
21252 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
21253 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
21254 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
21255 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
21256 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
21257 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
21258 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
21259 (vreinterpretq_bf16_p128): New.
21260 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
21261 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
21262 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
21263 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
21264 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
21265 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
21266 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
21267 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
21268 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
21269 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
21270 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
21271 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
21272 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
21273 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
21274 (vreinterpretq_p128_bf16): New.
21276 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
21278 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
21279 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
21280 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
21281 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
21282 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
21283 * config/arm/iterators.md (VSF2BF): New attribute.
21284 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
21285 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
21286 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
21288 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
21290 * config/arm/arm.md (required_for_purecode): New attribute.
21291 (enabled): Handle required_for_purecode.
21292 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
21293 work with -mpure-code.
21295 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21297 PR rtl-optimization/93908
21298 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
21301 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
21303 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
21305 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
21307 * doc/install.texi (--enable-checking): Adjust wording.
21309 2020-02-25 Richard Biener <rguenther@suse.de>
21311 PR tree-optimization/93868
21312 * tree-vect-slp.c (slp_copy_subtree): New function.
21313 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
21314 re-arranging stmts in it.
21316 2020-02-25 Jakub Jelinek <jakub@redhat.com>
21318 PR middle-end/93874
21319 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
21320 dummy function and remove it at the end.
21322 PR translation/93864
21323 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
21324 paramter -> parameter.
21325 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
21326 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
21328 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
21330 * doc/install.texi (--enable-checking): Properly document current
21332 (--enable-stage1-checking): Minor clarification about bootstrap.
21334 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21337 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
21338 -fanalyzer-checker=taint is also required.
21339 (-fanalyzer-checker=): Note that providing this option enables the
21340 given checker, and doing so may be required for checkers that are
21341 disabled by default.
21343 2020-02-24 David Malcolm <dmalcolm@redhat.com>
21345 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
21346 significant control flow events; add a "3" which shows all
21347 control flow events; the old "3" becomes "4".
21349 2020-02-24 Jakub Jelinek <jakub@redhat.com>
21351 PR tree-optimization/93582
21352 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
21353 pd.offset and pd.size to be counted in bits rather than bytes, add
21354 support for maxsizei that is not a multiple of BITS_PER_UNIT and
21355 handle bitfield stores and loads.
21356 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
21357 uncomparable quantities - bytes vs. bits. Allow push_partial_def
21358 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
21359 pd.offset/pd.size to be counted in bits rather than bytes.
21360 Formatting fix. Rename shadowed len variable to buflen.
21362 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21363 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
21366 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
21367 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
21368 * opts-common.c (parse_options_from_collect_gcc_options): New function.
21369 (prepend_xassembler_to_collect_as_options): Likewise.
21370 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
21371 (prepend_xassembler_to_collect_as_options): Likewise.
21372 * lto-opts.c (lto_write_options): Stream assembler options
21373 in COLLECT_AS_OPTIONS.
21374 * lto-wrapper.c (xassembler_options_error): New static variable.
21375 (get_options_from_collect_gcc_options): Move parsing options code to
21376 parse_options_from_collect_gcc_options and call it.
21377 (merge_and_complain): Validate -Xassembler options.
21378 (append_compiler_options): Handle OPT_Xassembler.
21379 (run_gcc): Append command line -Xassembler options to
21380 collect_gcc_options.
21381 * doc/invoke.texi: Add documentation about using Xassembler
21384 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
21386 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
21388 (riscv_rtx_costs): Update cost model for LTGT.
21390 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
21392 PR rtl-optimization/93564
21393 * ira-color.c (struct update_cost_queue_elem): New member start.
21394 (queue_update_cost, get_next_update_cost): Add new arg start.
21395 (allocnos_conflict_p): New function.
21396 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
21397 Add checking conflicts with allocnos_conflict_p.
21398 (update_costs_from_prefs, restore_costs_from_copies): Adjust
21399 update_costs_from_allocno calls.
21400 (update_conflict_hard_regno_costs): Add checking conflicts with
21401 allocnos_conflict_p. Adjust calls of queue_update_cost and
21402 get_next_update_cost.
21403 (assign_hard_reg): Adjust calls of queue_update_cost. Add
21405 (bucket_allocno_compare_func): Restore previous version.
21407 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
21409 * config/pa/pa.c (pa_function_value): Fix check for word and
21410 double-word size when handling aggregate return values.
21411 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
21412 that homogeneous SFmode and DFmode aggregates are passed and returned
21413 in general registers.
21415 2020-02-21 Jakub Jelinek <jakub@redhat.com>
21417 PR translation/93759
21418 * opts.c (print_filtered_help): Translate help before appending
21419 messages to it rather than after that.
21421 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21423 PR rtl-optimization/PR92989
21424 * lra-lives.c (process_bb_lives): Restore the original order
21425 of the bb liveness update. Call make_hard_regno_dead for each
21426 register clobbered at the start of an EH receiver.
21428 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
21431 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
21432 self-recursively generated.
21434 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
21437 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
21440 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
21442 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
21443 Document new target supports option.
21445 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
21447 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
21448 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
21449 * config/arm/iterators.md (MATMUL): New iterator.
21450 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
21451 (mmla_sfx): New attribute.
21452 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
21453 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
21454 (UNSPEC_MATMUL_US): New.
21456 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21458 * config/arm/arm.md: Prevent scalar shifts from being used when big
21461 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
21462 Richard Biener <rguenther@suse.de>
21464 PR tree-optimization/93586
21465 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
21466 after mismatched array refs; do not sure type size information to
21467 recover from unmatched referneces with !flag_strict_aliasing_p.
21469 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21471 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
21472 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
21473 (scatter_store<mode>): Rename to ...
21474 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
21475 (scatter<mode>_exec): Delete. Move contents ...
21476 (mask_scatter_store<mode>): ... here, and rename that to ...
21477 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
21478 Remove mode conversion.
21479 (mask_gather_load<mode>): Rename to ...
21480 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
21481 Remove mode conversion.
21482 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
21484 2020-02-21 Martin Jambor <mjambor@suse.cz>
21486 PR tree-optimization/93845
21487 * tree-sra.c (verify_sra_access_forest): Only test access size of
21490 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21492 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
21493 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
21494 (addv64di3_exec): Likewise.
21495 (subv64di3): Likewise.
21496 (subv64di3_exec): Likewise.
21497 (addv64di3_zext): Likewise.
21498 (addv64di3_zext_exec): Likewise.
21499 (addv64di3_zext_dup): Likewise.
21500 (addv64di3_zext_dup_exec): Likewise.
21501 (addv64di3_zext_dup2): Likewise.
21502 (addv64di3_zext_dup2_exec): Likewise.
21503 (addv64di3_sext_dup2): Likewise.
21504 (addv64di3_sext_dup2_exec): Likewise.
21505 (<expander>v64di3): Likewise.
21506 (<expander>v64di3_exec): Likewise.
21507 (*<reduc_op>_dpp_shr_v64di): Likewise.
21508 (*plus_carry_dpp_shr_v64di): Likewise.
21509 * config/gcn/gcn.md (adddi3): Likewise.
21510 (addptrdi3): Likewise.
21511 (<expander>di3): Likewise.
21513 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
21515 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
21517 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21519 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
21520 support. Use aarch64_emit_mult instead of emitting multiplication
21521 instructions directly.
21522 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
21523 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
21525 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21527 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
21528 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
21529 instead of emitting multiplication instructions directly.
21530 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
21531 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
21532 (@aarch64_frecps<mode>): New expanders.
21534 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21536 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
21537 on and produce uint64_ts rather than ints.
21538 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
21539 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
21541 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21543 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
21544 an unused xmsk register when handling approximate rsqrt.
21546 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
21548 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
21549 flag_finite_math_only condition.
21551 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
21554 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
21555 to destination operand for shufps alternative.
21556 (*vec_extractv2si_1): Ditto.
21558 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
21561 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
21564 2020-02-20 Martin Liska <mliska@suse.cz>
21566 PR translation/93831
21567 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
21569 2020-02-20 Martin Liska <mliska@suse.cz>
21571 PR translation/93830
21572 * common/config/avr/avr-common.c: Remote trailing "|".
21574 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21576 * collect2.c (maybe_run_lto_and_relink): Fix typo in
21579 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
21581 PR tree-optimization/93767
21582 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
21583 access-size bias from the offset calculations for negative strides.
21585 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
21587 * collect2.c (c_file, o_file): Make const again.
21588 (ldout,lderrout, dump_ld_file): Remove.
21589 (tool_cleanup): Avoid calling not signal-safe functions.
21590 (maybe_run_lto_and_relink): Avoid possible signal handler
21591 access to unintialzed memory (lto_o_files).
21592 (main): Avoid leaking temp files in $TMPDIR.
21593 Initialize c_file/o_file with concat, which avoids exposing
21594 uninitialized memory to signal handler, which calls unlink(!).
21595 Avoid calling maybe_unlink when the main function returns,
21596 since the atexit handler is already doing this.
21597 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
21599 2020-02-19 Martin Jambor <mjambor@suse.cz>
21601 PR tree-optimization/93776
21602 * tree-sra.c (create_access): Do not create zero size accesses.
21603 (get_access_for_expr): Do not search for zero sized accesses.
21605 2020-02-19 Martin Jambor <mjambor@suse.cz>
21607 PR tree-optimization/93667
21608 * tree-sra.c (scalarizable_type_p): Return false if record fields
21609 do not follow wach other.
21611 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
21613 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
21614 rather than fmv.x.s/fmv.s.x.
21616 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
21618 * config/aarch64/aarch64-simd-builtins.def
21619 (intrinsic_vec_smult_lo_): New.
21620 (intrinsic_vec_umult_lo_): Likewise.
21621 (vec_widen_smult_hi_): Likewise.
21622 (vec_widen_umult_hi_): Likewise.
21623 * config/aarch64/aarch64-simd.md
21624 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
21625 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
21626 (vmull_high_s16): Likewise.
21627 (vmull_high_s32): Likewise.
21628 (vmull_high_u8): Likewise.
21629 (vmull_high_u16): Likewise.
21630 (vmull_high_u32): Likewise.
21631 (vmull_s8): Likewise.
21632 (vmull_s16): Likewise.
21633 (vmull_s32): Likewise.
21634 (vmull_u8): Likewise.
21635 (vmull_u16): Likewise.
21636 (vmull_u32): Likewise.
21638 2020-02-18 Martin Liska <mliska@suse.cz>
21640 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
21641 bootstrap by missing removal of invalid sanity check.
21643 2020-02-18 Martin Liska <mliska@suse.cz>
21646 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
21647 Always compare LHS of gimple_assign.
21649 2020-02-18 Martin Liska <mliska@suse.cz>
21652 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
21653 and return type of functions.
21654 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
21655 Drop MALLOC attribute for void functions.
21656 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
21657 malloc_state for a new VOID clone.
21659 2020-02-18 Martin Liska <mliska@suse.cz>
21662 * common.opt: Add -fprofile-reproducibility.
21663 * doc/invoke.texi: Document it.
21664 * value-prof.c (dump_histogram_value):
21665 Document and support behavior for counters[0]
21666 being a negative value.
21667 (get_nth_most_common_value): Handle negative
21668 counters[0] in respect to flag_profile_reproducible.
21670 2020-02-18 Jakub Jelinek <jakub@redhat.com>
21673 * cgraph.c (verify_speculative_call): Use speculative_id instead of
21674 speculative_uid in messages. Remove trailing whitespace from error
21675 message. Use num_speculative_call_targets instead of
21676 num_speculative_targets in a message.
21677 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
21678 edge messages and stmt instead of cal_stmt in reference message.
21680 PR tree-optimization/93780
21681 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
21682 before calling build_vector_type.
21683 (execute_update_addresses_taken): Likewise.
21686 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
21687 typo, functoin -> function.
21688 * tree.c (free_lang_data_in_decl): Fix comment typo,
21689 functoin -> function.
21690 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
21692 2020-02-17 David Malcolm <dmalcolm@redhat.com>
21694 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
21696 (print_option_information): Don't call get_option_url if URLs
21699 2020-02-17 Alexandre Oliva <oliva@adacore.com>
21701 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
21702 handling of register_common-less targets.
21704 2020-02-17 Martin Liska <mliska@suse.cz>
21707 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
21709 2020-02-17 Martin Liska <mliska@suse.cz>
21711 PR translation/93755
21712 * config/rs6000/rs6000.c (rs6000_option_override_internal):
21715 2020-02-17 Martin Liska <mliska@suse.cz>
21718 * config/rx/elf.opt: Fix typo.
21720 2020-02-17 Richard Biener <rguenther@suse.de>
21723 * opts-global.c (print_ignored_options): Use inform and
21726 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
21729 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
21731 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
21734 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
21735 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
21737 2020-02-15 Jason Merrill <jason@redhat.com>
21739 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
21741 2020-02-15 Jakub Jelinek <jakub@redhat.com>
21743 PR tree-optimization/93744
21744 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
21745 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
21746 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
21747 sure @2 in the first and @1 in the other patterns has no side-effects.
21749 2020-02-15 David Malcolm <dmalcolm@redhat.com>
21750 Bernd Edlinger <bernd.edlinger@hotmail.de>
21754 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
21755 * configure.ac (--with-diagnostics-urls): New configuration
21756 option, based on --with-diagnostics-color.
21757 (DIAGNOSTICS_URLS_DEFAULT): New define.
21758 * config.h: Regenerate.
21759 * configure: Regenerate.
21760 * diagnostic.c (diagnostic_urls_init): Handle -1 for
21761 DIAGNOSTICS_URLS_DEFAULT from configure-time
21762 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
21763 and TERM_URLS environment variable.
21764 * diagnostic-url.h (diagnostic_url_format): New enum type.
21765 (diagnostic_urls_enabled_p): rename to...
21766 (determine_url_format): ... this, and change return type.
21767 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
21768 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
21769 the linux console, and mingw.
21770 (diagnostic_urls_enabled_p): rename to...
21771 (determine_url_format): ... this, and adjust.
21772 * pretty-print.h (pretty_printer::show_urls): rename to...
21773 (pretty_printer::url_format): ... this, and change to enum.
21774 * pretty-print.c (pretty_printer::pretty_printer,
21775 pp_begin_url, pp_end_url, test_urls): Adjust.
21776 * doc/install.texi (--with-diagnostics-urls): Document the new
21777 configuration option.
21778 (--with-diagnostics-color): Document the existing interaction
21779 with GCC_COLORS better.
21780 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
21781 vindex reference. Update description of defaults based on the above.
21782 (-fdiagnostics-color): Update description of how -fdiagnostics-color
21783 interacts with GCC_COLORS.
21785 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
21788 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
21789 conjunction with TARGET_GNU_TLS in early return.
21791 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
21793 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
21794 the mode is not wider than UNITS_PER_WORD.
21796 2020-02-14 Martin Jambor <mjambor@suse.cz>
21798 PR tree-optimization/93516
21799 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
21800 access of the same type as the parent.
21801 (propagate_subaccesses_from_lhs): Likewise.
21803 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
21806 * config/i386/avx512vbmi2intrin.h
21807 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
21808 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
21809 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
21810 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
21811 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
21812 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
21813 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
21814 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
21815 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
21816 of lacking a closing parenthesis.
21817 * config/i386/avx512vbmi2vlintrin.h
21818 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
21819 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
21820 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
21821 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
21822 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
21823 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
21824 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
21825 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
21826 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
21827 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
21828 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
21829 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
21830 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
21831 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
21832 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
21833 _mm_shldi_epi32, _mm_mask_shldi_epi32,
21834 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
21835 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
21837 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
21840 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
21841 the target function entry.
21843 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21845 * common/config/arc/arc-common.c (arc_option_optimization_table):
21846 Disable if-conversion step when optimized for size.
21848 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21850 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
21851 R12-R15 are always in ARCOMPACT16_REGS register class.
21852 * config/arc/arc.opt (mq-class): Deprecate.
21853 * config/arc/constraint.md ("q"): Remove dependency on mq-class
21855 * doc/invoke.texi (mq-class): Update text.
21856 * common/config/arc/arc-common.c (arc_option_optimization_table):
21859 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21861 * config/arc/arc.c (arc_insn_cost): New function.
21862 (TARGET_INSN_COST): Define.
21863 * config/arc/arc.md (cost): New attribute.
21864 (add_n): Use arc_nonmemory_operand.
21865 (ashlsi3_insn): Likewise, also update constraints.
21866 (ashrsi3_insn): Likewise.
21867 (rotrsi3): Likewise.
21868 (add_shift): Likewise.
21869 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
21871 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
21873 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
21875 (umulsidi_600): Likewise.
21877 2020-02-13 Jakub Jelinek <jakub@redhat.com>
21880 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
21881 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
21882 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
21883 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
21884 pass __A to the builtin followed by __W instead of __A followed by
21886 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
21887 _mm512_mask_popcnt_epi64): Likewise.
21888 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
21889 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
21890 _mm256_mask_popcnt_epi64): Likewise.
21892 PR tree-optimization/93582
21893 * fold-const.h (shift_bytes_in_array_left,
21894 shift_bytes_in_array_right): Declare.
21895 * fold-const.c (shift_bytes_in_array_left,
21896 shift_bytes_in_array_right): New function, moved from
21897 gimple-ssa-store-merging.c, no longer static.
21898 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
21899 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
21900 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
21901 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
21902 shift_bytes_in_array.
21903 (verify_shift_bytes_in_array): Rename to ...
21904 (verify_shift_bytes_in_array_left): ... this. Use
21905 shift_bytes_in_array_left instead of shift_bytes_in_array.
21906 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
21907 instead of verify_shift_bytes_in_array.
21908 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
21909 / native_interpret_expr where the store covers all needed bits,
21910 punt on PDP-endian, otherwise allow all involved offsets and sizes
21911 not to be byte-aligned.
21914 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
21915 use const_0_to_255_operand predicate instead of immediate_operand.
21916 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
21917 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
21918 vgf2p8affineinvqb_<mode><mask_name>,
21919 vgf2p8affineqb_<mode><mask_name>): Drop mode from
21920 const_0_to_255_operand predicated operands.
21922 2020-02-12 Jeff Law <law@redhat.com>
21924 * config/h8300/h8300.md (comparison shortening peepholes): Use
21925 a mode iterator to merge the HImode and SImode peepholes.
21927 2020-02-12 Jakub Jelinek <jakub@redhat.com>
21929 PR middle-end/93663
21930 * real.c (is_even): Make static. Function comment fix.
21931 (is_halfway_below): Make static, don't assert R is not inf/nan,
21932 instead return false for those. Small formatting fixes.
21934 2020-02-12 Martin Sebor <msebor@redhat.com>
21936 PR middle-end/93646
21937 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
21938 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
21939 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
21940 (strlen_check_and_optimize_call): Adjust callee name.
21942 2020-02-12 Jeff Law <law@redhat.com>
21944 * config/h8300/h8300.md (comparison shortening peepholes): Drop
21945 (and (xor)) variant. Combine other two into single peephole.
21947 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
21949 PR rtl-optimization/93565
21950 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
21952 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
21954 * config/aarch64/aarch64-simd.md
21955 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
21956 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
21957 generating separate ADDV and zero_extend patterns.
21958 * config/aarch64/iterators.md (VDQV_E): New iterator.
21960 2020-02-12 Jeff Law <law@redhat.com>
21962 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
21963 expanders, splits, etc.
21964 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
21965 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
21966 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
21967 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
21968 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
21969 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
21970 function prototype.
21971 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
21973 2020-02-12 Jakub Jelinek <jakub@redhat.com>
21976 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
21977 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
21978 TARGET_AVX512DQ from condition.
21979 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
21980 instead of <mask_mode512bit_condition> in condition. If
21981 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
21983 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
21986 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
21989 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
21991 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
21993 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
21994 where strlen is more legible.
21995 (rs6000_builtin_vectorized_libmass): Ditto.
21996 (rs6000_print_options_internal): Ditto.
21998 2020-02-11 Martin Sebor <msebor@redhat.com>
22000 PR tree-optimization/93683
22001 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
22003 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
22005 * config/rs6000/predicates.md (cint34_operand): Rename the
22006 -mprefixed-addr option to be -mprefixed.
22007 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
22008 the -mprefixed-addr option to be -mprefixed.
22009 (OTHER_FUTURE_MASKS): Likewise.
22010 (POWERPC_MASKS): Likewise.
22011 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
22012 the -mprefixed-addr option to be -mprefixed. Change error
22013 messages to refer to -mprefixed.
22014 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
22016 (rs6000_legitimate_offset_address_p): Likewise.
22017 (rs6000_mode_dependent_address): Likewise.
22018 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
22019 "-mprefixed" for target attributes and pragmas.
22020 (address_to_insn_form): Rename the -mprefixed-addr option to be
22022 (rs6000_adjust_insn_length): Likewise.
22023 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
22024 -mprefixed-addr option to be -mprefixed.
22025 (ASM_OUTPUT_OPCODE): Likewise.
22026 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
22027 -mprefixed-addr option to be -mprefixed.
22028 * config/rs6000/rs6000.opt (-mprefixed): Rename the
22029 -mprefixed-addr option to be prefixed. Change the option from
22030 being undocumented to being documented.
22031 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
22032 -mprefixed option. Update the -mpcrel documentation to mention
22035 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
22037 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
22038 including FIRST_PSEUDO_REGISTER - 1.
22039 * ira-color.c (print_hard_reg_set): Ditto.
22041 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22043 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
22044 (USTERNOP_QUALIFIERS): New define.
22045 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
22046 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
22047 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
22048 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
22049 * config/arm/arm_neon.h (vusdot_s32): New.
22050 (vusdot_lane_s32): New.
22051 (vusdotq_lane_s32): New.
22052 (vsudot_lane_s32): New.
22053 (vsudotq_lane_s32): New.
22054 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
22055 * config/arm/iterators.md (DOTPROD_I8MM): New.
22056 (sup, opsuffix): Add <us/su>.
22057 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
22058 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
22060 2020-02-11 Richard Biener <rguenther@suse.de>
22062 PR tree-optimization/93661
22063 PR tree-optimization/93662
22064 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
22065 tree_to_poly_int64.
22066 * tree-sra.c (get_access_for_expr): Likewise.
22068 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22071 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
22072 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
22073 Change condition from TARGET_AVX2 to TARGET_AVX.
22075 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
22078 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
22079 argument of strncmp.
22081 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22083 Try to generate zero-based comparisons.
22084 * config/cris/cris.c (cris_reduce_compare): New function.
22085 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
22086 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
22087 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
22089 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
22092 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
22093 in Thumb state and also as a destination in Arm state. Add T16
22096 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
22098 * md.texi (Define Subst): Match closing paren in example.
22100 2020-02-10 Jakub Jelinek <jakub@redhat.com>
22104 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
22105 arguments of strncmp.
22107 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
22110 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
22111 but different source value.
22112 (adjust_callers_for_value_intersection): New function.
22113 (gather_edges_for_value): Adjust order of callers to let a
22114 non-self-recursive caller be the first element.
22115 (self_recursive_pass_through_p): Add a new parameter "simple", and
22116 check generalized self-recursive pass-through jump function.
22117 (self_recursive_agg_pass_through_p): Likewise.
22118 (find_more_scalar_values_for_callers_subset): Compute value from
22119 pass-through jump function for self-recursive.
22120 (intersect_with_plats): Cleanup previous implementation code for value
22121 itersection with self-recursive call edge.
22122 (intersect_with_agg_replacements): Likewise.
22123 (intersect_aggregates_with_edge): Deduce value from pass-through jump
22124 function for self-recursive call edge. Cleanup previous implementation
22125 code for value intersection with self-recursive call edge.
22126 (decide_whether_version_node): Remove dead callers and adjust order
22127 to let a non-self-recursive caller be the first element.
22129 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
22131 * recog.c: Move pass_split_before_sched2 code in front of
22132 pass_split_before_regstack.
22133 (pass_data_split_before_sched2): Rename pass to split3 from split4.
22134 (pass_data_split_before_regstack): Rename pass to split4 from split3.
22135 (rest_of_handle_split_before_sched2): Remove.
22136 (pass_split_before_sched2::execute): Unconditionally call
22138 (enable_split_before_sched2): New function.
22139 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
22140 (pass_split_before_regstack::gate): Ditto.
22141 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
22142 Update name check for renamed split4 pass.
22143 * config/sh/sh.c (register_sh_passes): Update pass insertion
22144 point for renamed split4 pass.
22146 2020-02-09 Jakub Jelinek <jakub@redhat.com>
22148 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
22149 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
22150 copying them around between host and target.
22152 2020-02-08 Andrew Pinski <apinski@marvell.com>
22155 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
22156 STRICT_ALIGNMENT also.
22158 2020-02-08 Jim Wilson <jimw@sifive.com>
22161 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
22163 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
22164 Jakub Jelinek <jakub@redhat.com>
22167 * config/i386/i386.h (CALL_USED_REGISTERS): Make
22168 xmm16-xmm31 call-used even in 64-bit ms-abi.
22170 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
22172 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
22173 (simd_ummla, simd_usmmla): Likewise.
22174 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
22175 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
22176 (vusmmlaq_s32): New.
22178 2020-02-07 Richard Biener <rguenther@suse.de>
22180 PR middle-end/93519
22181 * tree-inline.c (fold_marked_statements): Do a PRE walk,
22182 skipping unreachable regions.
22183 (optimize_inline_calls): Skip folding stmts when we didn't
22186 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
22189 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
22190 Don't return aggregates with only SFmode and DFmode in SSE
22192 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
22194 2020-02-07 Jakub Jelinek <jakub@redhat.com>
22197 * config/rs6000/rs6000-logue.c
22198 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
22199 if it fails, move rs into end_addr and retry. Add
22200 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
22201 the insn pattern doesn't describe well what exactly happens to
22205 * config/i386/predicates.md (avx_identity_operand): Remove.
22206 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
22207 (avx_<castmode><avxsizesuffix>_<castmode>,
22208 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
22209 a VEC_CONCAT of the operand and UNSPEC_CAST.
22210 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
22211 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
22215 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
22216 recog_data.insn if distance_non_agu_define changed it.
22218 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
22221 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
22222 we only had X-FORM (reg+reg) addressing for vectors. Also before
22223 ISA 3.0, we only had X-FORM addressing for scalars in the
22224 traditional Altivec registers.
22226 2020-02-06 <zhongyunde@huawei.com>
22227 Vladimir Makarov <vmakarov@redhat.com>
22229 PR rtl-optimization/93561
22230 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
22231 hard register range.
22233 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22235 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
22238 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
22240 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
22241 where the low and the high 32 bits are equal to each other specially,
22242 with an rldimi instruction.
22244 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22246 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
22248 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
22250 * config/arm/arm-tables.opt: Regenerate.
22252 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22255 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
22256 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
22257 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
22259 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
22261 PR rtl-optimization/87763
22262 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
22264 2020-02-06 Delia Burduv <delia.burduv@arm.com>
22266 * config/aarch64/aarch64-simd-builtins.def
22267 (bfmlaq): New built-in function.
22268 (bfmlalb): New built-in function.
22269 (bfmlalt): New built-in function.
22270 (bfmlalb_lane): New built-in function.
22271 (bfmlalt_lane): New built-in function.
22272 * config/aarch64/aarch64-simd.md
22273 (aarch64_bfmmlaqv4sf): New pattern.
22274 (aarch64_bfmlal<bt>v4sf): New pattern.
22275 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
22276 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
22277 (vbfmlalbq_f32): New intrinsic.
22278 (vbfmlaltq_f32): New intrinsic.
22279 (vbfmlalbq_lane_f32): New intrinsic.
22280 (vbfmlaltq_lane_f32): New intrinsic.
22281 (vbfmlalbq_laneq_f32): New intrinsic.
22282 (vbfmlaltq_laneq_f32): New intrinsic.
22283 * config/aarch64/iterators.md (BF_MLA): New int iterator.
22284 (bt): New int attribute.
22286 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
22288 * config/i386/i386.md (*pushtf): Emit "#" instead of
22289 calling gcc_unreachable in insn output.
22292 (*pushsf_rex64): Ditto for alternatives other than 1.
22293 (*pushsf): Ditto for alternatives other than 1.
22295 2020-02-06 Martin Liska <mliska@suse.cz>
22297 PR gcov-profile/91971
22298 PR gcov-profile/93466
22299 * coverage.c (coverage_init): Revert mangling of
22300 path into filename. It can lead to huge filename length.
22301 Creation of subfolders seem more natural.
22303 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22306 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
22307 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
22308 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
22310 2020-02-06 Jakub Jelinek <jakub@redhat.com>
22313 * config/i386/predicates.md (avx_identity_operand): New predicate.
22314 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
22315 define_insn_and_split.
22318 * omp-low.c (use_pointer_for_field): For nested constructs, also
22319 look for map clauses on target construct.
22320 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
22321 taskreg_nesting_level.
22324 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
22325 shared clause, call omp_notice_variable on outer context if any.
22327 2020-02-05 Jason Merrill <jason@redhat.com>
22330 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
22331 non-zero address even if weak and not yet defined.
22333 2020-02-05 Martin Sebor <msebor@redhat.com>
22335 PR tree-optimization/92765
22336 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
22337 * tree-ssa-strlen.c (compute_string_length): Remove.
22338 (determine_min_objsize): Remove.
22339 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
22340 Avoid using type size as the upper bound on string length.
22341 (handle_builtin_string_cmp): Add an argument. Adjust.
22342 (strlen_check_and_optimize_call): Pass additional argument to
22343 handle_builtin_string_cmp.
22345 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
22347 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
22348 (*pushdi2_rex64 peephole2): Unconditionally split after
22349 epilogue_completed.
22350 (*ashl<mode>3_doubleword): Ditto.
22351 (*<shift_insn><mode>3_doubleword): Ditto.
22353 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
22356 * config/rs6000/rs6000.c (get_vector_offset): Fix
22358 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
22360 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
22362 2020-02-05 David Malcolm <dmalcolm@redhat.com>
22364 * doc/analyzer.texi
22365 (Special Functions for Debugging the Analyzer): Update description
22366 of __analyzer_dump_exploded_nodes.
22368 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22371 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
22372 include sets and not clobbers in the vzeroupper pattern.
22373 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
22374 the parallel has 17 (64-bit) or 9 (32-bit) elts.
22375 (*avx_vzeroupper_1): New define_insn_and_split.
22378 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
22379 don't run when !optimize.
22380 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
22383 2020-02-05 Richard Biener <rguenther@suse.de>
22385 PR middle-end/90648
22386 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
22387 checks before matching calls.
22389 2020-02-05 Jakub Jelinek <jakub@redhat.com>
22391 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
22392 function comment typo.
22394 PR middle-end/93555
22395 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
22396 simd_clone_create failed when i == 0, adjust clone->nargs by
22399 2020-02-05 Martin Liska <mliska@suse.cz>
22402 * doc/invoke.texi: Document that one should
22403 not combine ASLR and -fpch.
22405 2020-02-04 Richard Biener <rguenther@suse.de>
22407 PR tree-optimization/93538
22408 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
22410 2020-02-04 Richard Biener <rguenther@suse.de>
22412 PR tree-optimization/91123
22413 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
22414 (vn_walk_cb_data::last_vuse): New member.
22415 (vn_walk_cb_data::saved_operands): Likewsie.
22416 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
22417 (vn_walk_cb_data::push_partial_def): Use finish.
22418 (vn_reference_lookup_2): Update last_vuse and use finish if
22419 we've saved operands.
22420 (vn_reference_lookup_3): Use finish and update calls to
22421 push_partial_defs everywhere. When translating through
22422 memcpy or aggregate copies save off operands and alias-set.
22423 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
22424 operation for redundant store removal.
22426 2020-02-04 Richard Biener <rguenther@suse.de>
22428 PR tree-optimization/92819
22429 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
22430 generating more stmts than before.
22432 2020-02-04 Martin Liska <mliska@suse.cz>
22434 * config/arm/arm.c (arm_gen_far_branch): Move the function
22435 outside of selftests.
22437 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22439 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
22440 function to adjust PC-relative vector addresses.
22441 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
22442 handle vectors with PC-relative addresses.
22444 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22446 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
22448 (hard_reg_and_mode_to_addr_mask): Delete.
22449 (rs6000_adjust_vec_address): If the original vector address
22450 was REG+REG or REG+OFFSET and the element is not zero, do the add
22451 of the elements in the original address before adding the offset
22452 for the vector element. Use address_to_insn_form to validate the
22453 address using the register being loaded, rather than guessing
22454 whether the address is a DS-FORM or DQ-FORM address.
22456 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22458 * config/rs6000/rs6000.c (get_vector_offset): New helper function
22459 to calculate the offset in memory from the start of a vector of a
22460 particular element. Add code to keep the element number in
22461 bounds if the element number is variable.
22462 (rs6000_adjust_vec_address): Move calculation of offset of the
22463 vector element to get_vector_offset.
22464 (rs6000_split_vec_extract_var): Do not do the initial AND of
22465 element here, move the code to get_vector_offset.
22467 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
22469 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
22472 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
22474 * config/rs6000/constraints.md: Improve documentation.
22476 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
22479 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
22480 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
22482 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
22484 * config.gcc: Remove "carrizo" support.
22485 * config/gcn/gcn-opts.h (processor_type): Likewise.
22486 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
22487 * config/gcn/gcn.opt (gpu_type): Likewise.
22488 * config/gcn/t-omp-device: Likewise.
22490 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22493 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
22494 * config/arm/arm.c (arm_gen_far_branch): New function
22495 arm_gen_far_branch.
22496 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
22498 2020-02-03 Julian Brown <julian@codesourcery.com>
22499 Tobias Burnus <tobias@codesourcery.com>
22501 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
22503 2020-02-03 Jakub Jelinek <jakub@redhat.com>
22506 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
22507 valid RTL to sum up the lowest and second lowest bytes of the popcnt
22510 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
22512 PR rtl-optimization/91333
22513 * ira-color.c (struct allocno_color_data): Add member
22515 (init_allocno_threads): Set the member up.
22516 (bucket_allocno_compare_func): Add compare hard reg
22519 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
22521 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
22523 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
22524 * config.in: Regenerated.
22525 * configure: Regenerated.
22526 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
22527 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
22528 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
22530 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
22532 * configure: Regenerate.
22534 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
22536 PR rtl-optimization/91333
22537 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
22538 reg preferences comparison up.
22540 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22542 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
22543 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
22544 aarch64-sve-builtins-base.h.
22545 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
22546 aarch64-sve-builtins-base.cc.
22547 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
22548 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22549 (svcvtnt): Declare.
22550 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
22551 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22552 (svcvtnt): New functions.
22553 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
22554 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
22555 (svcvtnt): New functions.
22556 (svcvt): Add a form that converts f32 to bf16.
22557 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
22558 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
22560 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
22561 Treat B as bfloat16_t.
22562 (ternary_bfloat_lane_base): New class.
22563 (ternary_bfloat_def): Likewise.
22564 (ternary_bfloat): New shape.
22565 (ternary_bfloat_lane_def): New class.
22566 (ternary_bfloat_lane): New shape.
22567 (ternary_bfloat_lanex2_def): New class.
22568 (ternary_bfloat_lanex2): New shape.
22569 (ternary_bfloat_opt_n_def): New class.
22570 (ternary_bfloat_opt_n): New shape.
22571 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
22572 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
22573 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
22574 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
22575 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
22576 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
22577 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
22578 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
22579 the pattern off the narrow mode instead of the wider one.
22580 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
22581 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
22582 (sve_fp_op): Handle them.
22583 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
22584 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
22586 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
22588 * config/aarch64/arm_sve.h: Include arm_bf16.h.
22589 * config/aarch64/aarch64-modes.def (BF): Move definition before
22590 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
22591 (SVE_MODES): Handle BF modes.
22592 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
22594 (aarch64_full_sve_mode): Likewise.
22595 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
22597 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
22598 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
22599 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
22600 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
22602 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
22604 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
22605 (TYPES_all_data): Add bf16.
22606 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
22607 (register_tuple_type): Increase buffer size.
22608 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
22609 (bf16): New type suffix.
22610 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
22611 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
22612 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
22613 Change type from all_data to all_arith.
22614 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
22615 (svminp): Likewise.
22617 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
22618 Matthew Malcomson <matthew.malcomson@arm.com>
22619 Richard Sandiford <richard.sandiford@arm.com>
22621 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
22622 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
22623 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
22624 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
22625 __ARM_FEATURE_MATMUL_FP64.
22626 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
22627 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
22628 be disabled at the same time.
22629 (f32mm): New extension.
22630 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
22631 (AARCH64_FL_F64MM): Bump to the next bit up.
22632 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
22633 (TARGET_SVE_F64MM): New macros.
22634 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
22635 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
22636 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
22637 (UNSPEC_ZIP2Q): New unspeccs.
22638 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
22639 (optab, sur, perm_insn): Handle the new unspecs.
22640 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
22641 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
22642 TARGET_SVE_F64MM instead of separate tests.
22643 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
22644 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
22645 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
22646 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
22647 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
22648 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
22649 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
22650 (TYPES_s_signed): New macro.
22651 (TYPES_s_integer): Use it.
22652 (TYPES_d_float): New macro.
22653 (TYPES_d_data): Use it.
22654 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
22655 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
22656 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
22657 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
22658 (svmmla): New shape.
22659 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
22660 template parameters.
22661 (ternary_resize2_lane_base): Likewise.
22662 (ternary_resize2_base): New class.
22663 (ternary_qq_lane_base): Likewise.
22664 (ternary_intq_uintq_lane_def): Likewise.
22665 (ternary_intq_uintq_lane): New shape.
22666 (ternary_intq_uintq_opt_n_def): New class
22667 (ternary_intq_uintq_opt_n): New shape.
22668 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
22669 (ternary_uintq_intq_def): New class.
22670 (ternary_uintq_intq): New shape.
22671 (ternary_uintq_intq_lane_def): New class.
22672 (ternary_uintq_intq_lane): New shape.
22673 (ternary_uintq_intq_opt_n_def): New class.
22674 (ternary_uintq_intq_opt_n): New shape.
22675 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
22676 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
22677 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
22678 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
22680 (svdotprod_lane_impl): ...this new class.
22681 (svmmla_impl, svusdot_impl): New classes.
22682 (svdot_lane): Update to use svdotprod_lane_impl.
22683 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
22684 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
22686 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
22687 function, with no types defined.
22688 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
22689 AARCH64_FL_I8MM functions.
22690 (svmmla): New AARCH64_FL_F32MM function.
22691 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
22692 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
22693 AARCH64_FL_F64MM function.
22694 (REQUIRED_EXTENSIONS):
22696 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
22698 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
22701 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
22703 * config/i386/i386.md (*movoi_internal_avx): Do not check for
22704 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
22705 (*movti_internal): Do not check for
22706 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
22707 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
22708 just after check for TARGET_AVX.
22709 (*movdf_internal): Ditto.
22710 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
22711 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
22712 * config/i386/sse.md (mov<mode>_internal): Only check
22713 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
22714 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
22715 (<sse>_andnot<mode>3<mask_name>): Move check for
22716 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
22717 (<code><mode>3<mask_name>): Ditto.
22718 (*andnot<mode>3): Ditto.
22719 (*andnottf3): Ditto.
22720 (*<code><mode>3): Ditto.
22721 (*<code>tf3): Ditto.
22722 (*andnot<VI:mode>3): Remove
22723 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
22724 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
22725 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
22726 (sse4_1_blendv<ssemodesuffix>): Ditto.
22727 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
22728 Explain that tune applies to 128bit instructions only.
22730 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
22732 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
22733 to definition of hsa_kernel_description. Parse assembly to find SGPR
22734 and VGPR count of kernel and store in hsa_kernel_description.
22736 2020-01-31 Tamar Christina <tamar.christina@arm.com>
22738 PR rtl-optimization/91838
22739 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
22740 to truncate if allowed or reject combination.
22742 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
22744 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
22745 (find_inv_vars_cb): Likewise.
22747 2020-01-31 David Malcolm <dmalcolm@redhat.com>
22749 * calls.c (special_function_p): Split out the check for DECL_NAME
22750 being non-NULL and fndecl being extern at file scope into a
22751 new maybe_special_function_p and call it. Drop check for fndecl
22752 being non-NULL that was after a usage of DECL_NAME (fndecl).
22753 * tree.h (maybe_special_function_p): New inline function.
22755 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
22757 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
22758 (mask_gather_load<mode>): ... here, and zero-initialize the
22760 (maskload<mode>di): Zero-initialize the destination.
22761 * config/gcn/gcn.c:
22763 2020-01-30 David Malcolm <dmalcolm@redhat.com>
22766 * doc/analyzer.texi (Limitations): Note that constraints on
22767 floating-point values are currently ignored.
22769 2020-01-30 Jakub Jelinek <jakub@redhat.com>
22772 * symtab.c (symtab_node::noninterposable_alias): If localalias
22773 already exists, but is not usable, append numbers after it until
22774 a unique name is found. Formatting fix.
22776 PR middle-end/93505
22777 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
22780 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
22782 * config/gcn/gcn.c (print_operand): Handle LTGT.
22783 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
22785 2020-01-30 Richard Biener <rguenther@suse.de>
22787 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
22788 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
22790 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
22792 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
22793 without a DECL in .data.rel.ro.local.
22795 2020-01-30 Jakub Jelinek <jakub@redhat.com>
22798 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
22802 * config/i386/sse.md
22803 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
22804 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
22805 any_extend code iterator instead of always zero_extend.
22806 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
22807 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
22808 Use any_extend code iterator instead of always zero_extend.
22809 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
22810 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
22811 Use any_extend code iterator instead of always zero_extend.
22812 (*sse2_pmovmskb_ext): New define_insn.
22813 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
22816 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
22817 (*popcountsi2_zext_falsedep): New define_insn.
22819 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
22821 * config.in: Regenerated.
22822 * configure: Regenerated.
22824 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
22827 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
22828 LLVM's assembler changed the default in version 9.
22830 2020-01-24 Jeff Law <law@redhat.com>
22832 PR tree-optimization/89689
22833 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
22835 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
22839 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
22841 PR rtl-optimization/87763
22842 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
22843 simplification to handle subregs as well as bare regs.
22844 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
22846 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
22849 * ira.c (ira): Revert use of simplified LRA algorithm.
22851 2020-01-29 Martin Jambor <mjambor@suse.cz>
22853 PR tree-optimization/92706
22854 * tree-sra.c (struct access): Fields first_link, last_link,
22855 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
22856 next_rhs_queued and grp_rhs_queued respectively, new fields
22857 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
22858 (struct assign_link): Field next renamed to next_rhs, new field
22859 next_lhs. Updated comment.
22860 (work_queue_head): Renamed to rhs_work_queue_head.
22861 (lhs_work_queue_head): New variable.
22862 (add_link_to_lhs): New function.
22863 (relink_to_new_repr): Also relink LHS lists.
22864 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
22865 (add_access_to_lhs_work_queue): New function.
22866 (pop_access_from_work_queue): Renamed to
22867 pop_access_from_rhs_work_queue.
22868 (pop_access_from_lhs_work_queue): New function.
22869 (build_accesses_from_assign): Also add links to LHS lists and to LHS
22871 (child_would_conflict_in_lacc): Renamed to
22872 child_would_conflict_in_acc. Adjusted parameter names.
22873 (create_artificial_child_access): New parameter set_grp_read, use it.
22874 (subtree_mark_written_and_enqueue): Renamed to
22875 subtree_mark_written_and_rhs_enqueue.
22876 (propagate_subaccesses_across_link): Renamed to
22877 propagate_subaccesses_from_rhs.
22878 (propagate_subaccesses_from_lhs): New function.
22879 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
22882 2020-01-29 Martin Jambor <mjambor@suse.cz>
22884 PR tree-optimization/92706
22885 * tree-sra.c (struct access): Adjust comment of
22886 grp_total_scalarization.
22887 (find_access_in_subtree): Look for single children spanning an entire
22889 (scalarizable_type_p): Allow register accesses, adjust callers.
22890 (completely_scalarize): Remove function.
22891 (scalarize_elem): Likewise.
22892 (create_total_scalarization_access): Likewise.
22893 (sort_and_splice_var_accesses): Do not track total scalarization
22895 (analyze_access_subtree): New parameter totally, adjust to new meaning
22896 of grp_total_scalarization.
22897 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
22898 (can_totally_scalarize_forest_p): New function.
22899 (create_total_scalarization_access): Likewise.
22900 (create_total_access_and_reshape): Likewise.
22901 (total_should_skip_creating_access): Likewise.
22902 (totally_scalarize_subtree): Likewise.
22903 (analyze_all_variable_accesses): Perform total scalarization after
22904 subaccess propagation using the new functions above.
22905 (initialize_constant_pool_replacements): Output initializers by
22906 traversing the access tree.
22908 2020-01-29 Martin Jambor <mjambor@suse.cz>
22910 * tree-sra.c (verify_sra_access_forest): New function.
22911 (verify_all_sra_access_forests): Likewise.
22912 (create_artificial_child_access): Set parent.
22913 (analyze_all_variable_accesses): Call the verifier.
22915 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22917 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
22918 if called on indirect edge.
22919 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
22920 speculative call if needed.
22922 2020-01-29 Richard Biener <rguenther@suse.de>
22924 PR tree-optimization/93428
22925 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
22926 permutation when the load node is created.
22927 (vect_analyze_slp_instance): Re-use it here.
22929 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22931 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
22933 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
22935 PR rtl-optimization/93272
22936 * ira-lives.c (process_out_of_region_eh_regs): New function.
22937 (process_bb_node_lives): Call it.
22939 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22941 * coverage.c (read_counts_file): Make error message lowercase.
22943 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22945 * profile-count.c (profile_quality_display_names): Fix ordering.
22947 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
22950 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
22951 hash only when edge is first within the sequence.
22952 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
22953 (symbol_table::create_edge): Do not set target_prob.
22954 (cgraph_edge::remove_caller): Watch for speculative calls when updating
22955 the call site hash.
22956 (cgraph_edge::make_speculative): Drop target_prob parameter.
22957 (cgraph_edge::speculative_call_info): Remove.
22958 (cgraph_edge::first_speculative_call_target): New member function.
22959 (update_call_stmt_hash_for_removing_direct_edge): New function.
22960 (cgraph_edge::resolve_speculation): Rewrite to new API.
22961 (cgraph_edge::speculative_call_for_target): New member function.
22962 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
22963 multiple speculation targets.
22964 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
22966 (verify_speculative_call): Verify that targets form an interval.
22967 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
22968 (cgraph_edge::first_speculative_call_target): New member function.
22969 (cgraph_edge::next_speculative_call_target): New member function.
22970 (cgraph_edge::speculative_call_target_ref): New member function.
22971 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
22972 (cgraph_edge): Remove target_prob.
22973 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
22974 Fix handling of speculative calls.
22975 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
22976 * ipa-fnsummary.c (analyze_function_body): Likewise.
22977 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
22978 * ipa-profile.c (dump_histogram): Fix formating.
22979 (ipa_profile_generate_summary): Watch for overflows.
22980 (ipa_profile): Do not require probablity to be 1/2; update to new API.
22981 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
22982 (update_indirect_edges_after_inlining): Update to new API.
22983 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
22985 * profile-count.h: (profile_probability::adjusted): New.
22986 * tree-inline.c (copy_bb): Update to new speculative call API; fix
22987 updating of profile.
22988 * value-prof.c (gimple_ic_transform): Rename to ...
22989 (dump_ic_profile): ... this one; update dumping.
22990 (stream_in_histogram_value): Fix formating.
22991 (gimple_value_profile_transformations): Update.
22993 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
22996 * config/i386/i386.md (*movoi_internal_avx): Remove
22997 TARGET_SSE_TYPELESS_STORES check.
22998 (*movti_internal): Prefer TARGET_AVX over
22999 TARGET_SSE_TYPELESS_STORES.
23000 (*movtf_internal): Likewise.
23001 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
23002 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
23003 from TARGET_SSE_TYPELESS_STORES.
23005 2020-01-28 David Malcolm <dmalcolm@redhat.com>
23007 * diagnostic-core.h (warning_at): Rename overload to...
23008 (warning_meta): ...this.
23009 (emit_diagnostic_valist): Delete decl of overload taking
23010 diagnostic_metadata.
23011 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
23012 (warning_at): Rename overload taking diagnostic_metadata to...
23013 (warning_meta): ...this.
23015 2020-01-28 Richard Biener <rguenther@suse.de>
23017 PR tree-optimization/93439
23018 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
23019 * tree-cfg.c (move_sese_region_to_fn): ... here.
23020 (verify_types_in_gimple_reference): Verify used cliques are
23023 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
23026 * config/i386/i386-options.c (set_ix86_tune_features): Add an
23027 argument of a pointer to struct gcc_options and pass it to
23028 parse_mtune_ctrl_str.
23029 (ix86_function_specific_restore): Pass opts to
23030 set_ix86_tune_features.
23031 (ix86_option_override_internal): Likewise.
23032 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
23033 gcc_options and use it for x_ix86_tune_ctrl_string.
23035 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23037 PR rtl-optimization/87763
23038 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
23039 simplification to handle subregs as well as bare regs.
23040 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
23042 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23044 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
23045 for reduction chains that (now) include a call.
23047 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23049 PR tree-optimization/92822
23050 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
23051 out the don't-care elements of a vector whose significant elements
23052 are duplicates, make the don't-care elements duplicates too.
23054 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
23056 PR tree-optimization/93434
23057 * tree-predcom.c (split_data_refs_to_components): Record which
23058 components have had aliasing loads removed. Prevent store-store
23059 commoning for all such components.
23061 2020-01-28 Jakub Jelinek <jakub@redhat.com>
23064 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
23065 -1 or is_vshift is true, use new_vector with number of elts npatterns
23066 rather than new_unary_operation.
23068 PR tree-optimization/93454
23069 * gimple-fold.c (fold_array_ctor_reference): Perform
23070 elt_size.to_uhwi () just once, instead of calling it in every
23071 iteration. Punt if that value is above size of the temporary
23072 buffer. Decrease third native_encode_expr argument when
23073 bufoff + elt_sz is above size of buf.
23075 2020-01-27 Joseph Myers <joseph@codesourcery.com>
23077 * config/mips/mips.c (mips_declare_object_name)
23078 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
23080 2020-01-27 Martin Liska <mliska@suse.cz>
23082 PR gcov-profile/93403
23083 * tree-profile.c (gimple_init_gcov_profiler): Generate
23084 both __gcov_indirect_call_profiler_v4 and
23085 __gcov_indirect_call_profiler_v4_atomic.
23087 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23090 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
23092 (@aarch64_split_simd_mov<mode>): Use it.
23093 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
23094 Leave the vec_extract patterns to handle 2-element vectors.
23095 (aarch64_simd_mov_from_<mode>high): Likewise.
23096 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
23097 (vec_extractv2dfv1df): Likewise.
23099 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23101 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
23102 jump conditions for *compare_condjump<GPI:mode>.
23104 2020-01-27 David Malcolm <dmalcolm@redhat.com>
23107 * digraph.cc (test_edge::test_edge): Specify template for base
23110 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23112 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
23114 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23116 * config/arc/arc-protos.h (gen_mlo): Remove.
23117 (gen_mhi): Likewise.
23118 * config/arc/arc.c (AUX_MULHI): Define.
23119 (arc_must_save_reister): Special handling for r58/59.
23120 (arc_compute_frame_size): Consider mlo/mhi registers.
23121 (arc_save_callee_saves): Emit fp/sp move only when emit_move
23123 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
23124 mlo/mhi name selection.
23125 (arc_restore_callee_saves): Don't early restore blink when ISR.
23126 (arc_expand_prologue): Add mlo/mhi saving.
23127 (arc_expand_epilogue): Add mlo/mhi restoring.
23130 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
23131 numbering when MUL64 option is used.
23132 (DWARF2_FRAME_REG_OUT): Define.
23133 * config/arc/arc.md (arc600_stall): New pattern.
23134 (VUNSPEC_ARC_ARC600_STALL): Define.
23135 (mulsi64): Use correct mlo/mhi registers.
23136 (mulsi_600): Clean it up.
23137 * config/arc/predicates.md (mlo_operand): Remove any dependency on
23139 (mhi_operand): Likewise.
23141 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
23142 Petro Karashchenko <petro.karashchenko@ring.com>
23144 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
23145 attributes if needed.
23146 (prepare_move_operands): Generate special unspec instruction for
23148 (arc_isuncached_mem_p): Propagate uncached attribute to each
23150 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
23151 (VUNSPEC_ARC_STDI): Likewise.
23152 (ALLI): New mode iterator.
23153 (mALLI): New mode attribute.
23154 (lddi): New instruction pattern.
23156 (stdidi_split): Split instruction for architectures which are not
23157 supporting ll64 option.
23158 (lddidi_split): Likewise.
23160 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23162 PR rtl-optimization/92989
23163 * lra-lives.c (process_bb_lives): Update the live-in set before
23164 processing additional clobbers.
23166 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23168 PR rtl-optimization/93170
23169 * cselib.c (cselib_invalidate_regno_val): New function, split out
23171 (cselib_invalidate_regno): ...here.
23172 (cselib_invalidated_by_call_p): New function.
23173 (cselib_process_insn): Iterate over all the hard-register entries in
23174 REG_VALUES and invalidate any that cross call-clobbered registers.
23176 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
23178 * dojump.c (split_comparison): Use HONOR_NANS rather than
23179 HONOR_SNANS when splitting LTGT.
23181 2020-01-27 Martin Liska <mliska@suse.cz>
23184 * opts.c (print_filtered_help): Exclude language-specific
23185 options from --help=common unless enabled in all FEs.
23187 2020-01-27 Martin Liska <mliska@suse.cz>
23189 * opts.c (print_help): Exclude params from
23190 all except --help=param.
23192 2020-01-27 Martin Liska <mliska@suse.cz>
23195 * config/i386/i386-features.c (make_resolver_func):
23196 Align the code with ppc64 target implementation.
23197 Do not generate a unique name for resolver function.
23199 2020-01-27 Richard Biener <rguenther@suse.de>
23201 PR tree-optimization/93397
23202 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
23203 converted reduction chain SLP graph adjustment.
23205 2020-01-26 Marek Polacek <polacek@redhat.com>
23208 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
23211 2020-01-26 Jason Merrill <jason@redhat.com>
23214 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
23217 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
23219 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
23220 (rx_setmem): Likewise.
23222 2020-01-26 Jakub Jelinek <jakub@redhat.com>
23225 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
23226 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
23227 drop <di> from constraint of last operand.
23230 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
23231 TARGET_AVX2 and V4DFmode not in the split condition, but in the
23232 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
23234 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
23237 * ipa-cp.c (get_info_about_necessary_edges): Remove value
23240 2020-01-24 Jeff Law <law@redhat.com>
23242 PR tree-optimization/92788
23243 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
23246 2020-01-24 Jakub Jelinek <jakub@redhat.com>
23249 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
23250 *avx_vperm_broadcast_<mode>,
23251 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
23252 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
23253 Move before avx2_perm<mode>/avx512f_perm<mode>.
23256 * simplify-rtx.c (simplify_const_unary_operation,
23257 simplify_const_binary_operation): Punt for mode precision above
23258 MAX_BITSIZE_MODE_ANY_INT.
23260 2020-01-24 Andrew Pinski <apinski@marvell.com>
23262 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
23263 alu.shift_reg to 0.
23265 2020-01-24 Jeff Law <law@redhat.com>
23268 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
23269 for REGs. Call output_operand_lossage to get more reasonable
23272 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
23274 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
23275 gcn_fp_compare_operator.
23276 (vec_cmpu<mode>di): Use gcn_compare_operator.
23277 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
23278 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
23279 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
23280 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
23281 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
23282 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
23283 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
23284 gcn_fp_compare_operator.
23285 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
23286 gcn_fp_compare_operator.
23287 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
23288 gcn_fp_compare_operator.
23289 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
23290 gcn_fp_compare_operator.
23292 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
23294 * doc/install.texi (Cross-Compiler-Specific Options): Document
23295 `--with-toolexeclibdir' option.
23297 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
23299 * target.def (flags_regnum): Also mention effect on delay slot filling.
23300 * doc/tm.texi: Regenerate.
23302 2020-01-23 Jeff Law <law@redhat.com>
23304 PR translation/90162
23305 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
23307 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
23310 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
23313 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23315 PR rtl-optimization/93402
23316 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
23319 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23321 * config.in: Regenerated.
23322 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
23323 for TARGET_LIBC_GNUSTACK.
23324 * configure: Regenerated.
23325 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
23326 found to be 2.31 or greater.
23328 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
23330 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
23332 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
23333 (mips_asm_file_end): New function. Delegate to
23334 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
23335 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
23337 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23340 * config/i386/i386-modes.def (POImode): New mode.
23341 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
23342 * config/i386/i386.md (DPWI): New mode attribute.
23343 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
23344 (QWI): Rename to...
23345 (QPWI): ... this. Use POI instead of OI for TImode.
23346 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
23347 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
23350 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23353 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
23355 (speculation_tracker_rev): New pattern.
23356 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
23357 Use speculation_tracker_rev to track the inverse condition.
23359 2020-01-23 Richard Biener <rguenther@suse.de>
23361 PR tree-optimization/93381
23362 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
23363 alias-set of the def as argument and record the first one.
23364 (vn_walk_cb_data::first_set): New member.
23365 (vn_reference_lookup_3): Pass the alias-set of the current def
23366 to push_partial_def. Fix alias-set used in the aggregate copy
23368 (vn_reference_lookup): Consistently set *last_vuse_ptr.
23369 * real.c (clear_significand_below): Fix out-of-bound access.
23371 2020-01-23 Jakub Jelinek <jakub@redhat.com>
23374 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
23375 New define_insn patterns.
23377 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23379 * doc/sourcebuild.texi (check-function-bodies): Add an
23380 optional target/xfail selector.
23382 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
23384 PR rtl-optimization/93124
23385 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
23386 bare USE and CLOBBER insns.
23388 2020-01-22 Andrew Pinski <apinski@marvell.com>
23390 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
23392 2020-01-22 David Malcolm <dmalcolm@redhat.com>
23395 * gdbinit.in (break-on-saved-diagnostic): Update for move of
23396 diagnostic_manager into "ana" namespace.
23397 * selftest-run-tests.c (selftest::run_tests): Update for move of
23398 selftest::run_analyzer_selftests to
23399 ana::selftest::run_analyzer_selftests.
23401 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
23403 * cfgexpand.c (union_stack_vars): Update the size.
23405 2020-01-22 Richard Biener <rguenther@suse.de>
23407 PR tree-optimization/93381
23408 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
23409 throughout, handle all conversions the same.
23411 2020-01-22 Jakub Jelinek <jakub@redhat.com>
23414 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
23415 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
23416 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
23417 Call force_reg on high_in2 unconditionally.
23419 2020-01-22 Martin Liska <mliska@suse.cz>
23421 PR tree-optimization/92924
23422 * profile.c (compute_value_histograms): Divide
23423 all counter values.
23425 2020-01-22 Jakub Jelinek <jakub@redhat.com>
23428 * output.h (assemble_name_resolve): Declare.
23429 * varasm.c (assemble_name_resolve): New function.
23430 (assemble_name): Use it.
23431 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
23433 2020-01-22 Joseph Myers <joseph@codesourcery.com>
23435 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
23436 update_web_docs_git instead of update_web_docs_svn.
23438 2020-01-21 Andrew Pinski <apinski@marvell.com>
23441 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
23442 as PTR mode. Have operand 1 as being modeless, it can be P mode.
23443 (*tlsgd_small_<mode>): Likewise.
23444 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
23445 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
23446 register. Convert that register back to dest using convert_mode.
23448 2020-01-21 Jim Wilson <jimw@sifive.com>
23450 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
23453 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
23454 Uros Bizjak <ubizjak@gmail.com>
23457 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
23459 (legitimize_tls_address): Do GNU2 TLS address computation in
23460 ptr_mode and zero-extend result to Pmode.
23461 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
23462 :P with :PTR and Pmode with ptr_mode.
23463 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
23464 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
23465 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
23467 2020-01-21 Jakub Jelinek <jakub@redhat.com>
23470 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
23471 the last two operands are CONST_INT_P before using them as such.
23473 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
23475 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
23476 to get the integer element types.
23478 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
23480 * config/aarch64/aarch64-sve-builtins.h
23481 (function_expander::convert_to_pmode): Declare.
23482 * config/aarch64/aarch64-sve-builtins.cc
23483 (function_expander::convert_to_pmode): New function.
23484 (function_expander::get_contiguous_base): Use it.
23485 (function_expander::prepare_gather_address_operands): Likewise.
23486 * config/aarch64/aarch64-sve-builtins-sve2.cc
23487 (svwhilerw_svwhilewr_impl::expand): Likewise.
23489 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
23492 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
23493 cfun->machine->label_is_assembled.
23494 (aarch64_print_patchable_function_entry): New.
23495 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
23496 * config/aarch64/aarch64.h (struct machine_function): New field,
23497 label_is_assembled.
23499 2020-01-21 David Malcolm <dmalcolm@redhat.com>
23502 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
23505 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23508 * cgraph.c (cgraph_edge::resolve_speculation,
23509 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
23510 call_stmt_site_hash.
23512 2020-01-21 Martin Liska <mliska@suse.cz>
23514 * config/rs6000/rs6000.c (common_mode_defined): Remove
23517 2020-01-21 Richard Biener <rguenther@suse.de>
23519 PR tree-optimization/92328
23520 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
23521 type when value-numbering same-sized store by inserting a
23523 (eliminate_dom_walker::eliminate_stmt): When eliminating
23524 a redundant store handle bit-reinterpretation of the same value.
23526 2020-01-21 Andrew Pinski <apinski@marvel.com>
23529 * tree-into-ssa.c (prepare_block_for_update_1): Split out
23531 (prepare_block_for_update): This. Use a worklist instead of
23534 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23536 * config/arm/arm.c (clear_operation_p):
23537 Initialise last_regno, skip first iteration
23538 based on the first_set value and use ints instead
23539 of the unnecessary HOST_WIDE_INTs.
23541 2020-01-21 Jakub Jelinek <jakub@redhat.com>
23544 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
23545 compare_mode other than SFmode or DFmode.
23547 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
23550 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
23551 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
23552 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
23554 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23556 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
23558 2020-01-20 Andrew Pinski <apinski@marvell.com>
23560 PR middle-end/93242
23561 * targhooks.c (default_print_patchable_function_entry): Use
23562 output_asm_insn to emit the nop instruction.
23564 2020-01-20 Fangrui Song <maskray@google.com>
23566 PR middle-end/93194
23567 * targhooks.c (default_print_patchable_function_entry): Align to
23570 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
23573 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
23574 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
23575 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
23576 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
23577 (*tls_dynamic_gnu2_lea_64): Renamed to ...
23578 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
23579 Remove the {q} suffix from lea.
23580 (*tls_dynamic_gnu2_call_64): Renamed to ...
23581 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
23582 (*tls_dynamic_gnu2_combine_64): Renamed to ...
23583 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
23584 Pass Pmode to gen_tls_dynamic_gnu2_64.
23586 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
23588 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
23590 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
23592 * config/aarch64/aarch64-sve-builtins-base.cc
23593 (svld1ro_impl::memory_vector_mode): Remove parameter name.
23595 2020-01-20 Richard Biener <rguenther@suse.de>
23598 * dwarf2out.c (prune_unused_types): Unconditionally mark
23599 called function DIEs.
23601 2020-01-20 Martin Liska <mliska@suse.cz>
23603 PR tree-optimization/93199
23604 * tree-eh.c (struct leh_state): Add
23605 new field outer_non_cleanup.
23606 (cleanup_is_dead_in): Pass leh_state instead
23607 of eh_region. Add a checking that state->outer_non_cleanup
23608 points to outer non-clean up region.
23609 (lower_try_finally): Record outer_non_cleanup
23611 (lower_catch): Likewise.
23612 (lower_eh_filter): Likewise.
23613 (lower_eh_must_not_throw): Likewise.
23614 (lower_cleanup): Likewise.
23616 2020-01-20 Richard Biener <rguenther@suse.de>
23618 PR tree-optimization/93094
23619 * tree-vectorizer.h (vect_loop_versioning): Adjust.
23620 (vect_transform_loop): Likewise.
23621 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
23622 loop_vectorized_call to vect_transform_loop.
23623 * tree-vect-loop.c (vect_transform_loop): Pass down
23624 loop_vectorized_call to vect_loop_versioning.
23625 * tree-vect-loop-manip.c (vect_loop_versioning): Use
23626 the earlier discovered loop_vectorized_call.
23628 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
23630 * doc/contribute.texi: Update for SVN -> Git transition.
23631 * doc/install.texi: Likewise.
23633 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23636 * cgraph.c (cgraph_edge::make_speculative): Increase number of
23637 speculative targets.
23638 (verify_speculative_call): New function
23639 (cgraph_node::verify_node): Use it.
23640 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
23643 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
23646 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
23647 (cgraph_edge::make_direct): Remove all indirect targets.
23648 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
23649 (cgraph_node::verify_node): Verify that only one call_stmt or
23650 lto_stmt_uid is set.
23651 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
23653 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
23654 (lto_output_ref): Simplify streaming of stmt.
23655 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
23657 2020-01-18 Tamar Christina <tamar.christina@arm.com>
23659 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
23660 Mark parameter unused.
23662 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
23664 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
23666 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
23668 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
23670 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
23672 * Makefile.in: Add coroutine-passes.o.
23673 * builtin-types.def (BT_CONST_SIZE): New.
23674 (BT_FN_BOOL_PTR): New.
23675 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
23676 * builtins.def (DEF_COROUTINE_BUILTIN): New.
23677 * coroutine-builtins.def: New file.
23678 * coroutine-passes.cc: New file.
23679 * function.h (struct GTY function): Add a bit to indicate that the
23680 function is a coroutine component.
23681 * internal-fn.c (expand_CO_FRAME): New.
23682 (expand_CO_YIELD): New.
23683 (expand_CO_SUSPN): New.
23684 (expand_CO_ACTOR): New.
23685 * internal-fn.def (CO_ACTOR): New.
23689 * passes.def: Add pass_coroutine_lower_builtins,
23690 pass_coroutine_early_expand_ifns.
23691 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
23692 (make_pass_coroutine_early_expand_ifns): New.
23693 * doc/invoke.texi: Document the fcoroutines command line
23696 2020-01-18 Jakub Jelinek <jakub@redhat.com>
23698 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
23701 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
23702 after checking the argument is a REG. Don't use REGNO (reg)
23703 again to set last_regno, reuse regno variable instead.
23705 2020-01-17 David Malcolm <dmalcolm@redhat.com>
23707 * doc/analyzer.texi (Limitations): Add note about NaN.
23709 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23710 Sudakshina Das <sudi.das@arm.com>
23712 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
23713 and valid immediate.
23714 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
23715 (lshrdi3): Generate thumb2_lsrl for valid immediates.
23716 * config/arm/constraints.md (Pg): New.
23717 * config/arm/predicates.md (long_shift_imm): New.
23718 (arm_reg_or_long_shift_imm): Likewise.
23719 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
23720 (thumb2_lsll): Likewise.
23721 (thumb2_lsrl): New.
23723 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23724 Sudakshina Das <sudi.das@arm.com>
23726 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
23727 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
23728 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
23729 register pairs for doubleword quantities for ARMv8.1M-Mainline.
23730 * config/arm/thumb2.md (thumb2_asrl): New.
23731 (thumb2_lsll): Likewise.
23733 2020-01-17 Jakub Jelinek <jakub@redhat.com>
23735 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
23738 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
23740 * gdbinit.in (help-gcc-hooks): New command.
23741 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
23742 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
23745 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23747 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
23748 correct target macro.
23750 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23752 * config/aarch64/aarch64-protos.h
23753 (aarch64_sve_ld1ro_operand_p): New.
23754 * config/aarch64/aarch64-sve-builtins-base.cc
23755 (class load_replicate): New.
23756 (class svld1ro_impl): New.
23757 (class svld1rq_impl): Change to inherit from load_replicate.
23758 (svld1ro): New sve intrinsic function base.
23759 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
23760 New DEF_SVE_FUNCTION.
23761 * config/aarch64/aarch64-sve-builtins-base.h
23762 (svld1ro): New decl.
23763 * config/aarch64/aarch64-sve-builtins.cc
23764 (function_expander::add_mem_operand): Modify assert to allow
23766 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
23768 * config/aarch64/aarch64.c
23769 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
23770 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
23771 (aarch64_sve_ld1ro_operand_p): New.
23772 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
23773 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
23774 * config/aarch64/predicates.md
23775 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
23777 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
23779 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
23780 Introduce this ACLE specified predefined macro.
23781 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
23782 (fp): Disabling this disables f64mm.
23783 (simd): Disabling this disables f64mm.
23784 (fp16): Disabling this disables f64mm.
23785 (sve): Disabling this disables f64mm.
23786 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
23787 (AARCH64_ISA_F64MM): New.
23788 (TARGET_F64MM): New.
23789 * doc/invoke.texi (f64mm): Document new option.
23791 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
23793 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
23794 (neoversen1_tunings): Likewise.
23796 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
23799 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
23800 Add assert to ensure prolog has been emitted.
23801 (aarch64_split_atomic_op): Likewise.
23802 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
23803 Use epilogue_completed rather than reload_completed.
23804 (aarch64_atomic_exchange<mode>): Likewise.
23805 (aarch64_atomic_<atomic_optab><mode>): Likewise.
23806 (atomic_nand<mode>): Likewise.
23807 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
23808 (atomic_fetch_nand<mode>): Likewise.
23809 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
23810 (atomic_nand_fetch<mode>): Likewise.
23812 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
23815 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
23817 (REVERSE_CONDITION): Delete.
23818 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
23819 (CCFP_CCFPE): Likewise.
23820 (e): New mode attribute.
23821 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
23822 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
23823 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
23824 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
23825 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
23826 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
23827 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
23828 name of generator from gen_ccmpdi to gen_ccmpccdi.
23829 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
23830 the previous comparison but aren't able to, use the new ccmp_rev
23833 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
23835 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
23836 than testing directly for INTEGER_CST.
23837 (gimplify_target_expr, gimplify_omp_depend): Likewise.
23839 2020-01-17 Jakub Jelinek <jakub@redhat.com>
23841 PR tree-optimization/93292
23842 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
23843 get_vectype_for_scalar_type returns NULL.
23845 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
23847 * params.opt (-param=max-predicted-iterations): Increase range from 0.
23848 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
23850 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
23852 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
23854 * params.opt: (max-predicted-iterations): Set bounds.
23855 * predict.c (real_almost_one, real_br_prob_base,
23856 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
23857 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
23858 probabilities; do not truncate to reg_br_prob_bases.
23859 (estimate_loops_at_level): Pass max_cyclic_prob.
23860 (estimate_loops): Compute max_cyclic_prob.
23861 (estimate_bb_frequencies): Do not initialize real_*; update calculation
23863 * profile-count.c (profile_probability::to_sreal): New.
23864 * profile-count.h (class sreal): Move up in file.
23865 (profile_probability::to_sreal): Declare.
23867 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23870 (arm_invalid_conversion): New function for target hook.
23871 (arm_invalid_unary_op): New function for target hook.
23872 (arm_invalid_binary_op): New function for target hook.
23874 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
23876 * config.gcc: Add arm_bf16.h.
23877 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
23878 (arm_simd_builtin_std_type): Add BFmode.
23879 (arm_init_simd_builtin_types): Define element types for vector types.
23880 (arm_init_bf16_types): New function.
23881 (arm_init_builtins): Add arm_init_bf16_types function call.
23882 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
23883 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
23884 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
23885 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
23886 (arm_vector_mode_supported_p): Add V4BF, V8BF.
23887 (arm_mangle_type): Add __bf16.
23888 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
23889 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
23890 arm_bf16_ptr_type_node.
23891 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
23892 define_split between ARM registers.
23893 * config/arm/arm_bf16.h: New file.
23894 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
23895 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
23896 (VQXMOV): Add V8BF.
23897 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
23898 * config/arm/vfp.md: Add BFmode to movhf patterns.
23900 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
23901 Andre Vieira <andre.simoesdiasvieira@arm.com>
23903 * config/arm/arm-cpus.in (mve, mve_float): New features.
23904 (dsp, mve, mve.fp): New options.
23905 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
23906 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
23907 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
23909 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23910 Thomas Preud'homme <thomas.preudhomme@arm.com>
23912 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
23914 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
23915 error for using -mcmse when targeting Armv8.1-M Mainline.
23917 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23918 Thomas Preud'homme <thomas.preudhomme@arm.com>
23920 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
23921 address in r4 when targeting Armv8.1-M Mainline.
23922 (nonsecure_call_value_internal): Likewise.
23923 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
23924 a register match_operand again. Emit BLXNS when targeting
23925 Armv8.1-M Mainline.
23926 (nonsecure_call_value_reg_thumb2): Likewise.
23928 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23929 Thomas Preud'homme <thomas.preudhomme@arm.com>
23931 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
23932 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
23933 variable as true when floating-point ABI is not hard. Replace
23934 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
23935 Generate VLSTM and VLLDM instruction respectively before and
23936 after a function call to cmse_nonsecure_call function.
23937 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
23938 (VUNSPEC_VLLDM): Likewise.
23939 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
23940 (lazy_load_multiple_insn): Likewise.
23942 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23943 Thomas Preud'homme <thomas.preudhomme@arm.com>
23945 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
23946 (arm_emit_vfp_multi_reg_pop): Likewise.
23947 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
23948 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
23949 restore callee-saved VFP registers.
23951 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23952 Thomas Preud'homme <thomas.preudhomme@arm.com>
23954 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
23955 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
23956 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
23957 callee-saved GPRs as well as clear ip register before doing a nonsecure
23958 call then restore callee-saved GPRs after it when targeting
23959 Armv8.1-M Mainline.
23960 (arm_reorg): Adapt to function rename.
23962 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23963 Thomas Preud'homme <thomas.preudhomme@arm.com>
23965 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
23966 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
23967 clear_vfp_multiple pattern based on a new vfp parameter.
23968 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
23969 targeting Armv8.1-M Mainline.
23970 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
23971 unconditionally when targeting Armv8.1-M Mainline architecture. Check
23972 whether VFP registers are available before looking call_used_regs for a
23974 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
23975 of prototype of clear_operation_p.
23976 (clear_vfp_multiple_operation): New predicate.
23977 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
23978 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
23980 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23981 Thomas Preud'homme <thomas.preudhomme@arm.com>
23983 * config/arm/arm-protos.h (clear_operation_p): Declare.
23984 * config/arm/arm.c (clear_operation_p): New function.
23985 (cmse_clear_registers): Generate clear_multiple instruction pattern if
23986 targeting Armv8.1-M Mainline or successor.
23987 (output_return_instruction): Only output APSR register clearing if
23988 Armv8.1-M Mainline instructions not available.
23989 (thumb_exit): Likewise.
23990 * config/arm/predicates.md (clear_multiple_operation): New predicate.
23991 * config/arm/thumb2.md (clear_apsr): New define_insn.
23992 (clear_multiple): Likewise.
23993 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
23995 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
23996 Thomas Preud'homme <thomas.preudhomme@arm.com>
23998 * config/arm/arm.c (fp_sysreg_names): Declare and define.
23999 (use_return_insn): Also return false for Armv8.1-M Mainline.
24000 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
24001 Mainline instructions are available.
24002 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
24003 when targeting Armv8.1-M Mainline Security Extensions.
24004 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
24005 Mainline entry function.
24006 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
24007 targeting Armv8.1-M Mainline or successor.
24008 (arm_expand_epilogue): Fix indentation of caller-saved register
24009 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
24011 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
24012 (FP_SYSREGS): Likewise.
24013 (enum vfp_sysregs_encoding): Define enum.
24014 (fp_sysreg_names): Declare.
24015 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
24016 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
24017 (pop_fpsysreg_insn): Likewise.
24019 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
24020 Thomas Preud'homme <thomas.preudhomme@arm.com>
24022 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
24023 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
24024 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
24025 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
24026 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
24027 (ARMv8_1m_main): New feature group.
24028 (armv8.1-m.main): New architecture.
24029 * config/arm/arm-tables.opt: Regenerate.
24030 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
24031 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
24032 (arm_options_perform_arch_sanity_checks): Error out when targeting
24033 Armv8.1-M Mainline Security Extensions.
24034 * config/arm/arm.h (arm_arch8_1m_main): Declare.
24036 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24038 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
24039 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
24040 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
24041 aarch64_bfdot_laneq): New.
24042 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
24043 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
24044 vbfdotq_laneq_f32): New.
24045 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
24046 VBFMLA_W, VBF): New.
24047 (isquadop): Add V4BF, V8BF.
24049 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24051 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
24052 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
24053 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
24054 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
24055 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
24056 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
24057 usdot_laneq, sudot_lane,sudot_laneq): New.
24058 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
24059 (aarch64_<sur>dot_lane): New.
24060 * config/aarch64/arm_neon.h (vusdot_s32): New.
24061 (vusdotq_s32): New.
24062 (vusdot_lane_s32): New.
24063 (vsudot_lane_s32): New.
24064 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
24065 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
24067 2020-01-16 Martin Liska <mliska@suse.cz>
24069 * value-prof.c (dump_histogram_value): Fix
24070 obvious spacing issue.
24072 2020-01-16 Andrew Pinski <apinski@marvell.com>
24074 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
24075 !storage_order_barrier_p.
24077 2020-01-16 Andrew Pinski <apinski@marvell.com>
24079 * sched-int.h (_dep): Add unused bit-field field for the padding.
24080 * sched-deps.c (init_dep_1): Init unused field.
24082 2020-01-16 Andrew Pinski <apinski@marvell.com>
24084 * optabs.h (create_expand_operand): Initialize target field also.
24086 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
24088 PR tree-optimization/92429
24089 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
24090 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
24092 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
24095 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
24097 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
24098 aarch64_sve_int_mode to each mode.
24100 2020-01-15 David Malcolm <dmalcolm@redhat.com>
24102 * doc/analyzer.texi (Overview): Add note about
24103 -fdump-ipa-analyzer.
24105 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
24107 PR tree-optimization/93231
24108 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
24109 input_type is unsigned. Use tree_to_shwi for shift constant.
24110 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
24111 (simplify_count_trailing_zeroes): Add test to handle known non-zero
24112 inputs more efficiently.
24114 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
24116 * config/i386/i386.md (*movsf_internal): Do not require
24117 SSE2 ISA for alternatives 14 and 15.
24119 2020-01-15 Richard Biener <rguenther@suse.de>
24121 PR middle-end/93273
24122 * tree-eh.c (sink_clobbers): If we already visited the destination
24123 block do not defer insertion.
24124 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
24125 the purpose of defered insertion.
24127 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24129 * BASE-VER: Bump to 10.0.1.
24131 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24133 PR tree-optimization/93247
24134 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
24135 type of the stmt that we're going to vectorize.
24137 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
24139 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
24140 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
24143 2020-01-15 Martin Liska <mliska@suse.cz>
24145 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
24146 2 calls of streamer_read_hwi in a function call.
24148 2020-01-15 Richard Biener <rguenther@suse.de>
24150 * alias.c (record_alias_subset): Avoid redundant work when
24151 subset is already recorded.
24153 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24155 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
24156 the analyzer options provide CWE identifiers.
24158 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24160 * tree-diagnostic-path.cc (path_summary::event_range::print):
24161 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
24162 using get_pure_location.
24164 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24166 PR tree-optimization/93262
24167 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
24168 perform head trimming only if the last argument is constant,
24169 either all ones, or larger or equal to head trim, in the latter
24170 case decrease the last argument by head_trim.
24172 PR tree-optimization/93249
24173 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
24174 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
24175 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
24176 perform head trim unless we can prove there are no '\0' chars
24177 from the source among the first head_trim chars.
24179 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24181 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
24183 2020-01-15 Jakub Jelinek <jakub@redhat.com>
24186 * config/i386/sse.md
24187 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
24188 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
24189 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
24190 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
24191 just a single alternative instead of two, make operands 1 and 2
24194 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
24197 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
24200 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24202 * Makefile.in (lang_opt_files): Add analyzer.opt.
24203 (ANALYZER_OBJS): New.
24204 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
24205 tristate.o and ANALYZER_OBJS.
24206 (TEXI_GCCINT_FILES): Add analyzer.texi.
24207 * common.opt (-fanalyzer): New driver option.
24208 * config.in: Regenerate.
24209 * configure: Regenerate.
24210 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
24211 (gccdepdir): Also create depdir for "analyzer" subdir.
24212 * digraph.cc: New file.
24213 * digraph.h: New file.
24214 * doc/analyzer.texi: New file.
24215 * doc/gccint.texi ("Static Analyzer") New menu item.
24216 (analyzer.texi): Include it.
24217 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
24218 ("Warning Options"): Add static analysis warnings to the list.
24219 (-Wno-analyzer-double-fclose): New option.
24220 (-Wno-analyzer-double-free): New option.
24221 (-Wno-analyzer-exposure-through-output-file): New option.
24222 (-Wno-analyzer-file-leak): New option.
24223 (-Wno-analyzer-free-of-non-heap): New option.
24224 (-Wno-analyzer-malloc-leak): New option.
24225 (-Wno-analyzer-possible-null-argument): New option.
24226 (-Wno-analyzer-possible-null-dereference): New option.
24227 (-Wno-analyzer-null-argument): New option.
24228 (-Wno-analyzer-null-dereference): New option.
24229 (-Wno-analyzer-stale-setjmp-buffer): New option.
24230 (-Wno-analyzer-tainted-array-index): New option.
24231 (-Wno-analyzer-use-after-free): New option.
24232 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
24233 (-Wno-analyzer-use-of-uninitialized-value): New option.
24234 (-Wanalyzer-too-complex): New option.
24235 (-fanalyzer-call-summaries): New warning.
24236 (-fanalyzer-checker=): New warning.
24237 (-fanalyzer-fine-grained): New warning.
24238 (-fno-analyzer-state-merge): New warning.
24239 (-fno-analyzer-state-purge): New warning.
24240 (-fanalyzer-transitivity): New warning.
24241 (-fanalyzer-verbose-edges): New warning.
24242 (-fanalyzer-verbose-state-changes): New warning.
24243 (-fanalyzer-verbosity=): New warning.
24244 (-fdump-analyzer): New warning.
24245 (-fdump-analyzer-callgraph): New warning.
24246 (-fdump-analyzer-exploded-graph): New warning.
24247 (-fdump-analyzer-exploded-nodes): New warning.
24248 (-fdump-analyzer-exploded-nodes-2): New warning.
24249 (-fdump-analyzer-exploded-nodes-3): New warning.
24250 (-fdump-analyzer-supergraph): New warning.
24251 * doc/sourcebuild.texi (dg-require-dot): New.
24252 (dg-check-dot): New.
24253 * gdbinit.in (break-on-saved-diagnostic): New command.
24254 * graphviz.cc: New file.
24255 * graphviz.h: New file.
24256 * ordered-hash-map-tests.cc: New file.
24257 * ordered-hash-map.h: New file.
24258 * passes.def (pass_analyzer): Add before
24259 pass_ipa_whole_program_visibility.
24260 * selftest-run-tests.c (selftest::run_tests): Call
24261 selftest::ordered_hash_map_tests_cc_tests.
24262 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
24264 * shortest-paths.h: New file.
24265 * timevar.def (TV_ANALYZER): New timevar.
24266 (TV_ANALYZER_SUPERGRAPH): Likewise.
24267 (TV_ANALYZER_STATE_PURGE): Likewise.
24268 (TV_ANALYZER_PLAN): Likewise.
24269 (TV_ANALYZER_SCC): Likewise.
24270 (TV_ANALYZER_WORKLIST): Likewise.
24271 (TV_ANALYZER_DUMP): Likewise.
24272 (TV_ANALYZER_DIAGNOSTICS): Likewise.
24273 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
24274 * tree-pass.h (make_pass_analyzer): New decl.
24275 * tristate.cc: New file.
24276 * tristate.h: New file.
24278 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
24281 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
24282 alternatives 9 and 10.
24284 2020-01-14 David Malcolm <dmalcolm@redhat.com>
24286 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
24287 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
24288 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
24289 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
24290 (selftest::hash_map_tests_c_tests): Call it.
24291 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
24292 New static constant, using the value of = H::empty_zero_p.
24293 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
24294 from default_hash_traits <Value>.
24295 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
24297 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
24298 * hash-table.h (hash_table::alloc_entries): Guard the loop of
24299 calls to mark_empty with !Descriptor::empty_zero_p.
24300 (hash_table::empty_slow): Conditionalize the memset call with a
24301 check that Descriptor::empty_zero_p; otherwise, loop through the
24302 entries calling mark_empty on them.
24303 * hash-traits.h (int_hash::empty_zero_p): New static constant.
24304 (pointer_hash::empty_zero_p): Likewise.
24305 (pair_hash::empty_zero_p): Likewise.
24306 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
24308 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
24309 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
24310 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
24311 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
24312 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
24313 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
24314 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
24315 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
24316 * tree-vectorizer.h
24317 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
24320 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
24322 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
24323 fix typo on return value.
24325 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
24328 * cgraph.c (symbol_table::create_edge): Init speculative_id and
24330 (cgraph_edge::make_speculative): Add param for setting speculative_id
24332 (cgraph_edge::speculative_call_info): Update comments and find reference
24333 by speculative_id for multiple indirect targets.
24334 (cgraph_edge::resolve_speculation): Decrease the speculations
24335 for indirect edge, drop it's speculative if not direct target
24336 left. Update comments.
24337 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
24338 (cgraph_node::dump): Print num_speculative_call_targets.
24339 (cgraph_node::verify_node): Don't report error if speculative
24340 edge not include statement.
24341 (cgraph_edge::num_speculative_call_targets_p): New function.
24342 * cgraph.h (int common_target_id): Remove.
24343 (int common_target_probability): Remove.
24344 (num_speculative_call_targets): New variable.
24345 (make_speculative): Add param for setting speculative_id.
24346 (cgraph_edge::num_speculative_call_targets_p): New declare.
24347 (target_prob): New variable.
24348 (speculative_id): New variable.
24349 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
24350 call summaries for multiple speculative call targets.
24351 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
24352 * ipa-profile.c (struct speculative_call_target): New struct.
24353 (class speculative_call_summary): New class.
24354 (class speculative_call_summaries): New class.
24355 (call_sums): New variable.
24356 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
24357 (ipa_profile_write_edge_summary): New function.
24358 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
24359 (ipa_profile_dump_all_summaries): New function.
24360 (ipa_profile_read_edge_summary): New function.
24361 (ipa_profile_read_summary_section): New function.
24362 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
24363 (ipa_profile): Generate num_speculative_call_targets from
24365 * ipa-ref.h (speculative_id): New variable.
24366 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
24367 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
24368 common_target_probability. Stream out speculative_id and
24369 num_speculative_call_targets.
24370 (input_edge): Likewise.
24371 * predict.c (dump_prediction): Remove edges count assert to be
24373 * symtab.c (symtab_node::create_reference): Init speculative_id.
24374 (symtab_node::clone_references): Clone speculative_id.
24375 (symtab_node::clone_referring): Clone speculative_id.
24376 (symtab_node::clone_reference): Clone speculative_id.
24377 (symtab_node::clear_stmts_in_references): Clear speculative_id.
24378 * tree-inline.c (copy_bb): Duplicate all the speculative edges
24379 if indirect call contains multiple speculative targets.
24380 * value-prof.h (check_ic_target): Remove.
24381 * value-prof.c (gimple_value_profile_transformations):
24382 Use void function gimple_ic_transform.
24383 * value-prof.c (gimple_ic_transform): Handle topn case.
24384 Fix comment typos. Change it to a void function.
24386 2020-01-13 Andrew Pinski <apinski@marvell.com>
24388 * config/aarch64/aarch64-cores.def (octeontx2): New define.
24389 (octeontx2t98): New define.
24390 (octeontx2t96): New define.
24391 (octeontx2t93): New define.
24392 (octeontx2f95): New define.
24393 (octeontx2f95n): New define.
24394 (octeontx2f95mm): New define.
24395 * config/aarch64/aarch64-tune.md: Regenerate.
24396 * doc/invoke.texi (-mcpu=): Document the new cpu types.
24398 2020-01-13 Jason Merrill <jason@redhat.com>
24400 PR c++/33799 - destroy return value if local cleanup throws.
24401 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
24403 2020-01-13 Martin Liska <mliska@suse.cz>
24405 * ipa-cp.c (get_max_overall_size): Use newly
24406 renamed param param_ipa_cp_unit_growth.
24407 * params.opt: Remove legacy param name.
24409 2020-01-13 Martin Sebor <msebor@redhat.com>
24411 PR tree-optimization/93213
24412 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
24413 stores to be eliminated.
24415 2020-01-13 Martin Liska <mliska@suse.cz>
24417 * opts.c (print_help): Do not print CL_PARAM
24418 and CL_WARNING for CL_OPTIMIZATION.
24420 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
24423 * doc/invoke.texi (Warning Options): Add caveat about some warnings
24424 depending on optimization settings.
24426 2020-01-13 Jakub Jelinek <jakub@redhat.com>
24428 PR tree-optimization/90838
24429 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
24430 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
24431 argument rather than to initialize temporary for targets that
24432 don't use the mode argument at all. Initialize ctzval to avoid
24435 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
24437 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
24438 * tree-core.h: Document it.
24439 * gimplify.c (gimplify_omp_workshare): Set it.
24440 * omp-low.c (lower_omp_target): Use it.
24441 * tree-pretty-print.c (dump_omp_clause): Print it.
24443 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
24444 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
24446 2020-01-10 David Malcolm <dmalcolm@redhat.com>
24448 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
24449 * common.opt (fdiagnostics-path-format=): New option.
24450 (diagnostic_path_format): New enum.
24451 (fdiagnostics-show-path-depths): New option.
24452 * coretypes.h (diagnostic_event_id_t): New forward decl.
24453 * diagnostic-color.c (color_dict): Add "path".
24454 * diagnostic-event-id.h: New file.
24455 * diagnostic-format-json.cc (json_from_expanded_location): Make
24457 (json_end_diagnostic): Call context->make_json_for_path if it
24458 exists and the diagnostic has a path.
24459 (diagnostic_output_format_init): Clear context->print_path.
24460 * diagnostic-path.h: New file.
24461 * diagnostic-show-locus.c (colorizer::set_range): Special-case
24462 when printing a run of events in a diagnostic_path so that they
24463 all get the same color.
24464 (layout::m_diagnostic_path_p): New field.
24465 (layout::layout): Initialize it.
24466 (layout::print_any_labels): Don't colorize the label text for an
24467 event in a diagnostic_path.
24468 (gcc_rich_location::add_location_if_nearby): Add
24469 "restrict_to_current_line_spans" and "label" params. Pass the
24470 former to layout.maybe_add_location_range; pass the latter
24471 when calling add_range.
24472 * diagnostic.c: Include "diagnostic-path.h".
24473 (diagnostic_initialize): Initialize context->path_format and
24474 context->show_path_depths.
24475 (diagnostic_show_any_path): New function.
24476 (diagnostic_path::interprocedural_p): New function.
24477 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
24478 (simple_diagnostic_path::num_events): New function.
24479 (simple_diagnostic_path::get_event): New function.
24480 (simple_diagnostic_path::add_event): New function.
24481 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
24482 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
24483 (debug): New overload taking a diagnostic_path *.
24484 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
24485 * diagnostic.h (enum diagnostic_path_format): New enum.
24486 (json::value): New forward decl.
24487 (diagnostic_context::path_format): New field.
24488 (diagnostic_context::show_path_depths): New field.
24489 (diagnostic_context::print_path): New callback field.
24490 (diagnostic_context::make_json_for_path): New callback field.
24491 (diagnostic_show_any_path): New decl.
24492 (json_from_expanded_location): New decl.
24493 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
24494 (-fdiagnostics-show-path-depths): New option.
24495 (-fdiagnostics-color): Add "path" to description of default
24496 GCC_COLORS; describe it.
24497 (-fdiagnostics-format=json): Document how diagnostic paths are
24498 represented in the JSON output format.
24499 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
24500 Add optional params "restrict_to_current_line_spans" and "label".
24501 * opts.c (common_handle_option): Handle
24502 OPT_fdiagnostics_path_format_ and
24503 OPT_fdiagnostics_show_path_depths.
24504 * pretty-print.c: Include "diagnostic-event-id.h".
24505 (pp_format): Implement "%@" format code for printing
24506 diagnostic_event_id_t *.
24507 (selftest::test_pp_format): Add tests for "%@".
24508 * selftest-run-tests.c (selftest::run_tests): Call
24509 selftest::tree_diagnostic_path_cc_tests.
24510 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
24511 * toplev.c (general_init): Initialize global_dc->path_format and
24512 global_dc->show_path_depths.
24513 * tree-diagnostic-path.cc: New file.
24514 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
24515 non-static. Drop "diagnostic" param in favor of storing the
24516 original value of "where" and re-using it.
24517 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
24518 maybe_unwind_expanded_macro_loc.
24519 (tree_diagnostics_defaults): Initialize context->print_path and
24520 context->make_json_for_path.
24521 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
24523 (default_tree_make_json_for_path): New decl.
24524 (maybe_unwind_expanded_macro_loc): New decl.
24526 2020-01-10 Jakub Jelinek <jakub@redhat.com>
24528 PR tree-optimization/93210
24529 * fold-const.h (native_encode_initializer,
24530 can_native_interpret_type_p): Declare.
24531 * fold-const.c (native_encode_string): Fix up handling with off != -1,
24533 (native_encode_initializer): New function, moved from dwarf2out.c.
24534 Adjust to native_encode_expr compatible arguments, including dry-run
24535 and partial extraction modes. Don't handle STRING_CST.
24536 (can_native_interpret_type_p): No longer static.
24537 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
24538 offset / BITS_PER_UNIT fits into int and don't call it if
24539 can_native_interpret_type_p fails. If suboff is NULL and for
24540 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
24541 native_encode_initializer.
24542 (fold_const_aggregate_ref_1): Formatting fix.
24543 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
24544 (tree_add_const_value_attribute): Adjust caller.
24546 PR tree-optimization/90838
24547 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
24548 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
24549 CTZ_DEFINED_VALUE_AT_ZERO.
24551 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
24553 PR inline-asm/93027
24554 * lra-constraints.c (match_reload): Permit input operands have the
24555 same mode as output while other input operands have a different
24558 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
24560 PR tree-optimization/90838
24561 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
24562 (check_ctz_string): Likewise.
24563 (optimize_count_trailing_zeroes): Likewise.
24564 (simplify_count_trailing_zeroes): Likewise.
24565 (pass_forwprop::execute): Try ctz simplification.
24566 * match.pd: Add matching for ctz idioms.
24568 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24570 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
24572 (aarch64_invalid_unary_op): New function for target hook.
24573 (aarch64_invalid_binary_op): New function for target hook.
24575 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
24577 * config.gcc: Add arm_bf16.h.
24578 * config/aarch64/aarch64-builtins.c
24579 (aarch64_simd_builtin_std_type): Add BFmode.
24580 (aarch64_init_simd_builtin_types): Define element types for vector
24582 (aarch64_init_bf16_types): New function.
24583 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
24584 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
24586 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
24587 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
24589 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
24590 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
24591 * config/aarch64/aarch64.c
24592 (aarch64_classify_vector_mode): Add support for BF types.
24593 (aarch64_gimplify_va_arg_expr): Add support for BF types.
24594 (aarch64_vq_mode): Add support for BF types.
24595 (aarch64_simd_container_mode): Add support for BF types.
24596 (aarch64_mangle_type): Add support for BF scalar type.
24597 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
24598 * config/aarch64/arm_bf16.h: New file.
24599 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
24600 * config/aarch64/iterators.md: Add BF types to mode attributes.
24601 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
24603 2020-01-10 Jason Merrill <jason@redhat.com>
24605 PR c++/93173 - incorrect tree sharing.
24606 * gimplify.c (copy_if_shared): No longer static.
24607 * gimplify.h: Declare it.
24609 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24611 * doc/invoke.texi (-msve-vector-bits=): Document that
24612 -msve-vector-bits=128 now generates VL-specific code for
24613 little-endian targets.
24614 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
24615 build_vector_type_for_mode to construct the data vector types.
24616 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
24617 VL-specific code for -msve-vector-bits=128 on little-endian targets.
24618 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
24619 for 128-bit vectors.
24621 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24623 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
24626 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24628 * config/aarch64/aarch64-builtins.c
24629 (aarch64_builtin_vectorized_function): Check for specific vector modes,
24630 rather than checking the number of elements and the element mode.
24632 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24634 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
24635 get_related_vectype_for_scalar_type rather than build_vector_type
24636 to create the index type for a conditional reduction.
24638 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
24640 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
24641 for any type of gather or scatter, including strided accesses.
24643 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
24645 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
24648 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
24650 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
24651 get_dr_vinfo_offset
24652 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
24653 parameter and its use to reset DR_OFFSET's.
24654 (vect_transform_loop): Remove orig_drs_init argument.
24655 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
24656 member of dr_vec_info rather than the offset of the associated
24657 data_reference's innermost_loop_behavior.
24658 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
24659 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
24660 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
24661 get_dr_vinfo_offset.
24662 (vectorizable_store): Likewise.
24663 (vectorizable_load): Likewise.
24665 2020-01-10 Richard Biener <rguenther@suse.de>
24667 * gimple-ssa-store-merging
24668 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
24670 2020-01-10 Martin Liska <mliska@suse.cz>
24673 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
24674 encapsulation that was there before r280040.
24676 2020-01-10 Richard Biener <rguenther@suse.de>
24678 PR middle-end/93199
24679 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
24680 sequences to avoid walking them again for secondary opportunities.
24681 (pass_lower_eh_dispatch::execute): Instead actually insert
24684 2020-01-10 Richard Biener <rguenther@suse.de>
24686 PR middle-end/93199
24687 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
24688 (cleanup_all_empty_eh): Walk landing pads in reverse order to
24689 avoid quadraticness.
24691 2020-01-10 Martin Jambor <mjambor@suse.cz>
24693 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
24694 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
24695 to get param_ipa_sra_max_replacements.
24696 (param_splitting_across_edge): Pass the caller to
24697 pull_accesses_from_callee.
24699 2020-01-10 Martin Jambor <mjambor@suse.cz>
24701 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
24702 * ipa-cp.c (max_new_size): Removed.
24703 (orig_overall_size): New variable.
24704 (get_max_overall_size): New function.
24705 (estimate_local_effects): Use it. Adjust dump.
24706 (decide_about_value): Likewise.
24707 (ipcp_propagate_stage): Do not calculate max_new_size, just store
24708 orig_overall_size. Adjust dump.
24709 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
24711 2020-01-10 Martin Jambor <mjambor@suse.cz>
24713 * params.opt (param_ipa_max_agg_items): Mark as Optimization
24714 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
24715 instead of param_ipa_max_agg_items.
24716 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
24717 optimization info for the callee.
24719 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
24721 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
24722 markers if debug_inline_points is false.
24724 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
24726 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
24728 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
24729 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
24730 aarch64-sve-builtins-sve2.h.
24731 (aarch64-sve-builtins-sve2.o): New rule.
24732 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
24733 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
24734 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
24735 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
24736 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
24737 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
24739 * config/aarch64/aarch64-sve.md: Update comments with SVE2
24740 instructions that are handled here.
24741 (@cond_asrd<mode>): Generalize to...
24742 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
24743 (*cond_asrd<mode>_2): Generalize to...
24744 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
24745 (*cond_asrd<mode>_z): Generalize to...
24746 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
24747 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
24748 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
24749 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
24750 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
24752 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
24753 (@aarch64_scatter_stnt<mode>): Likewise.
24754 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
24755 (@aarch64_mul_lane_<mode>): Likewise.
24756 (@aarch64_sve_suqadd<mode>_const): Likewise.
24757 (*<sur>h<addsub><mode>): Generalize to...
24758 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
24760 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
24761 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
24762 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
24763 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
24764 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
24765 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
24766 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
24767 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
24768 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
24769 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
24770 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
24771 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
24772 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
24773 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
24774 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
24775 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
24776 (@aarch64_sve2_xar<mode>): Likewise.
24777 (@aarch64_sve2_bcax<mode>): Likewise.
24778 (*aarch64_sve2_eor3<mode>): Rename to...
24779 (@aarch64_sve2_eor3<mode>): ...this.
24780 (@aarch64_sve2_bsl<mode>): New expander.
24781 (@aarch64_sve2_nbsl<mode>): Likewise.
24782 (@aarch64_sve2_bsl1n<mode>): Likewise.
24783 (@aarch64_sve2_bsl2n<mode>): Likewise.
24784 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
24785 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
24786 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
24787 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
24788 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
24789 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
24790 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
24791 (<su>mull<bt><Vwide>): Generalize to...
24792 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
24794 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
24795 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
24796 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
24797 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24798 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
24799 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24800 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
24801 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24802 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
24803 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
24804 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
24805 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
24806 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
24807 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
24808 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
24809 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
24810 (<SHRNB:r>shrnb<mode>): Generalize to...
24811 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
24813 (<SHRNT:r>shrnt<mode>): Generalize to...
24814 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
24816 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
24817 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
24818 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
24819 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
24820 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
24821 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
24822 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
24823 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
24824 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
24825 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
24826 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
24827 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
24828 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
24829 (@aarch64_sve2_cvtnt<mode>): Likewise.
24830 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
24831 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
24832 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
24833 (@aarch64_sve2_cvtxnt<mode>): Likewise.
24834 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
24835 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
24836 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
24837 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
24838 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
24839 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
24840 (@aarch64_sve2_pmul<mode>): Likewise.
24841 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
24842 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
24843 (@aarch64_sve2_tbl2<mode>): Likewise.
24844 (@aarch64_sve2_tbx<mode>): Likewise.
24845 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
24846 (@aarch64_sve2_histcnt<mode>): Likewise.
24847 (@aarch64_sve2_histseg<mode>): Likewise.
24848 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
24849 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
24850 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
24851 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
24852 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
24853 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
24854 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
24855 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
24856 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
24857 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
24858 (SVE2_PMULL_PAIR_I): New mode iterators.
24859 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
24860 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
24861 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
24862 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
24863 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
24864 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
24865 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
24866 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
24867 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
24868 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
24869 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
24870 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
24871 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
24872 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
24873 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
24874 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
24875 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
24876 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
24877 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
24878 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
24879 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
24880 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
24881 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
24882 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
24883 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
24884 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
24885 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
24886 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
24887 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
24888 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
24889 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
24891 (VNARROW, Ventype): New mode attributes.
24892 (Vewtype): Handle VNx2DI. Fix typo in comment.
24893 (VDOUBLE): New mode attribute.
24894 (sve_lane_con): Handle VNx8HI.
24895 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
24896 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
24897 (sve_int_op, sve_int_op_rev): Handle the above codes.
24898 (sve_pred_int_rhs2_operand): Likewise.
24899 (MULLBT, SHRNB, SHRNT): Delete.
24900 (SVE_INT_SHIFT_IMM): New int iterator.
24901 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
24902 and UNSPEC_WHILEHS for TARGET_SVE2.
24903 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
24904 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
24905 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
24906 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
24907 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
24908 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
24909 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
24910 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
24911 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
24912 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
24913 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
24914 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
24915 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
24916 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
24917 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
24918 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
24919 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
24920 (optab): Handle the new unspecs.
24921 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
24923 (lr): Handle the new unspecs.
24925 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
24926 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
24927 (sve_int_qsub_op): New int attributes.
24928 (sve_fp_op, rot): Handle the new unspecs.
24929 * config/aarch64/aarch64-sve-builtins.h
24930 (function_resolver::require_matching_pointer_type): Declare.
24931 (function_resolver::resolve_unary): Add an optional boolean argument.
24932 (function_resolver::finish_opt_n_resolution): Add an optional
24933 type_suffix_index argument.
24934 (gimple_folder::redirect_call): Declare.
24935 (gimple_expander::prepare_gather_address_operands): Add an optional
24937 * config/aarch64/aarch64-sve-builtins.cc: Include
24938 aarch64-sve-builtins-sve2.h.
24939 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
24940 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
24941 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
24942 (TYPES_hsd_integer): Use TYPES_hsd_signed.
24943 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
24944 (TYPES_s_unsigned): Likewise.
24945 (TYPES_s_integer): Use TYPES_s_unsigned.
24946 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
24947 (TYPES_sd_integer): Use them.
24948 (TYPES_d_unsigned): New macro.
24949 (TYPES_d_integer): Use it.
24950 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
24951 (TYPES_cvt_narrow): Likewise.
24952 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
24953 (preds_mx): New variable.
24954 (function_builder::add_overloaded_function): Allow the new feature
24955 set to be more restrictive than the original one.
24956 (function_resolver::infer_pointer_type): Remove qualifiers from
24957 the pointer type before printing it.
24958 (function_resolver::require_matching_pointer_type): New function.
24959 (function_resolver::resolve_sv_displacement): Handle functions
24960 that don't support 32-bit vector indices or svint32_t vector offsets.
24961 (function_resolver::finish_opt_n_resolution): Take the inferred type
24962 as a separate argument.
24963 (function_resolver::resolve_unary): Optionally treat all forms in
24964 the same way as normal merging functions.
24965 (gimple_folder::redirect_call): New function.
24966 (function_expander::prepare_gather_address_operands): Add an argument
24967 that says whether scaled forms are available. If they aren't,
24968 handle scaling of vector indices and don't add the extension and
24970 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
24971 fall back to using cond_* instead.
24972 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
24973 Split out the member variables into...
24974 (rtx_code_function_base): ...this new base class.
24975 (rtx_code_function_rotated): Inherit rtx_code_function_base.
24976 (unspec_based_function): Split out the member variables into...
24977 (unspec_based_function_base): ...this new base class.
24978 (unspec_based_function_rotated): Inherit unspec_based_function_base.
24979 (unspec_based_function_exact_insn): New class.
24980 (unspec_based_add_function, unspec_based_add_lane_function)
24981 (unspec_based_lane_function, unspec_based_pred_function)
24982 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
24983 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
24984 (unspec_based_sub_function, unspec_based_sub_lane_function): New
24986 (unspec_based_fused_function): New class.
24987 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
24988 (unspec_based_fused_lane_function): New class.
24989 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
24991 (CODE_FOR_MODE1): New macro.
24992 (fixed_insn_function): New class.
24993 (while_comparison): Likewise.
24994 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
24995 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
24996 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
24997 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
24998 (load_gather_sv_restricted, shift_left_imm_long): Declare.
24999 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
25000 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
25001 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
25002 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
25003 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
25004 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
25005 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
25006 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
25007 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
25008 Also add an initial argument for unary_convert_narrowt, regardless
25009 of the predication type.
25010 (build_32_64): Allow loads and stores to specify MODE_none.
25011 (build_sv_index64, build_sv_uint_offset): New functions.
25012 (long_type_suffix): New function.
25013 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
25014 (binary_imm_long_base, load_gather_sv_base): Likewise.
25015 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
25016 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
25017 (unary_narrowb_base, unary_narrowt_base): Likewise.
25018 (binary_long_lane_def, binary_long_lane): New shape.
25019 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
25020 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
25021 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
25022 (binary_to_uint_def, binary_to_uint): Likewise.
25023 (binary_wide_def, binary_wide): Likewise.
25024 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
25025 (compare_def, compare): Likewise.
25026 (compare_ptr_def, compare_ptr): Likewise.
25027 (load_ext_gather_index_restricted_def,
25028 load_ext_gather_index_restricted): Likewise.
25029 (load_ext_gather_offset_restricted_def,
25030 load_ext_gather_offset_restricted): Likewise.
25031 (load_gather_sv_def): Inherit from load_gather_sv_base.
25032 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
25033 (shift_left_imm_def, shift_left_imm): Likewise.
25034 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
25035 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
25036 (store_scatter_index_restricted_def,
25037 store_scatter_index_restricted): Likewise.
25038 (store_scatter_offset_restricted_def,
25039 store_scatter_offset_restricted): Likewise.
25040 (tbl_tuple_def, tbl_tuple): Likewise.
25041 (ternary_long_lane_def, ternary_long_lane): Likewise.
25042 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
25043 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
25044 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
25045 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
25046 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
25047 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
25048 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
25049 (ternary_uint_def, ternary_uint): Likewise.
25050 (unary_convert): Fix typo in comment.
25051 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
25052 (unary_long_def, unary_long): Likewise.
25053 (unary_narrowb_def, unary_narrowb): Likewise.
25054 (unary_narrowt_def, unary_narrowt): Likewise.
25055 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
25056 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
25057 (unary_to_int_def, unary_to_int): Likewise.
25058 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
25059 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
25060 (svasrd_impl): Delete.
25061 (svcadd_impl::expand): Handle integer operations too.
25062 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
25063 new functions to derive the unspec numbers.
25064 (svmla_svmls_lane_impl): Replace with...
25065 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
25066 integer operations too.
25067 (svwhile_impl): Rename to...
25068 (svwhilelx_impl): ...this and inherit from while_comparison.
25069 (svasrd): Use unspec_based_function.
25070 (svmla_lane): Use svmla_lane_impl.
25071 (svmls_lane): Use svmls_lane_impl.
25072 (svrecpe, svrsqrte): Handle unsigned integer operations too.
25073 (svwhilele, svwhilelt): Use svwhilelx_impl.
25074 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
25075 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
25076 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
25077 * config/aarch64/aarch64-sve-builtins.def: Include
25078 aarch64-sve-builtins-sve2.def.
25080 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25082 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
25083 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
25084 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
25085 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
25086 immediates as well as vector ones.
25087 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
25088 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
25089 (aarch64_sve_qsub_immediate): Update calls accordingly.
25091 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25093 * config/aarch64/aarch64-sve2.md: Add banner comments.
25094 (<su>mulh<r>s<mode>3): Move further up file.
25095 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
25096 (*aarch64_sve2_sra<mode>): Move further down file.
25097 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
25099 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25101 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
25102 and UNSPEC_WHILEWR.
25103 (while_optab_cmp): Handle them.
25104 * config/aarch64/aarch64-sve.md
25105 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
25106 and add a "@" marker.
25107 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
25108 instead of gen_aarch64_sve2_while_ptest.
25109 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
25111 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25113 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
25114 (UNSPEC_WHILELE): ...this.
25115 (UNSPEC_WHILE_LO): Rename to...
25116 (UNSPEC_WHILELO): ...this.
25117 (UNSPEC_WHILE_LS): Rename to...
25118 (UNSPEC_WHILELS): ...this.
25119 (UNSPEC_WHILE_LT): Rename to...
25120 (UNSPEC_WHILELT): ...this.
25121 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
25122 (cmp_op, while_optab_cmp): Likewise.
25123 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
25124 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
25125 (svwhilelt): Likewise.
25127 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25129 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
25130 (unary_to_uint): Define.
25131 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
25132 (unary_count): Rename to...
25133 (unary_to_uint_def, unary_to_uint): ...this.
25134 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
25136 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25138 * config/aarch64/aarch64-sve-builtins-functions.h
25139 (code_for_mode_function): New class.
25140 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
25141 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
25142 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
25143 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
25144 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
25146 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25148 * config/aarch64/iterators.md (addsub): New code attribute.
25149 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
25151 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
25152 in the asm string and attributes. Fix indentation.
25153 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
25155 (@aarch64_sve_<optab><mode>): ...this.
25156 * config/aarch64/aarch64-sve-builtins.h
25157 (function_expander::expand_signed_unpred_op): Delete.
25158 * config/aarch64/aarch64-sve-builtins.cc
25159 (function_expander::expand_signed_unpred_op): Likewise.
25160 (function_expander::map_to_rtx_codes): If the optab isn't defined,
25161 try using code_for_aarch64_sve instead.
25162 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
25163 (svqsub_impl): Likewise.
25164 (svqadd, svqsub): Use rtx_code_function instead.
25166 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25168 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
25169 (HADDSUB, sur, addsub): Remove them.
25171 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25173 * tree-nrv.c (pass_return_slot::execute): Handle all internal
25174 functions the same way, rather than singling out those that
25175 aren't mapped directly to optabs.
25177 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
25179 * target.def (compatible_vector_types_p): New target hook.
25180 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
25181 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
25182 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
25183 * doc/tm.texi: Regenerate.
25184 * gimple-expr.c: Include target.h.
25185 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
25186 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
25188 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
25189 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
25190 Use the original predicate if it already has a suitable type.
25192 2020-01-09 Martin Jambor <mjambor@suse.cz>
25194 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
25195 resolve_speculation and redirect_call_stmt_to_callee static. Change
25196 return type of set_call_stmt to cgraph_edge *.
25197 * auto-profile.c (afdo_indirect_call): Adjust call to
25198 redirect_call_stmt_to_callee.
25199 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
25200 make the this pointer explicit, adjust self-recursive calls and the
25201 call top make_direct. Return the resulting edge.
25202 (cgraph_edge::remove): Make this pointer explicit.
25203 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
25204 (cgraph_edge::make_direct): Likewise, adjust call to
25205 resolve_speculation.
25206 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
25207 call to set_call_stmt.
25208 (cgraph_update_edges_for_call_stmt_node): Update call to
25209 set_call_stmt and remove.
25210 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
25211 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
25212 (cgraph_node::create_edge_including_clones): Moved "first" definition
25213 of edge to the block where it was used. Adjusted calls to
25215 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
25216 cgraph_edge::remove.
25217 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
25218 make_direct and redirect_call_stmt_to_callee.
25219 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
25220 resolve_speculation and make_direct.
25221 * ipa-inline-transform.c (inline_transform): Adjust call to
25222 redirect_call_stmt_to_callee.
25223 (check_speculations_1):: Adjust call to resolve_speculation.
25224 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
25225 resolve-speculation.
25226 (inline_small_functions): Adjust call to resolve_speculation.
25227 (ipa_inline): Likewise.
25228 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
25230 * ipa-visibility.c (function_and_variable_visibility): Make iteration
25231 safe with regards to edge removal, adjust calls to
25232 redirect_call_stmt_to_callee.
25233 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
25234 and redirect_call_stmt_to_callee.
25235 * multiple_target.c (create_dispatcher_calls): Adjust call to
25236 redirect_call_stmt_to_callee
25237 (redirect_to_specific_clone): Likewise.
25238 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
25239 Adjust calls to cgraph_edge::remove.
25240 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
25241 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
25242 (expand_call_inline): Adjust call to cgraph_edge::remove.
25244 2020-01-09 Martin Liska <mliska@suse.cz>
25246 * params.opt: Set Optimization for
25247 param_max_speculative_devirt_maydefs.
25249 2020-01-09 Martin Sebor <msebor@redhat.com>
25251 PR middle-end/93200
25253 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
25255 2020-01-09 Martin Liska <mliska@suse.cz>
25257 * auto-profile.c (auto_profile): Use opt_for_fn
25259 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
25260 (propagate_vals_across_arith_jfunc): Likewise.
25261 (hint_time_bonus): Likewise.
25262 (incorporate_penalties): Likewise.
25263 (good_cloning_opportunity_p): Likewise.
25264 (perform_estimation_of_a_value): Likewise.
25265 (estimate_local_effects): Likewise.
25266 (ipcp_propagate_stage): Likewise.
25267 * ipa-fnsummary.c (decompose_param_expr): Likewise.
25268 (set_switch_stmt_execution_predicate): Likewise.
25269 (analyze_function_body): Likewise.
25270 * ipa-inline-analysis.c (offline_size): Likewise.
25271 * ipa-inline.c (early_inliner): Likewise.
25272 * ipa-prop.c (ipa_analyze_node): Likewise.
25273 (ipcp_transform_function): Likewise.
25274 * ipa-sra.c (process_scan_results): Likewise.
25275 (ipa_sra_summarize_function): Likewise.
25276 * params.opt: Rename ipcp-unit-growth to
25277 ipa-cp-unit-growth. Add Optimization for various
25278 IPA-related parameters.
25280 2020-01-09 Richard Biener <rguenther@suse.de>
25282 PR middle-end/93054
25283 * gimplify.c (gimplify_expr): Deal with NOP definitions.
25285 2020-01-09 Richard Biener <rguenther@suse.de>
25287 PR tree-optimization/93040
25288 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
25290 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
25292 * common/config/avr/avr-common.c (avr_option_optimization_table)
25293 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
25295 2020-01-09 Martin Liska <mliska@suse.cz>
25297 * cgraphclones.c (symbol_table::materialize_all_clones):
25298 Use cgraph_node::dump_name.
25300 2020-01-09 Jakub Jelinek <jakub@redhat.com>
25302 PR inline-asm/93202
25303 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
25304 output_operand_lossage instead of gcc_unreachable.
25305 * doc/md.texi (riscv f constraint): Fix typo.
25308 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
25309 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
25310 CONST_SCALAR_INT_P instead of CONST_INT_P.
25311 (*subv<mode>4_1): Rename to ...
25312 (subv<mode>4_1): ... this.
25313 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25314 define_insn_and_split patterns.
25315 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25318 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25320 * vec.c (class selftest::count_dtor): New class.
25321 (selftest::test_auto_delete_vec): New test.
25322 (selftest::vec_c_tests): Call it.
25323 * vec.h (class auto_delete_vec): New class template.
25324 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
25326 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25328 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
25330 2020-01-08 Jim Wilson <jimw@sifive.com>
25332 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
25333 use of TLS_MODEL_LOCAL_EXEC when not pic.
25335 2020-01-08 David Malcolm <dmalcolm@redhat.com>
25337 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
25340 2020-01-08 Jakub Jelinek <jakub@redhat.com>
25343 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
25344 *stack_protect_set_3 peephole2): Also check that the second
25345 insns source is general_operand.
25348 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
25349 predicate for output operand instead of register_operand.
25350 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
25351 memory destination and non-memory operands[2].
25353 2020-01-08 Martin Liska <mliska@suse.cz>
25355 * cgraph.c (cgraph_node::dump): Use ::dump_name or
25356 ::dump_asm_name instead of (::name or ::asm_name).
25357 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
25358 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
25359 (analyze_functions): Likewise.
25360 (expand_all_functions): Likewise.
25361 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
25362 (propagate_bits_across_jump_function): Likewise.
25363 (dump_profile_updates): Likewise.
25364 (ipcp_store_bits_results): Likewise.
25365 (ipcp_store_vr_results): Likewise.
25366 * ipa-devirt.c (dump_targets): Likewise.
25367 * ipa-fnsummary.c (analyze_function_body): Likewise.
25368 * ipa-hsa.c (check_warn_node_versionable): Likewise.
25369 (process_hsa_functions): Likewise.
25370 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
25371 (set_alias_uids): Likewise.
25372 * ipa-inline-transform.c (save_inline_function_body): Likewise.
25373 * ipa-inline.c (recursive_inlining): Likewise.
25374 (inline_to_all_callers_1): Likewise.
25375 (ipa_inline): Likewise.
25376 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
25377 (ipa_propagate_frequency): Likewise.
25378 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
25379 (remove_described_reference): Likewise.
25380 * ipa-pure-const.c (worse_state): Likewise.
25381 (check_retval_uses): Likewise.
25382 (analyze_function): Likewise.
25383 (propagate_pure_const): Likewise.
25384 (propagate_nothrow): Likewise.
25385 (dump_malloc_lattice): Likewise.
25386 (propagate_malloc): Likewise.
25387 (pass_local_pure_const::execute): Likewise.
25388 * ipa-visibility.c (optimize_weakref): Likewise.
25389 (function_and_variable_visibility): Likewise.
25390 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
25391 (ipa_discover_variable_flags): Likewise.
25392 * lto-streamer-out.c (output_function): Likewise.
25393 (output_constructor): Likewise.
25394 * tree-inline.c (copy_bb): Likewise.
25395 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
25396 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
25398 2020-01-08 Richard Biener <rguenther@suse.de>
25400 PR middle-end/93199
25401 * tree-eh.c (sink_clobbers): Update virtual operands for
25402 the first and last stmt only. Add a dry-run capability.
25403 (pass_lower_eh_dispatch::execute): Perform clobber sinking
25404 after CFG manipulations and in RPO order to catch all
25405 secondary opportunities reliably.
25407 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25410 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
25412 2019-01-08 Richard Biener <rguenther@suse.de>
25414 PR middle-end/93199
25415 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
25416 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
25417 virtual operand, also updating SSA use.
25418 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
25419 Update stmt after resetting virtual operand.
25420 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
25421 * gimple-iterator.c (gsi_remove): When not removing the stmt
25422 permanently do not delink immediate uses or mark the stmt modified.
25424 2020-01-08 Martin Liska <mliska@suse.cz>
25426 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
25427 (ipa_call_context::estimate_size_and_time): Likewise.
25428 (inline_analyze_function): Likewise.
25430 2020-01-08 Martin Liska <mliska@suse.cz>
25432 * cgraph.c (cgraph_node::dump): Use systematically
25435 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25437 Add -nodevicespecs option for avr.
25440 * config/avr/avr.opt (-nodevicespecs): New driver option.
25441 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
25442 "-specs=device-specs/..." if that option is not set.
25443 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
25445 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
25447 Implement 64-bit double functions for avr.
25450 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
25451 --with-double-comparison.
25452 * doc/install.texi: Document them.
25453 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
25454 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
25455 <WITH_DOUBLE_COMPARISON>: New built-in defines.
25456 * doc/invoke.texi (AVR Built-in Macros): Document them.
25457 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
25458 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
25459 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
25461 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
25464 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
25465 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
25466 when only building rm-profile multilibs.
25468 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
25471 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
25472 lattice for a value to check.
25473 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
25474 finite propagation in self-recursive scc.
25476 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
25478 * ipa-inline.c (caller_growth_limits): Restore the AND.
25480 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
25482 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
25483 (VEC_ALLREG_ALT): New iterator.
25484 (VEC_ALLREG_INT_MODE): New iterator.
25485 (VCMP_MODE): New iterator.
25486 (VCMP_MODE_INT): New iterator.
25487 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
25488 (vec_cmp<u>v64qidi): New define_expand.
25489 (vec_cmp<mode>di_exec): Use VCMP_MODE.
25490 (vec_cmpu<mode>di_exec): New define_expand.
25491 (vec_cmp<u>v64qidi_exec): New define_expand.
25492 (vec_cmp<mode>di_dup): Use VCMP_MODE.
25493 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
25494 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
25495 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
25496 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
25497 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
25498 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
25499 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
25500 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
25501 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
25503 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
25504 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
25506 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
25508 * config/gcn/constraints.md (DA): Update description and match.
25510 (Db): New constraint.
25511 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
25513 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
25514 Implement 'Db' mixed immediate type.
25515 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
25516 (addcv64si3_dup<exec_vcc>): Delete.
25517 (subcv64si3<exec_vcc>): Rework constraints.
25518 (addv64di3): Rework constraints.
25519 (addv64di3_exec): Rework constraints.
25520 (subv64di3): Rework constraints.
25521 (addv64di3_dup): Delete.
25522 (addv64di3_dup_exec): Delete.
25523 (addv64di3_zext): Rework constraints.
25524 (addv64di3_zext_exec): Rework constraints.
25525 (addv64di3_zext_dup): Rework constraints.
25526 (addv64di3_zext_dup_exec): Rework constraints.
25527 (addv64di3_zext_dup2): Rework constraints.
25528 (addv64di3_zext_dup2_exec): Rework constraints.
25529 (addv64di3_sext_dup2): Rework constraints.
25530 (addv64di3_sext_dup2_exec): Rework constraints.
25532 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
25534 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
25535 existing target checks.
25537 2020-01-07 Richard Biener <rguenther@suse.de>
25539 * doc/install.texi: Bump minimal supported MPC version.
25541 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
25543 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
25544 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
25545 * langhooks.c: Include stor-layout.h.
25546 (lhd_simulate_enum_decl): New function.
25547 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
25548 handle_arm_sve_h for the LTO frontend.
25549 (register_vector_type): Cope with null returns from pushdecl.
25551 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
25553 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
25554 (aarch64_sve::nvectors_if_data_type): Replace with...
25555 (aarch64_sve::builtin_type_p): ...this.
25556 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
25557 (find_vector_type): Delete.
25558 (add_sve_type_attribute): New function.
25559 (lookup_sve_type_attribute): Likewise.
25560 (register_builtin_types): Add an "SVE type" attribute to each type.
25561 (register_tuple_type): Likewise.
25562 (svbool_type_p, nvectors_if_data_type): Delete.
25563 (mangle_builtin_type): Use lookup_sve_type_attribute.
25564 (builtin_type_p): Likewise. Add an overload that returns the
25565 number of constituent vector and predicate registers.
25566 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
25567 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
25568 instead of aarch64_sve_argument_p.
25569 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
25570 (aarch64_pass_by_reference): Likewise.
25571 (aarch64_function_value_1): Likewise.
25572 (aarch64_return_in_memory): Likewise.
25573 (aarch64_layout_arg): Likewise.
25575 2020-01-07 Jakub Jelinek <jakub@redhat.com>
25577 PR tree-optimization/93156
25578 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
25579 least significant bit is always clear.
25581 PR tree-optimization/93118
25582 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
25583 simplifier with two intermediate conversions.
25585 2020-01-07 Martin Liska <mliska@suse.cz>
25587 * params.opt: Add Optimization for various parameters.
25589 2020-01-07 Martin Liska <mliska@suse.cz>
25592 * doc/extend.texi: Explain cloning for target_clone
25595 2020-01-07 Martin Liska <mliska@suse.cz>
25597 PR tree-optimization/92860
25598 * common.opt: Make in Optimization option
25599 as it is affected by -O0, which is an Optimization
25601 * tree-inline.c (tree_inlinable_function_p):
25602 Use opt_for_fn for warn_inline.
25603 (expand_call_inline): Likewise.
25605 2020-01-07 Martin Liska <mliska@suse.cz>
25607 PR tree-optimization/92860
25608 * common.opt: Make flag_ree as optimization
25611 2020-01-07 Martin Liska <mliska@suse.cz>
25613 PR optimization/92860
25614 * params.opt: Mark param_min_crossjump_insns with Optimization
25617 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
25619 * ipa-inline-analysis.c (estimate_growth): Fix typo.
25620 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
25622 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
25624 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
25625 helper function to return the valid addressing formats for a given
25626 hard register and mode.
25627 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
25629 * config/rs6000/constraints.md (Q constraint): Update
25631 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
25634 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
25635 Use 'Q' for doing vector extract from memory.
25636 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
25638 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
25639 doing vector extract from memory.
25640 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
25641 extract from memory.
25643 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
25644 for the offset being 34-bits when -mcpu=future is used.
25646 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
25648 * config/pa/pa.md: Revert change to use ordered_comparison_operator
25649 instead of cmpib_comparison_operator in cmpib patterns.
25650 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
25651 of cmpib_comparison_operator. Revise comment.
25653 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25655 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
25656 in an IFN_DIV_POW2 node to be equal.
25658 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25660 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
25661 (vect_check_scalar_mask): ...this.
25662 (vectorizable_store, vectorizable_load): Update call accordingly.
25663 (vectorizable_call): Use vect_check_scalar_mask to check the mask
25664 argument in calls to conditional internal functions.
25666 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25668 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
25669 '0' matching inputs.
25670 (subv64di3_exec): Likewise.
25672 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
25674 * config/mips/mips.c (vr4130_align_insns): Fix typo.
25675 * doc/md.texi (movstr): Likewise.
25677 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25679 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
25682 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25684 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
25686 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
25687 to a temporary file and use move-if-change to update the real
25688 file where necessary.
25690 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
25692 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
25693 rather than Upa for CPY /M.
25695 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
25697 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
25700 2020-01-06 Martin Liska <mliska@suse.cz>
25702 PR tree-optimization/92860
25703 * params.opt: Mark param_max_combine_insns with Optimization
25706 2020-01-05 Jakub Jelinek <jakub@redhat.com>
25709 * config/i386/i386.md (SWIDWI): New mode iterator.
25710 (DWI, dwi): Add TImode variants.
25711 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
25712 <general_hilo_operand> instead of <general_operand>. Use
25713 CONST_SCALAR_INT_P instead of CONST_INT_P.
25714 (*addv<mode>4_1): Rename to ...
25715 (addv<mode>4_1): ... this.
25716 (QWI): New mode attribute.
25717 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
25718 define_insn_and_split patterns.
25719 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
25721 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
25722 <general_hilo_operand> instead of <general_operand>.
25723 (*addcarry<mode>_1): New define_insn.
25724 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
25726 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
25728 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
25729 Use "call" instead of "set".
25731 2020-01-03 Martin Jambor <mjambor@suse.cz>
25734 * ipa-cp.c (print_all_lattices): Skip functions without info.
25736 2020-01-03 Jakub Jelinek <jakub@redhat.com>
25739 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
25740 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
25741 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
25742 for 'e' simd clones.
25745 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
25747 (mprefer-vector-width=): Add Save.
25748 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
25749 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
25750 (ix86_debug_options, ix86_function_specific_print): Adjust
25751 ix86_target_string callers.
25752 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
25753 (ix86_valid_target_attribute_tree): Likewise.
25754 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
25755 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
25756 ix86_target_string caller.
25759 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
25760 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
25761 instead of gen_int_shift_amount + convert_modes.
25763 PR rtl-optimization/93088
25764 * loop-iv.c (find_single_def_src): Punt after looking through
25765 128 reg copies for regs with single definitions. Move definitions
25768 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
25770 * config/arm/arm-c.c (arm_cpu_builtins): Define
25771 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
25772 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
25773 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
25774 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
25775 * config/arm/arm-tables.opt: Regenerated.
25776 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
25777 arm_arch_i8mm and arm_arch_bf16 when enabled.
25778 * config/arm/arm.h (TARGET_I8MM): New macro.
25779 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
25780 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
25781 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
25782 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
25783 (v8_6_a_simd_variants): New.
25784 (v8_*_a_simd_variants): Add i8mm and bf16.
25785 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
25787 2020-01-02 Jakub Jelinek <jakub@redhat.com>
25790 * predict.c (compute_function_frequency): Don't call
25791 warn_function_cold on functions that already have cold attribute.
25793 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
25796 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
25797 COMDAT group function labels in .data.rel.ro.local section.
25798 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
25801 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
25802 comparison_operator in B and S integer comparisons. Likewise, use
25803 ordered_comparison_operator instead of cmpib_comparison_operator in
25805 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
25807 2020-01-01 Jakub Jelinek <jakub@redhat.com>
25809 Update copyright years.
25811 * gcc.c (process_command): Update copyright notice dates.
25812 * gcov-dump.c (print_version): Ditto.
25813 * gcov.c (print_version): Ditto.
25814 * gcov-tool.c (print_version): Ditto.
25815 * gengtype.c (create_file): Ditto.
25816 * doc/cpp.texi: Bump @copying's copyright year.
25817 * doc/cppinternals.texi: Ditto.
25818 * doc/gcc.texi: Ditto.
25819 * doc/gccint.texi: Ditto.
25820 * doc/gcov.texi: Ditto.
25821 * doc/install.texi: Ditto.
25822 * doc/invoke.texi: Ditto.
25824 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
25826 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
25829 2020-01-01 Jakub Jelinek <jakub@redhat.com>
25831 PR tree-optimization/93098
25832 * match.pd (popcount): For shift amounts, use integer_onep
25833 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
25834 tests. Make sure that precision is power of two larger than or equal
25835 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
25836 instead of ULL suffixed constants. Formatting fixes.
25838 Copyright (C) 2020 Free Software Foundation, Inc.
25840 Copying and distribution of this file, with or without modification,
25841 are permitted in any medium without royalty provided the copyright
25842 notice and this notice are preserved.