gcc/ChangeLog

   1 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
   2
   3         Add -nodevicespecs option for avr.
   4
   5         PR target/93182
   6         * config/avr/avr.opt (-nodevicespecs): New driver option.
   7         * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
   8         "-specs=device-specs/..." if that option is not set.
   9         * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
  10
  11 2020-01-08  Georg-Johann Lay  <avr@gjlay.de>
  12
  13         Implement 64-bit double functions for avr.
  14
  15         PR target/92055
  16         * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
  17         --with-double-comparison.
  18         * doc/install.texi: Document them.
  19         * config/avr/avr-c.c (avr_cpu_cpp_builtins)
  20         <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
  21         <WITH_DOUBLE_COMPARISON>: New built-in defines.
  22         * doc/invoke.texi (AVR Built-in Macros): Document them.
  23         * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
  24         * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
  25         * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
  26
  27 2020-01-08  Richard Earnshaw  <rearnsha@arm.com>
  28
  29         PR target/93188
  30         * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
  31         armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
  32         when only building rm-profile multilibs.
  33
  34 2020-01-08  Feng Xue  <fxue@os.amperecomputing.com>
  35
  36         PR ipa/93084
  37         * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
  38         lattice for a value to check.
  39         (propagate_vals_across_arith_jfunc): Add an assertion to ensure
  40         finite propagation in self-recursive scc.
  41
  42 2020-01-08  Luo Xiong Hu  <luoxhu@linux.ibm.com>
  43
  44         * ipa-inline.c (caller_growth_limits): Restore the AND.
  45
  46 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  47
  48         * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
  49         (VEC_ALLREG_ALT): New iterator.
  50         (VEC_ALLREG_INT_MODE): New iterator.
  51         (VCMP_MODE): New iterator.
  52         (VCMP_MODE_INT): New iterator.
  53         (vec_cmpu<mode>di): Use VCMP_MODE_INT.
  54         (vec_cmp<u>v64qidi): New define_expand.
  55         (vec_cmp<mode>di_exec): Use VCMP_MODE.
  56         (vec_cmpu<mode>di_exec): New define_expand.
  57         (vec_cmp<u>v64qidi_exec): New define_expand.
  58         (vec_cmp<mode>di_dup): Use VCMP_MODE.
  59         (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
  60         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
  61         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
  62         (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
  63         (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
  64         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
  65         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
  66         (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
  67         (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
  68         this.
  69         * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
  70         * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
  71
  72 2020-01-07  Andrew Stubbs  <ams@codesourcery.com>
  73
  74         * config/gcn/constraints.md (DA): Update description and match.
  75         (DB): Likewise.
  76         (Db): New constraint.
  77         * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
  78         parameter.
  79         * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
  80         Implement 'Db' mixed immediate type.
  81         * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
  82         (addcv64si3_dup<exec_vcc>): Delete.
  83         (subcv64si3<exec_vcc>): Rework constraints.
  84         (addv64di3): Rework constraints.
  85         (addv64di3_exec): Rework constraints.
  86         (subv64di3): Rework constraints.
  87         (addv64di3_dup): Delete.
  88         (addv64di3_dup_exec): Delete.
  89         (addv64di3_zext): Rework constraints.
  90         (addv64di3_zext_exec): Rework constraints.
  91         (addv64di3_zext_dup): Rework constraints.
  92         (addv64di3_zext_dup_exec): Rework constraints.
  93         (addv64di3_zext_dup2): Rework constraints.
  94         (addv64di3_zext_dup2_exec): Rework constraints.
  95         (addv64di3_sext_dup2): Rework constraints.
  96         (addv64di3_sext_dup2_exec): Rework constraints.
  97
  98 2020-01-07  Andre Vieira  <andre.simoesdiasvieira@arm.com>
  99
 100         * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
 101         existing target checks.
 102
 103 2020-01-07  Richard Biener  <rguenther@suse.de>
 104
 105         * doc/install.texi: Bump minimal supported MPC version.
 106
 107 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
 108
 109         * langhooks-def.h (lhd_simulate_enum_decl): Declare.
 110         (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
 111         * langhooks.c: Include stor-layout.h.
 112         (lhd_simulate_enum_decl): New function.
 113         * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
 114         handle_arm_sve_h for the LTO frontend.
 115         (register_vector_type): Cope with null returns from pushdecl.
 116
 117 2020-01-07  Richard Sandiford  <richard.sandiford@arm.com>
 118
 119         * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
 120         (aarch64_sve::nvectors_if_data_type): Replace with...
 121         (aarch64_sve::builtin_type_p): ...this.
 122         * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
 123         (find_vector_type): Delete.
 124         (add_sve_type_attribute): New function.
 125         (lookup_sve_type_attribute): Likewise.
 126         (register_builtin_types): Add an "SVE type" attribute to each type.
 127         (register_tuple_type): Likewise.
 128         (svbool_type_p, nvectors_if_data_type): Delete.
 129         (mangle_builtin_type): Use lookup_sve_type_attribute.
 130         (builtin_type_p): Likewise.  Add an overload that returns the
 131         number of constituent vector and predicate registers.
 132         * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
 133         (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
 134         instead of aarch64_sve_argument_p.
 135         (aarch64_takes_arguments_in_sve_regs_p): Likewise.
 136         (aarch64_pass_by_reference): Likewise.
 137         (aarch64_function_value_1): Likewise.
 138         (aarch64_return_in_memory): Likewise.
 139         (aarch64_layout_arg): Likewise.
 140
 141 2020-01-07  Jakub Jelinek  <jakub@redhat.com>
 142
 143         PR tree-optimization/93156
 144         * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
 145         least significant bit is always clear.
 146
 147         PR tree-optimization/93118
 148         * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?.  Add new
 149         simplifier with two intermediate conversions.
 150
 151 2020-01-07  Martin Liska  <mliska@suse.cz>
 152
 153         * params.opt: Add Optimization for various parameters.
 154
 155 2020-01-07  Martin Liska  <mliska@suse.cz>
 156
 157         PR ipa/83411
 158         * doc/extend.texi: Explain cloning for target_clone
 159         attribute.
 160
 161 2020-01-07  Martin Liska  <mliska@suse.cz>
 162
 163         PR tree-optimization/92860
 164         * common.opt: Make in Optimization option
 165         as it is affected by -O0, which is an Optimization
 166         option.
 167         * tree-inline.c (tree_inlinable_function_p):
 168         Use opt_for_fn for warn_inline.
 169         (expand_call_inline): Likewise.
 170
 171 2020-01-07  Martin Liska  <mliska@suse.cz>
 172
 173         PR tree-optimization/92860
 174         * common.opt: Make flag_ree as optimization
 175         attribute.
 176
 177 2020-01-07  Martin Liska  <mliska@suse.cz>
 178
 179         PR optimization/92860
 180         * params.opt: Mark param_min_crossjump_insns with Optimization
 181         keyword.
 182
 183 2020-01-07  Luo Xiong Hu  <luoxhu@linux.ibm.com>
 184
 185         * ipa-inline-analysis.c (estimate_growth): Fix typo.
 186         * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
 187
 188 2020-01-06  Michael Meissner  <meissner@linux.ibm.com>
 189
 190         * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
 191         helper function to return the valid addressing formats for a given
 192         hard register and mode.
 193         (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
 194
 195         * config/rs6000/constraints.md (Q constraint): Update
 196         documentation.
 197         * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
 198         documentation.
 199
 200         * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
 201         Use 'Q' for doing vector extract from memory.
 202         (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
 203         memory.
 204         (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
 205         doing vector extract from memory.
 206         (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
 207         extract from memory.
 208
 209         * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
 210         for the offset being 34-bits when -mcpu=future is used.
 211
 212 2020-01-06  John David Anglin  <danglin@gcc.gnu.org>
 213
 214         * config/pa/pa.md: Revert change to use ordered_comparison_operator
 215         instead of cmpib_comparison_operator in cmpib patterns.
 216         * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
 217         of cmpib_comparison_operator.  Revise comment.
 218
 219 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 220
 221         * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
 222         in an IFN_DIV_POW2 node to be equal.
 223
 224 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 225
 226         * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
 227         (vect_check_scalar_mask): ...this.
 228         (vectorizable_store, vectorizable_load): Update call accordingly.
 229         (vectorizable_call): Use vect_check_scalar_mask to check the mask
 230         argument in calls to conditional internal functions.
 231
 232 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 233
 234         * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
 235         '0' matching inputs.
 236         (subv64di3_exec): Likewise.
 237
 238 2020-01-06  Bryan Stenson  <bryan@siliconvortex.com>
 239
 240         * config/mips/mips.c (vr4130_align_insns): Fix typo.
 241         * doc/md.texi (movstr): Likewise.
 242
 243 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 244
 245         * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
 246         clobber.
 247
 248 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 249
 250         * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
 251         Depend on...
 252         (s-aarch64-tune-md): ...this new stamp file.  Pipe the new contents
 253         to a temporary file and use move-if-change to update the real
 254         file where necessary.
 255
 256 2020-01-06  Richard Sandiford  <richard.sandiford@arm.com>
 257
 258         * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
 259         rather than Upa for CPY /M.
 260
 261 2020-01-06  Andrew Stubbs  <ams@codesourcery.com>
 262
 263         * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
 264         immediate.
 265
 266 2020-01-06  Martin Liska  <mliska@suse.cz>
 267
 268     PR tree-optimization/92860
 269     * params.opt: Mark param_max_combine_insns with Optimization
 270     keyword.
 271
 272 2020-01-05  Jakub Jelinek  <jakub@redhat.com>
 273
 274         PR target/93141
 275         * config/i386/i386.md (SWIDWI): New mode iterator.
 276         (DWI, dwi): Add TImode variants.
 277         (addv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 278         <general_hilo_operand> instead of <general_operand>.  Use
 279         CONST_SCALAR_INT_P instead of CONST_INT_P.
 280         (*addv<mode>4_1): Rename to ...
 281         (addv<mode>4_1): ... this.
 282         (QWI): New mode attribute.
 283         (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
 284         define_insn_and_split patterns.
 285         (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
 286         patterns.
 287         (uaddv<mode>4): Use SWIDWI iterator instead of SWI.  Use
 288         <general_hilo_operand> instead of <general_operand>.
 289         (*addcarry<mode>_1): New define_insn.
 290         (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
 291
 292 2020-01-03  Konstantin Kharlamov  <Hi-Angel@yandex.ru>
 293
 294         * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
 295         Use "call" instead of "set".
 296
 297 2020-01-03  Martin Jambor  <mjambor@suse.cz>
 298
 299         PR ipa/92917
 300         * ipa-cp.c (print_all_lattices): Skip functions without info.
 301
 302 2020-01-03  Jakub Jelinek  <jakub@redhat.com>
 303
 304         PR target/93089
 305         * config/i386/i386-options.c (ix86_simd_clone_adjust): If
 306         TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
 307         simd clones.  If TARGET_PREFER_AVX256, use prefer-vector-width=512
 308         for 'e' simd clones.
 309
 310         PR target/93089
 311         * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
 312         entry.
 313         (mprefer-vector-width=): Add Save.
 314         * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
 315         -mprefer-vector-width= if non-zero.  Fix up -mfpmath= comment.
 316         (ix86_debug_options, ix86_function_specific_print): Adjust
 317         ix86_target_string callers.
 318         (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
 319         (ix86_valid_target_attribute_tree): Likewise.
 320         * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
 321         * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
 322         ix86_target_string caller.
 323
 324         PR target/93110
 325         * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
 326         emitting ASHIFTRT, XOR and MINUS by hand.  Use gen_int_mode with QImode
 327         instead of gen_int_shift_amount + convert_modes.
 328
 329         PR rtl-optimization/93088
 330         * loop-iv.c (find_single_def_src): Punt after looking through
 331         128 reg copies for regs with single definitions.  Move definitions
 332         to first uses.
 333
 334 2020-01-02  Dennis Zhang  <dennis.zhang@arm.com>
 335
 336         * config/arm/arm-c.c (arm_cpu_builtins): Define
 337         __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
 338         __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
 339         __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
 340         * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
 341         * config/arm/arm-tables.opt: Regenerated.
 342         * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
 343         arm_arch_i8mm and arm_arch_bf16 when enabled.
 344         * config/arm/arm.h (TARGET_I8MM): New macro.
 345         (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
 346         * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
 347         * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
 348         * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
 349         (v8_6_a_simd_variants): New.
 350         (v8_*_a_simd_variants): Add i8mm and bf16.
 351         * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
 352
 353 2020-01-02  Jakub Jelinek  <jakub@redhat.com>
 354
 355         PR ipa/93087
 356         * predict.c (compute_function_frequency): Don't call
 357         warn_function_cold on functions that already have cold attribute.
 358
 359 2020-01-01  John David Anglin  <danglin@gcc.gnu.org>
 360
 361         PR target/67834
 362         * config/pa/pa.c (pa_elf_select_rtx_section): New.  Put references to
 363         COMDAT group function labels in .data.rel.ro.local section.
 364         * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
 365
 366         PR target/93111
 367         * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
 368         comparison_operator in B and S integer comparisons.  Likewise, use
 369         ordered_comparison_operator instead of cmpib_comparison_operator in
 370         cmpib patterns.
 371         * config/pa/predicates.md (cmpib_comparison_operator): Remove.
 372
 373 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 374
 375         Update copyright years.
 376
 377         * gcc.c (process_command): Update copyright notice dates.
 378         * gcov-dump.c (print_version): Ditto.
 379         * gcov.c (print_version): Ditto.
 380         * gcov-tool.c (print_version): Ditto.
 381         * gengtype.c (create_file): Ditto.
 382         * doc/cpp.texi: Bump @copying's copyright year.
 383         * doc/cppinternals.texi: Ditto.
 384         * doc/gcc.texi: Ditto.
 385         * doc/gccint.texi: Ditto.
 386         * doc/gcov.texi: Ditto.
 387         * doc/install.texi: Ditto.
 388         * doc/invoke.texi: Ditto.
 389
 390 2020-01-01  Jan Hubicka  <hubicka@ucw.cz>
 391
 392         * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
 393         summary.
 394
 395 2020-01-01  Jakub Jelinek  <jakub@redhat.com>
 396
 397         PR tree-optimization/93098
 398         * match.pd (popcount): For shift amounts, use integer_onep
 399         or wi::to_widest () == cst instead of tree_to_uhwi () == cst
 400         tests.  Make sure that precision is power of two larger than or equal
 401         to 16.  Ensure shift is never negative.  Use HOST_WIDE_INT_UC macro
 402         instead of ULL suffixed constants.  Formatting fixes.
 403 \f
 404 Copyright (C) 2020 Free Software Foundation, Inc.
 405
 406 Copying and distribution of this file, with or without modification,
 407 are permitted in any medium without royalty provided the copyright
 408 notice and this notice are preserved.