function.h (emit_status): Delete member regno_pointer_flag and rename regno_pointer_f...
[gcc.git] / gcc / alias.c
1 /* Alias analysis for GNU C
2 Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3 Contributed by John Carr (jfc@mit.edu).
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "tree.h"
26 #include "tm_p.h"
27 #include "function.h"
28 #include "insn-flags.h"
29 #include "expr.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "output.h"
35 #include "toplev.h"
36 #include "cselib.h"
37 #include "splay-tree.h"
38 #include "ggc.h"
39
40 /* The alias sets assigned to MEMs assist the back-end in determining
41 which MEMs can alias which other MEMs. In general, two MEMs in
42 different alias sets cannot alias each other, with one important
43 exception. Consider something like:
44
45 struct S {int i; double d; };
46
47 a store to an `S' can alias something of either type `int' or type
48 `double'. (However, a store to an `int' cannot alias a `double'
49 and vice versa.) We indicate this via a tree structure that looks
50 like:
51 struct S
52 / \
53 / \
54 |/_ _\|
55 int double
56
57 (The arrows are directed and point downwards.)
58 In this situation we say the alias set for `struct S' is the
59 `superset' and that those for `int' and `double' are `subsets'.
60
61 To see whether two alias sets can point to the same memory, we must
62 see if either alias set is a subset of the other. We need not trace
63 past immediate decendents, however, since we propagate all
64 grandchildren up one level.
65
66 Alias set zero is implicitly a superset of all other alias sets.
67 However, this is no actual entry for alias set zero. It is an
68 error to attempt to explicitly construct a subset of zero. */
69
70 typedef struct alias_set_entry
71 {
72 /* The alias set number, as stored in MEM_ALIAS_SET. */
73 HOST_WIDE_INT alias_set;
74
75 /* The children of the alias set. These are not just the immediate
76 children, but, in fact, all decendents. So, if we have:
77
78 struct T { struct S s; float f; }
79
80 continuing our example above, the children here will be all of
81 `int', `double', `float', and `struct S'. */
82 splay_tree children;
83
84 /* Nonzero if would have a child of zero: this effectively makes this
85 alias set the same as alias set zero. */
86 int has_zero_child;
87 } *alias_set_entry;
88
89 static int rtx_equal_for_memref_p PARAMS ((rtx, rtx));
90 static rtx find_symbolic_term PARAMS ((rtx));
91 static rtx get_addr PARAMS ((rtx));
92 static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx,
93 HOST_WIDE_INT));
94 static void record_set PARAMS ((rtx, rtx, void *));
95 static rtx find_base_term PARAMS ((rtx));
96 static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode,
97 enum machine_mode));
98 static rtx find_base_value PARAMS ((rtx));
99 static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx));
100 static int insert_subset_children PARAMS ((splay_tree_node, void*));
101 static tree find_base_decl PARAMS ((tree));
102 static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT));
103 static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx,
104 int (*) (rtx)));
105 static int aliases_everything_p PARAMS ((rtx));
106 static int write_dependence_p PARAMS ((rtx, rtx, int));
107 static int nonlocal_mentioned_p PARAMS ((rtx));
108
109 static int loop_p PARAMS ((void));
110
111 /* Set up all info needed to perform alias analysis on memory references. */
112
113 /* Returns the size in bytes of the mode of X. */
114 #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
115
116 /* Returns nonzero if MEM1 and MEM2 do not alias because they are in
117 different alias sets. We ignore alias sets in functions making use
118 of variable arguments because the va_arg macros on some systems are
119 not legal ANSI C. */
120 #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
121 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
122
123 /* Cap the number of passes we make over the insns propagating alias
124 information through set chains. 10 is a completely arbitrary choice. */
125 #define MAX_ALIAS_LOOP_PASSES 10
126
127 /* reg_base_value[N] gives an address to which register N is related.
128 If all sets after the first add or subtract to the current value
129 or otherwise modify it so it does not point to a different top level
130 object, reg_base_value[N] is equal to the address part of the source
131 of the first set.
132
133 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
134 expressions represent certain special values: function arguments and
135 the stack, frame, and argument pointers.
136
137 The contents of an ADDRESS is not normally used, the mode of the
138 ADDRESS determines whether the ADDRESS is a function argument or some
139 other special value. Pointer equality, not rtx_equal_p, determines whether
140 two ADDRESS expressions refer to the same base address.
141
142 The only use of the contents of an ADDRESS is for determining if the
143 current function performs nonlocal memory memory references for the
144 purposes of marking the function as a constant function. */
145
146 static rtx *reg_base_value;
147 static rtx *new_reg_base_value;
148 static unsigned int reg_base_value_size; /* size of reg_base_value array */
149
150 #define REG_BASE_VALUE(X) \
151 (REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0)
152
153 /* Vector of known invariant relationships between registers. Set in
154 loop unrolling. Indexed by register number, if nonzero the value
155 is an expression describing this register in terms of another.
156
157 The length of this array is REG_BASE_VALUE_SIZE.
158
159 Because this array contains only pseudo registers it has no effect
160 after reload. */
161 static rtx *alias_invariant;
162
163 /* Vector indexed by N giving the initial (unchanging) value known for
164 pseudo-register N. This array is initialized in
165 init_alias_analysis, and does not change until end_alias_analysis
166 is called. */
167 rtx *reg_known_value;
168
169 /* Indicates number of valid entries in reg_known_value. */
170 static unsigned int reg_known_value_size;
171
172 /* Vector recording for each reg_known_value whether it is due to a
173 REG_EQUIV note. Future passes (viz., reload) may replace the
174 pseudo with the equivalent expression and so we account for the
175 dependences that would be introduced if that happens.
176
177 The REG_EQUIV notes created in assign_parms may mention the arg
178 pointer, and there are explicit insns in the RTL that modify the
179 arg pointer. Thus we must ensure that such insns don't get
180 scheduled across each other because that would invalidate the
181 REG_EQUIV notes. One could argue that the REG_EQUIV notes are
182 wrong, but solving the problem in the scheduler will likely give
183 better code, so we do it here. */
184 char *reg_known_equiv_p;
185
186 /* True when scanning insns from the start of the rtl to the
187 NOTE_INSN_FUNCTION_BEG note. */
188 static int copying_arguments;
189
190 /* The splay-tree used to store the various alias set entries. */
191 static splay_tree alias_sets;
192 \f
193 /* Returns a pointer to the alias set entry for ALIAS_SET, if there is
194 such an entry, or NULL otherwise. */
195
196 static alias_set_entry
197 get_alias_set_entry (alias_set)
198 HOST_WIDE_INT alias_set;
199 {
200 splay_tree_node sn
201 = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
202
203 return sn != 0 ? ((alias_set_entry) sn->value) : 0;
204 }
205
206 /* Returns nonzero if the alias sets for MEM1 and MEM2 are such that
207 the two MEMs cannot alias each other. */
208
209 static int
210 mems_in_disjoint_alias_sets_p (mem1, mem2)
211 rtx mem1;
212 rtx mem2;
213 {
214 alias_set_entry ase;
215
216 #ifdef ENABLE_CHECKING
217 /* Perform a basic sanity check. Namely, that there are no alias sets
218 if we're not using strict aliasing. This helps to catch bugs
219 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
220 where a MEM is allocated in some way other than by the use of
221 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
222 use alias sets to indicate that spilled registers cannot alias each
223 other, we might need to remove this check. */
224 if (! flag_strict_aliasing
225 && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0))
226 abort ();
227 #endif
228
229 /* If have no alias set information for one of the MEMs, we have to assume
230 it can alias anything. */
231 if (MEM_ALIAS_SET (mem1) == 0 || MEM_ALIAS_SET (mem2) == 0)
232 return 0;
233
234 /* If the two alias sets are the same, they may alias. */
235 if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2))
236 return 0;
237
238 /* See if the first alias set is a subset of the second. */
239 ase = get_alias_set_entry (MEM_ALIAS_SET (mem1));
240 if (ase != 0
241 && (ase->has_zero_child
242 || splay_tree_lookup (ase->children,
243 (splay_tree_key) MEM_ALIAS_SET (mem2))))
244 return 0;
245
246 /* Now do the same, but with the alias sets reversed. */
247 ase = get_alias_set_entry (MEM_ALIAS_SET (mem2));
248 if (ase != 0
249 && (ase->has_zero_child
250 || splay_tree_lookup (ase->children,
251 (splay_tree_key) MEM_ALIAS_SET (mem1))))
252 return 0;
253
254 /* The two MEMs are in distinct alias sets, and neither one is the
255 child of the other. Therefore, they cannot alias. */
256 return 1;
257 }
258
259 /* Insert the NODE into the splay tree given by DATA. Used by
260 record_alias_subset via splay_tree_foreach. */
261
262 static int
263 insert_subset_children (node, data)
264 splay_tree_node node;
265 void *data;
266 {
267 splay_tree_insert ((splay_tree) data, node->key, node->value);
268
269 return 0;
270 }
271 \f
272 /* T is an expression with pointer type. Find the DECL on which this
273 expression is based. (For example, in `a[i]' this would be `a'.)
274 If there is no such DECL, or a unique decl cannot be determined,
275 NULL_TREE is retured. */
276
277 static tree
278 find_base_decl (t)
279 tree t;
280 {
281 tree d0, d1, d2;
282
283 if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t)))
284 return 0;
285
286 /* If this is a declaration, return it. */
287 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd')
288 return t;
289
290 /* Handle general expressions. It would be nice to deal with
291 COMPONENT_REFs here. If we could tell that `a' and `b' were the
292 same, then `a->f' and `b->f' are also the same. */
293 switch (TREE_CODE_CLASS (TREE_CODE (t)))
294 {
295 case '1':
296 return find_base_decl (TREE_OPERAND (t, 0));
297
298 case '2':
299 /* Return 0 if found in neither or both are the same. */
300 d0 = find_base_decl (TREE_OPERAND (t, 0));
301 d1 = find_base_decl (TREE_OPERAND (t, 1));
302 if (d0 == d1)
303 return d0;
304 else if (d0 == 0)
305 return d1;
306 else if (d1 == 0)
307 return d0;
308 else
309 return 0;
310
311 case '3':
312 d0 = find_base_decl (TREE_OPERAND (t, 0));
313 d1 = find_base_decl (TREE_OPERAND (t, 1));
314 d0 = find_base_decl (TREE_OPERAND (t, 0));
315 d2 = find_base_decl (TREE_OPERAND (t, 2));
316
317 /* Set any nonzero values from the last, then from the first. */
318 if (d1 == 0) d1 = d2;
319 if (d0 == 0) d0 = d1;
320 if (d1 == 0) d1 = d0;
321 if (d2 == 0) d2 = d1;
322
323 /* At this point all are nonzero or all are zero. If all three are the
324 same, return it. Otherwise, return zero. */
325 return (d0 == d1 && d1 == d2) ? d0 : 0;
326
327 default:
328 return 0;
329 }
330 }
331
332 /* Return the alias set for T, which may be either a type or an
333 expression. Call language-specific routine for help, if needed. */
334
335 HOST_WIDE_INT
336 get_alias_set (t)
337 tree t;
338 {
339 tree orig_t;
340 HOST_WIDE_INT set;
341
342 /* If we're not doing any alias analysis, just assume everything
343 aliases everything else. Also return 0 if this or its type is
344 an error. */
345 if (! flag_strict_aliasing || t == error_mark_node
346 || (! TYPE_P (t)
347 && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node)))
348 return 0;
349
350 /* We can be passed either an expression or a type. This and the
351 language-specific routine may make mutually-recursive calls to
352 each other to figure out what to do. At each juncture, we see if
353 this is a tree that the language may need to handle specially.
354 First handle things that aren't types and start by removing nops
355 since we care only about the actual object. */
356 if (! TYPE_P (t))
357 {
358 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
359 || TREE_CODE (t) == NON_LVALUE_EXPR)
360 t = TREE_OPERAND (t, 0);
361
362 /* Now give the language a chance to do something but record what we
363 gave it this time. */
364 orig_t = t;
365 if ((set = lang_get_alias_set (t)) != -1)
366 return set;
367
368 /* Now loop the same way as get_inner_reference and get the alias
369 set to use. Pick up the outermost object that we could have
370 a pointer to. */
371 while (1)
372 {
373 /* Unnamed bitfields are not an addressable object. */
374 if (TREE_CODE (t) == BIT_FIELD_REF)
375 ;
376 else if (TREE_CODE (t) == COMPONENT_REF)
377 {
378 if (! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1)))
379 /* Stop at an adressable decl. */
380 break;
381 }
382 else if (TREE_CODE (t) == ARRAY_REF)
383 {
384 if (! TYPE_NONALIASED_COMPONENT
385 (TREE_TYPE (TREE_OPERAND (t, 0))))
386 /* Stop at an addresssable array element. */
387 break;
388 }
389 else if (TREE_CODE (t) != NON_LVALUE_EXPR
390 && ! ((TREE_CODE (t) == NOP_EXPR
391 || TREE_CODE (t) == CONVERT_EXPR)
392 && (TYPE_MODE (TREE_TYPE (t))
393 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (t, 0))))))
394 /* Stop if not one of above and not mode-preserving conversion. */
395 break;
396
397 t = TREE_OPERAND (t, 0);
398 }
399
400 if (TREE_CODE (t) == INDIRECT_REF)
401 {
402 /* Check for accesses through restrict-qualified pointers. */
403 tree decl = find_base_decl (TREE_OPERAND (t, 0));
404
405 if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl))
406 /* We use the alias set indicated in the declaration. */
407 return DECL_POINTER_ALIAS_SET (decl);
408
409 /* If we have an INDIRECT_REF via a void pointer, we don't
410 know anything about what that might alias. */
411 if (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE)
412 return 0;
413 }
414
415 /* Give the language another chance to do something special. */
416 if (orig_t != t
417 && (set = lang_get_alias_set (t)) != -1)
418 return set;
419
420 /* Now all we care about is the type. */
421 t = TREE_TYPE (t);
422 }
423
424 /* Variant qualifiers don't affect the alias set, so get the main
425 variant. If this is a type with a known alias set, return it. */
426 t = TYPE_MAIN_VARIANT (t);
427 if (TYPE_P (t) && TYPE_ALIAS_SET_KNOWN_P (t))
428 return TYPE_ALIAS_SET (t);
429
430 /* See if the language has special handling for this type. */
431 if ((set = lang_get_alias_set (t)) != -1)
432 {
433 /* If the alias set is now known, we are done. */
434 if (TYPE_ALIAS_SET_KNOWN_P (t))
435 return TYPE_ALIAS_SET (t);
436 }
437
438 /* There are no objects of FUNCTION_TYPE, so there's no point in
439 using up an alias set for them. (There are, of course, pointers
440 and references to functions, but that's different.) */
441 else if (TREE_CODE (t) == FUNCTION_TYPE)
442 set = 0;
443 else
444 /* Otherwise make a new alias set for this type. */
445 set = new_alias_set ();
446
447 TYPE_ALIAS_SET (t) = set;
448
449 /* If this is an aggregate type, we must record any component aliasing
450 information. */
451 if (AGGREGATE_TYPE_P (t))
452 record_component_aliases (t);
453
454 return set;
455 }
456
457 /* Return a brand-new alias set. */
458
459 HOST_WIDE_INT
460 new_alias_set ()
461 {
462 static HOST_WIDE_INT last_alias_set;
463
464 if (flag_strict_aliasing)
465 return ++last_alias_set;
466 else
467 return 0;
468 }
469
470 /* Indicate that things in SUBSET can alias things in SUPERSET, but
471 not vice versa. For example, in C, a store to an `int' can alias a
472 structure containing an `int', but not vice versa. Here, the
473 structure would be the SUPERSET and `int' the SUBSET. This
474 function should be called only once per SUPERSET/SUBSET pair.
475
476 It is illegal for SUPERSET to be zero; everything is implicitly a
477 subset of alias set zero. */
478
479 void
480 record_alias_subset (superset, subset)
481 HOST_WIDE_INT superset;
482 HOST_WIDE_INT subset;
483 {
484 alias_set_entry superset_entry;
485 alias_set_entry subset_entry;
486
487 if (superset == 0)
488 abort ();
489
490 superset_entry = get_alias_set_entry (superset);
491 if (superset_entry == 0)
492 {
493 /* Create an entry for the SUPERSET, so that we have a place to
494 attach the SUBSET. */
495 superset_entry
496 = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
497 superset_entry->alias_set = superset;
498 superset_entry->children
499 = splay_tree_new (splay_tree_compare_ints, 0, 0);
500 superset_entry->has_zero_child = 0;
501 splay_tree_insert (alias_sets, (splay_tree_key) superset,
502 (splay_tree_value) superset_entry);
503 }
504
505 if (subset == 0)
506 superset_entry->has_zero_child = 1;
507 else
508 {
509 subset_entry = get_alias_set_entry (subset);
510 /* If there is an entry for the subset, enter all of its children
511 (if they are not already present) as children of the SUPERSET. */
512 if (subset_entry)
513 {
514 if (subset_entry->has_zero_child)
515 superset_entry->has_zero_child = 1;
516
517 splay_tree_foreach (subset_entry->children, insert_subset_children,
518 superset_entry->children);
519 }
520
521 /* Enter the SUBSET itself as a child of the SUPERSET. */
522 splay_tree_insert (superset_entry->children,
523 (splay_tree_key) subset, 0);
524 }
525 }
526
527 /* Record that component types of TYPE, if any, are part of that type for
528 aliasing purposes. For record types, we only record component types
529 for fields that are marked addressable. For array types, we always
530 record the component types, so the front end should not call this
531 function if the individual component aren't addressable. */
532
533 void
534 record_component_aliases (type)
535 tree type;
536 {
537 HOST_WIDE_INT superset = get_alias_set (type);
538 tree field;
539
540 if (superset == 0)
541 return;
542
543 switch (TREE_CODE (type))
544 {
545 case ARRAY_TYPE:
546 if (! TYPE_NONALIASED_COMPONENT (type))
547 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
548 break;
549
550 case RECORD_TYPE:
551 case UNION_TYPE:
552 case QUAL_UNION_TYPE:
553 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
554 if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field))
555 record_alias_subset (superset, get_alias_set (TREE_TYPE (field)));
556 break;
557
558 default:
559 break;
560 }
561 }
562
563 /* Allocate an alias set for use in storing and reading from the varargs
564 spill area. */
565
566 HOST_WIDE_INT
567 get_varargs_alias_set ()
568 {
569 static HOST_WIDE_INT set = -1;
570
571 if (set == -1)
572 set = new_alias_set ();
573
574 return set;
575 }
576
577 /* Likewise, but used for the fixed portions of the frame, e.g., register
578 save areas. */
579
580 HOST_WIDE_INT
581 get_frame_alias_set ()
582 {
583 static HOST_WIDE_INT set = -1;
584
585 if (set == -1)
586 set = new_alias_set ();
587
588 return set;
589 }
590
591 /* Inside SRC, the source of a SET, find a base address. */
592
593 static rtx
594 find_base_value (src)
595 register rtx src;
596 {
597 switch (GET_CODE (src))
598 {
599 case SYMBOL_REF:
600 case LABEL_REF:
601 return src;
602
603 case REG:
604 /* At the start of a function, argument registers have known base
605 values which may be lost later. Returning an ADDRESS
606 expression here allows optimization based on argument values
607 even when the argument registers are used for other purposes. */
608 if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments)
609 return new_reg_base_value[REGNO (src)];
610
611 /* If a pseudo has a known base value, return it. Do not do this
612 for hard regs since it can result in a circular dependency
613 chain for registers which have values at function entry.
614
615 The test above is not sufficient because the scheduler may move
616 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
617 if (REGNO (src) >= FIRST_PSEUDO_REGISTER
618 && (unsigned) REGNO (src) < reg_base_value_size
619 && reg_base_value[REGNO (src)])
620 return reg_base_value[REGNO (src)];
621
622 return src;
623
624 case MEM:
625 /* Check for an argument passed in memory. Only record in the
626 copying-arguments block; it is too hard to track changes
627 otherwise. */
628 if (copying_arguments
629 && (XEXP (src, 0) == arg_pointer_rtx
630 || (GET_CODE (XEXP (src, 0)) == PLUS
631 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
632 return gen_rtx_ADDRESS (VOIDmode, src);
633 return 0;
634
635 case CONST:
636 src = XEXP (src, 0);
637 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
638 break;
639
640 /* ... fall through ... */
641
642 case PLUS:
643 case MINUS:
644 {
645 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
646
647 /* If either operand is a REG, then see if we already have
648 a known value for it. */
649 if (GET_CODE (src_0) == REG)
650 {
651 temp = find_base_value (src_0);
652 if (temp != 0)
653 src_0 = temp;
654 }
655
656 if (GET_CODE (src_1) == REG)
657 {
658 temp = find_base_value (src_1);
659 if (temp!= 0)
660 src_1 = temp;
661 }
662
663 /* Guess which operand is the base address:
664 If either operand is a symbol, then it is the base. If
665 either operand is a CONST_INT, then the other is the base. */
666 if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0))
667 return find_base_value (src_0);
668 else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1))
669 return find_base_value (src_1);
670
671 /* This might not be necessary anymore:
672 If either operand is a REG that is a known pointer, then it
673 is the base. */
674 else if (GET_CODE (src_0) == REG && REG_POINTER (src_0))
675 return find_base_value (src_0);
676 else if (GET_CODE (src_1) == REG && REG_POINTER (src_1))
677 return find_base_value (src_1);
678
679 return 0;
680 }
681
682 case LO_SUM:
683 /* The standard form is (lo_sum reg sym) so look only at the
684 second operand. */
685 return find_base_value (XEXP (src, 1));
686
687 case AND:
688 /* If the second operand is constant set the base
689 address to the first operand. */
690 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
691 return find_base_value (XEXP (src, 0));
692 return 0;
693
694 case ZERO_EXTEND:
695 case SIGN_EXTEND: /* used for NT/Alpha pointers */
696 case HIGH:
697 return find_base_value (XEXP (src, 0));
698
699 default:
700 break;
701 }
702
703 return 0;
704 }
705
706 /* Called from init_alias_analysis indirectly through note_stores. */
707
708 /* While scanning insns to find base values, reg_seen[N] is nonzero if
709 register N has been set in this function. */
710 static char *reg_seen;
711
712 /* Addresses which are known not to alias anything else are identified
713 by a unique integer. */
714 static int unique_id;
715
716 static void
717 record_set (dest, set, data)
718 rtx dest, set;
719 void *data ATTRIBUTE_UNUSED;
720 {
721 register unsigned regno;
722 rtx src;
723
724 if (GET_CODE (dest) != REG)
725 return;
726
727 regno = REGNO (dest);
728
729 if (regno >= reg_base_value_size)
730 abort ();
731
732 if (set)
733 {
734 /* A CLOBBER wipes out any old value but does not prevent a previously
735 unset register from acquiring a base address (i.e. reg_seen is not
736 set). */
737 if (GET_CODE (set) == CLOBBER)
738 {
739 new_reg_base_value[regno] = 0;
740 return;
741 }
742 src = SET_SRC (set);
743 }
744 else
745 {
746 if (reg_seen[regno])
747 {
748 new_reg_base_value[regno] = 0;
749 return;
750 }
751 reg_seen[regno] = 1;
752 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
753 GEN_INT (unique_id++));
754 return;
755 }
756
757 /* This is not the first set. If the new value is not related to the
758 old value, forget the base value. Note that the following code is
759 not detected:
760 extern int x, y; int *p = &x; p += (&y-&x);
761 ANSI C does not allow computing the difference of addresses
762 of distinct top level objects. */
763 if (new_reg_base_value[regno])
764 switch (GET_CODE (src))
765 {
766 case LO_SUM:
767 case PLUS:
768 case MINUS:
769 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
770 new_reg_base_value[regno] = 0;
771 break;
772 case AND:
773 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
774 new_reg_base_value[regno] = 0;
775 break;
776 default:
777 new_reg_base_value[regno] = 0;
778 break;
779 }
780 /* If this is the first set of a register, record the value. */
781 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
782 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
783 new_reg_base_value[regno] = find_base_value (src);
784
785 reg_seen[regno] = 1;
786 }
787
788 /* Called from loop optimization when a new pseudo-register is
789 created. It indicates that REGNO is being set to VAL. f INVARIANT
790 is true then this value also describes an invariant relationship
791 which can be used to deduce that two registers with unknown values
792 are different. */
793
794 void
795 record_base_value (regno, val, invariant)
796 unsigned int regno;
797 rtx val;
798 int invariant;
799 {
800 if (regno >= reg_base_value_size)
801 return;
802
803 if (invariant && alias_invariant)
804 alias_invariant[regno] = val;
805
806 if (GET_CODE (val) == REG)
807 {
808 if (REGNO (val) < reg_base_value_size)
809 reg_base_value[regno] = reg_base_value[REGNO (val)];
810
811 return;
812 }
813
814 reg_base_value[regno] = find_base_value (val);
815 }
816
817 /* Returns a canonical version of X, from the point of view alias
818 analysis. (For example, if X is a MEM whose address is a register,
819 and the register has a known value (say a SYMBOL_REF), then a MEM
820 whose address is the SYMBOL_REF is returned.) */
821
822 rtx
823 canon_rtx (x)
824 rtx x;
825 {
826 /* Recursively look for equivalences. */
827 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
828 && REGNO (x) < reg_known_value_size)
829 return reg_known_value[REGNO (x)] == x
830 ? x : canon_rtx (reg_known_value[REGNO (x)]);
831 else if (GET_CODE (x) == PLUS)
832 {
833 rtx x0 = canon_rtx (XEXP (x, 0));
834 rtx x1 = canon_rtx (XEXP (x, 1));
835
836 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
837 {
838 /* We can tolerate LO_SUMs being offset here; these
839 rtl are used for nothing other than comparisons. */
840 if (GET_CODE (x0) == CONST_INT)
841 return plus_constant_for_output (x1, INTVAL (x0));
842 else if (GET_CODE (x1) == CONST_INT)
843 return plus_constant_for_output (x0, INTVAL (x1));
844 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
845 }
846 }
847
848 /* This gives us much better alias analysis when called from
849 the loop optimizer. Note we want to leave the original
850 MEM alone, but need to return the canonicalized MEM with
851 all the flags with their original values. */
852 else if (GET_CODE (x) == MEM)
853 {
854 rtx addr = canon_rtx (XEXP (x, 0));
855
856 if (addr != XEXP (x, 0))
857 {
858 rtx new = gen_rtx_MEM (GET_MODE (x), addr);
859
860 MEM_COPY_ATTRIBUTES (new, x);
861 x = new;
862 }
863 }
864 return x;
865 }
866
867 /* Return 1 if X and Y are identical-looking rtx's.
868
869 We use the data in reg_known_value above to see if two registers with
870 different numbers are, in fact, equivalent. */
871
872 static int
873 rtx_equal_for_memref_p (x, y)
874 rtx x, y;
875 {
876 register int i;
877 register int j;
878 register enum rtx_code code;
879 register const char *fmt;
880
881 if (x == 0 && y == 0)
882 return 1;
883 if (x == 0 || y == 0)
884 return 0;
885
886 x = canon_rtx (x);
887 y = canon_rtx (y);
888
889 if (x == y)
890 return 1;
891
892 code = GET_CODE (x);
893 /* Rtx's of different codes cannot be equal. */
894 if (code != GET_CODE (y))
895 return 0;
896
897 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
898 (REG:SI x) and (REG:HI x) are NOT equivalent. */
899
900 if (GET_MODE (x) != GET_MODE (y))
901 return 0;
902
903 /* Some RTL can be compared without a recursive examination. */
904 switch (code)
905 {
906 case REG:
907 return REGNO (x) == REGNO (y);
908
909 case LABEL_REF:
910 return XEXP (x, 0) == XEXP (y, 0);
911
912 case SYMBOL_REF:
913 return XSTR (x, 0) == XSTR (y, 0);
914
915 case CONST_INT:
916 case CONST_DOUBLE:
917 /* There's no need to compare the contents of CONST_DOUBLEs or
918 CONST_INTs because pointer equality is a good enough
919 comparison for these nodes. */
920 return 0;
921
922 case ADDRESSOF:
923 return (REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0))
924 && XINT (x, 1) == XINT (y, 1));
925
926 default:
927 break;
928 }
929
930 /* For commutative operations, the RTX match if the operand match in any
931 order. Also handle the simple binary and unary cases without a loop. */
932 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
933 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
934 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
935 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
936 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
937 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
938 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
939 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
940 else if (GET_RTX_CLASS (code) == '1')
941 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
942
943 /* Compare the elements. If any pair of corresponding elements
944 fail to match, return 0 for the whole things.
945
946 Limit cases to types which actually appear in addresses. */
947
948 fmt = GET_RTX_FORMAT (code);
949 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
950 {
951 switch (fmt[i])
952 {
953 case 'i':
954 if (XINT (x, i) != XINT (y, i))
955 return 0;
956 break;
957
958 case 'E':
959 /* Two vectors must have the same length. */
960 if (XVECLEN (x, i) != XVECLEN (y, i))
961 return 0;
962
963 /* And the corresponding elements must match. */
964 for (j = 0; j < XVECLEN (x, i); j++)
965 if (rtx_equal_for_memref_p (XVECEXP (x, i, j),
966 XVECEXP (y, i, j)) == 0)
967 return 0;
968 break;
969
970 case 'e':
971 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
972 return 0;
973 break;
974
975 /* This can happen for an asm which clobbers memory. */
976 case '0':
977 break;
978
979 /* It is believed that rtx's at this level will never
980 contain anything but integers and other rtx's,
981 except for within LABEL_REFs and SYMBOL_REFs. */
982 default:
983 abort ();
984 }
985 }
986 return 1;
987 }
988
989 /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
990 X and return it, or return 0 if none found. */
991
992 static rtx
993 find_symbolic_term (x)
994 rtx x;
995 {
996 register int i;
997 register enum rtx_code code;
998 register const char *fmt;
999
1000 code = GET_CODE (x);
1001 if (code == SYMBOL_REF || code == LABEL_REF)
1002 return x;
1003 if (GET_RTX_CLASS (code) == 'o')
1004 return 0;
1005
1006 fmt = GET_RTX_FORMAT (code);
1007 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1008 {
1009 rtx t;
1010
1011 if (fmt[i] == 'e')
1012 {
1013 t = find_symbolic_term (XEXP (x, i));
1014 if (t != 0)
1015 return t;
1016 }
1017 else if (fmt[i] == 'E')
1018 break;
1019 }
1020 return 0;
1021 }
1022
1023 static rtx
1024 find_base_term (x)
1025 register rtx x;
1026 {
1027 cselib_val *val;
1028 struct elt_loc_list *l;
1029
1030 #if defined (FIND_BASE_TERM)
1031 /* Try machine-dependent ways to find the base term. */
1032 x = FIND_BASE_TERM (x);
1033 #endif
1034
1035 switch (GET_CODE (x))
1036 {
1037 case REG:
1038 return REG_BASE_VALUE (x);
1039
1040 case ZERO_EXTEND:
1041 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
1042 case HIGH:
1043 case PRE_INC:
1044 case PRE_DEC:
1045 case POST_INC:
1046 case POST_DEC:
1047 return find_base_term (XEXP (x, 0));
1048
1049 case VALUE:
1050 val = CSELIB_VAL_PTR (x);
1051 for (l = val->locs; l; l = l->next)
1052 if ((x = find_base_term (l->loc)) != 0)
1053 return x;
1054 return 0;
1055
1056 case CONST:
1057 x = XEXP (x, 0);
1058 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
1059 return 0;
1060 /* fall through */
1061 case LO_SUM:
1062 case PLUS:
1063 case MINUS:
1064 {
1065 rtx tmp1 = XEXP (x, 0);
1066 rtx tmp2 = XEXP (x, 1);
1067
1068 /* This is a litle bit tricky since we have to determine which of
1069 the two operands represents the real base address. Otherwise this
1070 routine may return the index register instead of the base register.
1071
1072 That may cause us to believe no aliasing was possible, when in
1073 fact aliasing is possible.
1074
1075 We use a few simple tests to guess the base register. Additional
1076 tests can certainly be added. For example, if one of the operands
1077 is a shift or multiply, then it must be the index register and the
1078 other operand is the base register. */
1079
1080 if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2))
1081 return find_base_term (tmp2);
1082
1083 /* If either operand is known to be a pointer, then use it
1084 to determine the base term. */
1085 if (REG_P (tmp1) && REG_POINTER (tmp1))
1086 return find_base_term (tmp1);
1087
1088 if (REG_P (tmp2) && REG_POINTER (tmp2))
1089 return find_base_term (tmp2);
1090
1091 /* Neither operand was known to be a pointer. Go ahead and find the
1092 base term for both operands. */
1093 tmp1 = find_base_term (tmp1);
1094 tmp2 = find_base_term (tmp2);
1095
1096 /* If either base term is named object or a special address
1097 (like an argument or stack reference), then use it for the
1098 base term. */
1099 if (tmp1 != 0
1100 && (GET_CODE (tmp1) == SYMBOL_REF
1101 || GET_CODE (tmp1) == LABEL_REF
1102 || (GET_CODE (tmp1) == ADDRESS
1103 && GET_MODE (tmp1) != VOIDmode)))
1104 return tmp1;
1105
1106 if (tmp2 != 0
1107 && (GET_CODE (tmp2) == SYMBOL_REF
1108 || GET_CODE (tmp2) == LABEL_REF
1109 || (GET_CODE (tmp2) == ADDRESS
1110 && GET_MODE (tmp2) != VOIDmode)))
1111 return tmp2;
1112
1113 /* We could not determine which of the two operands was the
1114 base register and which was the index. So we can determine
1115 nothing from the base alias check. */
1116 return 0;
1117 }
1118
1119 case AND:
1120 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
1121 return REG_BASE_VALUE (XEXP (x, 0));
1122 return 0;
1123
1124 case SYMBOL_REF:
1125 case LABEL_REF:
1126 return x;
1127
1128 case ADDRESSOF:
1129 return REG_BASE_VALUE (frame_pointer_rtx);
1130
1131 default:
1132 return 0;
1133 }
1134 }
1135
1136 /* Return 0 if the addresses X and Y are known to point to different
1137 objects, 1 if they might be pointers to the same object. */
1138
1139 static int
1140 base_alias_check (x, y, x_mode, y_mode)
1141 rtx x, y;
1142 enum machine_mode x_mode, y_mode;
1143 {
1144 rtx x_base = find_base_term (x);
1145 rtx y_base = find_base_term (y);
1146
1147 /* If the address itself has no known base see if a known equivalent
1148 value has one. If either address still has no known base, nothing
1149 is known about aliasing. */
1150 if (x_base == 0)
1151 {
1152 rtx x_c;
1153
1154 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
1155 return 1;
1156
1157 x_base = find_base_term (x_c);
1158 if (x_base == 0)
1159 return 1;
1160 }
1161
1162 if (y_base == 0)
1163 {
1164 rtx y_c;
1165 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
1166 return 1;
1167
1168 y_base = find_base_term (y_c);
1169 if (y_base == 0)
1170 return 1;
1171 }
1172
1173 /* If the base addresses are equal nothing is known about aliasing. */
1174 if (rtx_equal_p (x_base, y_base))
1175 return 1;
1176
1177 /* The base addresses of the read and write are different expressions.
1178 If they are both symbols and they are not accessed via AND, there is
1179 no conflict. We can bring knowledge of object alignment into play
1180 here. For example, on alpha, "char a, b;" can alias one another,
1181 though "char a; long b;" cannot. */
1182 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
1183 {
1184 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
1185 return 1;
1186 if (GET_CODE (x) == AND
1187 && (GET_CODE (XEXP (x, 1)) != CONST_INT
1188 || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
1189 return 1;
1190 if (GET_CODE (y) == AND
1191 && (GET_CODE (XEXP (y, 1)) != CONST_INT
1192 || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
1193 return 1;
1194 /* Differing symbols never alias. */
1195 return 0;
1196 }
1197
1198 /* If one address is a stack reference there can be no alias:
1199 stack references using different base registers do not alias,
1200 a stack reference can not alias a parameter, and a stack reference
1201 can not alias a global. */
1202 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
1203 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
1204 return 0;
1205
1206 if (! flag_argument_noalias)
1207 return 1;
1208
1209 if (flag_argument_noalias > 1)
1210 return 0;
1211
1212 /* Weak noalias assertion (arguments are distinct, but may match globals). */
1213 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
1214 }
1215
1216 /* Convert the address X into something we can use. This is done by returning
1217 it unchanged unless it is a value; in the latter case we call cselib to get
1218 a more useful rtx. */
1219
1220 static rtx
1221 get_addr (x)
1222 rtx x;
1223 {
1224 cselib_val *v;
1225 struct elt_loc_list *l;
1226
1227 if (GET_CODE (x) != VALUE)
1228 return x;
1229 v = CSELIB_VAL_PTR (x);
1230 for (l = v->locs; l; l = l->next)
1231 if (CONSTANT_P (l->loc))
1232 return l->loc;
1233 for (l = v->locs; l; l = l->next)
1234 if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM)
1235 return l->loc;
1236 if (v->locs)
1237 return v->locs->loc;
1238 return x;
1239 }
1240
1241 /* Return the address of the (N_REFS + 1)th memory reference to ADDR
1242 where SIZE is the size in bytes of the memory reference. If ADDR
1243 is not modified by the memory reference then ADDR is returned. */
1244
1245 rtx
1246 addr_side_effect_eval (addr, size, n_refs)
1247 rtx addr;
1248 int size;
1249 int n_refs;
1250 {
1251 int offset = 0;
1252
1253 switch (GET_CODE (addr))
1254 {
1255 case PRE_INC:
1256 offset = (n_refs + 1) * size;
1257 break;
1258 case PRE_DEC:
1259 offset = -(n_refs + 1) * size;
1260 break;
1261 case POST_INC:
1262 offset = n_refs * size;
1263 break;
1264 case POST_DEC:
1265 offset = -n_refs * size;
1266 break;
1267
1268 default:
1269 return addr;
1270 }
1271
1272 if (offset)
1273 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
1274 else
1275 addr = XEXP (addr, 0);
1276
1277 return addr;
1278 }
1279
1280 /* Return nonzero if X and Y (memory addresses) could reference the
1281 same location in memory. C is an offset accumulator. When
1282 C is nonzero, we are testing aliases between X and Y + C.
1283 XSIZE is the size in bytes of the X reference,
1284 similarly YSIZE is the size in bytes for Y.
1285
1286 If XSIZE or YSIZE is zero, we do not know the amount of memory being
1287 referenced (the reference was BLKmode), so make the most pessimistic
1288 assumptions.
1289
1290 If XSIZE or YSIZE is negative, we may access memory outside the object
1291 being referenced as a side effect. This can happen when using AND to
1292 align memory references, as is done on the Alpha.
1293
1294 Nice to notice that varying addresses cannot conflict with fp if no
1295 local variables had their addresses taken, but that's too hard now. */
1296
1297 static int
1298 memrefs_conflict_p (xsize, x, ysize, y, c)
1299 register rtx x, y;
1300 int xsize, ysize;
1301 HOST_WIDE_INT c;
1302 {
1303 if (GET_CODE (x) == VALUE)
1304 x = get_addr (x);
1305 if (GET_CODE (y) == VALUE)
1306 y = get_addr (y);
1307 if (GET_CODE (x) == HIGH)
1308 x = XEXP (x, 0);
1309 else if (GET_CODE (x) == LO_SUM)
1310 x = XEXP (x, 1);
1311 else
1312 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
1313 if (GET_CODE (y) == HIGH)
1314 y = XEXP (y, 0);
1315 else if (GET_CODE (y) == LO_SUM)
1316 y = XEXP (y, 1);
1317 else
1318 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
1319
1320 if (rtx_equal_for_memref_p (x, y))
1321 {
1322 if (xsize <= 0 || ysize <= 0)
1323 return 1;
1324 if (c >= 0 && xsize > c)
1325 return 1;
1326 if (c < 0 && ysize+c > 0)
1327 return 1;
1328 return 0;
1329 }
1330
1331 /* This code used to check for conflicts involving stack references and
1332 globals but the base address alias code now handles these cases. */
1333
1334 if (GET_CODE (x) == PLUS)
1335 {
1336 /* The fact that X is canonicalized means that this
1337 PLUS rtx is canonicalized. */
1338 rtx x0 = XEXP (x, 0);
1339 rtx x1 = XEXP (x, 1);
1340
1341 if (GET_CODE (y) == PLUS)
1342 {
1343 /* The fact that Y is canonicalized means that this
1344 PLUS rtx is canonicalized. */
1345 rtx y0 = XEXP (y, 0);
1346 rtx y1 = XEXP (y, 1);
1347
1348 if (rtx_equal_for_memref_p (x1, y1))
1349 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1350 if (rtx_equal_for_memref_p (x0, y0))
1351 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
1352 if (GET_CODE (x1) == CONST_INT)
1353 {
1354 if (GET_CODE (y1) == CONST_INT)
1355 return memrefs_conflict_p (xsize, x0, ysize, y0,
1356 c - INTVAL (x1) + INTVAL (y1));
1357 else
1358 return memrefs_conflict_p (xsize, x0, ysize, y,
1359 c - INTVAL (x1));
1360 }
1361 else if (GET_CODE (y1) == CONST_INT)
1362 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1363
1364 return 1;
1365 }
1366 else if (GET_CODE (x1) == CONST_INT)
1367 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
1368 }
1369 else if (GET_CODE (y) == PLUS)
1370 {
1371 /* The fact that Y is canonicalized means that this
1372 PLUS rtx is canonicalized. */
1373 rtx y0 = XEXP (y, 0);
1374 rtx y1 = XEXP (y, 1);
1375
1376 if (GET_CODE (y1) == CONST_INT)
1377 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1378 else
1379 return 1;
1380 }
1381
1382 if (GET_CODE (x) == GET_CODE (y))
1383 switch (GET_CODE (x))
1384 {
1385 case MULT:
1386 {
1387 /* Handle cases where we expect the second operands to be the
1388 same, and check only whether the first operand would conflict
1389 or not. */
1390 rtx x0, y0;
1391 rtx x1 = canon_rtx (XEXP (x, 1));
1392 rtx y1 = canon_rtx (XEXP (y, 1));
1393 if (! rtx_equal_for_memref_p (x1, y1))
1394 return 1;
1395 x0 = canon_rtx (XEXP (x, 0));
1396 y0 = canon_rtx (XEXP (y, 0));
1397 if (rtx_equal_for_memref_p (x0, y0))
1398 return (xsize == 0 || ysize == 0
1399 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1400
1401 /* Can't properly adjust our sizes. */
1402 if (GET_CODE (x1) != CONST_INT)
1403 return 1;
1404 xsize /= INTVAL (x1);
1405 ysize /= INTVAL (x1);
1406 c /= INTVAL (x1);
1407 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1408 }
1409
1410 case REG:
1411 /* Are these registers known not to be equal? */
1412 if (alias_invariant)
1413 {
1414 unsigned int r_x = REGNO (x), r_y = REGNO (y);
1415 rtx i_x, i_y; /* invariant relationships of X and Y */
1416
1417 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1418 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1419
1420 if (i_x == 0 && i_y == 0)
1421 break;
1422
1423 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1424 ysize, i_y ? i_y : y, c))
1425 return 0;
1426 }
1427 break;
1428
1429 default:
1430 break;
1431 }
1432
1433 /* Treat an access through an AND (e.g. a subword access on an Alpha)
1434 as an access with indeterminate size. Assume that references
1435 besides AND are aligned, so if the size of the other reference is
1436 at least as large as the alignment, assume no other overlap. */
1437 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
1438 {
1439 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
1440 xsize = -1;
1441 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1442 }
1443 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
1444 {
1445 /* ??? If we are indexing far enough into the array/structure, we
1446 may yet be able to determine that we can not overlap. But we
1447 also need to that we are far enough from the end not to overlap
1448 a following reference, so we do nothing with that for now. */
1449 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
1450 ysize = -1;
1451 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
1452 }
1453
1454 if (GET_CODE (x) == ADDRESSOF)
1455 {
1456 if (y == frame_pointer_rtx
1457 || GET_CODE (y) == ADDRESSOF)
1458 return xsize <= 0 || ysize <= 0;
1459 }
1460 if (GET_CODE (y) == ADDRESSOF)
1461 {
1462 if (x == frame_pointer_rtx)
1463 return xsize <= 0 || ysize <= 0;
1464 }
1465
1466 if (CONSTANT_P (x))
1467 {
1468 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1469 {
1470 c += (INTVAL (y) - INTVAL (x));
1471 return (xsize <= 0 || ysize <= 0
1472 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1473 }
1474
1475 if (GET_CODE (x) == CONST)
1476 {
1477 if (GET_CODE (y) == CONST)
1478 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1479 ysize, canon_rtx (XEXP (y, 0)), c);
1480 else
1481 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1482 ysize, y, c);
1483 }
1484 if (GET_CODE (y) == CONST)
1485 return memrefs_conflict_p (xsize, x, ysize,
1486 canon_rtx (XEXP (y, 0)), c);
1487
1488 if (CONSTANT_P (y))
1489 return (xsize <= 0 || ysize <= 0
1490 || (rtx_equal_for_memref_p (x, y)
1491 && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
1492
1493 return 1;
1494 }
1495 return 1;
1496 }
1497
1498 /* Functions to compute memory dependencies.
1499
1500 Since we process the insns in execution order, we can build tables
1501 to keep track of what registers are fixed (and not aliased), what registers
1502 are varying in known ways, and what registers are varying in unknown
1503 ways.
1504
1505 If both memory references are volatile, then there must always be a
1506 dependence between the two references, since their order can not be
1507 changed. A volatile and non-volatile reference can be interchanged
1508 though.
1509
1510 A MEM_IN_STRUCT reference at a non-AND varying address can never
1511 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We
1512 also must allow AND addresses, because they may generate accesses
1513 outside the object being referenced. This is used to generate
1514 aligned addresses from unaligned addresses, for instance, the alpha
1515 storeqi_unaligned pattern. */
1516
1517 /* Read dependence: X is read after read in MEM takes place. There can
1518 only be a dependence here if both reads are volatile. */
1519
1520 int
1521 read_dependence (mem, x)
1522 rtx mem;
1523 rtx x;
1524 {
1525 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1526 }
1527
1528 /* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1529 MEM2 is a reference to a structure at a varying address, or returns
1530 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1531 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1532 to decide whether or not an address may vary; it should return
1533 nonzero whenever variation is possible.
1534 MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */
1535
1536 static rtx
1537 fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p)
1538 rtx mem1, mem2;
1539 rtx mem1_addr, mem2_addr;
1540 int (*varies_p) PARAMS ((rtx));
1541 {
1542 if (! flag_strict_aliasing)
1543 return NULL_RTX;
1544
1545 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
1546 && !varies_p (mem1_addr) && varies_p (mem2_addr))
1547 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1548 varying address. */
1549 return mem1;
1550
1551 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
1552 && varies_p (mem1_addr) && !varies_p (mem2_addr))
1553 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1554 varying address. */
1555 return mem2;
1556
1557 return NULL_RTX;
1558 }
1559
1560 /* Returns nonzero if something about the mode or address format MEM1
1561 indicates that it might well alias *anything*. */
1562
1563 static int
1564 aliases_everything_p (mem)
1565 rtx mem;
1566 {
1567 if (GET_CODE (XEXP (mem, 0)) == AND)
1568 /* If the address is an AND, its very hard to know at what it is
1569 actually pointing. */
1570 return 1;
1571
1572 return 0;
1573 }
1574
1575 /* True dependence: X is read after store in MEM takes place. */
1576
1577 int
1578 true_dependence (mem, mem_mode, x, varies)
1579 rtx mem;
1580 enum machine_mode mem_mode;
1581 rtx x;
1582 int (*varies) PARAMS ((rtx));
1583 {
1584 register rtx x_addr, mem_addr;
1585 rtx base;
1586
1587 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1588 return 1;
1589
1590 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1591 return 0;
1592
1593 /* Unchanging memory can't conflict with non-unchanging memory.
1594 A non-unchanging read can conflict with a non-unchanging write.
1595 An unchanging read can conflict with an unchanging write since
1596 there may be a single store to this address to initialize it.
1597 Note that an unchanging store can conflict with a non-unchanging read
1598 since we have to make conservative assumptions when we have a
1599 record with readonly fields and we are copying the whole thing.
1600 Just fall through to the code below to resolve potential conflicts.
1601 This won't handle all cases optimally, but the possible performance
1602 loss should be negligible. */
1603 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
1604 return 0;
1605
1606 if (mem_mode == VOIDmode)
1607 mem_mode = GET_MODE (mem);
1608
1609 x_addr = get_addr (XEXP (x, 0));
1610 mem_addr = get_addr (XEXP (mem, 0));
1611
1612 base = find_base_term (x_addr);
1613 if (base && (GET_CODE (base) == LABEL_REF
1614 || (GET_CODE (base) == SYMBOL_REF
1615 && CONSTANT_POOL_ADDRESS_P (base))))
1616 return 0;
1617
1618 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1619 return 0;
1620
1621 x_addr = canon_rtx (x_addr);
1622 mem_addr = canon_rtx (mem_addr);
1623
1624 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1625 SIZE_FOR_MODE (x), x_addr, 0))
1626 return 0;
1627
1628 if (aliases_everything_p (x))
1629 return 1;
1630
1631 /* We cannot use aliases_everyting_p to test MEM, since we must look
1632 at MEM_MODE, rather than GET_MODE (MEM). */
1633 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
1634 return 1;
1635
1636 /* In true_dependence we also allow BLKmode to alias anything. Why
1637 don't we do this in anti_dependence and output_dependence? */
1638 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1639 return 1;
1640
1641 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1642 varies);
1643 }
1644
1645 /* Returns non-zero if a write to X might alias a previous read from
1646 (or, if WRITEP is non-zero, a write to) MEM. */
1647
1648 static int
1649 write_dependence_p (mem, x, writep)
1650 rtx mem;
1651 rtx x;
1652 int writep;
1653 {
1654 rtx x_addr, mem_addr;
1655 rtx fixed_scalar;
1656 rtx base;
1657
1658 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1659 return 1;
1660
1661 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1662 return 0;
1663
1664 /* Unchanging memory can't conflict with non-unchanging memory. */
1665 if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem))
1666 return 0;
1667
1668 /* If MEM is an unchanging read, then it can't possibly conflict with
1669 the store to X, because there is at most one store to MEM, and it must
1670 have occurred somewhere before MEM. */
1671 if (! writep && RTX_UNCHANGING_P (mem))
1672 return 0;
1673
1674 x_addr = get_addr (XEXP (x, 0));
1675 mem_addr = get_addr (XEXP (mem, 0));
1676
1677 if (! writep)
1678 {
1679 base = find_base_term (mem_addr);
1680 if (base && (GET_CODE (base) == LABEL_REF
1681 || (GET_CODE (base) == SYMBOL_REF
1682 && CONSTANT_POOL_ADDRESS_P (base))))
1683 return 0;
1684 }
1685
1686 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
1687 GET_MODE (mem)))
1688 return 0;
1689
1690 x_addr = canon_rtx (x_addr);
1691 mem_addr = canon_rtx (mem_addr);
1692
1693 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1694 SIZE_FOR_MODE (x), x_addr, 0))
1695 return 0;
1696
1697 fixed_scalar
1698 = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1699 rtx_addr_varies_p);
1700
1701 return (!(fixed_scalar == mem && !aliases_everything_p (x))
1702 && !(fixed_scalar == x && !aliases_everything_p (mem)));
1703 }
1704
1705 /* Anti dependence: X is written after read in MEM takes place. */
1706
1707 int
1708 anti_dependence (mem, x)
1709 rtx mem;
1710 rtx x;
1711 {
1712 return write_dependence_p (mem, x, /*writep=*/0);
1713 }
1714
1715 /* Output dependence: X is written after store in MEM takes place. */
1716
1717 int
1718 output_dependence (mem, x)
1719 register rtx mem;
1720 register rtx x;
1721 {
1722 return write_dependence_p (mem, x, /*writep=*/1);
1723 }
1724
1725 /* Returns non-zero if X mentions something which is not
1726 local to the function and is not constant. */
1727
1728 static int
1729 nonlocal_mentioned_p (x)
1730 rtx x;
1731 {
1732 rtx base;
1733 register RTX_CODE code;
1734 int regno;
1735
1736 code = GET_CODE (x);
1737
1738 if (GET_RTX_CLASS (code) == 'i')
1739 {
1740 /* Constant functions can be constant if they don't use
1741 scratch memory used to mark function w/o side effects. */
1742 if (code == CALL_INSN && CONST_CALL_P (x))
1743 {
1744 x = CALL_INSN_FUNCTION_USAGE (x);
1745 if (x == 0)
1746 return 0;
1747 }
1748 else
1749 x = PATTERN (x);
1750 code = GET_CODE (x);
1751 }
1752
1753 switch (code)
1754 {
1755 case SUBREG:
1756 if (GET_CODE (SUBREG_REG (x)) == REG)
1757 {
1758 /* Global registers are not local. */
1759 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
1760 && global_regs[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)])
1761 return 1;
1762 return 0;
1763 }
1764 break;
1765
1766 case REG:
1767 regno = REGNO (x);
1768 /* Global registers are not local. */
1769 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1770 return 1;
1771 return 0;
1772
1773 case SCRATCH:
1774 case PC:
1775 case CC0:
1776 case CONST_INT:
1777 case CONST_DOUBLE:
1778 case CONST:
1779 case LABEL_REF:
1780 return 0;
1781
1782 case SYMBOL_REF:
1783 /* Constants in the function's constants pool are constant. */
1784 if (CONSTANT_POOL_ADDRESS_P (x))
1785 return 0;
1786 return 1;
1787
1788 case CALL:
1789 /* Non-constant calls and recursion are not local. */
1790 return 1;
1791
1792 case MEM:
1793 /* Be overly conservative and consider any volatile memory
1794 reference as not local. */
1795 if (MEM_VOLATILE_P (x))
1796 return 1;
1797 base = find_base_term (XEXP (x, 0));
1798 if (base)
1799 {
1800 /* A Pmode ADDRESS could be a reference via the structure value
1801 address or static chain. Such memory references are nonlocal.
1802
1803 Thus, we have to examine the contents of the ADDRESS to find
1804 out if this is a local reference or not. */
1805 if (GET_CODE (base) == ADDRESS
1806 && GET_MODE (base) == Pmode
1807 && (XEXP (base, 0) == stack_pointer_rtx
1808 || XEXP (base, 0) == arg_pointer_rtx
1809 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1810 || XEXP (base, 0) == hard_frame_pointer_rtx
1811 #endif
1812 || XEXP (base, 0) == frame_pointer_rtx))
1813 return 0;
1814 /* Constants in the function's constant pool are constant. */
1815 if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
1816 return 0;
1817 }
1818 return 1;
1819
1820 case UNSPEC_VOLATILE:
1821 case ASM_INPUT:
1822 return 1;
1823
1824 case ASM_OPERANDS:
1825 if (MEM_VOLATILE_P (x))
1826 return 1;
1827
1828 /* FALLTHROUGH */
1829
1830 default:
1831 break;
1832 }
1833
1834 /* Recursively scan the operands of this expression. */
1835
1836 {
1837 register const char *fmt = GET_RTX_FORMAT (code);
1838 register int i;
1839
1840 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1841 {
1842 if (fmt[i] == 'e' && XEXP (x, i))
1843 {
1844 if (nonlocal_mentioned_p (XEXP (x, i)))
1845 return 1;
1846 }
1847 else if (fmt[i] == 'E')
1848 {
1849 register int j;
1850 for (j = 0; j < XVECLEN (x, i); j++)
1851 if (nonlocal_mentioned_p (XVECEXP (x, i, j)))
1852 return 1;
1853 }
1854 }
1855 }
1856
1857 return 0;
1858 }
1859
1860 /* Return non-zero if a loop (natural or otherwise) is present.
1861 Inspired by Depth_First_Search_PP described in:
1862
1863 Advanced Compiler Design and Implementation
1864 Steven Muchnick
1865 Morgan Kaufmann, 1997
1866
1867 and heavily borrowed from flow_depth_first_order_compute. */
1868
1869 static int
1870 loop_p ()
1871 {
1872 edge *stack;
1873 int *pre;
1874 int *post;
1875 int sp;
1876 int prenum = 1;
1877 int postnum = 1;
1878 sbitmap visited;
1879
1880 /* Allocate the preorder and postorder number arrays. */
1881 pre = (int *) xcalloc (n_basic_blocks, sizeof (int));
1882 post = (int *) xcalloc (n_basic_blocks, sizeof (int));
1883
1884 /* Allocate stack for back-tracking up CFG. */
1885 stack = (edge *) xmalloc ((n_basic_blocks + 1) * sizeof (edge));
1886 sp = 0;
1887
1888 /* Allocate bitmap to track nodes that have been visited. */
1889 visited = sbitmap_alloc (n_basic_blocks);
1890
1891 /* None of the nodes in the CFG have been visited yet. */
1892 sbitmap_zero (visited);
1893
1894 /* Push the first edge on to the stack. */
1895 stack[sp++] = ENTRY_BLOCK_PTR->succ;
1896
1897 while (sp)
1898 {
1899 edge e;
1900 basic_block src;
1901 basic_block dest;
1902
1903 /* Look at the edge on the top of the stack. */
1904 e = stack[sp - 1];
1905 src = e->src;
1906 dest = e->dest;
1907
1908 /* Check if the edge destination has been visited yet. */
1909 if (dest != EXIT_BLOCK_PTR && ! TEST_BIT (visited, dest->index))
1910 {
1911 /* Mark that we have visited the destination. */
1912 SET_BIT (visited, dest->index);
1913
1914 pre[dest->index] = prenum++;
1915
1916 if (dest->succ)
1917 {
1918 /* Since the DEST node has been visited for the first
1919 time, check its successors. */
1920 stack[sp++] = dest->succ;
1921 }
1922 else
1923 post[dest->index] = postnum++;
1924 }
1925 else
1926 {
1927 if (dest != EXIT_BLOCK_PTR
1928 && pre[src->index] >= pre[dest->index]
1929 && post[dest->index] == 0)
1930 break;
1931
1932 if (! e->succ_next && src != ENTRY_BLOCK_PTR)
1933 post[src->index] = postnum++;
1934
1935 if (e->succ_next)
1936 stack[sp - 1] = e->succ_next;
1937 else
1938 sp--;
1939 }
1940 }
1941
1942 free (pre);
1943 free (post);
1944 free (stack);
1945 sbitmap_free (visited);
1946
1947 return sp;
1948 }
1949
1950 /* Mark the function if it is constant. */
1951
1952 void
1953 mark_constant_function ()
1954 {
1955 rtx insn;
1956 int nonlocal_mentioned;
1957
1958 if (TREE_PUBLIC (current_function_decl)
1959 || TREE_READONLY (current_function_decl)
1960 || DECL_IS_PURE (current_function_decl)
1961 || TREE_THIS_VOLATILE (current_function_decl)
1962 || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode)
1963 return;
1964
1965 /* A loop might not return which counts as a side effect. */
1966 if (loop_p ())
1967 return;
1968
1969 nonlocal_mentioned = 0;
1970
1971 init_alias_analysis ();
1972
1973 /* Determine if this is a constant function. */
1974
1975 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1976 if (INSN_P (insn) && nonlocal_mentioned_p (insn))
1977 {
1978 nonlocal_mentioned = 1;
1979 break;
1980 }
1981
1982 end_alias_analysis ();
1983
1984 /* Mark the function. */
1985
1986 if (! nonlocal_mentioned)
1987 TREE_READONLY (current_function_decl) = 1;
1988 }
1989
1990
1991 static HARD_REG_SET argument_registers;
1992
1993 void
1994 init_alias_once ()
1995 {
1996 register int i;
1997
1998 #ifndef OUTGOING_REGNO
1999 #define OUTGOING_REGNO(N) N
2000 #endif
2001 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2002 /* Check whether this register can hold an incoming pointer
2003 argument. FUNCTION_ARG_REGNO_P tests outgoing register
2004 numbers, so translate if necessary due to register windows. */
2005 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
2006 && HARD_REGNO_MODE_OK (i, Pmode))
2007 SET_HARD_REG_BIT (argument_registers, i);
2008
2009 alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
2010 }
2011
2012 /* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
2013 array. */
2014
2015 void
2016 init_alias_analysis ()
2017 {
2018 int maxreg = max_reg_num ();
2019 int changed, pass;
2020 register int i;
2021 register unsigned int ui;
2022 register rtx insn;
2023
2024 reg_known_value_size = maxreg;
2025
2026 reg_known_value
2027 = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx))
2028 - FIRST_PSEUDO_REGISTER;
2029 reg_known_equiv_p
2030 = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char))
2031 - FIRST_PSEUDO_REGISTER;
2032
2033 /* Overallocate reg_base_value to allow some growth during loop
2034 optimization. Loop unrolling can create a large number of
2035 registers. */
2036 reg_base_value_size = maxreg * 2;
2037 reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx));
2038 ggc_add_rtx_root (reg_base_value, reg_base_value_size);
2039
2040 new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx));
2041 reg_seen = (char *) xmalloc (reg_base_value_size);
2042 if (! reload_completed && flag_unroll_loops)
2043 {
2044 /* ??? Why are we realloc'ing if we're just going to zero it? */
2045 alias_invariant = (rtx *)xrealloc (alias_invariant,
2046 reg_base_value_size * sizeof (rtx));
2047 memset ((char *)alias_invariant, 0, reg_base_value_size * sizeof (rtx));
2048 }
2049
2050
2051 /* The basic idea is that each pass through this loop will use the
2052 "constant" information from the previous pass to propagate alias
2053 information through another level of assignments.
2054
2055 This could get expensive if the assignment chains are long. Maybe
2056 we should throttle the number of iterations, possibly based on
2057 the optimization level or flag_expensive_optimizations.
2058
2059 We could propagate more information in the first pass by making use
2060 of REG_N_SETS to determine immediately that the alias information
2061 for a pseudo is "constant".
2062
2063 A program with an uninitialized variable can cause an infinite loop
2064 here. Instead of doing a full dataflow analysis to detect such problems
2065 we just cap the number of iterations for the loop.
2066
2067 The state of the arrays for the set chain in question does not matter
2068 since the program has undefined behavior. */
2069
2070 pass = 0;
2071 do
2072 {
2073 /* Assume nothing will change this iteration of the loop. */
2074 changed = 0;
2075
2076 /* We want to assign the same IDs each iteration of this loop, so
2077 start counting from zero each iteration of the loop. */
2078 unique_id = 0;
2079
2080 /* We're at the start of the funtion each iteration through the
2081 loop, so we're copying arguments. */
2082 copying_arguments = 1;
2083
2084 /* Wipe the potential alias information clean for this pass. */
2085 memset ((char *) new_reg_base_value, 0, reg_base_value_size * sizeof (rtx));
2086
2087 /* Wipe the reg_seen array clean. */
2088 memset ((char *) reg_seen, 0, reg_base_value_size);
2089
2090 /* Mark all hard registers which may contain an address.
2091 The stack, frame and argument pointers may contain an address.
2092 An argument register which can hold a Pmode value may contain
2093 an address even if it is not in BASE_REGS.
2094
2095 The address expression is VOIDmode for an argument and
2096 Pmode for other registers. */
2097
2098 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2099 if (TEST_HARD_REG_BIT (argument_registers, i))
2100 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
2101 gen_rtx_REG (Pmode, i));
2102
2103 new_reg_base_value[STACK_POINTER_REGNUM]
2104 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
2105 new_reg_base_value[ARG_POINTER_REGNUM]
2106 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
2107 new_reg_base_value[FRAME_POINTER_REGNUM]
2108 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2109 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2110 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
2111 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2112 #endif
2113
2114 /* Walk the insns adding values to the new_reg_base_value array. */
2115 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2116 {
2117 if (INSN_P (insn))
2118 {
2119 rtx note, set;
2120
2121 #if defined (HAVE_prologue) || defined (HAVE_epilogue)
2122 /* The prologue/epilouge insns are not threaded onto the
2123 insn chain until after reload has completed. Thus,
2124 there is no sense wasting time checking if INSN is in
2125 the prologue/epilogue until after reload has completed. */
2126 if (reload_completed
2127 && prologue_epilogue_contains (insn))
2128 continue;
2129 #endif
2130
2131 /* If this insn has a noalias note, process it, Otherwise,
2132 scan for sets. A simple set will have no side effects
2133 which could change the base value of any other register. */
2134
2135 if (GET_CODE (PATTERN (insn)) == SET
2136 && REG_NOTES (insn) != 0
2137 && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
2138 record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
2139 else
2140 note_stores (PATTERN (insn), record_set, NULL);
2141
2142 set = single_set (insn);
2143
2144 if (set != 0
2145 && GET_CODE (SET_DEST (set)) == REG
2146 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
2147 && REG_NOTES (insn) != 0
2148 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
2149 && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
2150 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
2151 && GET_CODE (XEXP (note, 0)) != EXPR_LIST
2152 && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0)))
2153 {
2154 int regno = REGNO (SET_DEST (set));
2155 reg_known_value[regno] = XEXP (note, 0);
2156 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
2157 }
2158 }
2159 else if (GET_CODE (insn) == NOTE
2160 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2161 copying_arguments = 0;
2162 }
2163
2164 /* Now propagate values from new_reg_base_value to reg_base_value. */
2165 for (ui = 0; ui < reg_base_value_size; ui++)
2166 {
2167 if (new_reg_base_value[ui]
2168 && new_reg_base_value[ui] != reg_base_value[ui]
2169 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
2170 {
2171 reg_base_value[ui] = new_reg_base_value[ui];
2172 changed = 1;
2173 }
2174 }
2175 }
2176 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
2177
2178 /* Fill in the remaining entries. */
2179 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
2180 if (reg_known_value[i] == 0)
2181 reg_known_value[i] = regno_reg_rtx[i];
2182
2183 /* Simplify the reg_base_value array so that no register refers to
2184 another register, except to special registers indirectly through
2185 ADDRESS expressions.
2186
2187 In theory this loop can take as long as O(registers^2), but unless
2188 there are very long dependency chains it will run in close to linear
2189 time.
2190
2191 This loop may not be needed any longer now that the main loop does
2192 a better job at propagating alias information. */
2193 pass = 0;
2194 do
2195 {
2196 changed = 0;
2197 pass++;
2198 for (ui = 0; ui < reg_base_value_size; ui++)
2199 {
2200 rtx base = reg_base_value[ui];
2201 if (base && GET_CODE (base) == REG)
2202 {
2203 unsigned int base_regno = REGNO (base);
2204 if (base_regno == ui) /* register set from itself */
2205 reg_base_value[ui] = 0;
2206 else
2207 reg_base_value[ui] = reg_base_value[base_regno];
2208 changed = 1;
2209 }
2210 }
2211 }
2212 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
2213
2214 /* Clean up. */
2215 free (new_reg_base_value);
2216 new_reg_base_value = 0;
2217 free (reg_seen);
2218 reg_seen = 0;
2219 }
2220
2221 void
2222 end_alias_analysis ()
2223 {
2224 free (reg_known_value + FIRST_PSEUDO_REGISTER);
2225 reg_known_value = 0;
2226 reg_known_value_size = 0;
2227 free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER);
2228 reg_known_equiv_p = 0;
2229 if (reg_base_value)
2230 {
2231 ggc_del_root (reg_base_value);
2232 free (reg_base_value);
2233 reg_base_value = 0;
2234 }
2235 reg_base_value_size = 0;
2236 if (alias_invariant)
2237 {
2238 free (alias_invariant);
2239 alias_invariant = 0;
2240 }
2241 }