re PR c++/18075 (#pragma implementation broken in presence of #pragma ident)
[gcc.git] / gcc / caller-save.c
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "insn-config.h"
28 #include "flags.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
38
39 #ifndef MAX_MOVE_MAX
40 #define MAX_MOVE_MAX MOVE_MAX
41 #endif
42
43 #ifndef MIN_UNITS_PER_WORD
44 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
45 #endif
46
47 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
48
49 /* Modes for each hard register that we can save. The smallest mode is wide
50 enough to save the entire contents of the register. When saving the
51 register because it is live we first try to save in multi-register modes.
52 If that is not possible the save is done one register at a time. */
53
54 static enum machine_mode
55 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
56
57 /* For each hard register, a place on the stack where it can be saved,
58 if needed. */
59
60 static rtx
61 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
62
63 /* We will only make a register eligible for caller-save if it can be
64 saved in its widest mode with a simple SET insn as long as the memory
65 address is valid. We record the INSN_CODE is those insns here since
66 when we emit them, the addresses might not be valid, so they might not
67 be recognized. */
68
69 static int
70 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
71 static int
72 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
73
74 /* Set of hard regs currently residing in save area (during insn scan). */
75
76 static HARD_REG_SET hard_regs_saved;
77
78 /* Number of registers currently in hard_regs_saved. */
79
80 static int n_regs_saved;
81
82 /* Computed by mark_referenced_regs, all regs referenced in a given
83 insn. */
84 static HARD_REG_SET referenced_regs;
85
86 /* Computed in mark_set_regs, holds all registers set by the current
87 instruction. */
88 static HARD_REG_SET this_insn_sets;
89
90
91 static void mark_set_regs (rtx, rtx, void *);
92 static void mark_referenced_regs (rtx);
93 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
94 enum machine_mode *);
95 static int insert_restore (struct insn_chain *, int, int, int,
96 enum machine_mode *);
97 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
98 rtx);
99 static void add_stored_regs (rtx, rtx, void *);
100 \f
101 /* Initialize for caller-save.
102
103 Look at all the hard registers that are used by a call and for which
104 regclass.c has not already excluded from being used across a call.
105
106 Ensure that we can find a mode to save the register and that there is a
107 simple insn to save and restore the register. This latter check avoids
108 problems that would occur if we tried to save the MQ register of some
109 machines directly into memory. */
110
111 void
112 init_caller_save (void)
113 {
114 rtx addr_reg;
115 int offset;
116 rtx address;
117 int i, j;
118 enum machine_mode mode;
119 rtx savepat, restpat;
120 rtx test_reg, test_mem;
121 rtx saveinsn, restinsn;
122
123 /* First find all the registers that we need to deal with and all
124 the modes that they can have. If we can't find a mode to use,
125 we can't have the register live over calls. */
126
127 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
128 {
129 if (call_used_regs[i] && ! call_fixed_regs[i])
130 {
131 for (j = 1; j <= MOVE_MAX_WORDS; j++)
132 {
133 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
134 VOIDmode);
135 if (regno_save_mode[i][j] == VOIDmode && j == 1)
136 {
137 call_fixed_regs[i] = 1;
138 SET_HARD_REG_BIT (call_fixed_reg_set, i);
139 }
140 }
141 }
142 else
143 regno_save_mode[i][1] = VOIDmode;
144 }
145
146 /* The following code tries to approximate the conditions under which
147 we can easily save and restore a register without scratch registers or
148 other complexities. It will usually work, except under conditions where
149 the validity of an insn operand is dependent on the address offset.
150 No such cases are currently known.
151
152 We first find a typical offset from some BASE_REG_CLASS register.
153 This address is chosen by finding the first register in the class
154 and by finding the smallest power of two that is a valid offset from
155 that register in every mode we will use to save registers. */
156
157 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
158 if (TEST_HARD_REG_BIT
159 (reg_class_contents
160 [(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
161 break;
162
163 gcc_assert (i < FIRST_PSEUDO_REGISTER);
164
165 addr_reg = gen_rtx_REG (Pmode, i);
166
167 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
168 {
169 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
170
171 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
172 if (regno_save_mode[i][1] != VOIDmode
173 && ! strict_memory_address_p (regno_save_mode[i][1], address))
174 break;
175
176 if (i == FIRST_PSEUDO_REGISTER)
177 break;
178 }
179
180 /* If we didn't find a valid address, we must use register indirect. */
181 if (offset == 0)
182 address = addr_reg;
183
184 /* Next we try to form an insn to save and restore the register. We
185 see if such an insn is recognized and meets its constraints.
186
187 To avoid lots of unnecessary RTL allocation, we construct all the RTL
188 once, then modify the memory and register operands in-place. */
189
190 test_reg = gen_rtx_REG (VOIDmode, 0);
191 test_mem = gen_rtx_MEM (VOIDmode, address);
192 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
193 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
194
195 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
196 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
197
198 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
199 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
200 if (HARD_REGNO_MODE_OK (i, mode))
201 {
202 int ok;
203
204 /* Update the register number and modes of the register
205 and memory operand. */
206 REGNO (test_reg) = i;
207 PUT_MODE (test_reg, mode);
208 PUT_MODE (test_mem, mode);
209
210 /* Force re-recognition of the modified insns. */
211 INSN_CODE (saveinsn) = -1;
212 INSN_CODE (restinsn) = -1;
213
214 reg_save_code[i][mode] = recog_memoized (saveinsn);
215 reg_restore_code[i][mode] = recog_memoized (restinsn);
216
217 /* Now extract both insns and see if we can meet their
218 constraints. */
219 ok = (reg_save_code[i][mode] != -1
220 && reg_restore_code[i][mode] != -1);
221 if (ok)
222 {
223 extract_insn (saveinsn);
224 ok = constrain_operands (1);
225 extract_insn (restinsn);
226 ok &= constrain_operands (1);
227 }
228
229 if (! ok)
230 {
231 reg_save_code[i][mode] = -1;
232 reg_restore_code[i][mode] = -1;
233 }
234 }
235 else
236 {
237 reg_save_code[i][mode] = -1;
238 reg_restore_code[i][mode] = -1;
239 }
240
241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
242 for (j = 1; j <= MOVE_MAX_WORDS; j++)
243 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
244 {
245 regno_save_mode[i][j] = VOIDmode;
246 if (j == 1)
247 {
248 call_fixed_regs[i] = 1;
249 SET_HARD_REG_BIT (call_fixed_reg_set, i);
250 }
251 }
252 }
253 \f
254 /* Initialize save areas by showing that we haven't allocated any yet. */
255
256 void
257 init_save_areas (void)
258 {
259 int i, j;
260
261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
262 for (j = 1; j <= MOVE_MAX_WORDS; j++)
263 regno_save_mem[i][j] = 0;
264 }
265
266 /* Allocate save areas for any hard registers that might need saving.
267 We take a conservative approach here and look for call-clobbered hard
268 registers that are assigned to pseudos that cross calls. This may
269 overestimate slightly (especially if some of these registers are later
270 used as spill registers), but it should not be significant.
271
272 Future work:
273
274 In the fallback case we should iterate backwards across all possible
275 modes for the save, choosing the largest available one instead of
276 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
277
278 We do not try to use "move multiple" instructions that exist
279 on some machines (such as the 68k moveml). It could be a win to try
280 and use them when possible. The hard part is doing it in a way that is
281 machine independent since they might be saving non-consecutive
282 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
283
284 void
285 setup_save_areas (void)
286 {
287 int i, j, k;
288 unsigned int r;
289 HARD_REG_SET hard_regs_used;
290
291 /* Allocate space in the save area for the largest multi-register
292 pseudos first, then work backwards to single register
293 pseudos. */
294
295 /* Find and record all call-used hard-registers in this function. */
296 CLEAR_HARD_REG_SET (hard_regs_used);
297 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
298 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
299 {
300 unsigned int regno = reg_renumber[i];
301 unsigned int endregno
302 = regno + hard_regno_nregs[regno][GET_MODE (regno_reg_rtx[i])];
303
304 for (r = regno; r < endregno; r++)
305 if (call_used_regs[r])
306 SET_HARD_REG_BIT (hard_regs_used, r);
307 }
308
309 /* Now run through all the call-used hard-registers and allocate
310 space for them in the caller-save area. Try to allocate space
311 in a manner which allows multi-register saves/restores to be done. */
312
313 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
314 for (j = MOVE_MAX_WORDS; j > 0; j--)
315 {
316 int do_save = 1;
317
318 /* If no mode exists for this size, try another. Also break out
319 if we have already saved this hard register. */
320 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
321 continue;
322
323 /* See if any register in this group has been saved. */
324 for (k = 0; k < j; k++)
325 if (regno_save_mem[i + k][1])
326 {
327 do_save = 0;
328 break;
329 }
330 if (! do_save)
331 continue;
332
333 for (k = 0; k < j; k++)
334 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
335 {
336 do_save = 0;
337 break;
338 }
339 if (! do_save)
340 continue;
341
342 /* We have found an acceptable mode to store in. */
343 regno_save_mem[i][j]
344 = assign_stack_local (regno_save_mode[i][j],
345 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
346
347 /* Setup single word save area just in case... */
348 for (k = 0; k < j; k++)
349 /* This should not depend on WORDS_BIG_ENDIAN.
350 The order of words in regs is the same as in memory. */
351 regno_save_mem[i + k][1]
352 = adjust_address_nv (regno_save_mem[i][j],
353 regno_save_mode[i + k][1],
354 k * UNITS_PER_WORD);
355 }
356
357 /* Now loop again and set the alias set of any save areas we made to
358 the alias set used to represent frame objects. */
359 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
360 for (j = MOVE_MAX_WORDS; j > 0; j--)
361 if (regno_save_mem[i][j] != 0)
362 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
363 }
364 \f
365 /* Find the places where hard regs are live across calls and save them. */
366
367 void
368 save_call_clobbered_regs (void)
369 {
370 struct insn_chain *chain, *next;
371 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
372
373 CLEAR_HARD_REG_SET (hard_regs_saved);
374 n_regs_saved = 0;
375
376 for (chain = reload_insn_chain; chain != 0; chain = next)
377 {
378 rtx insn = chain->insn;
379 enum rtx_code code = GET_CODE (insn);
380
381 next = chain->next;
382
383 gcc_assert (!chain->is_caller_save_insn);
384
385 if (INSN_P (insn))
386 {
387 /* If some registers have been saved, see if INSN references
388 any of them. We must restore them before the insn if so. */
389
390 if (n_regs_saved)
391 {
392 int regno;
393
394 if (code == JUMP_INSN)
395 /* Restore all registers if this is a JUMP_INSN. */
396 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
397 else
398 {
399 CLEAR_HARD_REG_SET (referenced_regs);
400 mark_referenced_regs (PATTERN (insn));
401 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
402 }
403
404 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
405 if (TEST_HARD_REG_BIT (referenced_regs, regno))
406 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
407 }
408
409 if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
410 {
411 int regno;
412 HARD_REG_SET hard_regs_to_save;
413 reg_set_iterator rsi;
414
415 /* Use the register life information in CHAIN to compute which
416 regs are live during the call. */
417 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
418 &chain->live_throughout);
419 /* Save hard registers always in the widest mode available. */
420 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
421 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
422 save_mode [regno] = regno_save_mode [regno][1];
423 else
424 save_mode [regno] = VOIDmode;
425
426 /* Look through all live pseudos, mark their hard registers
427 and choose proper mode for saving. */
428 EXECUTE_IF_SET_IN_REG_SET
429 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
430 {
431 int r = reg_renumber[regno];
432 int nregs;
433 enum machine_mode mode;
434
435 gcc_assert (r >= 0);
436 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
437 mode = HARD_REGNO_CALLER_SAVE_MODE
438 (r, nregs, PSEUDO_REGNO_MODE (regno));
439 if (GET_MODE_BITSIZE (mode)
440 > GET_MODE_BITSIZE (save_mode[r]))
441 save_mode[r] = mode;
442 while (nregs-- > 0)
443 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
444 }
445
446 /* Record all registers set in this call insn. These don't need
447 to be saved. N.B. the call insn might set a subreg of a
448 multi-hard-reg pseudo; then the pseudo is considered live
449 during the call, but the subreg that is set isn't. */
450 CLEAR_HARD_REG_SET (this_insn_sets);
451 note_stores (PATTERN (insn), mark_set_regs, NULL);
452
453 /* Compute which hard regs must be saved before this call. */
454 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
455 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
456 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
457 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
458
459 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
460 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
461 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
462
463 /* Must recompute n_regs_saved. */
464 n_regs_saved = 0;
465 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
466 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
467 n_regs_saved++;
468 }
469 }
470
471 if (chain->next == 0 || chain->next->block > chain->block)
472 {
473 int regno;
474 /* At the end of the basic block, we must restore any registers that
475 remain saved. If the last insn in the block is a JUMP_INSN, put
476 the restore before the insn, otherwise, put it after the insn. */
477
478 if (n_regs_saved)
479 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
480 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
481 regno += insert_restore (chain, JUMP_P (insn),
482 regno, MOVE_MAX_WORDS, save_mode);
483 }
484 }
485 }
486
487 /* Here from note_stores when an insn stores a value in a register.
488 Set the proper bit or bits in this_insn_sets. All pseudos that have
489 been assigned hard regs have had their register number changed already,
490 so we can ignore pseudos. */
491 static void
492 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED,
493 void *data ATTRIBUTE_UNUSED)
494 {
495 int regno, endregno, i;
496 enum machine_mode mode = GET_MODE (reg);
497
498 if (GET_CODE (reg) == SUBREG)
499 {
500 rtx inner = SUBREG_REG (reg);
501 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
502 return;
503
504 regno = subreg_hard_regno (reg, 1);
505 }
506 else if (REG_P (reg)
507 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
508 regno = REGNO (reg);
509 else
510 return;
511
512 endregno = regno + hard_regno_nregs[regno][mode];
513
514 for (i = regno; i < endregno; i++)
515 SET_HARD_REG_BIT (this_insn_sets, i);
516 }
517
518 /* Here from note_stores when an insn stores a value in a register.
519 Set the proper bit or bits in the passed regset. All pseudos that have
520 been assigned hard regs have had their register number changed already,
521 so we can ignore pseudos. */
522 static void
523 add_stored_regs (rtx reg, rtx setter, void *data)
524 {
525 int regno, endregno, i;
526 enum machine_mode mode = GET_MODE (reg);
527 int offset = 0;
528
529 if (GET_CODE (setter) == CLOBBER)
530 return;
531
532 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
533 {
534 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
535 GET_MODE (SUBREG_REG (reg)),
536 SUBREG_BYTE (reg),
537 GET_MODE (reg));
538 reg = SUBREG_REG (reg);
539 }
540
541 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
542 return;
543
544 regno = REGNO (reg) + offset;
545 endregno = regno + hard_regno_nregs[regno][mode];
546
547 for (i = regno; i < endregno; i++)
548 SET_REGNO_REG_SET ((regset) data, i);
549 }
550
551 /* Walk X and record all referenced registers in REFERENCED_REGS. */
552 static void
553 mark_referenced_regs (rtx x)
554 {
555 enum rtx_code code = GET_CODE (x);
556 const char *fmt;
557 int i, j;
558
559 if (code == SET)
560 mark_referenced_regs (SET_SRC (x));
561 if (code == SET || code == CLOBBER)
562 {
563 x = SET_DEST (x);
564 code = GET_CODE (x);
565 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
566 || code == PC || code == CC0
567 || (code == SUBREG && REG_P (SUBREG_REG (x))
568 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
569 /* If we're setting only part of a multi-word register,
570 we shall mark it as referenced, because the words
571 that are not being set should be restored. */
572 && ((GET_MODE_SIZE (GET_MODE (x))
573 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
574 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
575 <= UNITS_PER_WORD))))
576 return;
577 }
578 if (code == MEM || code == SUBREG)
579 {
580 x = XEXP (x, 0);
581 code = GET_CODE (x);
582 }
583
584 if (code == REG)
585 {
586 int regno = REGNO (x);
587 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
588 : reg_renumber[regno]);
589
590 if (hardregno >= 0)
591 {
592 int nregs = hard_regno_nregs[hardregno][GET_MODE (x)];
593 while (nregs-- > 0)
594 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
595 }
596 /* If this is a pseudo that did not get a hard register, scan its
597 memory location, since it might involve the use of another
598 register, which might be saved. */
599 else if (reg_equiv_mem[regno] != 0)
600 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
601 else if (reg_equiv_address[regno] != 0)
602 mark_referenced_regs (reg_equiv_address[regno]);
603 return;
604 }
605
606 fmt = GET_RTX_FORMAT (code);
607 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
608 {
609 if (fmt[i] == 'e')
610 mark_referenced_regs (XEXP (x, i));
611 else if (fmt[i] == 'E')
612 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
613 mark_referenced_regs (XVECEXP (x, i, j));
614 }
615 }
616 \f
617 /* Insert a sequence of insns to restore. Place these insns in front of
618 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
619 the maximum number of registers which should be restored during this call.
620 It should never be less than 1 since we only work with entire registers.
621
622 Note that we have verified in init_caller_save that we can do this
623 with a simple SET, so use it. Set INSN_CODE to what we save there
624 since the address might not be valid so the insn might not be recognized.
625 These insns will be reloaded and have register elimination done by
626 find_reload, so we need not worry about that here.
627
628 Return the extra number of registers saved. */
629
630 static int
631 insert_restore (struct insn_chain *chain, int before_p, int regno,
632 int maxrestore, enum machine_mode *save_mode)
633 {
634 int i, k;
635 rtx pat = NULL_RTX;
636 int code;
637 unsigned int numregs = 0;
638 struct insn_chain *new;
639 rtx mem;
640
641 /* A common failure mode if register status is not correct in the RTL
642 is for this routine to be called with a REGNO we didn't expect to
643 save. That will cause us to write an insn with a (nil) SET_DEST
644 or SET_SRC. Instead of doing so and causing a crash later, check
645 for this common case and abort here instead. This will remove one
646 step in debugging such problems. */
647 gcc_assert (regno_save_mem[regno][1]);
648
649 /* Get the pattern to emit and update our status.
650
651 See if we can restore `maxrestore' registers at once. Work
652 backwards to the single register case. */
653 for (i = maxrestore; i > 0; i--)
654 {
655 int j;
656 int ok = 1;
657
658 if (regno_save_mem[regno][i] == 0)
659 continue;
660
661 for (j = 0; j < i; j++)
662 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
663 {
664 ok = 0;
665 break;
666 }
667 /* Must do this one restore at a time. */
668 if (! ok)
669 continue;
670
671 numregs = i;
672 break;
673 }
674
675 mem = regno_save_mem [regno][numregs];
676 if (save_mode [regno] != VOIDmode
677 && save_mode [regno] != GET_MODE (mem)
678 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
679 mem = adjust_address (mem, save_mode[regno], 0);
680 else
681 mem = copy_rtx (mem);
682 pat = gen_rtx_SET (VOIDmode,
683 gen_rtx_REG (GET_MODE (mem),
684 regno), mem);
685 code = reg_restore_code[regno][GET_MODE (mem)];
686 new = insert_one_insn (chain, before_p, code, pat);
687
688 /* Clear status for all registers we restored. */
689 for (k = 0; k < i; k++)
690 {
691 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
692 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
693 n_regs_saved--;
694 }
695
696 /* Tell our callers how many extra registers we saved/restored. */
697 return numregs - 1;
698 }
699
700 /* Like insert_restore above, but save registers instead. */
701
702 static int
703 insert_save (struct insn_chain *chain, int before_p, int regno,
704 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
705 {
706 int i;
707 unsigned int k;
708 rtx pat = NULL_RTX;
709 int code;
710 unsigned int numregs = 0;
711 struct insn_chain *new;
712 rtx mem;
713
714 /* A common failure mode if register status is not correct in the RTL
715 is for this routine to be called with a REGNO we didn't expect to
716 save. That will cause us to write an insn with a (nil) SET_DEST
717 or SET_SRC. Instead of doing so and causing a crash later, check
718 for this common case and abort here instead. This will remove one
719 step in debugging such problems. */
720 gcc_assert (regno_save_mem[regno][1]);
721
722 /* Get the pattern to emit and update our status.
723
724 See if we can save several registers with a single instruction.
725 Work backwards to the single register case. */
726 for (i = MOVE_MAX_WORDS; i > 0; i--)
727 {
728 int j;
729 int ok = 1;
730 if (regno_save_mem[regno][i] == 0)
731 continue;
732
733 for (j = 0; j < i; j++)
734 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
735 {
736 ok = 0;
737 break;
738 }
739 /* Must do this one save at a time. */
740 if (! ok)
741 continue;
742
743 numregs = i;
744 break;
745 }
746
747 mem = regno_save_mem [regno][numregs];
748 if (save_mode [regno] != VOIDmode
749 && save_mode [regno] != GET_MODE (mem)
750 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
751 mem = adjust_address (mem, save_mode[regno], 0);
752 else
753 mem = copy_rtx (mem);
754 pat = gen_rtx_SET (VOIDmode, mem,
755 gen_rtx_REG (GET_MODE (mem),
756 regno));
757 code = reg_save_code[regno][GET_MODE (mem)];
758 new = insert_one_insn (chain, before_p, code, pat);
759
760 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
761 for (k = 0; k < numregs; k++)
762 {
763 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
764 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
765 n_regs_saved++;
766 }
767
768 /* Tell our callers how many extra registers we saved/restored. */
769 return numregs - 1;
770 }
771
772 /* Emit a new caller-save insn and set the code. */
773 static struct insn_chain *
774 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
775 {
776 rtx insn = chain->insn;
777 struct insn_chain *new;
778
779 #ifdef HAVE_cc0
780 /* If INSN references CC0, put our insns in front of the insn that sets
781 CC0. This is always safe, since the only way we could be passed an
782 insn that references CC0 is for a restore, and doing a restore earlier
783 isn't a problem. We do, however, assume here that CALL_INSNs don't
784 reference CC0. Guard against non-INSN's like CODE_LABEL. */
785
786 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
787 && before_p
788 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
789 chain = chain->prev, insn = chain->insn;
790 #endif
791
792 new = new_insn_chain ();
793 if (before_p)
794 {
795 rtx link;
796
797 new->prev = chain->prev;
798 if (new->prev != 0)
799 new->prev->next = new;
800 else
801 reload_insn_chain = new;
802
803 chain->prev = new;
804 new->next = chain;
805 new->insn = emit_insn_before (pat, insn);
806 /* ??? It would be nice if we could exclude the already / still saved
807 registers from the live sets. */
808 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
809 /* Registers that die in CHAIN->INSN still live in the new insn. */
810 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
811 {
812 if (REG_NOTE_KIND (link) == REG_DEAD)
813 {
814 rtx reg = XEXP (link, 0);
815 int regno, i;
816
817 gcc_assert (REG_P (reg));
818 regno = REGNO (reg);
819 if (regno >= FIRST_PSEUDO_REGISTER)
820 regno = reg_renumber[regno];
821 if (regno < 0)
822 continue;
823 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
824 i >= 0; i--)
825 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
826 }
827 }
828 CLEAR_REG_SET (&new->dead_or_set);
829 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
830 BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
831 }
832 else
833 {
834 new->next = chain->next;
835 if (new->next != 0)
836 new->next->prev = new;
837 chain->next = new;
838 new->prev = chain;
839 new->insn = emit_insn_after (pat, insn);
840 /* ??? It would be nice if we could exclude the already / still saved
841 registers from the live sets, and observe REG_UNUSED notes. */
842 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
843 /* Registers that are set in CHAIN->INSN live in the new insn.
844 (Unless there is a REG_UNUSED note for them, but we don't
845 look for them here.) */
846 note_stores (PATTERN (chain->insn), add_stored_regs,
847 &new->live_throughout);
848 CLEAR_REG_SET (&new->dead_or_set);
849 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
850 BB_END (BASIC_BLOCK (chain->block)) = new->insn;
851 }
852 new->block = chain->block;
853 new->is_caller_save_insn = 1;
854
855 INSN_CODE (new->insn) = code;
856 return new;
857 }