sinfo.h, [...]: Removed...
[gcc.git] / gcc / caller-save.c
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "insn-config.h"
28 #include "flags.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
38
39 #ifndef MAX_MOVE_MAX
40 #define MAX_MOVE_MAX MOVE_MAX
41 #endif
42
43 #ifndef MIN_UNITS_PER_WORD
44 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
45 #endif
46
47 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
48
49 /* Modes for each hard register that we can save. The smallest mode is wide
50 enough to save the entire contents of the register. When saving the
51 register because it is live we first try to save in multi-register modes.
52 If that is not possible the save is done one register at a time. */
53
54 static enum machine_mode
55 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
56
57 /* For each hard register, a place on the stack where it can be saved,
58 if needed. */
59
60 static rtx
61 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
62
63 /* We will only make a register eligible for caller-save if it can be
64 saved in its widest mode with a simple SET insn as long as the memory
65 address is valid. We record the INSN_CODE is those insns here since
66 when we emit them, the addresses might not be valid, so they might not
67 be recognized. */
68
69 static int
70 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
71 static int
72 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
73
74 /* Set of hard regs currently residing in save area (during insn scan). */
75
76 static HARD_REG_SET hard_regs_saved;
77
78 /* Number of registers currently in hard_regs_saved. */
79
80 static int n_regs_saved;
81
82 /* Computed by mark_referenced_regs, all regs referenced in a given
83 insn. */
84 static HARD_REG_SET referenced_regs;
85
86 /* Computed in mark_set_regs, holds all registers set by the current
87 instruction. */
88 static HARD_REG_SET this_insn_sets;
89
90
91 static void mark_set_regs (rtx, rtx, void *);
92 static void mark_referenced_regs (rtx);
93 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
94 enum machine_mode *);
95 static int insert_restore (struct insn_chain *, int, int, int,
96 enum machine_mode *);
97 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
98 rtx);
99 static void add_stored_regs (rtx, rtx, void *);
100 \f
101 /* Initialize for caller-save.
102
103 Look at all the hard registers that are used by a call and for which
104 regclass.c has not already excluded from being used across a call.
105
106 Ensure that we can find a mode to save the register and that there is a
107 simple insn to save and restore the register. This latter check avoids
108 problems that would occur if we tried to save the MQ register of some
109 machines directly into memory. */
110
111 void
112 init_caller_save (void)
113 {
114 rtx addr_reg;
115 int offset;
116 rtx address;
117 int i, j;
118 enum machine_mode mode;
119 rtx savepat, restpat;
120 rtx test_reg, test_mem;
121 rtx saveinsn, restinsn;
122
123 /* First find all the registers that we need to deal with and all
124 the modes that they can have. If we can't find a mode to use,
125 we can't have the register live over calls. */
126
127 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
128 {
129 if (call_used_regs[i] && ! call_fixed_regs[i])
130 {
131 for (j = 1; j <= MOVE_MAX_WORDS; j++)
132 {
133 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
134 VOIDmode);
135 if (regno_save_mode[i][j] == VOIDmode && j == 1)
136 {
137 call_fixed_regs[i] = 1;
138 SET_HARD_REG_BIT (call_fixed_reg_set, i);
139 }
140 }
141 }
142 else
143 regno_save_mode[i][1] = VOIDmode;
144 }
145
146 /* The following code tries to approximate the conditions under which
147 we can easily save and restore a register without scratch registers or
148 other complexities. It will usually work, except under conditions where
149 the validity of an insn operand is dependent on the address offset.
150 No such cases are currently known.
151
152 We first find a typical offset from some BASE_REG_CLASS register.
153 This address is chosen by finding the first register in the class
154 and by finding the smallest power of two that is a valid offset from
155 that register in every mode we will use to save registers. */
156
157 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
158 if (TEST_HARD_REG_BIT
159 (reg_class_contents
160 [(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
161 break;
162
163 if (i == FIRST_PSEUDO_REGISTER)
164 abort ();
165
166 addr_reg = gen_rtx_REG (Pmode, i);
167
168 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
169 {
170 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
171
172 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
173 if (regno_save_mode[i][1] != VOIDmode
174 && ! strict_memory_address_p (regno_save_mode[i][1], address))
175 break;
176
177 if (i == FIRST_PSEUDO_REGISTER)
178 break;
179 }
180
181 /* If we didn't find a valid address, we must use register indirect. */
182 if (offset == 0)
183 address = addr_reg;
184
185 /* Next we try to form an insn to save and restore the register. We
186 see if such an insn is recognized and meets its constraints.
187
188 To avoid lots of unnecessary RTL allocation, we construct all the RTL
189 once, then modify the memory and register operands in-place. */
190
191 test_reg = gen_rtx_REG (VOIDmode, 0);
192 test_mem = gen_rtx_MEM (VOIDmode, address);
193 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
194 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
195
196 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
197 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
198
199 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
200 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
201 if (HARD_REGNO_MODE_OK (i, mode))
202 {
203 int ok;
204
205 /* Update the register number and modes of the register
206 and memory operand. */
207 REGNO (test_reg) = i;
208 PUT_MODE (test_reg, mode);
209 PUT_MODE (test_mem, mode);
210
211 /* Force re-recognition of the modified insns. */
212 INSN_CODE (saveinsn) = -1;
213 INSN_CODE (restinsn) = -1;
214
215 reg_save_code[i][mode] = recog_memoized (saveinsn);
216 reg_restore_code[i][mode] = recog_memoized (restinsn);
217
218 /* Now extract both insns and see if we can meet their
219 constraints. */
220 ok = (reg_save_code[i][mode] != -1
221 && reg_restore_code[i][mode] != -1);
222 if (ok)
223 {
224 extract_insn (saveinsn);
225 ok = constrain_operands (1);
226 extract_insn (restinsn);
227 ok &= constrain_operands (1);
228 }
229
230 if (! ok)
231 {
232 reg_save_code[i][mode] = -1;
233 reg_restore_code[i][mode] = -1;
234 }
235 }
236 else
237 {
238 reg_save_code[i][mode] = -1;
239 reg_restore_code[i][mode] = -1;
240 }
241
242 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
243 for (j = 1; j <= MOVE_MAX_WORDS; j++)
244 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
245 {
246 regno_save_mode[i][j] = VOIDmode;
247 if (j == 1)
248 {
249 call_fixed_regs[i] = 1;
250 SET_HARD_REG_BIT (call_fixed_reg_set, i);
251 }
252 }
253 }
254 \f
255 /* Initialize save areas by showing that we haven't allocated any yet. */
256
257 void
258 init_save_areas (void)
259 {
260 int i, j;
261
262 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
263 for (j = 1; j <= MOVE_MAX_WORDS; j++)
264 regno_save_mem[i][j] = 0;
265 }
266
267 /* Allocate save areas for any hard registers that might need saving.
268 We take a conservative approach here and look for call-clobbered hard
269 registers that are assigned to pseudos that cross calls. This may
270 overestimate slightly (especially if some of these registers are later
271 used as spill registers), but it should not be significant.
272
273 Future work:
274
275 In the fallback case we should iterate backwards across all possible
276 modes for the save, choosing the largest available one instead of
277 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
278
279 We do not try to use "move multiple" instructions that exist
280 on some machines (such as the 68k moveml). It could be a win to try
281 and use them when possible. The hard part is doing it in a way that is
282 machine independent since they might be saving non-consecutive
283 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
284
285 void
286 setup_save_areas (void)
287 {
288 int i, j, k;
289 unsigned int r;
290 HARD_REG_SET hard_regs_used;
291
292 /* Allocate space in the save area for the largest multi-register
293 pseudos first, then work backwards to single register
294 pseudos. */
295
296 /* Find and record all call-used hard-registers in this function. */
297 CLEAR_HARD_REG_SET (hard_regs_used);
298 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
299 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
300 {
301 unsigned int regno = reg_renumber[i];
302 unsigned int endregno
303 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
304
305 for (r = regno; r < endregno; r++)
306 if (call_used_regs[r])
307 SET_HARD_REG_BIT (hard_regs_used, r);
308 }
309
310 /* Now run through all the call-used hard-registers and allocate
311 space for them in the caller-save area. Try to allocate space
312 in a manner which allows multi-register saves/restores to be done. */
313
314 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
315 for (j = MOVE_MAX_WORDS; j > 0; j--)
316 {
317 int do_save = 1;
318
319 /* If no mode exists for this size, try another. Also break out
320 if we have already saved this hard register. */
321 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
322 continue;
323
324 /* See if any register in this group has been saved. */
325 for (k = 0; k < j; k++)
326 if (regno_save_mem[i + k][1])
327 {
328 do_save = 0;
329 break;
330 }
331 if (! do_save)
332 continue;
333
334 for (k = 0; k < j; k++)
335 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
336 {
337 do_save = 0;
338 break;
339 }
340 if (! do_save)
341 continue;
342
343 /* We have found an acceptable mode to store in. */
344 regno_save_mem[i][j]
345 = assign_stack_local (regno_save_mode[i][j],
346 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
347
348 /* Setup single word save area just in case... */
349 for (k = 0; k < j; k++)
350 /* This should not depend on WORDS_BIG_ENDIAN.
351 The order of words in regs is the same as in memory. */
352 regno_save_mem[i + k][1]
353 = adjust_address_nv (regno_save_mem[i][j],
354 regno_save_mode[i + k][1],
355 k * UNITS_PER_WORD);
356 }
357
358 /* Now loop again and set the alias set of any save areas we made to
359 the alias set used to represent frame objects. */
360 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
361 for (j = MOVE_MAX_WORDS; j > 0; j--)
362 if (regno_save_mem[i][j] != 0)
363 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
364 }
365 \f
366 /* Find the places where hard regs are live across calls and save them. */
367
368 void
369 save_call_clobbered_regs (void)
370 {
371 struct insn_chain *chain, *next;
372 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
373
374 CLEAR_HARD_REG_SET (hard_regs_saved);
375 n_regs_saved = 0;
376
377 for (chain = reload_insn_chain; chain != 0; chain = next)
378 {
379 rtx insn = chain->insn;
380 enum rtx_code code = GET_CODE (insn);
381
382 next = chain->next;
383
384 if (chain->is_caller_save_insn)
385 abort ();
386
387 if (GET_RTX_CLASS (code) == 'i')
388 {
389 /* If some registers have been saved, see if INSN references
390 any of them. We must restore them before the insn if so. */
391
392 if (n_regs_saved)
393 {
394 int regno;
395
396 if (code == JUMP_INSN)
397 /* Restore all registers if this is a JUMP_INSN. */
398 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
399 else
400 {
401 CLEAR_HARD_REG_SET (referenced_regs);
402 mark_referenced_regs (PATTERN (insn));
403 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
404 }
405
406 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
407 if (TEST_HARD_REG_BIT (referenced_regs, regno))
408 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
409 }
410
411 if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
412 {
413 int regno;
414 HARD_REG_SET hard_regs_to_save;
415
416 /* Use the register life information in CHAIN to compute which
417 regs are live during the call. */
418 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
419 &chain->live_throughout);
420 /* Save hard registers always in the widest mode available. */
421 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
422 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
423 save_mode [regno] = regno_save_mode [regno][1];
424 else
425 save_mode [regno] = VOIDmode;
426
427 /* Look through all live pseudos, mark their hard registers
428 and choose proper mode for saving. */
429 EXECUTE_IF_SET_IN_REG_SET
430 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno,
431 {
432 int r = reg_renumber[regno];
433 int nregs;
434
435 if (r >= 0)
436 {
437 enum machine_mode mode;
438
439 nregs = HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (regno));
440 mode = HARD_REGNO_CALLER_SAVE_MODE
441 (r, nregs, PSEUDO_REGNO_MODE (regno));
442 if (GET_MODE_BITSIZE (mode)
443 > GET_MODE_BITSIZE (save_mode[r]))
444 save_mode[r] = mode;
445 while (nregs-- > 0)
446 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
447 }
448 else
449 abort ();
450 });
451
452 /* Record all registers set in this call insn. These don't need
453 to be saved. N.B. the call insn might set a subreg of a
454 multi-hard-reg pseudo; then the pseudo is considered live
455 during the call, but the subreg that is set isn't. */
456 CLEAR_HARD_REG_SET (this_insn_sets);
457 note_stores (PATTERN (insn), mark_set_regs, NULL);
458
459 /* Compute which hard regs must be saved before this call. */
460 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
461 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
462 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
463 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
464
465 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
466 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
467 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
468
469 /* Must recompute n_regs_saved. */
470 n_regs_saved = 0;
471 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
472 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
473 n_regs_saved++;
474 }
475 }
476
477 if (chain->next == 0 || chain->next->block > chain->block)
478 {
479 int regno;
480 /* At the end of the basic block, we must restore any registers that
481 remain saved. If the last insn in the block is a JUMP_INSN, put
482 the restore before the insn, otherwise, put it after the insn. */
483
484 if (n_regs_saved)
485 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
486 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
487 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
488 regno, MOVE_MAX_WORDS, save_mode);
489 }
490 }
491 }
492
493 /* Here from note_stores when an insn stores a value in a register.
494 Set the proper bit or bits in this_insn_sets. All pseudos that have
495 been assigned hard regs have had their register number changed already,
496 so we can ignore pseudos. */
497 static void
498 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED,
499 void *data ATTRIBUTE_UNUSED)
500 {
501 int regno, endregno, i;
502 enum machine_mode mode = GET_MODE (reg);
503
504 if (GET_CODE (reg) == SUBREG)
505 {
506 rtx inner = SUBREG_REG (reg);
507 if (GET_CODE (inner) != REG || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
508 return;
509
510 regno = subreg_hard_regno (reg, 1);
511 }
512 else if (GET_CODE (reg) == REG
513 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
514 regno = REGNO (reg);
515 else
516 return;
517
518 endregno = regno + HARD_REGNO_NREGS (regno, mode);
519
520 for (i = regno; i < endregno; i++)
521 SET_HARD_REG_BIT (this_insn_sets, i);
522 }
523
524 /* Here from note_stores when an insn stores a value in a register.
525 Set the proper bit or bits in the passed regset. All pseudos that have
526 been assigned hard regs have had their register number changed already,
527 so we can ignore pseudos. */
528 static void
529 add_stored_regs (rtx reg, rtx setter, void *data)
530 {
531 int regno, endregno, i;
532 enum machine_mode mode = GET_MODE (reg);
533 int offset = 0;
534
535 if (GET_CODE (setter) == CLOBBER)
536 return;
537
538 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
539 {
540 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
541 GET_MODE (SUBREG_REG (reg)),
542 SUBREG_BYTE (reg),
543 GET_MODE (reg));
544 reg = SUBREG_REG (reg);
545 }
546
547 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
548 return;
549
550 regno = REGNO (reg) + offset;
551 endregno = regno + HARD_REGNO_NREGS (regno, mode);
552
553 for (i = regno; i < endregno; i++)
554 SET_REGNO_REG_SET ((regset) data, i);
555 }
556
557 /* Walk X and record all referenced registers in REFERENCED_REGS. */
558 static void
559 mark_referenced_regs (rtx x)
560 {
561 enum rtx_code code = GET_CODE (x);
562 const char *fmt;
563 int i, j;
564
565 if (code == SET)
566 mark_referenced_regs (SET_SRC (x));
567 if (code == SET || code == CLOBBER)
568 {
569 x = SET_DEST (x);
570 code = GET_CODE (x);
571 if (code == REG || code == PC || code == CC0
572 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
573 /* If we're setting only part of a multi-word register,
574 we shall mark it as referenced, because the words
575 that are not being set should be restored. */
576 && ((GET_MODE_SIZE (GET_MODE (x))
577 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
578 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
579 <= UNITS_PER_WORD))))
580 return;
581 }
582 if (code == MEM || code == SUBREG)
583 {
584 x = XEXP (x, 0);
585 code = GET_CODE (x);
586 }
587
588 if (code == REG)
589 {
590 int regno = REGNO (x);
591 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
592 : reg_renumber[regno]);
593
594 if (hardregno >= 0)
595 {
596 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
597 while (nregs-- > 0)
598 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
599 }
600 /* If this is a pseudo that did not get a hard register, scan its
601 memory location, since it might involve the use of another
602 register, which might be saved. */
603 else if (reg_equiv_mem[regno] != 0)
604 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
605 else if (reg_equiv_address[regno] != 0)
606 mark_referenced_regs (reg_equiv_address[regno]);
607 return;
608 }
609
610 fmt = GET_RTX_FORMAT (code);
611 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
612 {
613 if (fmt[i] == 'e')
614 mark_referenced_regs (XEXP (x, i));
615 else if (fmt[i] == 'E')
616 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
617 mark_referenced_regs (XVECEXP (x, i, j));
618 }
619 }
620 \f
621 /* Insert a sequence of insns to restore. Place these insns in front of
622 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
623 the maximum number of registers which should be restored during this call.
624 It should never be less than 1 since we only work with entire registers.
625
626 Note that we have verified in init_caller_save that we can do this
627 with a simple SET, so use it. Set INSN_CODE to what we save there
628 since the address might not be valid so the insn might not be recognized.
629 These insns will be reloaded and have register elimination done by
630 find_reload, so we need not worry about that here.
631
632 Return the extra number of registers saved. */
633
634 static int
635 insert_restore (struct insn_chain *chain, int before_p, int regno,
636 int maxrestore, enum machine_mode *save_mode)
637 {
638 int i, k;
639 rtx pat = NULL_RTX;
640 int code;
641 unsigned int numregs = 0;
642 struct insn_chain *new;
643 rtx mem;
644
645 /* A common failure mode if register status is not correct in the RTL
646 is for this routine to be called with a REGNO we didn't expect to
647 save. That will cause us to write an insn with a (nil) SET_DEST
648 or SET_SRC. Instead of doing so and causing a crash later, check
649 for this common case and abort here instead. This will remove one
650 step in debugging such problems. */
651
652 if (regno_save_mem[regno][1] == 0)
653 abort ();
654
655 /* Get the pattern to emit and update our status.
656
657 See if we can restore `maxrestore' registers at once. Work
658 backwards to the single register case. */
659 for (i = maxrestore; i > 0; i--)
660 {
661 int j;
662 int ok = 1;
663
664 if (regno_save_mem[regno][i] == 0)
665 continue;
666
667 for (j = 0; j < i; j++)
668 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
669 {
670 ok = 0;
671 break;
672 }
673 /* Must do this one restore at a time. */
674 if (! ok)
675 continue;
676
677 numregs = i;
678 break;
679 }
680
681 mem = regno_save_mem [regno][numregs];
682 if (save_mode [regno] != VOIDmode
683 && save_mode [regno] != GET_MODE (mem)
684 && numregs == (unsigned int) HARD_REGNO_NREGS (regno, save_mode [regno]))
685 mem = adjust_address (mem, save_mode[regno], 0);
686 pat = gen_rtx_SET (VOIDmode,
687 gen_rtx_REG (GET_MODE (mem),
688 regno), mem);
689 code = reg_restore_code[regno][GET_MODE (mem)];
690 new = insert_one_insn (chain, before_p, code, pat);
691
692 /* Clear status for all registers we restored. */
693 for (k = 0; k < i; k++)
694 {
695 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
696 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
697 n_regs_saved--;
698 }
699
700 /* Tell our callers how many extra registers we saved/restored */
701 return numregs - 1;
702 }
703
704 /* Like insert_restore above, but save registers instead. */
705
706 static int
707 insert_save (struct insn_chain *chain, int before_p, int regno,
708 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
709 {
710 int i;
711 unsigned int k;
712 rtx pat = NULL_RTX;
713 int code;
714 unsigned int numregs = 0;
715 struct insn_chain *new;
716 rtx mem;
717
718 /* A common failure mode if register status is not correct in the RTL
719 is for this routine to be called with a REGNO we didn't expect to
720 save. That will cause us to write an insn with a (nil) SET_DEST
721 or SET_SRC. Instead of doing so and causing a crash later, check
722 for this common case and abort here instead. This will remove one
723 step in debugging such problems. */
724
725 if (regno_save_mem[regno][1] == 0)
726 abort ();
727
728 /* Get the pattern to emit and update our status.
729
730 See if we can save several registers with a single instruction.
731 Work backwards to the single register case. */
732 for (i = MOVE_MAX_WORDS; i > 0; i--)
733 {
734 int j;
735 int ok = 1;
736 if (regno_save_mem[regno][i] == 0)
737 continue;
738
739 for (j = 0; j < i; j++)
740 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
741 {
742 ok = 0;
743 break;
744 }
745 /* Must do this one save at a time. */
746 if (! ok)
747 continue;
748
749 numregs = i;
750 break;
751 }
752
753 mem = regno_save_mem [regno][numregs];
754 if (save_mode [regno] != VOIDmode
755 && save_mode [regno] != GET_MODE (mem)
756 && numregs == (unsigned int) HARD_REGNO_NREGS (regno, save_mode [regno]))
757 mem = adjust_address (mem, save_mode[regno], 0);
758 pat = gen_rtx_SET (VOIDmode, mem,
759 gen_rtx_REG (GET_MODE (mem),
760 regno));
761 code = reg_save_code[regno][GET_MODE (mem)];
762 new = insert_one_insn (chain, before_p, code, pat);
763
764 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
765 for (k = 0; k < numregs; k++)
766 {
767 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
768 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
769 n_regs_saved++;
770 }
771
772 /* Tell our callers how many extra registers we saved/restored */
773 return numregs - 1;
774 }
775
776 /* Emit a new caller-save insn and set the code. */
777 static struct insn_chain *
778 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
779 {
780 rtx insn = chain->insn;
781 struct insn_chain *new;
782
783 #ifdef HAVE_cc0
784 /* If INSN references CC0, put our insns in front of the insn that sets
785 CC0. This is always safe, since the only way we could be passed an
786 insn that references CC0 is for a restore, and doing a restore earlier
787 isn't a problem. We do, however, assume here that CALL_INSNs don't
788 reference CC0. Guard against non-INSN's like CODE_LABEL. */
789
790 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
791 && before_p
792 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
793 chain = chain->prev, insn = chain->insn;
794 #endif
795
796 new = new_insn_chain ();
797 if (before_p)
798 {
799 rtx link;
800
801 new->prev = chain->prev;
802 if (new->prev != 0)
803 new->prev->next = new;
804 else
805 reload_insn_chain = new;
806
807 chain->prev = new;
808 new->next = chain;
809 new->insn = emit_insn_before (pat, insn);
810 /* ??? It would be nice if we could exclude the already / still saved
811 registers from the live sets. */
812 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
813 /* Registers that die in CHAIN->INSN still live in the new insn. */
814 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
815 {
816 if (REG_NOTE_KIND (link) == REG_DEAD)
817 {
818 rtx reg = XEXP (link, 0);
819 int regno, i;
820
821 if (GET_CODE (reg) != REG)
822 abort ();
823
824 regno = REGNO (reg);
825 if (regno >= FIRST_PSEUDO_REGISTER)
826 regno = reg_renumber[regno];
827 if (regno < 0)
828 continue;
829 for (i = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1;
830 i >= 0; i--)
831 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
832 }
833 }
834 CLEAR_REG_SET (&new->dead_or_set);
835 if (chain->insn == BLOCK_HEAD (chain->block))
836 BLOCK_HEAD (chain->block) = new->insn;
837 }
838 else
839 {
840 new->next = chain->next;
841 if (new->next != 0)
842 new->next->prev = new;
843 chain->next = new;
844 new->prev = chain;
845 new->insn = emit_insn_after (pat, insn);
846 /* ??? It would be nice if we could exclude the already / still saved
847 registers from the live sets, and observe REG_UNUSED notes. */
848 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
849 /* Registers that are set in CHAIN->INSN live in the new insn.
850 (Unless there is a REG_UNUSED note for them, but we don't
851 look for them here.) */
852 note_stores (PATTERN (chain->insn), add_stored_regs,
853 &new->live_throughout);
854 CLEAR_REG_SET (&new->dead_or_set);
855 if (chain->insn == BLOCK_END (chain->block))
856 BLOCK_END (chain->block) = new->insn;
857 }
858 new->block = chain->block;
859 new->is_caller_save_insn = 1;
860
861 INSN_CODE (new->insn) = code;
862 return new;
863 }