1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "insn-config.h"
30 #include "hard-reg-set.h"
32 #include "basic-block.h"
37 #include "diagnostic-core.h"
39 #include "addresses.h"
43 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
45 #define regno_save_mode \
46 (this_target_reload->x_regno_save_mode)
47 #define cached_reg_save_code \
48 (this_target_reload->x_cached_reg_save_code)
49 #define cached_reg_restore_code \
50 (this_target_reload->x_cached_reg_restore_code)
52 /* For each hard register, a place on the stack where it can be saved,
56 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
58 /* The number of elements in the subsequent array. */
59 static int save_slots_num
;
61 /* Allocated slots so far. */
62 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
64 /* Set of hard regs currently residing in save area (during insn scan). */
66 static HARD_REG_SET hard_regs_saved
;
68 /* Number of registers currently in hard_regs_saved. */
70 static int n_regs_saved
;
72 /* Computed by mark_referenced_regs, all regs referenced in a given
74 static HARD_REG_SET referenced_regs
;
77 typedef void refmarker_fn (rtx
*loc
, enum machine_mode mode
, int hardregno
,
80 static int reg_save_code (int, enum machine_mode
);
81 static int reg_restore_code (int, enum machine_mode
);
83 struct saved_hard_reg
;
84 static void initiate_saved_hard_regs (void);
85 static struct saved_hard_reg
*new_saved_hard_reg (int, int);
86 static void finish_saved_hard_regs (void);
87 static int saved_hard_reg_compare_func (const void *, const void *);
89 static void mark_set_regs (rtx
, const_rtx
, void *);
90 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
91 static refmarker_fn mark_reg_as_referenced
;
92 static refmarker_fn replace_reg_with_saved_mem
;
93 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
95 static int insert_restore (struct insn_chain
*, int, int, int,
97 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
99 static void add_stored_regs (rtx
, const_rtx
, void *);
103 static GTY(()) rtx savepat
;
104 static GTY(()) rtx restpat
;
105 static GTY(()) rtx test_reg
;
106 static GTY(()) rtx test_mem
;
107 static GTY(()) rtx saveinsn
;
108 static GTY(()) rtx restinsn
;
110 /* Return the INSN_CODE used to save register REG in mode MODE. */
112 reg_save_code (int reg
, enum machine_mode mode
)
115 if (cached_reg_save_code
[reg
][mode
])
116 return cached_reg_save_code
[reg
][mode
];
117 if (!HARD_REGNO_MODE_OK (reg
, mode
))
119 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
120 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
121 below silences a warning. */
122 gcc_assert (reg
< FIRST_PSEUDO_REGISTER
);
123 cached_reg_save_code
[reg
][mode
] = -1;
124 cached_reg_restore_code
[reg
][mode
] = -1;
128 /* Update the register number and modes of the register
129 and memory operand. */
130 SET_REGNO_RAW (test_reg
, reg
);
131 PUT_MODE (test_reg
, mode
);
132 PUT_MODE (test_mem
, mode
);
134 /* Force re-recognition of the modified insns. */
135 INSN_CODE (saveinsn
) = -1;
136 INSN_CODE (restinsn
) = -1;
138 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
139 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
141 /* Now extract both insns and see if we can meet their
143 ok
= (cached_reg_save_code
[reg
][mode
] != -1
144 && cached_reg_restore_code
[reg
][mode
] != -1);
147 extract_insn (saveinsn
);
148 ok
= constrain_operands (1);
149 extract_insn (restinsn
);
150 ok
&= constrain_operands (1);
155 cached_reg_save_code
[reg
][mode
] = -1;
156 cached_reg_restore_code
[reg
][mode
] = -1;
158 gcc_assert (cached_reg_save_code
[reg
][mode
]);
159 return cached_reg_save_code
[reg
][mode
];
162 /* Return the INSN_CODE used to restore register REG in mode MODE. */
164 reg_restore_code (int reg
, enum machine_mode mode
)
166 if (cached_reg_restore_code
[reg
][mode
])
167 return cached_reg_restore_code
[reg
][mode
];
168 /* Populate our cache. */
169 reg_save_code (reg
, mode
);
170 return cached_reg_restore_code
[reg
][mode
];
173 /* Initialize for caller-save.
175 Look at all the hard registers that are used by a call and for which
176 reginfo.c has not already excluded from being used across a call.
178 Ensure that we can find a mode to save the register and that there is a
179 simple insn to save and restore the register. This latter check avoids
180 problems that would occur if we tried to save the MQ register of some
181 machines directly into memory. */
184 init_caller_save (void)
191 if (caller_save_initialized_p
)
194 caller_save_initialized_p
= true;
196 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
197 /* First find all the registers that we need to deal with and all
198 the modes that they can have. If we can't find a mode to use,
199 we can't have the register live over calls. */
201 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
203 if (call_used_regs
[i
]
204 && !TEST_HARD_REG_BIT (call_fixed_reg_set
, i
))
206 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
208 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
210 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
212 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
217 regno_save_mode
[i
][1] = VOIDmode
;
220 /* The following code tries to approximate the conditions under which
221 we can easily save and restore a register without scratch registers or
222 other complexities. It will usually work, except under conditions where
223 the validity of an insn operand is dependent on the address offset.
224 No such cases are currently known.
226 We first find a typical offset from some BASE_REG_CLASS register.
227 This address is chosen by finding the first register in the class
228 and by finding the smallest power of two that is a valid offset from
229 that register in every mode we will use to save registers. */
231 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
232 if (TEST_HARD_REG_BIT
234 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
237 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
239 addr_reg
= gen_rtx_REG (Pmode
, i
);
241 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
243 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
245 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
246 if (regno_save_mode
[i
][1] != VOIDmode
247 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
250 if (i
== FIRST_PSEUDO_REGISTER
)
254 /* If we didn't find a valid address, we must use register indirect. */
258 /* Next we try to form an insn to save and restore the register. We
259 see if such an insn is recognized and meets its constraints.
261 To avoid lots of unnecessary RTL allocation, we construct all the RTL
262 once, then modify the memory and register operands in-place. */
264 test_reg
= gen_rtx_REG (VOIDmode
, 0);
265 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
266 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
267 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
269 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, savepat
, 0, -1, 0);
270 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, restpat
, 0, -1, 0);
272 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
273 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
274 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
276 regno_save_mode
[i
][j
] = VOIDmode
;
279 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
280 if (call_used_regs
[i
])
281 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
288 /* Initialize save areas by showing that we haven't allocated any yet. */
291 init_save_areas (void)
295 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
296 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
297 regno_save_mem
[i
][j
] = 0;
302 /* The structure represents a hard register which should be saved
303 through the call. It is used when the integrated register
304 allocator (IRA) is used and sharing save slots is on. */
305 struct saved_hard_reg
307 /* Order number starting with 0. */
309 /* The hard regno. */
311 /* Execution frequency of all calls through which given hard
312 register should be saved. */
314 /* Stack slot reserved to save the hard register through calls. */
316 /* True if it is first hard register in the chain of hard registers
317 sharing the same stack slot. */
319 /* Order number of the next hard register structure with the same
320 slot in the chain. -1 represents end of the chain. */
324 /* Map: hard register number to the corresponding structure. */
325 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
327 /* The number of all structures representing hard registers should be
328 saved, in order words, the number of used elements in the following
330 static int saved_regs_num
;
332 /* Pointers to all the structures. Index is the order number of the
333 corresponding structure. */
334 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
336 /* First called function for work with saved hard registers. */
338 initiate_saved_hard_regs (void)
343 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
344 hard_reg_map
[i
] = NULL
;
347 /* Allocate and return new saved hard register with given REGNO and
349 static struct saved_hard_reg
*
350 new_saved_hard_reg (int regno
, int call_freq
)
352 struct saved_hard_reg
*saved_reg
;
355 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
356 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
357 saved_reg
->num
= saved_regs_num
++;
358 saved_reg
->hard_regno
= regno
;
359 saved_reg
->call_freq
= call_freq
;
360 saved_reg
->first_p
= FALSE
;
361 saved_reg
->next
= -1;
365 /* Free memory allocated for the saved hard registers. */
367 finish_saved_hard_regs (void)
371 for (i
= 0; i
< saved_regs_num
; i
++)
372 free (all_saved_regs
[i
]);
375 /* The function is used to sort the saved hard register structures
376 according their frequency. */
378 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
380 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
381 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
383 if (flag_omit_frame_pointer
)
385 if (p1
->call_freq
- p2
->call_freq
!= 0)
386 return p1
->call_freq
- p2
->call_freq
;
388 else if (p2
->call_freq
- p1
->call_freq
!= 0)
389 return p2
->call_freq
- p1
->call_freq
;
391 return p1
->num
- p2
->num
;
394 /* Allocate save areas for any hard registers that might need saving.
395 We take a conservative approach here and look for call-clobbered hard
396 registers that are assigned to pseudos that cross calls. This may
397 overestimate slightly (especially if some of these registers are later
398 used as spill registers), but it should not be significant.
400 For IRA we use priority coloring to decrease stack slots needed for
401 saving hard registers through calls. We build conflicts for them
406 In the fallback case we should iterate backwards across all possible
407 modes for the save, choosing the largest available one instead of
408 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
410 We do not try to use "move multiple" instructions that exist
411 on some machines (such as the 68k moveml). It could be a win to try
412 and use them when possible. The hard part is doing it in a way that is
413 machine independent since they might be saving non-consecutive
414 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
417 setup_save_areas (void)
420 HARD_REG_SET hard_regs_used
;
421 struct saved_hard_reg
*saved_reg
;
423 struct insn_chain
*chain
, *next
;
425 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
426 reg_set_iterator rsi
;
428 CLEAR_HARD_REG_SET (hard_regs_used
);
430 /* Find every CALL_INSN and record which hard regs are live across the
431 call into HARD_REG_MAP and HARD_REGS_USED. */
432 initiate_saved_hard_regs ();
433 /* Create hard reg saved regs. */
434 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
439 || find_reg_note (insn
, REG_NORETURN
, NULL
))
441 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
442 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
443 &chain
->live_throughout
);
444 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
446 /* Record all registers set in this call insn. These don't
447 need to be saved. N.B. the call insn might set a subreg
448 of a multi-hard-reg pseudo; then the pseudo is considered
449 live during the call, but the subreg that is set
451 CLEAR_HARD_REG_SET (this_insn_sets
);
452 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
453 /* Sibcalls are considered to set the return value. */
454 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
455 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
457 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
458 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
459 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
460 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
461 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
463 if (hard_reg_map
[regno
] != NULL
)
464 hard_reg_map
[regno
]->call_freq
+= freq
;
466 saved_reg
= new_saved_hard_reg (regno
, freq
);
467 SET_HARD_REG_BIT (hard_regs_used
, regno
);
469 /* Look through all live pseudos, mark their hard registers. */
470 EXECUTE_IF_SET_IN_REG_SET
471 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
473 int r
= reg_renumber
[regno
];
479 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
480 for (; r
< bound
; r
++)
481 if (TEST_HARD_REG_BIT (used_regs
, r
))
483 if (hard_reg_map
[r
] != NULL
)
484 hard_reg_map
[r
]->call_freq
+= freq
;
486 saved_reg
= new_saved_hard_reg (r
, freq
);
487 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
488 SET_HARD_REG_BIT (hard_regs_used
, r
);
493 /* If requested, figure out which hard regs can share save slots. */
494 if (optimize
&& flag_ira_share_save_slots
)
497 char *saved_reg_conflicts
;
499 struct saved_hard_reg
*saved_reg2
, *saved_reg3
;
500 int call_saved_regs_num
;
501 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
503 int prev_save_slots_num
;
504 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
506 /* Find saved hard register conflicts. */
507 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
508 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
509 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
511 call_saved_regs_num
= 0;
515 || find_reg_note (insn
, REG_NORETURN
, NULL
))
517 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
518 &chain
->live_throughout
);
519 COPY_HARD_REG_SET (used_regs
, call_used_reg_set
);
521 /* Record all registers set in this call insn. These don't
522 need to be saved. N.B. the call insn might set a subreg
523 of a multi-hard-reg pseudo; then the pseudo is considered
524 live during the call, but the subreg that is set
526 CLEAR_HARD_REG_SET (this_insn_sets
);
527 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
528 /* Sibcalls are considered to set the return value,
529 compare df-scan.c:df_get_call_refs. */
530 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
531 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
533 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
534 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
535 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
536 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
537 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
539 gcc_assert (hard_reg_map
[regno
] != NULL
);
540 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
542 /* Look through all live pseudos, mark their hard registers. */
543 EXECUTE_IF_SET_IN_REG_SET
544 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
546 int r
= reg_renumber
[regno
];
552 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
553 for (; r
< bound
; r
++)
554 if (TEST_HARD_REG_BIT (used_regs
, r
))
555 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
557 for (i
= 0; i
< call_saved_regs_num
; i
++)
559 saved_reg
= call_saved_regs
[i
];
560 for (j
= 0; j
< call_saved_regs_num
; j
++)
563 saved_reg2
= call_saved_regs
[j
];
564 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
566 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
572 /* Sort saved hard regs. */
573 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
574 saved_hard_reg_compare_func
);
575 /* Initiate slots available from the previous reload
577 prev_save_slots_num
= save_slots_num
;
578 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
580 /* Allocate stack slots for the saved hard registers. */
581 for (i
= 0; i
< saved_regs_num
; i
++)
583 saved_reg
= all_saved_regs
[i
];
584 regno
= saved_reg
->hard_regno
;
585 for (j
= 0; j
< i
; j
++)
587 saved_reg2
= all_saved_regs
[j
];
588 if (! saved_reg2
->first_p
)
590 slot
= saved_reg2
->slot
;
591 for (k
= j
; k
>= 0; k
= next_k
)
593 saved_reg3
= all_saved_regs
[k
];
594 next_k
= saved_reg3
->next
;
595 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
600 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
601 <= GET_MODE_SIZE (regno_save_mode
602 [saved_reg2
->hard_regno
][1])))
606 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
607 regno_save_mem
[regno
][1] = saved_reg
->slot
;
608 saved_reg
->next
= saved_reg2
->next
;
609 saved_reg2
->next
= i
;
610 if (dump_file
!= NULL
)
611 fprintf (dump_file
, "%d uses slot of %d\n",
612 regno
, saved_reg2
->hard_regno
);
618 saved_reg
->first_p
= TRUE
;
619 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
621 slot
= prev_save_slots
[j
];
622 if (slot
== NULL_RTX
)
624 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
625 <= GET_MODE_SIZE (GET_MODE (slot
))
626 && best_slot_num
< 0)
628 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
631 if (best_slot_num
>= 0)
633 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
637 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
638 if (dump_file
!= NULL
)
640 "%d uses a slot from prev iteration\n", regno
);
641 prev_save_slots
[best_slot_num
] = NULL_RTX
;
642 if (best_slot_num
+ 1 == prev_save_slots_num
)
643 prev_save_slots_num
--;
648 = assign_stack_local_1
649 (regno_save_mode
[regno
][1],
650 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0, true);
651 if (dump_file
!= NULL
)
652 fprintf (dump_file
, "%d uses a new slot\n", regno
);
654 regno_save_mem
[regno
][1] = saved_reg
->slot
;
655 save_slots
[save_slots_num
++] = saved_reg
->slot
;
658 free (saved_reg_conflicts
);
659 finish_saved_hard_regs ();
663 /* We are not sharing slots.
665 Run through all the call-used hard-registers and allocate
666 space for each in the caller-save area. Try to allocate space
667 in a manner which allows multi-register saves/restores to be done. */
669 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
670 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
674 /* If no mode exists for this size, try another. Also break out
675 if we have already saved this hard register. */
676 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
679 /* See if any register in this group has been saved. */
680 for (k
= 0; k
< j
; k
++)
681 if (regno_save_mem
[i
+ k
][1])
689 for (k
= 0; k
< j
; k
++)
690 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
698 /* We have found an acceptable mode to store in. Since
699 hard register is always saved in the widest mode
700 available, the mode may be wider than necessary, it is
701 OK to reduce the alignment of spill space. We will
702 verify that it is equal to or greater than required
703 when we restore and save the hard register in
704 insert_restore and insert_save. */
706 = assign_stack_local_1 (regno_save_mode
[i
][j
],
707 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
710 /* Setup single word save area just in case... */
711 for (k
= 0; k
< j
; k
++)
712 /* This should not depend on WORDS_BIG_ENDIAN.
713 The order of words in regs is the same as in memory. */
714 regno_save_mem
[i
+ k
][1]
715 = adjust_address_nv (regno_save_mem
[i
][j
],
716 regno_save_mode
[i
+ k
][1],
721 /* Now loop again and set the alias set of any save areas we made to
722 the alias set used to represent frame objects. */
723 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
724 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
725 if (regno_save_mem
[i
][j
] != 0)
726 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
731 /* Find the places where hard regs are live across calls and save them. */
734 save_call_clobbered_regs (void)
736 struct insn_chain
*chain
, *next
, *last
= NULL
;
737 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
739 /* Computed in mark_set_regs, holds all registers set by the current
741 HARD_REG_SET this_insn_sets
;
743 CLEAR_HARD_REG_SET (hard_regs_saved
);
746 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
748 rtx insn
= chain
->insn
;
749 enum rtx_code code
= GET_CODE (insn
);
753 gcc_assert (!chain
->is_caller_save_insn
);
755 if (NONDEBUG_INSN_P (insn
))
757 /* If some registers have been saved, see if INSN references
758 any of them. We must restore them before the insn if so. */
763 HARD_REG_SET this_insn_sets
;
765 if (code
== JUMP_INSN
)
766 /* Restore all registers if this is a JUMP_INSN. */
767 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
770 CLEAR_HARD_REG_SET (referenced_regs
);
771 mark_referenced_regs (&PATTERN (insn
),
772 mark_reg_as_referenced
, NULL
);
773 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
776 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
777 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
778 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
,
780 /* If a saved register is set after the call, this means we no
781 longer should restore it. This can happen when parts of a
782 multi-word pseudo do not conflict with other pseudos, so
783 IRA may allocate the same hard register for both. One may
784 be live across the call, while the other is set
786 CLEAR_HARD_REG_SET (this_insn_sets
);
787 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
788 AND_COMPL_HARD_REG_SET (hard_regs_saved
, this_insn_sets
);
791 if (code
== CALL_INSN
792 && ! SIBLING_CALL_P (insn
)
793 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
796 HARD_REG_SET hard_regs_to_save
;
797 reg_set_iterator rsi
;
799 /* Use the register life information in CHAIN to compute which
800 regs are live during the call. */
801 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
802 &chain
->live_throughout
);
803 /* Save hard registers always in the widest mode available. */
804 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
805 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
806 save_mode
[regno
] = regno_save_mode
[regno
][1];
808 save_mode
[regno
] = VOIDmode
;
810 /* Look through all live pseudos, mark their hard registers
811 and choose proper mode for saving. */
812 EXECUTE_IF_SET_IN_REG_SET
813 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
815 int r
= reg_renumber
[regno
];
817 enum machine_mode mode
;
821 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
822 mode
= HARD_REGNO_CALLER_SAVE_MODE
823 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
824 if (GET_MODE_BITSIZE (mode
)
825 > GET_MODE_BITSIZE (save_mode
[r
]))
828 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
831 /* Record all registers set in this call insn. These don't need
832 to be saved. N.B. the call insn might set a subreg of a
833 multi-hard-reg pseudo; then the pseudo is considered live
834 during the call, but the subreg that is set isn't. */
835 CLEAR_HARD_REG_SET (this_insn_sets
);
836 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
838 /* Compute which hard regs must be saved before this call. */
839 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
840 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
841 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
842 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
844 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
845 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
846 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
848 /* Must recompute n_regs_saved. */
850 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
851 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
856 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
857 mark_referenced_regs (&PATTERN (insn
),
858 replace_reg_with_saved_mem
,
861 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
864 /* At the end of the basic block, we must restore any registers that
865 remain saved. If the last insn in the block is a JUMP_INSN, put
866 the restore before the insn, otherwise, put it after the insn. */
869 && DEBUG_INSN_P (insn
)
871 && last
->block
== chain
->block
)
874 basic_block bb
= BLOCK_FOR_INSN (insn
);
876 /* When adding hard reg restores after a DEBUG_INSN, move
877 all notes between last real insn and this DEBUG_INSN after
878 the DEBUG_INSN, otherwise we could get code
879 -g/-g0 differences. */
880 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
882 prev
= PREV_INSN (ins
);
885 NEXT_INSN (prev
) = NEXT_INSN (ins
);
886 PREV_INSN (NEXT_INSN (ins
)) = prev
;
887 PREV_INSN (ins
) = insn
;
888 NEXT_INSN (ins
) = NEXT_INSN (insn
);
889 NEXT_INSN (insn
) = ins
;
891 PREV_INSN (NEXT_INSN (ins
)) = ins
;
892 if (BB_END (bb
) == insn
)
896 gcc_assert (DEBUG_INSN_P (ins
));
902 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
903 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
904 regno
+= insert_restore (chain
, JUMP_P (insn
),
905 regno
, MOVE_MAX_WORDS
, save_mode
);
910 /* Here from note_stores, or directly from save_call_clobbered_regs, when
911 an insn stores a value in a register.
912 Set the proper bit or bits in this_insn_sets. All pseudos that have
913 been assigned hard regs have had their register number changed already,
914 so we can ignore pseudos. */
916 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
918 int regno
, endregno
, i
;
919 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
921 if (GET_CODE (reg
) == SUBREG
)
923 rtx inner
= SUBREG_REG (reg
);
924 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
926 regno
= subreg_regno (reg
);
927 endregno
= regno
+ subreg_nregs (reg
);
930 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
933 endregno
= END_HARD_REGNO (reg
);
938 for (i
= regno
; i
< endregno
; i
++)
939 SET_HARD_REG_BIT (*this_insn_sets
, i
);
942 /* Here from note_stores when an insn stores a value in a register.
943 Set the proper bit or bits in the passed regset. All pseudos that have
944 been assigned hard regs have had their register number changed already,
945 so we can ignore pseudos. */
947 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
949 int regno
, endregno
, i
;
950 enum machine_mode mode
= GET_MODE (reg
);
953 if (GET_CODE (setter
) == CLOBBER
)
956 if (GET_CODE (reg
) == SUBREG
957 && REG_P (SUBREG_REG (reg
))
958 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
960 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
961 GET_MODE (SUBREG_REG (reg
)),
964 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
965 endregno
= regno
+ subreg_nregs (reg
);
969 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
972 regno
= REGNO (reg
) + offset
;
973 endregno
= end_hard_regno (mode
, regno
);
976 for (i
= regno
; i
< endregno
; i
++)
977 SET_REGNO_REG_SET ((regset
) data
, i
);
980 /* Walk X and record all referenced registers in REFERENCED_REGS. */
982 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
984 enum rtx_code code
= GET_CODE (*loc
);
989 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
990 if (code
== SET
|| code
== CLOBBER
)
992 loc
= &SET_DEST (*loc
);
993 code
= GET_CODE (*loc
);
994 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
995 || code
== PC
|| code
== CC0
996 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
997 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
998 /* If we're setting only part of a multi-word register,
999 we shall mark it as referenced, because the words
1000 that are not being set should be restored. */
1001 && ((GET_MODE_SIZE (GET_MODE (*loc
))
1002 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
))))
1003 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
)))
1004 <= UNITS_PER_WORD
))))
1007 if (code
== MEM
|| code
== SUBREG
)
1009 loc
= &XEXP (*loc
, 0);
1010 code
= GET_CODE (*loc
);
1015 int regno
= REGNO (*loc
);
1016 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1017 : reg_renumber
[regno
]);
1020 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1022 /* ??? Will we ever end up with an equiv expression in a debug
1023 insn, that would have required restoring a reg, or will
1024 reload take care of it for us? */
1026 /* If this is a pseudo that did not get a hard register, scan its
1027 memory location, since it might involve the use of another
1028 register, which might be saved. */
1029 else if (reg_equiv_mem
[regno
] != 0)
1030 mark_referenced_regs (&XEXP (reg_equiv_mem
[regno
], 0), mark
, arg
);
1031 else if (reg_equiv_address
[regno
] != 0)
1032 mark_referenced_regs (®_equiv_address
[regno
], mark
, arg
);
1036 fmt
= GET_RTX_FORMAT (code
);
1037 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1040 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1041 else if (fmt
[i
] == 'E')
1042 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1043 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1047 /* Parameter function for mark_referenced_regs() that adds registers
1048 present in the insn and in equivalent mems and addresses to
1052 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1053 enum machine_mode mode
,
1055 void *arg ATTRIBUTE_UNUSED
)
1057 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1060 /* Parameter function for mark_referenced_regs() that replaces
1061 registers referenced in a debug_insn that would have been restored,
1062 should it be a non-debug_insn, with their save locations. */
1065 replace_reg_with_saved_mem (rtx
*loc
,
1066 enum machine_mode mode
,
1070 unsigned int i
, nregs
= hard_regno_nregs
[regno
][mode
];
1072 enum machine_mode
*save_mode
= (enum machine_mode
*)arg
;
1074 for (i
= 0; i
< nregs
; i
++)
1075 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1078 /* If none of the registers in the range would need restoring, we're
1084 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1088 && regno_save_mem
[regno
][nregs
])
1090 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1092 if (nregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
1093 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1095 if (GET_MODE (mem
) != mode
)
1097 /* This is gen_lowpart_if_possible(), but without validating
1098 the newly-formed address. */
1101 if (WORDS_BIG_ENDIAN
)
1102 offset
= (MAX (GET_MODE_SIZE (GET_MODE (mem
)), UNITS_PER_WORD
)
1103 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1104 if (BYTES_BIG_ENDIAN
)
1105 /* Adjust the address so that the address-after-the-data is
1107 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1108 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (mem
))));
1110 mem
= adjust_address_nv (mem
, mode
, offset
);
1115 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1116 for (i
= 0; i
< nregs
; i
++)
1117 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1119 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1120 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1124 gcc_assert (save_mode
[regno
] != VOIDmode
);
1125 XVECEXP (mem
, 0, i
) = gen_rtx_REG (save_mode
[regno
],
1130 gcc_assert (GET_MODE (mem
) == mode
);
1135 /* Insert a sequence of insns to restore. Place these insns in front of
1136 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1137 the maximum number of registers which should be restored during this call.
1138 It should never be less than 1 since we only work with entire registers.
1140 Note that we have verified in init_caller_save that we can do this
1141 with a simple SET, so use it. Set INSN_CODE to what we save there
1142 since the address might not be valid so the insn might not be recognized.
1143 These insns will be reloaded and have register elimination done by
1144 find_reload, so we need not worry about that here.
1146 Return the extra number of registers saved. */
1149 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1150 int maxrestore
, enum machine_mode
*save_mode
)
1155 unsigned int numregs
= 0;
1156 struct insn_chain
*new_chain
;
1159 /* A common failure mode if register status is not correct in the
1160 RTL is for this routine to be called with a REGNO we didn't
1161 expect to save. That will cause us to write an insn with a (nil)
1162 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1163 later, check for this common case here instead. This will remove
1164 one step in debugging such problems. */
1165 gcc_assert (regno_save_mem
[regno
][1]);
1167 /* Get the pattern to emit and update our status.
1169 See if we can restore `maxrestore' registers at once. Work
1170 backwards to the single register case. */
1171 for (i
= maxrestore
; i
> 0; i
--)
1176 if (regno_save_mem
[regno
][i
] == 0)
1179 for (j
= 0; j
< i
; j
++)
1180 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1185 /* Must do this one restore at a time. */
1193 mem
= regno_save_mem
[regno
][numregs
];
1194 if (save_mode
[regno
] != VOIDmode
1195 && save_mode
[regno
] != GET_MODE (mem
)
1196 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1197 /* Check that insn to restore REGNO in save_mode[regno] is
1199 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1200 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1202 mem
= copy_rtx (mem
);
1204 /* Verify that the alignment of spill space is equal to or greater
1206 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1207 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1209 pat
= gen_rtx_SET (VOIDmode
,
1210 gen_rtx_REG (GET_MODE (mem
),
1212 code
= reg_restore_code (regno
, GET_MODE (mem
));
1213 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1215 /* Clear status for all registers we restored. */
1216 for (k
= 0; k
< i
; k
++)
1218 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1219 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1223 /* Tell our callers how many extra registers we saved/restored. */
1227 /* Like insert_restore above, but save registers instead. */
1230 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1231 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
1237 unsigned int numregs
= 0;
1238 struct insn_chain
*new_chain
;
1241 /* A common failure mode if register status is not correct in the
1242 RTL is for this routine to be called with a REGNO we didn't
1243 expect to save. That will cause us to write an insn with a (nil)
1244 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1245 later, check for this common case here. This will remove one
1246 step in debugging such problems. */
1247 gcc_assert (regno_save_mem
[regno
][1]);
1249 /* Get the pattern to emit and update our status.
1251 See if we can save several registers with a single instruction.
1252 Work backwards to the single register case. */
1253 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1257 if (regno_save_mem
[regno
][i
] == 0)
1260 for (j
= 0; j
< i
; j
++)
1261 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1266 /* Must do this one save at a time. */
1274 mem
= regno_save_mem
[regno
][numregs
];
1275 if (save_mode
[regno
] != VOIDmode
1276 && save_mode
[regno
] != GET_MODE (mem
)
1277 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1278 /* Check that insn to save REGNO in save_mode[regno] is
1280 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1281 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1283 mem
= copy_rtx (mem
);
1285 /* Verify that the alignment of spill space is equal to or greater
1287 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1288 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1290 pat
= gen_rtx_SET (VOIDmode
, mem
,
1291 gen_rtx_REG (GET_MODE (mem
),
1293 code
= reg_save_code (regno
, GET_MODE (mem
));
1294 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1296 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1297 for (k
= 0; k
< numregs
; k
++)
1299 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1300 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1304 /* Tell our callers how many extra registers we saved/restored. */
1308 /* A for_each_rtx callback used by add_used_regs. Add the hard-register
1309 equivalent of each REG to regset DATA. */
1312 add_used_regs_1 (rtx
*loc
, void *data
)
1319 live
= (regset
) data
;
1323 if (!HARD_REGISTER_NUM_P (regno
))
1324 regno
= reg_renumber
[regno
];
1326 for (i
= hard_regno_nregs
[regno
][GET_MODE (x
)] - 1; i
>= 0; i
--)
1327 SET_REGNO_REG_SET (live
, regno
+ i
);
1332 /* A note_uses callback used by insert_one_insn. Add the hard-register
1333 equivalent of each REG to regset DATA. */
1336 add_used_regs (rtx
*loc
, void *data
)
1338 for_each_rtx (loc
, add_used_regs_1
, data
);
1341 /* Emit a new caller-save insn and set the code. */
1342 static struct insn_chain
*
1343 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1345 rtx insn
= chain
->insn
;
1346 struct insn_chain
*new_chain
;
1349 /* If INSN references CC0, put our insns in front of the insn that sets
1350 CC0. This is always safe, since the only way we could be passed an
1351 insn that references CC0 is for a restore, and doing a restore earlier
1352 isn't a problem. We do, however, assume here that CALL_INSNs don't
1353 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1355 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1357 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1358 chain
= chain
->prev
, insn
= chain
->insn
;
1361 new_chain
= new_insn_chain ();
1366 new_chain
->prev
= chain
->prev
;
1367 if (new_chain
->prev
!= 0)
1368 new_chain
->prev
->next
= new_chain
;
1370 reload_insn_chain
= new_chain
;
1372 chain
->prev
= new_chain
;
1373 new_chain
->next
= chain
;
1374 new_chain
->insn
= emit_insn_before (pat
, insn
);
1375 /* ??? It would be nice if we could exclude the already / still saved
1376 registers from the live sets. */
1377 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1378 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1379 &new_chain
->live_throughout
);
1380 /* If CHAIN->INSN is a call, then the registers which contain
1381 the arguments to the function are live in the new insn. */
1382 if (CALL_P (chain
->insn
))
1383 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1385 link
= XEXP (link
, 1))
1386 note_uses (&XEXP (link
, 0), add_used_regs
,
1387 &new_chain
->live_throughout
);
1389 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1390 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
1391 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1395 new_chain
->next
= chain
->next
;
1396 if (new_chain
->next
!= 0)
1397 new_chain
->next
->prev
= new_chain
;
1398 chain
->next
= new_chain
;
1399 new_chain
->prev
= chain
;
1400 new_chain
->insn
= emit_insn_after (pat
, insn
);
1401 /* ??? It would be nice if we could exclude the already / still saved
1402 registers from the live sets, and observe REG_UNUSED notes. */
1403 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1404 /* Registers that are set in CHAIN->INSN live in the new insn.
1405 (Unless there is a REG_UNUSED note for them, but we don't
1406 look for them here.) */
1407 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1408 &new_chain
->live_throughout
);
1409 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1410 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
1411 BB_END (BASIC_BLOCK (chain
->block
)) = new_chain
->insn
;
1413 new_chain
->block
= chain
->block
;
1414 new_chain
->is_caller_save_insn
= 1;
1416 INSN_CODE (new_chain
->insn
) = code
;
1419 #include "gt-caller-save.h"