reload.h (compute_use_by_pseudos): Declare.
[gcc.git] / gcc / caller-save.c
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 94-95, 1997, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "config.h"
22 #include "system.h"
23 #include "rtl.h"
24 #include "insn-config.h"
25 #include "flags.h"
26 #include "regs.h"
27 #include "hard-reg-set.h"
28 #include "recog.h"
29 #include "basic-block.h"
30 #include "reload.h"
31 #include "expr.h"
32 #include "toplev.h"
33
34 #ifndef MAX_MOVE_MAX
35 #define MAX_MOVE_MAX MOVE_MAX
36 #endif
37
38 #ifndef MIN_UNITS_PER_WORD
39 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
40 #endif
41
42 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
43
44 /* Modes for each hard register that we can save. The smallest mode is wide
45 enough to save the entire contents of the register. When saving the
46 register because it is live we first try to save in multi-register modes.
47 If that is not possible the save is done one register at a time. */
48
49 static enum machine_mode
50 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
51
52 /* For each hard register, a place on the stack where it can be saved,
53 if needed. */
54
55 static rtx
56 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
57
58 /* We will only make a register eligible for caller-save if it can be
59 saved in its widest mode with a simple SET insn as long as the memory
60 address is valid. We record the INSN_CODE is those insns here since
61 when we emit them, the addresses might not be valid, so they might not
62 be recognized. */
63
64 static enum insn_code
65 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
66 static enum insn_code
67 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
68
69 /* Set of hard regs currently residing in save area (during insn scan). */
70
71 static HARD_REG_SET hard_regs_saved;
72
73 /* Number of registers currently in hard_regs_saved. */
74
75 static int n_regs_saved;
76
77 /* Computed by mark_referenced_regs, all regs referenced in a given
78 insn. */
79 static HARD_REG_SET referenced_regs;
80
81 /* Computed in mark_set_regs, holds all registers set by the current
82 instruction. */
83 static HARD_REG_SET this_insn_sets;
84
85
86 static void mark_set_regs PROTO((rtx, rtx));
87 static void mark_referenced_regs PROTO((rtx));
88 static int insert_save PROTO((struct insn_chain *, int, int,
89 HARD_REG_SET *));
90 static int insert_restore PROTO((struct insn_chain *, int, int,
91 int));
92 static void insert_one_insn PROTO((struct insn_chain *, int,
93 enum insn_code, rtx));
94 \f
95 /* Initialize for caller-save.
96
97 Look at all the hard registers that are used by a call and for which
98 regclass.c has not already excluded from being used across a call.
99
100 Ensure that we can find a mode to save the register and that there is a
101 simple insn to save and restore the register. This latter check avoids
102 problems that would occur if we tried to save the MQ register of some
103 machines directly into memory. */
104
105 void
106 init_caller_save ()
107 {
108 char *first_obj = (char *) oballoc (0);
109 rtx addr_reg;
110 int offset;
111 rtx address;
112 int i, j;
113
114 /* First find all the registers that we need to deal with and all
115 the modes that they can have. If we can't find a mode to use,
116 we can't have the register live over calls. */
117
118 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
119 {
120 if (call_used_regs[i] && ! call_fixed_regs[i])
121 {
122 for (j = 1; j <= MOVE_MAX_WORDS; j++)
123 {
124 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j);
125 if (regno_save_mode[i][j] == VOIDmode && j == 1)
126 {
127 call_fixed_regs[i] = 1;
128 SET_HARD_REG_BIT (call_fixed_reg_set, i);
129 }
130 }
131 }
132 else
133 regno_save_mode[i][1] = VOIDmode;
134 }
135
136 /* The following code tries to approximate the conditions under which
137 we can easily save and restore a register without scratch registers or
138 other complexities. It will usually work, except under conditions where
139 the validity of an insn operand is dependent on the address offset.
140 No such cases are currently known.
141
142 We first find a typical offset from some BASE_REG_CLASS register.
143 This address is chosen by finding the first register in the class
144 and by finding the smallest power of two that is a valid offset from
145 that register in every mode we will use to save registers. */
146
147 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
148 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
149 break;
150
151 if (i == FIRST_PSEUDO_REGISTER)
152 abort ();
153
154 addr_reg = gen_rtx_REG (Pmode, i);
155
156 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
157 {
158 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
159
160 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
161 if (regno_save_mode[i][1] != VOIDmode
162 && ! strict_memory_address_p (regno_save_mode[i][1], address))
163 break;
164
165 if (i == FIRST_PSEUDO_REGISTER)
166 break;
167 }
168
169 /* If we didn't find a valid address, we must use register indirect. */
170 if (offset == 0)
171 address = addr_reg;
172
173 /* Next we try to form an insn to save and restore the register. We
174 see if such an insn is recognized and meets its constraints. */
175
176 start_sequence ();
177
178 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
179 for (j = 1; j <= MOVE_MAX_WORDS; j++)
180 if (regno_save_mode[i][j] != VOIDmode)
181 {
182 rtx mem = gen_rtx_MEM (regno_save_mode[i][j], address);
183 rtx reg = gen_rtx_REG (regno_save_mode[i][j], i);
184 rtx savepat = gen_rtx_SET (VOIDmode, mem, reg);
185 rtx restpat = gen_rtx_SET (VOIDmode, reg, mem);
186 rtx saveinsn = emit_insn (savepat);
187 rtx restinsn = emit_insn (restpat);
188 int ok;
189
190 reg_save_code[i][j] = recog_memoized (saveinsn);
191 reg_restore_code[i][j] = recog_memoized (restinsn);
192
193 /* Now extract both insns and see if we can meet their
194 constraints. */
195 ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1);
196 if (ok)
197 {
198 insn_extract (saveinsn);
199 ok = constrain_operands (reg_save_code[i][j], 1);
200 insn_extract (restinsn);
201 ok &= constrain_operands (reg_restore_code[i][j], 1);
202 }
203
204 if (! ok)
205 {
206 regno_save_mode[i][j] = VOIDmode;
207 if (j == 1)
208 {
209 call_fixed_regs[i] = 1;
210 SET_HARD_REG_BIT (call_fixed_reg_set, i);
211 }
212 }
213 }
214
215 end_sequence ();
216
217 obfree (first_obj);
218 }
219 \f
220 /* Initialize save areas by showing that we haven't allocated any yet. */
221
222 void
223 init_save_areas ()
224 {
225 int i, j;
226
227 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
228 for (j = 1; j <= MOVE_MAX_WORDS; j++)
229 regno_save_mem[i][j] = 0;
230 }
231
232 /* Allocate save areas for any hard registers that might need saving.
233 We take a conservative approach here and look for call-clobbered hard
234 registers that are assigned to pseudos that cross calls. This may
235 overestimate slightly (especially if some of these registers are later
236 used as spill registers), but it should not be significant.
237
238 Future work:
239
240 In the fallback case we should iterate backwards across all possible
241 modes for the save, choosing the largest available one instead of
242 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
243
244 We do not try to use "move multiple" instructions that exist
245 on some machines (such as the 68k moveml). It could be a win to try
246 and use them when possible. The hard part is doing it in a way that is
247 machine independent since they might be saving non-consecutive
248 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
249
250 void
251 setup_save_areas ()
252 {
253 int i, j, k;
254 HARD_REG_SET hard_regs_used;
255
256 /* Allocate space in the save area for the largest multi-register
257 pseudos first, then work backwards to single register
258 pseudos. */
259
260 /* Find and record all call-used hard-registers in this function. */
261 CLEAR_HARD_REG_SET (hard_regs_used);
262 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
263 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
264 {
265 int regno = reg_renumber[i];
266 int endregno
267 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
268 int nregs = endregno - regno;
269
270 for (j = 0; j < nregs; j++)
271 {
272 if (call_used_regs[regno+j])
273 SET_HARD_REG_BIT (hard_regs_used, regno+j);
274 }
275 }
276
277 /* Now run through all the call-used hard-registers and allocate
278 space for them in the caller-save area. Try to allocate space
279 in a manner which allows multi-register saves/restores to be done. */
280
281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
282 for (j = MOVE_MAX_WORDS; j > 0; j--)
283 {
284 int do_save = 1;
285
286 /* If no mode exists for this size, try another. Also break out
287 if we have already saved this hard register. */
288 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
289 continue;
290
291 /* See if any register in this group has been saved. */
292 for (k = 0; k < j; k++)
293 if (regno_save_mem[i + k][1])
294 {
295 do_save = 0;
296 break;
297 }
298 if (! do_save)
299 continue;
300
301 for (k = 0; k < j; k++)
302 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
303 {
304 do_save = 0;
305 break;
306 }
307 if (! do_save)
308 continue;
309
310 /* We have found an acceptable mode to store in. */
311 regno_save_mem[i][j]
312 = assign_stack_local (regno_save_mode[i][j],
313 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
314
315 /* Setup single word save area just in case... */
316 for (k = 0; k < j; k++)
317 {
318 /* This should not depend on WORDS_BIG_ENDIAN.
319 The order of words in regs is the same as in memory. */
320 rtx temp = gen_rtx_MEM (regno_save_mode[i+k][1],
321 XEXP (regno_save_mem[i][j], 0));
322
323 regno_save_mem[i+k][1]
324 = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
325 }
326 }
327 }
328 \f
329 /* Find the places where hard regs are live across calls and save them. */
330 void
331 save_call_clobbered_regs ()
332 {
333 struct insn_chain *chain, *next;
334
335 CLEAR_HARD_REG_SET (hard_regs_saved);
336 n_regs_saved = 0;
337
338 for (chain = reload_insn_chain; chain != 0; chain = next)
339 {
340 rtx insn = chain->insn;
341 enum rtx_code code = GET_CODE (insn);
342
343 next = chain->next;
344
345 if (chain->is_caller_save_insn)
346 abort ();
347
348 if (GET_RTX_CLASS (code) == 'i')
349 {
350 /* If some registers have been saved, see if INSN references
351 any of them. We must restore them before the insn if so. */
352
353 if (n_regs_saved)
354 {
355 int regno;
356
357 if (code == JUMP_INSN)
358 /* Restore all registers if this is a JUMP_INSN. */
359 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
360 else
361 {
362 CLEAR_HARD_REG_SET (referenced_regs);
363 mark_referenced_regs (PATTERN (insn));
364 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
365 }
366
367 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
368 if (TEST_HARD_REG_BIT (referenced_regs, regno))
369 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS);
370 }
371
372 if (code == CALL_INSN)
373 {
374 rtx x;
375 int regno, nregs;
376 HARD_REG_SET hard_regs_to_save;
377
378 /* Use the register life information in CHAIN to compute which
379 regs are live before the call. */
380 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, chain->live_before);
381 compute_use_by_pseudos (&hard_regs_to_save, chain->live_before);
382
383 /* Record all registers set in this call insn. These don't need
384 to be saved. */
385 CLEAR_HARD_REG_SET (this_insn_sets);
386 note_stores (PATTERN (insn), mark_set_regs);
387
388 /* Compute which hard regs must be saved before this call. */
389 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
390 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
391 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
392 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
393
394 /* Registers used for function parameters need not be saved. */
395 for (x = CALL_INSN_FUNCTION_USAGE (insn); x != 0;
396 x = XEXP (x, 1))
397 {
398 rtx y;
399
400 if (GET_CODE (XEXP (x, 0)) != USE)
401 continue;
402 y = XEXP (XEXP (x, 0), 0);
403 if (GET_CODE (y) != REG)
404 abort ();
405 regno = REGNO (y);
406 if (REGNO (y) >= FIRST_PSEUDO_REGISTER)
407 abort ();
408 nregs = HARD_REGNO_NREGS (regno, GET_MODE (y));
409 while (nregs-- > 0)
410 CLEAR_HARD_REG_BIT (hard_regs_to_save, regno + nregs);
411 }
412
413 /* Neither do registers for which we find a death note. */
414 for (x = REG_NOTES (insn); x != 0; x = XEXP (x, 1))
415 {
416 rtx y = XEXP (x, 0);
417
418 if (REG_NOTE_KIND (x) != REG_DEAD)
419 continue;
420 if (GET_CODE (y) != REG)
421 abort ();
422 regno = REGNO (y);
423
424 if (regno >= FIRST_PSEUDO_REGISTER)
425 regno = reg_renumber[regno];
426 if (regno < 0)
427 continue;
428 nregs = HARD_REGNO_NREGS (regno, GET_MODE (y));
429 while (nregs-- > 0)
430 CLEAR_HARD_REG_BIT (hard_regs_to_save, regno + nregs);
431 }
432
433 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
434 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
435 regno += insert_save (chain, 1, regno, &hard_regs_to_save);
436
437 /* Must recompute n_regs_saved. */
438 n_regs_saved = 0;
439 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
440 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
441 n_regs_saved++;
442 }
443 }
444
445 if (chain->next == 0 || chain->next->block > chain->block)
446 {
447 int regno;
448 /* At the end of the basic block, we must restore any registers that
449 remain saved. If the last insn in the block is a JUMP_INSN, put
450 the restore before the insn, otherwise, put it after the insn. */
451
452 if (n_regs_saved)
453 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
454 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
455 regno += insert_restore (chain, GET_CODE (insn) == JUMP_INSN,
456 regno, MOVE_MAX_WORDS);
457 }
458 }
459 }
460
461 /* Here from note_stores when an insn stores a value in a register.
462 Set the proper bit or bits in this_insn_sets. All pseudos that have
463 been assigned hard regs have had their register number changed already,
464 so we can ignore pseudos. */
465 static void
466 mark_set_regs (reg, setter)
467 rtx reg;
468 rtx setter ATTRIBUTE_UNUSED;
469 {
470 register int regno, endregno, i;
471 enum machine_mode mode = GET_MODE (reg);
472 int word = 0;
473
474 if (GET_CODE (reg) == SUBREG)
475 {
476 word = SUBREG_WORD (reg);
477 reg = SUBREG_REG (reg);
478 }
479
480 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
481 return;
482
483 regno = REGNO (reg) + word;
484 endregno = regno + HARD_REGNO_NREGS (regno, mode);
485
486 for (i = regno; i < endregno; i++)
487 SET_HARD_REG_BIT (this_insn_sets, i);
488 }
489
490 /* Walk X and record all referenced registers in REFERENCED_REGS. */
491 static void
492 mark_referenced_regs (x)
493 rtx x;
494 {
495 enum rtx_code code = GET_CODE (x);
496 char *fmt;
497 int i, j;
498
499 if (code == SET)
500 mark_referenced_regs (SET_SRC (x));
501 if (code == SET || code == CLOBBER)
502 {
503 x = SET_DEST (x);
504 code = GET_CODE (x);
505 if (code == REG || code == PC || code == CC0
506 || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
507 return;
508 }
509 if (code == MEM || code == SUBREG)
510 {
511 x = XEXP (x, 0);
512 code = GET_CODE (x);
513 }
514
515 if (code == REG)
516 {
517 int regno = REGNO (x);
518 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
519 : reg_renumber[regno]);
520
521 if (hardregno >= 0)
522 {
523 int nregs = HARD_REGNO_NREGS (hardregno, GET_MODE (x));
524 while (nregs-- > 0)
525 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
526 }
527 /* If this is a pseudo that did not get a hard register, scan its
528 memory location, since it might involve the use of another
529 register, which might be saved. */
530 else if (reg_equiv_mem[regno] != 0)
531 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
532 else if (reg_equiv_address[regno] != 0)
533 mark_referenced_regs (reg_equiv_address[regno]);
534 return;
535 }
536
537 fmt = GET_RTX_FORMAT (code);
538 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
539 {
540 if (fmt[i] == 'e')
541 mark_referenced_regs (XEXP (x, i));
542 else if (fmt[i] == 'E')
543 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
544 mark_referenced_regs (XVECEXP (x, i, j));
545 }
546 }
547 \f
548 /* Insert a sequence of insns to restore. Place these insns in front of
549 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
550 the maximum number of registers which should be restored during this call.
551 It should never be less than 1 since we only work with entire registers.
552
553 Note that we have verified in init_caller_save that we can do this
554 with a simple SET, so use it. Set INSN_CODE to what we save there
555 since the address might not be valid so the insn might not be recognized.
556 These insns will be reloaded and have register elimination done by
557 find_reload, so we need not worry about that here.
558
559 Return the extra number of registers saved. */
560
561 static int
562 insert_restore (chain, before_p, regno, maxrestore)
563 struct insn_chain *chain;
564 int before_p;
565 int regno;
566 int maxrestore;
567 {
568 int i;
569 rtx pat = NULL_RTX;
570 enum insn_code code = CODE_FOR_nothing;
571 int numregs = 0;
572
573 /* A common failure mode if register status is not correct in the RTL
574 is for this routine to be called with a REGNO we didn't expect to
575 save. That will cause us to write an insn with a (nil) SET_DEST
576 or SET_SRC. Instead of doing so and causing a crash later, check
577 for this common case and abort here instead. This will remove one
578 step in debugging such problems. */
579
580 if (regno_save_mem[regno][1] == 0)
581 abort ();
582
583 /* Get the pattern to emit and update our status.
584
585 See if we can restore `maxrestore' registers at once. Work
586 backwards to the single register case. */
587 for (i = maxrestore; i > 0; i--)
588 {
589 int j, k;
590 int ok = 1;
591
592 if (regno_save_mem[regno][i] == 0)
593 continue;
594
595 for (j = 0; j < i; j++)
596 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
597 {
598 ok = 0;
599 break;
600 }
601 /* Must do this one restore at a time */
602 if (! ok)
603 continue;
604
605 pat = gen_rtx_SET (VOIDmode,
606 gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]),
607 regno),
608 regno_save_mem[regno][i]);
609 code = reg_restore_code[regno][i];
610
611 /* Clear status for all registers we restored. */
612 for (k = 0; k < i; k++)
613 {
614 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
615 n_regs_saved--;
616 }
617
618 numregs = i;
619 break;
620 }
621
622 insert_one_insn (chain, before_p, code, pat);
623
624 /* Tell our callers how many extra registers we saved/restored */
625 return numregs - 1;
626 }
627
628 /* Like insert_restore above, but save registers instead. */
629 static int
630 insert_save (chain, before_p, regno, to_save)
631 struct insn_chain *chain;
632 int before_p;
633 int regno;
634 HARD_REG_SET *to_save;
635 {
636 int i;
637 rtx pat = NULL_RTX;
638 enum insn_code code = CODE_FOR_nothing;
639 int numregs = 0;
640
641 /* A common failure mode if register status is not correct in the RTL
642 is for this routine to be called with a REGNO we didn't expect to
643 save. That will cause us to write an insn with a (nil) SET_DEST
644 or SET_SRC. Instead of doing so and causing a crash later, check
645 for this common case and abort here instead. This will remove one
646 step in debugging such problems. */
647
648 if (regno_save_mem[regno][1] == 0)
649 abort ();
650
651 /* Get the pattern to emit and update our status.
652
653 See if we can save several registers with a single instruction.
654 Work backwards to the single register case. */
655 for (i = MOVE_MAX_WORDS; i > 0; i--)
656 {
657 int j, k;
658 int ok = 1;
659 if (regno_save_mem[regno][i] == 0)
660 continue;
661
662 for (j = 0; j < i; j++)
663 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
664 {
665 ok = 0;
666 break;
667 }
668 /* Must do this one save at a time */
669 if (! ok)
670 continue;
671
672 pat = gen_rtx_SET (VOIDmode, regno_save_mem[regno][i],
673 gen_rtx_REG (GET_MODE (regno_save_mem[regno][i]),
674 regno));
675 code = reg_save_code[regno][i];
676
677 /* Set hard_regs_saved for all the registers we saved. */
678 for (k = 0; k < i; k++)
679 {
680 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
681 n_regs_saved++;
682 }
683
684 numregs = i;
685 break;
686 }
687
688 insert_one_insn (chain, before_p, code, pat);
689
690 /* Tell our callers how many extra registers we saved/restored */
691 return numregs - 1;
692 }
693
694 /* Emit a new caller-save insn and set the code. */
695 static void
696 insert_one_insn (chain, before_p, code, pat)
697 struct insn_chain *chain;
698 int before_p;
699 enum insn_code code;
700 rtx pat;
701 {
702 rtx insn = chain->insn;
703 struct insn_chain *new;
704
705 #ifdef HAVE_cc0
706 /* If INSN references CC0, put our insns in front of the insn that sets
707 CC0. This is always safe, since the only way we could be passed an
708 insn that references CC0 is for a restore, and doing a restore earlier
709 isn't a problem. We do, however, assume here that CALL_INSNs don't
710 reference CC0. Guard against non-INSN's like CODE_LABEL. */
711
712 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
713 && before_p
714 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
715 chain = chain->prev, insn = chain->insn;
716 #endif
717
718 new = new_insn_chain ();
719 if (before_p)
720 {
721 new->prev = chain->prev;
722 if (new->prev != 0)
723 new->prev->next = new;
724 else
725 reload_insn_chain = new;
726
727 chain->prev = new;
728 new->next = chain;
729 new->insn = emit_insn_before (pat, insn);
730 if (chain->insn == basic_block_head[chain->block])
731 basic_block_head[chain->block] = new->insn;
732 }
733 else
734 {
735 new->next = chain->next;
736 if (new->next != 0)
737 new->next->prev = new;
738 chain->next = new;
739 new->prev = chain;
740 new->insn = emit_insn_after (pat, insn);
741 if (chain->insn == basic_block_end[chain->block])
742 basic_block_end[chain->block] = new->insn;
743 }
744 new->block = chain->block;
745 new->is_caller_save_insn = 1;
746
747 INSN_CODE (new->insn) = code;
748 }