1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 94-95, 1997, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
24 #include "insn-config.h"
27 #include "hard-reg-set.h"
29 #include "basic-block.h"
35 #define MAX_MOVE_MAX MOVE_MAX
38 #ifndef MIN_UNITS_PER_WORD
39 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
42 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
44 /* Modes for each hard register that we can save. The smallest mode is wide
45 enough to save the entire contents of the register. When saving the
46 register because it is live we first try to save in multi-register modes.
47 If that is not possible the save is done one register at a time. */
49 static enum machine_mode
50 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
52 /* For each hard register, a place on the stack where it can be saved,
56 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
58 /* We will only make a register eligible for caller-save if it can be
59 saved in its widest mode with a simple SET insn as long as the memory
60 address is valid. We record the INSN_CODE is those insns here since
61 when we emit them, the addresses might not be valid, so they might not
65 reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
67 reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
69 /* Set of hard regs currently residing in save area (during insn scan). */
71 static HARD_REG_SET hard_regs_saved
;
73 /* Number of registers currently in hard_regs_saved. */
75 static int n_regs_saved
;
77 /* Computed by mark_referenced_regs, all regs referenced in a given
79 static HARD_REG_SET referenced_regs
;
81 /* Computed in mark_set_regs, holds all registers set by the current
83 static HARD_REG_SET this_insn_sets
;
86 static void mark_set_regs
PROTO((rtx
, rtx
));
87 static void mark_referenced_regs
PROTO((rtx
));
88 static int insert_save
PROTO((struct insn_chain
*, int, int,
90 static int insert_restore
PROTO((struct insn_chain
*, int, int,
92 static void insert_one_insn
PROTO((struct insn_chain
*, int,
93 enum insn_code
, rtx
));
95 /* Initialize for caller-save.
97 Look at all the hard registers that are used by a call and for which
98 regclass.c has not already excluded from being used across a call.
100 Ensure that we can find a mode to save the register and that there is a
101 simple insn to save and restore the register. This latter check avoids
102 problems that would occur if we tried to save the MQ register of some
103 machines directly into memory. */
108 char *first_obj
= (char *) oballoc (0);
114 /* First find all the registers that we need to deal with and all
115 the modes that they can have. If we can't find a mode to use,
116 we can't have the register live over calls. */
118 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
120 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
122 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
124 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
);
125 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
127 call_fixed_regs
[i
] = 1;
128 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
133 regno_save_mode
[i
][1] = VOIDmode
;
136 /* The following code tries to approximate the conditions under which
137 we can easily save and restore a register without scratch registers or
138 other complexities. It will usually work, except under conditions where
139 the validity of an insn operand is dependent on the address offset.
140 No such cases are currently known.
142 We first find a typical offset from some BASE_REG_CLASS register.
143 This address is chosen by finding the first register in the class
144 and by finding the smallest power of two that is a valid offset from
145 that register in every mode we will use to save registers. */
147 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
148 if (TEST_HARD_REG_BIT (reg_class_contents
[(int) BASE_REG_CLASS
], i
))
151 if (i
== FIRST_PSEUDO_REGISTER
)
154 addr_reg
= gen_rtx_REG (Pmode
, i
);
156 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
158 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
160 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
161 if (regno_save_mode
[i
][1] != VOIDmode
162 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
165 if (i
== FIRST_PSEUDO_REGISTER
)
169 /* If we didn't find a valid address, we must use register indirect. */
173 /* Next we try to form an insn to save and restore the register. We
174 see if such an insn is recognized and meets its constraints. */
178 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
179 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
180 if (regno_save_mode
[i
][j
] != VOIDmode
)
182 rtx mem
= gen_rtx_MEM (regno_save_mode
[i
][j
], address
);
183 rtx reg
= gen_rtx_REG (regno_save_mode
[i
][j
], i
);
184 rtx savepat
= gen_rtx_SET (VOIDmode
, mem
, reg
);
185 rtx restpat
= gen_rtx_SET (VOIDmode
, reg
, mem
);
186 rtx saveinsn
= emit_insn (savepat
);
187 rtx restinsn
= emit_insn (restpat
);
190 reg_save_code
[i
][j
] = recog_memoized (saveinsn
);
191 reg_restore_code
[i
][j
] = recog_memoized (restinsn
);
193 /* Now extract both insns and see if we can meet their
195 ok
= (reg_save_code
[i
][j
] != -1 && reg_restore_code
[i
][j
] != -1);
198 insn_extract (saveinsn
);
199 ok
= constrain_operands (reg_save_code
[i
][j
], 1);
200 insn_extract (restinsn
);
201 ok
&= constrain_operands (reg_restore_code
[i
][j
], 1);
206 regno_save_mode
[i
][j
] = VOIDmode
;
209 call_fixed_regs
[i
] = 1;
210 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
220 /* Initialize save areas by showing that we haven't allocated any yet. */
227 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
228 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
229 regno_save_mem
[i
][j
] = 0;
232 /* Allocate save areas for any hard registers that might need saving.
233 We take a conservative approach here and look for call-clobbered hard
234 registers that are assigned to pseudos that cross calls. This may
235 overestimate slightly (especially if some of these registers are later
236 used as spill registers), but it should not be significant.
240 In the fallback case we should iterate backwards across all possible
241 modes for the save, choosing the largest available one instead of
242 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
244 We do not try to use "move multiple" instructions that exist
245 on some machines (such as the 68k moveml). It could be a win to try
246 and use them when possible. The hard part is doing it in a way that is
247 machine independent since they might be saving non-consecutive
248 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
254 HARD_REG_SET hard_regs_used
;
256 /* Allocate space in the save area for the largest multi-register
257 pseudos first, then work backwards to single register
260 /* Find and record all call-used hard-registers in this function. */
261 CLEAR_HARD_REG_SET (hard_regs_used
);
262 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
263 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
265 int regno
= reg_renumber
[i
];
267 = regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (regno_reg_rtx
[i
]));
268 int nregs
= endregno
- regno
;
270 for (j
= 0; j
< nregs
; j
++)
272 if (call_used_regs
[regno
+j
])
273 SET_HARD_REG_BIT (hard_regs_used
, regno
+j
);
277 /* Now run through all the call-used hard-registers and allocate
278 space for them in the caller-save area. Try to allocate space
279 in a manner which allows multi-register saves/restores to be done. */
281 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
282 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
286 /* If no mode exists for this size, try another. Also break out
287 if we have already saved this hard register. */
288 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
291 /* See if any register in this group has been saved. */
292 for (k
= 0; k
< j
; k
++)
293 if (regno_save_mem
[i
+ k
][1])
301 for (k
= 0; k
< j
; k
++)
302 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
310 /* We have found an acceptable mode to store in. */
312 = assign_stack_local (regno_save_mode
[i
][j
],
313 GET_MODE_SIZE (regno_save_mode
[i
][j
]), 0);
315 /* Setup single word save area just in case... */
316 for (k
= 0; k
< j
; k
++)
318 /* This should not depend on WORDS_BIG_ENDIAN.
319 The order of words in regs is the same as in memory. */
320 rtx temp
= gen_rtx_MEM (regno_save_mode
[i
+k
][1],
321 XEXP (regno_save_mem
[i
][j
], 0));
323 regno_save_mem
[i
+k
][1]
324 = adj_offsettable_operand (temp
, k
* UNITS_PER_WORD
);
329 /* Find the places where hard regs are live across calls and save them. */
331 save_call_clobbered_regs ()
333 struct insn_chain
*chain
, *next
;
335 CLEAR_HARD_REG_SET (hard_regs_saved
);
338 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
340 rtx insn
= chain
->insn
;
341 enum rtx_code code
= GET_CODE (insn
);
345 if (chain
->is_caller_save_insn
)
348 if (GET_RTX_CLASS (code
) == 'i')
350 /* If some registers have been saved, see if INSN references
351 any of them. We must restore them before the insn if so. */
357 if (code
== JUMP_INSN
)
358 /* Restore all registers if this is a JUMP_INSN. */
359 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
362 CLEAR_HARD_REG_SET (referenced_regs
);
363 mark_referenced_regs (PATTERN (insn
));
364 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
367 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
368 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
369 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
);
372 if (code
== CALL_INSN
)
376 HARD_REG_SET hard_regs_to_save
;
378 /* Use the register life information in CHAIN to compute which
379 regs are live before the call. */
380 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
, chain
->live_before
);
381 compute_use_by_pseudos (&hard_regs_to_save
, chain
->live_before
);
383 /* Record all registers set in this call insn. These don't need
385 CLEAR_HARD_REG_SET (this_insn_sets
);
386 note_stores (PATTERN (insn
), mark_set_regs
);
388 /* Compute which hard regs must be saved before this call. */
389 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
390 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
391 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
392 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
394 /* Registers used for function parameters need not be saved. */
395 for (x
= CALL_INSN_FUNCTION_USAGE (insn
); x
!= 0;
400 if (GET_CODE (XEXP (x
, 0)) != USE
)
402 y
= XEXP (XEXP (x
, 0), 0);
403 if (GET_CODE (y
) != REG
)
406 if (REGNO (y
) >= FIRST_PSEUDO_REGISTER
)
408 nregs
= HARD_REGNO_NREGS (regno
, GET_MODE (y
));
410 CLEAR_HARD_REG_BIT (hard_regs_to_save
, regno
+ nregs
);
413 /* Neither do registers for which we find a death note. */
414 for (x
= REG_NOTES (insn
); x
!= 0; x
= XEXP (x
, 1))
418 if (REG_NOTE_KIND (x
) != REG_DEAD
)
420 if (GET_CODE (y
) != REG
)
424 if (regno
>= FIRST_PSEUDO_REGISTER
)
425 regno
= reg_renumber
[regno
];
428 nregs
= HARD_REGNO_NREGS (regno
, GET_MODE (y
));
430 CLEAR_HARD_REG_BIT (hard_regs_to_save
, regno
+ nregs
);
433 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
434 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
435 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
);
437 /* Must recompute n_regs_saved. */
439 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
440 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
445 if (chain
->next
== 0 || chain
->next
->block
> chain
->block
)
448 /* At the end of the basic block, we must restore any registers that
449 remain saved. If the last insn in the block is a JUMP_INSN, put
450 the restore before the insn, otherwise, put it after the insn. */
453 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
454 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
455 regno
+= insert_restore (chain
, GET_CODE (insn
) == JUMP_INSN
,
456 regno
, MOVE_MAX_WORDS
);
461 /* Here from note_stores when an insn stores a value in a register.
462 Set the proper bit or bits in this_insn_sets. All pseudos that have
463 been assigned hard regs have had their register number changed already,
464 so we can ignore pseudos. */
466 mark_set_regs (reg
, setter
)
468 rtx setter ATTRIBUTE_UNUSED
;
470 register int regno
, endregno
, i
;
471 enum machine_mode mode
= GET_MODE (reg
);
474 if (GET_CODE (reg
) == SUBREG
)
476 word
= SUBREG_WORD (reg
);
477 reg
= SUBREG_REG (reg
);
480 if (GET_CODE (reg
) != REG
|| REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
483 regno
= REGNO (reg
) + word
;
484 endregno
= regno
+ HARD_REGNO_NREGS (regno
, mode
);
486 for (i
= regno
; i
< endregno
; i
++)
487 SET_HARD_REG_BIT (this_insn_sets
, i
);
490 /* Walk X and record all referenced registers in REFERENCED_REGS. */
492 mark_referenced_regs (x
)
495 enum rtx_code code
= GET_CODE (x
);
500 mark_referenced_regs (SET_SRC (x
));
501 if (code
== SET
|| code
== CLOBBER
)
505 if (code
== REG
|| code
== PC
|| code
== CC0
506 || (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
509 if (code
== MEM
|| code
== SUBREG
)
517 int regno
= REGNO (x
);
518 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
519 : reg_renumber
[regno
]);
523 int nregs
= HARD_REGNO_NREGS (hardregno
, GET_MODE (x
));
525 SET_HARD_REG_BIT (referenced_regs
, hardregno
+ nregs
);
527 /* If this is a pseudo that did not get a hard register, scan its
528 memory location, since it might involve the use of another
529 register, which might be saved. */
530 else if (reg_equiv_mem
[regno
] != 0)
531 mark_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0));
532 else if (reg_equiv_address
[regno
] != 0)
533 mark_referenced_regs (reg_equiv_address
[regno
]);
537 fmt
= GET_RTX_FORMAT (code
);
538 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
541 mark_referenced_regs (XEXP (x
, i
));
542 else if (fmt
[i
] == 'E')
543 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
544 mark_referenced_regs (XVECEXP (x
, i
, j
));
548 /* Insert a sequence of insns to restore. Place these insns in front of
549 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
550 the maximum number of registers which should be restored during this call.
551 It should never be less than 1 since we only work with entire registers.
553 Note that we have verified in init_caller_save that we can do this
554 with a simple SET, so use it. Set INSN_CODE to what we save there
555 since the address might not be valid so the insn might not be recognized.
556 These insns will be reloaded and have register elimination done by
557 find_reload, so we need not worry about that here.
559 Return the extra number of registers saved. */
562 insert_restore (chain
, before_p
, regno
, maxrestore
)
563 struct insn_chain
*chain
;
570 enum insn_code code
= CODE_FOR_nothing
;
573 /* A common failure mode if register status is not correct in the RTL
574 is for this routine to be called with a REGNO we didn't expect to
575 save. That will cause us to write an insn with a (nil) SET_DEST
576 or SET_SRC. Instead of doing so and causing a crash later, check
577 for this common case and abort here instead. This will remove one
578 step in debugging such problems. */
580 if (regno_save_mem
[regno
][1] == 0)
583 /* Get the pattern to emit and update our status.
585 See if we can restore `maxrestore' registers at once. Work
586 backwards to the single register case. */
587 for (i
= maxrestore
; i
> 0; i
--)
592 if (regno_save_mem
[regno
][i
] == 0)
595 for (j
= 0; j
< i
; j
++)
596 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
601 /* Must do this one restore at a time */
605 pat
= gen_rtx_SET (VOIDmode
,
606 gen_rtx_REG (GET_MODE (regno_save_mem
[regno
][i
]),
608 regno_save_mem
[regno
][i
]);
609 code
= reg_restore_code
[regno
][i
];
611 /* Clear status for all registers we restored. */
612 for (k
= 0; k
< i
; k
++)
614 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
622 insert_one_insn (chain
, before_p
, code
, pat
);
624 /* Tell our callers how many extra registers we saved/restored */
628 /* Like insert_restore above, but save registers instead. */
630 insert_save (chain
, before_p
, regno
, to_save
)
631 struct insn_chain
*chain
;
634 HARD_REG_SET
*to_save
;
638 enum insn_code code
= CODE_FOR_nothing
;
641 /* A common failure mode if register status is not correct in the RTL
642 is for this routine to be called with a REGNO we didn't expect to
643 save. That will cause us to write an insn with a (nil) SET_DEST
644 or SET_SRC. Instead of doing so and causing a crash later, check
645 for this common case and abort here instead. This will remove one
646 step in debugging such problems. */
648 if (regno_save_mem
[regno
][1] == 0)
651 /* Get the pattern to emit and update our status.
653 See if we can save several registers with a single instruction.
654 Work backwards to the single register case. */
655 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
659 if (regno_save_mem
[regno
][i
] == 0)
662 for (j
= 0; j
< i
; j
++)
663 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
668 /* Must do this one save at a time */
672 pat
= gen_rtx_SET (VOIDmode
, regno_save_mem
[regno
][i
],
673 gen_rtx_REG (GET_MODE (regno_save_mem
[regno
][i
]),
675 code
= reg_save_code
[regno
][i
];
677 /* Set hard_regs_saved for all the registers we saved. */
678 for (k
= 0; k
< i
; k
++)
680 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
688 insert_one_insn (chain
, before_p
, code
, pat
);
690 /* Tell our callers how many extra registers we saved/restored */
694 /* Emit a new caller-save insn and set the code. */
696 insert_one_insn (chain
, before_p
, code
, pat
)
697 struct insn_chain
*chain
;
702 rtx insn
= chain
->insn
;
703 struct insn_chain
*new;
706 /* If INSN references CC0, put our insns in front of the insn that sets
707 CC0. This is always safe, since the only way we could be passed an
708 insn that references CC0 is for a restore, and doing a restore earlier
709 isn't a problem. We do, however, assume here that CALL_INSNs don't
710 reference CC0. Guard against non-INSN's like CODE_LABEL. */
712 if ((GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
714 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
715 chain
= chain
->prev
, insn
= chain
->insn
;
718 new = new_insn_chain ();
721 new->prev
= chain
->prev
;
723 new->prev
->next
= new;
725 reload_insn_chain
= new;
729 new->insn
= emit_insn_before (pat
, insn
);
730 if (chain
->insn
== basic_block_head
[chain
->block
])
731 basic_block_head
[chain
->block
] = new->insn
;
735 new->next
= chain
->next
;
737 new->next
->prev
= new;
740 new->insn
= emit_insn_after (pat
, insn
);
741 if (chain
->insn
== basic_block_end
[chain
->block
])
742 basic_block_end
[chain
->block
] = new->insn
;
744 new->block
= chain
->block
;
745 new->is_caller_save_insn
= 1;
747 INSN_CODE (new->insn
) = code
;