1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 #include "insn-config.h"
26 #include "hard-reg-set.h"
28 #include "basic-block.h"
33 #define MAX_MOVE_MAX MOVE_MAX
36 #ifndef MIN_UNITS_PER_WORD
37 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
40 /* Modes for each hard register that we can save. The smallest mode is wide
41 enough to save the entire contents of the register. When saving the
42 register because it is live we first try to save in multi-register modes.
43 If that is not possible the save is done one register at a time. */
45 static enum machine_mode
46 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
48 /* For each hard register, a place on the stack where it can be saved,
52 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
54 /* We will only make a register eligible for caller-save if it can be
55 saved in its widest mode with a simple SET insn as long as the memory
56 address is valid. We record the INSN_CODE is those insns here since
57 when we emit them, the addresses might not be valid, so they might not
61 reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
63 reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
65 /* Set of hard regs currently live (during scan of all insns). */
67 static HARD_REG_SET hard_regs_live
;
69 /* Set of hard regs currently residing in save area (during insn scan). */
71 static HARD_REG_SET hard_regs_saved
;
73 /* Set of hard regs which need to be restored before referenced. */
75 static HARD_REG_SET hard_regs_need_restore
;
77 /* Number of registers currently in hard_regs_saved. */
81 static void set_reg_live
PROTO((rtx
, rtx
));
82 static void clear_reg_live
PROTO((rtx
));
83 static void restore_referenced_regs
PROTO((rtx
, rtx
, enum machine_mode
));
84 static int insert_save_restore
PROTO((rtx
, int, int,
85 enum machine_mode
, int));
87 /* Initialize for caller-save.
89 Look at all the hard registers that are used by a call and for which
90 regclass.c has not already excluded from being used across a call.
92 Ensure that we can find a mode to save the register and that there is a
93 simple insn to save and restore the register. This latter check avoids
94 problems that would occur if we tried to save the MQ register of some
95 machines directly into memory. */
100 char *first_obj
= (char *) oballoc (0);
106 /* First find all the registers that we need to deal with and all
107 the modes that they can have. If we can't find a mode to use,
108 we can't have the register live over calls. */
110 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
112 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
114 for (j
= 1; j
<= MOVE_MAX
/ UNITS_PER_WORD
; j
++)
116 regno_save_mode
[i
][j
] = choose_hard_reg_mode (i
, j
);
117 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
119 call_fixed_regs
[i
] = 1;
120 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
125 regno_save_mode
[i
][1] = VOIDmode
;
128 /* The following code tries to approximate the conditions under which
129 we can easily save and restore a register without scratch registers or
130 other complexities. It will usually work, except under conditions where
131 the validity of an insn operand is dependent on the address offset.
132 No such cases are currently known.
134 We first find a typical offset from some BASE_REG_CLASS register.
135 This address is chosen by finding the first register in the class
136 and by finding the smallest power of two that is a valid offset from
137 that register in every mode we will use to save registers. */
139 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
140 if (TEST_HARD_REG_BIT (reg_class_contents
[(int) BASE_REG_CLASS
], i
))
143 if (i
== FIRST_PSEUDO_REGISTER
)
146 addr_reg
= gen_rtx (REG
, Pmode
, i
);
148 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
150 address
= gen_rtx (PLUS
, Pmode
, addr_reg
, GEN_INT (offset
));
152 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
153 if (regno_save_mode
[i
][1] != VOIDmode
154 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
157 if (i
== FIRST_PSEUDO_REGISTER
)
161 /* If we didn't find a valid address, we must use register indirect. */
165 /* Next we try to form an insn to save and restore the register. We
166 see if such an insn is recognized and meets its constraints. */
170 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
171 for (j
= 1; j
<= MOVE_MAX
/ UNITS_PER_WORD
; j
++)
172 if (regno_save_mode
[i
][j
] != VOIDmode
)
174 rtx mem
= gen_rtx (MEM
, regno_save_mode
[i
][j
], address
);
175 rtx reg
= gen_rtx (REG
, regno_save_mode
[i
][j
], i
);
176 rtx savepat
= gen_rtx (SET
, VOIDmode
, mem
, reg
);
177 rtx restpat
= gen_rtx (SET
, VOIDmode
, reg
, mem
);
178 rtx saveinsn
= emit_insn (savepat
);
179 rtx restinsn
= emit_insn (restpat
);
182 reg_save_code
[i
][j
] = recog_memoized (saveinsn
);
183 reg_restore_code
[i
][j
] = recog_memoized (restinsn
);
185 /* Now extract both insns and see if we can meet their constraints. */
186 ok
= (reg_save_code
[i
][j
] != -1 && reg_restore_code
[i
][j
] != -1);
189 insn_extract (saveinsn
);
190 ok
= constrain_operands (reg_save_code
[i
][j
], 1);
191 insn_extract (restinsn
);
192 ok
&= constrain_operands (reg_restore_code
[i
][j
], 1);
197 regno_save_mode
[i
][j
] = VOIDmode
;
200 call_fixed_regs
[i
] = 1;
201 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
211 /* Initialize save areas by showing that we haven't allocated any yet. */
218 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
219 for (j
= 1; j
<= MOVE_MAX
/ UNITS_PER_WORD
; j
++)
220 regno_save_mem
[i
][j
] = 0;
223 /* Allocate save areas for any hard registers that might need saving.
224 We take a conservative approach here and look for call-clobbered hard
225 registers that are assigned to pseudos that cross calls. This may
226 overestimate slightly (especially if some of these registers are later
227 used as spill registers), but it should not be significant.
229 Then perform register elimination in the addresses of the save area
230 locations; return 1 if all eliminated addresses are strictly valid.
231 We assume that our caller has set up the elimination table to the
232 worst (largest) possible offsets.
234 Set *PCHANGED to 1 if we had to allocate some memory for the save area.
238 In the fallback case we should iterate backwards across all possible
239 modes for the save, choosing the largest available one instead of
240 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
242 We do not try to use "move multiple" instructions that exist
243 on some machines (such as the 68k moveml). It could be a win to try
244 and use them when possible. The hard part is doing it in a way that is
245 machine independent since they might be saving non-consecutive
246 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
249 setup_save_areas (pchanged
)
253 HARD_REG_SET hard_regs_used
;
257 /* Allocate space in the save area for the largest multi-register
258 pseudos first, then work backwards to single register
261 /* Find and record all call-used hard-registers in this function. */
262 CLEAR_HARD_REG_SET (hard_regs_used
);
263 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
264 if (reg_renumber
[i
] >= 0 && reg_n_calls_crossed
[i
] > 0)
266 int regno
= reg_renumber
[i
];
268 = regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (regno_reg_rtx
[i
]));
269 int nregs
= endregno
- regno
;
271 for (j
= 0; j
< nregs
; j
++)
273 if (call_used_regs
[regno
+j
])
274 SET_HARD_REG_BIT (hard_regs_used
, regno
+j
);
278 /* Now run through all the call-used hard-registers and allocate
279 space for them in the caller-save area. Try to allocate space
280 in a manner which allows multi-register saves/restores to be done. */
282 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
283 for (j
= MOVE_MAX
/ UNITS_PER_WORD
; j
> 0; j
--)
288 /* If no mode exists for this size, try another. Also break out
289 if we have already saved this hard register. */
290 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
293 /* See if any register in this group has been saved. */
295 for (k
= 0; k
< j
; k
++)
296 if (regno_save_mem
[i
+ k
][1])
304 for (k
= 0; k
< j
; k
++)
307 ok
&= (TEST_HARD_REG_BIT (hard_regs_used
, regno
) != 0);
310 /* We have found an acceptable mode to store in. */
315 = assign_stack_local (regno_save_mode
[i
][j
],
316 GET_MODE_SIZE (regno_save_mode
[i
][j
]), 0);
318 /* Setup single word save area just in case... */
319 for (k
= 0; k
< j
; k
++)
321 /* This should not depend on WORDS_BIG_ENDIAN.
322 The order of words in regs is the same as in memory. */
323 rtx temp
= gen_rtx (MEM
, regno_save_mode
[i
+k
][1],
324 XEXP (regno_save_mem
[i
][j
], 0));
326 regno_save_mem
[i
+k
][1]
327 = adj_offsettable_operand (temp
, k
* UNITS_PER_WORD
);
333 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
334 for (j
= 1; j
<= MOVE_MAX
/ UNITS_PER_WORD
; j
++)
335 if (regno_save_mem
[i
][j
] != 0)
336 ok
&= strict_memory_address_p (GET_MODE (regno_save_mem
[i
][j
]),
337 XEXP (eliminate_regs (regno_save_mem
[i
][j
], 0, NULL_RTX
), 0));
342 /* Find the places where hard regs are live across calls and save them.
344 INSN_MODE is the mode to assign to any insns that we add. This is used
345 by reload to determine whether or not reloads or register eliminations
346 need be done on these insns. */
349 save_call_clobbered_regs (insn_mode
)
350 enum machine_mode insn_mode
;
355 for (b
= 0; b
< n_basic_blocks
; b
++)
357 regset regs_live
= basic_block_live_at_start
[b
];
358 rtx prev_block_last
= PREV_INSN (basic_block_head
[b
]);
363 /* Compute hard regs live at start of block -- this is the
364 real hard regs marked live, plus live pseudo regs that
365 have been renumbered to hard regs. No registers have yet been
366 saved because we restore all of them before the end of the basic
370 hard_regs_live
= *regs_live
;
372 COPY_HARD_REG_SET (hard_regs_live
, regs_live
);
375 CLEAR_HARD_REG_SET (hard_regs_saved
);
376 CLEAR_HARD_REG_SET (hard_regs_need_restore
);
379 for (offset
= 0, i
= 0; offset
< regset_size
; offset
++)
381 if (regs_live
[offset
] == 0)
382 i
+= REGSET_ELT_BITS
;
384 for (bit
= 1; bit
&& i
< max_regno
; bit
<<= 1, i
++)
385 if ((regs_live
[offset
] & bit
)
386 && (regno
= reg_renumber
[i
]) >= 0)
388 j
< regno
+ HARD_REGNO_NREGS (regno
,
389 PSEUDO_REGNO_MODE (i
));
391 SET_HARD_REG_BIT (hard_regs_live
, j
);
395 /* Now scan the insns in the block, keeping track of what hard
396 regs are live as we go. When we see a call, save the live
397 call-clobbered hard regs. */
399 for (insn
= basic_block_head
[b
]; ; insn
= NEXT_INSN (insn
))
401 RTX_CODE code
= GET_CODE (insn
);
403 if (GET_RTX_CLASS (code
) == 'i')
407 /* If some registers have been saved, see if INSN references
408 any of them. We must restore them before the insn if so. */
411 restore_referenced_regs (PATTERN (insn
), insn
, insn_mode
);
413 /* NB: the normal procedure is to first enliven any
414 registers set by insn, then deaden any registers that
415 had their last use at insn. This is incorrect now,
416 since multiple pseudos may have been mapped to the
417 same hard reg, and the death notes are ambiguous. So
418 it must be done in the other, safe, order. */
420 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
421 if (REG_NOTE_KIND (link
) == REG_DEAD
)
422 clear_reg_live (XEXP (link
, 0));
424 /* When we reach a call, we need to save all registers that are
425 live, call-used, not fixed, and not already saved. We must
426 test at this point because registers that die in a CALL_INSN
427 are not live across the call and likewise for registers that
428 are born in the CALL_INSN.
430 If registers are filled with parameters for this function,
431 and some of these are also being set by this function, then
432 they will not appear to die (no REG_DEAD note for them),
433 to check if in fact they do, collect the set registers in
434 hard_regs_live first. */
436 if (code
== CALL_INSN
)
438 HARD_REG_SET this_call_sets
;
440 HARD_REG_SET old_hard_regs_live
;
442 /* Save the hard_regs_live information. */
443 COPY_HARD_REG_SET (old_hard_regs_live
, hard_regs_live
);
445 /* Now calculate hard_regs_live for this CALL_INSN
447 CLEAR_HARD_REG_SET (hard_regs_live
);
448 note_stores (PATTERN (insn
), set_reg_live
);
449 COPY_HARD_REG_SET (this_call_sets
, hard_regs_live
);
451 /* Restore the hard_regs_live information. */
452 COPY_HARD_REG_SET (hard_regs_live
, old_hard_regs_live
);
455 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
456 if (call_used_regs
[regno
] && ! call_fixed_regs
[regno
]
457 && TEST_HARD_REG_BIT (hard_regs_live
, regno
)
458 /* It must not be set by this instruction. */
459 && ! TEST_HARD_REG_BIT (this_call_sets
, regno
)
460 && ! TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
461 regno
+= insert_save_restore (insn
, 1, regno
,
464 /* Put the information for this CALL_INSN on top of what
466 IOR_HARD_REG_SET (hard_regs_live
, this_call_sets
);
467 COPY_HARD_REG_SET (hard_regs_need_restore
, hard_regs_saved
);
469 /* Must recompute n_regs_saved. */
471 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
472 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
476 note_stores (PATTERN (insn
), set_reg_live
);
478 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
479 if (REG_NOTE_KIND (link
) == REG_UNUSED
)
480 clear_reg_live (XEXP (link
, 0));
483 if (insn
== basic_block_end
[b
])
487 /* At the end of the basic block, we must restore any registers that
488 remain saved. If the last insn in the block is a JUMP_INSN, put
489 the restore before the insn, otherwise, put it after the insn. */
492 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
493 if (TEST_HARD_REG_BIT (hard_regs_need_restore
, regno
))
494 regno
+= insert_save_restore ((GET_CODE (insn
) == JUMP_INSN
495 ? insn
: NEXT_INSN (insn
)), 0,
496 regno
, insn_mode
, MOVE_MAX
/ UNITS_PER_WORD
);
498 /* If we added any insns at the start of the block, update the start
499 of the block to point at those insns. */
500 basic_block_head
[b
] = NEXT_INSN (prev_block_last
);
504 /* Here from note_stores when an insn stores a value in a register.
505 Set the proper bit or bits in hard_regs_live. All pseudos that have
506 been assigned hard regs have had their register number changed already,
507 so we can ignore pseudos. */
510 set_reg_live (reg
, setter
)
513 register int regno
, endregno
, i
;
514 enum machine_mode mode
= GET_MODE (reg
);
517 if (GET_CODE (reg
) == SUBREG
)
519 word
= SUBREG_WORD (reg
);
520 reg
= SUBREG_REG (reg
);
523 if (GET_CODE (reg
) != REG
|| REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
526 regno
= REGNO (reg
) + word
;
527 endregno
= regno
+ HARD_REGNO_NREGS (regno
, mode
);
529 for (i
= regno
; i
< endregno
; i
++)
531 SET_HARD_REG_BIT (hard_regs_live
, i
);
532 CLEAR_HARD_REG_BIT (hard_regs_saved
, i
);
533 CLEAR_HARD_REG_BIT (hard_regs_need_restore
, i
);
537 /* Here when a REG_DEAD note records the last use of a reg. Clear
538 the appropriate bit or bits in hard_regs_live. Again we can ignore
545 register int regno
, endregno
, i
;
547 if (GET_CODE (reg
) != REG
|| REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
551 endregno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (reg
));
553 for (i
= regno
; i
< endregno
; i
++)
555 CLEAR_HARD_REG_BIT (hard_regs_live
, i
);
556 CLEAR_HARD_REG_BIT (hard_regs_need_restore
, i
);
557 CLEAR_HARD_REG_BIT (hard_regs_saved
, i
);
561 /* If any register currently residing in the save area is referenced in X,
562 which is part of INSN, emit code to restore the register in front of INSN.
563 INSN_MODE is the mode to assign to any insns that we add. */
566 restore_referenced_regs (x
, insn
, insn_mode
)
569 enum machine_mode insn_mode
;
571 enum rtx_code code
= GET_CODE (x
);
580 int regno
= REGNO (x
);
582 /* If this is a pseudo, scan its memory location, since it might
583 involve the use of another register, which might be saved. */
585 if (regno
>= FIRST_PSEUDO_REGISTER
586 && reg_equiv_mem
[regno
] != 0)
587 restore_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0),
589 else if (regno
>= FIRST_PSEUDO_REGISTER
590 && reg_equiv_address
[regno
] != 0)
591 restore_referenced_regs (reg_equiv_address
[regno
],
594 /* Otherwise if this is a hard register, restore any piece of it that
595 is currently saved. */
597 else if (regno
< FIRST_PSEUDO_REGISTER
)
599 int numregs
= HARD_REGNO_NREGS (regno
, GET_MODE (x
));
600 /* Save at most SAVEREGS at a time. This can not be larger than
601 MOVE_MAX, because that causes insert_save_restore to fail. */
602 int saveregs
= MIN (numregs
, MOVE_MAX
/ UNITS_PER_WORD
);
603 int endregno
= regno
+ numregs
;
605 for (i
= regno
; i
< endregno
; i
++)
606 if (TEST_HARD_REG_BIT (hard_regs_need_restore
, i
))
607 i
+= insert_save_restore (insn
, 0, i
, insn_mode
, saveregs
);
613 fmt
= GET_RTX_FORMAT (code
);
614 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
617 restore_referenced_regs (XEXP (x
, i
), insn
, insn_mode
);
618 else if (fmt
[i
] == 'E')
619 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
620 restore_referenced_regs (XVECEXP (x
, i
, j
), insn
, insn_mode
);
624 /* Insert a sequence of insns to save or restore, SAVE_P says which,
625 REGNO. Place these insns in front of INSN. INSN_MODE is the mode
626 to assign to these insns. MAXRESTORE is the maximum number of registers
627 which should be restored during this call (when SAVE_P == 0). It should
628 never be less than 1 since we only work with entire registers.
630 Note that we have verified in init_caller_save that we can do this
631 with a simple SET, so use it. Set INSN_CODE to what we save there
632 since the address might not be valid so the insn might not be recognized.
633 These insns will be reloaded and have register elimination done by
634 find_reload, so we need not worry about that here.
636 Return the extra number of registers saved. */
639 insert_save_restore (insn
, save_p
, regno
, insn_mode
, maxrestore
)
643 enum machine_mode insn_mode
;
650 /* A common failure mode if register status is not correct in the RTL
651 is for this routine to be called with a REGNO we didn't expect to
652 save. That will cause us to write an insn with a (nil) SET_DEST
653 or SET_SRC. Instead of doing so and causing a crash later, check
654 for this common case and abort here instead. This will remove one
655 step in debugging such problems. */
657 if (regno_save_mem
[regno
][1] == 0)
661 /* If INSN references CC0, put our insns in front of the insn that sets
662 CC0. This is always safe, since the only way we could be passed an
663 insn that references CC0 is for a restore, and doing a restore earlier
664 isn't a problem. We do, however, assume here that CALL_INSNs don't
665 reference CC0. Guard against non-INSN's like CODE_LABEL. */
667 if ((GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
668 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
669 insn
= prev_nonnote_insn (insn
);
672 /* Get the pattern to emit and update our status. */
678 /* See if we can save several registers with a single instruction.
679 Work backwards to the single register case. */
680 for (i
= MOVE_MAX
/ UNITS_PER_WORD
; i
> 0; i
--)
683 if (regno_save_mem
[regno
][i
] != 0)
684 for (j
= 0; j
< i
; j
++)
686 if (! call_used_regs
[regno
+ j
] || call_fixed_regs
[regno
+ j
]
687 || ! TEST_HARD_REG_BIT (hard_regs_live
, regno
+ j
)
688 || TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
694 /* Must do this one save at a time */
698 pat
= gen_rtx (SET
, VOIDmode
, regno_save_mem
[regno
][i
],
699 gen_rtx (REG
, GET_MODE (regno_save_mem
[regno
][i
]), regno
));
700 code
= reg_save_code
[regno
][i
];
702 /* Set hard_regs_saved for all the registers we saved. */
703 for (k
= 0; k
< i
; k
++)
705 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
706 SET_HARD_REG_BIT (hard_regs_need_restore
, regno
+ k
);
719 /* See if we can restore `maxrestore' registers at once. Work
720 backwards to the single register case. */
721 for (i
= maxrestore
; i
> 0; i
--)
724 if (regno_save_mem
[regno
][i
])
725 for (j
= 0; j
< i
; j
++)
727 if (! TEST_HARD_REG_BIT (hard_regs_need_restore
, regno
+ j
))
733 /* Must do this one restore at a time */
737 pat
= gen_rtx (SET
, VOIDmode
,
738 gen_rtx (REG
, GET_MODE (regno_save_mem
[regno
][i
]),
740 regno_save_mem
[regno
][i
]);
741 code
= reg_restore_code
[regno
][i
];
744 /* Clear status for all registers we restored. */
745 for (k
= 0; k
< i
; k
++)
747 CLEAR_HARD_REG_BIT (hard_regs_need_restore
, regno
+ k
);
755 /* Emit the insn and set the code and mode. */
757 insn
= emit_insn_before (pat
, insn
);
758 PUT_MODE (insn
, insn_mode
);
759 INSN_CODE (insn
) = code
;
761 /* Tell our callers how many extra registers we saved/restored */