gcc/common/config/i386/i386-common.c

   1 /* IA-32 common hooks.
   2    Copyright (C) 1988-2014 Free Software Foundation, Inc.
   3
   4 This file is part of GCC.
   5
   6 GCC is free software; you can redistribute it and/or modify
   7 it under the terms of the GNU General Public License as published by
   8 the Free Software Foundation; either version 3, or (at your option)
   9 any later version.
  10
  11 GCC is distributed in the hope that it will be useful,
  12 but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 GNU General Public License for more details.
  15
  16 You should have received a copy of the GNU General Public License
  17 along with GCC; see the file COPYING3.  If not see
  18 <http://www.gnu.org/licenses/>.  */
  19
  20 #include "config.h"
  21 #include "system.h"
  22 #include "coretypes.h"
  23 #include "diagnostic-core.h"
  24 #include "tm.h"
  25 #include "tm_p.h"
  26 #include "common/common-target.h"
  27 #include "common/common-target-def.h"
  28 #include "opts.h"
  29 #include "flags.h"
  30
  31 /* Define a set of ISAs which are available when a given ISA is
  32    enabled.  MMX and SSE ISAs are handled separately.  */
  33
  34 #define OPTION_MASK_ISA_MMX_SET OPTION_MASK_ISA_MMX
  35 #define OPTION_MASK_ISA_3DNOW_SET \
  36   (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_MMX_SET)
  37
  38 #define OPTION_MASK_ISA_SSE_SET OPTION_MASK_ISA_SSE
  39 #define OPTION_MASK_ISA_SSE2_SET \
  40   (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE_SET)
  41 #define OPTION_MASK_ISA_SSE3_SET \
  42   (OPTION_MASK_ISA_SSE3 | OPTION_MASK_ISA_SSE2_SET)
  43 #define OPTION_MASK_ISA_SSSE3_SET \
  44   (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE3_SET)
  45 #define OPTION_MASK_ISA_SSE4_1_SET \
  46   (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSSE3_SET)
  47 #define OPTION_MASK_ISA_SSE4_2_SET \
  48   (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_SSE4_1_SET)
  49 #define OPTION_MASK_ISA_AVX_SET \
  50   (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_SSE4_2_SET \
  51    | OPTION_MASK_ISA_XSAVE_SET)
  52 #define OPTION_MASK_ISA_FMA_SET \
  53   (OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_AVX_SET)
  54 #define OPTION_MASK_ISA_AVX2_SET \
  55   (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET)
  56 #define OPTION_MASK_ISA_FXSR_SET OPTION_MASK_ISA_FXSR
  57 #define OPTION_MASK_ISA_XSAVE_SET OPTION_MASK_ISA_XSAVE
  58 #define OPTION_MASK_ISA_XSAVEOPT_SET \
  59   (OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_XSAVE)
  60 #define OPTION_MASK_ISA_AVX512F_SET \
  61   (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX2_SET)
  62 #define OPTION_MASK_ISA_AVX512CD_SET \
  63   (OPTION_MASK_ISA_AVX512CD | OPTION_MASK_ISA_AVX512F_SET)
  64 #define OPTION_MASK_ISA_AVX512PF_SET \
  65   (OPTION_MASK_ISA_AVX512PF | OPTION_MASK_ISA_AVX512F_SET)
  66 #define OPTION_MASK_ISA_AVX512ER_SET \
  67   (OPTION_MASK_ISA_AVX512ER | OPTION_MASK_ISA_AVX512F_SET)
  68 #define OPTION_MASK_ISA_AVX512DQ_SET \
  69   (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512F_SET)
  70 #define OPTION_MASK_ISA_AVX512BW_SET \
  71   (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512F_SET)
  72 #define OPTION_MASK_ISA_AVX512VL_SET \
  73   (OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512F_SET)
  74 #define OPTION_MASK_ISA_AVX512IFMA_SET \
  75   (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET)
  76 #define OPTION_MASK_ISA_AVX512VBMI_SET \
  77   (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512F_SET)
  78 #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
  79 #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
  80 #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
  81 #define OPTION_MASK_ISA_ADX_SET OPTION_MASK_ISA_ADX
  82 #define OPTION_MASK_ISA_PREFETCHWT1_SET OPTION_MASK_ISA_PREFETCHWT1
  83 #define OPTION_MASK_ISA_CLFLUSHOPT_SET OPTION_MASK_ISA_CLFLUSHOPT
  84 #define OPTION_MASK_ISA_XSAVES_SET \
  85   (OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_XSAVE)
  86 #define OPTION_MASK_ISA_XSAVEC_SET \
  87   (OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
  88 #define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
  89
  90 /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
  91    as -msse4.2.  */
  92 #define OPTION_MASK_ISA_SSE4_SET OPTION_MASK_ISA_SSE4_2_SET
  93
  94 #define OPTION_MASK_ISA_SSE4A_SET \
  95   (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_SSE3_SET)
  96 #define OPTION_MASK_ISA_FMA4_SET \
  97   (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_SSE4A_SET \
  98    | OPTION_MASK_ISA_AVX_SET)
  99 #define OPTION_MASK_ISA_XOP_SET \
 100   (OPTION_MASK_ISA_XOP | OPTION_MASK_ISA_FMA4_SET)
 101 #define OPTION_MASK_ISA_LWP_SET \
 102   OPTION_MASK_ISA_LWP
 103
 104 /* AES, SHA and PCLMUL need SSE2 because they use xmm registers.  */
 105 #define OPTION_MASK_ISA_AES_SET \
 106   (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET)
 107 #define OPTION_MASK_ISA_SHA_SET \
 108   (OPTION_MASK_ISA_SHA | OPTION_MASK_ISA_SSE2_SET)
 109 #define OPTION_MASK_ISA_PCLMUL_SET \
 110   (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET)
 111
 112 #define OPTION_MASK_ISA_ABM_SET \
 113   (OPTION_MASK_ISA_ABM | OPTION_MASK_ISA_POPCNT)
 114
 115 #define OPTION_MASK_ISA_BMI_SET OPTION_MASK_ISA_BMI
 116 #define OPTION_MASK_ISA_BMI2_SET OPTION_MASK_ISA_BMI2
 117 #define OPTION_MASK_ISA_LZCNT_SET OPTION_MASK_ISA_LZCNT
 118 #define OPTION_MASK_ISA_TBM_SET OPTION_MASK_ISA_TBM
 119 #define OPTION_MASK_ISA_POPCNT_SET OPTION_MASK_ISA_POPCNT
 120 #define OPTION_MASK_ISA_CX16_SET OPTION_MASK_ISA_CX16
 121 #define OPTION_MASK_ISA_SAHF_SET OPTION_MASK_ISA_SAHF
 122 #define OPTION_MASK_ISA_MOVBE_SET OPTION_MASK_ISA_MOVBE
 123 #define OPTION_MASK_ISA_CRC32_SET OPTION_MASK_ISA_CRC32
 124
 125 #define OPTION_MASK_ISA_FSGSBASE_SET OPTION_MASK_ISA_FSGSBASE
 126 #define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
 127 #define OPTION_MASK_ISA_F16C_SET \
 128   (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
 129
 130 /* Define a set of ISAs which aren't available when a given ISA is
 131    disabled.  MMX and SSE ISAs are handled separately.  */
 132
 133 #define OPTION_MASK_ISA_MMX_UNSET \
 134   (OPTION_MASK_ISA_MMX | OPTION_MASK_ISA_3DNOW_UNSET)
 135 #define OPTION_MASK_ISA_3DNOW_UNSET \
 136   (OPTION_MASK_ISA_3DNOW | OPTION_MASK_ISA_3DNOW_A_UNSET)
 137 #define OPTION_MASK_ISA_3DNOW_A_UNSET OPTION_MASK_ISA_3DNOW_A
 138
 139 #define OPTION_MASK_ISA_SSE_UNSET \
 140   (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_SSE2_UNSET)
 141 #define OPTION_MASK_ISA_SSE2_UNSET \
 142   (OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_SSE3_UNSET)
 143 #define OPTION_MASK_ISA_SSE3_UNSET \
 144   (OPTION_MASK_ISA_SSE3 \
 145    | OPTION_MASK_ISA_SSSE3_UNSET \
 146    | OPTION_MASK_ISA_SSE4A_UNSET )
 147 #define OPTION_MASK_ISA_SSSE3_UNSET \
 148   (OPTION_MASK_ISA_SSSE3 | OPTION_MASK_ISA_SSE4_1_UNSET)
 149 #define OPTION_MASK_ISA_SSE4_1_UNSET \
 150   (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_SSE4_2_UNSET)
 151 #define OPTION_MASK_ISA_SSE4_2_UNSET \
 152   (OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_AVX_UNSET )
 153 #define OPTION_MASK_ISA_AVX_UNSET \
 154   (OPTION_MASK_ISA_AVX | OPTION_MASK_ISA_FMA_UNSET \
 155    | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \
 156    | OPTION_MASK_ISA_AVX2_UNSET | OPTION_MASK_ISA_XSAVE_UNSET)
 157 #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
 158 #define OPTION_MASK_ISA_FXSR_UNSET OPTION_MASK_ISA_FXSR
 159 #define OPTION_MASK_ISA_XSAVE_UNSET \
 160   (OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET)
 161 #define OPTION_MASK_ISA_XSAVEOPT_UNSET OPTION_MASK_ISA_XSAVEOPT
 162 #define OPTION_MASK_ISA_AVX2_UNSET \
 163   (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET)
 164 #define OPTION_MASK_ISA_AVX512F_UNSET \
 165   (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \
 166    | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
 167    | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
 168    | OPTION_MASK_ISA_AVX512VL_UNSET)
 169 #define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD
 170 #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF
 171 #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER
 172 #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ
 173 #define OPTION_MASK_ISA_AVX512BW_UNSET OPTION_MASK_ISA_AVX512BW
 174 #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL
 175 #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA
 176 #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI
 177 #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
 178 #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
 179 #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED
 180 #define OPTION_MASK_ISA_ADX_UNSET OPTION_MASK_ISA_ADX
 181 #define OPTION_MASK_ISA_PREFETCHWT1_UNSET OPTION_MASK_ISA_PREFETCHWT1
 182 #define OPTION_MASK_ISA_CLFLUSHOPT_UNSET OPTION_MASK_ISA_CLFLUSHOPT
 183 #define OPTION_MASK_ISA_XSAVEC_UNSET OPTION_MASK_ISA_XSAVEC
 184 #define OPTION_MASK_ISA_XSAVES_UNSET OPTION_MASK_ISA_XSAVES
 185 #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB
 186
 187 /* SSE4 includes both SSE4.1 and SSE4.2.  -mno-sse4 should the same
 188    as -mno-sse4.1. */
 189 #define OPTION_MASK_ISA_SSE4_UNSET OPTION_MASK_ISA_SSE4_1_UNSET
 190
 191 #define OPTION_MASK_ISA_SSE4A_UNSET \
 192   (OPTION_MASK_ISA_SSE4A | OPTION_MASK_ISA_FMA4_UNSET)
 193
 194 #define OPTION_MASK_ISA_FMA4_UNSET \
 195   (OPTION_MASK_ISA_FMA4 | OPTION_MASK_ISA_XOP_UNSET)
 196 #define OPTION_MASK_ISA_XOP_UNSET OPTION_MASK_ISA_XOP
 197 #define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP
 198
 199 #define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES
 200 #define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA
 201 #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL
 202 #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM
 203 #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI
 204 #define OPTION_MASK_ISA_BMI2_UNSET OPTION_MASK_ISA_BMI2
 205 #define OPTION_MASK_ISA_LZCNT_UNSET OPTION_MASK_ISA_LZCNT
 206 #define OPTION_MASK_ISA_TBM_UNSET OPTION_MASK_ISA_TBM
 207 #define OPTION_MASK_ISA_POPCNT_UNSET OPTION_MASK_ISA_POPCNT
 208 #define OPTION_MASK_ISA_CX16_UNSET OPTION_MASK_ISA_CX16
 209 #define OPTION_MASK_ISA_SAHF_UNSET OPTION_MASK_ISA_SAHF
 210 #define OPTION_MASK_ISA_MOVBE_UNSET OPTION_MASK_ISA_MOVBE
 211 #define OPTION_MASK_ISA_CRC32_UNSET OPTION_MASK_ISA_CRC32
 212
 213 #define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
 214 #define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
 215 #define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
 216
 217 /* Implement TARGET_HANDLE_OPTION.  */
 218
 219 bool
 220 ix86_handle_option (struct gcc_options *opts,
 221                     struct gcc_options *opts_set ATTRIBUTE_UNUSED,
 222                     const struct cl_decoded_option *decoded,
 223                     location_t loc)
 224 {
 225   size_t code = decoded->opt_index;
 226   int value = decoded->value;
 227
 228   switch (code)
 229     {
 230     case OPT_mmmx:
 231       if (value)
 232         {
 233           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MMX_SET;
 234           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_SET;
 235         }
 236       else
 237         {
 238           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MMX_UNSET;
 239           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MMX_UNSET;
 240         }
 241       return true;
 242
 243     case OPT_m3dnow:
 244       if (value)
 245         {
 246           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_3DNOW_SET;
 247           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_SET;
 248         }
 249       else
 250         {
 251           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_3DNOW_UNSET;
 252           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_3DNOW_UNSET;
 253         }
 254       return true;
 255
 256     case OPT_m3dnowa:
 257       return false;
 258
 259     case OPT_msse:
 260       if (value)
 261         {
 262           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE_SET;
 263           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_SET;
 264         }
 265       else
 266         {
 267           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE_UNSET;
 268           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE_UNSET;
 269         }
 270       return true;
 271
 272     case OPT_msse2:
 273       if (value)
 274         {
 275           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE2_SET;
 276           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_SET;
 277         }
 278       else
 279         {
 280           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE2_UNSET;
 281           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE2_UNSET;
 282         }
 283       return true;
 284
 285     case OPT_msse3:
 286       if (value)
 287         {
 288           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE3_SET;
 289           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_SET;
 290         }
 291       else
 292         {
 293           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE3_UNSET;
 294           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE3_UNSET;
 295         }
 296       return true;
 297
 298     case OPT_mssse3:
 299       if (value)
 300         {
 301           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSSE3_SET;
 302           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_SET;
 303         }
 304       else
 305         {
 306           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSSE3_UNSET;
 307           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSSE3_UNSET;
 308         }
 309       return true;
 310
 311     case OPT_msse4_1:
 312       if (value)
 313         {
 314           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_1_SET;
 315           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_SET;
 316         }
 317       else
 318         {
 319           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_1_UNSET;
 320           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_1_UNSET;
 321         }
 322       return true;
 323
 324     case OPT_msse4_2:
 325       if (value)
 326         {
 327           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_2_SET;
 328           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_SET;
 329         }
 330       else
 331         {
 332           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_2_UNSET;
 333           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_2_UNSET;
 334         }
 335       return true;
 336
 337     case OPT_mavx:
 338       if (value)
 339         {
 340           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX_SET;
 341           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_SET;
 342         }
 343       else
 344         {
 345           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX_UNSET;
 346           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX_UNSET;
 347         }
 348       return true;
 349
 350     case OPT_mavx2:
 351       if (value)
 352         {
 353           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET;
 354           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET;
 355         }
 356       else
 357         {
 358           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX2_UNSET;
 359           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_UNSET;
 360         }
 361       return true;
 362
 363     case OPT_mavx512f:
 364       if (value)
 365         {
 366           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET;
 367           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET;
 368         }
 369       else
 370         {
 371           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512F_UNSET;
 372           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_UNSET;
 373         }
 374       return true;
 375
 376     case OPT_mavx512cd:
 377       if (value)
 378         {
 379           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD_SET;
 380           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_SET;
 381         }
 382       else
 383         {
 384           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512CD_UNSET;
 385           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_UNSET;
 386         }
 387       return true;
 388
 389     case OPT_mavx512pf:
 390       if (value)
 391         {
 392           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF_SET;
 393           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_SET;
 394         }
 395       else
 396         {
 397           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512PF_UNSET;
 398           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_UNSET;
 399         }
 400       return true;
 401
 402     case OPT_mavx512er:
 403       if (value)
 404         {
 405           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER_SET;
 406           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_SET;
 407         }
 408       else
 409         {
 410           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512ER_UNSET;
 411           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_UNSET;
 412         }
 413       return true;
 414
 415     case OPT_mavx512dq:
 416       if (value)
 417         {
 418           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512DQ_SET;
 419           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_SET;
 420         }
 421       else
 422         {
 423           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512DQ_UNSET;
 424           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512DQ_UNSET;
 425         }
 426       return true;
 427
 428     case OPT_mavx512bw:
 429       if (value)
 430         {
 431           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512BW_SET;
 432           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_SET;
 433         }
 434       else
 435         {
 436           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512BW_UNSET;
 437           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512BW_UNSET;
 438         }
 439       return true;
 440
 441     case OPT_mavx512vl:
 442       if (value)
 443         {
 444           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VL_SET;
 445           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_SET;
 446         }
 447       else
 448         {
 449           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VL_UNSET;
 450           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VL_UNSET;
 451         }
 452       return true;
 453
 454     case OPT_mavx512ifma:
 455       if (value)
 456         {
 457           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512IFMA_SET;
 458           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_SET;
 459         }
 460       else
 461         {
 462           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512IFMA_UNSET;
 463           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512IFMA_UNSET;
 464         }
 465       return true;
 466
 467     case OPT_mavx512vbmi:
 468       if (value)
 469         {
 470           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512VBMI_SET;
 471           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_SET;
 472         }
 473       else
 474         {
 475           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512VBMI_UNSET;
 476           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512VBMI_UNSET;
 477         }
 478       return true;
 479
 480     case OPT_mfma:
 481       if (value)
 482         {
 483           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA_SET;
 484           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_SET;
 485         }
 486       else
 487         {
 488           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA_UNSET;
 489           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA_UNSET;
 490         }
 491       return true;
 492
 493     case OPT_mrtm:
 494       if (value)
 495         {
 496           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RTM_SET;
 497           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RTM_SET;
 498         }
 499       else
 500         {
 501           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RTM_UNSET;
 502           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RTM_UNSET;
 503         }
 504       return true;
 505
 506     case OPT_msse4:
 507       opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4_SET;
 508       opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_SET;
 509       return true;
 510
 511     case OPT_mno_sse4:
 512       opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4_UNSET;
 513       opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4_UNSET;
 514       return true;
 515
 516     case OPT_msse4a:
 517       if (value)
 518         {
 519           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SSE4A_SET;
 520           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_SET;
 521         }
 522       else
 523         {
 524           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SSE4A_UNSET;
 525           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SSE4A_UNSET;
 526         }
 527       return true;
 528
 529     case OPT_mfma4:
 530       if (value)
 531         {
 532           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FMA4_SET;
 533           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_SET;
 534         }
 535       else
 536         {
 537           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FMA4_UNSET;
 538           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FMA4_UNSET;
 539         }
 540       return true;
 541
 542    case OPT_mxop:
 543       if (value)
 544         {
 545           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XOP_SET;
 546           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_SET;
 547         }
 548       else
 549         {
 550           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XOP_UNSET;
 551           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XOP_UNSET;
 552         }
 553       return true;
 554
 555    case OPT_mlwp:
 556       if (value)
 557         {
 558           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LWP_SET;
 559           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_SET;
 560         }
 561       else
 562         {
 563           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LWP_UNSET;
 564           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LWP_UNSET;
 565         }
 566       return true;
 567
 568     case OPT_mabm:
 569       if (value)
 570         {
 571           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ABM_SET;
 572           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_SET;
 573         }
 574       else
 575         {
 576           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ABM_UNSET;
 577           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ABM_UNSET;
 578         }
 579       return true;
 580
 581     case OPT_mbmi:
 582       if (value)
 583         {
 584           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI_SET;
 585           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_SET;
 586         }
 587       else
 588         {
 589           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI_UNSET;
 590           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI_UNSET;
 591         }
 592       return true;
 593
 594     case OPT_mbmi2:
 595       if (value)
 596         {
 597           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_BMI2_SET;
 598           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_SET;
 599         }
 600       else
 601         {
 602           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_BMI2_UNSET;
 603           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_BMI2_UNSET;
 604         }
 605       return true;
 606
 607     case OPT_mlzcnt:
 608       if (value)
 609         {
 610           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT_SET;
 611           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_SET;
 612         }
 613       else
 614         {
 615           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_LZCNT_UNSET;
 616           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_LZCNT_UNSET;
 617         }
 618       return true;
 619
 620     case OPT_mtbm:
 621       if (value)
 622         {
 623           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_TBM_SET;
 624           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_SET;
 625         }
 626       else
 627         {
 628           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_TBM_UNSET;
 629           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_TBM_UNSET;
 630         }
 631       return true;
 632
 633     case OPT_mpopcnt:
 634       if (value)
 635         {
 636           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_POPCNT_SET;
 637           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_SET;
 638         }
 639       else
 640         {
 641           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_POPCNT_UNSET;
 642           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_POPCNT_UNSET;
 643         }
 644       return true;
 645
 646     case OPT_msahf:
 647       if (value)
 648         {
 649           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SAHF_SET;
 650           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_SET;
 651         }
 652       else
 653         {
 654           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SAHF_UNSET;
 655           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SAHF_UNSET;
 656         }
 657       return true;
 658
 659     case OPT_mcx16:
 660       if (value)
 661         {
 662           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CX16_SET;
 663           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_SET;
 664         }
 665       else
 666         {
 667           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CX16_UNSET;
 668           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CX16_UNSET;
 669         }
 670       return true;
 671
 672     case OPT_mmovbe:
 673       if (value)
 674         {
 675           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MOVBE_SET;
 676           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_SET;
 677         }
 678       else
 679         {
 680           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_MOVBE_UNSET;
 681           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_MOVBE_UNSET;
 682         }
 683       return true;
 684
 685     case OPT_mcrc32:
 686       if (value)
 687         {
 688           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CRC32_SET;
 689           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_SET;
 690         }
 691       else
 692         {
 693           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CRC32_UNSET;
 694           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CRC32_UNSET;
 695         }
 696       return true;
 697
 698     case OPT_maes:
 699       if (value)
 700         {
 701           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AES_SET;
 702           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_SET;
 703         }
 704       else
 705         {
 706           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AES_UNSET;
 707           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AES_UNSET;
 708         }
 709       return true;
 710
 711     case OPT_msha:
 712       if (value)
 713         {
 714           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SHA_SET;
 715           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_SET;
 716         }
 717       else
 718         {
 719           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SHA_UNSET;
 720           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_UNSET;
 721         }
 722       return true;
 723
 724     case OPT_mpclmul:
 725       if (value)
 726         {
 727           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PCLMUL_SET;
 728           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_SET;
 729         }
 730       else
 731         {
 732           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PCLMUL_UNSET;
 733           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PCLMUL_UNSET;
 734         }
 735       return true;
 736
 737     case OPT_mfsgsbase:
 738       if (value)
 739         {
 740           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FSGSBASE_SET;
 741           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_SET;
 742         }
 743       else
 744         {
 745           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FSGSBASE_UNSET;
 746           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FSGSBASE_UNSET;
 747         }
 748       return true;
 749
 750     case OPT_mrdrnd:
 751       if (value)
 752         {
 753           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDRND_SET;
 754           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_SET;
 755         }
 756       else
 757         {
 758           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDRND_UNSET;
 759           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDRND_UNSET;
 760         }
 761       return true;
 762
 763     case OPT_mf16c:
 764       if (value)
 765         {
 766           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_F16C_SET;
 767           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_SET;
 768         }
 769       else
 770         {
 771           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_F16C_UNSET;
 772           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_F16C_UNSET;
 773         }
 774       return true;
 775
 776     case OPT_mfxsr:
 777       if (value)
 778         {
 779           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_FXSR_SET;
 780           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FXSR_SET;
 781         }
 782       else
 783         {
 784           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_FXSR_UNSET;
 785           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_FXSR_UNSET;
 786         }
 787       return true;
 788
 789     case OPT_mxsave:
 790       if (value)
 791         {
 792           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVE_SET;
 793           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVE_SET;
 794         }
 795       else
 796         {
 797           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVE_UNSET;
 798           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVE_UNSET;
 799         }
 800       return true;
 801
 802     case OPT_mxsaveopt:
 803       if (value)
 804         {
 805           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT_SET;
 806           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEOPT_SET;
 807         }
 808       else
 809         {
 810           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVEOPT_UNSET;
 811           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEOPT_UNSET;
 812         }
 813       return true;
 814
 815     case OPT_mxsavec:
 816       if (value)
 817         {
 818           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVEC_SET;
 819           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEC_SET;
 820         }
 821       else
 822         {
 823           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVEC_UNSET;
 824           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVEC_UNSET;
 825         }
 826       return true;
 827
 828     case OPT_mxsaves:
 829       if (value)
 830         {
 831           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_XSAVES_SET;
 832           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVES_SET;
 833         }
 834       else
 835         {
 836           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_XSAVES_UNSET;
 837           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_XSAVES_UNSET;
 838         }
 839       return true;
 840
 841     case OPT_mrdseed:
 842       if (value)
 843         {
 844           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_RDSEED_SET;
 845           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDSEED_SET;
 846         }
 847       else
 848         {
 849           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_RDSEED_UNSET;
 850           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_RDSEED_UNSET;
 851         }
 852       return true;
 853
 854     case OPT_mprfchw:
 855       if (value)
 856         {
 857           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW_SET;
 858           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_SET;
 859         }
 860       else
 861         {
 862           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PRFCHW_UNSET;
 863           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_UNSET;
 864         }
 865       return true;
 866
 867     case OPT_madx:
 868       if (value)
 869         {
 870           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_ADX_SET;
 871           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ADX_SET;
 872         }
 873       else
 874         {
 875           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_ADX_UNSET;
 876           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_ADX_UNSET;
 877         }
 878       return true;
 879
 880     case OPT_mprefetchwt1:
 881       if (value)
 882         {
 883           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PREFETCHWT1_SET;
 884           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_SET;
 885         }
 886       else
 887         {
 888           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PREFETCHWT1_UNSET;
 889           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PREFETCHWT1_UNSET;
 890         }
 891       return true;
 892
 893     case OPT_mclflushopt:
 894       if (value)
 895         {
 896           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLFLUSHOPT_SET;
 897           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLFLUSHOPT_SET;
 898         }
 899       else
 900         {
 901           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLFLUSHOPT_UNSET;
 902           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLFLUSHOPT_UNSET;
 903         }
 904       return true;
 905
 906     case OPT_mclwb:
 907       if (value)
 908         {
 909           opts->x_ix86_isa_flags |= OPTION_MASK_ISA_CLWB_SET;
 910           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_SET;
 911         }
 912       else
 913         {
 914           opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_CLWB_UNSET;
 915           opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_CLWB_UNSET;
 916         }
 917       return true;
 918
 919   /* Comes from final.c -- no real reason to change it.  */
 920 #define MAX_CODE_ALIGN 16
 921
 922     case OPT_malign_loops_:
 923       warning_at (loc, 0, "-malign-loops is obsolete, use -falign-loops");
 924       if (value > MAX_CODE_ALIGN)
 925         error_at (loc, "-malign-loops=%d is not between 0 and %d",
 926                   value, MAX_CODE_ALIGN);
 927       else
 928         opts->x_align_loops = 1 << value;
 929       return true;
 930
 931     case OPT_malign_jumps_:
 932       warning_at (loc, 0, "-malign-jumps is obsolete, use -falign-jumps");
 933       if (value > MAX_CODE_ALIGN)
 934         error_at (loc, "-malign-jumps=%d is not between 0 and %d",
 935                   value, MAX_CODE_ALIGN);
 936       else
 937         opts->x_align_jumps = 1 << value;
 938       return true;
 939
 940     case OPT_malign_functions_:
 941       warning_at (loc, 0,
 942                   "-malign-functions is obsolete, use -falign-functions");
 943       if (value > MAX_CODE_ALIGN)
 944         error_at (loc, "-malign-functions=%d is not between 0 and %d",
 945                   value, MAX_CODE_ALIGN);
 946       else
 947         opts->x_align_functions = 1 << value;
 948       return true;
 949
 950     case OPT_mbranch_cost_:
 951       if (value > 5)
 952         {
 953           error_at (loc, "-mbranch-cost=%d is not between 0 and 5", value);
 954           opts->x_ix86_branch_cost = 5;
 955         }
 956       return true;
 957
 958     default:
 959       return true;
 960     }
 961 }
 962
 963 static const struct default_options ix86_option_optimization_table[] =
 964   {
 965     /* Enable redundant extension instructions removal at -O2 and higher.  */
 966     { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
 967     /* Enable function splitting at -O2 and higher.  */
 968     { OPT_LEVELS_2_PLUS, OPT_freorder_blocks_and_partition, NULL, 1 },
 969     /* Turn off -fschedule-insns by default.  It tends to make the
 970        problem with not enough registers even worse.  */
 971     { OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 },
 972
 973 #ifdef SUBTARGET_OPTIMIZATION_OPTIONS
 974     SUBTARGET_OPTIMIZATION_OPTIONS,
 975 #endif
 976     { OPT_LEVELS_NONE, 0, NULL, 0 }
 977   };
 978
 979 /* Implement TARGET_OPTION_INIT_STRUCT.  */
 980
 981 static void
 982 ix86_option_init_struct (struct gcc_options *opts)
 983 {
 984   if (TARGET_MACHO)
 985     /* The Darwin libraries never set errno, so we might as well
 986        avoid calling them when that's the only reason we would.  */
 987     opts->x_flag_errno_math = 0;
 988
 989   opts->x_flag_pcc_struct_return = 2;
 990   opts->x_flag_asynchronous_unwind_tables = 2;
 991 }
 992
 993 /* On the x86 -fsplit-stack and -fstack-protector both use the same
 994    field in the TCB, so they can not be used together.  */
 995
 996 static bool
 997 ix86_supports_split_stack (bool report ATTRIBUTE_UNUSED,
 998                            struct gcc_options *opts ATTRIBUTE_UNUSED)
 999 {
1000   bool ret = true;
1001
1002 #ifndef TARGET_THREAD_SPLIT_STACK_OFFSET
1003   if (report)
1004     error ("%<-fsplit-stack%> currently only supported on GNU/Linux");
1005   ret = false;
1006 #else
1007   if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
1008     {
1009       if (report)
1010         error ("%<-fsplit-stack%> requires "
1011                "assembler support for CFI directives");
1012       ret = false;
1013     }
1014 #endif
1015
1016   return ret;
1017 }
1018
1019 /* Implement TARGET_EXCEPT_UNWIND_INFO.  */
1020
1021 static enum unwind_info_type
1022 i386_except_unwind_info (struct gcc_options *opts)
1023 {
1024   /* Honor the --enable-sjlj-exceptions configure switch.  */
1025 #ifdef CONFIG_SJLJ_EXCEPTIONS
1026   if (CONFIG_SJLJ_EXCEPTIONS)
1027     return UI_SJLJ;
1028 #endif
1029
1030   /* On windows 64, prefer SEH exceptions over anything else.  */
1031   if (TARGET_64BIT && DEFAULT_ABI == MS_ABI && opts->x_flag_unwind_tables)
1032     return UI_SEH;
1033
1034   if (DWARF2_UNWIND_INFO)
1035     return UI_DWARF2;
1036
1037   return UI_SJLJ;
1038 }
1039
1040 #undef  TARGET_EXCEPT_UNWIND_INFO
1041 #define TARGET_EXCEPT_UNWIND_INFO  i386_except_unwind_info
1042
1043 #undef TARGET_DEFAULT_TARGET_FLAGS
1044 #define TARGET_DEFAULT_TARGET_FLAGS     \
1045   (TARGET_DEFAULT                       \
1046    | TARGET_SUBTARGET_DEFAULT           \
1047    | TARGET_TLS_DIRECT_SEG_REFS_DEFAULT)
1048
1049 #undef TARGET_HANDLE_OPTION
1050 #define TARGET_HANDLE_OPTION ix86_handle_option
1051
1052 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1053 #define TARGET_OPTION_OPTIMIZATION_TABLE ix86_option_optimization_table
1054 #undef TARGET_OPTION_INIT_STRUCT
1055 #define TARGET_OPTION_INIT_STRUCT ix86_option_init_struct
1056
1057 #undef TARGET_SUPPORTS_SPLIT_STACK
1058 #define TARGET_SUPPORTS_SPLIT_STACK ix86_supports_split_stack
1059
1060 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;