1 /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU.
2 Copyright (C) 1988, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI -Acpu(a29k) -Amachine(a29k)"
26 /* Print subsidiary information on the compiler version in use. */
27 #define TARGET_VERSION
29 /* Pass -w to assembler. */
32 /* Run-time compilation parameters selecting different hardware subsets. */
34 extern int target_flags
;
36 /* Macro to define tables used to set the flags.
37 This is a list in braces of pairs in braces,
38 each pair being { "NAME", VALUE }
39 where VALUE is the bits to set or minus the bits to clear.
40 An empty string NAME is used to identify the default VALUE. */
42 /* This means that the DW bit will be enabled, to allow direct loads
45 #define TARGET_DW_ENABLE (target_flags & 1)
47 /* This means that the external hardware does supports byte writes. */
49 #define TARGET_BYTE_WRITES (target_flags & 2)
51 /* This means that a "small memory model" has been selected where all
52 function addresses are known to be within 256K. This allows CALL to be
55 #define TARGET_SMALL_MEMORY (target_flags & 4)
57 /* This means that we must always used on indirect call, even when
58 calling a function in the same file, since the file might be > 256KB. */
60 #define TARGET_LARGE_MEMORY (target_flags & 8)
62 /* This means that we are compiling for a 29050. */
64 #define TARGET_29050 (target_flags & 16)
66 /* This means that we are compiling for the kernel which means that we use
67 gr64-gr95 instead of gr96-126. */
69 #define TARGET_KERNEL_REGISTERS (target_flags & 32)
71 /* This means that a call to "__msp_check" should be inserted after each stack
72 adjustment to check for stack overflow. */
74 #define TARGET_STACK_CHECK (target_flags & 64)
76 /* This handles 29k processors which cannot handle the separation
77 of a mtsrim insns and a storem insn (most 29000 chips to date, but
80 #define TARGET_NO_STOREM_BUG (target_flags & 128)
82 /* This forces the compiler not to use incoming argument registers except
83 for copying out arguments. It helps detect problems when a function is
84 called with fewer arguments than it is declared with. */
86 #define TARGET_NO_REUSE_ARGS (target_flags & 256)
88 #define TARGET_SWITCHES \
94 {"normal", - (4|8)}, \
98 {"kernel-registers", 32}, \
99 {"user-registers", -32}, \
100 {"stack-check", 64}, \
101 {"no-stack-check", - 74}, \
102 {"storem-bug", -128}, \
103 {"no-storem-bug", 128}, \
104 {"reuse-arg-regs", -256}, \
105 {"no-reuse-arg-regs", 256}, \
106 {"", TARGET_DEFAULT}}
108 #define TARGET_DEFAULT 3
110 /* Define this to change the optimizations performed by default. */
112 #define OPTIMIZATION_OPTIONS(LEVEL) \
116 flag_force_addr = 1; \
117 flag_force_mem = 1; \
118 flag_omit_frame_pointer = 1; \
122 /* target machine storage layout */
124 /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the
125 same as those used by EPI. The type for wchar_t does not make much
126 sense, but is what is used. */
128 #define SIZE_TYPE "unsigned int"
129 #define PTRDIFF_TYPE "int"
130 #define WCHAR_TYPE "char"
131 #define WCHAR_TYPE_SIZE BITS_PER_UNIT
133 /* Define this macro if it is advisable to hold scalars in registers
134 in a wider mode than that declared by the program. In such cases,
135 the value is constrained to be within the bounds of the declared
136 type, but kept valid in the wider mode. The signedness of the
137 extension may differ from that of the type. */
139 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
140 if (GET_MODE_CLASS (MODE) == MODE_INT \
141 && GET_MODE_SIZE (MODE) < 4) \
144 /* Define this if most significant bit is lowest numbered
145 in instructions that operate on numbered bit-fields.
146 This is arbitrary on the 29k since it has no actual bit-field insns.
147 It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE
148 and we want to be able to convert BP position to bit position with
150 #define BITS_BIG_ENDIAN 1
152 /* Define this if most significant byte of a word is the lowest numbered.
153 This is true on 29k. */
154 #define BYTES_BIG_ENDIAN 1
156 /* Define this if most significant word of a multiword number is lowest
159 For 29k we can decide arbitrarily since there are no machine instructions
160 for them. Might as well be consistent with bytes. */
161 #define WORDS_BIG_ENDIAN 1
163 /* number of bits in an addressable storage unit */
164 #define BITS_PER_UNIT 8
166 /* Width in bits of a "word", which is the contents of a machine register.
167 Note that this is not necessarily the width of data type `int';
168 if using 16-bit ints on a 68000, this would still be 32.
169 But on a machine with 16-bit registers, this would be 16. */
170 #define BITS_PER_WORD 32
172 /* Width of a word, in units (bytes). */
173 #define UNITS_PER_WORD 4
175 /* Width in bits of a pointer.
176 See also the macro `Pmode' defined below. */
177 #define POINTER_SIZE 32
179 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
180 #define PARM_BOUNDARY 32
182 /* Boundary (in *bits*) on which stack pointer should be aligned. */
183 #define STACK_BOUNDARY 64
185 /* Allocation boundary (in *bits*) for the code of a function. */
186 #define FUNCTION_BOUNDARY 32
188 /* Alignment of field after `int : 0' in a structure. */
189 #define EMPTY_FIELD_BOUNDARY 32
191 /* Every structure's size must be a multiple of this. */
192 #define STRUCTURE_SIZE_BOUNDARY 8
194 /* A bitfield declared as `int' forces `int' alignment for the struct. */
195 #define PCC_BITFIELD_TYPE_MATTERS 1
197 /* No data type wants to be aligned rounder than this. */
198 #define BIGGEST_ALIGNMENT 32
200 /* Make strings word-aligned so strcpy from constants will be faster. */
201 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
202 (TREE_CODE (EXP) == STRING_CST \
203 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
205 /* Make arrays of chars word-aligned for the same reasons. */
206 #define DATA_ALIGNMENT(TYPE, ALIGN) \
207 (TREE_CODE (TYPE) == ARRAY_TYPE \
208 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
209 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
211 /* Set this non-zero if move instructions will actually fail to work
212 when given unaligned data. */
213 #define STRICT_ALIGNMENT 0
215 /* Set this non-zero if unaligned move instructions are extremely slow.
217 On the 29k, they trap. */
218 #define SLOW_UNALIGNED_ACCESS 1
220 /* Standard register usage. */
222 /* Number of actual hardware registers.
223 The hardware registers are assigned numbers for the compiler
224 from 0 to just below FIRST_PSEUDO_REGISTER.
225 All registers that the compiler knows about must be given numbers,
226 even those that are not normally considered general registers.
228 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are
229 not produced in generated RTL so we can start at gr96, and call it
232 So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input
233 arguments, whose register numbers we won't know until we are done,
234 use register 160-175. They cannot be modified. Similarly, 176 is used
235 for the frame pointer. It is assigned the last local register number
236 once the number of registers used is known.
238 We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q,
239 respectively. Registers 181 through 199 are used for the other special
240 registers that may be used by the programmer, but are never used by the
243 Registers 200-203 are the four floating-point accumulator register in
246 Registers 204-235 are the 32 global registers for kernel mode when
247 -mkernel-registers is not specified, and the 32 global user registers
250 When -mkernel-registers is specified, we still use the same register
251 map but change the names so 0-31 print as gr64-gr95. */
253 #define FIRST_PSEUDO_REGISTER 236
255 /* Because of the large number of registers on the 29k, we define macros
256 to refer to each group of registers and then define the number for some
257 registers used in the calling sequence. */
259 #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */
260 #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */
261 #define R_FP 176 /* frame pointer is register 176 */
262 #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */
263 #define R_KR(N) ((N) + 204) /* kernel registers (gr64 to gr95) */
265 /* Define the numbers of the special registers. */
271 /* These special registers are not used by the compiler, but may be referenced
272 by the programmer via asm declarations. */
294 /* Define the number for floating-point accumulator N. */
295 #define R_ACC(N) ((N) + 200)
297 /* Now define the registers used in the calling sequence. */
298 #define R_TAV R_GR (121)
299 #define R_TPC R_GR (122)
300 #define R_LRP R_GR (123)
301 #define R_SLP R_GR (124)
302 #define R_MSP R_GR (125)
303 #define R_RAB R_GR (126)
304 #define R_RFB R_GR (127)
306 /* 1 for registers that have pervasive standard uses
307 and are not available for the register allocator. */
309 #define FIXED_REGISTERS \
310 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
311 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
312 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
313 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
314 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
315 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
316 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
317 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
318 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
319 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
320 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
321 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
322 1, 1, 1, 1, 1, 1, 1, 1, \
324 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
325 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
327 /* 1 for registers not available across function calls.
328 These must include the FIXED_REGISTERS and also any
329 registers that can be used without being saved.
330 The latter must include the registers where values are returned
331 and the register where structure-value addresses are passed.
332 Aside from that, you can include as many other registers as you like. */
333 #define CALL_USED_REGISTERS \
334 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
335 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
336 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
337 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
338 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
339 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
340 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
341 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
342 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
343 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
344 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
345 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
346 1, 1, 1, 1, 1, 1, 1, 1, \
348 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
349 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
351 /* List the order in which to allocate registers. Each register must be
352 listed once, even those in FIXED_REGISTERS.
354 We allocate in the following order:
355 gr116-gr120 (not used for anything but temps)
356 gr96-gr111 (function return values, reverse order)
357 argument registers (160-175)
358 lr0-lr127 (locals, saved)
359 acc3-0 (acc0 special)
362 #define REG_ALLOC_ORDER \
363 {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \
364 R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \
365 R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \
366 R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \
367 R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \
368 R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \
369 R_AR (12), R_AR (13), R_AR (14), R_AR (15), \
370 R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \
371 R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \
372 R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \
373 R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \
374 R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \
375 R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \
376 R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \
377 R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \
378 R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \
379 R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \
380 R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \
381 R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \
382 R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \
383 R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \
384 R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \
385 R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \
386 R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \
387 R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \
388 R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \
389 R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \
390 R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \
391 R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \
393 R_ACC (3), R_ACC (2), R_ACC (1), R_ACC (0), \
394 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \
395 R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \
397 R_FP, R_BP, R_FC, R_CR, R_Q, \
398 R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \
399 R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \
401 R_KR (0), R_KR (1), R_KR (2), R_KR (3), R_KR (4), R_KR (5), \
402 R_KR (6), R_KR (7), R_KR (8), R_KR (9), R_KR (10), R_KR (11), \
403 R_KR (12), R_KR (13), R_KR (14), R_KR (15), R_KR (16), R_KR (17), \
404 R_KR (18), R_KR (19), R_KR (20), R_KR (21), R_KR (22), R_KR (23), \
405 R_KR (24), R_KR (25), R_KR (26), R_KR (27), R_KR (28), R_KR (29), \
406 R_KR (30), R_KR (31) }
408 /* Return number of consecutive hard regs needed starting at reg REGNO
409 to hold something of mode MODE.
410 This is ordinarily the length in words of a value of mode MODE
411 but can be less for certain modes in special long registers. */
413 #define HARD_REGNO_NREGS(REGNO, MODE) \
414 ((REGNO) >= R_ACC (0) && (REGNO) <= R_ACC (3)? 1 \
415 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
417 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
418 On 29k, the cpu registers can hold any mode. But a double-precision
419 floating-point value should start at an even register. The special
420 registers cannot hold floating-point values, BP, CR, and FC cannot
421 hold integer or floating-point values, and the accumulators cannot
424 DImode and larger values should start at an even register just like
425 DFmode values, even though the instruction set doesn't require it, in order
426 to prevent reload from aborting due to a modes_equiv_for_class_p failure.
428 (I'd like to use the "?:" syntax to make this more readable, but Sun's
429 compiler doesn't seem to accept it.) */
430 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
431 (((REGNO) >= R_ACC (0) && (REGNO) <= R_ACC (3) \
432 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
433 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \
434 || ((REGNO) >= R_BP && (REGNO) <= R_CR \
435 && GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT) \
436 || ((REGNO) >= R_Q && (REGNO) < R_ACC (0) \
437 && GET_MODE_CLASS (MODE) != MODE_FLOAT \
438 && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \
439 || (((REGNO) < R_BP || (REGNO) >= R_KR (0)) \
440 && ((((REGNO) & 1) == 0) \
441 || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD)))
443 /* Value is 1 if it is a good idea to tie two pseudo registers
444 when one has mode MODE1 and one has mode MODE2.
445 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
446 for any hard reg, then this must be 0 for correct output.
448 On the 29k, normally we'd just have problems with DFmode because of the
449 even alignment. However, we also have to be a bit concerned about
450 the special register's restriction to non-floating and the floating-point
451 accumulator's restriction to only floating. This probably won't
452 cause any great inefficiencies in practice. */
454 #define MODES_TIEABLE_P(MODE1, MODE2) \
455 ((MODE1) == (MODE2) \
456 || (GET_MODE_CLASS (MODE1) == MODE_INT \
457 && GET_MODE_CLASS (MODE2) == MODE_INT))
459 /* Specify the registers used for certain standard purposes.
460 The values of these macros are register numbers. */
462 /* 29k pc isn't overloaded on a register that the compiler knows about. */
463 /* #define PC_REGNUM */
465 /* Register to use for pushing function arguments. */
466 #define STACK_POINTER_REGNUM R_GR (125)
468 /* Base register for access to local variables of the function. */
469 #define FRAME_POINTER_REGNUM R_FP
471 /* Value should be nonzero if functions must have frame pointers.
472 Zero means the frame pointer need not be set up (and parms
473 may be accessed via the stack pointer) in functions that seem suitable.
474 This is computed in `reload', in reload1.c. */
475 #define FRAME_POINTER_REQUIRED 0
477 /* Base register for access to arguments of the function. */
478 #define ARG_POINTER_REGNUM R_FP
480 /* Register in which static-chain is passed to a function. */
481 #define STATIC_CHAIN_REGNUM R_SLP
483 /* Register in which address to store a structure value
484 is passed to a function. */
485 #define STRUCT_VALUE_REGNUM R_LRP
487 /* Define the classes of registers for register constraints in the
488 machine description. Also define ranges of constants.
490 One of the classes must always be named ALL_REGS and include all hard regs.
491 If there is more than one class, another class must be named NO_REGS
492 and contain no registers.
494 The name GENERAL_REGS must be the name of a class (or an alias for
495 another name such as ALL_REGS). This is the class of registers
496 that is allowed by "g" or "r" in a register constraint.
497 Also, registers outside this class are allocated only when
498 instructions express preferences for them.
500 The classes must be numbered in nondecreasing order; that is,
501 a larger-numbered class must never be contained completely
502 in a smaller-numbered class.
504 For any two classes, it is very desirable that there be another
505 class that represents their union.
507 The 29k has nine registers classes: LR0_REGS, GENERAL_REGS, SPECIAL_REGS,
508 BP_REGS, FC_REGS, CR_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS.
509 LR0_REGS, BP_REGS, FC_REGS, CR_REGS, and Q_REGS contain just the single
510 register. The latter two classes are used to represent the floating-point
511 accumulator registers in the 29050. We also define the union class
512 FLOAT_REGS to represent any register that can be used to hold a
513 floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't
514 useful as the former cannot contain floating-point and the latter can only
515 contain floating-point. */
517 enum reg_class
{ NO_REGS
, LR0_REGS
, GENERAL_REGS
, BP_REGS
, FC_REGS
, CR_REGS
,
518 Q_REGS
, SPECIAL_REGS
, ACCUM0_REGS
, ACCUM_REGS
, FLOAT_REGS
,
519 ALL_REGS
, LIM_REG_CLASSES
};
521 #define N_REG_CLASSES (int) LIM_REG_CLASSES
523 /* Give names of register classes as strings for dump file. */
525 #define REG_CLASS_NAMES \
526 {"NO_REGS", "LR0_REGS", "GENERAL_REGS", "BP_REGS", "FC_REGS", "CR_REGS", \
527 "Q_REGS", "SPECIAL_REGS", "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", \
530 /* Define which registers fit in which classes.
531 This is an initializer for a vector of HARD_REG_SET
532 of length N_REG_CLASSES. */
534 #define REG_CLASS_CONTENTS \
535 { {0, 0, 0, 0, 0, 0, 0, 0}, \
536 {0, 1, 0, 0, 0, 0, 0, 0}, \
537 {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xfff, 0xfffff}, \
538 {0, 0, 0, 0, 0, 0x20000, 0, 0}, \
539 {0, 0, 0, 0, 0, 0x40000, 0, 0}, \
540 {0, 0, 0, 0, 0, 0x80000, 0, 0}, \
541 {0, 0, 0, 0, 0, 0x100000, 0, 0}, \
542 {0, 0, 0, 0, 0, 0xfffe0000, 0xff, 0}, \
543 {0, 0, 0, 0, 0, 0, 0x100, 0}, \
544 {0, 0, 0, 0, 0, 0, 0xf00, 0}, \
545 {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xff, ~0}, \
546 {~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0} }
548 /* The same information, inverted:
549 Return the class number of the smallest class containing
550 reg number REGNO. This could be a conditional expression
551 or could index an array. */
553 #define REGNO_REG_CLASS(REGNO) \
554 ((REGNO) == R_BP ? BP_REGS \
555 : (REGNO) == R_FC ? FC_REGS \
556 : (REGNO) == R_CR ? CR_REGS \
557 : (REGNO) == R_Q ? Q_REGS \
558 : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \
559 : (REGNO) == R_ACC (0) ? ACCUM0_REGS \
560 : (REGNO) >= R_KR (0) ? GENERAL_REGS \
561 : (REGNO) > R_ACC (0) ? ACCUM_REGS \
562 : (REGNO) == R_LR (0) ? LR0_REGS \
565 /* The class value for index registers, and the one for base regs. */
566 #define INDEX_REG_CLASS NO_REGS
567 #define BASE_REG_CLASS GENERAL_REGS
569 /* Get reg_class from a letter such as appears in the machine description. */
571 #define REG_CLASS_FROM_LETTER(C) \
572 ((C) == 'r' ? GENERAL_REGS \
573 : (C) == 'l' ? LR0_REGS \
574 : (C) == 'b' ? BP_REGS \
575 : (C) == 'f' ? FC_REGS \
576 : (C) == 'c' ? CR_REGS \
577 : (C) == 'q' ? Q_REGS \
578 : (C) == 'h' ? SPECIAL_REGS \
579 : (C) == 'a' ? ACCUM_REGS \
580 : (C) == 'A' ? ACCUM0_REGS \
581 : (C) == 'f' ? FLOAT_REGS \
584 /* Define this macro to change register usage conditional on target flags.
586 On the 29k, we use this to change the register names for kernel mapping. */
588 #define CONDITIONAL_REGISTER_USAGE \
593 if (TARGET_KERNEL_REGISTERS) \
594 for (i = 0; i < 32; i++) \
597 reg_names[i] = reg_names[R_KR (i)]; \
598 reg_names[R_KR (i)] = p; \
602 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
603 can be used to stand for particular ranges of immediate operands.
604 This macro defines what the ranges are.
605 C is the letter, and VALUE is a constant value.
606 Return 1 if VALUE is in the range specified by C.
609 `I' is used for the range of constants most insns can contain.
610 `J' is for the few 16-bit insns.
611 `K' is a constant whose high-order 24 bits are all one
612 `L' is a HImode constant whose high-order 8 bits are all one
613 `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN)
614 `N' is a 32-bit constant whose negative is 8 bits
615 `O' is the 32-bit constant 0x80000000, any constant with low-order
616 16 bits zero for 29050.
617 `P' is a HImode constant whose negative is 8 bits */
619 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
620 ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \
621 : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \
622 : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \
623 : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \
624 : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \
625 : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \
626 : (C) == 'O' ? ((VALUE) == 0x80000000 \
627 || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \
628 : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \
629 && ((VALUE) | 0xffff0000) > -256) \
632 /* Similar, but for floating constants, and defining letters G and H.
633 Here VALUE is the CONST_DOUBLE rtx itself.
634 All floating-point constants are valid on 29k. */
636 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
638 /* Given an rtx X being reloaded into a reg required to be
639 in class CLASS, return the class of reg to actually use.
640 In general this is just CLASS; but on some machines
641 in some cases it is preferable to use a more restrictive class. */
643 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
645 /* Return the register class of a scratch register needed to copy IN into
646 or out of a register in CLASS in MODE. If it can be done directly,
647 NO_REGS is returned. */
649 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
650 secondary_reload_class (CLASS, MODE, IN)
652 /* This function is used to get the address of an object. */
654 extern struct rtx_def
*a29k_get_reloaded_address ();
656 /* Return the maximum number of consecutive registers
657 needed to represent mode MODE in a register of class CLASS.
659 On 29k, this is the size of MODE in words except that the floating-point
660 accumulators only require one word for anything they can hold. */
662 #define CLASS_MAX_NREGS(CLASS, MODE) \
663 (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \
664 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
666 /* Define the cost of moving between registers of various classes. Everything
667 involving a general register is cheap, but moving between the other types
668 (even within a class) is two insns. */
670 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
671 ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4)
673 /* A C statement (sans semicolon) to update the integer variable COST
674 based on the relationship between INSN that is dependent on
675 DEP_INSN through the dependence LINK. The default is to make no
676 adjustment to COST. On the a29k, ignore the cost of anti- and
677 output-dependencies. */
678 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
679 if (REG_NOTE_KIND (LINK) != 0) \
680 (COST) = 0; /* Anti or output dependence. */
682 /* Stack layout; function entry, exit and calling. */
684 /* Define this if pushing a word on the stack
685 makes the stack pointer a smaller address. */
686 #define STACK_GROWS_DOWNWARD
688 /* Define this if the nominal address of the stack frame
689 is at the high-address end of the local variables;
690 that is, each additional local variable allocated
691 goes at a more negative offset in the frame. */
692 #define FRAME_GROWS_DOWNWARD
694 /* Offset within stack frame to start allocating local variables at.
695 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
696 first local allocated. Otherwise, it is the offset to the BEGINNING
697 of the first local allocated. */
699 #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size)
701 /* If we generate an insn to push BYTES bytes,
702 this says how many the stack pointer really advances by.
703 On 29k, don't define this because there are no push insns. */
704 /* #define PUSH_ROUNDING(BYTES) */
706 /* Define this if the maximum size of all the outgoing args is to be
707 accumulated and pushed during the prologue. The amount can be
708 found in the variable current_function_outgoing_args_size. */
709 #define ACCUMULATE_OUTGOING_ARGS
711 /* Offset of first parameter from the argument pointer register value. */
713 #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size)
715 /* Define this if stack space is still allocated for a parameter passed
717 /* #define REG_PARM_STACK_SPACE */
719 /* Value is the number of bytes of arguments automatically
720 popped when returning from a subroutine call.
721 FUNTYPE is the data type of the function (as a tree),
722 or for a library call it is an identifier node for the subroutine name.
723 SIZE is the number of bytes of arguments passed on the stack. */
725 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
727 /* Define how to find the value returned by a function.
728 VALTYPE is the data type of the value (as a tree).
729 If the precise function being called is known, FUNC is its FUNCTION_DECL;
730 otherwise, FUNC is 0.
732 On 29k the value is found in gr96. */
734 #define FUNCTION_VALUE(VALTYPE, FUNC) \
735 gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96))
737 /* Define how to find the value returned by a library function
738 assuming the value has mode MODE. */
740 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96))
742 /* 1 if N is a possible register number for a function value
743 as seen by the caller.
744 On 29k, gr96-gr111 are used. */
746 #define FUNCTION_VALUE_REGNO_P(N) ((N) == R_GR (96))
748 /* 1 if N is a possible register number for function argument passing.
749 On 29k, these are lr2-lr17. */
751 #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2))
753 /* Define a data type for recording info about an argument list
754 during the scan of that argument list. This data type should
755 hold all necessary information about the function itself
756 and about the args processed so far, enough to enable macros
757 such as FUNCTION_ARG to determine where the next arg should go.
759 On 29k, this is a single integer, which is a number of words
760 of arguments scanned so far.
761 Thus 16 or more means all following args should go on the stack. */
763 #define CUMULATIVE_ARGS int
765 /* Initialize a variable CUM of type CUMULATIVE_ARGS
766 for a call to a function whose data type is FNTYPE.
767 For a library call, FNTYPE is 0. */
769 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
771 /* Same, but called for incoming args.
773 On the 29k, we use this to set all argument registers to fixed and
774 set the last 16 local regs (lr112-lr127) to available. Some
775 will later be changed to call-saved by FUNCTION_INCOMING_ARG. */
777 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
779 for (i = R_AR (0); i < R_AR (16); i++) \
781 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \
782 SET_HARD_REG_BIT (fixed_reg_set, i); \
783 SET_HARD_REG_BIT (call_used_reg_set, i); \
784 SET_HARD_REG_BIT (call_fixed_reg_set, i); \
786 for (i = R_LR (112); i < R_LR (128); i++) \
788 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \
789 CLEAR_HARD_REG_BIT (fixed_reg_set, i); \
790 CLEAR_HARD_REG_BIT (call_used_reg_set, i); \
791 CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \
796 /* Define intermediate macro to compute the size (in registers) of an argument
799 #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \
801 : (MODE) != BLKmode \
802 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
803 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
805 /* Update the data in CUM to advance over an argument
806 of mode MODE and data type TYPE.
807 (TYPE is null for libcalls where that information may not be available.) */
809 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
810 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
813 (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED)
815 /* Determine where to put an argument to a function.
816 Value is zero to push the argument on the stack,
817 or a hard register in which to store the argument.
819 MODE is the argument's machine mode.
820 TYPE is the data type of the argument (as a tree).
821 This is null for libcalls where that information may
823 CUM is a variable of type CUMULATIVE_ARGS which gives info about
824 the preceding args and about the function being called.
825 NAMED is nonzero if this argument is a named parameter
826 (otherwise it is an extra parameter matching an ellipsis).
828 On 29k the first 16 words of args are normally in registers
829 and the rest are pushed. */
831 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
832 ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
833 ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0)
835 /* Define where a function finds its arguments.
836 This is different from FUNCTION_ARG because of register windows.
838 On the 29k, we hack this to call a function that sets the used registers
839 as non-fixed and not used by calls. */
841 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
842 ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
843 ? gen_rtx (REG, MODE, \
844 incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \
847 /* This indicates that an argument is to be passed with an invisible reference
848 (i.e., a pointer to the object is passed).
850 On the 29k, we do this if it must be passed on the stack. */
852 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
853 (MUST_PASS_IN_STACK (MODE, TYPE))
855 /* Specify the padding direction of arguments.
857 On the 29k, we must pad upwards in order to be able to pass args in
860 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
862 /* For an arg passed partly in registers and partly in memory,
863 this is the number of registers used.
864 For args passed entirely in registers or entirely in memory, zero. */
866 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
867 ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \
870 /* Perform any needed actions needed for a function that is receiving a
871 variable number of arguments.
875 MODE and TYPE are the mode and type of the current parameter.
877 PRETEND_SIZE is a variable that should be set to the amount of stack
878 that must be pushed by the prolog to pretend that our caller pushed
881 Normally, this macro will push all remaining incoming registers on the
882 stack and set PRETEND_SIZE to the length of the registers pushed. */
884 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
887 int first_reg_offset = (CUM); \
889 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
890 first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
892 if (first_reg_offset > 16) \
893 first_reg_offset = 16; \
895 if (! (NO_RTL) && first_reg_offset != 16) \
896 move_block_from_reg \
897 (R_AR (0) + first_reg_offset, \
898 gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \
899 16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \
900 PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \
904 /* Define the information needed to generate branch and scc insns. This is
905 stored from the compare operation. Note that we can't use "rtx" here
906 since it hasn't been defined! */
908 extern struct rtx_def
*a29k_compare_op0
, *a29k_compare_op1
;
909 extern int a29k_compare_fp_p
;
911 /* This macro produces the initial definition of a function name.
913 For the 29k, we need the prolog to contain one or two words prior to
914 the declaration of the function name. So just store away the name and
915 write it as part of the prolog. */
917 extern char *a29k_function_name
;
919 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
920 a29k_function_name = NAME;
922 /* This macro generates the assembly code for function entry.
923 FILE is a stdio stream to output the code to.
924 SIZE is an int: how many units of temporary storage to allocate.
925 Refer to the array `regs_ever_live' to determine which registers
926 to save; `regs_ever_live[I]' is nonzero if register number I
927 is ever used in the function. This macro is responsible for
928 knowing which registers should not be saved even if used. */
930 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
932 /* Output assembler code to FILE to increment profiler label # LABELNO
933 for profiling a function entry. */
935 #define FUNCTION_PROFILER(FILE, LABELNO)
937 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
938 the stack pointer does not matter. The value is tested only in
939 functions that have frame pointers.
940 No definition is equivalent to always zero. */
942 #define EXIT_IGNORE_STACK 1
944 /* This macro generates the assembly code for function exit,
945 on machines that need it. If FUNCTION_EPILOGUE is not defined
946 then individual return instructions are generated for each
947 return statement. Args are same as for FUNCTION_PROLOGUE.
949 The function epilogue should not depend on the current stack pointer!
950 It should use the frame pointer only. This is mandatory because
951 of alloca; we also take advantage of it to omit stack adjustments
954 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
956 /* Define the number of delay slots needed for the function epilogue.
958 On the 29k, we need a slot except when we have a register stack adjustment,
959 have a memory stack adjustment, and have no frame pointer. */
961 #define DELAY_SLOTS_FOR_EPILOGUE \
962 (! (needs_regstack_p () \
963 && (get_frame_size () + current_function_pretend_args_size \
964 + current_function_outgoing_args_size) != 0 \
965 && ! frame_pointer_needed))
967 /* Define whether INSN can be placed in delay slot N for the epilogue.
969 On the 29k, we must be able to place it in a delay slot, it must
970 not use sp if the frame pointer cannot be eliminated, and it cannot
971 use local regs if we need to push the register stack. */
973 #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
974 (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \
975 && ! (frame_pointer_needed \
976 && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \
977 && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN))))
979 /* Output assembler code for a block containing the constant parts
980 of a trampoline, leaving space for the variable parts.
982 The trampoline should set the static chain pointer to value placed
983 into the trampoline and should branch to the specified routine. We
984 use gr121 (tav) as a temporary. */
986 #define TRAMPOLINE_TEMPLATE(FILE) \
988 fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \
989 fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \
990 fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \
991 fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \
992 fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \
995 /* Length in units of the trampoline for entering a nested function. */
997 #define TRAMPOLINE_SIZE 20
999 /* Emit RTL insns to initialize the variable parts of a trampoline.
1000 FNADDR is an RTX for the address of the function's pure code.
1001 CXT is an RTX for the static chain value for the function.
1003 We do this on the 29k by writing the bytes of the addresses into the
1004 trampoline one byte at a time. */
1006 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1008 INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \
1009 INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \
1012 /* Define a sub-macro to initialize one value into the trampoline.
1013 We specify the offsets of the CONST and CONSTH instructions, respectively
1014 and copy the value a byte at a time into these instructions. */
1016 #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \
1019 rtx _val = force_reg (SImode, VALUE); \
1021 _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \
1022 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1023 gen_lowpart (QImode, _val)); \
1025 _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
1026 build_int_2 (8, 0), 0, 1); \
1027 _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \
1028 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1029 gen_lowpart (QImode, _temp)); \
1031 _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
1032 build_int_2 (8, 0), _temp, 1); \
1033 _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \
1034 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1035 gen_lowpart (QImode, _temp)); \
1037 _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
1038 build_int_2 (8, 0), _temp, 1); \
1039 _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \
1040 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1041 gen_lowpart (QImode, _temp)); \
1044 /* Addressing modes, and classification of registers for them. */
1046 /* #define HAVE_POST_INCREMENT */
1047 /* #define HAVE_POST_DECREMENT */
1049 /* #define HAVE_PRE_DECREMENT */
1050 /* #define HAVE_PRE_INCREMENT */
1052 /* Macros to check register numbers against specific register classes. */
1054 /* These assume that REGNO is a hard or pseudo reg number.
1055 They give nonzero only if REGNO is a hard reg of the suitable class
1056 or a pseudo reg currently allocated to a suitable hard reg.
1057 Since they use reg_renumber, they are safe only once reg_renumber
1058 has been allocated, which happens in local-alloc.c. */
1060 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1061 #define REGNO_OK_FOR_BASE_P(REGNO) 1
1063 /* Given the value returned from get_frame_size, compute the actual size
1064 of the frame we will allocate. We include the pretend and outgoing
1065 arg sizes and round to a doubleword. */
1067 #define ACTUAL_FRAME_SIZE(SIZE) \
1068 (((SIZE) + current_function_pretend_args_size \
1069 + current_function_outgoing_args_size + 7) & ~7)
1071 /* Define the initial offset between the frame and stack pointer. */
1073 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1074 (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ())
1076 /* Maximum number of registers that can appear in a valid memory address. */
1077 #define MAX_REGS_PER_ADDRESS 1
1079 /* Recognize any constant value that is a valid address.
1081 None are on the 29K. */
1082 #define CONSTANT_ADDRESS_P(X) 0
1084 /* Include all constant integers and constant doubles */
1085 #define LEGITIMATE_CONSTANT_P(X) 1
1087 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1088 and check its validity for a certain class.
1089 We have two alternate definitions for each of them.
1090 The usual definition accepts all pseudo regs; the other rejects
1091 them unless they have been allocated suitable hard regs.
1092 The symbol REG_OK_STRICT causes the latter definition to be used.
1094 Most source files want to accept pseudo regs in the hope that
1095 they will get allocated to the class that the insn wants them to be in.
1096 Source files for reload pass need to be strict.
1097 After reload, it makes no difference, since pseudo regs have
1098 been eliminated by then. */
1100 #ifndef REG_OK_STRICT
1102 /* Nonzero if X is a hard reg that can be used as an index
1103 or if it is a pseudo reg. */
1104 #define REG_OK_FOR_INDEX_P(X) 0
1105 /* Nonzero if X is a hard reg that can be used as a base reg
1106 or if it is a pseudo reg. */
1107 #define REG_OK_FOR_BASE_P(X) 1
1111 /* Nonzero if X is a hard reg that can be used as an index. */
1112 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1113 /* Nonzero if X is a hard reg that can be used as a base reg. */
1114 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1118 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1119 that is a valid memory address for an instruction.
1120 The MODE argument is the machine mode for the MEM expression
1121 that wants to use this address.
1123 On the 29k, a legitimate address is a register and so is a
1124 constant of less than 256. */
1126 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1127 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1129 if (GET_CODE (X) == CONST_INT \
1130 && (unsigned) INTVAL (X) < 0x100) \
1134 /* Try machine-dependent ways of modifying an illegitimate address
1135 to be legitimate. If we find one, return the new, valid address.
1136 This macro is used in only one place: `memory_address' in explow.c.
1138 OLDX is the address as it was before break_out_memory_refs was called.
1139 In some cases it is useful to look at this to decide what needs to be done.
1141 MODE and WIN are passed so that this macro can use
1142 GO_IF_LEGITIMATE_ADDRESS.
1144 It is always safe for this macro to do nothing. It exists to recognize
1145 opportunities to optimize the output.
1147 For the 29k, we need not do anything. However, if we don't,
1148 `memory_address' will try lots of things to get a valid address, most of
1149 which will result in dead code and extra pseudos. So we make the address
1152 This is easy: The only valid addresses are an offset from a register
1153 and we know the address isn't valid. So just call either `force_operand'
1154 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1156 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1157 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1159 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1160 X = force_operand (X, 0); \
1162 X = force_reg (Pmode, X); \
1166 /* Go to LABEL if ADDR (a legitimate address expression)
1167 has an effect that depends on the machine mode it is used for.
1168 On the 29k this is never true. */
1170 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1172 /* Compute the cost of an address. For the 29k, all valid addresses are
1175 #define ADDRESS_COST(X) 0
1177 /* Define this if some processing needs to be done immediately before
1178 emitting code for an insn. */
1180 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1182 /* Specify the machine mode that this machine uses
1183 for the index in the tablejump instruction. */
1184 #define CASE_VECTOR_MODE SImode
1186 /* Define this if the tablejump instruction expects the table
1187 to contain offsets from the address of the table.
1188 Do not define this if the table should contain absolute addresses. */
1189 /* #define CASE_VECTOR_PC_RELATIVE */
1191 /* Specify the tree operation to be used to convert reals to integers. */
1192 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1194 /* This is the kind of divide that is easiest to do in the general case. */
1195 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1197 /* Define this as 1 if `char' should by default be signed; else as 0. */
1198 #define DEFAULT_SIGNED_CHAR 0
1200 /* This flag, if defined, says the same insns that convert to a signed fixnum
1201 also convert validly to an unsigned one.
1203 We actually lie a bit here as overflow conditions are different. But
1204 they aren't being checked anyway. */
1206 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1208 /* Max number of bytes we can move to of from memory
1209 in one reasonably fast instruction.
1211 For the 29k, we will define movti, so put this at 4 words. */
1214 /* Largest number of bytes of an object that can be placed in a register.
1215 On the 29k we have plenty of registers, so use TImode. */
1216 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1218 /* Nonzero if access to memory by bytes is no faster than for words.
1219 Also non-zero if doing byte operations (specifically shifts) in registers
1222 On the 29k, large masks are expensive, so we want to use bytes to
1223 manipulate fields. */
1224 #define SLOW_BYTE_ACCESS 0
1226 /* Define if operations between registers always perform the operation
1227 on the full register even if a narrower mode is specified. */
1228 #define WORD_REGISTER_OPERATIONS
1230 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1231 will either zero-extend or sign-extend. The value of this macro should
1232 be the code that says which one of the two operations is implicitly
1233 done, NIL if none. */
1234 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1236 /* Define if the object format being used is COFF or a superset. */
1237 #define OBJECT_FORMAT_COFF
1239 /* This uses COFF, so it wants SDB format. */
1240 #define SDB_DEBUGGING_INFO
1242 /* Define this to be the delimiter between SDB sub-sections. The default
1244 #define SDB_DELIM "\n"
1246 /* Do not break .stabs pseudos into continuations. */
1247 #define DBX_CONTIN_LENGTH 0
1249 /* Don't try to use the `x' type-cross-reference character in DBX data.
1250 Also has the consequence of putting each struct, union or enum
1251 into a separate .stabs, containing only cross-refs to the others. */
1252 #define DBX_NO_XREFS
1254 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1255 is done just by pretending it is already truncated. */
1256 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1258 /* We assume that the store-condition-codes instructions store 0 for false
1259 and some other value for true. This is the value stored for true. */
1261 #define STORE_FLAG_VALUE 0x80000000
1263 /* Specify the machine mode that pointers have.
1264 After generation of rtl, the compiler makes no further distinction
1265 between pointers and any other objects of this machine mode. */
1266 #define Pmode SImode
1268 /* Mode of a function address in a call instruction (for indexing purposes).
1270 Doesn't matter on 29k. */
1271 #define FUNCTION_MODE SImode
1273 /* Define this if addresses of constant functions
1274 shouldn't be put through pseudo regs where they can be cse'd.
1275 Desirable on machines where ordinary constants are expensive
1276 but a CALL with constant address is cheap. */
1277 #define NO_FUNCTION_CSE
1279 /* Define this to be nonzero if shift instructions ignore all but the low-order
1281 #define SHIFT_COUNT_TRUNCATED 1
1283 /* Compute the cost of computing a constant rtl expression RTX
1284 whose rtx-code is CODE. The body of this macro is a portion
1285 of a switch statement. If the code is computed here,
1286 return it with a return statement. Otherwise, break from the switch.
1288 We only care about the cost if it is valid in an insn. The only
1289 constants that cause an insn to generate more than one machine
1290 instruction are those involving floating-point or address. So
1291 only these need be expensive. */
1293 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1300 case CONST_DOUBLE: \
1301 return GET_MODE (RTX) == SFmode ? 6 : 8;
1303 /* Provide the costs of a rtl expression. This is in the body of a
1306 All MEMs cost the same if they are valid. This is used to ensure
1307 that (mem (symbol_ref ...)) is placed into a CALL when valid.
1309 The multiply cost depends on whether this is a 29050 or not. */
1311 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1313 return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \
1318 return COSTS_N_INSNS (50); \
1320 return COSTS_N_INSNS (2);
1322 /* Control the assembler format that we output. */
1324 /* Output at beginning of assembler file. */
1326 #define ASM_FILE_START(FILE) \
1327 { char *p, *after_dir = main_input_filename; \
1329 fprintf (FILE, "\t.cputype 29050\n"); \
1330 for (p = main_input_filename; *p; p++) \
1332 after_dir = p + 1; \
1333 fprintf (FILE, "\t.file "); \
1334 output_quoted_string (FILE, after_dir); \
1335 fprintf (FILE, "\n"); \
1336 fprintf (FILE, "\t.sect .lit,lit\n"); }
1338 /* Output to assembler file text saying following lines
1339 may contain character constants, extra white space, comments, etc. */
1341 #define ASM_APP_ON ""
1343 /* Output to assembler file text saying following lines
1344 no longer contain unusual constructs. */
1346 #define ASM_APP_OFF ""
1348 /* The next few macros don't have tabs on most machines, but
1349 at least one 29K assembler wants them. */
1351 /* Output before instructions. */
1353 #define TEXT_SECTION_ASM_OP "\t.text"
1355 /* Output before read-only data. */
1357 #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit"
1359 /* Output before writable data. */
1361 #define DATA_SECTION_ASM_OP "\t.data"
1363 /* Define an extra section for read-only data, a routine to enter it, and
1364 indicate that it is for read-only data. */
1366 #define EXTRA_SECTIONS readonly_data
1368 #define EXTRA_SECTION_FUNCTIONS \
1370 literal_section () \
1372 if (in_section != readonly_data) \
1374 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1375 in_section = readonly_data; \
1379 #define READONLY_DATA_SECTION literal_section
1381 /* If we are referencing a function that is static or is known to be
1382 in this file, make the SYMBOL_REF special. We can use this to indicate
1383 that we can branch to this function without emitting a no-op after the
1386 #define ENCODE_SECTION_INFO(DECL) \
1387 if (TREE_CODE (DECL) == FUNCTION_DECL \
1388 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1389 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1391 /* How to refer to registers in assembler output.
1392 This sequence is indexed by compiler's hard-register-number (see above). */
1394 #define REGISTER_NAMES \
1395 {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \
1396 "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \
1397 "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \
1398 "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \
1399 "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \
1400 "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \
1401 "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \
1402 "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \
1403 "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \
1404 "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \
1405 "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \
1406 "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \
1407 "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \
1408 "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \
1409 "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \
1410 "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \
1411 "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \
1412 "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \
1413 "lr124", "lr125", "lr126", "lr127", \
1414 "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \
1415 "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \
1416 "bp", "fc", "cr", "q", \
1417 "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \
1418 "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \
1419 "0", "1", "2", "3", \
1420 "gr64", "gr65", "gr66", "gr67", "gr68", "gr69", "gr70", "gr71", \
1421 "gr72", "gr73", "gr74", "gr75", "gr76", "gr77", "gr78", "gr79", \
1422 "gr80", "gr81", "gr82", "gr83", "gr84", "gr85", "gr86", "gr87", \
1423 "gr88", "gr89", "gr90", "gr91", "gr92", "gr93", "gr94", "gr95" }
1425 /* How to renumber registers for dbx and gdb. */
1427 extern int a29k_debug_reg_map
[];
1428 #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO]
1430 /* This is how to output the definition of a user-level label named NAME,
1431 such as the label on a static function or variable NAME. */
1433 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1434 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1436 /* This is how to output a command to make the user-level label named NAME
1437 defined for reference from other files. */
1439 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1440 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1442 /* This is how to output a reference to a user-level label named NAME.
1443 `assemble_name' uses this. */
1445 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1446 fprintf (FILE, "_%s", NAME)
1448 /* This is how to output an internal numbered label where
1449 PREFIX is the class of label and NUM is the number within the class. */
1451 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1452 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1454 /* This is how to output a label for a jump table. Arguments are the same as
1455 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1458 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1459 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1461 /* This is how to store into the string LABEL
1462 the symbol_ref name of an internal numbered label where
1463 PREFIX is the class of label and NUM is the number within the class.
1464 This is suitable for output with `assemble_name'. */
1466 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1467 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1469 /* This is how to output an assembler line defining a `double' constant. */
1471 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1472 fprintf (FILE, "\t.double %.20e\n", (VALUE))
1474 /* This is how to output an assembler line defining a `float' constant. */
1476 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1477 fprintf (FILE, "\t.float %.20e\n", (VALUE))
1479 /* This is how to output an assembler line defining an `int' constant. */
1481 #define ASM_OUTPUT_INT(FILE,VALUE) \
1482 ( fprintf (FILE, "\t.word "), \
1483 output_addr_const (FILE, (VALUE)), \
1484 fprintf (FILE, "\n"))
1486 /* Likewise for `char' and `short' constants. */
1488 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1489 ( fprintf (FILE, "\t.hword "), \
1490 output_addr_const (FILE, (VALUE)), \
1491 fprintf (FILE, "\n"))
1493 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1494 ( fprintf (FILE, "\t.byte "), \
1495 output_addr_const (FILE, (VALUE)), \
1496 fprintf (FILE, "\n"))
1498 /* This is how to output an insn to push a register on the stack.
1499 It need not be very fast code. */
1501 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1502 fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \
1503 reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \
1506 /* This is how to output an insn to pop a register from the stack.
1507 It need not be very fast code. */
1509 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1510 fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \
1511 reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \
1514 /* This is how to output an assembler line for a numeric constant byte. */
1516 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1517 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1519 /* This is how to output an element of a case-vector that is absolute. */
1521 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1522 fprintf (FILE, "\t.word L%d\n", VALUE)
1524 /* This is how to output an element of a case-vector that is relative.
1525 (29k does not use such vectors,
1526 but we must define this macro anyway.) */
1528 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1530 /* This is how to output an assembler line
1531 that says to advance the location counter
1532 to a multiple of 2**LOG bytes. */
1534 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1536 fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1538 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1539 fprintf (FILE, "\t.block %d\n", (SIZE))
1541 /* This says how to output an assembler line
1542 to define a global common symbol. */
1544 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1545 ( fputs ("\t.comm ", (FILE)), \
1546 assemble_name ((FILE), (NAME)), \
1547 fprintf ((FILE), ",%d\n", (SIZE)))
1549 /* This says how to output an assembler line
1550 to define a local common symbol. */
1552 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1553 ( fputs ("\t.lcomm ", (FILE)), \
1554 assemble_name ((FILE), (NAME)), \
1555 fprintf ((FILE), ",%d\n", (SIZE)))
1557 /* Store in OUTPUT a string (made with alloca) containing
1558 an assembler-name for a local static variable named NAME.
1559 LABELNO is an integer which is different for each call. */
1561 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1562 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1563 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1565 /* Define the parentheses used to group arithmetic operations
1566 in assembler code. */
1568 #define ASM_OPEN_PAREN "("
1569 #define ASM_CLOSE_PAREN ")"
1571 /* Define results of standard character escape sequences. */
1572 #define TARGET_BELL 007
1573 #define TARGET_BS 010
1574 #define TARGET_TAB 011
1575 #define TARGET_NEWLINE 012
1576 #define TARGET_VT 013
1577 #define TARGET_FF 014
1578 #define TARGET_CR 015
1580 /* Print operand X (an rtx) in assembler syntax to file FILE.
1581 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1582 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1584 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1586 /* Determine which codes are valid without a following integer. These must
1589 We support `#' which is null if a delay slot exists, otherwise
1590 "\n\tnop" and `*' which prints the register name for TPC (gr122). */
1592 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*')
1594 /* Print a memory address as an operand to reference that memory location. */
1596 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1597 { register rtx addr = ADDR; \
1599 && ! (GET_CODE (addr) == CONST_INT \
1600 && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \
1602 output_operand (addr, 0); \
1604 /* Define the codes that are matched by predicates in a29k.c. */
1606 #define PREDICATE_CODES \
1607 {"cint_8_operand", {CONST_INT}}, \
1608 {"cint_16_operand", {CONST_INT}}, \
1609 {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \
1610 LABEL_REF, SYMBOL_REF}}, \
1611 {"shift_constant_operand", {CONST_INT, ASHIFT}}, \
1612 {"const_0_operand", {CONST_INT, ASHIFT}}, \
1613 {"const_8_operand", {CONST_INT, ASHIFT}}, \
1614 {"const_16_operand", {CONST_INT, ASHIFT}}, \
1615 {"const_24_operand", {CONST_INT, ASHIFT}}, \
1616 {"float_const_operand", {CONST_DOUBLE}}, \
1617 {"gpc_reg_operand", {SUBREG, REG}}, \
1618 {"gpc_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1619 {"gpc_reg_or_integer_constant_operand", {SUBREG, REG, \
1620 CONST_INT, CONST_DOUBLE}}, \
1621 {"gpc_reg_or_immediate_operand", {SUBREG, REG, CONST_INT, \
1622 CONST_DOUBLE, CONST, \
1623 SYMBOL_REF, LABEL_REF}}, \
1624 {"spec_reg_operand", {REG}}, \
1625 {"accum_reg_operand", {REG}}, \
1626 {"srcb_operand", {SUBREG, REG, CONST_INT}}, \
1627 {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \
1628 CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \
1629 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1630 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1631 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1632 {"call_operand", {SYMBOL_REF, CONST_INT}}, \
1633 {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \
1634 LABEL_REF, CONST_DOUBLE}}, \
1635 {"out_operand", {SUBREG, REG, MEM}}, \
1636 {"reload_memory_operand", {SUBREG, REG, MEM}}, \
1637 {"fp_comparison_operator", {EQ, GT, GE}}, \
1638 {"branch_operator", {GE, LT}}, \
1639 {"load_multiple_operation", {PARALLEL}}, \
1640 {"store_multiple_operation", {PARALLEL}}, \
1641 {"epilogue_operand", {CODE_LABEL}},