1 /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU.
2 Copyright (C) 1988, 1990, 1991 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI"
26 /* Print subsidiary information on the compiler version in use. */
27 #define TARGET_VERSION
29 /* Pass -w to assembler. */
32 /* Run-time compilation parameters selecting different hardware subsets. */
34 extern int target_flags
;
36 /* Macro to define tables used to set the flags.
37 This is a list in braces of pairs in braces,
38 each pair being { "NAME", VALUE }
39 where VALUE is the bits to set or minus the bits to clear.
40 An empty string NAME is used to identify the default VALUE. */
42 /* This means that the DW bit will be enabled, to allow direct loads
45 #define TARGET_DW_ENABLE (target_flags & 1)
47 /* This means that the external hardware does supports byte writes. */
49 #define TARGET_BYTE_WRITES (target_flags & 2)
51 /* This means that a "small memory model" has been selected where all
52 function addresses are known to be within 256K. This allows CALL to be
55 #define TARGET_SMALL_MEMORY (target_flags & 4)
57 /* This means that we are compiling for a 29050. */
59 #define TARGET_29050 (target_flags & 8)
61 /* This means that we are compiling for the kernel which means that we use
62 gr64-gr95 instead of gr96-126. */
64 #define TARGET_KERNEL_REGISTERS (target_flags & 16)
66 /* This means that a call to "__msp_check" should be inserted after each stack
67 adjustment to check for stack overflow. */
69 #define TARGET_STACK_CHECK (target_flags & 32)
71 /* This handles 29k processors which cannot handle the separation
72 of a mtsrim insns and a storem insn (most 29000 chips to date, but
75 #define TARGET_NO_STOREM_BUG (target_flags & 64)
77 /* This forces the compiler not to use incoming argument registers except
78 for copying out arguments. It helps detect problems when a function is
79 called with fewer arguments than it is declared with. */
81 #define TARGET_NO_REUSE_ARGS (target_flags & 128)
83 #define TARGET_SWITCHES \
92 {"kernel-registers", 16}, \
93 {"user-registers", -16}, \
94 {"stack-check", 32}, \
95 {"no-storem-bug", 64}, \
96 {"reuse-arg-regs", -128}, \
97 {"no-reuse-arg-regs", 128}, \
100 #define TARGET_DEFAULT 3
102 /* Define this to change the optimizations performed by default. */
104 #define OPTIMIZATION_OPTIONS(LEVEL) \
108 flag_force_addr = 1; \
109 flag_force_mem = 1; \
110 flag_omit_frame_pointer = 1; \
114 /* target machine storage layout */
116 /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the
117 same as those used by EPI. The type for wchar_t does not make much
118 sense, but is what is used. */
120 #define SIZE_TYPE "unsigned int"
121 #define PTRDIFF_TYPE "int"
122 #define WCHAR_TYPE "char"
123 #define WCHAR_TYPE_SIZE BITS_PER_UNIT
125 /* Define this if most significant bit is lowest numbered
126 in instructions that operate on numbered bit-fields.
127 This is arbitrary on the 29k since it has no actual bit-field insns.
128 It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE
129 and we want to be able to convert BP position to bit position with
131 #define BITS_BIG_ENDIAN 1
133 /* Define this if most significant byte of a word is the lowest numbered.
134 This is true on 29k. */
135 #define BYTES_BIG_ENDIAN 1
137 /* Define this if most significant word of a multiword number is lowest
140 For 29k we can decide arbitrarily since there are no machine instructions
141 for them. Might as well be consistent with bytes. */
142 #define WORDS_BIG_ENDIAN 1
144 /* number of bits in an addressable storage unit */
145 #define BITS_PER_UNIT 8
147 /* Width in bits of a "word", which is the contents of a machine register.
148 Note that this is not necessarily the width of data type `int';
149 if using 16-bit ints on a 68000, this would still be 32.
150 But on a machine with 16-bit registers, this would be 16. */
151 #define BITS_PER_WORD 32
153 /* Width of a word, in units (bytes). */
154 #define UNITS_PER_WORD 4
156 /* Width in bits of a pointer.
157 See also the macro `Pmode' defined below. */
158 #define POINTER_SIZE 32
160 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
161 #define PARM_BOUNDARY 32
163 /* Boundary (in *bits*) on which stack pointer should be aligned. */
164 #define STACK_BOUNDARY 64
166 /* Allocation boundary (in *bits*) for the code of a function. */
167 #define FUNCTION_BOUNDARY 32
169 /* Alignment of field after `int : 0' in a structure. */
170 #define EMPTY_FIELD_BOUNDARY 32
172 /* Every structure's size must be a multiple of this. */
173 #define STRUCTURE_SIZE_BOUNDARY 8
175 /* A bitfield declared as `int' forces `int' alignment for the struct. */
176 #define PCC_BITFIELD_TYPE_MATTERS 1
178 /* No data type wants to be aligned rounder than this. */
179 #define BIGGEST_ALIGNMENT 32
181 /* Make strings word-aligned so strcpy from constants will be faster. */
182 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
183 (TREE_CODE (EXP) == STRING_CST \
184 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
186 /* Make arrays of chars word-aligned for the same reasons. */
187 #define DATA_ALIGNMENT(TYPE, ALIGN) \
188 (TREE_CODE (TYPE) == ARRAY_TYPE \
189 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
190 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
192 /* Set this non-zero if move instructions will actually fail to work
193 when given unaligned data. */
194 #define STRICT_ALIGNMENT 0
196 /* Set this non-zero if unaligned move instructions are extremely slow.
198 On the 29k, they trap. */
199 #define SLOW_UNALIGNED_ACCESS 1
201 /* Standard register usage. */
203 /* Number of actual hardware registers.
204 The hardware registers are assigned numbers for the compiler
205 from 0 to just below FIRST_PSEUDO_REGISTER.
206 All registers that the compiler knows about must be given numbers,
207 even those that are not normally considered general registers.
209 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are
210 not produced in generated RTL so we can start at gr96, and call it
213 So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input
214 arguments, whose register numbers we won't know until we are done,
215 use register 160-175. They cannot be modified. Similarly, 176 is used
216 for the frame pointer. It is assigned the last local register number
217 once the number of registers used is known.
219 We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q,
220 respectively. Registers 181 through 199 are used for the other special
221 registers that may be used by the programmer, but are never used by the
224 Registers 200-203 are the four floating-point accumulator register in
227 When -mkernel-registers is specified, we still use the same register
228 map but change the names so 0-31 print as gr64-gr95. */
230 #define FIRST_PSEUDO_REGISTER 204
232 /* Because of the large number of registers on the 29k, we define macros
233 to refer to each group of registers and then define the number for some
234 registers used in the calling sequence. */
236 #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */
237 #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */
238 #define R_FP 176 /* frame pointer is register 176 */
239 #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */
241 /* Define the numbers of the special registers. */
247 /* These special registers are not used by the compiler, but may be referenced
248 by the programmer via asm declarations. */
270 /* Define the number for floating-point accumulator N. */
271 #define R_ACC(N) ((N) + 200)
273 /* Now define the registers used in the calling sequence. */
274 #define R_TAV R_GR (121)
275 #define R_TPC R_GR (122)
276 #define R_LRP R_GR (123)
277 #define R_SLP R_GR (124)
278 #define R_MSP R_GR (125)
279 #define R_RAB R_GR (126)
280 #define R_RFB R_GR (127)
282 /* 1 for registers that have pervasive standard uses
283 and are not available for the register allocator. */
285 #define FIXED_REGISTERS \
286 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
287 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
288 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
289 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
290 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
291 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
292 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
293 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
294 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
295 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
296 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
297 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
298 1, 1, 1, 1, 1, 1, 1, 1, \
301 /* 1 for registers not available across function calls.
302 These must include the FIXED_REGISTERS and also any
303 registers that can be used without being saved.
304 The latter must include the registers where values are returned
305 and the register where structure-value addresses are passed.
306 Aside from that, you can include as many other registers as you like. */
307 #define CALL_USED_REGISTERS \
308 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
309 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
310 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
311 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
312 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
313 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
314 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
315 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
316 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
317 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
318 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
319 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
320 1, 1, 1, 1, 1, 1, 1, 1, \
323 /* List the order in which to allocate registers. Each register must be
324 listed once, even those in FIXED_REGISTERS.
326 We allocate in the following order:
327 gr116-gr120 (not used for anything but temps)
328 gr96-gr111 (function return values, reverse order)
329 argument registers (160-175)
330 lr0-lr127 (locals, saved)
331 acc3-0 (acc0 special)
334 #define REG_ALLOC_ORDER \
335 {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \
336 R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \
337 R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \
338 R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \
339 R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \
340 R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \
341 R_AR (12), R_AR (13), R_AR (14), R_AR (15), \
342 R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \
343 R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \
344 R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \
345 R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \
346 R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \
347 R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \
348 R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \
349 R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \
350 R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \
351 R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \
352 R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \
353 R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \
354 R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \
355 R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \
356 R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \
357 R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \
358 R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \
359 R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \
360 R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \
361 R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \
362 R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \
363 R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \
365 R_ACC (3), R_ACC (2), R_ACC (1), R_ACC (0), \
366 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \
367 R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \
369 R_FP, R_BP, R_FC, R_CR, R_Q, \
370 R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \
371 R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \
374 /* Return number of consecutive hard regs needed starting at reg REGNO
375 to hold something of mode MODE.
376 This is ordinarily the length in words of a value of mode MODE
377 but can be less for certain modes in special long registers. */
379 #define HARD_REGNO_NREGS(REGNO, MODE) \
380 ((REGNO) >= R_ACC (0) ? 1 \
381 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
383 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
384 On 29k, the cpu registers can hold any mode. But a double-precision
385 floating-point value should start at an even register. The special
386 registers cannot hold floating-point values and the accumulators cannot
389 (I'd like to use the "?:" syntax to make this more readable, but Sun's
390 compiler doesn't seem to accept it.) */
391 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
392 (((REGNO) >= R_ACC (0) \
393 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
394 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \
395 || ((REGNO) >= R_BP && (REGNO) < R_ACC (0) \
396 && GET_MODE_CLASS (MODE) != MODE_FLOAT \
397 && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \
399 && ((((REGNO) & 1) == 0) || GET_MODE_CLASS (MODE) == MODE_INT \
400 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_INT \
401 || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD)))
403 /* Value is 1 if it is a good idea to tie two pseudo registers
404 when one has mode MODE1 and one has mode MODE2.
405 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
406 for any hard reg, then this must be 0 for correct output.
408 On the 29k, normally we'd just have problems with DFmode because of the
409 even alignment. However, we also have to be a bit concerned about
410 the special register's restriction to non-floating and the floating-point
411 accumulator's restriction to only floating. This probably won't
412 cause any great inefficiencies in practice. */
413 #define MODES_TIEABLE_P(MODE1, MODE2) \
414 ((MODE1) == (MODE2) \
415 || (GET_MODE_CLASS (MODE1) != MODE_FLOAT \
416 && GET_MODE_CLASS (MODE1) != MODE_COMPLEX_FLOAT \
417 && GET_MODE_CLASS (MODE2) != MODE_FLOAT \
418 && GET_MODE_CLASS (MODE2) != MODE_COMPLEX_FLOAT))
420 /* Specify the registers used for certain standard purposes.
421 The values of these macros are register numbers. */
423 /* 29k pc isn't overloaded on a register that the compiler knows about. */
424 /* #define PC_REGNUM */
426 /* Register to use for pushing function arguments. */
427 #define STACK_POINTER_REGNUM R_GR (125)
429 /* Base register for access to local variables of the function. */
430 #define FRAME_POINTER_REGNUM R_FP
432 /* Value should be nonzero if functions must have frame pointers.
433 Zero means the frame pointer need not be set up (and parms
434 may be accessed via the stack pointer) in functions that seem suitable.
435 This is computed in `reload', in reload1.c. */
436 #define FRAME_POINTER_REQUIRED 0
438 /* Base register for access to arguments of the function. */
439 #define ARG_POINTER_REGNUM R_FP
441 /* Register in which static-chain is passed to a function. */
442 #define STATIC_CHAIN_REGNUM R_SLP
444 /* Register in which address to store a structure value
445 is passed to a function. */
446 #define STRUCT_VALUE_REGNUM R_LRP
448 /* Define the classes of registers for register constraints in the
449 machine description. Also define ranges of constants.
451 One of the classes must always be named ALL_REGS and include all hard regs.
452 If there is more than one class, another class must be named NO_REGS
453 and contain no registers.
455 The name GENERAL_REGS must be the name of a class (or an alias for
456 another name such as ALL_REGS). This is the class of registers
457 that is allowed by "g" or "r" in a register constraint.
458 Also, registers outside this class are allocated only when
459 instructions express preferences for them.
461 The classes must be numbered in nondecreasing order; that is,
462 a larger-numbered class must never be contained completely
463 in a smaller-numbered class.
465 For any two classes, it is very desirable that there be another
466 class that represents their union.
468 The 29k has six registers classes: GENERAL_REGS, SPECIAL_REGS,
469 BP_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS. BP_REGS contains just BP and
470 is used for the extract and insert operations to allow combinations; Q
471 contains just the Q register. The latter two classes are used to represent
472 the floating-point accumulator registers in the 29050. We also define the
473 union class FLOAT_REGS to represent any register that can be used to hold a
474 floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't
475 useful as the former cannot contain floating-point and the latter can only
476 contain floating-point. */
478 enum reg_class
{ NO_REGS
, GENERAL_REGS
, BP_REGS
, Q_REGS
, SPECIAL_REGS
,
479 ACCUM0_REGS
, ACCUM_REGS
, FLOAT_REGS
, ALL_REGS
,
482 #define N_REG_CLASSES (int) LIM_REG_CLASSES
484 /* Give names of register classes as strings for dump file. */
486 #define REG_CLASS_NAMES \
487 {"NO_REGS", "GENERAL_REGS", "BP_REGS", "Q_REGS", "SPECIAL_REGS", \
488 "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", "ALL_REGS" }
490 /* Define which registers fit in which classes.
491 This is an initializer for a vector of HARD_REG_SET
492 of length N_REG_CLASSES. */
494 #define REG_CLASS_CONTENTS \
495 { {0, 0, 0, 0, 0, 0, 0}, \
496 {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, 0}, \
497 {0, 0, 0, 0, 0, 0x20000, 0}, \
498 {0, 0, 0, 0, 0, 0x100000, 0}, \
499 {0, 0, 0, 0, 0, 0xfffe0000, 0xff}, \
500 {0, 0, 0, 0, 0, 0, 0x100}, \
501 {0, 0, 0, 0, 0, 0, 0xf00}, \
502 {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, 0xf00}, \
503 {~0, ~0, ~0, ~0, ~0, ~0, ~0} }
505 /* The same information, inverted:
506 Return the class number of the smallest class containing
507 reg number REGNO. This could be a conditional expression
508 or could index an array. */
510 #define REGNO_REG_CLASS(REGNO) \
511 ((REGNO) == R_BP ? BP_REGS \
512 : (REGNO) == R_Q ? Q_REGS \
513 : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \
514 : (REGNO) == R_ACC (0) ? ACCUM0_REGS \
515 : (REGNO) > R_ACC (0) ? ACCUM_REGS \
518 /* The class value for index registers, and the one for base regs. */
519 #define INDEX_REG_CLASS NO_REGS
520 #define BASE_REG_CLASS GENERAL_REGS
522 /* Get reg_class from a letter such as appears in the machine description. */
524 #define REG_CLASS_FROM_LETTER(C) \
525 ((C) == 'r' ? GENERAL_REGS \
526 : (C) == 'b' ? BP_REGS \
527 : (C) == 'q' ? Q_REGS \
528 : (C) == 'h' ? SPECIAL_REGS \
529 : (C) == 'a' ? ACCUM_REGS \
530 : (C) == 'A' ? ACCUM0_REGS \
531 : (C) == 'f' ? FLOAT_REGS \
534 /* Define this macro to change register usage conditional on target flags.
536 On the 29k, we use this to change the register names for kernel mapping. */
538 #define CONDITIONAL_REGISTER_USAGE \
540 static char *kernel_names[] = {"gr64", "gr65", "gr66", "gr67", \
541 "gr68", "gr69", "gr70", "gr71", \
542 "gr72", "gr73", "gr74", "gr75", \
543 "gr76", "gr77", "gr78", "gr79", \
544 "gr80", "gr81", "gr82", "gr83", \
545 "gr84", "gr85", "gr86", "gr87", \
546 "gr88", "gr89", "gr90", "gr91", \
547 "gr92", "gr93", "gr94", "gr95"}; \
550 if (TARGET_KERNEL_REGISTERS) \
551 for (i = 0; i < 32; i++) \
552 reg_names[i] = kernel_names[i]; \
555 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
556 can be used to stand for particular ranges of immediate operands.
557 This macro defines what the ranges are.
558 C is the letter, and VALUE is a constant value.
559 Return 1 if VALUE is in the range specified by C.
562 `I' is used for the range of constants most insns can contain.
563 `J' is for the few 16-bit insns.
564 `K' is a constant whose high-order 24 bits are all one
565 `L' is a HImode constant whose high-order 8 bits are all one
566 `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN)
567 `N' is a 32-bit constant whose negative is 8 bits
568 `O' is the 32-bit constant 0x80000000, any constant with low-order
569 16 bits zero for 29050.
570 `P' is a HImode constant whose negative is 8 bits */
572 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
573 ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \
574 : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \
575 : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \
576 : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \
577 : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \
578 : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \
579 : (C) == 'O' ? ((VALUE) == 0x80000000 \
580 || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \
581 : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \
582 && ((VALUE) | 0xffff0000) > -256) \
585 /* Similar, but for floating constants, and defining letters G and H.
586 Here VALUE is the CONST_DOUBLE rtx itself.
587 All floating-point constants are valid on 29k. */
589 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
591 /* Given an rtx X being reloaded into a reg required to be
592 in class CLASS, return the class of reg to actually use.
593 In general this is just CLASS; but on some machines
594 in some cases it is preferable to use a more restrictive class. */
596 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
598 /* Return the register class of a scratch register needed to copy IN into
599 or out of a register in CLASS in MODE. If it can be done directly,
600 NO_REGS is returned. */
602 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
603 secondary_reload_class (CLASS, MODE, IN)
605 /* Return the maximum number of consecutive registers
606 needed to represent mode MODE in a register of class CLASS.
608 On 29k, this is the size of MODE in words except that the floating-point
609 accumulators only require one word for anything they can hold. */
611 #define CLASS_MAX_NREGS(CLASS, MODE) \
612 (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \
613 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
615 /* Define the cost of moving between registers of various classes. Everything
616 involving a general register is cheap, but moving between the other types
617 (even within a class) is two insns. */
619 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
620 ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4)
622 /* Stack layout; function entry, exit and calling. */
624 /* Define this if pushing a word on the stack
625 makes the stack pointer a smaller address. */
626 #define STACK_GROWS_DOWNWARD
628 /* Define this if the nominal address of the stack frame
629 is at the high-address end of the local variables;
630 that is, each additional local variable allocated
631 goes at a more negative offset in the frame. */
632 #define FRAME_GROWS_DOWNWARD
634 /* Offset within stack frame to start allocating local variables at.
635 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
636 first local allocated. Otherwise, it is the offset to the BEGINNING
637 of the first local allocated. */
639 #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size)
641 /* If we generate an insn to push BYTES bytes,
642 this says how many the stack pointer really advances by.
643 On 29k, don't define this because there are no push insns. */
644 /* #define PUSH_ROUNDING(BYTES) */
646 /* Define this if the maximum size of all the outgoing args is to be
647 accumulated and pushed during the prologue. The amount can be
648 found in the variable current_function_outgoing_args_size. */
649 #define ACCUMULATE_OUTGOING_ARGS
651 /* Offset of first parameter from the argument pointer register value. */
653 #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size)
655 /* Define this if stack space is still allocated for a parameter passed
657 /* #define REG_PARM_STACK_SPACE */
659 /* Value is the number of bytes of arguments automatically
660 popped when returning from a subroutine call.
661 FUNTYPE is the data type of the function (as a tree),
662 or for a library call it is an identifier node for the subroutine name.
663 SIZE is the number of bytes of arguments passed on the stack. */
665 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
667 /* Define how to find the value returned by a function.
668 VALTYPE is the data type of the value (as a tree).
669 If the precise function being called is known, FUNC is its FUNCTION_DECL;
670 otherwise, FUNC is 0.
672 On 29k the value is found in gr96. */
674 #define FUNCTION_VALUE(VALTYPE, FUNC) \
675 gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96))
677 /* Define how to find the value returned by a library function
678 assuming the value has mode MODE. */
680 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96))
682 /* 1 if N is a possible register number for a function value
683 as seen by the caller.
684 On 29k, gr96-gr111 are used. */
686 #define FUNCTION_VALUE_REGNO_P(N) ((N) < R_GR (112))
688 /* 1 if N is a possible register number for function argument passing.
689 On 29k, these are lr2-lr17. */
691 #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2))
693 /* Define a data type for recording info about an argument list
694 during the scan of that argument list. This data type should
695 hold all necessary information about the function itself
696 and about the args processed so far, enough to enable macros
697 such as FUNCTION_ARG to determine where the next arg should go.
699 On 29k, this is a single integer, which is a number of words
700 of arguments scanned so far.
701 Thus 16 or more means all following args should go on the stack. */
703 #define CUMULATIVE_ARGS int
705 /* Initialize a variable CUM of type CUMULATIVE_ARGS
706 for a call to a function whose data type is FNTYPE.
707 For a library call, FNTYPE is 0. */
709 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
711 /* Same, but called for incoming args.
713 On the 29k, we use this to set all argument registers to fixed and
714 set the last 16 local regs (lr112-lr127) to available. Some
715 will later be changed to call-saved by FUNCTION_INCOMING_ARG. */
717 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
719 for (i = R_AR (0); i < R_AR (16); i++) \
721 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \
722 SET_HARD_REG_BIT (fixed_reg_set, i); \
723 SET_HARD_REG_BIT (call_used_reg_set, i); \
724 SET_HARD_REG_BIT (call_fixed_reg_set, i); \
726 for (i = R_LR (112); i < R_LR (128); i++) \
728 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \
729 CLEAR_HARD_REG_BIT (fixed_reg_set, i); \
730 CLEAR_HARD_REG_BIT (call_used_reg_set, i); \
731 CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \
736 /* Define intermediate macro to compute the size (in registers) of an argument
739 #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \
741 : (MODE) != BLKmode \
742 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
743 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
745 /* Update the data in CUM to advance over an argument
746 of mode MODE and data type TYPE.
747 (TYPE is null for libcalls where that information may not be available.) */
749 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
750 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
753 (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED)
755 /* Determine where to put an argument to a function.
756 Value is zero to push the argument on the stack,
757 or a hard register in which to store the argument.
759 MODE is the argument's machine mode.
760 TYPE is the data type of the argument (as a tree).
761 This is null for libcalls where that information may
763 CUM is a variable of type CUMULATIVE_ARGS which gives info about
764 the preceding args and about the function being called.
765 NAMED is nonzero if this argument is a named parameter
766 (otherwise it is an extra parameter matching an ellipsis).
768 On 29k the first 16 words of args are normally in registers
769 and the rest are pushed. */
771 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
772 ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
773 ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0)
775 /* Define where a function finds its arguments.
776 This is different from FUNCTION_ARG because of register windows.
778 On the 29k, we hack this to call a function that sets the used registers
779 as non-fixed and not used by calls. */
781 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
782 ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
783 ? gen_rtx (REG, MODE, \
784 incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \
787 /* This indicates that an argument is to be passed with an invisible reference
788 (i.e., a pointer to the object is passed).
790 On the 29k, we do this if it must be passed on the stack. */
792 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
793 (MUST_PASS_IN_STACK (MODE, TYPE))
795 /* Specify the padding direction of arguments.
797 On the 29k, we must pad upwards in order to be able to pass args in
800 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
802 /* For an arg passed partly in registers and partly in memory,
803 this is the number of registers used.
804 For args passed entirely in registers or entirely in memory, zero. */
806 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
807 ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \
810 /* Perform any needed actions needed for a function that is receiving a
811 variable number of arguments.
815 MODE and TYPE are the mode and type of the current parameter.
817 PRETEND_SIZE is a variable that should be set to the amount of stack
818 that must be pushed by the prolog to pretend that our caller pushed
821 Normally, this macro will push all remaining incoming registers on the
822 stack and set PRETEND_SIZE to the length of the registers pushed. */
824 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
827 int first_reg_offset = (CUM); \
829 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
830 first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
832 if (first_reg_offset > 16) \
833 first_reg_offset = 16; \
835 if (! (NO_RTL) && first_reg_offset != 16) \
836 move_block_from_reg \
837 (R_AR (0) + first_reg_offset, \
838 gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \
839 16 - first_reg_offset); \
840 PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \
844 /* Define the information needed to generate branch and scc insns. This is
845 stored from the compare operation. Note that we can't use "rtx" here
846 since it hasn't been defined! */
848 extern struct rtx_def
*a29k_compare_op0
, *a29k_compare_op1
;
849 extern int a29k_compare_fp_p
;
851 /* This macro produces the initial definition of a function name.
853 For the 29k, we need the prolog to contain one or two words prior to
854 the declaration of the function name. So just store away the name and
855 write it as part of the prolog. */
857 extern char *a29k_function_name
;
859 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
860 a29k_function_name = NAME;
862 /* This macro generates the assembly code for function entry.
863 FILE is a stdio stream to output the code to.
864 SIZE is an int: how many units of temporary storage to allocate.
865 Refer to the array `regs_ever_live' to determine which registers
866 to save; `regs_ever_live[I]' is nonzero if register number I
867 is ever used in the function. This macro is responsible for
868 knowing which registers should not be saved even if used. */
870 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
872 /* Output assembler code to FILE to increment profiler label # LABELNO
873 for profiling a function entry. */
875 #define FUNCTION_PROFILER(FILE, LABELNO)
877 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
878 the stack pointer does not matter. The value is tested only in
879 functions that have frame pointers.
880 No definition is equivalent to always zero. */
882 #define EXIT_IGNORE_STACK 1
884 /* This macro generates the assembly code for function exit,
885 on machines that need it. If FUNCTION_EPILOGUE is not defined
886 then individual return instructions are generated for each
887 return statement. Args are same as for FUNCTION_PROLOGUE.
889 The function epilogue should not depend on the current stack pointer!
890 It should use the frame pointer only. This is mandatory because
891 of alloca; we also take advantage of it to omit stack adjustments
894 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
896 /* Define the number of delay slots needed for the function epilogue.
898 On the 29k, we need a slot except when we have a register stack adjustment,
899 have a memory stack adjustment, and have no frame pointer. */
901 #define DELAY_SLOTS_FOR_EPILOGUE \
902 (! (needs_regstack_p () \
903 && (get_frame_size () + current_function_pretend_args_size \
904 + current_function_outgoing_args_size) != 0 \
905 && ! frame_pointer_needed))
907 /* Define whether INSN can be placed in delay slot N for the epilogue.
909 On the 29k, we must be able to place it in a delay slot, it must
910 not use sp if the frame pointer cannot be eliminated, and it cannot
911 use local regs if we need to push the register stack. */
913 #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
914 (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \
915 && ! (frame_pointer_needed \
916 && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \
917 && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN))))
919 /* Output assembler code for a block containing the constant parts
920 of a trampoline, leaving space for the variable parts.
922 The trampoline should set the static chain pointer to value placed
923 into the trampoline and should branch to the specified routine. We
924 use gr121 (tav) as a temporary. */
926 #define TRAMPOLINE_TEMPLATE(FILE) \
928 fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \
929 fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \
930 fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \
931 fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \
932 fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \
935 /* Length in units of the trampoline for entering a nested function. */
937 #define TRAMPOLINE_SIZE 20
939 /* Emit RTL insns to initialize the variable parts of a trampoline.
940 FNADDR is an RTX for the address of the function's pure code.
941 CXT is an RTX for the static chain value for the function.
943 We do this on the 29k by writing the bytes of the addresses into the
944 trampoline one byte at a time. */
946 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
948 INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \
949 INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \
952 /* Define a sub-macro to initialize one value into the trampoline.
953 We specify the offsets of the CONST and CONSTH instructions, respectively
954 and copy the value a byte at a time into these instructions. */
956 #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \
959 rtx _val = force_reg (SImode, VALUE); \
961 _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \
962 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
963 gen_lowpart (QImode, _val)); \
965 _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
966 build_int_2 (8, 0), 0, 1); \
967 _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \
968 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
969 gen_lowpart (QImode, _temp)); \
971 _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
972 build_int_2 (8, 0), _temp, 1); \
973 _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \
974 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
975 gen_lowpart (QImode, _temp)); \
977 _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
978 build_int_2 (8, 0), _temp, 1); \
979 _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \
980 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
981 gen_lowpart (QImode, _temp)); \
984 /* Addressing modes, and classification of registers for them. */
986 /* #define HAVE_POST_INCREMENT */
987 /* #define HAVE_POST_DECREMENT */
989 /* #define HAVE_PRE_DECREMENT */
990 /* #define HAVE_PRE_INCREMENT */
992 /* Macros to check register numbers against specific register classes. */
994 /* These assume that REGNO is a hard or pseudo reg number.
995 They give nonzero only if REGNO is a hard reg of the suitable class
996 or a pseudo reg currently allocated to a suitable hard reg.
997 Since they use reg_renumber, they are safe only once reg_renumber
998 has been allocated, which happens in local-alloc.c. */
1000 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1001 #define REGNO_OK_FOR_BASE_P(REGNO) 1
1003 /* Given the value returned from get_frame_size, compute the actual size
1004 of the frame we will allocate. We include the pretend and outgoing
1005 arg sizes and round to a doubleword. */
1007 #define ACTUAL_FRAME_SIZE(SIZE) \
1008 (((SIZE) + current_function_pretend_args_size \
1009 + current_function_outgoing_args_size + 7) & ~7)
1011 /* Define the initial offset between the frame and stack pointer. */
1013 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1014 (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ())
1016 /* Maximum number of registers that can appear in a valid memory address. */
1017 #define MAX_REGS_PER_ADDRESS 1
1019 /* Recognize any constant value that is a valid address.
1021 None are on the 29K. */
1022 #define CONSTANT_ADDRESS_P(X) 0
1024 /* Include all constant integers and constant doubles */
1025 #define LEGITIMATE_CONSTANT_P(X) 1
1027 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1028 and check its validity for a certain class.
1029 We have two alternate definitions for each of them.
1030 The usual definition accepts all pseudo regs; the other rejects
1031 them unless they have been allocated suitable hard regs.
1032 The symbol REG_OK_STRICT causes the latter definition to be used.
1034 Most source files want to accept pseudo regs in the hope that
1035 they will get allocated to the class that the insn wants them to be in.
1036 Source files for reload pass need to be strict.
1037 After reload, it makes no difference, since pseudo regs have
1038 been eliminated by then. */
1040 #ifndef REG_OK_STRICT
1042 /* Nonzero if X is a hard reg that can be used as an index
1043 or if it is a pseudo reg. */
1044 #define REG_OK_FOR_INDEX_P(X) 0
1045 /* Nonzero if X is a hard reg that can be used as a base reg
1046 or if it is a pseudo reg. */
1047 #define REG_OK_FOR_BASE_P(X) 1
1051 /* Nonzero if X is a hard reg that can be used as an index. */
1052 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1053 /* Nonzero if X is a hard reg that can be used as a base reg. */
1054 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1058 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1059 that is a valid memory address for an instruction.
1060 The MODE argument is the machine mode for the MEM expression
1061 that wants to use this address.
1063 On the 29k, a legitimate address is a register and so is a
1064 constant of less than 256. */
1066 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1067 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1069 if (GET_CODE (X) == CONST_INT \
1070 && (unsigned) INTVAL (X) < 0x100) \
1074 /* Try machine-dependent ways of modifying an illegitimate address
1075 to be legitimate. If we find one, return the new, valid address.
1076 This macro is used in only one place: `memory_address' in explow.c.
1078 OLDX is the address as it was before break_out_memory_refs was called.
1079 In some cases it is useful to look at this to decide what needs to be done.
1081 MODE and WIN are passed so that this macro can use
1082 GO_IF_LEGITIMATE_ADDRESS.
1084 It is always safe for this macro to do nothing. It exists to recognize
1085 opportunities to optimize the output.
1087 For the 29k, we need not do anything. However, if we don't,
1088 `memory_address' will try lots of things to get a valid address, most of
1089 which will result in dead code and extra pseudos. So we make the address
1092 This is easy: The only valid addresses are an offset from a register
1093 and we know the address isn't valid. So just call either `force_operand'
1094 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1096 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1097 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1099 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1100 X = force_operand (X, 0); \
1102 X = force_reg (Pmode, X); \
1106 /* Go to LABEL if ADDR (a legitimate address expression)
1107 has an effect that depends on the machine mode it is used for.
1108 On the 29k this is never true. */
1110 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1112 /* Compute the cost of an address. For the 29k, all valid addresses are
1115 #define ADDRESS_COST(X) 0
1117 /* Define this if some processing needs to be done immediately before
1118 emitting code for an insn. */
1120 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1122 /* Specify the machine mode that this machine uses
1123 for the index in the tablejump instruction. */
1124 #define CASE_VECTOR_MODE SImode
1126 /* Define this if the tablejump instruction expects the table
1127 to contain offsets from the address of the table.
1128 Do not define this if the table should contain absolute addresses. */
1129 /* #define CASE_VECTOR_PC_RELATIVE */
1131 /* Specify the tree operation to be used to convert reals to integers. */
1132 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1134 /* This is the kind of divide that is easiest to do in the general case. */
1135 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1137 /* Define this as 1 if `char' should by default be signed; else as 0. */
1138 #define DEFAULT_SIGNED_CHAR 0
1140 /* This flag, if defined, says the same insns that convert to a signed fixnum
1141 also convert validly to an unsigned one.
1143 We actually lie a bit here as overflow conditions are different. But
1144 they aren't being checked anyway. */
1146 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1148 /* Max number of bytes we can move to of from memory
1149 in one reasonably fast instruction.
1151 For the 29k, we will define movti, so put this at 4 words. */
1154 /* Largest number of bytes of an object that can be placed in a register.
1155 On the 29k we have plenty of registers, so use TImode. */
1156 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1158 /* Nonzero if access to memory by bytes is no faster than for words.
1159 Also non-zero if doing byte operations (specifically shifts) in registers
1162 On the 29k, large masks are expensive, so we want to use bytes to
1163 manipulate fields. */
1164 #define SLOW_BYTE_ACCESS 0
1166 /* Define if normal loads of shorter-than-word items from memory clears
1167 the rest of the bigs in the register. */
1168 #define BYTE_LOADS_ZERO_EXTEND
1170 /* This uses COFF, so it wants SDB format. */
1171 #define SDB_DEBUGGING_INFO
1173 /* Define this to be the delimiter between SDB sub-sections. The default
1175 #define SDB_DELIM "\n"
1177 /* Do not break .stabs pseudos into continuations. */
1178 #define DBX_CONTIN_LENGTH 0
1180 /* Don't try to use the `x' type-cross-reference character in DBX data.
1181 Also has the consequence of putting each struct, union or enum
1182 into a separate .stabs, containing only cross-refs to the others. */
1183 #define DBX_NO_XREFS
1185 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1186 is done just by pretending it is already truncated. */
1187 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1189 /* We assume that the store-condition-codes instructions store 0 for false
1190 and some other value for true. This is the value stored for true. */
1192 #define STORE_FLAG_VALUE 0x80000000
1194 /* Specify the machine mode that pointers have.
1195 After generation of rtl, the compiler makes no further distinction
1196 between pointers and any other objects of this machine mode. */
1197 #define Pmode SImode
1199 /* Mode of a function address in a call instruction (for indexing purposes).
1201 Doesn't matter on 29k. */
1202 #define FUNCTION_MODE SImode
1204 /* Define this if addresses of constant functions
1205 shouldn't be put through pseudo regs where they can be cse'd.
1206 Desirable on machines where ordinary constants are expensive
1207 but a CALL with constant address is cheap. */
1208 #define NO_FUNCTION_CSE
1210 /* Define this if shift instructions ignore all but the low-order
1212 #define SHIFT_COUNT_TRUNCATED
1214 /* Compute the cost of computing a constant rtl expression RTX
1215 whose rtx-code is CODE. The body of this macro is a portion
1216 of a switch statement. If the code is computed here,
1217 return it with a return statement. Otherwise, break from the switch.
1219 We only care about the cost if it is valid in an insn. The only
1220 constants that cause an insn to generate more than one machine
1221 instruction are those involving floating-point or address. So
1222 only these need be expensive. */
1224 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1231 case CONST_DOUBLE: \
1232 return GET_MODE (RTX) == SFmode ? 6 : 8;
1234 /* Provide the costs of a rtl expression. This is in the body of a
1237 All MEMs cost the same if they are valid. This is used to ensure
1238 that (mem (symbol_ref ...)) is placed into a CALL when valid.
1240 The multiply cost depends on whether this is a 29050 or not. */
1242 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1244 return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \
1249 return COSTS_N_INSNS (50); \
1251 return COSTS_N_INSNS (2);
1253 /* Control the assembler format that we output. */
1255 /* Output at beginning of assembler file. */
1257 #define ASM_FILE_START(FILE) \
1258 { char *p, *after_dir = main_input_filename; \
1260 fprintf (FILE, "\t.cputype 29050\n"); \
1261 for (p = main_input_filename; *p; p++) \
1263 after_dir = p + 1; \
1264 fprintf (FILE, "\t.file \"%s\"\n", after_dir); \
1265 fprintf (FILE, "\t.sect .lit,lit\n"); }
1267 /* Output to assembler file text saying following lines
1268 may contain character constants, extra white space, comments, etc. */
1270 #define ASM_APP_ON ""
1272 /* Output to assembler file text saying following lines
1273 no longer contain unusual constructs. */
1275 #define ASM_APP_OFF ""
1277 /* The next few macros don't have tabs on most machines, but
1278 at least one 29K assembler wants them. */
1280 /* Output before instructions. */
1282 #define TEXT_SECTION_ASM_OP "\t.text"
1284 /* Output before read-only data. */
1286 #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit"
1288 /* Output before writable data. */
1290 #define DATA_SECTION_ASM_OP "\t.data"
1292 /* Define an extra section for read-only data, a routine to enter it, and
1293 indicate that it is for read-only data. */
1295 #define EXTRA_SECTIONS readonly_data
1297 #define EXTRA_SECTION_FUNCTIONS \
1299 literal_section () \
1301 if (in_section != readonly_data) \
1303 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1304 in_section = readonly_data; \
1308 #define READONLY_DATA_SECTION literal_section
1310 /* How to refer to registers in assembler output.
1311 This sequence is indexed by compiler's hard-register-number (see above). */
1313 #define REGISTER_NAMES \
1314 {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \
1315 "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \
1316 "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \
1317 "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \
1318 "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \
1319 "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \
1320 "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \
1321 "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \
1322 "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \
1323 "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \
1324 "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \
1325 "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \
1326 "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \
1327 "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \
1328 "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \
1329 "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \
1330 "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \
1331 "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \
1332 "lr124", "lr125", "lr126", "lr127", \
1333 "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \
1334 "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \
1335 "bp", "fc", "cr", "q", \
1336 "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \
1337 "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \
1338 "0", "1", "2", "3" }
1340 /* How to renumber registers for dbx and gdb. */
1342 extern int a29k_debug_reg_map
[];
1343 #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO]
1345 /* This is how to output the definition of a user-level label named NAME,
1346 such as the label on a static function or variable NAME. */
1348 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1349 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1351 /* This is how to output a command to make the user-level label named NAME
1352 defined for reference from other files. */
1354 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1355 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1357 /* This is how to output a reference to a user-level label named NAME.
1358 `assemble_name' uses this. */
1360 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1361 fprintf (FILE, "_%s", NAME)
1363 /* This is how to output an internal numbered label where
1364 PREFIX is the class of label and NUM is the number within the class. */
1366 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1367 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1369 /* This is how to output a label for a jump table. Arguments are the same as
1370 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1373 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1374 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1376 /* This is how to store into the string LABEL
1377 the symbol_ref name of an internal numbered label where
1378 PREFIX is the class of label and NUM is the number within the class.
1379 This is suitable for output with `assemble_name'. */
1381 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1382 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1384 /* This is how to output an assembler line defining a `double' constant. */
1386 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1387 fprintf (FILE, "\t.double %.20e\n", (VALUE))
1389 /* This is how to output an assembler line defining a `float' constant. */
1391 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1392 fprintf (FILE, "\t.float %.20e\n", (VALUE))
1394 /* This is how to output an assembler line defining an `int' constant. */
1396 #define ASM_OUTPUT_INT(FILE,VALUE) \
1397 ( fprintf (FILE, "\t.word "), \
1398 output_addr_const (FILE, (VALUE)), \
1399 fprintf (FILE, "\n"))
1401 /* Likewise for `char' and `short' constants. */
1403 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1404 ( fprintf (FILE, "\t.hword "), \
1405 output_addr_const (FILE, (VALUE)), \
1406 fprintf (FILE, "\n"))
1408 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1409 ( fprintf (FILE, "\t.byte "), \
1410 output_addr_const (FILE, (VALUE)), \
1411 fprintf (FILE, "\n"))
1413 /* This is how to output an insn to push a register on the stack.
1414 It need not be very fast code. */
1416 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1417 fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \
1418 reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \
1421 /* This is how to output an insn to pop a register from the stack.
1422 It need not be very fast code. */
1424 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1425 fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \
1426 reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \
1429 /* This is how to output an assembler line for a numeric constant byte. */
1431 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1432 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1434 /* This is how to output an element of a case-vector that is absolute. */
1436 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1437 fprintf (FILE, "\t.word L%d\n", VALUE)
1439 /* This is how to output an element of a case-vector that is relative.
1440 (29k does not use such vectors,
1441 but we must define this macro anyway.) */
1443 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1445 /* This is how to output an assembler line
1446 that says to advance the location counter
1447 to a multiple of 2**LOG bytes. */
1449 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1451 fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1453 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1454 fprintf (FILE, "\t.block %d\n", (SIZE))
1456 /* This says how to output an assembler line
1457 to define a global common symbol. */
1459 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1460 ( fputs ("\t.comm ", (FILE)), \
1461 assemble_name ((FILE), (NAME)), \
1462 fprintf ((FILE), ",%d\n", (SIZE)))
1464 /* This says how to output an assembler line
1465 to define a local common symbol. */
1467 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1468 ( fputs ("\t.lcomm ", (FILE)), \
1469 assemble_name ((FILE), (NAME)), \
1470 fprintf ((FILE), ",%d\n", (SIZE)))
1472 /* Store in OUTPUT a string (made with alloca) containing
1473 an assembler-name for a local static variable named NAME.
1474 LABELNO is an integer which is different for each call. */
1476 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1477 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1478 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1480 /* Define the parentheses used to group arithmetic operations
1481 in assembler code. */
1483 #define ASM_OPEN_PAREN "("
1484 #define ASM_CLOSE_PAREN ")"
1486 /* Define results of standard character escape sequences. */
1487 #define TARGET_BELL 007
1488 #define TARGET_BS 010
1489 #define TARGET_TAB 011
1490 #define TARGET_NEWLINE 012
1491 #define TARGET_VT 013
1492 #define TARGET_FF 014
1493 #define TARGET_CR 015
1495 /* Print operand X (an rtx) in assembler syntax to file FILE.
1496 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1497 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1499 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1501 /* Determine which codes are valid without a following integer. These must
1504 We support `#' which is null if a delay slot exists, otherwise
1505 "\n\tnop" and `*' which prints the register name for TPC (gr122). */
1507 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*')
1509 /* Print a memory address as an operand to reference that memory location. */
1511 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1512 { register rtx addr = ADDR; \
1514 && ! (GET_CODE (addr) == CONST_INT \
1515 && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \
1517 output_operand (addr, 0); \
1519 /* Define the codes that are matched by predicates in a29k.c. */
1521 #define PREDICATE_CODES \
1522 {"cint_8_operand", {CONST_INT}}, \
1523 {"cint_16_operand", {CONST_INT}}, \
1524 {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \
1525 LABEL_REF, SYMBOL_REF}}, \
1526 {"shift_constant_operand", {CONST_INT, ASHIFT}}, \
1527 {"const_0__operand", {CONST_INT, ASHIFT}}, \
1528 {"const_8__operand", {CONST_INT, ASHIFT}}, \
1529 {"const_16__operand", {CONST_INT, ASHIFT}}, \
1530 {"const_24__operand", {CONST_INT, ASHIFT}}, \
1531 {"float_const_operand", {CONST_DOUBLE}}, \
1532 {"gen_reg_operand", {SUBREG, REG}}, \
1533 {"gen_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1534 {"gen_reg_or_integer_constant_operand", {SUBREG, REG, \
1535 CONST_INT, CONST_DOUBLE}}, \
1536 {"spec_reg_operand", {REG}}, \
1537 {"accum_reg_operand", {REG}}, \
1538 {"srcb_operand", {SUBREG, REG, CONST_INT}}, \
1539 {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \
1540 CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \
1541 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1542 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1543 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1544 {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \
1545 LABEL_REF, CONST_DOUBLE}}, \
1546 {"out_operand", {SUBREG, REG, MEM}}, \
1547 {"extend_operator", {ZERO_EXTEND, SIGN_EXTEND}}, \
1548 {"fp_comparison_operator", {EQ, GT, GE}}, \
1549 {"branch_operator", {GE, LT}}, \
1550 {"epilogue_operand", {CODE_LABEL}},