1 /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU.
2 Copyright (C) 1988, 90-95, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Names to predefine in the preprocessor for this target machine. */
25 #define CPP_PREDEFINES "-D_AM29K -D_AM29000 -D_EPI -Acpu(a29k) -Amachine(a29k)"
27 /* Print subsidiary information on the compiler version in use. */
28 #define TARGET_VERSION
30 /* Pass -w to assembler. */
33 /* Run-time compilation parameters selecting different hardware subsets. */
35 extern int target_flags
;
37 /* Macro to define tables used to set the flags.
38 This is a list in braces of pairs in braces,
39 each pair being { "NAME", VALUE }
40 where VALUE is the bits to set or minus the bits to clear.
41 An empty string NAME is used to identify the default VALUE. */
43 /* This means that the DW bit will be enabled, to allow direct loads
46 #define TARGET_DW_ENABLE (target_flags & 1)
48 /* This means that the external hardware does supports byte writes. */
50 #define TARGET_BYTE_WRITES (target_flags & 2)
52 /* This means that a "small memory model" has been selected where all
53 function addresses are known to be within 256K. This allows CALL to be
56 #define TARGET_SMALL_MEMORY (target_flags & 4)
58 /* This means that we must always used on indirect call, even when
59 calling a function in the same file, since the file might be > 256KB. */
61 #define TARGET_LARGE_MEMORY (target_flags & 8)
63 /* This means that we are compiling for a 29050. */
65 #define TARGET_29050 (target_flags & 16)
67 /* This means that we are compiling for the kernel which means that we use
68 gr64-gr95 instead of gr96-126. */
70 #define TARGET_KERNEL_REGISTERS (target_flags & 32)
72 /* This means that a call to "__msp_check" should be inserted after each stack
73 adjustment to check for stack overflow. */
75 #define TARGET_STACK_CHECK (target_flags & 64)
77 /* This handles 29k processors which cannot handle the separation
78 of a mtsrim insns and a storem insn (most 29000 chips to date, but
81 #define TARGET_NO_STOREM_BUG (target_flags & 128)
83 /* This forces the compiler not to use incoming argument registers except
84 for copying out arguments. It helps detect problems when a function is
85 called with fewer arguments than it is declared with. */
87 #define TARGET_NO_REUSE_ARGS (target_flags & 256)
89 /* This means that neither builtin nor emulated float operations are
90 available, and that GCC should generate libcalls instead. */
92 #define TARGET_SOFT_FLOAT (target_flags & 512)
94 /* This means that we should not emit the multm or mutmu instructions
95 that some embedded systems' trap handlers don't support. */
97 #define TARGET_MULTM ((target_flags & 1024) == 0)
99 #define TARGET_SWITCHES \
105 {"normal", - (4|8)}, \
109 {"kernel-registers", 32}, \
110 {"user-registers", -32}, \
111 {"stack-check", 64}, \
112 {"no-stack-check", - 74}, \
113 {"storem-bug", -128}, \
114 {"no-storem-bug", 128}, \
115 {"reuse-arg-regs", -256}, \
116 {"no-reuse-arg-regs", 256}, \
117 {"soft-float", 512}, \
118 {"no-multm", 1024}, \
119 {"", TARGET_DEFAULT}}
121 #define TARGET_DEFAULT 3
123 /* Show we can debug even without a frame pointer. */
124 #define CAN_DEBUG_WITHOUT_FP
126 /* target machine storage layout */
128 /* Define the types for size_t, ptrdiff_t, and wchar_t. These are the
129 same as those used by EPI. The type for wchar_t does not make much
130 sense, but is what is used. */
132 #define SIZE_TYPE "unsigned int"
133 #define PTRDIFF_TYPE "int"
134 #define WCHAR_TYPE "char"
135 #define WCHAR_TYPE_SIZE BITS_PER_UNIT
137 /* Define this macro if it is advisable to hold scalars in registers
138 in a wider mode than that declared by the program. In such cases,
139 the value is constrained to be within the bounds of the declared
140 type, but kept valid in the wider mode. The signedness of the
141 extension may differ from that of the type. */
143 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
144 if (GET_MODE_CLASS (MODE) == MODE_INT \
145 && GET_MODE_SIZE (MODE) < 4) \
148 /* Define this if most significant bit is lowest numbered
149 in instructions that operate on numbered bit-fields.
150 This is arbitrary on the 29k since it has no actual bit-field insns.
151 It is better to define this as TRUE because BYTES_BIG_ENDIAN is TRUE
152 and we want to be able to convert BP position to bit position with
154 #define BITS_BIG_ENDIAN 1
156 /* Define this if most significant byte of a word is the lowest numbered.
157 This is true on 29k. */
158 #define BYTES_BIG_ENDIAN 1
160 /* Define this if most significant word of a multiword number is lowest
163 For 29k we can decide arbitrarily since there are no machine instructions
164 for them. Might as well be consistent with bytes. */
165 #define WORDS_BIG_ENDIAN 1
167 /* number of bits in an addressable storage unit */
168 #define BITS_PER_UNIT 8
170 /* Width in bits of a "word", which is the contents of a machine register.
171 Note that this is not necessarily the width of data type `int';
172 if using 16-bit ints on a 68000, this would still be 32.
173 But on a machine with 16-bit registers, this would be 16. */
174 #define BITS_PER_WORD 32
176 /* Width of a word, in units (bytes). */
177 #define UNITS_PER_WORD 4
179 /* Width in bits of a pointer.
180 See also the macro `Pmode' defined below. */
181 #define POINTER_SIZE 32
183 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
184 #define PARM_BOUNDARY 32
186 /* Boundary (in *bits*) on which stack pointer should be aligned. */
187 #define STACK_BOUNDARY 64
189 /* Allocation boundary (in *bits*) for the code of a function. */
190 #define FUNCTION_BOUNDARY 32
192 /* Alignment of field after `int : 0' in a structure. */
193 #define EMPTY_FIELD_BOUNDARY 32
195 /* Every structure's size must be a multiple of this. */
196 #define STRUCTURE_SIZE_BOUNDARY 8
198 /* A bitfield declared as `int' forces `int' alignment for the struct. */
199 #define PCC_BITFIELD_TYPE_MATTERS 1
201 /* No data type wants to be aligned rounder than this. */
202 #define BIGGEST_ALIGNMENT 32
204 /* Make strings word-aligned so strcpy from constants will be faster. */
205 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
206 (TREE_CODE (EXP) == STRING_CST \
207 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
209 /* Make arrays of chars word-aligned for the same reasons. */
210 #define DATA_ALIGNMENT(TYPE, ALIGN) \
211 (TREE_CODE (TYPE) == ARRAY_TYPE \
212 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
213 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
215 /* Set this non-zero if move instructions will actually fail to work
216 when given unaligned data. */
217 #define STRICT_ALIGNMENT 0
219 /* Set this non-zero if unaligned move instructions are extremely slow.
221 On the 29k, they trap. */
222 #define SLOW_UNALIGNED_ACCESS 1
224 /* Standard register usage. */
226 /* Number of actual hardware registers.
227 The hardware registers are assigned numbers for the compiler
228 from 0 to just below FIRST_PSEUDO_REGISTER.
229 All registers that the compiler knows about must be given numbers,
230 even those that are not normally considered general registers.
232 29k has 256 registers, of which 62 are not defined. gr0 and gr1 are
233 not produced in generated RTL so we can start at gr96, and call it
236 So 0-31 are gr96-gr127, lr0-lr127 are 32-159. To represent the input
237 arguments, whose register numbers we won't know until we are done,
238 use register 160-175. They cannot be modified. Similarly, 176 is used
239 for the frame pointer. It is assigned the last local register number
240 once the number of registers used is known.
242 We use 177, 178, 179, and 180 for the special registers BP, FC, CR, and Q,
243 respectively. Registers 181 through 199 are used for the other special
244 registers that may be used by the programmer, but are never used by the
247 Registers 200-203 are the four floating-point accumulator register in
250 Registers 204-235 are the 32 global registers for kernel mode when
251 -mkernel-registers is not specified, and the 32 global user registers
254 When -mkernel-registers is specified, we still use the same register
255 map but change the names so 0-31 print as gr64-gr95. */
257 #define FIRST_PSEUDO_REGISTER 236
259 /* Because of the large number of registers on the 29k, we define macros
260 to refer to each group of registers and then define the number for some
261 registers used in the calling sequence. */
263 #define R_GR(N) ((N) - 96) /* gr96 is register number 0 */
264 #define R_LR(N) ((N) + 32) /* lr0 is register number 32 */
265 #define R_FP 176 /* frame pointer is register 176 */
266 #define R_AR(N) ((N) + 160) /* first incoming arg reg is 160 */
267 #define R_KR(N) ((N) + 204) /* kernel registers (gr64 to gr95) */
269 /* Define the numbers of the special registers. */
275 /* These special registers are not used by the compiler, but may be referenced
276 by the programmer via asm declarations. */
298 /* Define the number for floating-point accumulator N. */
299 #define R_ACU(N) ((N) + 200)
301 /* Now define the registers used in the calling sequence. */
302 #define R_TAV R_GR (121)
303 #define R_TPC R_GR (122)
304 #define R_LRP R_GR (123)
305 #define R_SLP R_GR (124)
306 #define R_MSP R_GR (125)
307 #define R_RAB R_GR (126)
308 #define R_RFB R_GR (127)
310 /* 1 for registers that have pervasive standard uses
311 and are not available for the register allocator. */
313 #define FIXED_REGISTERS \
314 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
315 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \
316 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
317 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
318 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
319 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
320 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
321 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
322 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
323 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
324 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
325 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
326 1, 1, 1, 1, 1, 1, 1, 1, \
328 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
329 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
331 /* 1 for registers not available across function calls.
332 These must include the FIXED_REGISTERS and also any
333 registers that can be used without being saved.
334 The latter must include the registers where values are returned
335 and the register where structure-value addresses are passed.
336 Aside from that, you can include as many other registers as you like. */
337 #define CALL_USED_REGISTERS \
338 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
339 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
340 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
341 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
342 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
343 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
344 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
345 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
346 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
347 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
348 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
349 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
350 1, 1, 1, 1, 1, 1, 1, 1, \
352 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
353 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
355 /* List the order in which to allocate registers. Each register must be
356 listed once, even those in FIXED_REGISTERS.
358 We allocate in the following order:
359 gr116-gr120 (not used for anything but temps)
360 gr96-gr111 (function return values, reverse order)
361 argument registers (160-175)
362 lr0-lr127 (locals, saved)
363 acc3-0 (acc0 special)
366 #define REG_ALLOC_ORDER \
367 {R_GR (116), R_GR (117), R_GR (118), R_GR (119), R_GR (120), \
368 R_GR (111), R_GR (110), R_GR (109), R_GR (108), R_GR (107), \
369 R_GR (106), R_GR (105), R_GR (104), R_GR (103), R_GR (102), \
370 R_GR (101), R_GR (100), R_GR (99), R_GR (98), R_GR (97), R_GR (96), \
371 R_AR (0), R_AR (1), R_AR (2), R_AR (3), R_AR (4), R_AR (5), \
372 R_AR (6), R_AR (7), R_AR (8), R_AR (9), R_AR (10), R_AR (11), \
373 R_AR (12), R_AR (13), R_AR (14), R_AR (15), \
374 R_LR (0), R_LR (1), R_LR (2), R_LR (3), R_LR (4), R_LR (5), \
375 R_LR (6), R_LR (7), R_LR (8), R_LR (9), R_LR (10), R_LR (11), \
376 R_LR (12), R_LR (13), R_LR (14), R_LR (15), R_LR (16), R_LR (17), \
377 R_LR (18), R_LR (19), R_LR (20), R_LR (21), R_LR (22), R_LR (23), \
378 R_LR (24), R_LR (25), R_LR (26), R_LR (27), R_LR (28), R_LR (29), \
379 R_LR (30), R_LR (31), R_LR (32), R_LR (33), R_LR (34), R_LR (35), \
380 R_LR (36), R_LR (37), R_LR (38), R_LR (39), R_LR (40), R_LR (41), \
381 R_LR (42), R_LR (43), R_LR (44), R_LR (45), R_LR (46), R_LR (47), \
382 R_LR (48), R_LR (49), R_LR (50), R_LR (51), R_LR (52), R_LR (53), \
383 R_LR (54), R_LR (55), R_LR (56), R_LR (57), R_LR (58), R_LR (59), \
384 R_LR (60), R_LR (61), R_LR (62), R_LR (63), R_LR (64), R_LR (65), \
385 R_LR (66), R_LR (67), R_LR (68), R_LR (69), R_LR (70), R_LR (71), \
386 R_LR (72), R_LR (73), R_LR (74), R_LR (75), R_LR (76), R_LR (77), \
387 R_LR (78), R_LR (79), R_LR (80), R_LR (81), R_LR (82), R_LR (83), \
388 R_LR (84), R_LR (85), R_LR (86), R_LR (87), R_LR (88), R_LR (89), \
389 R_LR (90), R_LR (91), R_LR (92), R_LR (93), R_LR (94), R_LR (95), \
390 R_LR (96), R_LR (97), R_LR (98), R_LR (99), R_LR (100), R_LR (101), \
391 R_LR (102), R_LR (103), R_LR (104), R_LR (105), R_LR (106), \
392 R_LR (107), R_LR (108), R_LR (109), R_LR (110), R_LR (111), \
393 R_LR (112), R_LR (113), R_LR (114), R_LR (115), R_LR (116), \
394 R_LR (117), R_LR (118), R_LR (119), R_LR (120), R_LR (121), \
395 R_LR (122), R_LR (123), R_LR (124), R_LR (124), R_LR (126), \
397 R_ACU (3), R_ACU (2), R_ACU (1), R_ACU (0), \
398 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (121), \
399 R_GR (122), R_GR (123), R_GR (124), R_GR (125), R_GR (126), \
401 R_FP, R_BP, R_FC, R_CR, R_Q, \
402 R_VAB, R_OPS, R_CPS, R_CFG, R_CHA, R_CHD, R_CHC, R_RBP, R_TMC, \
403 R_TMR, R_PC0, R_PC1, R_PC2, R_MMU, R_LRU, R_FPE, R_INT, R_FPS, \
405 R_KR (0), R_KR (1), R_KR (2), R_KR (3), R_KR (4), R_KR (5), \
406 R_KR (6), R_KR (7), R_KR (8), R_KR (9), R_KR (10), R_KR (11), \
407 R_KR (12), R_KR (13), R_KR (14), R_KR (15), R_KR (16), R_KR (17), \
408 R_KR (18), R_KR (19), R_KR (20), R_KR (21), R_KR (22), R_KR (23), \
409 R_KR (24), R_KR (25), R_KR (26), R_KR (27), R_KR (28), R_KR (29), \
410 R_KR (30), R_KR (31) }
412 /* Return number of consecutive hard regs needed starting at reg REGNO
413 to hold something of mode MODE.
414 This is ordinarily the length in words of a value of mode MODE
415 but can be less for certain modes in special long registers. */
417 #define HARD_REGNO_NREGS(REGNO, MODE) \
418 ((REGNO) >= R_ACU (0) && (REGNO) <= R_ACU (3)? 1 \
419 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
421 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
422 On 29k, the cpu registers can hold any mode. But a double-precision
423 floating-point value should start at an even register. The special
424 registers cannot hold floating-point values, BP, CR, and FC cannot
425 hold integer or floating-point values, and the accumulators cannot
428 DImode and larger values should start at an even register just like
429 DFmode values, even though the instruction set doesn't require it, in order
430 to prevent reload from aborting due to a modes_equiv_for_class_p failure.
432 (I'd like to use the "?:" syntax to make this more readable, but Sun's
433 compiler doesn't seem to accept it.) */
434 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
435 (((REGNO) >= R_ACU (0) && (REGNO) <= R_ACU (3) \
436 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
437 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)) \
438 || ((REGNO) >= R_BP && (REGNO) <= R_CR \
439 && GET_MODE_CLASS (MODE) == MODE_PARTIAL_INT) \
440 || ((REGNO) >= R_Q && (REGNO) < R_ACU (0) \
441 && GET_MODE_CLASS (MODE) != MODE_FLOAT \
442 && GET_MODE_CLASS (MODE) != MODE_COMPLEX_FLOAT) \
443 || (((REGNO) < R_BP || (REGNO) >= R_KR (0)) \
444 && ((((REGNO) & 1) == 0) \
445 || GET_MODE_UNIT_SIZE (MODE) <= UNITS_PER_WORD)))
447 /* Value is 1 if it is a good idea to tie two pseudo registers
448 when one has mode MODE1 and one has mode MODE2.
449 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
450 for any hard reg, then this must be 0 for correct output.
452 On the 29k, normally we'd just have problems with DFmode because of the
453 even alignment. However, we also have to be a bit concerned about
454 the special register's restriction to non-floating and the floating-point
455 accumulator's restriction to only floating. This probably won't
456 cause any great inefficiencies in practice. */
458 #define MODES_TIEABLE_P(MODE1, MODE2) \
459 ((MODE1) == (MODE2) \
460 || (GET_MODE_CLASS (MODE1) == MODE_INT \
461 && GET_MODE_CLASS (MODE2) == MODE_INT))
463 /* Specify the registers used for certain standard purposes.
464 The values of these macros are register numbers. */
466 /* 29k pc isn't overloaded on a register that the compiler knows about. */
467 /* #define PC_REGNUM */
469 /* Register to use for pushing function arguments. */
470 #define STACK_POINTER_REGNUM R_GR (125)
472 /* Base register for access to local variables of the function. */
473 #define FRAME_POINTER_REGNUM R_FP
475 /* Value should be nonzero if functions must have frame pointers.
476 Zero means the frame pointer need not be set up (and parms
477 may be accessed via the stack pointer) in functions that seem suitable.
478 This is computed in `reload', in reload1.c. */
479 #define FRAME_POINTER_REQUIRED 0
481 /* Base register for access to arguments of the function. */
482 #define ARG_POINTER_REGNUM R_FP
484 /* Register in which static-chain is passed to a function. */
485 #define STATIC_CHAIN_REGNUM R_SLP
487 /* Register in which address to store a structure value
488 is passed to a function. */
489 #define STRUCT_VALUE_REGNUM R_LRP
491 /* Define the classes of registers for register constraints in the
492 machine description. Also define ranges of constants.
494 One of the classes must always be named ALL_REGS and include all hard regs.
495 If there is more than one class, another class must be named NO_REGS
496 and contain no registers.
498 The name GENERAL_REGS must be the name of a class (or an alias for
499 another name such as ALL_REGS). This is the class of registers
500 that is allowed by "g" or "r" in a register constraint.
501 Also, registers outside this class are allocated only when
502 instructions express preferences for them.
504 The classes must be numbered in nondecreasing order; that is,
505 a larger-numbered class must never be contained completely
506 in a smaller-numbered class.
508 For any two classes, it is very desirable that there be another
509 class that represents their union.
511 The 29k has nine registers classes: LR0_REGS, GENERAL_REGS, SPECIAL_REGS,
512 BP_REGS, FC_REGS, CR_REGS, Q_REGS, ACCUM_REGS, and ACCUM0_REGS.
513 LR0_REGS, BP_REGS, FC_REGS, CR_REGS, and Q_REGS contain just the single
514 register. The latter two classes are used to represent the floating-point
515 accumulator registers in the 29050. We also define the union class
516 FLOAT_REGS to represent any register that can be used to hold a
517 floating-point value. The union of SPECIAL_REGS and ACCUM_REGS isn't
518 useful as the former cannot contain floating-point and the latter can only
519 contain floating-point. */
521 enum reg_class
{ NO_REGS
, LR0_REGS
, GENERAL_REGS
, BP_REGS
, FC_REGS
, CR_REGS
,
522 Q_REGS
, SPECIAL_REGS
, ACCUM0_REGS
, ACCUM_REGS
, FLOAT_REGS
,
523 ALL_REGS
, LIM_REG_CLASSES
};
525 #define N_REG_CLASSES (int) LIM_REG_CLASSES
527 /* Give names of register classes as strings for dump file. */
529 #define REG_CLASS_NAMES \
530 {"NO_REGS", "LR0_REGS", "GENERAL_REGS", "BP_REGS", "FC_REGS", "CR_REGS", \
531 "Q_REGS", "SPECIAL_REGS", "ACCUM0_REGS", "ACCUM_REGS", "FLOAT_REGS", \
534 /* Define which registers fit in which classes.
535 This is an initializer for a vector of HARD_REG_SET
536 of length N_REG_CLASSES. */
538 #define REG_CLASS_CONTENTS \
539 { {0, 0, 0, 0, 0, 0, 0, 0}, \
540 {0, 1, 0, 0, 0, 0, 0, 0}, \
541 {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xfff, 0xfff}, \
542 {0, 0, 0, 0, 0, 0x20000, 0, 0}, \
543 {0, 0, 0, 0, 0, 0x40000, 0, 0}, \
544 {0, 0, 0, 0, 0, 0x80000, 0, 0}, \
545 {0, 0, 0, 0, 0, 0x100000, 0, 0}, \
546 {0, 0, 0, 0, 0, 0xfffe0000, 0xff, 0}, \
547 {0, 0, 0, 0, 0, 0, 0x100, 0}, \
548 {0, 0, 0, 0, 0, 0, 0xf00, 0}, \
549 {~0, ~0, ~0, ~0, ~0, ~ 0xfffe0000, ~ 0xff, 0xfff}, \
550 {~0, ~0, ~0, ~0, ~0, ~0, ~0, 0xfff} }
552 /* The same information, inverted:
553 Return the class number of the smallest class containing
554 reg number REGNO. This could be a conditional expression
555 or could index an array. */
557 #define REGNO_REG_CLASS(REGNO) \
558 ((REGNO) == R_BP ? BP_REGS \
559 : (REGNO) == R_FC ? FC_REGS \
560 : (REGNO) == R_CR ? CR_REGS \
561 : (REGNO) == R_Q ? Q_REGS \
562 : (REGNO) > R_BP && (REGNO) <= R_EXO ? SPECIAL_REGS \
563 : (REGNO) == R_ACU (0) ? ACCUM0_REGS \
564 : (REGNO) >= R_KR (0) ? GENERAL_REGS \
565 : (REGNO) > R_ACU (0) ? ACCUM_REGS \
566 : (REGNO) == R_LR (0) ? LR0_REGS \
569 /* The class value for index registers, and the one for base regs. */
570 #define INDEX_REG_CLASS NO_REGS
571 #define BASE_REG_CLASS GENERAL_REGS
573 /* Get reg_class from a letter such as appears in the machine description. */
575 #define REG_CLASS_FROM_LETTER(C) \
576 ((C) == 'r' ? GENERAL_REGS \
577 : (C) == 'l' ? LR0_REGS \
578 : (C) == 'b' ? BP_REGS \
579 : (C) == 'f' ? FC_REGS \
580 : (C) == 'c' ? CR_REGS \
581 : (C) == 'q' ? Q_REGS \
582 : (C) == 'h' ? SPECIAL_REGS \
583 : (C) == 'a' ? ACCUM_REGS \
584 : (C) == 'A' ? ACCUM0_REGS \
585 : (C) == 'f' ? FLOAT_REGS \
588 /* Define this macro to change register usage conditional on target flags.
590 On the 29k, we use this to change the register names for kernel mapping. */
592 #define CONDITIONAL_REGISTER_USAGE \
597 if (TARGET_KERNEL_REGISTERS) \
598 for (i = 0; i < 32; i++) \
601 reg_names[i] = reg_names[R_KR (i)]; \
602 reg_names[R_KR (i)] = p; \
606 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
607 can be used to stand for particular ranges of immediate operands.
608 This macro defines what the ranges are.
609 C is the letter, and VALUE is a constant value.
610 Return 1 if VALUE is in the range specified by C.
613 `I' is used for the range of constants most insns can contain.
614 `J' is for the few 16-bit insns.
615 `K' is a constant whose high-order 24 bits are all one
616 `L' is a HImode constant whose high-order 8 bits are all one
617 `M' is a 32-bit constant whose high-order 16 bits are all one (for CONSTN)
618 `N' is a 32-bit constant whose negative is 8 bits
619 `O' is the 32-bit constant 0x80000000, any constant with low-order
620 16 bits zero for 29050.
621 `P' is a HImode constant whose negative is 8 bits */
623 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
624 ((C) == 'I' ? (unsigned) (VALUE) < 0x100 \
625 : (C) == 'J' ? (unsigned) (VALUE) < 0x10000 \
626 : (C) == 'K' ? ((VALUE) & 0xffffff00) == 0xffffff00 \
627 : (C) == 'L' ? ((VALUE) & 0xff00) == 0xff00 \
628 : (C) == 'M' ? ((VALUE) & 0xffff0000) == 0xffff0000 \
629 : (C) == 'N' ? ((VALUE) < 0 && (VALUE) > -256) \
630 : (C) == 'O' ? ((VALUE) == 0x80000000 \
631 || (TARGET_29050 && ((VALUE) & 0xffff) == 0)) \
632 : (C) == 'P' ? (((VALUE) | 0xffff0000) < 0 \
633 && ((VALUE) | 0xffff0000) > -256) \
636 /* Similar, but for floating constants, and defining letters G and H.
637 Here VALUE is the CONST_DOUBLE rtx itself.
638 All floating-point constants are valid on 29k. */
640 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
642 /* Given an rtx X being reloaded into a reg required to be
643 in class CLASS, return the class of reg to actually use.
644 In general this is just CLASS; but on some machines
645 in some cases it is preferable to use a more restrictive class. */
647 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
649 /* Return the register class of a scratch register needed to copy IN into
650 or out of a register in CLASS in MODE. If it can be done directly,
651 NO_REGS is returned. */
653 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
654 secondary_reload_class (CLASS, MODE, IN)
656 /* This function is used to get the address of an object. */
658 extern struct rtx_def
*a29k_get_reloaded_address ();
660 /* Return the maximum number of consecutive registers
661 needed to represent mode MODE in a register of class CLASS.
663 On 29k, this is the size of MODE in words except that the floating-point
664 accumulators only require one word for anything they can hold. */
666 #define CLASS_MAX_NREGS(CLASS, MODE) \
667 (((CLASS) == ACCUM_REGS || (CLASS) == ACCUM0_REGS) ? 1 \
668 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
670 /* Define the cost of moving between registers of various classes. Everything
671 involving a general register is cheap, but moving between the other types
672 (even within a class) is two insns. */
674 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
675 ((CLASS1) == GENERAL_REGS || (CLASS2) == GENERAL_REGS ? 2 : 4)
677 /* A C expressions returning the cost of moving data of MODE from a register to
680 It takes extra insns on the 29k to form addresses, so we want to make
681 this higher. In addition, we need to keep it more expensive than the
682 most expensive register-register copy. */
684 #define MEMORY_MOVE_COST(MODE) 6
686 /* A C statement (sans semicolon) to update the integer variable COST
687 based on the relationship between INSN that is dependent on
688 DEP_INSN through the dependence LINK. The default is to make no
689 adjustment to COST. On the a29k, ignore the cost of anti- and
690 output-dependencies. */
691 #define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
692 if (REG_NOTE_KIND (LINK) != 0) \
693 (COST) = 0; /* Anti or output dependence. */
695 /* Stack layout; function entry, exit and calling. */
697 /* Define this if pushing a word on the stack
698 makes the stack pointer a smaller address. */
699 #define STACK_GROWS_DOWNWARD
701 /* Define this if the nominal address of the stack frame
702 is at the high-address end of the local variables;
703 that is, each additional local variable allocated
704 goes at a more negative offset in the frame. */
705 #define FRAME_GROWS_DOWNWARD
707 /* Offset within stack frame to start allocating local variables at.
708 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
709 first local allocated. Otherwise, it is the offset to the BEGINNING
710 of the first local allocated. */
712 #define STARTING_FRAME_OFFSET (- current_function_pretend_args_size)
714 /* If we generate an insn to push BYTES bytes,
715 this says how many the stack pointer really advances by.
716 On 29k, don't define this because there are no push insns. */
717 /* #define PUSH_ROUNDING(BYTES) */
719 /* Define this if the maximum size of all the outgoing args is to be
720 accumulated and pushed during the prologue. The amount can be
721 found in the variable current_function_outgoing_args_size. */
722 #define ACCUMULATE_OUTGOING_ARGS
724 /* Offset of first parameter from the argument pointer register value. */
726 #define FIRST_PARM_OFFSET(FNDECL) (- current_function_pretend_args_size)
728 /* Define this if stack space is still allocated for a parameter passed
730 /* #define REG_PARM_STACK_SPACE */
732 /* Value is the number of bytes of arguments automatically
733 popped when returning from a subroutine call.
734 FUNDECL is the declaration node of the function (as a tree),
735 FUNTYPE is the data type of the function (as a tree),
736 or for a library call it is an identifier node for the subroutine name.
737 SIZE is the number of bytes of arguments passed on the stack. */
739 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
741 /* Define how to find the value returned by a function.
742 VALTYPE is the data type of the value (as a tree).
743 If the precise function being called is known, FUNC is its FUNCTION_DECL;
744 otherwise, FUNC is 0.
746 On 29k the value is found in gr96. */
748 #define FUNCTION_VALUE(VALTYPE, FUNC) \
749 gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96))
751 /* Define how to find the value returned by a library function
752 assuming the value has mode MODE. */
754 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96))
756 /* 1 if N is a possible register number for a function value
757 as seen by the caller.
758 On 29k, gr96-gr111 are used. */
760 #define FUNCTION_VALUE_REGNO_P(N) ((N) == R_GR (96))
762 /* 1 if N is a possible register number for function argument passing.
763 On 29k, these are lr2-lr17. */
765 #define FUNCTION_ARG_REGNO_P(N) ((N) <= R_LR (17) && (N) >= R_LR (2))
767 /* Define a data type for recording info about an argument list
768 during the scan of that argument list. This data type should
769 hold all necessary information about the function itself
770 and about the args processed so far, enough to enable macros
771 such as FUNCTION_ARG to determine where the next arg should go.
773 On 29k, this is a single integer, which is a number of words
774 of arguments scanned so far.
775 Thus 16 or more means all following args should go on the stack. */
777 #define CUMULATIVE_ARGS int
779 /* Initialize a variable CUM of type CUMULATIVE_ARGS
780 for a call to a function whose data type is FNTYPE.
781 For a library call, FNTYPE is 0. */
783 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0
785 /* Same, but called for incoming args.
787 On the 29k, we use this to set all argument registers to fixed and
788 set the last 16 local regs, less two, (lr110-lr125) to available. Some
789 will later be changed to call-saved by FUNCTION_INCOMING_ARG.
790 lr126,lr127 are always fixed, they are place holders for the caller's
793 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
795 for (i = R_AR (0) - 2; i < R_AR (16); i++) \
797 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1; \
798 SET_HARD_REG_BIT (fixed_reg_set, i); \
799 SET_HARD_REG_BIT (call_used_reg_set, i); \
800 SET_HARD_REG_BIT (call_fixed_reg_set, i); \
802 for (i = R_LR (110); i < R_LR (126); i++) \
804 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0; \
805 CLEAR_HARD_REG_BIT (fixed_reg_set, i); \
806 CLEAR_HARD_REG_BIT (call_used_reg_set, i); \
807 CLEAR_HARD_REG_BIT (call_fixed_reg_set, i); \
812 /* Define intermediate macro to compute the size (in registers) of an argument
815 #define A29K_ARG_SIZE(MODE, TYPE, NAMED) \
817 : (MODE) != BLKmode \
818 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
819 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
821 /* Update the data in CUM to advance over an argument
822 of mode MODE and data type TYPE.
823 (TYPE is null for libcalls where that information may not be available.) */
825 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
826 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
829 (CUM) += A29K_ARG_SIZE (MODE, TYPE, NAMED)
831 /* Determine where to put an argument to a function.
832 Value is zero to push the argument on the stack,
833 or a hard register in which to store the argument.
835 MODE is the argument's machine mode.
836 TYPE is the data type of the argument (as a tree).
837 This is null for libcalls where that information may
839 CUM is a variable of type CUMULATIVE_ARGS which gives info about
840 the preceding args and about the function being called.
841 NAMED is nonzero if this argument is a named parameter
842 (otherwise it is an extra parameter matching an ellipsis).
844 On 29k the first 16 words of args are normally in registers
845 and the rest are pushed. */
847 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
848 ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
849 ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0)
851 /* Define where a function finds its arguments.
852 This is different from FUNCTION_ARG because of register windows.
854 On the 29k, we hack this to call a function that sets the used registers
855 as non-fixed and not used by calls. */
857 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
858 ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
859 ? gen_rtx (REG, MODE, \
860 incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \
863 /* This indicates that an argument is to be passed with an invisible reference
864 (i.e., a pointer to the object is passed).
866 On the 29k, we do this if it must be passed on the stack. */
868 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
869 (MUST_PASS_IN_STACK (MODE, TYPE))
871 /* Specify the padding direction of arguments.
873 On the 29k, we must pad upwards in order to be able to pass args in
876 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
878 /* For an arg passed partly in registers and partly in memory,
879 this is the number of registers used.
880 For args passed entirely in registers or entirely in memory, zero. */
882 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
883 ((CUM) < 16 && 16 < (CUM) + A29K_ARG_SIZE (MODE, TYPE, NAMED) && (NAMED) \
886 /* Perform any needed actions needed for a function that is receiving a
887 variable number of arguments.
891 MODE and TYPE are the mode and type of the current parameter.
893 PRETEND_SIZE is a variable that should be set to the amount of stack
894 that must be pushed by the prolog to pretend that our caller pushed
897 Normally, this macro will push all remaining incoming registers on the
898 stack and set PRETEND_SIZE to the length of the registers pushed. */
900 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
903 int first_reg_offset = (CUM); \
905 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
906 first_reg_offset += A29K_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
908 if (first_reg_offset > 16) \
909 first_reg_offset = 16; \
911 if (! (NO_RTL) && first_reg_offset != 16) \
912 move_block_from_reg \
913 (R_AR (0) + first_reg_offset, \
914 gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \
915 16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \
916 PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \
920 /* Define the information needed to generate branch and scc insns. This is
921 stored from the compare operation. Note that we can't use "rtx" here
922 since it hasn't been defined! */
924 extern struct rtx_def
*a29k_compare_op0
, *a29k_compare_op1
;
925 extern int a29k_compare_fp_p
;
927 /* This macro produces the initial definition of a function name.
929 For the 29k, we need the prolog to contain one or two words prior to
930 the declaration of the function name. So just store away the name and
931 write it as part of the prolog. This also computes the register names,
932 which can't be done until after register allocation, but must be done
933 before final_start_function is called. */
935 extern char *a29k_function_name
;
937 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
938 a29k_function_name = NAME; \
939 a29k_compute_reg_names ();
941 /* This macro generates the assembly code for function entry.
942 FILE is a stdio stream to output the code to.
943 SIZE is an int: how many units of temporary storage to allocate.
944 Refer to the array `regs_ever_live' to determine which registers
945 to save; `regs_ever_live[I]' is nonzero if register number I
946 is ever used in the function. This macro is responsible for
947 knowing which registers should not be saved even if used. */
949 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
951 /* Output assembler code to FILE to increment profiler label # LABELNO
952 for profiling a function entry. */
954 #define FUNCTION_PROFILER(FILE, LABELNO)
956 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
957 the stack pointer does not matter. The value is tested only in
958 functions that have frame pointers.
959 No definition is equivalent to always zero. */
961 #define EXIT_IGNORE_STACK 1
963 /* This macro generates the assembly code for function exit,
964 on machines that need it. If FUNCTION_EPILOGUE is not defined
965 then individual return instructions are generated for each
966 return statement. Args are same as for FUNCTION_PROLOGUE.
968 The function epilogue should not depend on the current stack pointer!
969 It should use the frame pointer only. This is mandatory because
970 of alloca; we also take advantage of it to omit stack adjustments
973 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
975 /* Define the number of delay slots needed for the function epilogue.
977 On the 29k, we need a slot except when we have a register stack adjustment,
978 have a memory stack adjustment, and have no frame pointer. */
980 #define DELAY_SLOTS_FOR_EPILOGUE \
981 (! (needs_regstack_p () \
982 && (get_frame_size () + current_function_pretend_args_size \
983 + current_function_outgoing_args_size) != 0 \
984 && ! frame_pointer_needed))
986 /* Define whether INSN can be placed in delay slot N for the epilogue.
988 On the 29k, we must be able to place it in a delay slot, it must
989 not use sp if the frame pointer cannot be eliminated, and it cannot
990 use local regs if we need to push the register stack. */
992 #define ELIGIBLE_FOR_EPILOGUE_DELAY(INSN,N) \
993 (get_attr_in_delay_slot (INSN) == IN_DELAY_SLOT_YES \
994 && ! (frame_pointer_needed \
995 && reg_mentioned_p (stack_pointer_rtx, PATTERN (INSN))) \
996 && ! (needs_regstack_p () && uses_local_reg_p (PATTERN (INSN))))
998 /* Output assembler code for a block containing the constant parts
999 of a trampoline, leaving space for the variable parts.
1001 The trampoline should set the static chain pointer to value placed
1002 into the trampoline and should branch to the specified routine. We
1003 use gr121 (tav) as a temporary. */
1005 #define TRAMPOLINE_TEMPLATE(FILE) \
1007 fprintf (FILE, "\tconst %s,0\n", reg_names[R_TAV]); \
1008 fprintf (FILE, "\tconsth %s,0\n", reg_names[R_TAV]); \
1009 fprintf (FILE, "\tconst %s,0\n", reg_names[R_SLP]); \
1010 fprintf (FILE, "\tjmpi %s\n", reg_names[R_TAV]); \
1011 fprintf (FILE, "\tconsth %s,0\n", reg_names[R_SLP]); \
1014 /* Length in units of the trampoline for entering a nested function. */
1016 #define TRAMPOLINE_SIZE 20
1018 /* Emit RTL insns to initialize the variable parts of a trampoline.
1019 FNADDR is an RTX for the address of the function's pure code.
1020 CXT is an RTX for the static chain value for the function.
1022 We do this on the 29k by writing the bytes of the addresses into the
1023 trampoline one byte at a time. */
1025 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1027 INITIALIZE_TRAMPOLINE_VALUE (TRAMP, FNADDR, 0, 4); \
1028 INITIALIZE_TRAMPOLINE_VALUE (TRAMP, CXT, 8, 16); \
1031 /* Define a sub-macro to initialize one value into the trampoline.
1032 We specify the offsets of the CONST and CONSTH instructions, respectively
1033 and copy the value a byte at a time into these instructions. */
1035 #define INITIALIZE_TRAMPOLINE_VALUE(TRAMP, VALUE, CONST, CONSTH) \
1038 rtx _val = force_reg (SImode, VALUE); \
1040 _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \
1041 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1042 gen_lowpart (QImode, _val)); \
1044 _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
1045 build_int_2 (8, 0), 0, 1); \
1046 _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \
1047 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1048 gen_lowpart (QImode, _temp)); \
1050 _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
1051 build_int_2 (8, 0), _temp, 1); \
1052 _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \
1053 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1054 gen_lowpart (QImode, _temp)); \
1056 _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
1057 build_int_2 (8, 0), _temp, 1); \
1058 _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \
1059 emit_move_insn (gen_rtx (MEM, QImode, _addr), \
1060 gen_lowpart (QImode, _temp)); \
1063 /* Addressing modes, and classification of registers for them. */
1065 /* #define HAVE_POST_INCREMENT */
1066 /* #define HAVE_POST_DECREMENT */
1068 /* #define HAVE_PRE_DECREMENT */
1069 /* #define HAVE_PRE_INCREMENT */
1071 /* Macros to check register numbers against specific register classes. */
1073 /* These assume that REGNO is a hard or pseudo reg number.
1074 They give nonzero only if REGNO is a hard reg of the suitable class
1075 or a pseudo reg currently allocated to a suitable hard reg.
1076 Since they use reg_renumber, they are safe only once reg_renumber
1077 has been allocated, which happens in local-alloc.c. */
1079 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1080 #define REGNO_OK_FOR_BASE_P(REGNO) 1
1082 /* Given the value returned from get_frame_size, compute the actual size
1083 of the frame we will allocate. We include the pretend and outgoing
1084 arg sizes and round to a doubleword. */
1086 #define ACTUAL_FRAME_SIZE(SIZE) \
1087 (((SIZE) + current_function_pretend_args_size \
1088 + current_function_outgoing_args_size + 7) & ~7)
1090 /* Define the initial offset between the frame and stack pointer. */
1092 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1093 (DEPTH) = ACTUAL_FRAME_SIZE (get_frame_size ())
1095 /* Maximum number of registers that can appear in a valid memory address. */
1096 #define MAX_REGS_PER_ADDRESS 1
1098 /* Recognize any constant value that is a valid address. */
1100 #define CONSTANT_ADDRESS_P(X) \
1101 (GET_CODE (X) == CONST_INT && (unsigned) INTVAL (X) < 0x100)
1103 /* Include all constant integers and constant doubles */
1104 #define LEGITIMATE_CONSTANT_P(X) 1
1106 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1107 and check its validity for a certain class.
1108 We have two alternate definitions for each of them.
1109 The usual definition accepts all pseudo regs; the other rejects
1110 them unless they have been allocated suitable hard regs.
1111 The symbol REG_OK_STRICT causes the latter definition to be used.
1113 Most source files want to accept pseudo regs in the hope that
1114 they will get allocated to the class that the insn wants them to be in.
1115 Source files for reload pass need to be strict.
1116 After reload, it makes no difference, since pseudo regs have
1117 been eliminated by then. */
1119 #ifndef REG_OK_STRICT
1121 /* Nonzero if X is a hard reg that can be used as an index
1122 or if it is a pseudo reg. */
1123 #define REG_OK_FOR_INDEX_P(X) 0
1124 /* Nonzero if X is a hard reg that can be used as a base reg
1125 or if it is a pseudo reg. */
1126 #define REG_OK_FOR_BASE_P(X) 1
1130 /* Nonzero if X is a hard reg that can be used as an index. */
1131 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1132 /* Nonzero if X is a hard reg that can be used as a base reg. */
1133 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1137 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1138 that is a valid memory address for an instruction.
1139 The MODE argument is the machine mode for the MEM expression
1140 that wants to use this address.
1142 On the 29k, a legitimate address is a register and so is a
1143 constant of less than 256. */
1145 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1146 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1148 if (GET_CODE (X) == CONST_INT \
1149 && (unsigned) INTVAL (X) < 0x100) \
1153 /* Try machine-dependent ways of modifying an illegitimate address
1154 to be legitimate. If we find one, return the new, valid address.
1155 This macro is used in only one place: `memory_address' in explow.c.
1157 OLDX is the address as it was before break_out_memory_refs was called.
1158 In some cases it is useful to look at this to decide what needs to be done.
1160 MODE and WIN are passed so that this macro can use
1161 GO_IF_LEGITIMATE_ADDRESS.
1163 It is always safe for this macro to do nothing. It exists to recognize
1164 opportunities to optimize the output.
1166 For the 29k, we need not do anything. However, if we don't,
1167 `memory_address' will try lots of things to get a valid address, most of
1168 which will result in dead code and extra pseudos. So we make the address
1171 This is easy: The only valid addresses are an offset from a register
1172 and we know the address isn't valid. So just call either `force_operand'
1173 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1175 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1176 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1178 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1179 X = force_operand (X, 0); \
1181 X = force_reg (Pmode, X); \
1185 /* Go to LABEL if ADDR (a legitimate address expression)
1186 has an effect that depends on the machine mode it is used for.
1187 On the 29k this is never true. */
1189 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1191 /* Compute the cost of an address. For the 29k, all valid addresses are
1194 #define ADDRESS_COST(X) 0
1196 /* Define this if some processing needs to be done immediately before
1197 emitting code for an insn. */
1199 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1201 /* Specify the machine mode that this machine uses
1202 for the index in the tablejump instruction. */
1203 #define CASE_VECTOR_MODE SImode
1205 /* Define this if the tablejump instruction expects the table
1206 to contain offsets from the address of the table.
1207 Do not define this if the table should contain absolute addresses. */
1208 /* #define CASE_VECTOR_PC_RELATIVE */
1210 /* Specify the tree operation to be used to convert reals to integers. */
1211 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1213 /* This is the kind of divide that is easiest to do in the general case. */
1214 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1216 /* Define this as 1 if `char' should by default be signed; else as 0. */
1217 #define DEFAULT_SIGNED_CHAR 0
1219 /* This flag, if defined, says the same insns that convert to a signed fixnum
1220 also convert validly to an unsigned one.
1222 We actually lie a bit here as overflow conditions are different. But
1223 they aren't being checked anyway. */
1225 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1227 /* Max number of bytes we can move to of from memory
1228 in one reasonably fast instruction.
1230 For the 29k, we will define movti, so put this at 4 words. */
1233 /* Largest number of bytes of an object that can be placed in a register.
1234 On the 29k we have plenty of registers, so use TImode. */
1235 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1237 /* Nonzero if access to memory by bytes is no faster than for words.
1238 Also non-zero if doing byte operations (specifically shifts) in registers
1241 On the 29k, large masks are expensive, so we want to use bytes to
1242 manipulate fields. */
1243 #define SLOW_BYTE_ACCESS 0
1245 /* Define if operations between registers always perform the operation
1246 on the full register even if a narrower mode is specified. */
1247 #define WORD_REGISTER_OPERATIONS
1249 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1250 will either zero-extend or sign-extend. The value of this macro should
1251 be the code that says which one of the two operations is implicitly
1252 done, NIL if none. */
1253 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1255 /* Define if the object format being used is COFF or a superset. */
1256 #define OBJECT_FORMAT_COFF
1258 /* This uses COFF, so it wants SDB format. */
1259 #define SDB_DEBUGGING_INFO
1261 /* Define this to be the delimiter between SDB sub-sections. The default
1263 #define SDB_DELIM "\n"
1265 /* Do not break .stabs pseudos into continuations. */
1266 #define DBX_CONTIN_LENGTH 0
1268 /* Don't try to use the `x' type-cross-reference character in DBX data.
1269 Also has the consequence of putting each struct, union or enum
1270 into a separate .stabs, containing only cross-refs to the others. */
1271 #define DBX_NO_XREFS
1273 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1274 is done just by pretending it is already truncated. */
1275 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1277 /* We assume that the store-condition-codes instructions store 0 for false
1278 and some other value for true. This is the value stored for true. */
1280 #define STORE_FLAG_VALUE 0x80000000
1282 /* Specify the machine mode that pointers have.
1283 After generation of rtl, the compiler makes no further distinction
1284 between pointers and any other objects of this machine mode. */
1285 #define Pmode SImode
1287 /* Mode of a function address in a call instruction (for indexing purposes).
1289 Doesn't matter on 29k. */
1290 #define FUNCTION_MODE SImode
1292 /* Define this if addresses of constant functions
1293 shouldn't be put through pseudo regs where they can be cse'd.
1294 Desirable on machines where ordinary constants are expensive
1295 but a CALL with constant address is cheap. */
1296 #define NO_FUNCTION_CSE
1298 /* Define this to be nonzero if shift instructions ignore all but the low-order
1300 #define SHIFT_COUNT_TRUNCATED 1
1302 /* Compute the cost of computing a constant rtl expression RTX
1303 whose rtx-code is CODE. The body of this macro is a portion
1304 of a switch statement. If the code is computed here,
1305 return it with a return statement. Otherwise, break from the switch.
1307 We only care about the cost if it is valid in an insn. The only
1308 constants that cause an insn to generate more than one machine
1309 instruction are those involving floating-point or address. So
1310 only these need be expensive. */
1312 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1319 case CONST_DOUBLE: \
1320 return GET_MODE (RTX) == SFmode ? 6 : 8;
1322 /* Provide the costs of a rtl expression. This is in the body of a
1325 All MEMs cost the same if they are valid. This is used to ensure
1326 that (mem (symbol_ref ...)) is placed into a CALL when valid.
1328 The multiply cost depends on whether this is a 29050 or not. */
1330 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1332 return TARGET_29050 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (40); \
1337 return COSTS_N_INSNS (50); \
1339 return COSTS_N_INSNS (2);
1341 /* Control the assembler format that we output. */
1343 /* Output at beginning of assembler file. */
1345 #define ASM_FILE_START(FILE) \
1346 { char *p, *after_dir = main_input_filename; \
1348 fprintf (FILE, "\t.cputype 29050\n"); \
1349 for (p = main_input_filename; *p; p++) \
1351 after_dir = p + 1; \
1352 fprintf (FILE, "\t.file "); \
1353 output_quoted_string (FILE, after_dir); \
1354 fprintf (FILE, "\n"); \
1355 fprintf (FILE, "\t.sect .lit,lit\n"); }
1357 /* Output to assembler file text saying following lines
1358 may contain character constants, extra white space, comments, etc. */
1360 #define ASM_APP_ON ""
1362 /* Output to assembler file text saying following lines
1363 no longer contain unusual constructs. */
1365 #define ASM_APP_OFF ""
1367 /* The next few macros don't have tabs on most machines, but
1368 at least one 29K assembler wants them. */
1370 /* Output before instructions. */
1372 #define TEXT_SECTION_ASM_OP "\t.text"
1374 /* Output before read-only data. */
1376 #define READONLY_DATA_SECTION_ASM_OP "\t.use .lit"
1378 /* Output before writable data. */
1380 #define DATA_SECTION_ASM_OP "\t.data"
1382 /* Define an extra section for read-only data, a routine to enter it, and
1383 indicate that it is for read-only data. */
1385 #define EXTRA_SECTIONS readonly_data
1387 #define EXTRA_SECTION_FUNCTIONS \
1389 literal_section () \
1391 if (in_section != readonly_data) \
1393 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1394 in_section = readonly_data; \
1398 #define READONLY_DATA_SECTION literal_section
1400 /* If we are referencing a function that is static or is known to be
1401 in this file, make the SYMBOL_REF special. We can use this to indicate
1402 that we can branch to this function without emitting a no-op after the
1405 #define ENCODE_SECTION_INFO(DECL) \
1406 if (TREE_CODE (DECL) == FUNCTION_DECL \
1407 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1408 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1410 /* How to refer to registers in assembler output.
1411 This sequence is indexed by compiler's hard-register-number (see above). */
1413 #define REGISTER_NAMES \
1414 {"gr96", "gr97", "gr98", "gr99", "gr100", "gr101", "gr102", "gr103", "gr104", \
1415 "gr105", "gr106", "gr107", "gr108", "gr109", "gr110", "gr111", "gr112", \
1416 "gr113", "gr114", "gr115", "gr116", "gr117", "gr118", "gr119", "gr120", \
1417 "gr121", "gr122", "gr123", "gr124", "gr125", "gr126", "gr127", \
1418 "lr0", "lr1", "lr2", "lr3", "lr4", "lr5", "lr6", "lr7", "lr8", "lr9", \
1419 "lr10", "lr11", "lr12", "lr13", "lr14", "lr15", "lr16", "lr17", "lr18", \
1420 "lr19", "lr20", "lr21", "lr22", "lr23", "lr24", "lr25", "lr26", "lr27", \
1421 "lr28", "lr29", "lr30", "lr31", "lr32", "lr33", "lr34", "lr35", "lr36", \
1422 "lr37", "lr38", "lr39", "lr40", "lr41", "lr42", "lr43", "lr44", "lr45", \
1423 "lr46", "lr47", "lr48", "lr49", "lr50", "lr51", "lr52", "lr53", "lr54", \
1424 "lr55", "lr56", "lr57", "lr58", "lr59", "lr60", "lr61", "lr62", "lr63", \
1425 "lr64", "lr65", "lr66", "lr67", "lr68", "lr69", "lr70", "lr71", "lr72", \
1426 "lr73", "lr74", "lr75", "lr76", "lr77", "lr78", "lr79", "lr80", "lr81", \
1427 "lr82", "lr83", "lr84", "lr85", "lr86", "lr87", "lr88", "lr89", "lr90", \
1428 "lr91", "lr92", "lr93", "lr94", "lr95", "lr96", "lr97", "lr98", "lr99", \
1429 "lr100", "lr101", "lr102", "lr103", "lr104", "lr105", "lr106", "lr107", \
1430 "lr108", "lr109", "lr110", "lr111", "lr112", "lr113", "lr114", "lr115", \
1431 "lr116", "lr117", "lr118", "lr119", "lr120", "lr121", "lr122", "lr123", \
1432 "lr124", "lr125", "lr126", "lr127", \
1433 "AI0", "AI1", "AI2", "AI3", "AI4", "AI5", "AI6", "AI7", "AI8", "AI9", \
1434 "AI10", "AI11", "AI12", "AI13", "AI14", "AI15", "FP", \
1435 "bp", "fc", "cr", "q", \
1436 "vab", "ops", "cps", "cfg", "cha", "chd", "chc", "rbp", "tmc", "tmr", \
1437 "pc0", "pc1", "pc2", "mmu", "lru", "fpe", "int", "fps", "exo", \
1438 "0", "1", "2", "3", \
1439 "gr64", "gr65", "gr66", "gr67", "gr68", "gr69", "gr70", "gr71", \
1440 "gr72", "gr73", "gr74", "gr75", "gr76", "gr77", "gr78", "gr79", \
1441 "gr80", "gr81", "gr82", "gr83", "gr84", "gr85", "gr86", "gr87", \
1442 "gr88", "gr89", "gr90", "gr91", "gr92", "gr93", "gr94", "gr95" }
1444 /* How to renumber registers for dbx and gdb. */
1446 extern int a29k_debug_reg_map
[];
1447 #define DBX_REGISTER_NUMBER(REGNO) a29k_debug_reg_map[REGNO]
1449 /* This how to write an assembler directive to FILE to switch to
1450 section NAME for DECL. */
1452 #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \
1453 fprintf (FILE, "\t.sect %s, bss\n\t.use %s\n", NAME, NAME)
1455 /* This is how to output the definition of a user-level label named NAME,
1456 such as the label on a static function or variable NAME. */
1458 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1459 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1461 /* This is how to output a command to make the user-level label named NAME
1462 defined for reference from other files. */
1464 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1465 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1467 /* The prefix to add to user-visible assembler symbols. */
1469 #undef USER_LABEL_PREFIX
1470 #define USER_LABEL_PREFIX "_"
1472 /* This is how to output an internal numbered label where
1473 PREFIX is the class of label and NUM is the number within the class. */
1475 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1476 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1478 /* This is how to output a label for a jump table. Arguments are the same as
1479 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1482 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1483 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1485 /* This is how to store into the string LABEL
1486 the symbol_ref name of an internal numbered label where
1487 PREFIX is the class of label and NUM is the number within the class.
1488 This is suitable for output with `assemble_name'. */
1490 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1491 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1493 /* This is how to output an assembler line defining a `double' constant. */
1495 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1496 fprintf (FILE, "\t.double %.20e\n", (VALUE))
1498 /* This is how to output an assembler line defining a `float' constant. */
1500 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1501 fprintf (FILE, "\t.float %.20e\n", (VALUE))
1503 /* This is how to output an assembler line defining an `int' constant. */
1505 #define ASM_OUTPUT_INT(FILE,VALUE) \
1506 ( fprintf (FILE, "\t.word "), \
1507 output_addr_const (FILE, (VALUE)), \
1508 fprintf (FILE, "\n"))
1510 /* Likewise for `char' and `short' constants. */
1512 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1513 ( fprintf (FILE, "\t.hword "), \
1514 output_addr_const (FILE, (VALUE)), \
1515 fprintf (FILE, "\n"))
1517 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1518 ( fprintf (FILE, "\t.byte "), \
1519 output_addr_const (FILE, (VALUE)), \
1520 fprintf (FILE, "\n"))
1522 /* This is how to output an insn to push a register on the stack.
1523 It need not be very fast code. */
1525 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1526 fprintf (FILE, "\tsub %s,%s,4\n\tstore 0,0,%s,%s\n", \
1527 reg_names[R_MSP], reg_names[R_MSP], reg_names[REGNO], \
1530 /* This is how to output an insn to pop a register from the stack.
1531 It need not be very fast code. */
1533 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1534 fprintf (FILE, "\tload 0,0,%s,%s\n\tadd %s,%s,4\n", \
1535 reg_names[REGNO], reg_names[R_MSP], reg_names[R_MSP], \
1538 /* This is how to output an assembler line for a numeric constant byte. */
1540 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1541 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1543 /* This is how to output an element of a case-vector that is absolute. */
1545 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1546 fprintf (FILE, "\t.word L%d\n", VALUE)
1548 /* This is how to output an element of a case-vector that is relative.
1549 Don't define this if it is not supported. */
1551 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
1553 /* This is how to output an assembler line
1554 that says to advance the location counter
1555 to a multiple of 2**LOG bytes. */
1557 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1559 fprintf (FILE, "\t.align %d\n", 1 << (LOG))
1561 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1562 fprintf (FILE, "\t.block %d\n", (SIZE))
1564 /* This says how to output an assembler line
1565 to define a global common symbol. */
1567 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1568 ( fputs ("\t.comm ", (FILE)), \
1569 assemble_name ((FILE), (NAME)), \
1570 fprintf ((FILE), ",%d\n", (SIZE)))
1572 /* This says how to output an assembler line
1573 to define a local common symbol. */
1575 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1576 ( fputs ("\t.lcomm ", (FILE)), \
1577 assemble_name ((FILE), (NAME)), \
1578 fprintf ((FILE), ",%d\n", (SIZE)))
1580 /* Store in OUTPUT a string (made with alloca) containing
1581 an assembler-name for a local static variable named NAME.
1582 LABELNO is an integer which is different for each call. */
1584 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1585 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1586 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1588 /* Define the parentheses used to group arithmetic operations
1589 in assembler code. */
1591 #define ASM_OPEN_PAREN "("
1592 #define ASM_CLOSE_PAREN ")"
1594 /* Define results of standard character escape sequences. */
1595 #define TARGET_BELL 007
1596 #define TARGET_BS 010
1597 #define TARGET_TAB 011
1598 #define TARGET_NEWLINE 012
1599 #define TARGET_VT 013
1600 #define TARGET_FF 014
1601 #define TARGET_CR 015
1603 /* Print operand X (an rtx) in assembler syntax to file FILE.
1604 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1605 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1607 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1609 /* Determine which codes are valid without a following integer. These must
1612 We support `#' which is null if a delay slot exists, otherwise
1613 "\n\tnop" and `*' which prints the register name for TPC (gr122). */
1615 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '#' || (CODE) == '*')
1617 /* Print a memory address as an operand to reference that memory location. */
1619 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1620 { register rtx addr = ADDR; \
1622 && ! (GET_CODE (addr) == CONST_INT \
1623 && INTVAL (addr) >= 0 && INTVAL (addr) < 256)) \
1625 output_operand (addr, 0); \
1627 /* Define the codes that are matched by predicates in a29k.c. */
1629 #define PREDICATE_CODES \
1630 {"cint_8_operand", {CONST_INT}}, \
1631 {"cint_16_operand", {CONST_INT}}, \
1632 {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \
1633 LABEL_REF, SYMBOL_REF}}, \
1634 {"shift_constant_operand", {CONST_INT, ASHIFT}}, \
1635 {"const_0_operand", {CONST_INT, ASHIFT}}, \
1636 {"const_8_operand", {CONST_INT, ASHIFT}}, \
1637 {"const_16_operand", {CONST_INT, ASHIFT}}, \
1638 {"const_24_operand", {CONST_INT, ASHIFT}}, \
1639 {"float_const_operand", {CONST_DOUBLE}}, \
1640 {"gpc_reg_operand", {SUBREG, REG}}, \
1641 {"gpc_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1642 {"gpc_reg_or_integer_constant_operand", {SUBREG, REG, \
1643 CONST_INT, CONST_DOUBLE}}, \
1644 {"gpc_reg_or_immediate_operand", {SUBREG, REG, CONST_INT, \
1645 CONST_DOUBLE, CONST, \
1646 SYMBOL_REF, LABEL_REF}}, \
1647 {"spec_reg_operand", {REG}}, \
1648 {"accum_reg_operand", {REG}}, \
1649 {"srcb_operand", {SUBREG, REG, CONST_INT}}, \
1650 {"cmplsrcb_operand", {SUBREG, REG, CONST_INT}}, \
1651 {"reg_or_immediate_operand", {SUBREG, REG, CONST_INT, CONST, \
1652 CONST_DOUBLE, CONST, SYMBOL_REF, LABEL_REF}}, \
1653 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
1654 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1655 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1656 {"call_operand", {SYMBOL_REF, CONST_INT}}, \
1657 {"in_operand", {SUBREG, MEM, REG, CONST_INT, CONST, SYMBOL_REF, \
1658 LABEL_REF, CONST_DOUBLE}}, \
1659 {"out_operand", {SUBREG, REG, MEM}}, \
1660 {"reload_memory_operand", {SUBREG, REG, MEM}}, \
1661 {"fp_comparison_operator", {EQ, GT, GE}}, \
1662 {"branch_operator", {GE, LT}}, \
1663 {"load_multiple_operation", {PARALLEL}}, \
1664 {"store_multiple_operation", {PARALLEL}}, \
1665 {"epilogue_operand", {CODE_LABEL}},