1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
41 /* Save information from a "cmpxx" operation until the branch or scc is
44 rtx alpha_compare_op0
, alpha_compare_op1
;
45 int alpha_compare_fp_p
;
47 /* Save the name of the current function as used by the assembler. This
48 is used by the epilogue. */
50 char *alpha_function_name
;
52 /* Non-zero if inside of a function, because the Alpha asm can't
53 handle .files inside of functions. */
55 static int inside_function
= FALSE
;
57 /* Nonzero if the current function needs gp. */
59 int alpha_function_needs_gp
;
61 extern char *version_string
;
62 extern int rtx_equal_function_value_matters
;
64 /* Declarations of static functions. */
65 static void alpha_set_memflags_1
PROTO((rtx
, int, int, int));
66 static void add_long_const
PROTO((FILE *, HOST_WIDE_INT
, int, int, int));
68 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
76 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
78 if ((value
& 0xff) != 0 && (value
& 0xff) != 0xff)
84 /* Returns 1 if OP is either the constant zero or a register. If a
85 register, it must be in the proper mode unless MODE is VOIDmode. */
88 reg_or_0_operand (op
, mode
)
90 enum machine_mode mode
;
92 return op
== const0_rtx
|| register_operand (op
, mode
);
95 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
99 reg_or_6bit_operand (op
, mode
)
101 enum machine_mode mode
;
103 return ((GET_CODE (op
) == CONST_INT
104 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64)
105 || register_operand (op
, mode
));
109 /* Return 1 if OP is an 8-bit constant or any register. */
112 reg_or_8bit_operand (op
, mode
)
114 enum machine_mode mode
;
116 return ((GET_CODE (op
) == CONST_INT
117 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100)
118 || register_operand (op
, mode
));
121 /* Return 1 if OP is an 8-bit constant. */
124 cint8_operand (op
, mode
)
126 enum machine_mode mode
;
128 return (GET_CODE (op
) == CONST_INT
129 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100);
132 /* Return 1 if the operand is a valid second operand to an add insn. */
135 add_operand (op
, mode
)
137 enum machine_mode mode
;
139 if (GET_CODE (op
) == CONST_INT
)
140 return (CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K')
141 || CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L')
142 || CONST_OK_FOR_LETTER_P (INTVAL (op
), 'O'));
144 return register_operand (op
, mode
);
147 /* Return 1 if the operand is a valid second operand to a sign-extending
151 sext_add_operand (op
, mode
)
153 enum machine_mode mode
;
155 if (GET_CODE (op
) == CONST_INT
)
156 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 255
157 || (unsigned HOST_WIDE_INT
) (- INTVAL (op
)) < 255);
159 return register_operand (op
, mode
);
162 /* Return 1 if OP is the constant 4 or 8. */
165 const48_operand (op
, mode
)
167 enum machine_mode mode
;
169 return (GET_CODE (op
) == CONST_INT
170 && (INTVAL (op
) == 4 || INTVAL (op
) == 8));
173 /* Return 1 if OP is a valid first operand to an AND insn. */
176 and_operand (op
, mode
)
178 enum machine_mode mode
;
180 if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == VOIDmode
)
181 return (zap_mask (CONST_DOUBLE_LOW (op
))
182 && zap_mask (CONST_DOUBLE_HIGH (op
)));
184 if (GET_CODE (op
) == CONST_INT
)
185 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
186 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100
187 || zap_mask (INTVAL (op
)));
189 return register_operand (op
, mode
);
192 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
195 or_operand (op
, mode
)
197 enum machine_mode mode
;
199 if (GET_CODE (op
) == CONST_INT
)
200 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
201 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100);
203 return register_operand (op
, mode
);
206 /* Return 1 if OP is a constant that is the width, in bits, of an integral
207 mode smaller than DImode. */
210 mode_width_operand (op
, mode
)
212 enum machine_mode mode
;
214 return (GET_CODE (op
) == CONST_INT
215 && (INTVAL (op
) == 8 || INTVAL (op
) == 16 || INTVAL (op
) == 32));
218 /* Return 1 if OP is a constant that is the width of an integral machine mode
219 smaller than an integer. */
222 mode_mask_operand (op
, mode
)
224 enum machine_mode mode
;
226 #if HOST_BITS_PER_WIDE_INT == 32
227 if (GET_CODE (op
) == CONST_DOUBLE
)
228 return CONST_DOUBLE_HIGH (op
) == 0 && CONST_DOUBLE_LOW (op
) == -1;
231 return (GET_CODE (op
) == CONST_INT
232 && (INTVAL (op
) == 0xff
233 || INTVAL (op
) == 0xffff
234 #if HOST_BITS_PER_WIDE_INT == 64
235 || INTVAL (op
) == 0xffffffff
240 /* Return 1 if OP is a multiple of 8 less than 64. */
243 mul8_operand (op
, mode
)
245 enum machine_mode mode
;
247 return (GET_CODE (op
) == CONST_INT
248 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64
249 && (INTVAL (op
) & 7) == 0);
252 /* Return 1 if OP is the constant zero in floating-point. */
255 fp0_operand (op
, mode
)
257 enum machine_mode mode
;
259 return (GET_MODE (op
) == mode
260 && GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
));
263 /* Return 1 if OP is the floating-point constant zero or a register. */
266 reg_or_fp0_operand (op
, mode
)
268 enum machine_mode mode
;
270 return fp0_operand (op
, mode
) || register_operand (op
, mode
);
273 /* Return 1 if OP is a register or a constant integer. */
277 reg_or_cint_operand (op
, mode
)
279 enum machine_mode mode
;
281 return GET_CODE (op
) == CONST_INT
|| register_operand (op
, mode
);
284 /* Return 1 if OP is something that can be reloaded into a register;
285 if it is a MEM, it need not be valid. */
288 some_operand (op
, mode
)
290 enum machine_mode mode
;
292 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
295 switch (GET_CODE (op
))
297 case REG
: case MEM
: case CONST_DOUBLE
:
298 case CONST_INT
: case LABEL_REF
: case SYMBOL_REF
: case CONST
:
302 return some_operand (SUBREG_REG (op
), VOIDmode
);
308 /* Return 1 if OP is a valid operand for the source of a move insn. */
311 input_operand (op
, mode
)
313 enum machine_mode mode
;
315 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
318 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& GET_MODE (op
) != mode
)
321 switch (GET_CODE (op
))
326 /* This handles both the Windows/NT and OSF cases. */
327 return mode
== ptr_mode
|| mode
== DImode
;
333 if (register_operand (op
, mode
))
335 /* ... fall through ... */
337 return mode
!= HImode
&& mode
!= QImode
&& general_operand (op
, mode
);
340 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
343 return mode
== QImode
|| mode
== HImode
|| add_operand (op
, mode
);
349 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
353 current_file_function_operand (op
, mode
)
355 enum machine_mode mode
;
357 return (GET_CODE (op
) == SYMBOL_REF
358 && ! profile_flag
&& ! profile_block_flag
359 && (SYMBOL_REF_FLAG (op
)
360 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
363 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
366 call_operand (op
, mode
)
368 enum machine_mode mode
;
373 return (GET_CODE (op
) == SYMBOL_REF
374 || (GET_CODE (op
) == REG
375 && (REGNO (op
) == 27 || WINDOWS_NT
)));
378 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
379 comparisons are valid in which insn. */
382 alpha_comparison_operator (op
, mode
)
384 enum machine_mode mode
;
386 enum rtx_code code
= GET_CODE (op
);
388 if (mode
!= GET_MODE (op
) || GET_RTX_CLASS (code
) != '<')
391 return (code
== EQ
|| code
== LE
|| code
== LT
392 || (mode
== DImode
&& (code
== LEU
|| code
== LTU
)));
395 /* Return 1 if OP is a signed comparison operation. */
398 signed_comparison_operator (op
, mode
)
400 enum machine_mode mode
;
402 switch (GET_CODE (op
))
404 case EQ
: case NE
: case LE
: case LT
: case GE
: case GT
:
411 /* Return 1 if this is a divide or modulus operator. */
414 divmod_operator (op
, mode
)
416 enum machine_mode mode
;
418 switch (GET_CODE (op
))
420 case DIV
: case MOD
: case UDIV
: case UMOD
:
427 /* Return 1 if this memory address is a known aligned register plus
428 a constant. It must be a valid address. This means that we can do
429 this as an aligned reference plus some offset.
431 Take into account what reload will do.
433 We could say that out-of-range stack slots are alignable, but that would
434 complicate get_aligned_mem and it isn't worth the trouble since few
435 functions have large stack space. */
438 aligned_memory_operand (op
, mode
)
440 enum machine_mode mode
;
442 if (GET_CODE (op
) == SUBREG
)
444 if (GET_MODE (op
) != mode
)
446 op
= SUBREG_REG (op
);
447 mode
= GET_MODE (op
);
450 if (reload_in_progress
&& GET_CODE (op
) == REG
451 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
452 op
= reg_equiv_mem
[REGNO (op
)];
454 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
455 || ! memory_address_p (mode
, XEXP (op
, 0)))
460 if (GET_CODE (op
) == PLUS
)
463 return (GET_CODE (op
) == REG
464 && (REGNO (op
) == STACK_POINTER_REGNUM
465 || op
== hard_frame_pointer_rtx
466 || (REGNO (op
) >= FIRST_VIRTUAL_REGISTER
467 && REGNO (op
) <= LAST_VIRTUAL_REGISTER
)));
470 /* Similar, but return 1 if OP is a MEM which is not alignable. */
473 unaligned_memory_operand (op
, mode
)
475 enum machine_mode mode
;
477 if (GET_CODE (op
) == SUBREG
)
479 if (GET_MODE (op
) != mode
)
481 op
= SUBREG_REG (op
);
482 mode
= GET_MODE (op
);
485 if (reload_in_progress
&& GET_CODE (op
) == REG
486 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
487 op
= reg_equiv_mem
[REGNO (op
)];
489 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
)
494 if (! memory_address_p (mode
, op
))
497 if (GET_CODE (op
) == PLUS
)
500 return (GET_CODE (op
) != REG
501 || (REGNO (op
) != STACK_POINTER_REGNUM
502 && op
!= hard_frame_pointer_rtx
503 && (REGNO (op
) < FIRST_VIRTUAL_REGISTER
504 || REGNO (op
) > LAST_VIRTUAL_REGISTER
)));
507 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
510 any_memory_operand (op
, mode
)
512 enum machine_mode mode
;
514 return (GET_CODE (op
) == MEM
515 || (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
516 || (reload_in_progress
&& GET_CODE (op
) == REG
517 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
518 || (reload_in_progress
&& GET_CODE (op
) == SUBREG
519 && GET_CODE (SUBREG_REG (op
)) == REG
520 && REGNO (SUBREG_REG (op
)) >= FIRST_PSEUDO_REGISTER
));
523 /* REF is an alignable memory location. Place an aligned SImode
524 reference into *PALIGNED_MEM and the number of bits to shift into
528 get_aligned_mem (ref
, paligned_mem
, pbitnum
)
530 rtx
*paligned_mem
, *pbitnum
;
533 HOST_WIDE_INT offset
= 0;
535 if (GET_CODE (ref
) == SUBREG
)
537 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
538 if (BYTES_BIG_ENDIAN
)
539 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
540 - MIN (UNITS_PER_WORD
,
541 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
542 ref
= SUBREG_REG (ref
);
545 if (GET_CODE (ref
) == REG
)
546 ref
= reg_equiv_mem
[REGNO (ref
)];
548 if (reload_in_progress
)
549 base
= find_replacement (&XEXP (ref
, 0));
551 base
= XEXP (ref
, 0);
553 if (GET_CODE (base
) == PLUS
)
554 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
556 *paligned_mem
= gen_rtx (MEM
, SImode
,
557 plus_constant (base
, offset
& ~3));
558 MEM_IN_STRUCT_P (*paligned_mem
) = MEM_IN_STRUCT_P (ref
);
559 MEM_VOLATILE_P (*paligned_mem
) = MEM_VOLATILE_P (ref
);
560 RTX_UNCHANGING_P (*paligned_mem
) = RTX_UNCHANGING_P (ref
);
562 *pbitnum
= GEN_INT ((offset
& 3) * 8);
565 /* Similar, but just get the address. Handle the two reload cases. */
568 get_unaligned_address (ref
)
572 HOST_WIDE_INT offset
= 0;
574 if (GET_CODE (ref
) == SUBREG
)
576 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
577 if (BYTES_BIG_ENDIAN
)
578 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
579 - MIN (UNITS_PER_WORD
,
580 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
581 ref
= SUBREG_REG (ref
);
584 if (GET_CODE (ref
) == REG
)
585 ref
= reg_equiv_mem
[REGNO (ref
)];
587 if (reload_in_progress
)
588 base
= find_replacement (&XEXP (ref
, 0));
590 base
= XEXP (ref
, 0);
592 if (GET_CODE (base
) == PLUS
)
593 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
595 return plus_constant (base
, offset
);
598 /* Subfunction of the following function. Update the flags of any MEM
599 found in part of X. */
602 alpha_set_memflags_1 (x
, in_struct_p
, volatile_p
, unchanging_p
)
604 int in_struct_p
, volatile_p
, unchanging_p
;
608 switch (GET_CODE (x
))
612 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
613 alpha_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
618 alpha_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
623 alpha_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
625 alpha_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
,
630 MEM_IN_STRUCT_P (x
) = in_struct_p
;
631 MEM_VOLATILE_P (x
) = volatile_p
;
632 RTX_UNCHANGING_P (x
) = unchanging_p
;
637 /* Given INSN, which is either an INSN or a SEQUENCE generated to
638 perform a memory operation, look for any MEMs in either a SET_DEST or
639 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
640 REF into each of the MEMs found. If REF is not a MEM, don't do
644 alpha_set_memflags (insn
, ref
)
648 /* Note that it is always safe to get these flags, though they won't
649 be what we think if REF is not a MEM. */
650 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
651 int volatile_p
= MEM_VOLATILE_P (ref
);
652 int unchanging_p
= RTX_UNCHANGING_P (ref
);
654 if (GET_CODE (ref
) != MEM
655 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
658 alpha_set_memflags_1 (insn
, in_struct_p
, volatile_p
, unchanging_p
);
661 /* Try to output insns to set TARGET equal to the constant C if it can be
662 done in less than N insns. Do all computations in MODE. Returns the place
663 where the output has been placed if it can be done and the insns have been
664 emitted. If it would take more than N insns, zero is returned and no
665 insns and emitted. */
668 alpha_emit_set_const (target
, mode
, c
, n
)
670 enum machine_mode mode
;
674 HOST_WIDE_INT
new = c
;
676 /* Use a pseudo if highly optimizing and still generating RTL. */
678 = (flag_expensive_optimizations
&& rtx_equal_function_value_matters
682 #if HOST_BITS_PER_WIDE_INT == 64
683 /* We are only called for SImode and DImode. If this is SImode, ensure that
684 we are sign extended to a full word. This does not make any sense when
685 cross-compiling on a narrow machine. */
688 c
= (c
& 0xffffffff) - 2 * (c
& 0x80000000);
691 /* If this is a sign-extended 32-bit constant, we can do this in at most
692 three insns, so do it if we have enough insns left. We always have
693 a sign-extended 32-bit constant when compiling on a narrow machine.
694 Note that we cannot handle the constant 0x80000000. */
696 if ((HOST_BITS_PER_WIDE_INT
!= 64
697 || c
>> 31 == -1 || c
>> 31 == 0)
700 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
701 HOST_WIDE_INT tmp1
= c
- low
;
703 = ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
704 HOST_WIDE_INT extra
= 0;
706 /* If HIGH will be interpreted as negative but the constant is
707 positive, we must adjust it to do two ldha insns. */
709 if ((high
& 0x8000) != 0 && c
>= 0)
713 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
716 if (c
== low
|| (low
== 0 && extra
== 0))
717 return copy_to_suggested_reg (GEN_INT (c
), target
, mode
);
718 else if (n
>= 2 + (extra
!= 0))
720 temp
= copy_to_suggested_reg (GEN_INT (low
), subtarget
, mode
);
723 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (extra
<< 16),
724 subtarget
, 0, OPTAB_WIDEN
);
726 return expand_binop (mode
, add_optab
, temp
, GEN_INT (high
<< 16),
727 target
, 0, OPTAB_WIDEN
);
731 /* If we couldn't do it that way, try some other methods. But if we have
732 no instructions left, don't bother. Likewise, if this is SImode and
733 we can't make pseudos, we can't do anything since the expand_binop
734 and expand_unop calls will widen and try to make pseudos. */
737 || (mode
== SImode
&& ! rtx_equal_function_value_matters
))
740 #if HOST_BITS_PER_WIDE_INT == 64
741 /* First, see if can load a value into the target that is the same as the
742 constant except that all bytes that are 0 are changed to be 0xff. If we
743 can, then we can do a ZAPNOT to obtain the desired constant. */
745 for (i
= 0; i
< 64; i
+= 8)
746 if ((new & ((HOST_WIDE_INT
) 0xff << i
)) == 0)
747 new |= (HOST_WIDE_INT
) 0xff << i
;
749 if ((temp
= alpha_emit_set_const (subtarget
, mode
, new, n
- 1)) != 0)
750 return expand_binop (mode
, and_optab
, temp
, GEN_INT (c
| ~ new),
751 target
, 0, OPTAB_WIDEN
);
754 /* Next, see if we can load a related constant and then shift and possibly
755 negate it to get the constant we want. Try this once each increasing
758 for (i
= 1; i
< n
; i
++)
760 /* First try complementing. */
761 if ((temp
= alpha_emit_set_const (subtarget
, mode
, ~ c
, i
)) != 0)
762 return expand_unop (mode
, one_cmpl_optab
, temp
, target
, 0);
764 /* Next try to form a constant and do a left shift. We can do this
765 if some low-order bits are zero; the exact_log2 call below tells
766 us that information. The bits we are shifting out could be any
767 value, but here we'll just try the 0- and sign-extended forms of
768 the constant. To try to increase the chance of having the same
769 constant in more than one insn, start at the highest number of
770 bits to shift, but try all possibilities in case a ZAPNOT will
773 if ((bits
= exact_log2 (c
& - c
)) > 0)
774 for (; bits
> 0; bits
--)
775 if ((temp
= (alpha_emit_set_const
777 (unsigned HOST_WIDE_INT
) c
>> bits
, i
))) != 0
778 || ((temp
= (alpha_emit_set_const
780 ((unsigned HOST_WIDE_INT
) c
) >> bits
, i
)))
782 return expand_binop (mode
, ashl_optab
, temp
, GEN_INT (bits
),
783 target
, 0, OPTAB_WIDEN
);
785 /* Now try high-order zero bits. Here we try the shifted-in bits as
786 all zero and all ones. */
788 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (c
) - 1) > 0)
789 for (; bits
> 0; bits
--)
790 if ((temp
= alpha_emit_set_const (subtarget
, mode
,
792 || ((temp
= (alpha_emit_set_const
794 ((c
<< bits
) | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
797 return expand_binop (mode
, lshr_optab
, temp
, GEN_INT (bits
),
798 target
, 0, OPTAB_WIDEN
);
800 /* Now try high-order 1 bits. We get that with a sign-extension.
801 But one bit isn't enough here. */
803 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (~ c
) - 2) > 0)
804 for (; bits
> 0; bits
--)
805 if ((temp
= alpha_emit_set_const (subtarget
, mode
,
807 || ((temp
= (alpha_emit_set_const
809 ((c
<< bits
) | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
812 return expand_binop (mode
, ashr_optab
, temp
, GEN_INT (bits
),
813 target
, 0, OPTAB_WIDEN
);
819 /* Adjust the cost of a scheduling dependency. Return the new cost of
820 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
823 alpha_adjust_cost (insn
, link
, dep_insn
, cost
)
831 /* If the dependence is an anti-dependence, there is no cost. For an
832 output dependence, there is sometimes a cost, but it doesn't seem
833 worth handling those few cases. */
835 if (REG_NOTE_KIND (link
) != 0)
838 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
839 we can sometimes lower the cost. */
841 if (recog_memoized (insn
) >= 0 && get_attr_type (insn
) == TYPE_ST
842 && (set
= single_set (dep_insn
)) != 0
843 && GET_CODE (PATTERN (insn
)) == SET
844 && rtx_equal_p (SET_DEST (set
), SET_SRC (PATTERN (insn
))))
845 switch (get_attr_type (dep_insn
))
848 /* No savings here. */
853 /* In these cases, we save one cycle. */
857 /* In all other cases, we save two cycles. */
858 return MAX (0, cost
- 4);
861 /* Another case that needs adjustment is an arithmetic or logical
862 operation. It's cost is usually one cycle, but we default it to
863 two in the MD file. The only case that it is actually two is
864 for the address in loads and stores. */
866 if (recog_memoized (dep_insn
) >= 0
867 && get_attr_type (dep_insn
) == TYPE_IADDLOG
)
868 switch (get_attr_type (insn
))
878 /* The final case is when a compare feeds into an integer branch. The cost
879 is only one cycle in that case. */
881 if (recog_memoized (dep_insn
) >= 0
882 && get_attr_type (dep_insn
) == TYPE_ICMP
883 && recog_memoized (insn
) >= 0
884 && get_attr_type (insn
) == TYPE_IBR
)
887 /* Otherwise, return the default cost. */
892 /* Print an operand. Recognize special options, documented below. */
895 print_operand (file
, x
, code
)
905 /* If this operand is the constant zero, write it as "$31". */
906 if (GET_CODE (x
) == REG
)
907 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
908 else if (x
== CONST0_RTX (GET_MODE (x
)))
909 fprintf (file
, "$31");
911 output_operand_lossage ("invalid %%r value");
916 /* Similar, but for floating-point. */
917 if (GET_CODE (x
) == REG
)
918 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
919 else if (x
== CONST0_RTX (GET_MODE (x
)))
920 fprintf (file
, "$f31");
922 output_operand_lossage ("invalid %%R value");
927 /* Write the 1's complement of a constant. */
928 if (GET_CODE (x
) != CONST_INT
)
929 output_operand_lossage ("invalid %%N value");
931 fprintf (file
, "%ld", ~ INTVAL (x
));
935 /* Write 1 << C, for a constant C. */
936 if (GET_CODE (x
) != CONST_INT
)
937 output_operand_lossage ("invalid %%P value");
939 fprintf (file
, "%ld", (HOST_WIDE_INT
) 1 << INTVAL (x
));
943 /* Write the high-order 16 bits of a constant, sign-extended. */
944 if (GET_CODE (x
) != CONST_INT
)
945 output_operand_lossage ("invalid %%h value");
947 fprintf (file
, "%ld", INTVAL (x
) >> 16);
951 /* Write the low-order 16 bits of a constant, sign-extended. */
952 if (GET_CODE (x
) != CONST_INT
)
953 output_operand_lossage ("invalid %%L value");
955 fprintf (file
, "%ld", (INTVAL (x
) & 0xffff) - 2 * (INTVAL (x
) & 0x8000));
959 /* Write mask for ZAP insn. */
960 if (GET_CODE (x
) == CONST_DOUBLE
)
962 HOST_WIDE_INT mask
= 0;
965 value
= CONST_DOUBLE_LOW (x
);
966 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
971 value
= CONST_DOUBLE_HIGH (x
);
972 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
975 mask
|= (1 << (i
+ sizeof (int)));
977 fprintf (file
, "%ld", mask
& 0xff);
980 else if (GET_CODE (x
) == CONST_INT
)
982 HOST_WIDE_INT mask
= 0, value
= INTVAL (x
);
984 for (i
= 0; i
< 8; i
++, value
>>= 8)
988 fprintf (file
, "%ld", mask
);
991 output_operand_lossage ("invalid %%m value");
995 /* 'b', 'w', or 'l' as the value of the constant. */
996 if (GET_CODE (x
) != CONST_INT
997 || (INTVAL (x
) != 8 && INTVAL (x
) != 16 && INTVAL (x
) != 32))
998 output_operand_lossage ("invalid %%M value");
1000 fprintf (file
, "%s",
1001 INTVAL (x
) == 8 ? "b" : INTVAL (x
) == 16 ? "w" : "l");
1005 /* Similar, except do it from the mask. */
1006 if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xff)
1007 fprintf (file
, "b");
1008 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffff)
1009 fprintf (file
, "w");
1010 #if HOST_BITS_PER_WIDE_INT == 32
1011 else if (GET_CODE (x
) == CONST_DOUBLE
1012 && CONST_DOUBLE_HIGH (x
) == 0
1013 && CONST_DOUBLE_LOW (x
) == -1)
1014 fprintf (file
, "l");
1016 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffffffff)
1017 fprintf (file
, "l");
1020 output_operand_lossage ("invalid %%U value");
1024 /* Write the constant value divided by 8. */
1025 if (GET_CODE (x
) != CONST_INT
1026 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
1027 && (INTVAL (x
) & 7) != 8)
1028 output_operand_lossage ("invalid %%s value");
1030 fprintf (file
, "%ld", INTVAL (x
) / 8);
1034 /* Same, except compute (64 - c) / 8 */
1036 if (GET_CODE (x
) != CONST_INT
1037 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
1038 && (INTVAL (x
) & 7) != 8)
1039 output_operand_lossage ("invalid %%s value");
1041 fprintf (file
, "%ld", (64 - INTVAL (x
)) / 8);
1045 /* Write out comparison name. */
1046 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1047 output_operand_lossage ("invalid %%C value");
1049 if (GET_CODE (x
) == LEU
)
1050 fprintf (file
, "ule");
1051 else if (GET_CODE (x
) == LTU
)
1052 fprintf (file
, "ult");
1054 fprintf (file
, "%s", GET_RTX_NAME (GET_CODE (x
)));
1058 /* Similar, but write reversed code. We can't get an unsigned code
1060 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1061 output_operand_lossage ("invalid %%D value");
1063 fprintf (file
, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x
))));
1067 /* Similar to `c', but swap. We can't get unsigned here either. */
1068 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1069 output_operand_lossage ("invalid %%D value");
1071 fprintf (file
, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x
))));
1075 /* Similar, but reverse and swap. We can't get unsigned here either. */
1076 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1077 output_operand_lossage ("invalid %%D value");
1079 fprintf (file
, "%s",
1080 GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x
))))));
1084 /* Write the divide or modulus operator. */
1085 switch (GET_CODE (x
))
1088 fprintf (file
, "div%s", GET_MODE (x
) == SImode
? "l" : "q");
1091 fprintf (file
, "div%su", GET_MODE (x
) == SImode
? "l" : "q");
1094 fprintf (file
, "rem%s", GET_MODE (x
) == SImode
? "l" : "q");
1097 fprintf (file
, "rem%su", GET_MODE (x
) == SImode
? "l" : "q");
1100 output_operand_lossage ("invalid %%E value");
1106 /* Write "_u" for unaligned access. */
1107 if (GET_CODE (x
) == MEM
&& GET_CODE (XEXP (x
, 0)) == AND
)
1108 fprintf (file
, "_u");
1112 if (GET_CODE (x
) == REG
)
1113 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1114 else if (GET_CODE (x
) == MEM
)
1115 output_address (XEXP (x
, 0));
1117 output_addr_const (file
, x
);
1121 output_operand_lossage ("invalid %%xn code");
1125 /* Do what is necessary for `va_start'. The argument is ignored;
1126 We look at the current function to determine if stdarg or varargs
1127 is used and fill in an initial va_list. A pointer to this constructor
1131 alpha_builtin_saveregs (arglist
)
1134 rtx block
, addr
, argsize
;
1135 tree fntype
= TREE_TYPE (current_function_decl
);
1136 int stdarg
= (TYPE_ARG_TYPES (fntype
) != 0
1137 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1138 != void_type_node
));
1140 /* Compute the current position into the args, taking into account
1141 both registers and memory. Both of these are already included in
1142 current_function_args_info. */
1144 argsize
= GEN_INT (current_function_args_info
* UNITS_PER_WORD
);
1146 /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1147 storing fp arg registers in the first 48 bytes, and the integer arg
1148 registers in the next 48 bytes. This is only done, however, if any
1149 integer registers need to be stored.
1151 If no integer registers need be stored, then we must subtract 48 in
1152 order to account for the integer arg registers which are counted in
1153 argsize above, but which are not actually stored on the stack. */
1155 addr
= (current_function_args_info
<= 5 + stdarg
1156 ? plus_constant (virtual_incoming_args_rtx
, 6 * UNITS_PER_WORD
)
1157 : plus_constant (virtual_incoming_args_rtx
, - (6 * UNITS_PER_WORD
)));
1159 /* Allocate the va_list constructor */
1160 block
= assign_stack_local (BLKmode
, 2 * UNITS_PER_WORD
, BITS_PER_WORD
);
1161 RTX_UNCHANGING_P (block
) = 1;
1162 RTX_UNCHANGING_P (XEXP (block
, 0)) = 1;
1164 /* Store the address of the first integer register in the
1165 __va_base member. */
1166 emit_move_insn (change_address (block
, Pmode
, XEXP (block
, 0)),
1167 force_operand (addr
, NULL_RTX
));
1169 /* Store the argsize as the __va_offset member. */
1170 emit_move_insn (change_address (block
, Pmode
,
1171 plus_constant (XEXP (block
, 0),
1173 force_operand (argsize
, NULL_RTX
));
1175 /* Return the address of the va_list constructor, but don't put it in a
1176 register. Doing so would fail when not optimizing and produce worse
1177 code when optimizing. */
1178 return XEXP (block
, 0);
1181 /* This page contains routines that are used to determine what the function
1182 prologue and epilogue code will do and write them out. */
1184 /* Compute the size of the save area in the stack. */
1192 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1193 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
])
1196 /* If some registers were saved but not reg 26, reg 26 must also
1197 be saved, so leave space for it. */
1198 if (size
!= 0 && ! regs_ever_live
[26])
1201 /* Our size must be even (multiple of 16 bytes). */
1208 /* Return 1 if this function can directly return via $26. */
1213 return (reload_completed
&& alpha_sa_size () == 0
1214 && get_frame_size () == 0
1215 && current_function_outgoing_args_size
== 0
1216 && current_function_pretend_args_size
== 0);
1219 /* Write a version stamp. Don't write anything if we are running as a
1220 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1222 #if !defined(CROSS_COMPILE) && !defined(_WIN32)
1227 alpha_write_verstamp (file
)
1233 fprintf (file
, "\t.verstamp %d %d ", MS_STAMP
, LS_STAMP
);
1234 for (p
= version_string
; *p
!= ' ' && *p
!= 0; p
++)
1235 fprintf (file
, "%c", *p
== '.' ? ' ' : *p
);
1236 fprintf (file
, "\n");
1240 /* Write code to add constant C to register number IN_REG (possibly 31)
1241 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1242 usually this will be OUT_REG, but should not be if OUT_REG is
1243 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1244 Write the code to FILE. */
1247 add_long_const (file
, c
, in_reg
, out_reg
, temp_reg
)
1250 int in_reg
, out_reg
, temp_reg
;
1252 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
1253 HOST_WIDE_INT tmp1
= c
- low
;
1254 HOST_WIDE_INT high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1255 HOST_WIDE_INT extra
= 0;
1257 /* We don't have code to write out constants larger than 32 bits. */
1258 #if HOST_BITS_PER_LONG_INT == 64
1259 if ((unsigned HOST_WIDE_INT
) c
>> 32 != 0)
1263 /* If HIGH will be interpreted as negative, we must adjust it to do two
1264 ldha insns. Note that we will never be building a negative constant
1271 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1276 int result_reg
= (extra
== 0 && high
== 0) ? out_reg
: temp_reg
;
1278 if (low
>= 0 && low
< 255)
1279 fprintf (file
, "\taddq $%d,%d,$%d\n", in_reg
, low
, result_reg
);
1281 fprintf (file
, "\tlda $%d,%d($%d)\n", result_reg
, low
, in_reg
);
1283 in_reg
= result_reg
;
1288 int result_reg
= (high
== 0) ? out_reg
: temp_reg
;
1290 fprintf (file
, "\tldah $%d,%d($%d)\n", result_reg
, extra
, in_reg
);
1291 in_reg
= result_reg
;
1295 fprintf (file
, "\tldah $%d,%d($%d)\n", out_reg
, high
, in_reg
);
1298 /* Write function prologue. */
1301 output_prolog (file
, size
)
1305 HOST_WIDE_INT out_args_size
1306 = ALPHA_ROUND (current_function_outgoing_args_size
);
1307 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1308 HOST_WIDE_INT frame_size
1309 = (out_args_size
+ sa_size
1310 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1311 HOST_WIDE_INT reg_offset
= out_args_size
;
1312 HOST_WIDE_INT start_reg_offset
= reg_offset
;
1313 HOST_WIDE_INT actual_start_reg_offset
= start_reg_offset
;
1314 int int_reg_save_area_size
= 0;
1316 unsigned reg_mask
= 0;
1319 /* Ecoff can handle multiple .file directives, so put out file and lineno.
1320 We have to do that before the .ent directive as we cannot switch
1321 files within procedures with native ecoff because line numbers are
1322 linked to procedure descriptors.
1323 Outputting the lineno helps debugging of one line functions as they
1324 would otherwise get no line number at all. Please note that we would
1325 like to put out last_linenum from final.c, but it is not accessible. */
1327 if (write_symbols
== SDB_DEBUG
)
1329 ASM_OUTPUT_SOURCE_FILENAME (file
,
1330 DECL_SOURCE_FILE (current_function_decl
));
1331 if (debug_info_level
!= DINFO_LEVEL_TERSE
)
1332 ASM_OUTPUT_SOURCE_LINE (file
,
1333 DECL_SOURCE_LINE (current_function_decl
));
1336 /* The assembly language programmer's guide states that the second argument
1337 to the .ent directive, the lex_level, is ignored by the assembler,
1338 so we might as well omit it. */
1340 fprintf (file
, "\t.ent ");
1341 assemble_name (file
, alpha_function_name
);
1342 fprintf (file
, "\n");
1343 ASM_OUTPUT_LABEL (file
, alpha_function_name
);
1344 inside_function
= TRUE
;
1346 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1348 alpha_auto_offset
= -frame_size
+ current_function_pretend_args_size
;
1349 alpha_arg_offset
= -frame_size
+ 48;
1351 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1352 Even if we are a static function, we still need to do this in case
1353 our address is taken and passed to something like qsort.
1355 We never need a GP for Windows/NT. */
1357 alpha_function_needs_gp
= 0;
1358 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1359 if ((GET_CODE (insn
) == CALL_INSN
)
1360 || (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1361 && GET_CODE (PATTERN (insn
)) != USE
1362 && GET_CODE (PATTERN (insn
)) != CLOBBER
1363 && (get_attr_type (insn
) == TYPE_LDSYM
1364 || get_attr_type (insn
) == TYPE_ISUBR
)))
1366 alpha_function_needs_gp
= 1;
1370 if (WINDOWS_NT
== 0)
1372 if (alpha_function_needs_gp
)
1373 fprintf (file
, "\tldgp $29,0($27)\n");
1375 /* Put a label after the GP load so we can enter the function at it. */
1376 assemble_name (file
, alpha_function_name
);
1377 fprintf (file
, "..ng:\n");
1380 /* Adjust the stack by the frame size. If the frame size is > 4096
1381 bytes, we need to be sure we probe somewhere in the first and last
1382 4096 bytes (we can probably get away without the latter test) and
1383 every 8192 bytes in between. If the frame size is > 32768, we
1384 do this in a loop. Otherwise, we generate the explicit probe
1387 Note that we are only allowed to adjust sp once in the prologue. */
1389 if (frame_size
< 32768)
1391 if (frame_size
> 4096)
1395 fprintf (file
, "\tstq $31,-%d($30)\n", probed
);
1397 while (probed
+ 8192 < frame_size
)
1398 fprintf (file
, "\tstq $31,-%d($30)\n", probed
+= 8192);
1400 /* We only have to do this probe if we aren't saving registers. */
1401 if (sa_size
== 0 && probed
+ 4096 < frame_size
)
1402 fprintf (file
, "\tstq $31,-%d($30)\n", frame_size
);
1405 if (frame_size
!= 0)
1406 fprintf (file
, "\tlda $30,-%d($30)\n", frame_size
);
1410 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1411 number of 8192 byte blocks to probe. We then probe each block
1412 in the loop and then set SP to the proper location. If the
1413 amount remaining is > 4096, we have to do one more probe if we
1414 are not saving any registers. */
1416 HOST_WIDE_INT blocks
= (frame_size
+ 4096) / 8192;
1417 HOST_WIDE_INT leftover
= frame_size
+ 4096 - blocks
* 8192;
1419 add_long_const (file
, blocks
, 31, 5, 5);
1421 fprintf (file
, "\tlda $4,4096($30)\n");
1423 assemble_name (file
, alpha_function_name
);
1424 fprintf (file
, "..sc:\n");
1426 fprintf (file
, "\tstq $31,-8192($4)\n");
1427 fprintf (file
, "\tsubq $5,1,$5\n");
1428 fprintf (file
, "\tlda $4,-8192($4)\n");
1430 fprintf (file
, "\tbne $5,");
1431 assemble_name (file
, alpha_function_name
);
1432 fprintf (file
, "..sc\n");
1434 if (leftover
> 4096 && sa_size
== 0)
1435 fprintf (file
, "\tstq $31,-%d($4)\n", leftover
);
1437 fprintf (file
, "\tlda $30,-%d($4)\n", leftover
);
1440 /* Describe our frame. */
1441 fprintf (file
, "\t.frame $%d,%d,$26,%d\n",
1442 (frame_pointer_needed
1443 ? HARD_FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
),
1444 frame_size
, current_function_pretend_args_size
);
1446 /* Save register 26 if any other register needs to be saved. */
1449 reg_mask
|= 1 << 26;
1450 fprintf (file
, "\tstq $26,%d($30)\n", reg_offset
);
1452 int_reg_save_area_size
+= 8;
1455 /* Now save any other used integer registers required to be saved. */
1456 for (i
= 0; i
< 32; i
++)
1457 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
] && i
!= 26)
1460 fprintf (file
, "\tstq $%d,%d($30)\n", i
, reg_offset
);
1462 int_reg_save_area_size
+= 8;
1465 /* Print the register mask and do floating-point saves. */
1467 fprintf (file
, "\t.mask 0x%x,%d\n", reg_mask
,
1468 actual_start_reg_offset
- frame_size
);
1470 start_reg_offset
= reg_offset
;
1473 for (i
= 0; i
< 32; i
++)
1474 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1475 && regs_ever_live
[i
+ 32])
1478 fprintf (file
, "\tstt $f%d,%d($30)\n", i
, reg_offset
);
1482 /* Print the floating-point mask, if we've saved any fp register. */
1484 fprintf (file
, "\t.fmask 0x%x,%d\n", reg_mask
,
1485 actual_start_reg_offset
- frame_size
+ int_reg_save_area_size
);
1487 /* If we need a frame pointer, set it from the stack pointer. Note that
1488 this must always be the last instruction in the prologue. */
1489 if (frame_pointer_needed
)
1490 fprintf (file
, "\tbis $30,$30,$15\n");
1492 /* End the prologue and say if we used gp. */
1493 fprintf (file
, "\t.prologue %d\n", alpha_function_needs_gp
);
1496 /* Write function epilogue. */
1499 output_epilog (file
, size
)
1503 rtx insn
= get_last_insn ();
1504 HOST_WIDE_INT out_args_size
1505 = ALPHA_ROUND (current_function_outgoing_args_size
);
1506 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1507 HOST_WIDE_INT frame_size
1508 = (out_args_size
+ sa_size
1509 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1510 HOST_WIDE_INT reg_offset
= out_args_size
;
1511 HOST_WIDE_INT frame_size_from_reg_save
= frame_size
- reg_offset
;
1513 = frame_pointer_needed
&& regs_ever_live
[HARD_FRAME_POINTER_REGNUM
];
1516 /* If the last insn was a BARRIER, we don't have to write anything except
1517 the .end pseudo-op. */
1518 if (GET_CODE (insn
) == NOTE
)
1519 insn
= prev_nonnote_insn (insn
);
1520 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1524 /* If we have a frame pointer, restore SP from it. */
1525 if (frame_pointer_needed
)
1526 fprintf (file
, "\tbis $15,$15,$30\n");
1528 /* Restore all the registers, starting with the return address
1532 fprintf (file
, "\tldq $26,%d($30)\n", reg_offset
);
1536 /* Now restore any other used integer registers that that we saved,
1537 except for FP if it is being used as FP, since it must be
1540 for (i
= 0; i
< 32; i
++)
1541 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
]
1544 if (i
== HARD_FRAME_POINTER_REGNUM
&& frame_pointer_needed
)
1545 fp_offset
= reg_offset
;
1547 fprintf (file
, "\tldq $%d,%d($30)\n", i
, reg_offset
);
1551 for (i
= 0; i
< 32; i
++)
1552 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1553 && regs_ever_live
[i
+ 32])
1555 fprintf (file
, "\tldt $f%d,%d($30)\n", i
, reg_offset
);
1559 /* If the stack size is large and we have a frame pointer, compute the
1560 size of the stack into a register because the old FP restore, stack
1561 pointer adjust, and return are required to be consecutive
1563 if (frame_size
> 32767 && restore_fp
)
1564 add_long_const (file
, frame_size
, 31, 1, 1);
1566 /* If we needed a frame pointer and we have to restore it, do it
1567 now. This must be done in one instruction immediately
1568 before the SP update. */
1569 if (restore_fp
&& fp_offset
)
1570 fprintf (file
, "\tldq $15,%d($30)\n", fp_offset
);
1572 /* Now update the stack pointer, if needed. Only one instruction must
1573 modify the stack pointer. It must be the last instruction in the
1574 sequence and must be an ADDQ or LDA instruction. If the frame
1575 pointer was loaded above, we may only put one instruction here. */
1577 if (frame_size
> 32768 && restore_fp
)
1578 fprintf (file
, "\taddq $1,$30,$30\n");
1580 add_long_const (file
, frame_size
, 30, 30, 1);
1582 /* Finally return to the caller. */
1583 fprintf (file
, "\tret $31,($26),1\n");
1586 /* End the function. */
1587 fprintf (file
, "\t.end ");
1588 assemble_name (file
, alpha_function_name
);
1589 fprintf (file
, "\n");
1590 inside_function
= FALSE
;
1592 /* Show that we know this function if it is called again. */
1593 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl
), 0)) = 1;
1596 /* Debugging support. */
1600 /* Count the number of sdb related labels are generated (to find block
1601 start and end boundaries). */
1603 int sdb_label_count
= 0;
1605 /* Next label # for each statement. */
1607 static int sym_lineno
= 0;
1609 /* Count the number of .file directives, so that .loc is up to date. */
1611 static int num_source_filenames
= 0;
1613 /* Name of the file containing the current function. */
1615 static char *current_function_file
= "";
1617 /* Offsets to alpha virtual arg/local debugging pointers. */
1619 long alpha_arg_offset
;
1620 long alpha_auto_offset
;
1622 /* Emit a new filename to a stream. */
1625 alpha_output_filename (stream
, name
)
1629 static int first_time
= TRUE
;
1630 char ltext_label_name
[100];
1635 ++num_source_filenames
;
1636 current_function_file
= name
;
1637 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1638 output_quoted_string (stream
, name
);
1639 fprintf (stream
, "\n");
1640 if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1641 fprintf (stream
, "\t#@stabs\n");
1644 else if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1646 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name
, "Ltext", 0);
1647 fprintf (stream
, "%s ", ASM_STABS_OP
);
1648 output_quoted_string (stream
, name
);
1649 fprintf (stream
, ",%d,0,0,%s\n", N_SOL
, <ext_label_name
[1]);
1652 else if (name
!= current_function_file
1653 && strcmp (name
, current_function_file
) != 0)
1655 if (inside_function
&& ! TARGET_GAS
)
1656 fprintf (stream
, "\t#.file\t%d ", num_source_filenames
);
1659 ++num_source_filenames
;
1660 current_function_file
= name
;
1661 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1664 output_quoted_string (stream
, name
);
1665 fprintf (stream
, "\n");
1669 /* Emit a linenumber to a stream. */
1672 alpha_output_lineno (stream
, line
)
1676 if (! TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1678 /* mips-tfile doesn't understand .stabd directives. */
1680 fprintf (stream
, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1681 sym_lineno
, ASM_STABN_OP
, N_SLINE
, line
, sym_lineno
);
1684 fprintf (stream
, "\n\t.loc\t%d %d\n", num_source_filenames
, line
);