1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
40 /* Save information from a "cmpxx" operation until the branch or scc is
43 rtx alpha_compare_op0
, alpha_compare_op1
;
44 int alpha_compare_fp_p
;
46 /* Save the name of the current function as used by the assembler. This
47 is used by the epilogue. */
49 char *alpha_function_name
;
51 /* Non-zero if inside of a function, because the Alpha asm can't
52 handle .files inside of functions. */
54 static int inside_function
= FALSE
;
56 /* Nonzero if the current function needs gp. */
58 int alpha_function_needs_gp
;
60 extern char *version_string
;
62 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
70 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
72 if ((value
& 0xff) != 0 && (value
& 0xff) != 0xff)
78 /* Returns 1 if OP is either the constant zero or a register. If a
79 register, it must be in the proper mode unless MODE is VOIDmode. */
82 reg_or_0_operand (op
, mode
)
84 enum machine_mode mode
;
86 return op
== const0_rtx
|| register_operand (op
, mode
);
89 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
93 reg_or_6bit_operand (op
, mode
)
95 enum machine_mode mode
;
97 return ((GET_CODE (op
) == CONST_INT
98 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64)
99 || register_operand (op
, mode
));
103 /* Return 1 if OP is an 8-bit constant or any register. */
106 reg_or_8bit_operand (op
, mode
)
108 enum machine_mode mode
;
110 return ((GET_CODE (op
) == CONST_INT
111 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100)
112 || register_operand (op
, mode
));
115 /* Return 1 if the operand is a valid second operand to an add insn. */
118 add_operand (op
, mode
)
120 enum machine_mode mode
;
122 if (GET_CODE (op
) == CONST_INT
)
123 return ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) < 0x10000
124 || ((INTVAL (op
) & 0xffff) == 0
125 && (INTVAL (op
) >> 31 == -1
126 || INTVAL (op
) >> 31 == 0)));
128 return register_operand (op
, mode
);
131 /* Return 1 if the operand is a valid second operand to a sign-extending
135 sext_add_operand (op
, mode
)
137 enum machine_mode mode
;
139 if (GET_CODE (op
) == CONST_INT
)
140 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 255
141 || (unsigned HOST_WIDE_INT
) (- INTVAL (op
)) < 255);
143 return register_operand (op
, mode
);
146 /* Return 1 if OP is the constant 4 or 8. */
149 const48_operand (op
, mode
)
151 enum machine_mode mode
;
153 return (GET_CODE (op
) == CONST_INT
154 && (INTVAL (op
) == 4 || INTVAL (op
) == 8));
157 /* Return 1 if OP is a valid first operand to an AND insn. */
160 and_operand (op
, mode
)
162 enum machine_mode mode
;
164 if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == VOIDmode
)
165 return (zap_mask (CONST_DOUBLE_LOW (op
))
166 && zap_mask (CONST_DOUBLE_HIGH (op
)));
168 if (GET_CODE (op
) == CONST_INT
)
169 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
170 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100
171 || zap_mask (INTVAL (op
)));
173 return register_operand (op
, mode
);
176 /* Return 1 if OP is a constant that is the width, in bits, of an integral
177 mode smaller than DImode. */
180 mode_width_operand (op
, mode
)
182 enum machine_mode mode
;
184 return (GET_CODE (op
) == CONST_INT
185 && (INTVAL (op
) == 8 || INTVAL (op
) == 16 || INTVAL (op
) == 32));
188 /* Return 1 if OP is a constant that is the width of an integral machine mode
189 smaller than an integer. */
192 mode_mask_operand (op
, mode
)
194 enum machine_mode mode
;
196 #if HOST_BITS_PER_WIDE_INT == 32
197 if (GET_CODE (op
) == CONST_DOUBLE
)
198 return CONST_DOUBLE_HIGH (op
) == 0 && CONST_DOUBLE_LOW (op
) == -1;
201 if (GET_CODE (op
) == CONST_INT
)
202 return (INTVAL (op
) == 0xff
203 || INTVAL (op
) == 0xffff
204 #if HOST_BITS_PER_WIDE_INT == 64
205 || INTVAL (op
) == 0xffffffff
210 /* Return 1 if OP is a multiple of 8 less than 64. */
213 mul8_operand (op
, mode
)
215 enum machine_mode mode
;
217 return (GET_CODE (op
) == CONST_INT
218 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64
219 && (INTVAL (op
) & 7) == 0);
222 /* Return 1 if OP is the constant zero in floating-point. */
225 fp0_operand (op
, mode
)
227 enum machine_mode mode
;
229 return (GET_MODE (op
) == mode
230 && GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
));
233 /* Return 1 if OP is the floating-point constant zero or a register. */
236 reg_or_fp0_operand (op
, mode
)
238 enum machine_mode mode
;
240 return fp0_operand (op
, mode
) || register_operand (op
, mode
);
243 /* Return 1 if OP is a register or a constant integer. */
247 reg_or_cint_operand (op
, mode
)
249 enum machine_mode mode
;
251 return GET_CODE (op
) == CONST_INT
|| register_operand (op
, mode
);
254 /* Return 1 if OP is a valid operand for the source of a move insn. */
257 input_operand (op
, mode
)
259 enum machine_mode mode
;
261 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
264 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& GET_MODE (op
) != mode
)
267 switch (GET_CODE (op
))
272 return mode
== DImode
;
278 if (register_operand (op
, mode
))
280 /* ... fall through ... */
282 return mode
!= HImode
&& mode
!= QImode
&& general_operand (op
, mode
);
285 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
288 return mode
== QImode
|| mode
== HImode
|| add_operand (op
, mode
);
294 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
298 current_file_function_operand (op
, mode
)
300 enum machine_mode mode
;
302 return (GET_CODE (op
) == SYMBOL_REF
303 && (SYMBOL_REF_FLAG (op
)
304 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
307 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
308 comparisons are valid in which insn. */
311 alpha_comparison_operator (op
, mode
)
313 enum machine_mode mode
;
315 enum rtx_code code
= GET_CODE (op
);
317 if (mode
!= GET_MODE (op
) || GET_RTX_CLASS (code
) != '<')
320 return (code
== EQ
|| code
== LE
|| code
== LT
321 || (mode
== DImode
&& (code
== LEU
|| code
== LTU
)));
324 /* Return 1 if OP is a signed comparison operation. */
327 signed_comparison_operator (op
, mode
)
329 enum machine_mode mode
;
331 switch (GET_CODE (op
))
333 case EQ
: case NE
: case LE
: case LT
: case GE
: case GT
:
340 /* Return 1 if this is a divide or modulus operator. */
343 divmod_operator (op
, mode
)
345 enum machine_mode mode
;
347 switch (GET_CODE (op
))
349 case DIV
: case MOD
: case UDIV
: case UMOD
:
356 /* Return 1 if this memory address is a known aligned register plus
357 a constant. It must be a valid address. This means that we can do
358 this as an aligned reference plus some offset.
360 Take into account what reload will do.
362 We could say that out-of-range stack slots are alignable, but that would
363 complicate get_aligned_mem and it isn't worth the trouble since few
364 functions have large stack space. */
367 aligned_memory_operand (op
, mode
)
369 enum machine_mode mode
;
371 if (GET_CODE (op
) == SUBREG
)
373 if (GET_MODE (op
) != mode
)
375 op
= SUBREG_REG (op
);
376 mode
= GET_MODE (op
);
379 if (reload_in_progress
&& GET_CODE (op
) == REG
380 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
381 op
= reg_equiv_mem
[REGNO (op
)];
383 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
384 || ! memory_address_p (mode
, XEXP (op
, 0)))
389 if (GET_CODE (op
) == PLUS
)
392 return (GET_CODE (op
) == REG
393 && (REGNO (op
) == STACK_POINTER_REGNUM
|| op
== frame_pointer_rtx
394 || (REGNO (op
) >= FIRST_VIRTUAL_REGISTER
395 && REGNO (op
) <= LAST_VIRTUAL_REGISTER
)));
398 /* Similar, but return 1 if OP is a MEM which is not alignable. */
401 unaligned_memory_operand (op
, mode
)
403 enum machine_mode mode
;
405 if (GET_CODE (op
) == SUBREG
)
407 if (GET_MODE (op
) != mode
)
409 op
= SUBREG_REG (op
);
410 mode
= GET_MODE (op
);
413 if (reload_in_progress
&& GET_CODE (op
) == REG
414 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
415 op
= reg_equiv_mem
[REGNO (op
)];
417 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
)
422 if (! memory_address_p (mode
, op
))
425 if (GET_CODE (op
) == PLUS
)
428 return (GET_CODE (op
) != REG
429 || (REGNO (op
) != STACK_POINTER_REGNUM
&& op
!= frame_pointer_rtx
430 && (REGNO (op
) < FIRST_VIRTUAL_REGISTER
431 || REGNO (op
) > LAST_VIRTUAL_REGISTER
)));
434 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
437 any_memory_operand (op
, mode
)
439 enum machine_mode mode
;
441 return (GET_CODE (op
) == MEM
442 || (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
443 || (reload_in_progress
&& GET_CODE (op
) == REG
444 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
445 || (reload_in_progress
&& GET_CODE (op
) == SUBREG
446 && GET_CODE (SUBREG_REG (op
)) == REG
447 && REGNO (SUBREG_REG (op
)) >= FIRST_PSEUDO_REGISTER
));
450 /* REF is an alignable memory location. Place an aligned SImode
451 reference into *PALIGNED_MEM and the number of bits to shift into
455 get_aligned_mem (ref
, paligned_mem
, pbitnum
)
457 rtx
*paligned_mem
, *pbitnum
;
460 HOST_WIDE_INT offset
= 0;
462 if (GET_CODE (ref
) == SUBREG
)
464 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
465 if (BYTES_BIG_ENDIAN
)
466 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
467 - MIN (UNITS_PER_WORD
,
468 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
469 ref
= SUBREG_REG (ref
);
472 if (GET_CODE (ref
) == REG
)
473 ref
= reg_equiv_mem
[REGNO (ref
)];
475 if (reload_in_progress
)
476 base
= find_replacement (&XEXP (ref
, 0));
478 base
= XEXP (ref
, 0);
480 if (GET_CODE (base
) == PLUS
)
481 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
483 *paligned_mem
= gen_rtx (MEM
, SImode
,
484 plus_constant (base
, offset
& ~3));
485 MEM_IN_STRUCT_P (*paligned_mem
) = MEM_IN_STRUCT_P (ref
);
486 MEM_VOLATILE_P (*paligned_mem
) = MEM_VOLATILE_P (ref
);
487 RTX_UNCHANGING_P (*paligned_mem
) = RTX_UNCHANGING_P (ref
);
489 *pbitnum
= GEN_INT ((offset
& 3) * 8);
492 /* Similar, but just get the address. Handle the two reload cases. */
495 get_unaligned_address (ref
)
499 HOST_WIDE_INT offset
= 0;
501 if (GET_CODE (ref
) == SUBREG
)
503 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
504 if (BYTES_BIG_ENDIAN
)
505 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
506 - MIN (UNITS_PER_WORD
,
507 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
508 ref
= SUBREG_REG (ref
);
511 if (GET_CODE (ref
) == REG
)
512 ref
= reg_equiv_mem
[REGNO (ref
)];
514 if (reload_in_progress
)
515 base
= find_replacement (&XEXP (ref
, 0));
517 base
= XEXP (ref
, 0);
519 if (GET_CODE (base
) == PLUS
)
520 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
522 return plus_constant (base
, offset
);
525 /* Subfunction of the following function. Update the flags of any MEM
526 found in part of X. */
529 alpha_set_memflags_1 (x
, in_struct_p
, volatile_p
, unchanging_p
)
531 int in_struct_p
, volatile_p
, unchanging_p
;
535 switch (GET_CODE (x
))
539 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
540 alpha_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
545 alpha_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
550 alpha_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
552 alpha_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
,
557 MEM_IN_STRUCT_P (x
) = in_struct_p
;
558 MEM_VOLATILE_P (x
) = volatile_p
;
559 RTX_UNCHANGING_P (x
) = unchanging_p
;
564 /* Given INSN, which is either an INSN or a SEQUENCE generated to
565 perform a memory operation, look for any MEMs in either a SET_DEST or
566 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
567 REF into each of the MEMs found. If REF is not a MEM, don't do
571 alpha_set_memflags (insn
, ref
)
575 /* Note that it is always safe to get these flags, though they won't
576 be what we think if REF is not a MEM. */
577 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
578 int volatile_p
= MEM_VOLATILE_P (ref
);
579 int unchanging_p
= RTX_UNCHANGING_P (ref
);
581 if (GET_CODE (ref
) != MEM
582 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
585 alpha_set_memflags_1 (insn
, in_struct_p
, volatile_p
, unchanging_p
);
588 /* Try to output insns to set TARGET equal to the constant C if it can be
589 done in less than N insns. Returns 1 if it can be done and the
590 insns have been emitted. If it would take more than N insns, zero is
591 returned and no insns and emitted. */
594 alpha_emit_set_const (target
, c
, n
)
599 HOST_WIDE_INT
new = c
;
602 #if HOST_BITS_PER_WIDE_INT == 64
603 /* We are only called for SImode and DImode. If this is SImode, ensure that
604 we are sign extended to a full word. This does not make any sense when
605 cross-compiling on a narrow machine. */
607 if (GET_MODE (target
) == SImode
)
608 c
= (c
& 0xffffffff) - 2 * (c
& 0x80000000);
611 /* If this is a sign-extended 32-bit constant, we can do this in at most
612 three insns, so do it if we have enough insns left. We always have
613 a sign-extended 32-bit constant when compiling on a narrow machine. */
615 if (HOST_BITS_PER_WIDE_INT
!= 64
616 || c
>> 31 == -1 || c
>> 31 == 0)
618 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
619 HOST_WIDE_INT tmp1
= c
- low
;
621 = ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
622 HOST_WIDE_INT extra
= 0;
624 /* If HIGH will be interpreted as negative but the constant is
625 positive, we must adjust it to do two ldha insns. */
627 if ((high
& 0x8000) != 0 && c
>= 0)
631 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
634 if (c
== low
|| (low
== 0 && extra
== 0))
636 emit_move_insn (target
, GEN_INT (c
));
639 else if (n
>= 2 + (extra
!= 0))
641 emit_move_insn (target
, GEN_INT (low
));
643 emit_insn (gen_add2_insn (target
, GEN_INT (extra
<< 16)));
645 emit_insn (gen_add2_insn (target
, GEN_INT (high
<< 16)));
650 /* If we couldn't do it that way, try some other methods (that depend on
651 being able to compute in the target's word size). But if we have no
652 instructions left, don't bother. Also, don't even try if this is
653 SImode (in which case we should have already done something, but
654 do a sanity check here). */
656 if (n
== 1 || HOST_BITS_PER_WIDE_INT
< 64 || GET_MODE (target
) != DImode
)
659 /* First, see if can load a value into the target that is the same as the
660 constant except that all bytes that are 0 are changed to be 0xff. If we
661 can, then we can do a ZAPNOT to obtain the desired constant. */
663 for (i
= 0; i
< 64; i
+= 8)
664 if ((new & ((HOST_WIDE_INT
) 0xff << i
)) == 0)
665 new |= (HOST_WIDE_INT
) 0xff << i
;
667 if (alpha_emit_set_const (target
, new, n
- 1))
669 emit_insn (gen_anddi3 (target
, target
, GEN_INT (c
| ~ new)));
673 /* Find, see if we can load a related constant and then shift and possibly
674 negate it to get the constant we want. Try this once each increasing
677 for (i
= 1; i
< n
; i
++)
679 /* First try complementing. */
680 if (alpha_emit_set_const (target
, ~ c
, i
))
682 emit_insn (gen_one_cmpldi2 (target
, target
));
686 /* First try to form a constant and do a left shift. We can do this
687 if some low-order bits are zero; the exact_log2 call below tells
688 us that information. The bits we are shifting out could be any
689 value, but here we'll just try the 0- and sign-extended forms of
690 the constant. To try to increase the chance of having the same
691 constant in more than one insn, start at the highest number of
692 bits to shift, but try all possibilities in case a ZAPNOT will
695 if ((bits
= exact_log2 (c
& - c
)) > 0)
696 for (; bits
> 0; bits
--)
697 if (alpha_emit_set_const (target
, c
>> bits
, i
)
698 || alpha_emit_set_const (target
,
699 ((unsigned HOST_WIDE_INT
) c
) >> bits
,
702 emit_insn (gen_ashldi3 (target
, target
, GEN_INT (bits
)));
706 /* Now try high-order zero bits. Here we try the shifted-in bits as
707 all zero and all ones. */
709 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (c
) - 1) > 0)
710 for (; bits
> 0; bits
--)
711 if (alpha_emit_set_const (target
, c
<< bits
, i
)
712 || alpha_emit_set_const (target
,
714 | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
717 emit_insn (gen_lshrdi3 (target
, target
, GEN_INT (bits
)));
721 /* Now try high-order 1 bits. We get that with a sign-extension.
722 But one bit isn't enough here. */
724 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (~ c
) - 2) > 0)
725 for (; bits
> 0; bits
--)
726 if (alpha_emit_set_const (target
, c
<< bits
, i
)
727 || alpha_emit_set_const (target
,
729 | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
732 emit_insn (gen_ashrdi3 (target
, target
, GEN_INT (bits
)));
740 /* Adjust the cost of a scheduling dependency. Return the new cost of
741 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
744 alpha_adjust_cost (insn
, link
, dep_insn
, cost
)
752 /* If the dependence is an anti-dependence, there is no cost. For an
753 output dependence, there is sometimes a cost, but it doesn't seem
754 worth handling those few cases. */
756 if (REG_NOTE_KIND (link
) != 0)
759 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
760 we can sometimes lower the cost. */
762 if (recog_memoized (insn
) >= 0 && get_attr_type (insn
) == TYPE_ST
763 && (set
= single_set (dep_insn
)) != 0
764 && GET_CODE (PATTERN (insn
)) == SET
765 && rtx_equal_p (SET_DEST (set
), SET_SRC (PATTERN (insn
))))
766 switch (get_attr_type (dep_insn
))
769 /* No savings here. */
774 /* In these cases, we save one cycle. */
778 /* In all other cases, we save two cycles. */
779 return MAX (0, cost
- 4);
782 /* Another case that needs adjustment is an arithmetic or logical
783 operation. It's cost is usually one cycle, but we default it to
784 two in the MD file. The only case that it is actually two is
785 for the address in loads and stores. */
787 if (recog_memoized (dep_insn
) >= 0
788 && get_attr_type (dep_insn
) == TYPE_IADDLOG
)
789 switch (get_attr_type (insn
))
799 /* The final case is when a compare feeds into an integer branch. The cost
800 is only one cycle in that case. */
802 if (recog_memoized (dep_insn
) >= 0
803 && get_attr_type (dep_insn
) == TYPE_ICMP
804 && recog_memoized (insn
) >= 0
805 && get_attr_type (insn
) == TYPE_IBR
)
808 /* Otherwise, return the default cost. */
813 /* Print an operand. Recognize special options, documented below. */
816 print_operand (file
, x
, code
)
826 /* If this operand is the constant zero, write it as "$31". */
827 if (GET_CODE (x
) == REG
)
828 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
829 else if (x
== CONST0_RTX (GET_MODE (x
)))
830 fprintf (file
, "$31");
832 output_operand_lossage ("invalid %%r value");
837 /* Similar, but for floating-point. */
838 if (GET_CODE (x
) == REG
)
839 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
840 else if (x
== CONST0_RTX (GET_MODE (x
)))
841 fprintf (file
, "$f31");
843 output_operand_lossage ("invalid %%R value");
848 /* Write the 1's complement of a constant. */
849 if (GET_CODE (x
) != CONST_INT
)
850 output_operand_lossage ("invalid %%N value");
852 fprintf (file
, "%ld", ~ INTVAL (x
));
856 /* Write 1 << C, for a constant C. */
857 if (GET_CODE (x
) != CONST_INT
)
858 output_operand_lossage ("invalid %%P value");
860 fprintf (file
, "%ld", (HOST_WIDE_INT
) 1 << INTVAL (x
));
864 /* Write the high-order 16 bits of a constant, sign-extended. */
865 if (GET_CODE (x
) != CONST_INT
)
866 output_operand_lossage ("invalid %%h value");
868 fprintf (file
, "%ld", INTVAL (x
) >> 16);
872 /* Write the low-order 16 bits of a constant, sign-extended. */
873 if (GET_CODE (x
) != CONST_INT
)
874 output_operand_lossage ("invalid %%L value");
876 fprintf (file
, "%ld", (INTVAL (x
) & 0xffff) - 2 * (INTVAL (x
) & 0x8000));
880 /* Write mask for ZAP insn. */
881 if (GET_CODE (x
) == CONST_DOUBLE
)
883 HOST_WIDE_INT mask
= 0;
886 value
= CONST_DOUBLE_LOW (x
);
887 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
892 value
= CONST_DOUBLE_HIGH (x
);
893 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
896 mask
|= (1 << (i
+ sizeof (int)));
898 fprintf (file
, "%ld", mask
& 0xff);
901 else if (GET_CODE (x
) == CONST_INT
)
903 HOST_WIDE_INT mask
= 0, value
= INTVAL (x
);
905 for (i
= 0; i
< 8; i
++, value
>>= 8)
909 fprintf (file
, "%ld", mask
);
912 output_operand_lossage ("invalid %%m value");
916 /* 'b', 'w', or 'l' as the value of the constant. */
917 if (GET_CODE (x
) != CONST_INT
918 || (INTVAL (x
) != 8 && INTVAL (x
) != 16 && INTVAL (x
) != 32))
919 output_operand_lossage ("invalid %%M value");
922 INTVAL (x
) == 8 ? "b" : INTVAL (x
) == 16 ? "w" : "l");
926 /* Similar, except do it from the mask. */
927 if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xff)
929 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffff)
931 #if HOST_BITS_PER_WIDE_INT == 32
932 else if (GET_CODE (x
) == CONST_DOUBLE
933 && CONST_DOUBLE_HIGH (x
) == 0
934 && CONST_DOUBLE_LOW (x
) == -1)
937 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffffffff)
941 output_operand_lossage ("invalid %%U value");
945 /* Write the constant value divided by 8. */
946 if (GET_CODE (x
) != CONST_INT
947 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
948 && (INTVAL (x
) & 7) != 8)
949 output_operand_lossage ("invalid %%s value");
951 fprintf (file
, "%ld", INTVAL (x
) / 8);
955 /* Same, except compute (64 - c) / 8 */
957 if (GET_CODE (x
) != CONST_INT
958 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
959 && (INTVAL (x
) & 7) != 8)
960 output_operand_lossage ("invalid %%s value");
962 fprintf (file
, "%ld", (64 - INTVAL (x
)) / 8);
966 /* Write out comparison name. */
967 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
968 output_operand_lossage ("invalid %%C value");
970 if (GET_CODE (x
) == LEU
)
971 fprintf (file
, "ule");
972 else if (GET_CODE (x
) == LTU
)
973 fprintf (file
, "ult");
975 fprintf (file
, "%s", GET_RTX_NAME (GET_CODE (x
)));
979 /* Similar, but write reversed code. We can't get an unsigned code
981 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
982 output_operand_lossage ("invalid %%D value");
984 fprintf (file
, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x
))));
988 /* Write the divide or modulus operator. */
989 switch (GET_CODE (x
))
992 fprintf (file
, "div%s", GET_MODE (x
) == SImode
? "l" : "q");
995 fprintf (file
, "div%su", GET_MODE (x
) == SImode
? "l" : "q");
998 fprintf (file
, "rem%s", GET_MODE (x
) == SImode
? "l" : "q");
1001 fprintf (file
, "rem%su", GET_MODE (x
) == SImode
? "l" : "q");
1004 output_operand_lossage ("invalid %%E value");
1010 /* Write "_u" for unaligned access. */
1011 if (GET_CODE (x
) == MEM
&& GET_CODE (XEXP (x
, 0)) == AND
)
1012 fprintf (file
, "_u");
1016 if (GET_CODE (x
) == REG
)
1017 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1018 else if (GET_CODE (x
) == MEM
)
1019 output_address (XEXP (x
, 0));
1021 output_addr_const (file
, x
);
1025 output_operand_lossage ("invalid %%xn code");
1029 /* Do what is necessary for `va_start'. The argument is ignored;
1030 We look at the current function to determine if stdarg or varargs
1031 is used and fill in an initial va_list. A pointer to this constructor
1035 alpha_builtin_saveregs (arglist
)
1038 rtx block
, addr
, argsize
;
1039 tree fntype
= TREE_TYPE (current_function_decl
);
1040 int stdarg
= (TYPE_ARG_TYPES (fntype
) != 0
1041 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1042 != void_type_node
));
1044 /* Compute the current position into the args, taking into account
1045 both registers and memory. */
1047 argsize
= plus_constant (current_function_arg_offset_rtx
,
1048 current_function_args_info
* UNITS_PER_WORD
);
1050 /* Allocate the va_list constructor */
1051 block
= assign_stack_local (BLKmode
, 2 * UNITS_PER_WORD
, BITS_PER_WORD
);
1052 RTX_UNCHANGING_P (block
) = 1;
1053 RTX_UNCHANGING_P (XEXP (block
, 0)) = 1;
1055 /* Store the address of the first integer register in the
1056 __va_base member. */
1058 emit_move_insn (change_address (block
, DImode
, XEXP (block
, 0)),
1059 force_operand (plus_constant (virtual_incoming_args_rtx
,
1060 6 * UNITS_PER_WORD
),
1063 /* Store the argsize as the __va_offset member. */
1064 emit_move_insn (change_address (block
, Pmode
,
1065 plus_constant (XEXP (block
, 0),
1067 force_operand (argsize
, NULL_RTX
));
1069 /* Return the address of the va_list constructor, but don't put it in a
1070 register. Doing so would fail when not optimizing and produce worse
1071 code when optimizing. */
1072 return XEXP (block
, 0);
1075 /* This page contains routines that are used to determine what the function
1076 prologue and epilogue code will do and write them out. */
1078 /* Compute the size of the save area in the stack. */
1086 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1087 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
])
1090 /* If some registers were saved but not reg 26, reg 26 must also
1091 be saved, so leave space for it. */
1092 if (size
!= 0 && ! regs_ever_live
[26])
1098 /* Return 1 if this function can directly return via $26. */
1103 return (reload_completed
&& alpha_sa_size () == 0
1104 && get_frame_size () == 0
1105 && current_function_pretend_args_size
== 0);
1108 /* Write a version stamp. Don't write anything if we are running as a
1109 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1111 #ifndef CROSS_COMPILE
1116 alpha_write_verstamp (file
)
1122 fprintf (file
, "\t.verstamp %d %d ", MS_STAMP
, LS_STAMP
);
1123 for (p
= version_string
; *p
!= ' ' && *p
!= 0; p
++)
1124 fprintf (file
, "%c", *p
== '.' ? ' ' : *p
);
1125 fprintf (file
, "\n");
1129 /* Write code to add constant C to register number IN_REG (possibly 31)
1130 and put the result into OUT_REG. Write the code to FILE. */
1133 add_long_const (file
, c
, in_reg
, out_reg
)
1135 int in_reg
, out_reg
;
1138 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
1139 HOST_WIDE_INT tmp1
= c
- low
;
1140 HOST_WIDE_INT high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1141 HOST_WIDE_INT extra
= 0;
1143 /* We don't have code to write out constants larger than 32 bits. */
1144 #if HOST_BITS_PER_LONG_INT == 64
1145 if ((unsigned HOST_WIDE_INT
) c
>> 32 != 0)
1149 /* If HIGH will be interpreted as negative, we must adjust it to do two
1150 ldha insns. Note that we will never be building a negative constant
1157 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1162 if (low
>= 0 && low
< 255)
1163 fprintf (file
, "\taddq $%d,%d,$%d\n", in_reg
, low
, out_reg
);
1165 fprintf (file
, "\tlda $%d,%d($%d)\n", out_reg
, low
, in_reg
);
1171 fprintf (file
, "\tldah $%d,%d($%d)\n", out_reg
, extra
, in_reg
);
1176 fprintf (file
, "\tldah $%d,%d($%d)\n", out_reg
, high
, in_reg
);
1179 /* Write function prologue. */
1182 output_prolog (file
, size
)
1186 HOST_WIDE_INT frame_size
= ((size
+ current_function_outgoing_args_size
1187 + current_function_pretend_args_size
1188 + alpha_sa_size () + 15) & ~15);
1189 HOST_WIDE_INT reg_offset
= size
+ current_function_outgoing_args_size
;
1190 HOST_WIDE_INT start_reg_offset
= reg_offset
;
1191 HOST_WIDE_INT actual_start_reg_offset
= start_reg_offset
;
1193 int reg_offset_base_reg
= 30;
1194 unsigned reg_mask
= 0;
1197 /* Ecoff can handle multiple .file directives, put out file and lineno.
1198 We have to do that before the .ent directive as we cannot switch
1199 files within procedures with native ecoff because line numbers are
1200 linked to procedure descriptors.
1201 Outputting the lineno helps debugging of one line functions as they
1202 would otherwise get no line number at all. Please note that we would
1203 like to put out last_linenum from final.c, but it is not accesible. */
1205 if (write_symbols
== SDB_DEBUG
)
1207 ASM_OUTPUT_SOURCE_FILENAME (file
,
1208 DECL_SOURCE_FILE (current_function_decl
));
1209 if (debug_info_level
!= DINFO_LEVEL_TERSE
)
1210 ASM_OUTPUT_SOURCE_LINE (file
, DECL_SOURCE_LINE (current_function_decl
));
1213 /* The assembly language programmer's guide states that the second argument
1214 to the .ent directive, the lex_level, is ignored by the assembler,
1215 so we might as well omit it. */
1217 fprintf (file
, "\t.ent %s\n", alpha_function_name
);
1218 ASM_OUTPUT_LABEL (file
, alpha_function_name
);
1219 inside_function
= TRUE
;
1221 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1223 alpha_auto_offset
= -frame_size
+ current_function_pretend_args_size
;
1224 alpha_arg_offset
= -frame_size
+ 48;
1226 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1227 Even if we are a static function, we still need to do this in case
1228 our address is taken and passed to something like qsort. */
1230 alpha_function_needs_gp
= 0;
1231 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1232 if ((GET_CODE (insn
) == CALL_INSN
)
1233 || (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1234 && GET_CODE (PATTERN (insn
)) != USE
1235 && GET_CODE (PATTERN (insn
)) != CLOBBER
1236 && get_attr_type (insn
) == TYPE_LDSYM
))
1238 alpha_function_needs_gp
= 1;
1242 if (alpha_function_needs_gp
)
1243 fprintf (file
, "\tldgp $29,0($27)\n");
1245 /* Put a label after the GP load so we can enter the function at it. */
1246 fprintf (file
, "%s..ng:\n", alpha_function_name
);
1248 /* Adjust the stack by the frame size. If the frame size is > 4096
1249 bytes, we need to be sure we probe somewhere in the first and last
1250 4096 bytes (we can probably get away without the latter test) and
1251 every 8192 bytes in between. If the frame size is > 32768, we
1252 do this in a loop. Otherwise, we generate the explicit probe
1255 Note that we are only allowed to adjust sp once in the prologue. */
1257 if (frame_size
< 32768)
1259 if (frame_size
> 4096)
1264 fprintf (file
, "\tldq $%d,-%d($30)\n", regnum
++, probed
);
1266 while (probed
+ 8192 < frame_size
)
1267 fprintf (file
, "\tldq $%d,-%d($30)\n", regnum
++, probed
+= 8192);
1269 if (probed
+ 4096 < frame_size
)
1270 fprintf (file
, "\tldq $%d,-%d($30)\n", regnum
++, probed
+= 4096);
1276 if (frame_size
!= 0)
1277 fprintf (file
, "\tlda $30,-%d($30)\n", frame_size
);
1281 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1282 number of 8192 byte blocks to probe. We then probe each block
1283 in the loop and then set SP to the proper location. If the
1284 amount remaining is > 4096, we have to do one more probe. */
1286 HOST_WIDE_INT blocks
= (frame_size
+ 4096) / 8192;
1287 HOST_WIDE_INT leftover
= frame_size
+ 4096 - blocks
* 8192;
1289 add_long_const (file
, blocks
, 31, 5);
1291 fprintf (file
, "\tlda $4,4096($30)\n");
1292 fprintf (file
, "%s..sc:\n", alpha_function_name
);
1293 fprintf (file
, "\tldq $6,-8192($4)\n");
1294 fprintf (file
, "\tsubq $5,1,$5\n");
1295 fprintf (file
, "\tlda $4,-8192($4)\n");
1296 fprintf (file
, "\tbne $5,%s..sc\n", alpha_function_name
);
1297 fprintf (file
, "\tlda $30,-%d($4)\n", leftover
);
1299 if (leftover
> 4096)
1300 fprintf (file
, "\tldq $2,%d($30)\n", leftover
- 4096);
1303 /* Describe our frame. */
1304 fprintf (file
, "\t.frame $%d,%d,$26,%d\n",
1305 frame_pointer_needed
? FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
,
1306 frame_size
, current_function_pretend_args_size
);
1308 /* If reg_offset is "close enough" to 2**15 that one of the offsets would
1309 overflow a store instruction, compute the base of the register save
1311 if (reg_offset
>= 32768 - alpha_sa_size () && alpha_sa_size () != 0)
1313 add_long_const (file
, reg_offset
, 30, 28);
1314 reg_offset_base_reg
= 28;
1315 reg_offset
= start_reg_offset
= 0;
1318 /* Save register 26 if it is used or if any other register needs to
1320 if (regs_ever_live
[26] || alpha_sa_size () != 0)
1322 reg_mask
|= 1 << 26;
1323 fprintf (file
, "\tstq $26,%d($%d)\n", reg_offset
, reg_offset_base_reg
);
1327 /* Now save any other used integer registers required to be saved. */
1328 for (i
= 0; i
< 32; i
++)
1329 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
] && i
!= 26)
1332 fprintf (file
, "\tstq $%d,%d($%d)\n",
1333 i
, reg_offset
, reg_offset_base_reg
);
1337 /* Print the register mask and do floating-point saves. */
1339 fprintf (file
, "\t.mask 0x%x,%d\n", reg_mask
,
1340 actual_start_reg_offset
- frame_size
);
1342 start_reg_offset
= reg_offset
;
1345 for (i
= 0; i
< 32; i
++)
1346 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1347 && regs_ever_live
[i
+ 32])
1350 fprintf (file
, "\tstt $f%d,%d($%d)\n",
1351 i
, reg_offset
, reg_offset_base_reg
);
1355 /* Print the floating-point mask, if we've saved any fp register. */
1357 fprintf (file
, "\t.fmask 0x%x,%d\n", reg_mask
, actual_start_reg_offset
);
1359 /* If we need a frame pointer, set it from the stack pointer. Note that
1360 this must always be the last instruction in the prologue. */
1361 if (frame_pointer_needed
)
1362 fprintf (file
, "\tbis $30,$30,$15\n");
1364 /* End the prologue and say if we used gp. */
1365 fprintf (file
, "\t.prologue %d\n", alpha_function_needs_gp
);
1368 /* Write function epilogue. */
1371 output_epilog (file
, size
)
1375 rtx insn
= get_last_insn ();
1376 HOST_WIDE_INT frame_size
= ((size
+ current_function_outgoing_args_size
1377 + current_function_pretend_args_size
1378 + alpha_sa_size () + 15) & ~15);
1379 HOST_WIDE_INT reg_offset
= size
+ current_function_outgoing_args_size
;
1380 HOST_WIDE_INT frame_size_from_reg_save
= frame_size
- reg_offset
;
1381 int reg_offset_base_reg
= 30;
1384 /* If the last insn was a BARRIER, we don't have to write anything except
1385 the .end pseudo-op. */
1386 if (GET_CODE (insn
) == NOTE
)
1387 insn
= prev_nonnote_insn (insn
);
1388 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1392 /* If we have a frame pointer, restore SP from it. */
1393 if (frame_pointer_needed
)
1394 fprintf (file
, "\tbis $15,$15,$30\n");
1396 /* If the register save area is out of range, put its address into
1398 if (reg_offset
>= 32768 - alpha_sa_size () && alpha_sa_size () != 0)
1400 add_long_const (file
, reg_offset
, 30, 28);
1401 reg_offset_base_reg
= 28;
1405 /* Restore all the registers, starting with the return address
1407 if (regs_ever_live
[26] || alpha_sa_size () != 0)
1409 fprintf (file
, "\tldq $26,%d($%d)\n",
1410 reg_offset
, reg_offset_base_reg
);
1414 /* Now restore any other used integer registers that that we saved,
1415 except for FP if it is being used as FP, since it must be
1418 for (i
= 0; i
< 32; i
++)
1419 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
]
1422 if (i
== FRAME_POINTER_REGNUM
&& frame_pointer_needed
)
1423 fp_offset
= reg_offset
;
1425 fprintf (file
, "\tldq $%d,%d($%d)\n",
1426 i
, reg_offset
, reg_offset_base_reg
);
1430 for (i
= 0; i
< 32; i
++)
1431 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1432 && regs_ever_live
[i
+ 32])
1434 fprintf (file
, "\tldt $f%d,%d($%d)\n",
1435 i
, reg_offset
, reg_offset_base_reg
);
1439 /* If the stack size is large, compute the size of the stack into
1440 a register because the old FP restore, stack pointer adjust,
1441 and return are required to be consecutive instructions.
1442 However, if the new stack pointer can be computed by adding the
1443 a constant to the start of the register save area, we can do
1445 if (frame_size
> 32767
1446 && ! (reg_offset_base_reg
!= 30
1447 && frame_size_from_reg_save
< 32768))
1448 add_long_const (file
, frame_size
, 31, 1);
1450 /* If we needed a frame pointer and we have to restore it, do it
1451 now. This must be done in one instruction immediately
1452 before the SP update. */
1453 if (frame_pointer_needed
&& regs_ever_live
[FRAME_POINTER_REGNUM
])
1454 fprintf (file
, "\tldq $15,%d($%d)\n", fp_offset
, reg_offset_base_reg
);
1456 /* Now update the stack pointer, if needed. This must be done in
1457 one, stylized, instruction. */
1458 if (frame_size
> 32768)
1460 if (reg_offset_base_reg
!= 30
1461 && frame_size_from_reg_save
< 32768)
1463 if (frame_size_from_reg_save
< 255)
1464 fprintf (file
, "\taddq $%d,%d,$30\n",
1465 reg_offset_base_reg
, frame_size_from_reg_save
);
1467 fprintf (file
, "\tlda %30,%d($%d)\n",
1468 frame_size_from_reg_save
, reg_offset_base_reg
);
1471 fprintf (file
, "\taddq $1,$30,$30\n");
1473 else if (frame_size
!= 0)
1474 fprintf (file
, "\tlda $30,%d($30)\n", frame_size
);
1476 /* Finally return to the caller. */
1477 fprintf (file
, "\tret $31,($26),1\n");
1480 /* End the function. */
1481 fprintf (file
, "\t.end %s\n", alpha_function_name
);
1482 inside_function
= FALSE
;
1484 /* Show that we know this function if it is called again. */
1485 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl
), 0)) = 1;
1488 /* Debugging support. */
1492 /* Count the number of sdb related labels are generated (to find block
1493 start and end boundaries). */
1495 int sdb_label_count
= 0;
1497 /* Next label # for each statement. */
1499 static int sym_lineno
= 0;
1501 /* Count the number of .file directives, so that .loc is up to date. */
1503 static int num_source_filenames
= 0;
1505 /* Name of the file containing the current function. */
1507 static char *current_function_file
= "";
1509 /* Offsets to alpha virtual arg/local debugging pointers. */
1511 long alpha_arg_offset
;
1512 long alpha_auto_offset
;
1514 /* Emit a new filename to a stream. */
1517 alpha_output_filename (stream
, name
)
1521 static int first_time
= TRUE
;
1522 char ltext_label_name
[100];
1527 ++num_source_filenames
;
1528 current_function_file
= name
;
1529 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1530 output_quoted_string (stream
, name
);
1531 fprintf (stream
, "\n");
1532 if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1533 fprintf (stream
, "\t#@stabs\n");
1536 else if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1538 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name
, "Ltext", 0);
1539 fprintf (stream
, "%s ", ASM_STABS_OP
);
1540 output_quoted_string (stream
, name
);
1541 fprintf (stream
, ",%d,0,0,%s\n", N_SOL
, <ext_label_name
[1]);
1544 else if (name
!= current_function_file
1545 && strcmp (name
, current_function_file
) != 0)
1547 if (inside_function
&& ! TARGET_GAS
)
1548 fprintf (stream
, "\t#.file\t%d ", num_source_filenames
);
1551 ++num_source_filenames
;
1552 current_function_file
= name
;
1553 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1556 output_quoted_string (stream
, name
);
1557 fprintf (stream
, "\n");
1561 /* Emit a linenumber to a stream. */
1564 alpha_output_lineno (stream
, line
)
1568 if (! TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1570 /* mips-tfile doesn't understand .stabd directives. */
1572 fprintf (stream
, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1573 sym_lineno
, ASM_STABN_OP
, N_SLINE
, line
, sym_lineno
);
1576 fprintf (stream
, "\n\t.loc\t%d %d\n", num_source_filenames
, line
);