1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
41 /* Save information from a "cmpxx" operation until the branch or scc is
44 rtx alpha_compare_op0
, alpha_compare_op1
;
45 int alpha_compare_fp_p
;
47 /* Save the name of the current function as used by the assembler. This
48 is used by the epilogue. */
50 char *alpha_function_name
;
52 /* Non-zero if inside of a function, because the Alpha asm can't
53 handle .files inside of functions. */
55 static int inside_function
= FALSE
;
57 /* Nonzero if the current function needs gp. */
59 int alpha_function_needs_gp
;
61 extern char *version_string
;
62 extern int rtx_equal_function_value_matters
;
64 /* Declarations of static functions. */
65 static void alpha_set_memflags_1
PROTO((rtx
, int, int, int));
66 static void add_long_const
PROTO((FILE *, HOST_WIDE_INT
, int, int, int));
68 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
76 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
78 if ((value
& 0xff) != 0 && (value
& 0xff) != 0xff)
84 /* Returns 1 if OP is either the constant zero or a register. If a
85 register, it must be in the proper mode unless MODE is VOIDmode. */
88 reg_or_0_operand (op
, mode
)
90 enum machine_mode mode
;
92 return op
== const0_rtx
|| register_operand (op
, mode
);
95 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
99 reg_or_6bit_operand (op
, mode
)
101 enum machine_mode mode
;
103 return ((GET_CODE (op
) == CONST_INT
104 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64)
105 || register_operand (op
, mode
));
109 /* Return 1 if OP is an 8-bit constant or any register. */
112 reg_or_8bit_operand (op
, mode
)
114 enum machine_mode mode
;
116 return ((GET_CODE (op
) == CONST_INT
117 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100)
118 || register_operand (op
, mode
));
121 /* Return 1 if OP is an 8-bit constant. */
124 cint8_operand (op
, mode
)
126 enum machine_mode mode
;
128 return (GET_CODE (op
) == CONST_INT
129 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100);
132 /* Return 1 if the operand is a valid second operand to an add insn. */
135 add_operand (op
, mode
)
137 enum machine_mode mode
;
139 if (GET_CODE (op
) == CONST_INT
)
140 return (CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K')
141 || CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L')
142 || CONST_OK_FOR_LETTER_P (INTVAL (op
), 'O'));
144 return register_operand (op
, mode
);
147 /* Return 1 if the operand is a valid second operand to a sign-extending
151 sext_add_operand (op
, mode
)
153 enum machine_mode mode
;
155 if (GET_CODE (op
) == CONST_INT
)
156 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 255
157 || (unsigned HOST_WIDE_INT
) (- INTVAL (op
)) < 255);
159 return register_operand (op
, mode
);
162 /* Return 1 if OP is the constant 4 or 8. */
165 const48_operand (op
, mode
)
167 enum machine_mode mode
;
169 return (GET_CODE (op
) == CONST_INT
170 && (INTVAL (op
) == 4 || INTVAL (op
) == 8));
173 /* Return 1 if OP is a valid first operand to an AND insn. */
176 and_operand (op
, mode
)
178 enum machine_mode mode
;
180 if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == VOIDmode
)
181 return (zap_mask (CONST_DOUBLE_LOW (op
))
182 && zap_mask (CONST_DOUBLE_HIGH (op
)));
184 if (GET_CODE (op
) == CONST_INT
)
185 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
186 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100
187 || zap_mask (INTVAL (op
)));
189 return register_operand (op
, mode
);
192 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
195 or_operand (op
, mode
)
197 enum machine_mode mode
;
199 if (GET_CODE (op
) == CONST_INT
)
200 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
201 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100);
203 return register_operand (op
, mode
);
206 /* Return 1 if OP is a constant that is the width, in bits, of an integral
207 mode smaller than DImode. */
210 mode_width_operand (op
, mode
)
212 enum machine_mode mode
;
214 return (GET_CODE (op
) == CONST_INT
215 && (INTVAL (op
) == 8 || INTVAL (op
) == 16 || INTVAL (op
) == 32));
218 /* Return 1 if OP is a constant that is the width of an integral machine mode
219 smaller than an integer. */
222 mode_mask_operand (op
, mode
)
224 enum machine_mode mode
;
226 #if HOST_BITS_PER_WIDE_INT == 32
227 if (GET_CODE (op
) == CONST_DOUBLE
)
228 return CONST_DOUBLE_HIGH (op
) == 0 && CONST_DOUBLE_LOW (op
) == -1;
231 return (GET_CODE (op
) == CONST_INT
232 && (INTVAL (op
) == 0xff
233 || INTVAL (op
) == 0xffff
234 #if HOST_BITS_PER_WIDE_INT == 64
235 || INTVAL (op
) == 0xffffffff
240 /* Return 1 if OP is a multiple of 8 less than 64. */
243 mul8_operand (op
, mode
)
245 enum machine_mode mode
;
247 return (GET_CODE (op
) == CONST_INT
248 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64
249 && (INTVAL (op
) & 7) == 0);
252 /* Return 1 if OP is the constant zero in floating-point. */
255 fp0_operand (op
, mode
)
257 enum machine_mode mode
;
259 return (GET_MODE (op
) == mode
260 && GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
));
263 /* Return 1 if OP is the floating-point constant zero or a register. */
266 reg_or_fp0_operand (op
, mode
)
268 enum machine_mode mode
;
270 return fp0_operand (op
, mode
) || register_operand (op
, mode
);
273 /* Return 1 if OP is a register or a constant integer. */
277 reg_or_cint_operand (op
, mode
)
279 enum machine_mode mode
;
281 return GET_CODE (op
) == CONST_INT
|| register_operand (op
, mode
);
284 /* Return 1 if OP is something that can be reloaded into a register;
285 if it is a MEM, it need not be valid. */
288 some_operand (op
, mode
)
290 enum machine_mode mode
;
292 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
295 switch (GET_CODE (op
))
297 case REG
: case MEM
: case CONST_DOUBLE
:
298 case CONST_INT
: case LABEL_REF
: case SYMBOL_REF
: case CONST
:
302 return some_operand (SUBREG_REG (op
), VOIDmode
);
308 /* Return 1 if OP is a valid operand for the source of a move insn. */
311 input_operand (op
, mode
)
313 enum machine_mode mode
;
315 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
318 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& GET_MODE (op
) != mode
)
321 switch (GET_CODE (op
))
326 /* This handles both the Windows/NT and OSF cases. */
327 return mode
== ptr_mode
|| mode
== DImode
;
333 if (register_operand (op
, mode
))
335 /* ... fall through ... */
337 return mode
!= HImode
&& mode
!= QImode
&& general_operand (op
, mode
);
340 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
343 return mode
== QImode
|| mode
== HImode
|| add_operand (op
, mode
);
349 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
353 current_file_function_operand (op
, mode
)
355 enum machine_mode mode
;
357 return (GET_CODE (op
) == SYMBOL_REF
358 && ! profile_flag
&& ! profile_block_flag
359 && (SYMBOL_REF_FLAG (op
)
360 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
363 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
366 call_operand (op
, mode
)
368 enum machine_mode mode
;
373 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == REG
);
376 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
377 comparisons are valid in which insn. */
380 alpha_comparison_operator (op
, mode
)
382 enum machine_mode mode
;
384 enum rtx_code code
= GET_CODE (op
);
386 if (mode
!= GET_MODE (op
) || GET_RTX_CLASS (code
) != '<')
389 return (code
== EQ
|| code
== LE
|| code
== LT
390 || (mode
== DImode
&& (code
== LEU
|| code
== LTU
)));
393 /* Return 1 if OP is a signed comparison operation. */
396 signed_comparison_operator (op
, mode
)
398 enum machine_mode mode
;
400 switch (GET_CODE (op
))
402 case EQ
: case NE
: case LE
: case LT
: case GE
: case GT
:
409 /* Return 1 if this is a divide or modulus operator. */
412 divmod_operator (op
, mode
)
414 enum machine_mode mode
;
416 switch (GET_CODE (op
))
418 case DIV
: case MOD
: case UDIV
: case UMOD
:
425 /* Return 1 if this memory address is a known aligned register plus
426 a constant. It must be a valid address. This means that we can do
427 this as an aligned reference plus some offset.
429 Take into account what reload will do.
431 We could say that out-of-range stack slots are alignable, but that would
432 complicate get_aligned_mem and it isn't worth the trouble since few
433 functions have large stack space. */
436 aligned_memory_operand (op
, mode
)
438 enum machine_mode mode
;
440 if (GET_CODE (op
) == SUBREG
)
442 if (GET_MODE (op
) != mode
)
444 op
= SUBREG_REG (op
);
445 mode
= GET_MODE (op
);
448 if (reload_in_progress
&& GET_CODE (op
) == REG
449 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
450 op
= reg_equiv_mem
[REGNO (op
)];
452 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
453 || ! memory_address_p (mode
, XEXP (op
, 0)))
458 if (GET_CODE (op
) == PLUS
)
461 return (GET_CODE (op
) == REG
462 && (REGNO (op
) == STACK_POINTER_REGNUM
463 || op
== hard_frame_pointer_rtx
464 || (REGNO (op
) >= FIRST_VIRTUAL_REGISTER
465 && REGNO (op
) <= LAST_VIRTUAL_REGISTER
)));
468 /* Similar, but return 1 if OP is a MEM which is not alignable. */
471 unaligned_memory_operand (op
, mode
)
473 enum machine_mode mode
;
475 if (GET_CODE (op
) == SUBREG
)
477 if (GET_MODE (op
) != mode
)
479 op
= SUBREG_REG (op
);
480 mode
= GET_MODE (op
);
483 if (reload_in_progress
&& GET_CODE (op
) == REG
484 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
485 op
= reg_equiv_mem
[REGNO (op
)];
487 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
)
492 if (! memory_address_p (mode
, op
))
495 if (GET_CODE (op
) == PLUS
)
498 return (GET_CODE (op
) != REG
499 || (REGNO (op
) != STACK_POINTER_REGNUM
500 && op
!= hard_frame_pointer_rtx
501 && (REGNO (op
) < FIRST_VIRTUAL_REGISTER
502 || REGNO (op
) > LAST_VIRTUAL_REGISTER
)));
505 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
508 any_memory_operand (op
, mode
)
510 enum machine_mode mode
;
512 return (GET_CODE (op
) == MEM
513 || (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
514 || (reload_in_progress
&& GET_CODE (op
) == REG
515 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
516 || (reload_in_progress
&& GET_CODE (op
) == SUBREG
517 && GET_CODE (SUBREG_REG (op
)) == REG
518 && REGNO (SUBREG_REG (op
)) >= FIRST_PSEUDO_REGISTER
));
521 /* REF is an alignable memory location. Place an aligned SImode
522 reference into *PALIGNED_MEM and the number of bits to shift into
526 get_aligned_mem (ref
, paligned_mem
, pbitnum
)
528 rtx
*paligned_mem
, *pbitnum
;
531 HOST_WIDE_INT offset
= 0;
533 if (GET_CODE (ref
) == SUBREG
)
535 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
536 if (BYTES_BIG_ENDIAN
)
537 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
538 - MIN (UNITS_PER_WORD
,
539 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
540 ref
= SUBREG_REG (ref
);
543 if (GET_CODE (ref
) == REG
)
544 ref
= reg_equiv_mem
[REGNO (ref
)];
546 if (reload_in_progress
)
547 base
= find_replacement (&XEXP (ref
, 0));
549 base
= XEXP (ref
, 0);
551 if (GET_CODE (base
) == PLUS
)
552 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
554 *paligned_mem
= gen_rtx (MEM
, SImode
,
555 plus_constant (base
, offset
& ~3));
556 MEM_IN_STRUCT_P (*paligned_mem
) = MEM_IN_STRUCT_P (ref
);
557 MEM_VOLATILE_P (*paligned_mem
) = MEM_VOLATILE_P (ref
);
558 RTX_UNCHANGING_P (*paligned_mem
) = RTX_UNCHANGING_P (ref
);
560 *pbitnum
= GEN_INT ((offset
& 3) * 8);
563 /* Similar, but just get the address. Handle the two reload cases. */
566 get_unaligned_address (ref
)
570 HOST_WIDE_INT offset
= 0;
572 if (GET_CODE (ref
) == SUBREG
)
574 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
575 if (BYTES_BIG_ENDIAN
)
576 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
577 - MIN (UNITS_PER_WORD
,
578 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
579 ref
= SUBREG_REG (ref
);
582 if (GET_CODE (ref
) == REG
)
583 ref
= reg_equiv_mem
[REGNO (ref
)];
585 if (reload_in_progress
)
586 base
= find_replacement (&XEXP (ref
, 0));
588 base
= XEXP (ref
, 0);
590 if (GET_CODE (base
) == PLUS
)
591 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
593 return plus_constant (base
, offset
);
596 /* Subfunction of the following function. Update the flags of any MEM
597 found in part of X. */
600 alpha_set_memflags_1 (x
, in_struct_p
, volatile_p
, unchanging_p
)
602 int in_struct_p
, volatile_p
, unchanging_p
;
606 switch (GET_CODE (x
))
610 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
611 alpha_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
616 alpha_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
621 alpha_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
623 alpha_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
,
628 MEM_IN_STRUCT_P (x
) = in_struct_p
;
629 MEM_VOLATILE_P (x
) = volatile_p
;
630 RTX_UNCHANGING_P (x
) = unchanging_p
;
635 /* Given INSN, which is either an INSN or a SEQUENCE generated to
636 perform a memory operation, look for any MEMs in either a SET_DEST or
637 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
638 REF into each of the MEMs found. If REF is not a MEM, don't do
642 alpha_set_memflags (insn
, ref
)
646 /* Note that it is always safe to get these flags, though they won't
647 be what we think if REF is not a MEM. */
648 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
649 int volatile_p
= MEM_VOLATILE_P (ref
);
650 int unchanging_p
= RTX_UNCHANGING_P (ref
);
652 if (GET_CODE (ref
) != MEM
653 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
656 alpha_set_memflags_1 (insn
, in_struct_p
, volatile_p
, unchanging_p
);
659 /* Try to output insns to set TARGET equal to the constant C if it can be
660 done in less than N insns. Do all computations in MODE. Returns the place
661 where the output has been placed if it can be done and the insns have been
662 emitted. If it would take more than N insns, zero is returned and no
663 insns and emitted. */
666 alpha_emit_set_const (target
, mode
, c
, n
)
668 enum machine_mode mode
;
672 HOST_WIDE_INT
new = c
;
674 /* Use a pseudo if highly optimizing and still generating RTL. */
676 = (flag_expensive_optimizations
&& rtx_equal_function_value_matters
680 #if HOST_BITS_PER_WIDE_INT == 64
681 /* We are only called for SImode and DImode. If this is SImode, ensure that
682 we are sign extended to a full word. This does not make any sense when
683 cross-compiling on a narrow machine. */
686 c
= (c
& 0xffffffff) - 2 * (c
& 0x80000000);
689 /* If this is a sign-extended 32-bit constant, we can do this in at most
690 three insns, so do it if we have enough insns left. We always have
691 a sign-extended 32-bit constant when compiling on a narrow machine.
692 Note that we cannot handle the constant 0x80000000. */
694 if ((HOST_BITS_PER_WIDE_INT
!= 64
695 || c
>> 31 == -1 || c
>> 31 == 0)
698 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
699 HOST_WIDE_INT tmp1
= c
- low
;
701 = ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
702 HOST_WIDE_INT extra
= 0;
704 /* If HIGH will be interpreted as negative but the constant is
705 positive, we must adjust it to do two ldha insns. */
707 if ((high
& 0x8000) != 0 && c
>= 0)
711 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
714 if (c
== low
|| (low
== 0 && extra
== 0))
715 return copy_to_suggested_reg (GEN_INT (c
), target
, mode
);
716 else if (n
>= 2 + (extra
!= 0)
717 /* We can't do this when SImode if HIGH required adjustment.
718 This is because the code relies on an implicit overflow
719 which is invisible to the RTL. We can thus get incorrect
720 code if the two ldah instructions are combined. */
721 && ! (mode
== SImode
&& extra
!= 0))
723 temp
= copy_to_suggested_reg (GEN_INT (low
), subtarget
, mode
);
726 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (extra
<< 16),
727 subtarget
, 0, OPTAB_WIDEN
);
729 return expand_binop (mode
, add_optab
, temp
, GEN_INT (high
<< 16),
730 target
, 0, OPTAB_WIDEN
);
734 /* If we couldn't do it that way, try some other methods. But if we have
735 no instructions left, don't bother. Likewise, if this is SImode and
736 we can't make pseudos, we can't do anything since the expand_binop
737 and expand_unop calls will widen and try to make pseudos. */
740 || (mode
== SImode
&& ! rtx_equal_function_value_matters
))
743 #if HOST_BITS_PER_WIDE_INT == 64
744 /* First, see if can load a value into the target that is the same as the
745 constant except that all bytes that are 0 are changed to be 0xff. If we
746 can, then we can do a ZAPNOT to obtain the desired constant. */
748 for (i
= 0; i
< 64; i
+= 8)
749 if ((new & ((HOST_WIDE_INT
) 0xff << i
)) == 0)
750 new |= (HOST_WIDE_INT
) 0xff << i
;
752 /* We are only called for SImode and DImode. If this is SImode, ensure that
753 we are sign extended to a full word. */
756 new = (new & 0xffffffff) - 2 * (new & 0x80000000);
759 && (temp
= alpha_emit_set_const (subtarget
, mode
, new, n
- 1)) != 0)
760 return expand_binop (mode
, and_optab
, temp
, GEN_INT (c
| ~ new),
761 target
, 0, OPTAB_WIDEN
);
764 /* Next, see if we can load a related constant and then shift and possibly
765 negate it to get the constant we want. Try this once each increasing
768 for (i
= 1; i
< n
; i
++)
770 /* First try complementing. */
771 if ((temp
= alpha_emit_set_const (subtarget
, mode
, ~ c
, i
)) != 0)
772 return expand_unop (mode
, one_cmpl_optab
, temp
, target
, 0);
774 /* Next try to form a constant and do a left shift. We can do this
775 if some low-order bits are zero; the exact_log2 call below tells
776 us that information. The bits we are shifting out could be any
777 value, but here we'll just try the 0- and sign-extended forms of
778 the constant. To try to increase the chance of having the same
779 constant in more than one insn, start at the highest number of
780 bits to shift, but try all possibilities in case a ZAPNOT will
783 if ((bits
= exact_log2 (c
& - c
)) > 0)
784 for (; bits
> 0; bits
--)
785 if ((temp
= (alpha_emit_set_const
787 (unsigned HOST_WIDE_INT
) c
>> bits
, i
))) != 0
788 || ((temp
= (alpha_emit_set_const
790 ((unsigned HOST_WIDE_INT
) c
) >> bits
, i
)))
792 return expand_binop (mode
, ashl_optab
, temp
, GEN_INT (bits
),
793 target
, 0, OPTAB_WIDEN
);
795 /* Now try high-order zero bits. Here we try the shifted-in bits as
796 all zero and all ones. Be careful to avoid shifting outside the
797 mode and to avoid shifting outside the host wide int size. */
799 if ((bits
= (MIN (HOST_BITS_PER_WIDE_INT
, GET_MODE_SIZE (mode
) * 8)
800 - floor_log2 (c
) - 1)) > 0)
801 for (; bits
> 0; bits
--)
802 if ((temp
= alpha_emit_set_const (subtarget
, mode
,
804 || ((temp
= (alpha_emit_set_const
806 ((c
<< bits
) | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
809 return expand_binop (mode
, lshr_optab
, temp
, GEN_INT (bits
),
810 target
, 1, OPTAB_WIDEN
);
812 /* Now try high-order 1 bits. We get that with a sign-extension.
813 But one bit isn't enough here. Be careful to avoid shifting outside
814 the mode and to avoid shifting outside the host wide int size. */
816 if ((bits
= (MIN (HOST_BITS_PER_WIDE_INT
, GET_MODE_SIZE (mode
) * 8)
817 - floor_log2 (~ c
) - 2)) > 0)
818 for (; bits
> 0; bits
--)
819 if ((temp
= alpha_emit_set_const (subtarget
, mode
,
821 || ((temp
= (alpha_emit_set_const
823 ((c
<< bits
) | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
826 return expand_binop (mode
, ashr_optab
, temp
, GEN_INT (bits
),
827 target
, 0, OPTAB_WIDEN
);
833 /* Adjust the cost of a scheduling dependency. Return the new cost of
834 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
837 alpha_adjust_cost (insn
, link
, dep_insn
, cost
)
845 /* If the dependence is an anti-dependence, there is no cost. For an
846 output dependence, there is sometimes a cost, but it doesn't seem
847 worth handling those few cases. */
849 if (REG_NOTE_KIND (link
) != 0)
852 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
853 we can sometimes lower the cost. */
855 if (recog_memoized (insn
) >= 0 && get_attr_type (insn
) == TYPE_ST
856 && (set
= single_set (dep_insn
)) != 0
857 && GET_CODE (PATTERN (insn
)) == SET
858 && rtx_equal_p (SET_DEST (set
), SET_SRC (PATTERN (insn
))))
859 switch (get_attr_type (dep_insn
))
862 /* No savings here. */
867 /* In these cases, we save one cycle. */
871 /* In all other cases, we save two cycles. */
872 return MAX (0, cost
- 4);
875 /* Another case that needs adjustment is an arithmetic or logical
876 operation. It's cost is usually one cycle, but we default it to
877 two in the MD file. The only case that it is actually two is
878 for the address in loads and stores. */
880 if (recog_memoized (dep_insn
) >= 0
881 && get_attr_type (dep_insn
) == TYPE_IADDLOG
)
882 switch (get_attr_type (insn
))
892 /* The final case is when a compare feeds into an integer branch. The cost
893 is only one cycle in that case. */
895 if (recog_memoized (dep_insn
) >= 0
896 && get_attr_type (dep_insn
) == TYPE_ICMP
897 && recog_memoized (insn
) >= 0
898 && get_attr_type (insn
) == TYPE_IBR
)
901 /* Otherwise, return the default cost. */
906 /* Print an operand. Recognize special options, documented below. */
909 print_operand (file
, x
, code
)
919 /* If this operand is the constant zero, write it as "$31". */
920 if (GET_CODE (x
) == REG
)
921 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
922 else if (x
== CONST0_RTX (GET_MODE (x
)))
923 fprintf (file
, "$31");
925 output_operand_lossage ("invalid %%r value");
930 /* Similar, but for floating-point. */
931 if (GET_CODE (x
) == REG
)
932 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
933 else if (x
== CONST0_RTX (GET_MODE (x
)))
934 fprintf (file
, "$f31");
936 output_operand_lossage ("invalid %%R value");
941 /* Write the 1's complement of a constant. */
942 if (GET_CODE (x
) != CONST_INT
)
943 output_operand_lossage ("invalid %%N value");
945 fprintf (file
, "%ld", ~ INTVAL (x
));
949 /* Write 1 << C, for a constant C. */
950 if (GET_CODE (x
) != CONST_INT
)
951 output_operand_lossage ("invalid %%P value");
953 fprintf (file
, "%ld", (HOST_WIDE_INT
) 1 << INTVAL (x
));
957 /* Write the high-order 16 bits of a constant, sign-extended. */
958 if (GET_CODE (x
) != CONST_INT
)
959 output_operand_lossage ("invalid %%h value");
961 fprintf (file
, "%ld", INTVAL (x
) >> 16);
965 /* Write the low-order 16 bits of a constant, sign-extended. */
966 if (GET_CODE (x
) != CONST_INT
)
967 output_operand_lossage ("invalid %%L value");
969 fprintf (file
, "%ld", (INTVAL (x
) & 0xffff) - 2 * (INTVAL (x
) & 0x8000));
973 /* Write mask for ZAP insn. */
974 if (GET_CODE (x
) == CONST_DOUBLE
)
976 HOST_WIDE_INT mask
= 0;
979 value
= CONST_DOUBLE_LOW (x
);
980 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
985 value
= CONST_DOUBLE_HIGH (x
);
986 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
989 mask
|= (1 << (i
+ sizeof (int)));
991 fprintf (file
, "%ld", mask
& 0xff);
994 else if (GET_CODE (x
) == CONST_INT
)
996 HOST_WIDE_INT mask
= 0, value
= INTVAL (x
);
998 for (i
= 0; i
< 8; i
++, value
>>= 8)
1002 fprintf (file
, "%ld", mask
);
1005 output_operand_lossage ("invalid %%m value");
1009 /* 'b', 'w', or 'l' as the value of the constant. */
1010 if (GET_CODE (x
) != CONST_INT
1011 || (INTVAL (x
) != 8 && INTVAL (x
) != 16 && INTVAL (x
) != 32))
1012 output_operand_lossage ("invalid %%M value");
1014 fprintf (file
, "%s",
1015 INTVAL (x
) == 8 ? "b" : INTVAL (x
) == 16 ? "w" : "l");
1019 /* Similar, except do it from the mask. */
1020 if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xff)
1021 fprintf (file
, "b");
1022 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffff)
1023 fprintf (file
, "w");
1024 #if HOST_BITS_PER_WIDE_INT == 32
1025 else if (GET_CODE (x
) == CONST_DOUBLE
1026 && CONST_DOUBLE_HIGH (x
) == 0
1027 && CONST_DOUBLE_LOW (x
) == -1)
1028 fprintf (file
, "l");
1030 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffffffff)
1031 fprintf (file
, "l");
1034 output_operand_lossage ("invalid %%U value");
1038 /* Write the constant value divided by 8. */
1039 if (GET_CODE (x
) != CONST_INT
1040 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
1041 && (INTVAL (x
) & 7) != 8)
1042 output_operand_lossage ("invalid %%s value");
1044 fprintf (file
, "%ld", INTVAL (x
) / 8);
1048 /* Same, except compute (64 - c) / 8 */
1050 if (GET_CODE (x
) != CONST_INT
1051 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
1052 && (INTVAL (x
) & 7) != 8)
1053 output_operand_lossage ("invalid %%s value");
1055 fprintf (file
, "%ld", (64 - INTVAL (x
)) / 8);
1059 /* Write out comparison name. */
1060 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1061 output_operand_lossage ("invalid %%C value");
1063 if (GET_CODE (x
) == LEU
)
1064 fprintf (file
, "ule");
1065 else if (GET_CODE (x
) == LTU
)
1066 fprintf (file
, "ult");
1068 fprintf (file
, "%s", GET_RTX_NAME (GET_CODE (x
)));
1072 /* Similar, but write reversed code. We can't get an unsigned code
1074 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1075 output_operand_lossage ("invalid %%D value");
1077 fprintf (file
, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x
))));
1081 /* Similar to `c', but swap. We can't get unsigned here either. */
1082 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1083 output_operand_lossage ("invalid %%D value");
1085 fprintf (file
, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x
))));
1089 /* Similar, but reverse and swap. We can't get unsigned here either. */
1090 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1091 output_operand_lossage ("invalid %%D value");
1093 fprintf (file
, "%s",
1094 GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x
))))));
1098 /* Write the divide or modulus operator. */
1099 switch (GET_CODE (x
))
1102 fprintf (file
, "div%s", GET_MODE (x
) == SImode
? "l" : "q");
1105 fprintf (file
, "div%su", GET_MODE (x
) == SImode
? "l" : "q");
1108 fprintf (file
, "rem%s", GET_MODE (x
) == SImode
? "l" : "q");
1111 fprintf (file
, "rem%su", GET_MODE (x
) == SImode
? "l" : "q");
1114 output_operand_lossage ("invalid %%E value");
1120 /* Write "_u" for unaligned access. */
1121 if (GET_CODE (x
) == MEM
&& GET_CODE (XEXP (x
, 0)) == AND
)
1122 fprintf (file
, "_u");
1126 if (GET_CODE (x
) == REG
)
1127 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1128 else if (GET_CODE (x
) == MEM
)
1129 output_address (XEXP (x
, 0));
1131 output_addr_const (file
, x
);
1135 output_operand_lossage ("invalid %%xn code");
1139 /* Do what is necessary for `va_start'. The argument is ignored;
1140 We look at the current function to determine if stdarg or varargs
1141 is used and fill in an initial va_list. A pointer to this constructor
1145 alpha_builtin_saveregs (arglist
)
1148 rtx block
, addr
, argsize
;
1149 tree fntype
= TREE_TYPE (current_function_decl
);
1150 int stdarg
= (TYPE_ARG_TYPES (fntype
) != 0
1151 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1152 != void_type_node
));
1154 /* Compute the current position into the args, taking into account
1155 both registers and memory. Both of these are already included in
1156 current_function_args_info. */
1158 argsize
= GEN_INT (current_function_args_info
* UNITS_PER_WORD
);
1160 /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1161 storing fp arg registers in the first 48 bytes, and the integer arg
1162 registers in the next 48 bytes. This is only done, however, if any
1163 integer registers need to be stored.
1165 If no integer registers need be stored, then we must subtract 48 in
1166 order to account for the integer arg registers which are counted in
1167 argsize above, but which are not actually stored on the stack. */
1169 addr
= (current_function_args_info
<= 5 + stdarg
1170 ? plus_constant (virtual_incoming_args_rtx
, 6 * UNITS_PER_WORD
)
1171 : plus_constant (virtual_incoming_args_rtx
, - (6 * UNITS_PER_WORD
)));
1173 addr
= force_operand (addr
, NULL_RTX
);
1175 /* Allocate the va_list constructor */
1176 block
= assign_stack_local (BLKmode
, 2 * UNITS_PER_WORD
, BITS_PER_WORD
);
1177 RTX_UNCHANGING_P (block
) = 1;
1178 RTX_UNCHANGING_P (XEXP (block
, 0)) = 1;
1180 /* Store the address of the first integer register in the __base member. */
1182 #ifdef POINTERS_EXTEND_UNSIGNED
1183 addr
= convert_memory_address (ptr_mode
, addr
);
1186 emit_move_insn (change_address (block
, ptr_mode
, XEXP (block
, 0)), addr
);
1188 /* Store the argsize as the __va_offset member. */
1189 emit_move_insn (change_address (block
, TYPE_MODE (integer_type_node
),
1190 plus_constant (XEXP (block
, 0),
1191 POINTER_SIZE
/BITS_PER_UNIT
)),
1194 /* Return the address of the va_list constructor, but don't put it in a
1195 register. Doing so would fail when not optimizing and produce worse
1196 code when optimizing. */
1197 return XEXP (block
, 0);
1200 /* This page contains routines that are used to determine what the function
1201 prologue and epilogue code will do and write them out. */
1203 /* Compute the size of the save area in the stack. */
1211 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1212 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
])
1215 /* If some registers were saved but not reg 26, reg 26 must also
1216 be saved, so leave space for it. */
1217 if (size
!= 0 && ! regs_ever_live
[26])
1220 /* Our size must be even (multiple of 16 bytes). */
1227 /* Return 1 if this function can directly return via $26. */
1232 return (reload_completed
&& alpha_sa_size () == 0
1233 && get_frame_size () == 0
1234 && current_function_outgoing_args_size
== 0
1235 && current_function_pretend_args_size
== 0);
1238 /* Write a version stamp. Don't write anything if we are running as a
1239 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1241 #if !defined(CROSS_COMPILE) && !defined(_WIN32)
1246 alpha_write_verstamp (file
)
1252 fprintf (file
, "\t.verstamp %d %d ", MS_STAMP
, LS_STAMP
);
1253 for (p
= version_string
; *p
!= ' ' && *p
!= 0; p
++)
1254 fprintf (file
, "%c", *p
== '.' ? ' ' : *p
);
1255 fprintf (file
, "\n");
1259 /* Write code to add constant C to register number IN_REG (possibly 31)
1260 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1261 usually this will be OUT_REG, but should not be if OUT_REG is
1262 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1263 Write the code to FILE. */
1266 add_long_const (file
, c
, in_reg
, out_reg
, temp_reg
)
1269 int in_reg
, out_reg
, temp_reg
;
1271 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
1272 HOST_WIDE_INT tmp1
= c
- low
;
1273 HOST_WIDE_INT high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1274 HOST_WIDE_INT extra
= 0;
1276 /* We don't have code to write out constants larger than 32 bits. */
1277 #if HOST_BITS_PER_LONG_INT == 64
1278 if ((unsigned HOST_WIDE_INT
) c
>> 32 != 0)
1282 /* If HIGH will be interpreted as negative, we must adjust it to do two
1283 ldha insns. Note that we will never be building a negative constant
1290 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1295 int result_reg
= (extra
== 0 && high
== 0) ? out_reg
: temp_reg
;
1297 if (low
>= 0 && low
< 255)
1298 fprintf (file
, "\taddq $%d,%d,$%d\n", in_reg
, low
, result_reg
);
1300 fprintf (file
, "\tlda $%d,%d($%d)\n", result_reg
, low
, in_reg
);
1302 in_reg
= result_reg
;
1307 int result_reg
= (high
== 0) ? out_reg
: temp_reg
;
1309 fprintf (file
, "\tldah $%d,%d($%d)\n", result_reg
, extra
, in_reg
);
1310 in_reg
= result_reg
;
1314 fprintf (file
, "\tldah $%d,%d($%d)\n", out_reg
, high
, in_reg
);
1317 /* Write function prologue. */
1320 output_prolog (file
, size
)
1324 HOST_WIDE_INT out_args_size
1325 = ALPHA_ROUND (current_function_outgoing_args_size
);
1326 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1327 HOST_WIDE_INT frame_size
1328 = (out_args_size
+ sa_size
1329 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1330 HOST_WIDE_INT reg_offset
= out_args_size
;
1331 HOST_WIDE_INT start_reg_offset
= reg_offset
;
1332 HOST_WIDE_INT actual_start_reg_offset
= start_reg_offset
;
1333 int int_reg_save_area_size
= 0;
1335 unsigned reg_mask
= 0;
1338 /* Ecoff can handle multiple .file directives, so put out file and lineno.
1339 We have to do that before the .ent directive as we cannot switch
1340 files within procedures with native ecoff because line numbers are
1341 linked to procedure descriptors.
1342 Outputting the lineno helps debugging of one line functions as they
1343 would otherwise get no line number at all. Please note that we would
1344 like to put out last_linenum from final.c, but it is not accessible. */
1346 if (write_symbols
== SDB_DEBUG
)
1348 ASM_OUTPUT_SOURCE_FILENAME (file
,
1349 DECL_SOURCE_FILE (current_function_decl
));
1350 if (debug_info_level
!= DINFO_LEVEL_TERSE
)
1351 ASM_OUTPUT_SOURCE_LINE (file
,
1352 DECL_SOURCE_LINE (current_function_decl
));
1355 /* The assembly language programmer's guide states that the second argument
1356 to the .ent directive, the lex_level, is ignored by the assembler,
1357 so we might as well omit it. */
1359 fprintf (file
, "\t.ent ");
1360 assemble_name (file
, alpha_function_name
);
1361 fprintf (file
, "\n");
1362 ASM_OUTPUT_LABEL (file
, alpha_function_name
);
1363 inside_function
= TRUE
;
1365 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1367 alpha_auto_offset
= -frame_size
+ current_function_pretend_args_size
;
1368 alpha_arg_offset
= -frame_size
+ 48;
1370 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1371 Even if we are a static function, we still need to do this in case
1372 our address is taken and passed to something like qsort.
1374 We never need a GP for Windows/NT. */
1376 alpha_function_needs_gp
= 0;
1377 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1378 if ((GET_CODE (insn
) == CALL_INSN
)
1379 || (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1380 && GET_CODE (PATTERN (insn
)) != USE
1381 && GET_CODE (PATTERN (insn
)) != CLOBBER
1382 && (get_attr_type (insn
) == TYPE_LDSYM
1383 || get_attr_type (insn
) == TYPE_ISUBR
)))
1385 alpha_function_needs_gp
= 1;
1389 if (WINDOWS_NT
== 0)
1391 if (alpha_function_needs_gp
)
1392 fprintf (file
, "\tldgp $29,0($27)\n");
1394 /* Put a label after the GP load so we can enter the function at it. */
1395 assemble_name (file
, alpha_function_name
);
1396 fprintf (file
, "..ng:\n");
1399 /* Adjust the stack by the frame size. If the frame size is > 4096
1400 bytes, we need to be sure we probe somewhere in the first and last
1401 4096 bytes (we can probably get away without the latter test) and
1402 every 8192 bytes in between. If the frame size is > 32768, we
1403 do this in a loop. Otherwise, we generate the explicit probe
1406 Note that we are only allowed to adjust sp once in the prologue. */
1408 if (frame_size
< 32768)
1410 if (frame_size
> 4096)
1414 fprintf (file
, "\tstq $31,-%d($30)\n", probed
);
1416 while (probed
+ 8192 < frame_size
)
1417 fprintf (file
, "\tstq $31,-%d($30)\n", probed
+= 8192);
1419 /* We only have to do this probe if we aren't saving registers. */
1420 if (sa_size
== 0 && probed
+ 4096 < frame_size
)
1421 fprintf (file
, "\tstq $31,-%d($30)\n", frame_size
);
1424 if (frame_size
!= 0)
1425 fprintf (file
, "\tlda $30,-%d($30)\n", frame_size
);
1429 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1430 number of 8192 byte blocks to probe. We then probe each block
1431 in the loop and then set SP to the proper location. If the
1432 amount remaining is > 4096, we have to do one more probe if we
1433 are not saving any registers. */
1435 HOST_WIDE_INT blocks
= (frame_size
+ 4096) / 8192;
1436 HOST_WIDE_INT leftover
= frame_size
+ 4096 - blocks
* 8192;
1438 add_long_const (file
, blocks
, 31, 5, 5);
1440 fprintf (file
, "\tlda $4,4096($30)\n");
1442 assemble_name (file
, alpha_function_name
);
1443 fprintf (file
, "..sc:\n");
1445 fprintf (file
, "\tstq $31,-8192($4)\n");
1446 fprintf (file
, "\tsubq $5,1,$5\n");
1447 fprintf (file
, "\tlda $4,-8192($4)\n");
1449 fprintf (file
, "\tbne $5,");
1450 assemble_name (file
, alpha_function_name
);
1451 fprintf (file
, "..sc\n");
1453 if (leftover
> 4096 && sa_size
== 0)
1454 fprintf (file
, "\tstq $31,-%d($4)\n", leftover
);
1456 fprintf (file
, "\tlda $30,-%d($4)\n", leftover
);
1459 /* Describe our frame. */
1460 fprintf (file
, "\t.frame $%d,%d,$26,%d\n",
1461 (frame_pointer_needed
1462 ? HARD_FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
),
1463 frame_size
, current_function_pretend_args_size
);
1465 /* Save register 26 if any other register needs to be saved. */
1468 reg_mask
|= 1 << 26;
1469 fprintf (file
, "\tstq $26,%d($30)\n", reg_offset
);
1471 int_reg_save_area_size
+= 8;
1474 /* Now save any other used integer registers required to be saved. */
1475 for (i
= 0; i
< 32; i
++)
1476 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
] && i
!= 26)
1479 fprintf (file
, "\tstq $%d,%d($30)\n", i
, reg_offset
);
1481 int_reg_save_area_size
+= 8;
1484 /* Print the register mask and do floating-point saves. */
1486 fprintf (file
, "\t.mask 0x%x,%d\n", reg_mask
,
1487 actual_start_reg_offset
- frame_size
);
1489 start_reg_offset
= reg_offset
;
1492 for (i
= 0; i
< 32; i
++)
1493 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1494 && regs_ever_live
[i
+ 32])
1497 fprintf (file
, "\tstt $f%d,%d($30)\n", i
, reg_offset
);
1501 /* Print the floating-point mask, if we've saved any fp register. */
1503 fprintf (file
, "\t.fmask 0x%x,%d\n", reg_mask
,
1504 actual_start_reg_offset
- frame_size
+ int_reg_save_area_size
);
1506 /* If we need a frame pointer, set it from the stack pointer. Note that
1507 this must always be the last instruction in the prologue. */
1508 if (frame_pointer_needed
)
1509 fprintf (file
, "\tbis $30,$30,$15\n");
1511 /* End the prologue and say if we used gp. */
1512 fprintf (file
, "\t.prologue %d\n", alpha_function_needs_gp
);
1515 /* Write function epilogue. */
1518 output_epilog (file
, size
)
1522 rtx insn
= get_last_insn ();
1523 HOST_WIDE_INT out_args_size
1524 = ALPHA_ROUND (current_function_outgoing_args_size
);
1525 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1526 HOST_WIDE_INT frame_size
1527 = (out_args_size
+ sa_size
1528 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1529 HOST_WIDE_INT reg_offset
= out_args_size
;
1530 HOST_WIDE_INT frame_size_from_reg_save
= frame_size
- reg_offset
;
1532 = frame_pointer_needed
&& regs_ever_live
[HARD_FRAME_POINTER_REGNUM
];
1535 /* If the last insn was a BARRIER, we don't have to write anything except
1536 the .end pseudo-op. */
1537 if (GET_CODE (insn
) == NOTE
)
1538 insn
= prev_nonnote_insn (insn
);
1539 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1543 /* If we have a frame pointer, restore SP from it. */
1544 if (frame_pointer_needed
)
1545 fprintf (file
, "\tbis $15,$15,$30\n");
1547 /* Restore all the registers, starting with the return address
1551 fprintf (file
, "\tldq $26,%d($30)\n", reg_offset
);
1555 /* Now restore any other used integer registers that that we saved,
1556 except for FP if it is being used as FP, since it must be
1559 for (i
= 0; i
< 32; i
++)
1560 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
]
1563 if (i
== HARD_FRAME_POINTER_REGNUM
&& frame_pointer_needed
)
1564 fp_offset
= reg_offset
;
1566 fprintf (file
, "\tldq $%d,%d($30)\n", i
, reg_offset
);
1570 for (i
= 0; i
< 32; i
++)
1571 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1572 && regs_ever_live
[i
+ 32])
1574 fprintf (file
, "\tldt $f%d,%d($30)\n", i
, reg_offset
);
1578 /* If the stack size is large and we have a frame pointer, compute the
1579 size of the stack into a register because the old FP restore, stack
1580 pointer adjust, and return are required to be consecutive
1582 if (frame_size
> 32767 && restore_fp
)
1583 add_long_const (file
, frame_size
, 31, 1, 1);
1585 /* If we needed a frame pointer and we have to restore it, do it
1586 now. This must be done in one instruction immediately
1587 before the SP update. */
1588 if (restore_fp
&& fp_offset
)
1589 fprintf (file
, "\tldq $15,%d($30)\n", fp_offset
);
1591 /* Now update the stack pointer, if needed. Only one instruction must
1592 modify the stack pointer. It must be the last instruction in the
1593 sequence and must be an ADDQ or LDA instruction. If the frame
1594 pointer was loaded above, we may only put one instruction here. */
1596 if (frame_size
> 32768 && restore_fp
)
1597 fprintf (file
, "\taddq $1,$30,$30\n");
1599 add_long_const (file
, frame_size
, 30, 30, 1);
1601 /* Finally return to the caller. */
1602 fprintf (file
, "\tret $31,($26),1\n");
1605 /* End the function. */
1606 fprintf (file
, "\t.end ");
1607 assemble_name (file
, alpha_function_name
);
1608 fprintf (file
, "\n");
1609 inside_function
= FALSE
;
1611 /* Show that we know this function if it is called again. */
1612 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl
), 0)) = 1;
1615 /* Debugging support. */
1619 /* Count the number of sdb related labels are generated (to find block
1620 start and end boundaries). */
1622 int sdb_label_count
= 0;
1624 /* Next label # for each statement. */
1626 static int sym_lineno
= 0;
1628 /* Count the number of .file directives, so that .loc is up to date. */
1630 static int num_source_filenames
= 0;
1632 /* Name of the file containing the current function. */
1634 static char *current_function_file
= "";
1636 /* Offsets to alpha virtual arg/local debugging pointers. */
1638 long alpha_arg_offset
;
1639 long alpha_auto_offset
;
1641 /* Emit a new filename to a stream. */
1644 alpha_output_filename (stream
, name
)
1648 static int first_time
= TRUE
;
1649 char ltext_label_name
[100];
1654 ++num_source_filenames
;
1655 current_function_file
= name
;
1656 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1657 output_quoted_string (stream
, name
);
1658 fprintf (stream
, "\n");
1659 if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1660 fprintf (stream
, "\t#@stabs\n");
1663 else if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1665 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name
, "Ltext", 0);
1666 fprintf (stream
, "%s ", ASM_STABS_OP
);
1667 output_quoted_string (stream
, name
);
1668 fprintf (stream
, ",%d,0,0,%s\n", N_SOL
, <ext_label_name
[1]);
1671 else if (name
!= current_function_file
1672 && strcmp (name
, current_function_file
) != 0)
1674 if (inside_function
&& ! TARGET_GAS
)
1675 fprintf (stream
, "\t#.file\t%d ", num_source_filenames
);
1678 ++num_source_filenames
;
1679 current_function_file
= name
;
1680 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1683 output_quoted_string (stream
, name
);
1684 fprintf (stream
, "\n");
1688 /* Emit a linenumber to a stream. */
1691 alpha_output_lineno (stream
, line
)
1695 if (! TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1697 /* mips-tfile doesn't understand .stabd directives. */
1699 fprintf (stream
, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1700 sym_lineno
, ASM_STABN_OP
, N_SLINE
, line
, sym_lineno
);
1703 fprintf (stream
, "\n\t.loc\t%d %d\n", num_source_filenames
, line
);