1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
40 /* Save information from a "cmpxx" operation until the branch or scc is
43 rtx alpha_compare_op0
, alpha_compare_op1
;
44 int alpha_compare_fp_p
;
46 /* Save the name of the current function as used by the assembler. This
47 is used by the epilogue. */
49 char *alpha_function_name
;
51 /* Non-zero if inside of a function, because the Alpha asm can't
52 handle .files inside of functions. */
54 static int inside_function
= FALSE
;
56 /* Nonzero if the current function needs gp. */
58 int alpha_function_needs_gp
;
60 extern char *version_string
;
62 /* Declarations of static functions. */
63 static void alpha_set_memflags_1
PROTO((rtx
, int, int, int));
64 static void add_long_const
PROTO((FILE *, HOST_WIDE_INT
, int, int, int));
66 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
74 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
76 if ((value
& 0xff) != 0 && (value
& 0xff) != 0xff)
82 /* Returns 1 if OP is either the constant zero or a register. If a
83 register, it must be in the proper mode unless MODE is VOIDmode. */
86 reg_or_0_operand (op
, mode
)
88 enum machine_mode mode
;
90 return op
== const0_rtx
|| register_operand (op
, mode
);
93 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
97 reg_or_6bit_operand (op
, mode
)
99 enum machine_mode mode
;
101 return ((GET_CODE (op
) == CONST_INT
102 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64)
103 || register_operand (op
, mode
));
107 /* Return 1 if OP is an 8-bit constant or any register. */
110 reg_or_8bit_operand (op
, mode
)
112 enum machine_mode mode
;
114 return ((GET_CODE (op
) == CONST_INT
115 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100)
116 || register_operand (op
, mode
));
119 /* Return 1 if OP is an 8-bit constant. */
122 cint8_operand (op
, mode
)
124 enum machine_mode mode
;
126 return (GET_CODE (op
) == CONST_INT
127 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100);
130 /* Return 1 if the operand is a valid second operand to an add insn. */
133 add_operand (op
, mode
)
135 enum machine_mode mode
;
137 if (GET_CODE (op
) == CONST_INT
)
138 return ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) < 0x10000
139 || ((INTVAL (op
) & 0xffff) == 0
140 && (INTVAL (op
) >> 31 == -1
141 || INTVAL (op
) >> 31 == 0)));
143 return register_operand (op
, mode
);
146 /* Return 1 if the operand is a valid second operand to a sign-extending
150 sext_add_operand (op
, mode
)
152 enum machine_mode mode
;
154 if (GET_CODE (op
) == CONST_INT
)
155 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 255
156 || (unsigned HOST_WIDE_INT
) (- INTVAL (op
)) < 255);
158 return register_operand (op
, mode
);
161 /* Return 1 if OP is the constant 4 or 8. */
164 const48_operand (op
, mode
)
166 enum machine_mode mode
;
168 return (GET_CODE (op
) == CONST_INT
169 && (INTVAL (op
) == 4 || INTVAL (op
) == 8));
172 /* Return 1 if OP is a valid first operand to an AND insn. */
175 and_operand (op
, mode
)
177 enum machine_mode mode
;
179 if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == VOIDmode
)
180 return (zap_mask (CONST_DOUBLE_LOW (op
))
181 && zap_mask (CONST_DOUBLE_HIGH (op
)));
183 if (GET_CODE (op
) == CONST_INT
)
184 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
185 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100
186 || zap_mask (INTVAL (op
)));
188 return register_operand (op
, mode
);
191 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
194 or_operand (op
, mode
)
196 enum machine_mode mode
;
198 if (GET_CODE (op
) == CONST_INT
)
199 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
200 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100);
202 return register_operand (op
, mode
);
205 /* Return 1 if OP is a constant that is the width, in bits, of an integral
206 mode smaller than DImode. */
209 mode_width_operand (op
, mode
)
211 enum machine_mode mode
;
213 return (GET_CODE (op
) == CONST_INT
214 && (INTVAL (op
) == 8 || INTVAL (op
) == 16 || INTVAL (op
) == 32));
217 /* Return 1 if OP is a constant that is the width of an integral machine mode
218 smaller than an integer. */
221 mode_mask_operand (op
, mode
)
223 enum machine_mode mode
;
225 #if HOST_BITS_PER_WIDE_INT == 32
226 if (GET_CODE (op
) == CONST_DOUBLE
)
227 return CONST_DOUBLE_HIGH (op
) == 0 && CONST_DOUBLE_LOW (op
) == -1;
230 if (GET_CODE (op
) == CONST_INT
)
231 return (INTVAL (op
) == 0xff
232 || INTVAL (op
) == 0xffff
233 #if HOST_BITS_PER_WIDE_INT == 64
234 || INTVAL (op
) == 0xffffffff
239 /* Return 1 if OP is a multiple of 8 less than 64. */
242 mul8_operand (op
, mode
)
244 enum machine_mode mode
;
246 return (GET_CODE (op
) == CONST_INT
247 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64
248 && (INTVAL (op
) & 7) == 0);
251 /* Return 1 if OP is the constant zero in floating-point. */
254 fp0_operand (op
, mode
)
256 enum machine_mode mode
;
258 return (GET_MODE (op
) == mode
259 && GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
));
262 /* Return 1 if OP is the floating-point constant zero or a register. */
265 reg_or_fp0_operand (op
, mode
)
267 enum machine_mode mode
;
269 return fp0_operand (op
, mode
) || register_operand (op
, mode
);
272 /* Return 1 if OP is a register or a constant integer. */
276 reg_or_cint_operand (op
, mode
)
278 enum machine_mode mode
;
280 return GET_CODE (op
) == CONST_INT
|| register_operand (op
, mode
);
283 /* Return 1 if OP is a valid operand for the source of a move insn. */
286 input_operand (op
, mode
)
288 enum machine_mode mode
;
290 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
293 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& GET_MODE (op
) != mode
)
296 switch (GET_CODE (op
))
301 return mode
== DImode
;
307 if (register_operand (op
, mode
))
309 /* ... fall through ... */
311 return mode
!= HImode
&& mode
!= QImode
&& general_operand (op
, mode
);
314 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
317 return mode
== QImode
|| mode
== HImode
|| add_operand (op
, mode
);
323 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
327 current_file_function_operand (op
, mode
)
329 enum machine_mode mode
;
331 return (GET_CODE (op
) == SYMBOL_REF
332 && (SYMBOL_REF_FLAG (op
)
333 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
336 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
337 comparisons are valid in which insn. */
340 alpha_comparison_operator (op
, mode
)
342 enum machine_mode mode
;
344 enum rtx_code code
= GET_CODE (op
);
346 if (mode
!= GET_MODE (op
) || GET_RTX_CLASS (code
) != '<')
349 return (code
== EQ
|| code
== LE
|| code
== LT
350 || (mode
== DImode
&& (code
== LEU
|| code
== LTU
)));
353 /* Return 1 if OP is a signed comparison operation. */
356 signed_comparison_operator (op
, mode
)
358 enum machine_mode mode
;
360 switch (GET_CODE (op
))
362 case EQ
: case NE
: case LE
: case LT
: case GE
: case GT
:
369 /* Return 1 if this is a divide or modulus operator. */
372 divmod_operator (op
, mode
)
374 enum machine_mode mode
;
376 switch (GET_CODE (op
))
378 case DIV
: case MOD
: case UDIV
: case UMOD
:
385 /* Return 1 if this memory address is a known aligned register plus
386 a constant. It must be a valid address. This means that we can do
387 this as an aligned reference plus some offset.
389 Take into account what reload will do.
391 We could say that out-of-range stack slots are alignable, but that would
392 complicate get_aligned_mem and it isn't worth the trouble since few
393 functions have large stack space. */
396 aligned_memory_operand (op
, mode
)
398 enum machine_mode mode
;
400 if (GET_CODE (op
) == SUBREG
)
402 if (GET_MODE (op
) != mode
)
404 op
= SUBREG_REG (op
);
405 mode
= GET_MODE (op
);
408 if (reload_in_progress
&& GET_CODE (op
) == REG
409 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
410 op
= reg_equiv_mem
[REGNO (op
)];
412 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
413 || ! memory_address_p (mode
, XEXP (op
, 0)))
418 if (GET_CODE (op
) == PLUS
)
421 return (GET_CODE (op
) == REG
422 && (REGNO (op
) == STACK_POINTER_REGNUM
423 || op
== hard_frame_pointer_rtx
424 || (REGNO (op
) >= FIRST_VIRTUAL_REGISTER
425 && REGNO (op
) <= LAST_VIRTUAL_REGISTER
)));
428 /* Similar, but return 1 if OP is a MEM which is not alignable. */
431 unaligned_memory_operand (op
, mode
)
433 enum machine_mode mode
;
435 if (GET_CODE (op
) == SUBREG
)
437 if (GET_MODE (op
) != mode
)
439 op
= SUBREG_REG (op
);
440 mode
= GET_MODE (op
);
443 if (reload_in_progress
&& GET_CODE (op
) == REG
444 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
445 op
= reg_equiv_mem
[REGNO (op
)];
447 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
)
452 if (! memory_address_p (mode
, op
))
455 if (GET_CODE (op
) == PLUS
)
458 return (GET_CODE (op
) != REG
459 || (REGNO (op
) != STACK_POINTER_REGNUM
460 && op
!= hard_frame_pointer_rtx
461 && (REGNO (op
) < FIRST_VIRTUAL_REGISTER
462 || REGNO (op
) > LAST_VIRTUAL_REGISTER
)));
465 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
468 any_memory_operand (op
, mode
)
470 enum machine_mode mode
;
472 return (GET_CODE (op
) == MEM
473 || (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
474 || (reload_in_progress
&& GET_CODE (op
) == REG
475 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
476 || (reload_in_progress
&& GET_CODE (op
) == SUBREG
477 && GET_CODE (SUBREG_REG (op
)) == REG
478 && REGNO (SUBREG_REG (op
)) >= FIRST_PSEUDO_REGISTER
));
481 /* REF is an alignable memory location. Place an aligned SImode
482 reference into *PALIGNED_MEM and the number of bits to shift into
486 get_aligned_mem (ref
, paligned_mem
, pbitnum
)
488 rtx
*paligned_mem
, *pbitnum
;
491 HOST_WIDE_INT offset
= 0;
493 if (GET_CODE (ref
) == SUBREG
)
495 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
496 if (BYTES_BIG_ENDIAN
)
497 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
498 - MIN (UNITS_PER_WORD
,
499 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
500 ref
= SUBREG_REG (ref
);
503 if (GET_CODE (ref
) == REG
)
504 ref
= reg_equiv_mem
[REGNO (ref
)];
506 if (reload_in_progress
)
507 base
= find_replacement (&XEXP (ref
, 0));
509 base
= XEXP (ref
, 0);
511 if (GET_CODE (base
) == PLUS
)
512 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
514 *paligned_mem
= gen_rtx (MEM
, SImode
,
515 plus_constant (base
, offset
& ~3));
516 MEM_IN_STRUCT_P (*paligned_mem
) = MEM_IN_STRUCT_P (ref
);
517 MEM_VOLATILE_P (*paligned_mem
) = MEM_VOLATILE_P (ref
);
518 RTX_UNCHANGING_P (*paligned_mem
) = RTX_UNCHANGING_P (ref
);
520 *pbitnum
= GEN_INT ((offset
& 3) * 8);
523 /* Similar, but just get the address. Handle the two reload cases. */
526 get_unaligned_address (ref
)
530 HOST_WIDE_INT offset
= 0;
532 if (GET_CODE (ref
) == SUBREG
)
534 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
535 if (BYTES_BIG_ENDIAN
)
536 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
537 - MIN (UNITS_PER_WORD
,
538 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
539 ref
= SUBREG_REG (ref
);
542 if (GET_CODE (ref
) == REG
)
543 ref
= reg_equiv_mem
[REGNO (ref
)];
545 if (reload_in_progress
)
546 base
= find_replacement (&XEXP (ref
, 0));
548 base
= XEXP (ref
, 0);
550 if (GET_CODE (base
) == PLUS
)
551 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
553 return plus_constant (base
, offset
);
556 /* Subfunction of the following function. Update the flags of any MEM
557 found in part of X. */
560 alpha_set_memflags_1 (x
, in_struct_p
, volatile_p
, unchanging_p
)
562 int in_struct_p
, volatile_p
, unchanging_p
;
566 switch (GET_CODE (x
))
570 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
571 alpha_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
576 alpha_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
581 alpha_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
583 alpha_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
,
588 MEM_IN_STRUCT_P (x
) = in_struct_p
;
589 MEM_VOLATILE_P (x
) = volatile_p
;
590 RTX_UNCHANGING_P (x
) = unchanging_p
;
595 /* Given INSN, which is either an INSN or a SEQUENCE generated to
596 perform a memory operation, look for any MEMs in either a SET_DEST or
597 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
598 REF into each of the MEMs found. If REF is not a MEM, don't do
602 alpha_set_memflags (insn
, ref
)
606 /* Note that it is always safe to get these flags, though they won't
607 be what we think if REF is not a MEM. */
608 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
609 int volatile_p
= MEM_VOLATILE_P (ref
);
610 int unchanging_p
= RTX_UNCHANGING_P (ref
);
612 if (GET_CODE (ref
) != MEM
613 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
616 alpha_set_memflags_1 (insn
, in_struct_p
, volatile_p
, unchanging_p
);
619 /* Try to output insns to set TARGET equal to the constant C if it can be
620 done in less than N insns. Returns 1 if it can be done and the
621 insns have been emitted. If it would take more than N insns, zero is
622 returned and no insns and emitted. */
625 alpha_emit_set_const (target
, c
, n
)
630 HOST_WIDE_INT
new = c
;
633 #if HOST_BITS_PER_WIDE_INT == 64
634 /* We are only called for SImode and DImode. If this is SImode, ensure that
635 we are sign extended to a full word. This does not make any sense when
636 cross-compiling on a narrow machine. */
638 if (GET_MODE (target
) == SImode
)
639 c
= (c
& 0xffffffff) - 2 * (c
& 0x80000000);
642 /* If this is a sign-extended 32-bit constant, we can do this in at most
643 three insns, so do it if we have enough insns left. We always have
644 a sign-extended 32-bit constant when compiling on a narrow machine. */
646 if (HOST_BITS_PER_WIDE_INT
!= 64
647 || c
>> 31 == -1 || c
>> 31 == 0)
649 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
650 HOST_WIDE_INT tmp1
= c
- low
;
652 = ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
653 HOST_WIDE_INT extra
= 0;
655 /* If HIGH will be interpreted as negative but the constant is
656 positive, we must adjust it to do two ldha insns. */
658 if ((high
& 0x8000) != 0 && c
>= 0)
662 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
665 if (c
== low
|| (low
== 0 && extra
== 0))
667 emit_move_insn (target
, GEN_INT (c
));
670 else if (n
>= 2 + (extra
!= 0))
672 emit_move_insn (target
, GEN_INT (low
));
674 emit_insn (gen_add2_insn (target
, GEN_INT (extra
<< 16)));
676 emit_insn (gen_add2_insn (target
, GEN_INT (high
<< 16)));
681 /* If we couldn't do it that way, try some other methods (that depend on
682 being able to compute in the target's word size). But if we have no
683 instructions left, don't bother. Also, don't even try if this is
684 SImode (in which case we should have already done something, but
685 do a sanity check here). */
687 if (n
== 1 || HOST_BITS_PER_WIDE_INT
< 64 || GET_MODE (target
) != DImode
)
690 /* First, see if can load a value into the target that is the same as the
691 constant except that all bytes that are 0 are changed to be 0xff. If we
692 can, then we can do a ZAPNOT to obtain the desired constant. */
694 for (i
= 0; i
< 64; i
+= 8)
695 if ((new & ((HOST_WIDE_INT
) 0xff << i
)) == 0)
696 new |= (HOST_WIDE_INT
) 0xff << i
;
698 if (alpha_emit_set_const (target
, new, n
- 1))
700 emit_insn (gen_anddi3 (target
, target
, GEN_INT (c
| ~ new)));
704 /* Find, see if we can load a related constant and then shift and possibly
705 negate it to get the constant we want. Try this once each increasing
708 for (i
= 1; i
< n
; i
++)
710 /* First try complementing. */
711 if (alpha_emit_set_const (target
, ~ c
, i
))
713 emit_insn (gen_one_cmpldi2 (target
, target
));
717 /* First try to form a constant and do a left shift. We can do this
718 if some low-order bits are zero; the exact_log2 call below tells
719 us that information. The bits we are shifting out could be any
720 value, but here we'll just try the 0- and sign-extended forms of
721 the constant. To try to increase the chance of having the same
722 constant in more than one insn, start at the highest number of
723 bits to shift, but try all possibilities in case a ZAPNOT will
726 if ((bits
= exact_log2 (c
& - c
)) > 0)
727 for (; bits
> 0; bits
--)
728 if (alpha_emit_set_const (target
, c
>> bits
, i
)
729 || alpha_emit_set_const (target
,
730 ((unsigned HOST_WIDE_INT
) c
) >> bits
,
733 emit_insn (gen_ashldi3 (target
, target
, GEN_INT (bits
)));
737 /* Now try high-order zero bits. Here we try the shifted-in bits as
738 all zero and all ones. */
740 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (c
) - 1) > 0)
741 for (; bits
> 0; bits
--)
742 if (alpha_emit_set_const (target
, c
<< bits
, i
)
743 || alpha_emit_set_const (target
,
745 | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
748 emit_insn (gen_lshrdi3 (target
, target
, GEN_INT (bits
)));
752 /* Now try high-order 1 bits. We get that with a sign-extension.
753 But one bit isn't enough here. */
755 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (~ c
) - 2) > 0)
756 for (; bits
> 0; bits
--)
757 if (alpha_emit_set_const (target
, c
<< bits
, i
)
758 || alpha_emit_set_const (target
,
760 | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
763 emit_insn (gen_ashrdi3 (target
, target
, GEN_INT (bits
)));
771 /* Adjust the cost of a scheduling dependency. Return the new cost of
772 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
775 alpha_adjust_cost (insn
, link
, dep_insn
, cost
)
783 /* If the dependence is an anti-dependence, there is no cost. For an
784 output dependence, there is sometimes a cost, but it doesn't seem
785 worth handling those few cases. */
787 if (REG_NOTE_KIND (link
) != 0)
790 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
791 we can sometimes lower the cost. */
793 if (recog_memoized (insn
) >= 0 && get_attr_type (insn
) == TYPE_ST
794 && (set
= single_set (dep_insn
)) != 0
795 && GET_CODE (PATTERN (insn
)) == SET
796 && rtx_equal_p (SET_DEST (set
), SET_SRC (PATTERN (insn
))))
797 switch (get_attr_type (dep_insn
))
800 /* No savings here. */
805 /* In these cases, we save one cycle. */
809 /* In all other cases, we save two cycles. */
810 return MAX (0, cost
- 4);
813 /* Another case that needs adjustment is an arithmetic or logical
814 operation. It's cost is usually one cycle, but we default it to
815 two in the MD file. The only case that it is actually two is
816 for the address in loads and stores. */
818 if (recog_memoized (dep_insn
) >= 0
819 && get_attr_type (dep_insn
) == TYPE_IADDLOG
)
820 switch (get_attr_type (insn
))
830 /* The final case is when a compare feeds into an integer branch. The cost
831 is only one cycle in that case. */
833 if (recog_memoized (dep_insn
) >= 0
834 && get_attr_type (dep_insn
) == TYPE_ICMP
835 && recog_memoized (insn
) >= 0
836 && get_attr_type (insn
) == TYPE_IBR
)
839 /* Otherwise, return the default cost. */
844 /* Print an operand. Recognize special options, documented below. */
847 print_operand (file
, x
, code
)
857 /* If this operand is the constant zero, write it as "$31". */
858 if (GET_CODE (x
) == REG
)
859 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
860 else if (x
== CONST0_RTX (GET_MODE (x
)))
861 fprintf (file
, "$31");
863 output_operand_lossage ("invalid %%r value");
868 /* Similar, but for floating-point. */
869 if (GET_CODE (x
) == REG
)
870 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
871 else if (x
== CONST0_RTX (GET_MODE (x
)))
872 fprintf (file
, "$f31");
874 output_operand_lossage ("invalid %%R value");
879 /* Write the 1's complement of a constant. */
880 if (GET_CODE (x
) != CONST_INT
)
881 output_operand_lossage ("invalid %%N value");
883 fprintf (file
, "%ld", ~ INTVAL (x
));
887 /* Write 1 << C, for a constant C. */
888 if (GET_CODE (x
) != CONST_INT
)
889 output_operand_lossage ("invalid %%P value");
891 fprintf (file
, "%ld", (HOST_WIDE_INT
) 1 << INTVAL (x
));
895 /* Write the high-order 16 bits of a constant, sign-extended. */
896 if (GET_CODE (x
) != CONST_INT
)
897 output_operand_lossage ("invalid %%h value");
899 fprintf (file
, "%ld", INTVAL (x
) >> 16);
903 /* Write the low-order 16 bits of a constant, sign-extended. */
904 if (GET_CODE (x
) != CONST_INT
)
905 output_operand_lossage ("invalid %%L value");
907 fprintf (file
, "%ld", (INTVAL (x
) & 0xffff) - 2 * (INTVAL (x
) & 0x8000));
911 /* Write mask for ZAP insn. */
912 if (GET_CODE (x
) == CONST_DOUBLE
)
914 HOST_WIDE_INT mask
= 0;
917 value
= CONST_DOUBLE_LOW (x
);
918 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
923 value
= CONST_DOUBLE_HIGH (x
);
924 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
927 mask
|= (1 << (i
+ sizeof (int)));
929 fprintf (file
, "%ld", mask
& 0xff);
932 else if (GET_CODE (x
) == CONST_INT
)
934 HOST_WIDE_INT mask
= 0, value
= INTVAL (x
);
936 for (i
= 0; i
< 8; i
++, value
>>= 8)
940 fprintf (file
, "%ld", mask
);
943 output_operand_lossage ("invalid %%m value");
947 /* 'b', 'w', or 'l' as the value of the constant. */
948 if (GET_CODE (x
) != CONST_INT
949 || (INTVAL (x
) != 8 && INTVAL (x
) != 16 && INTVAL (x
) != 32))
950 output_operand_lossage ("invalid %%M value");
953 INTVAL (x
) == 8 ? "b" : INTVAL (x
) == 16 ? "w" : "l");
957 /* Similar, except do it from the mask. */
958 if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xff)
960 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffff)
962 #if HOST_BITS_PER_WIDE_INT == 32
963 else if (GET_CODE (x
) == CONST_DOUBLE
964 && CONST_DOUBLE_HIGH (x
) == 0
965 && CONST_DOUBLE_LOW (x
) == -1)
968 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffffffff)
972 output_operand_lossage ("invalid %%U value");
976 /* Write the constant value divided by 8. */
977 if (GET_CODE (x
) != CONST_INT
978 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
979 && (INTVAL (x
) & 7) != 8)
980 output_operand_lossage ("invalid %%s value");
982 fprintf (file
, "%ld", INTVAL (x
) / 8);
986 /* Same, except compute (64 - c) / 8 */
988 if (GET_CODE (x
) != CONST_INT
989 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
990 && (INTVAL (x
) & 7) != 8)
991 output_operand_lossage ("invalid %%s value");
993 fprintf (file
, "%ld", (64 - INTVAL (x
)) / 8);
997 /* Write out comparison name. */
998 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
999 output_operand_lossage ("invalid %%C value");
1001 if (GET_CODE (x
) == LEU
)
1002 fprintf (file
, "ule");
1003 else if (GET_CODE (x
) == LTU
)
1004 fprintf (file
, "ult");
1006 fprintf (file
, "%s", GET_RTX_NAME (GET_CODE (x
)));
1010 /* Similar, but write reversed code. We can't get an unsigned code
1012 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1013 output_operand_lossage ("invalid %%D value");
1015 fprintf (file
, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x
))));
1019 /* Write the divide or modulus operator. */
1020 switch (GET_CODE (x
))
1023 fprintf (file
, "div%s", GET_MODE (x
) == SImode
? "l" : "q");
1026 fprintf (file
, "div%su", GET_MODE (x
) == SImode
? "l" : "q");
1029 fprintf (file
, "rem%s", GET_MODE (x
) == SImode
? "l" : "q");
1032 fprintf (file
, "rem%su", GET_MODE (x
) == SImode
? "l" : "q");
1035 output_operand_lossage ("invalid %%E value");
1041 /* Write "_u" for unaligned access. */
1042 if (GET_CODE (x
) == MEM
&& GET_CODE (XEXP (x
, 0)) == AND
)
1043 fprintf (file
, "_u");
1047 if (GET_CODE (x
) == REG
)
1048 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1049 else if (GET_CODE (x
) == MEM
)
1050 output_address (XEXP (x
, 0));
1052 output_addr_const (file
, x
);
1056 output_operand_lossage ("invalid %%xn code");
1060 /* Do what is necessary for `va_start'. The argument is ignored;
1061 We look at the current function to determine if stdarg or varargs
1062 is used and fill in an initial va_list. A pointer to this constructor
1066 alpha_builtin_saveregs (arglist
)
1069 rtx block
, addr
, argsize
;
1070 tree fntype
= TREE_TYPE (current_function_decl
);
1071 int stdarg
= (TYPE_ARG_TYPES (fntype
) != 0
1072 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1073 != void_type_node
));
1075 /* Compute the current position into the args, taking into account
1076 both registers and memory. Both of these are already included in
1077 current_function_args_info. */
1079 argsize
= GEN_INT (current_function_args_info
* UNITS_PER_WORD
);
1081 /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1082 storing fp arg registers in the first 48 bytes, and the integer arg
1083 registers in the next 48 bytes. This is only done, however, if any
1084 integer registers need to be stored.
1086 If no integer registers need be stored, then we must subtract 48 in
1087 order to account for the integer arg registers which are counted in
1088 argsize above, but which are not actually stored on the stack. */
1090 addr
= (current_function_args_info
<= 6
1091 ? plus_constant (virtual_incoming_args_rtx
, 6 * UNITS_PER_WORD
)
1092 : plus_constant (virtual_incoming_args_rtx
, - (6 * UNITS_PER_WORD
)));
1094 /* Allocate the va_list constructor */
1095 block
= assign_stack_local (BLKmode
, 2 * UNITS_PER_WORD
, BITS_PER_WORD
);
1096 RTX_UNCHANGING_P (block
) = 1;
1097 RTX_UNCHANGING_P (XEXP (block
, 0)) = 1;
1099 /* Store the address of the first integer register in the
1100 __va_base member. */
1101 emit_move_insn (change_address (block
, Pmode
, XEXP (block
, 0)),
1102 force_operand (addr
, NULL_RTX
));
1104 /* Store the argsize as the __va_offset member. */
1105 emit_move_insn (change_address (block
, Pmode
,
1106 plus_constant (XEXP (block
, 0),
1108 force_operand (argsize
, NULL_RTX
));
1110 /* Return the address of the va_list constructor, but don't put it in a
1111 register. Doing so would fail when not optimizing and produce worse
1112 code when optimizing. */
1113 return XEXP (block
, 0);
1116 /* This page contains routines that are used to determine what the function
1117 prologue and epilogue code will do and write them out. */
1119 /* Compute the size of the save area in the stack. */
1127 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1128 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
])
1131 /* If some registers were saved but not reg 26, reg 26 must also
1132 be saved, so leave space for it. */
1133 if (size
!= 0 && ! regs_ever_live
[26])
1136 /* Our size must be even (multiple of 16 bytes). */
1143 /* Return 1 if this function can directly return via $26. */
1148 return (reload_completed
&& alpha_sa_size () == 0
1149 && get_frame_size () == 0
1150 && current_function_pretend_args_size
== 0);
1153 /* Write a version stamp. Don't write anything if we are running as a
1154 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1156 #ifndef CROSS_COMPILE
1161 alpha_write_verstamp (file
)
1167 fprintf (file
, "\t.verstamp %d %d ", MS_STAMP
, LS_STAMP
);
1168 for (p
= version_string
; *p
!= ' ' && *p
!= 0; p
++)
1169 fprintf (file
, "%c", *p
== '.' ? ' ' : *p
);
1170 fprintf (file
, "\n");
1174 /* Write code to add constant C to register number IN_REG (possibly 31)
1175 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1176 usually this will be OUT_REG, but should not be if OUT_REG is
1177 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1178 Write the code to FILE. */
1181 add_long_const (file
, c
, in_reg
, out_reg
, temp_reg
)
1184 int in_reg
, out_reg
, temp_reg
;
1186 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
1187 HOST_WIDE_INT tmp1
= c
- low
;
1188 HOST_WIDE_INT high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1189 HOST_WIDE_INT extra
= 0;
1191 /* We don't have code to write out constants larger than 32 bits. */
1192 #if HOST_BITS_PER_LONG_INT == 64
1193 if ((unsigned HOST_WIDE_INT
) c
>> 32 != 0)
1197 /* If HIGH will be interpreted as negative, we must adjust it to do two
1198 ldha insns. Note that we will never be building a negative constant
1205 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1210 int result_reg
= (extra
== 0 && high
== 0) ? out_reg
: temp_reg
;
1212 if (low
>= 0 && low
< 255)
1213 fprintf (file
, "\taddq $%d,%d,$%d\n", in_reg
, low
, result_reg
);
1215 fprintf (file
, "\tlda $%d,%d($%d)\n", result_reg
, low
, in_reg
);
1217 in_reg
= result_reg
;
1222 int result_reg
= (high
== 0) ? out_reg
: temp_reg
;
1224 fprintf (file
, "\tldah $%d,%d($%d)\n", result_reg
, extra
, in_reg
);
1225 in_reg
= result_reg
;
1229 fprintf (file
, "\tldah $%d,%d($%d)\n", out_reg
, high
, in_reg
);
1232 /* Write function prologue. */
1235 output_prolog (file
, size
)
1239 HOST_WIDE_INT out_args_size
1240 = ALPHA_ROUND (current_function_outgoing_args_size
);
1241 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1242 HOST_WIDE_INT frame_size
1243 = (out_args_size
+ sa_size
1244 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1245 HOST_WIDE_INT reg_offset
= out_args_size
;
1246 HOST_WIDE_INT start_reg_offset
= reg_offset
;
1247 HOST_WIDE_INT actual_start_reg_offset
= start_reg_offset
;
1248 int int_reg_save_area_size
= 0;
1250 unsigned reg_mask
= 0;
1253 /* Ecoff can handle multiple .file directives, so put out file and lineno.
1254 We have to do that before the .ent directive as we cannot switch
1255 files within procedures with native ecoff because line numbers are
1256 linked to procedure descriptors.
1257 Outputting the lineno helps debugging of one line functions as they
1258 would otherwise get no line number at all. Please note that we would
1259 like to put out last_linenum from final.c, but it is not accesible. */
1261 if (write_symbols
== SDB_DEBUG
)
1263 ASM_OUTPUT_SOURCE_FILENAME (file
,
1264 DECL_SOURCE_FILE (current_function_decl
));
1265 if (debug_info_level
!= DINFO_LEVEL_TERSE
)
1266 ASM_OUTPUT_SOURCE_LINE (file
,
1267 DECL_SOURCE_LINE (current_function_decl
));
1270 /* The assembly language programmer's guide states that the second argument
1271 to the .ent directive, the lex_level, is ignored by the assembler,
1272 so we might as well omit it. */
1274 fprintf (file
, "\t.ent ");
1275 assemble_name (file
, alpha_function_name
);
1276 fprintf (file
, "\n");
1277 ASM_OUTPUT_LABEL (file
, alpha_function_name
);
1278 inside_function
= TRUE
;
1280 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1282 alpha_auto_offset
= -frame_size
+ current_function_pretend_args_size
;
1283 alpha_arg_offset
= -frame_size
+ 48;
1285 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1286 Even if we are a static function, we still need to do this in case
1287 our address is taken and passed to something like qsort. */
1289 alpha_function_needs_gp
= 0;
1290 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1291 if ((GET_CODE (insn
) == CALL_INSN
)
1292 || (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1293 && GET_CODE (PATTERN (insn
)) != USE
1294 && GET_CODE (PATTERN (insn
)) != CLOBBER
1295 && (get_attr_type (insn
) == TYPE_LDSYM
1296 || get_attr_type (insn
) == TYPE_ISUBR
)))
1298 alpha_function_needs_gp
= 1;
1302 if (alpha_function_needs_gp
)
1303 fprintf (file
, "\tldgp $29,0($27)\n");
1305 /* Put a label after the GP load so we can enter the function at it. */
1306 assemble_name (file
, alpha_function_name
);
1307 fprintf (file
, "..ng:\n");
1309 /* Adjust the stack by the frame size. If the frame size is > 4096
1310 bytes, we need to be sure we probe somewhere in the first and last
1311 4096 bytes (we can probably get away without the latter test) and
1312 every 8192 bytes in between. If the frame size is > 32768, we
1313 do this in a loop. Otherwise, we generate the explicit probe
1316 Note that we are only allowed to adjust sp once in the prologue. */
1318 if (frame_size
< 32768)
1320 if (frame_size
> 4096)
1323 int regnum
= 2; /* $1 is static chain, so start with $2. */
1325 fprintf (file
, "\tldq $%d,-%d($30)\n", regnum
++, probed
);
1327 while (probed
+ 8192 < frame_size
)
1328 fprintf (file
, "\tldq $%d,-%d($30)\n", regnum
++, probed
+= 8192);
1330 /* We only have to do this probe if we aren't saving registers. */
1331 if (sa_size
== 0 && probed
+ 4096 < frame_size
)
1332 fprintf (file
, "\tldq $%d,-%d($30)\n", regnum
++, probed
+= 4096);
1338 if (frame_size
!= 0)
1339 fprintf (file
, "\tlda $30,-%d($30)\n", frame_size
);
1343 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1344 number of 8192 byte blocks to probe. We then probe each block
1345 in the loop and then set SP to the proper location. If the
1346 amount remaining is > 4096, we have to do one more probe if we
1347 are not saving any registers. */
1349 HOST_WIDE_INT blocks
= (frame_size
+ 4096) / 8192;
1350 HOST_WIDE_INT leftover
= frame_size
+ 4096 - blocks
* 8192;
1352 add_long_const (file
, blocks
, 31, 5, 5);
1354 fprintf (file
, "\tlda $4,4096($30)\n");
1356 assemble_name (file
, alpha_function_name
);
1357 fprintf (file
, "..sc:\n");
1359 fprintf (file
, "\tldq $6,-8192($4)\n");
1360 fprintf (file
, "\tsubq $5,1,$5\n");
1361 fprintf (file
, "\tlda $4,-8192($4)\n");
1363 fprintf (file
, "\tbne $5,");
1364 assemble_name (file
, alpha_function_name
);
1365 fprintf (file
, "..sc\n");
1367 fprintf (file
, "\tlda $30,-%d($4)\n", leftover
);
1369 if (leftover
> 4096 && sa_size
== 0)
1370 fprintf (file
, "\tldq $2,%d($30)\n", leftover
- 4096);
1373 /* Describe our frame. */
1374 fprintf (file
, "\t.frame $%d,%d,$26,%d\n",
1375 (frame_pointer_needed
1376 ? HARD_FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
),
1377 frame_size
, current_function_pretend_args_size
);
1379 /* Save register 26 if any other register needs to be saved. */
1382 reg_mask
|= 1 << 26;
1383 fprintf (file
, "\tstq $26,%d($30)\n", reg_offset
);
1385 int_reg_save_area_size
+= 8;
1388 /* Now save any other used integer registers required to be saved. */
1389 for (i
= 0; i
< 32; i
++)
1390 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
] && i
!= 26)
1393 fprintf (file
, "\tstq $%d,%d($30)\n", i
, reg_offset
);
1395 int_reg_save_area_size
+= 8;
1398 /* Print the register mask and do floating-point saves. */
1400 fprintf (file
, "\t.mask 0x%x,%d\n", reg_mask
,
1401 actual_start_reg_offset
- frame_size
);
1403 start_reg_offset
= reg_offset
;
1406 for (i
= 0; i
< 32; i
++)
1407 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1408 && regs_ever_live
[i
+ 32])
1411 fprintf (file
, "\tstt $f%d,%d($30)\n", i
, reg_offset
);
1415 /* Print the floating-point mask, if we've saved any fp register. */
1417 fprintf (file
, "\t.fmask 0x%x,%d\n", reg_mask
,
1418 actual_start_reg_offset
- frame_size
+ int_reg_save_area_size
);
1420 /* If we need a frame pointer, set it from the stack pointer. Note that
1421 this must always be the last instruction in the prologue. */
1422 if (frame_pointer_needed
)
1423 fprintf (file
, "\tbis $30,$30,$15\n");
1425 /* End the prologue and say if we used gp. */
1426 fprintf (file
, "\t.prologue %d\n", alpha_function_needs_gp
);
1429 /* Write function epilogue. */
1432 output_epilog (file
, size
)
1436 rtx insn
= get_last_insn ();
1437 HOST_WIDE_INT out_args_size
1438 = ALPHA_ROUND (current_function_outgoing_args_size
);
1439 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1440 HOST_WIDE_INT frame_size
1441 = (out_args_size
+ sa_size
1442 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1443 HOST_WIDE_INT reg_offset
= out_args_size
;
1444 HOST_WIDE_INT frame_size_from_reg_save
= frame_size
- reg_offset
;
1446 = frame_pointer_needed
&& regs_ever_live
[HARD_FRAME_POINTER_REGNUM
];
1449 /* If the last insn was a BARRIER, we don't have to write anything except
1450 the .end pseudo-op. */
1451 if (GET_CODE (insn
) == NOTE
)
1452 insn
= prev_nonnote_insn (insn
);
1453 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1457 /* If we have a frame pointer, restore SP from it. */
1458 if (frame_pointer_needed
)
1459 fprintf (file
, "\tbis $15,$15,$30\n");
1461 /* Restore all the registers, starting with the return address
1465 fprintf (file
, "\tldq $26,%d($30)\n", reg_offset
);
1469 /* Now restore any other used integer registers that that we saved,
1470 except for FP if it is being used as FP, since it must be
1473 for (i
= 0; i
< 32; i
++)
1474 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
]
1477 if (i
== HARD_FRAME_POINTER_REGNUM
&& frame_pointer_needed
)
1478 fp_offset
= reg_offset
;
1480 fprintf (file
, "\tldq $%d,%d($30)\n", i
, reg_offset
);
1484 for (i
= 0; i
< 32; i
++)
1485 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1486 && regs_ever_live
[i
+ 32])
1488 fprintf (file
, "\tldt $f%d,%d($30)\n", i
, reg_offset
);
1492 /* If the stack size is large and we have a frame pointer, compute the
1493 size of the stack into a register because the old FP restore, stack
1494 pointer adjust, and return are required to be consecutive
1496 if (frame_size
> 32767 && restore_fp
)
1497 add_long_const (file
, frame_size
, 31, 1, 1);
1499 /* If we needed a frame pointer and we have to restore it, do it
1500 now. This must be done in one instruction immediately
1501 before the SP update. */
1503 fprintf (file
, "\tldq $15,%d($30)\n", fp_offset
);
1505 /* Now update the stack pointer, if needed. Only one instruction must
1506 modify the stack pointer. It must be the last instruction in the
1507 sequence and must be an ADDQ or LDA instruction. If the frame
1508 pointer was loaded above, we may only put one instruction here. */
1510 if (frame_size
> 32768 && restore_fp
)
1511 fprintf (file
, "\taddq $1,$30,$30\n");
1513 add_long_const (file
, frame_size
, 30, 30, 1);
1515 /* Finally return to the caller. */
1516 fprintf (file
, "\tret $31,($26),1\n");
1519 /* End the function. */
1520 fprintf (file
, "\t.end ");
1521 assemble_name (file
, alpha_function_name
);
1522 fprintf (file
, "\n");
1523 inside_function
= FALSE
;
1525 /* Show that we know this function if it is called again. */
1526 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl
), 0)) = 1;
1529 /* Debugging support. */
1533 /* Count the number of sdb related labels are generated (to find block
1534 start and end boundaries). */
1536 int sdb_label_count
= 0;
1538 /* Next label # for each statement. */
1540 static int sym_lineno
= 0;
1542 /* Count the number of .file directives, so that .loc is up to date. */
1544 static int num_source_filenames
= 0;
1546 /* Name of the file containing the current function. */
1548 static char *current_function_file
= "";
1550 /* Offsets to alpha virtual arg/local debugging pointers. */
1552 long alpha_arg_offset
;
1553 long alpha_auto_offset
;
1555 /* Emit a new filename to a stream. */
1558 alpha_output_filename (stream
, name
)
1562 static int first_time
= TRUE
;
1563 char ltext_label_name
[100];
1568 ++num_source_filenames
;
1569 current_function_file
= name
;
1570 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1571 output_quoted_string (stream
, name
);
1572 fprintf (stream
, "\n");
1573 if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1574 fprintf (stream
, "\t#@stabs\n");
1577 else if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1579 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name
, "Ltext", 0);
1580 fprintf (stream
, "%s ", ASM_STABS_OP
);
1581 output_quoted_string (stream
, name
);
1582 fprintf (stream
, ",%d,0,0,%s\n", N_SOL
, <ext_label_name
[1]);
1585 else if (name
!= current_function_file
1586 && strcmp (name
, current_function_file
) != 0)
1588 if (inside_function
&& ! TARGET_GAS
)
1589 fprintf (stream
, "\t#.file\t%d ", num_source_filenames
);
1592 ++num_source_filenames
;
1593 current_function_file
= name
;
1594 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1597 output_quoted_string (stream
, name
);
1598 fprintf (stream
, "\n");
1602 /* Emit a linenumber to a stream. */
1605 alpha_output_lineno (stream
, line
)
1609 if (! TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1611 /* mips-tfile doesn't understand .stabd directives. */
1613 fprintf (stream
, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1614 sym_lineno
, ASM_STABN_OP
, N_SLINE
, line
, sym_lineno
);
1617 fprintf (stream
, "\n\t.loc\t%d %d\n", num_source_filenames
, line
);