1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
40 /* Save information from a "cmpxx" operation until the branch or scc is
43 rtx alpha_compare_op0
, alpha_compare_op1
;
44 int alpha_compare_fp_p
;
46 /* Save the name of the current function as used by the assembler. This
47 is used by the epilogue. */
49 char *alpha_function_name
;
51 /* Non-zero if inside of a function, because the Alpha asm can't
52 handle .files inside of functions. */
54 static int inside_function
= FALSE
;
56 /* Nonzero if the current function needs gp. */
58 int alpha_function_needs_gp
;
60 extern char *version_string
;
62 /* Declarations of static functions. */
63 static void alpha_set_memflags_1
PROTO((rtx
, int, int, int));
64 static void add_long_const
PROTO((FILE *, HOST_WIDE_INT
, int, int, int));
66 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
74 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
76 if ((value
& 0xff) != 0 && (value
& 0xff) != 0xff)
82 /* Returns 1 if OP is either the constant zero or a register. If a
83 register, it must be in the proper mode unless MODE is VOIDmode. */
86 reg_or_0_operand (op
, mode
)
88 enum machine_mode mode
;
90 return op
== const0_rtx
|| register_operand (op
, mode
);
93 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
97 reg_or_6bit_operand (op
, mode
)
99 enum machine_mode mode
;
101 return ((GET_CODE (op
) == CONST_INT
102 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64)
103 || register_operand (op
, mode
));
107 /* Return 1 if OP is an 8-bit constant or any register. */
110 reg_or_8bit_operand (op
, mode
)
112 enum machine_mode mode
;
114 return ((GET_CODE (op
) == CONST_INT
115 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100)
116 || register_operand (op
, mode
));
119 /* Return 1 if OP is an 8-bit constant. */
122 cint8_operand (op
, mode
)
124 enum machine_mode mode
;
126 return (GET_CODE (op
) == CONST_INT
127 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100);
130 /* Return 1 if the operand is a valid second operand to an add insn. */
133 add_operand (op
, mode
)
135 enum machine_mode mode
;
137 if (GET_CODE (op
) == CONST_INT
)
138 return ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) < 0x10000
139 || ((INTVAL (op
) & 0xffff) == 0
140 && (INTVAL (op
) >> 31 == -1
141 || INTVAL (op
) >> 31 == 0)));
143 return register_operand (op
, mode
);
146 /* Return 1 if the operand is a valid second operand to a sign-extending
150 sext_add_operand (op
, mode
)
152 enum machine_mode mode
;
154 if (GET_CODE (op
) == CONST_INT
)
155 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 255
156 || (unsigned HOST_WIDE_INT
) (- INTVAL (op
)) < 255);
158 return register_operand (op
, mode
);
161 /* Return 1 if OP is the constant 4 or 8. */
164 const48_operand (op
, mode
)
166 enum machine_mode mode
;
168 return (GET_CODE (op
) == CONST_INT
169 && (INTVAL (op
) == 4 || INTVAL (op
) == 8));
172 /* Return 1 if OP is a valid first operand to an AND insn. */
175 and_operand (op
, mode
)
177 enum machine_mode mode
;
179 if (GET_CODE (op
) == CONST_DOUBLE
&& GET_MODE (op
) == VOIDmode
)
180 return (zap_mask (CONST_DOUBLE_LOW (op
))
181 && zap_mask (CONST_DOUBLE_HIGH (op
)));
183 if (GET_CODE (op
) == CONST_INT
)
184 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
185 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100
186 || zap_mask (INTVAL (op
)));
188 return register_operand (op
, mode
);
191 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
194 or_operand (op
, mode
)
196 enum machine_mode mode
;
198 if (GET_CODE (op
) == CONST_INT
)
199 return ((unsigned HOST_WIDE_INT
) INTVAL (op
) < 0x100
200 || (unsigned HOST_WIDE_INT
) ~ INTVAL (op
) < 0x100);
202 return register_operand (op
, mode
);
205 /* Return 1 if OP is a constant that is the width, in bits, of an integral
206 mode smaller than DImode. */
209 mode_width_operand (op
, mode
)
211 enum machine_mode mode
;
213 return (GET_CODE (op
) == CONST_INT
214 && (INTVAL (op
) == 8 || INTVAL (op
) == 16 || INTVAL (op
) == 32));
217 /* Return 1 if OP is a constant that is the width of an integral machine mode
218 smaller than an integer. */
221 mode_mask_operand (op
, mode
)
223 enum machine_mode mode
;
225 #if HOST_BITS_PER_WIDE_INT == 32
226 if (GET_CODE (op
) == CONST_DOUBLE
)
227 return CONST_DOUBLE_HIGH (op
) == 0 && CONST_DOUBLE_LOW (op
) == -1;
230 return (GET_CODE (op
) == CONST_INT
231 && (INTVAL (op
) == 0xff
232 || INTVAL (op
) == 0xffff
233 #if HOST_BITS_PER_WIDE_INT == 64
234 || INTVAL (op
) == 0xffffffff
239 /* Return 1 if OP is a multiple of 8 less than 64. */
242 mul8_operand (op
, mode
)
244 enum machine_mode mode
;
246 return (GET_CODE (op
) == CONST_INT
247 && (unsigned HOST_WIDE_INT
) INTVAL (op
) < 64
248 && (INTVAL (op
) & 7) == 0);
251 /* Return 1 if OP is the constant zero in floating-point. */
254 fp0_operand (op
, mode
)
256 enum machine_mode mode
;
258 return (GET_MODE (op
) == mode
259 && GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
));
262 /* Return 1 if OP is the floating-point constant zero or a register. */
265 reg_or_fp0_operand (op
, mode
)
267 enum machine_mode mode
;
269 return fp0_operand (op
, mode
) || register_operand (op
, mode
);
272 /* Return 1 if OP is a register or a constant integer. */
276 reg_or_cint_operand (op
, mode
)
278 enum machine_mode mode
;
280 return GET_CODE (op
) == CONST_INT
|| register_operand (op
, mode
);
283 /* Return 1 if OP is something that can be reloaded into a register;
284 if it is a MEM, it need not be valid. */
287 some_operand (op
, mode
)
289 enum machine_mode mode
;
291 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
294 switch (GET_CODE (op
))
296 case REG
: case MEM
: case CONST_DOUBLE
:
297 case CONST_INT
: case LABEL_REF
: case SYMBOL_REF
: case CONST
:
301 return some_operand (SUBREG_REG (op
), VOIDmode
);
307 /* Return 1 if OP is a valid operand for the source of a move insn. */
310 input_operand (op
, mode
)
312 enum machine_mode mode
;
314 if (mode
!= VOIDmode
&& GET_MODE (op
) != VOIDmode
&& mode
!= GET_MODE (op
))
317 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& GET_MODE (op
) != mode
)
320 switch (GET_CODE (op
))
325 /* This handles both the Windows/NT and OSF cases. */
326 return mode
== ptr_mode
|| mode
== DImode
;
332 if (register_operand (op
, mode
))
334 /* ... fall through ... */
336 return mode
!= HImode
&& mode
!= QImode
&& general_operand (op
, mode
);
339 return GET_MODE_CLASS (mode
) == MODE_FLOAT
&& op
== CONST0_RTX (mode
);
342 return mode
== QImode
|| mode
== HImode
|| add_operand (op
, mode
);
348 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
352 current_file_function_operand (op
, mode
)
354 enum machine_mode mode
;
356 return (GET_CODE (op
) == SYMBOL_REF
357 && (SYMBOL_REF_FLAG (op
)
358 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
361 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
364 call_operand (op
, mode
)
366 enum machine_mode mode
;
371 return (GET_CODE (op
) == SYMBOL_REF
372 || (GET_CODE (op
) == REG
373 && (REGNO (op
) == 27 || WINDOWS_NT
)));
376 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
377 comparisons are valid in which insn. */
380 alpha_comparison_operator (op
, mode
)
382 enum machine_mode mode
;
384 enum rtx_code code
= GET_CODE (op
);
386 if (mode
!= GET_MODE (op
) || GET_RTX_CLASS (code
) != '<')
389 return (code
== EQ
|| code
== LE
|| code
== LT
390 || (mode
== DImode
&& (code
== LEU
|| code
== LTU
)));
393 /* Return 1 if OP is a signed comparison operation. */
396 signed_comparison_operator (op
, mode
)
398 enum machine_mode mode
;
400 switch (GET_CODE (op
))
402 case EQ
: case NE
: case LE
: case LT
: case GE
: case GT
:
409 /* Return 1 if this is a divide or modulus operator. */
412 divmod_operator (op
, mode
)
414 enum machine_mode mode
;
416 switch (GET_CODE (op
))
418 case DIV
: case MOD
: case UDIV
: case UMOD
:
425 /* Return 1 if this memory address is a known aligned register plus
426 a constant. It must be a valid address. This means that we can do
427 this as an aligned reference plus some offset.
429 Take into account what reload will do.
431 We could say that out-of-range stack slots are alignable, but that would
432 complicate get_aligned_mem and it isn't worth the trouble since few
433 functions have large stack space. */
436 aligned_memory_operand (op
, mode
)
438 enum machine_mode mode
;
440 if (GET_CODE (op
) == SUBREG
)
442 if (GET_MODE (op
) != mode
)
444 op
= SUBREG_REG (op
);
445 mode
= GET_MODE (op
);
448 if (reload_in_progress
&& GET_CODE (op
) == REG
449 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
450 op
= reg_equiv_mem
[REGNO (op
)];
452 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
453 || ! memory_address_p (mode
, XEXP (op
, 0)))
458 if (GET_CODE (op
) == PLUS
)
461 return (GET_CODE (op
) == REG
462 && (REGNO (op
) == STACK_POINTER_REGNUM
463 || op
== hard_frame_pointer_rtx
464 || (REGNO (op
) >= FIRST_VIRTUAL_REGISTER
465 && REGNO (op
) <= LAST_VIRTUAL_REGISTER
)));
468 /* Similar, but return 1 if OP is a MEM which is not alignable. */
471 unaligned_memory_operand (op
, mode
)
473 enum machine_mode mode
;
475 if (GET_CODE (op
) == SUBREG
)
477 if (GET_MODE (op
) != mode
)
479 op
= SUBREG_REG (op
);
480 mode
= GET_MODE (op
);
483 if (reload_in_progress
&& GET_CODE (op
) == REG
484 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
485 op
= reg_equiv_mem
[REGNO (op
)];
487 if (GET_CODE (op
) != MEM
|| GET_MODE (op
) != mode
)
492 if (! memory_address_p (mode
, op
))
495 if (GET_CODE (op
) == PLUS
)
498 return (GET_CODE (op
) != REG
499 || (REGNO (op
) != STACK_POINTER_REGNUM
500 && op
!= hard_frame_pointer_rtx
501 && (REGNO (op
) < FIRST_VIRTUAL_REGISTER
502 || REGNO (op
) > LAST_VIRTUAL_REGISTER
)));
505 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
508 any_memory_operand (op
, mode
)
510 enum machine_mode mode
;
512 return (GET_CODE (op
) == MEM
513 || (GET_CODE (op
) == SUBREG
&& GET_CODE (SUBREG_REG (op
)) == REG
)
514 || (reload_in_progress
&& GET_CODE (op
) == REG
515 && REGNO (op
) >= FIRST_PSEUDO_REGISTER
)
516 || (reload_in_progress
&& GET_CODE (op
) == SUBREG
517 && GET_CODE (SUBREG_REG (op
)) == REG
518 && REGNO (SUBREG_REG (op
)) >= FIRST_PSEUDO_REGISTER
));
521 /* REF is an alignable memory location. Place an aligned SImode
522 reference into *PALIGNED_MEM and the number of bits to shift into
526 get_aligned_mem (ref
, paligned_mem
, pbitnum
)
528 rtx
*paligned_mem
, *pbitnum
;
531 HOST_WIDE_INT offset
= 0;
533 if (GET_CODE (ref
) == SUBREG
)
535 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
536 if (BYTES_BIG_ENDIAN
)
537 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
538 - MIN (UNITS_PER_WORD
,
539 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
540 ref
= SUBREG_REG (ref
);
543 if (GET_CODE (ref
) == REG
)
544 ref
= reg_equiv_mem
[REGNO (ref
)];
546 if (reload_in_progress
)
547 base
= find_replacement (&XEXP (ref
, 0));
549 base
= XEXP (ref
, 0);
551 if (GET_CODE (base
) == PLUS
)
552 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
554 *paligned_mem
= gen_rtx (MEM
, SImode
,
555 plus_constant (base
, offset
& ~3));
556 MEM_IN_STRUCT_P (*paligned_mem
) = MEM_IN_STRUCT_P (ref
);
557 MEM_VOLATILE_P (*paligned_mem
) = MEM_VOLATILE_P (ref
);
558 RTX_UNCHANGING_P (*paligned_mem
) = RTX_UNCHANGING_P (ref
);
560 *pbitnum
= GEN_INT ((offset
& 3) * 8);
563 /* Similar, but just get the address. Handle the two reload cases. */
566 get_unaligned_address (ref
)
570 HOST_WIDE_INT offset
= 0;
572 if (GET_CODE (ref
) == SUBREG
)
574 offset
= SUBREG_WORD (ref
) * UNITS_PER_WORD
;
575 if (BYTES_BIG_ENDIAN
)
576 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (ref
)))
577 - MIN (UNITS_PER_WORD
,
578 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref
)))));
579 ref
= SUBREG_REG (ref
);
582 if (GET_CODE (ref
) == REG
)
583 ref
= reg_equiv_mem
[REGNO (ref
)];
585 if (reload_in_progress
)
586 base
= find_replacement (&XEXP (ref
, 0));
588 base
= XEXP (ref
, 0);
590 if (GET_CODE (base
) == PLUS
)
591 offset
+= INTVAL (XEXP (base
, 1)), base
= XEXP (base
, 0);
593 return plus_constant (base
, offset
);
596 /* Subfunction of the following function. Update the flags of any MEM
597 found in part of X. */
600 alpha_set_memflags_1 (x
, in_struct_p
, volatile_p
, unchanging_p
)
602 int in_struct_p
, volatile_p
, unchanging_p
;
606 switch (GET_CODE (x
))
610 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
611 alpha_set_memflags_1 (XVECEXP (x
, 0, i
), in_struct_p
, volatile_p
,
616 alpha_set_memflags_1 (PATTERN (x
), in_struct_p
, volatile_p
,
621 alpha_set_memflags_1 (SET_DEST (x
), in_struct_p
, volatile_p
,
623 alpha_set_memflags_1 (SET_SRC (x
), in_struct_p
, volatile_p
,
628 MEM_IN_STRUCT_P (x
) = in_struct_p
;
629 MEM_VOLATILE_P (x
) = volatile_p
;
630 RTX_UNCHANGING_P (x
) = unchanging_p
;
635 /* Given INSN, which is either an INSN or a SEQUENCE generated to
636 perform a memory operation, look for any MEMs in either a SET_DEST or
637 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
638 REF into each of the MEMs found. If REF is not a MEM, don't do
642 alpha_set_memflags (insn
, ref
)
646 /* Note that it is always safe to get these flags, though they won't
647 be what we think if REF is not a MEM. */
648 int in_struct_p
= MEM_IN_STRUCT_P (ref
);
649 int volatile_p
= MEM_VOLATILE_P (ref
);
650 int unchanging_p
= RTX_UNCHANGING_P (ref
);
652 if (GET_CODE (ref
) != MEM
653 || (! in_struct_p
&& ! volatile_p
&& ! unchanging_p
))
656 alpha_set_memflags_1 (insn
, in_struct_p
, volatile_p
, unchanging_p
);
659 /* Try to output insns to set TARGET equal to the constant C if it can be
660 done in less than N insns. Returns 1 if it can be done and the
661 insns have been emitted. If it would take more than N insns, zero is
662 returned and no insns and emitted. */
665 alpha_emit_set_const (target
, c
, n
)
670 HOST_WIDE_INT
new = c
;
673 #if HOST_BITS_PER_WIDE_INT == 64
674 /* We are only called for SImode and DImode. If this is SImode, ensure that
675 we are sign extended to a full word. This does not make any sense when
676 cross-compiling on a narrow machine. */
678 if (GET_MODE (target
) == SImode
)
679 c
= (c
& 0xffffffff) - 2 * (c
& 0x80000000);
682 /* If this is a sign-extended 32-bit constant, we can do this in at most
683 three insns, so do it if we have enough insns left. We always have
684 a sign-extended 32-bit constant when compiling on a narrow machine. */
686 if (HOST_BITS_PER_WIDE_INT
!= 64
687 || c
>> 31 == -1 || c
>> 31 == 0)
689 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
690 HOST_WIDE_INT tmp1
= c
- low
;
692 = ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
693 HOST_WIDE_INT extra
= 0;
695 /* If HIGH will be interpreted as negative but the constant is
696 positive, we must adjust it to do two ldha insns. */
698 if ((high
& 0x8000) != 0 && c
>= 0)
702 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
705 if (c
== low
|| (low
== 0 && extra
== 0))
707 emit_move_insn (target
, GEN_INT (c
));
710 else if (n
>= 2 + (extra
!= 0))
712 emit_move_insn (target
, GEN_INT (low
));
714 emit_insn (gen_add2_insn (target
, GEN_INT (extra
<< 16)));
716 emit_insn (gen_add2_insn (target
, GEN_INT (high
<< 16)));
721 /* If we couldn't do it that way, try some other methods (that depend on
722 being able to compute in the target's word size). But if we have no
723 instructions left, don't bother. Also, don't even try if this is
724 SImode (in which case we should have already done something, but
725 do a sanity check here). */
727 if (n
== 1 || HOST_BITS_PER_WIDE_INT
< 64 || GET_MODE (target
) != DImode
)
730 /* First, see if can load a value into the target that is the same as the
731 constant except that all bytes that are 0 are changed to be 0xff. If we
732 can, then we can do a ZAPNOT to obtain the desired constant. */
734 for (i
= 0; i
< 64; i
+= 8)
735 if ((new & ((HOST_WIDE_INT
) 0xff << i
)) == 0)
736 new |= (HOST_WIDE_INT
) 0xff << i
;
738 if (alpha_emit_set_const (target
, new, n
- 1))
740 emit_insn (gen_anddi3 (target
, target
, GEN_INT (c
| ~ new)));
744 /* Find, see if we can load a related constant and then shift and possibly
745 negate it to get the constant we want. Try this once each increasing
748 for (i
= 1; i
< n
; i
++)
750 /* First try complementing. */
751 if (alpha_emit_set_const (target
, ~ c
, i
))
753 emit_insn (gen_one_cmpldi2 (target
, target
));
757 /* First try to form a constant and do a left shift. We can do this
758 if some low-order bits are zero; the exact_log2 call below tells
759 us that information. The bits we are shifting out could be any
760 value, but here we'll just try the 0- and sign-extended forms of
761 the constant. To try to increase the chance of having the same
762 constant in more than one insn, start at the highest number of
763 bits to shift, but try all possibilities in case a ZAPNOT will
766 if ((bits
= exact_log2 (c
& - c
)) > 0)
767 for (; bits
> 0; bits
--)
768 if (alpha_emit_set_const (target
, c
>> bits
, i
)
769 || alpha_emit_set_const (target
,
770 ((unsigned HOST_WIDE_INT
) c
) >> bits
,
773 emit_insn (gen_ashldi3 (target
, target
, GEN_INT (bits
)));
777 /* Now try high-order zero bits. Here we try the shifted-in bits as
778 all zero and all ones. */
780 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (c
) - 1) > 0)
781 for (; bits
> 0; bits
--)
782 if (alpha_emit_set_const (target
, c
<< bits
, i
)
783 || alpha_emit_set_const (target
,
785 | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
788 emit_insn (gen_lshrdi3 (target
, target
, GEN_INT (bits
)));
792 /* Now try high-order 1 bits. We get that with a sign-extension.
793 But one bit isn't enough here. */
795 if ((bits
= HOST_BITS_PER_WIDE_INT
- floor_log2 (~ c
) - 2) > 0)
796 for (; bits
> 0; bits
--)
797 if (alpha_emit_set_const (target
, c
<< bits
, i
)
798 || alpha_emit_set_const (target
,
800 | (((HOST_WIDE_INT
) 1 << bits
) - 1)),
803 emit_insn (gen_ashrdi3 (target
, target
, GEN_INT (bits
)));
811 /* Adjust the cost of a scheduling dependency. Return the new cost of
812 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
815 alpha_adjust_cost (insn
, link
, dep_insn
, cost
)
823 /* If the dependence is an anti-dependence, there is no cost. For an
824 output dependence, there is sometimes a cost, but it doesn't seem
825 worth handling those few cases. */
827 if (REG_NOTE_KIND (link
) != 0)
830 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
831 we can sometimes lower the cost. */
833 if (recog_memoized (insn
) >= 0 && get_attr_type (insn
) == TYPE_ST
834 && (set
= single_set (dep_insn
)) != 0
835 && GET_CODE (PATTERN (insn
)) == SET
836 && rtx_equal_p (SET_DEST (set
), SET_SRC (PATTERN (insn
))))
837 switch (get_attr_type (dep_insn
))
840 /* No savings here. */
845 /* In these cases, we save one cycle. */
849 /* In all other cases, we save two cycles. */
850 return MAX (0, cost
- 4);
853 /* Another case that needs adjustment is an arithmetic or logical
854 operation. It's cost is usually one cycle, but we default it to
855 two in the MD file. The only case that it is actually two is
856 for the address in loads and stores. */
858 if (recog_memoized (dep_insn
) >= 0
859 && get_attr_type (dep_insn
) == TYPE_IADDLOG
)
860 switch (get_attr_type (insn
))
870 /* The final case is when a compare feeds into an integer branch. The cost
871 is only one cycle in that case. */
873 if (recog_memoized (dep_insn
) >= 0
874 && get_attr_type (dep_insn
) == TYPE_ICMP
875 && recog_memoized (insn
) >= 0
876 && get_attr_type (insn
) == TYPE_IBR
)
879 /* Otherwise, return the default cost. */
884 /* Print an operand. Recognize special options, documented below. */
887 print_operand (file
, x
, code
)
897 /* If this operand is the constant zero, write it as "$31". */
898 if (GET_CODE (x
) == REG
)
899 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
900 else if (x
== CONST0_RTX (GET_MODE (x
)))
901 fprintf (file
, "$31");
903 output_operand_lossage ("invalid %%r value");
908 /* Similar, but for floating-point. */
909 if (GET_CODE (x
) == REG
)
910 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
911 else if (x
== CONST0_RTX (GET_MODE (x
)))
912 fprintf (file
, "$f31");
914 output_operand_lossage ("invalid %%R value");
919 /* Write the 1's complement of a constant. */
920 if (GET_CODE (x
) != CONST_INT
)
921 output_operand_lossage ("invalid %%N value");
923 fprintf (file
, "%ld", ~ INTVAL (x
));
927 /* Write 1 << C, for a constant C. */
928 if (GET_CODE (x
) != CONST_INT
)
929 output_operand_lossage ("invalid %%P value");
931 fprintf (file
, "%ld", (HOST_WIDE_INT
) 1 << INTVAL (x
));
935 /* Write the high-order 16 bits of a constant, sign-extended. */
936 if (GET_CODE (x
) != CONST_INT
)
937 output_operand_lossage ("invalid %%h value");
939 fprintf (file
, "%ld", INTVAL (x
) >> 16);
943 /* Write the low-order 16 bits of a constant, sign-extended. */
944 if (GET_CODE (x
) != CONST_INT
)
945 output_operand_lossage ("invalid %%L value");
947 fprintf (file
, "%ld", (INTVAL (x
) & 0xffff) - 2 * (INTVAL (x
) & 0x8000));
951 /* Write mask for ZAP insn. */
952 if (GET_CODE (x
) == CONST_DOUBLE
)
954 HOST_WIDE_INT mask
= 0;
957 value
= CONST_DOUBLE_LOW (x
);
958 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
963 value
= CONST_DOUBLE_HIGH (x
);
964 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
/ HOST_BITS_PER_CHAR
;
967 mask
|= (1 << (i
+ sizeof (int)));
969 fprintf (file
, "%ld", mask
& 0xff);
972 else if (GET_CODE (x
) == CONST_INT
)
974 HOST_WIDE_INT mask
= 0, value
= INTVAL (x
);
976 for (i
= 0; i
< 8; i
++, value
>>= 8)
980 fprintf (file
, "%ld", mask
);
983 output_operand_lossage ("invalid %%m value");
987 /* 'b', 'w', or 'l' as the value of the constant. */
988 if (GET_CODE (x
) != CONST_INT
989 || (INTVAL (x
) != 8 && INTVAL (x
) != 16 && INTVAL (x
) != 32))
990 output_operand_lossage ("invalid %%M value");
993 INTVAL (x
) == 8 ? "b" : INTVAL (x
) == 16 ? "w" : "l");
997 /* Similar, except do it from the mask. */
998 if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xff)
1000 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffff)
1001 fprintf (file
, "w");
1002 #if HOST_BITS_PER_WIDE_INT == 32
1003 else if (GET_CODE (x
) == CONST_DOUBLE
1004 && CONST_DOUBLE_HIGH (x
) == 0
1005 && CONST_DOUBLE_LOW (x
) == -1)
1006 fprintf (file
, "l");
1008 else if (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0xffffffff)
1009 fprintf (file
, "l");
1012 output_operand_lossage ("invalid %%U value");
1016 /* Write the constant value divided by 8. */
1017 if (GET_CODE (x
) != CONST_INT
1018 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
1019 && (INTVAL (x
) & 7) != 8)
1020 output_operand_lossage ("invalid %%s value");
1022 fprintf (file
, "%ld", INTVAL (x
) / 8);
1026 /* Same, except compute (64 - c) / 8 */
1028 if (GET_CODE (x
) != CONST_INT
1029 && (unsigned HOST_WIDE_INT
) INTVAL (x
) >= 64
1030 && (INTVAL (x
) & 7) != 8)
1031 output_operand_lossage ("invalid %%s value");
1033 fprintf (file
, "%ld", (64 - INTVAL (x
)) / 8);
1037 /* Write out comparison name. */
1038 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1039 output_operand_lossage ("invalid %%C value");
1041 if (GET_CODE (x
) == LEU
)
1042 fprintf (file
, "ule");
1043 else if (GET_CODE (x
) == LTU
)
1044 fprintf (file
, "ult");
1046 fprintf (file
, "%s", GET_RTX_NAME (GET_CODE (x
)));
1050 /* Similar, but write reversed code. We can't get an unsigned code
1052 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1053 output_operand_lossage ("invalid %%D value");
1055 fprintf (file
, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x
))));
1059 /* Similar to `c', but swap. We can't get unsigned here either. */
1060 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1061 output_operand_lossage ("invalid %%D value");
1063 fprintf (file
, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x
))));
1067 /* Similar, but reverse and swap. We can't get unsigned here either. */
1068 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
1069 output_operand_lossage ("invalid %%D value");
1071 fprintf (file
, "%s",
1072 GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x
))))));
1076 /* Write the divide or modulus operator. */
1077 switch (GET_CODE (x
))
1080 fprintf (file
, "div%s", GET_MODE (x
) == SImode
? "l" : "q");
1083 fprintf (file
, "div%su", GET_MODE (x
) == SImode
? "l" : "q");
1086 fprintf (file
, "rem%s", GET_MODE (x
) == SImode
? "l" : "q");
1089 fprintf (file
, "rem%su", GET_MODE (x
) == SImode
? "l" : "q");
1092 output_operand_lossage ("invalid %%E value");
1098 /* Write "_u" for unaligned access. */
1099 if (GET_CODE (x
) == MEM
&& GET_CODE (XEXP (x
, 0)) == AND
)
1100 fprintf (file
, "_u");
1104 if (GET_CODE (x
) == REG
)
1105 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
1106 else if (GET_CODE (x
) == MEM
)
1107 output_address (XEXP (x
, 0));
1109 output_addr_const (file
, x
);
1113 output_operand_lossage ("invalid %%xn code");
1117 /* Do what is necessary for `va_start'. The argument is ignored;
1118 We look at the current function to determine if stdarg or varargs
1119 is used and fill in an initial va_list. A pointer to this constructor
1123 alpha_builtin_saveregs (arglist
)
1126 rtx block
, addr
, argsize
;
1127 tree fntype
= TREE_TYPE (current_function_decl
);
1128 int stdarg
= (TYPE_ARG_TYPES (fntype
) != 0
1129 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
1130 != void_type_node
));
1132 /* Compute the current position into the args, taking into account
1133 both registers and memory. Both of these are already included in
1134 current_function_args_info. */
1136 argsize
= GEN_INT (current_function_args_info
* UNITS_PER_WORD
);
1138 /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1139 storing fp arg registers in the first 48 bytes, and the integer arg
1140 registers in the next 48 bytes. This is only done, however, if any
1141 integer registers need to be stored.
1143 If no integer registers need be stored, then we must subtract 48 in
1144 order to account for the integer arg registers which are counted in
1145 argsize above, but which are not actually stored on the stack. */
1147 addr
= (current_function_args_info
<= 6
1148 ? plus_constant (virtual_incoming_args_rtx
, 6 * UNITS_PER_WORD
)
1149 : plus_constant (virtual_incoming_args_rtx
, - (6 * UNITS_PER_WORD
)));
1151 /* Allocate the va_list constructor */
1152 block
= assign_stack_local (BLKmode
, 2 * UNITS_PER_WORD
, BITS_PER_WORD
);
1153 RTX_UNCHANGING_P (block
) = 1;
1154 RTX_UNCHANGING_P (XEXP (block
, 0)) = 1;
1156 /* Store the address of the first integer register in the
1157 __va_base member. */
1158 emit_move_insn (change_address (block
, Pmode
, XEXP (block
, 0)),
1159 force_operand (addr
, NULL_RTX
));
1161 /* Store the argsize as the __va_offset member. */
1162 emit_move_insn (change_address (block
, Pmode
,
1163 plus_constant (XEXP (block
, 0),
1165 force_operand (argsize
, NULL_RTX
));
1167 /* Return the address of the va_list constructor, but don't put it in a
1168 register. Doing so would fail when not optimizing and produce worse
1169 code when optimizing. */
1170 return XEXP (block
, 0);
1173 /* This page contains routines that are used to determine what the function
1174 prologue and epilogue code will do and write them out. */
1176 /* Compute the size of the save area in the stack. */
1184 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1185 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
])
1188 /* If some registers were saved but not reg 26, reg 26 must also
1189 be saved, so leave space for it. */
1190 if (size
!= 0 && ! regs_ever_live
[26])
1193 /* Our size must be even (multiple of 16 bytes). */
1200 /* Return 1 if this function can directly return via $26. */
1205 return (reload_completed
&& alpha_sa_size () == 0
1206 && get_frame_size () == 0
1207 && current_function_outgoing_args_size
== 0
1208 && current_function_pretend_args_size
== 0);
1211 /* Write a version stamp. Don't write anything if we are running as a
1212 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1214 #if !defined(CROSS_COMPILE) && !defined(WINNT)
1219 alpha_write_verstamp (file
)
1225 fprintf (file
, "\t.verstamp %d %d ", MS_STAMP
, LS_STAMP
);
1226 for (p
= version_string
; *p
!= ' ' && *p
!= 0; p
++)
1227 fprintf (file
, "%c", *p
== '.' ? ' ' : *p
);
1228 fprintf (file
, "\n");
1232 /* Write code to add constant C to register number IN_REG (possibly 31)
1233 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1234 usually this will be OUT_REG, but should not be if OUT_REG is
1235 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1236 Write the code to FILE. */
1239 add_long_const (file
, c
, in_reg
, out_reg
, temp_reg
)
1242 int in_reg
, out_reg
, temp_reg
;
1244 HOST_WIDE_INT low
= (c
& 0xffff) - 2 * (c
& 0x8000);
1245 HOST_WIDE_INT tmp1
= c
- low
;
1246 HOST_WIDE_INT high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1247 HOST_WIDE_INT extra
= 0;
1249 /* We don't have code to write out constants larger than 32 bits. */
1250 #if HOST_BITS_PER_LONG_INT == 64
1251 if ((unsigned HOST_WIDE_INT
) c
>> 32 != 0)
1255 /* If HIGH will be interpreted as negative, we must adjust it to do two
1256 ldha insns. Note that we will never be building a negative constant
1263 high
= ((tmp1
>> 16) & 0xffff) - 2 * ((tmp1
>> 16) & 0x8000);
1268 int result_reg
= (extra
== 0 && high
== 0) ? out_reg
: temp_reg
;
1270 if (low
>= 0 && low
< 255)
1271 fprintf (file
, "\taddq $%d,%d,$%d\n", in_reg
, low
, result_reg
);
1273 fprintf (file
, "\tlda $%d,%d($%d)\n", result_reg
, low
, in_reg
);
1275 in_reg
= result_reg
;
1280 int result_reg
= (high
== 0) ? out_reg
: temp_reg
;
1282 fprintf (file
, "\tldah $%d,%d($%d)\n", result_reg
, extra
, in_reg
);
1283 in_reg
= result_reg
;
1287 fprintf (file
, "\tldah $%d,%d($%d)\n", out_reg
, high
, in_reg
);
1290 /* Write function prologue. */
1293 output_prolog (file
, size
)
1297 HOST_WIDE_INT out_args_size
1298 = ALPHA_ROUND (current_function_outgoing_args_size
);
1299 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1300 HOST_WIDE_INT frame_size
1301 = (out_args_size
+ sa_size
1302 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1303 HOST_WIDE_INT reg_offset
= out_args_size
;
1304 HOST_WIDE_INT start_reg_offset
= reg_offset
;
1305 HOST_WIDE_INT actual_start_reg_offset
= start_reg_offset
;
1306 int int_reg_save_area_size
= 0;
1308 unsigned reg_mask
= 0;
1311 /* Ecoff can handle multiple .file directives, so put out file and lineno.
1312 We have to do that before the .ent directive as we cannot switch
1313 files within procedures with native ecoff because line numbers are
1314 linked to procedure descriptors.
1315 Outputting the lineno helps debugging of one line functions as they
1316 would otherwise get no line number at all. Please note that we would
1317 like to put out last_linenum from final.c, but it is not accesible. */
1319 if (write_symbols
== SDB_DEBUG
)
1321 ASM_OUTPUT_SOURCE_FILENAME (file
,
1322 DECL_SOURCE_FILE (current_function_decl
));
1323 if (debug_info_level
!= DINFO_LEVEL_TERSE
)
1324 ASM_OUTPUT_SOURCE_LINE (file
,
1325 DECL_SOURCE_LINE (current_function_decl
));
1328 /* The assembly language programmer's guide states that the second argument
1329 to the .ent directive, the lex_level, is ignored by the assembler,
1330 so we might as well omit it. */
1332 fprintf (file
, "\t.ent ");
1333 assemble_name (file
, alpha_function_name
);
1334 fprintf (file
, "\n");
1335 ASM_OUTPUT_LABEL (file
, alpha_function_name
);
1336 inside_function
= TRUE
;
1338 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1340 alpha_auto_offset
= -frame_size
+ current_function_pretend_args_size
;
1341 alpha_arg_offset
= -frame_size
+ 48;
1343 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1344 Even if we are a static function, we still need to do this in case
1345 our address is taken and passed to something like qsort.
1347 We never need a GP for Windows/NT. */
1349 alpha_function_needs_gp
= 0;
1350 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
1351 if ((GET_CODE (insn
) == CALL_INSN
)
1352 || (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
1353 && GET_CODE (PATTERN (insn
)) != USE
1354 && GET_CODE (PATTERN (insn
)) != CLOBBER
1355 && (get_attr_type (insn
) == TYPE_LDSYM
1356 || get_attr_type (insn
) == TYPE_ISUBR
)))
1358 alpha_function_needs_gp
= 1;
1362 if (WINDOWS_NT
== 0)
1364 if (alpha_function_needs_gp
)
1365 fprintf (file
, "\tldgp $29,0($27)\n");
1367 /* Put a label after the GP load so we can enter the function at it. */
1368 assemble_name (file
, alpha_function_name
);
1369 fprintf (file
, "..ng:\n");
1372 /* Adjust the stack by the frame size. If the frame size is > 4096
1373 bytes, we need to be sure we probe somewhere in the first and last
1374 4096 bytes (we can probably get away without the latter test) and
1375 every 8192 bytes in between. If the frame size is > 32768, we
1376 do this in a loop. Otherwise, we generate the explicit probe
1379 Note that we are only allowed to adjust sp once in the prologue. */
1381 if (frame_size
< 32768)
1383 if (frame_size
> 4096)
1387 fprintf (file
, "\tstq $31,-%d($30)\n", probed
);
1389 while (probed
+ 8192 < frame_size
)
1390 fprintf (file
, "\tstq $31,-%d($30)\n", probed
+= 8192);
1392 /* We only have to do this probe if we aren't saving registers. */
1393 if (sa_size
== 0 && probed
+ 4096 < frame_size
)
1394 fprintf (file
, "\tstq $31,-%d($30)\n", frame_size
);
1397 if (frame_size
!= 0)
1398 fprintf (file
, "\tlda $30,-%d($30)\n", frame_size
);
1402 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1403 number of 8192 byte blocks to probe. We then probe each block
1404 in the loop and then set SP to the proper location. If the
1405 amount remaining is > 4096, we have to do one more probe if we
1406 are not saving any registers. */
1408 HOST_WIDE_INT blocks
= (frame_size
+ 4096) / 8192;
1409 HOST_WIDE_INT leftover
= frame_size
+ 4096 - blocks
* 8192;
1411 add_long_const (file
, blocks
, 31, 5, 5);
1413 fprintf (file
, "\tlda $4,4096($30)\n");
1415 assemble_name (file
, alpha_function_name
);
1416 fprintf (file
, "..sc:\n");
1418 fprintf (file
, "\tstq $31,-8192($4)\n");
1419 fprintf (file
, "\tsubq $5,1,$5\n");
1420 fprintf (file
, "\tlda $4,-8192($4)\n");
1422 fprintf (file
, "\tbne $5,");
1423 assemble_name (file
, alpha_function_name
);
1424 fprintf (file
, "..sc\n");
1426 if (leftover
> 4096 && sa_size
== 0)
1427 fprintf (file
, "\tstq $31,-%d($4)\n", leftover
);
1429 fprintf (file
, "\tlda $30,-%d($4)\n", leftover
);
1432 /* Describe our frame. */
1433 fprintf (file
, "\t.frame $%d,%d,$26,%d\n",
1434 (frame_pointer_needed
1435 ? HARD_FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
),
1436 frame_size
, current_function_pretend_args_size
);
1438 /* Save register 26 if any other register needs to be saved. */
1441 reg_mask
|= 1 << 26;
1442 fprintf (file
, "\tstq $26,%d($30)\n", reg_offset
);
1444 int_reg_save_area_size
+= 8;
1447 /* Now save any other used integer registers required to be saved. */
1448 for (i
= 0; i
< 32; i
++)
1449 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
] && i
!= 26)
1452 fprintf (file
, "\tstq $%d,%d($30)\n", i
, reg_offset
);
1454 int_reg_save_area_size
+= 8;
1457 /* Print the register mask and do floating-point saves. */
1459 fprintf (file
, "\t.mask 0x%x,%d\n", reg_mask
,
1460 actual_start_reg_offset
- frame_size
);
1462 start_reg_offset
= reg_offset
;
1465 for (i
= 0; i
< 32; i
++)
1466 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1467 && regs_ever_live
[i
+ 32])
1470 fprintf (file
, "\tstt $f%d,%d($30)\n", i
, reg_offset
);
1474 /* Print the floating-point mask, if we've saved any fp register. */
1476 fprintf (file
, "\t.fmask 0x%x,%d\n", reg_mask
,
1477 actual_start_reg_offset
- frame_size
+ int_reg_save_area_size
);
1479 /* If we need a frame pointer, set it from the stack pointer. Note that
1480 this must always be the last instruction in the prologue. */
1481 if (frame_pointer_needed
)
1482 fprintf (file
, "\tbis $30,$30,$15\n");
1484 /* End the prologue and say if we used gp. */
1485 fprintf (file
, "\t.prologue %d\n", alpha_function_needs_gp
);
1488 /* Write function epilogue. */
1491 output_epilog (file
, size
)
1495 rtx insn
= get_last_insn ();
1496 HOST_WIDE_INT out_args_size
1497 = ALPHA_ROUND (current_function_outgoing_args_size
);
1498 HOST_WIDE_INT sa_size
= alpha_sa_size ();
1499 HOST_WIDE_INT frame_size
1500 = (out_args_size
+ sa_size
1501 + ALPHA_ROUND (size
+ current_function_pretend_args_size
));
1502 HOST_WIDE_INT reg_offset
= out_args_size
;
1503 HOST_WIDE_INT frame_size_from_reg_save
= frame_size
- reg_offset
;
1505 = frame_pointer_needed
&& regs_ever_live
[HARD_FRAME_POINTER_REGNUM
];
1508 /* If the last insn was a BARRIER, we don't have to write anything except
1509 the .end pseudo-op. */
1510 if (GET_CODE (insn
) == NOTE
)
1511 insn
= prev_nonnote_insn (insn
);
1512 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
1516 /* If we have a frame pointer, restore SP from it. */
1517 if (frame_pointer_needed
)
1518 fprintf (file
, "\tbis $15,$15,$30\n");
1520 /* Restore all the registers, starting with the return address
1524 fprintf (file
, "\tldq $26,%d($30)\n", reg_offset
);
1528 /* Now restore any other used integer registers that that we saved,
1529 except for FP if it is being used as FP, since it must be
1532 for (i
= 0; i
< 32; i
++)
1533 if (! fixed_regs
[i
] && ! call_used_regs
[i
] && regs_ever_live
[i
]
1536 if (i
== HARD_FRAME_POINTER_REGNUM
&& frame_pointer_needed
)
1537 fp_offset
= reg_offset
;
1539 fprintf (file
, "\tldq $%d,%d($30)\n", i
, reg_offset
);
1543 for (i
= 0; i
< 32; i
++)
1544 if (! fixed_regs
[i
+ 32] && ! call_used_regs
[i
+ 32]
1545 && regs_ever_live
[i
+ 32])
1547 fprintf (file
, "\tldt $f%d,%d($30)\n", i
, reg_offset
);
1551 /* If the stack size is large and we have a frame pointer, compute the
1552 size of the stack into a register because the old FP restore, stack
1553 pointer adjust, and return are required to be consecutive
1555 if (frame_size
> 32767 && restore_fp
)
1556 add_long_const (file
, frame_size
, 31, 1, 1);
1558 /* If we needed a frame pointer and we have to restore it, do it
1559 now. This must be done in one instruction immediately
1560 before the SP update. */
1561 if (restore_fp
&& fp_offset
)
1562 fprintf (file
, "\tldq $15,%d($30)\n", fp_offset
);
1564 /* Now update the stack pointer, if needed. Only one instruction must
1565 modify the stack pointer. It must be the last instruction in the
1566 sequence and must be an ADDQ or LDA instruction. If the frame
1567 pointer was loaded above, we may only put one instruction here. */
1569 if (frame_size
> 32768 && restore_fp
)
1570 fprintf (file
, "\taddq $1,$30,$30\n");
1572 add_long_const (file
, frame_size
, 30, 30, 1);
1574 /* Finally return to the caller. */
1575 fprintf (file
, "\tret $31,($26),1\n");
1578 /* End the function. */
1579 fprintf (file
, "\t.end ");
1580 assemble_name (file
, alpha_function_name
);
1581 fprintf (file
, "\n");
1582 inside_function
= FALSE
;
1584 /* Show that we know this function if it is called again. */
1585 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl
), 0)) = 1;
1588 /* Debugging support. */
1592 /* Count the number of sdb related labels are generated (to find block
1593 start and end boundaries). */
1595 int sdb_label_count
= 0;
1597 /* Next label # for each statement. */
1599 static int sym_lineno
= 0;
1601 /* Count the number of .file directives, so that .loc is up to date. */
1603 static int num_source_filenames
= 0;
1605 /* Name of the file containing the current function. */
1607 static char *current_function_file
= "";
1609 /* Offsets to alpha virtual arg/local debugging pointers. */
1611 long alpha_arg_offset
;
1612 long alpha_auto_offset
;
1614 /* Emit a new filename to a stream. */
1617 alpha_output_filename (stream
, name
)
1621 static int first_time
= TRUE
;
1622 char ltext_label_name
[100];
1627 ++num_source_filenames
;
1628 current_function_file
= name
;
1629 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1630 output_quoted_string (stream
, name
);
1631 fprintf (stream
, "\n");
1632 if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1633 fprintf (stream
, "\t#@stabs\n");
1636 else if (!TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1638 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name
, "Ltext", 0);
1639 fprintf (stream
, "%s ", ASM_STABS_OP
);
1640 output_quoted_string (stream
, name
);
1641 fprintf (stream
, ",%d,0,0,%s\n", N_SOL
, <ext_label_name
[1]);
1644 else if (name
!= current_function_file
1645 && strcmp (name
, current_function_file
) != 0)
1647 if (inside_function
&& ! TARGET_GAS
)
1648 fprintf (stream
, "\t#.file\t%d ", num_source_filenames
);
1651 ++num_source_filenames
;
1652 current_function_file
= name
;
1653 fprintf (stream
, "\t.file\t%d ", num_source_filenames
);
1656 output_quoted_string (stream
, name
);
1657 fprintf (stream
, "\n");
1661 /* Emit a linenumber to a stream. */
1664 alpha_output_lineno (stream
, line
)
1668 if (! TARGET_GAS
&& write_symbols
== DBX_DEBUG
)
1670 /* mips-tfile doesn't understand .stabd directives. */
1672 fprintf (stream
, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1673 sym_lineno
, ASM_STABN_OP
, N_SLINE
, line
, sym_lineno
);
1676 fprintf (stream
, "\n\t.loc\t%d %d\n", num_source_filenames
, line
);