1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
56 else if (TARGET_CPU_EV5) \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
61 else /* Presumably ev4. */ \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
68 /* For C++ we need to ensure that __LANGUAGE_C_PLUS_PLUS is defined independent
69 of the source file extension. */
70 #define CPLUSPLUS_CPP_SPEC "\
71 -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus \
75 /* Write out the correct language type definition for the header files.
76 Unless we have assembler language, write out the symbols for C. */
79 %{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\
80 %{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\
81 %{!.S:%{!.cc:%{!.cxx:%{!.cpp:%{!.cp:%{!.c++:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}}}}\
83 %{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\
86 #ifndef CPP_SUBTARGET_SPEC
87 #define CPP_SUBTARGET_SPEC ""
90 #define WORD_SWITCH_TAKES_ARG(STR) \
91 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
93 /* Print subsidiary information on the compiler version in use. */
94 #define TARGET_VERSION
96 /* Run-time compilation parameters selecting different hardware subsets. */
98 /* Which processor to schedule for. The cpu attribute defines a list that
99 mirrors this list, so changes to alpha.md must be made at the same time. */
102 {PROCESSOR_EV4
, /* 2106[46]{a,} */
103 PROCESSOR_EV5
, /* 21164{a,pc,} */
104 PROCESSOR_EV6
}; /* 21264 */
106 extern enum processor_type alpha_cpu
;
108 enum alpha_trap_precision
110 ALPHA_TP_PROG
, /* No precision (default). */
111 ALPHA_TP_FUNC
, /* Trap contained within originating function. */
112 ALPHA_TP_INSN
/* Instruction accuracy and code is resumption safe. */
115 enum alpha_fp_rounding_mode
117 ALPHA_FPRM_NORM
, /* Normal rounding mode. */
118 ALPHA_FPRM_MINF
, /* Round towards minus-infinity. */
119 ALPHA_FPRM_CHOP
, /* Chopped rounding mode (towards 0). */
120 ALPHA_FPRM_DYN
/* Dynamic rounding mode. */
123 enum alpha_fp_trap_mode
125 ALPHA_FPTM_N
, /* Normal trap mode. */
126 ALPHA_FPTM_U
, /* Underflow traps enabled. */
127 ALPHA_FPTM_SU
, /* Software completion, w/underflow traps */
128 ALPHA_FPTM_SUI
/* Software completion, w/underflow & inexact traps */
131 extern int target_flags
;
133 extern enum alpha_trap_precision alpha_tp
;
134 extern enum alpha_fp_rounding_mode alpha_fprm
;
135 extern enum alpha_fp_trap_mode alpha_fptm
;
137 /* This means that floating-point support exists in the target implementation
138 of the Alpha architecture. This is usually the default. */
139 #define MASK_FP (1 << 0)
140 #define TARGET_FP (target_flags & MASK_FP)
142 /* This means that floating-point registers are allowed to be used. Note
143 that Alpha implementations without FP operations are required to
144 provide the FP registers. */
146 #define MASK_FPREGS (1 << 1)
147 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
149 /* This means that gas is used to process the assembler file. */
151 #define MASK_GAS (1 << 2)
152 #define TARGET_GAS (target_flags & MASK_GAS)
154 /* This means that we should mark procedures as IEEE conformant. */
156 #define MASK_IEEE_CONFORMANT (1 << 3)
157 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
159 /* This means we should be IEEE-compliant except for inexact. */
161 #define MASK_IEEE (1 << 4)
162 #define TARGET_IEEE (target_flags & MASK_IEEE)
164 /* This means we should be fully IEEE-compliant. */
166 #define MASK_IEEE_WITH_INEXACT (1 << 5)
167 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
169 /* This means we must construct all constants rather than emitting
170 them as literal data. */
172 #define MASK_BUILD_CONSTANTS (1 << 6)
173 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
175 /* This means we handle floating points in VAX F- (float)
176 or G- (double) Format. */
178 #define MASK_FLOAT_VAX (1 << 7)
179 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
181 /* This means that the processor has byte and half word loads and stores
182 (the BWX extension). */
184 #define MASK_BWX (1 << 8)
185 #define TARGET_BWX (target_flags & MASK_BWX)
187 /* This means that the processor has the MAX extension. */
188 #define MASK_MAX (1 << 9)
189 #define TARGET_MAX (target_flags & MASK_MAX)
191 /* This means that the processor has the FIX extension. */
192 #define MASK_FIX (1 << 10)
193 #define TARGET_FIX (target_flags & MASK_FIX)
195 /* This means that the processor has the CIX extension. */
196 #define MASK_CIX (1 << 11)
197 #define TARGET_CIX (target_flags & MASK_CIX)
199 /* This means use !literal style explicit relocations. */
200 #define MASK_EXPLICIT_RELOCS (1 << 12)
201 #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
203 /* This means use 16-bit relocations to .sdata/.sbss. */
204 #define MASK_SMALL_DATA (1 << 13)
205 #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA)
207 /* This means that the processor is an EV5, EV56, or PCA56.
208 Unlike alpha_cpu this is not affected by -mtune= setting. */
209 #define MASK_CPU_EV5 (1 << 28)
210 #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5)
212 /* Likewise for EV6. */
213 #define MASK_CPU_EV6 (1 << 29)
214 #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6)
216 /* This means we support the .arch directive in the assembler. Only
217 defined in TARGET_CPU_DEFAULT. */
218 #define MASK_SUPPORT_ARCH (1 << 30)
219 #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
221 /* These are for target os support and cannot be changed at runtime. */
222 #define TARGET_ABI_WINDOWS_NT 0
223 #define TARGET_ABI_OPEN_VMS 0
224 #define TARGET_ABI_UNICOSMK 0
225 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
226 && !TARGET_ABI_OPEN_VMS \
227 && !TARGET_ABI_UNICOSMK)
229 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
230 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
232 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
233 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
235 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
236 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
238 #ifndef TARGET_HAS_XFLOATING_LIBS
239 #define TARGET_HAS_XFLOATING_LIBS 0
241 #ifndef TARGET_PROFILING_NEEDS_GP
242 #define TARGET_PROFILING_NEEDS_GP 0
244 #ifndef TARGET_LD_BUGGY_LDGP
245 #define TARGET_LD_BUGGY_LDGP 0
247 #ifndef TARGET_FIXUP_EV5_PREFETCH
248 #define TARGET_FIXUP_EV5_PREFETCH 0
251 /* Macro to define tables used to set the flags.
252 This is a list in braces of pairs in braces,
253 each pair being { "NAME", VALUE }
254 where VALUE is the bits to set or minus the bits to clear.
255 An empty string NAME is used to identify the default VALUE. */
257 #define TARGET_SWITCHES \
258 { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \
259 {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \
260 {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \
261 {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \
262 N_("Do not use fp registers")}, \
263 {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \
264 {"gas", MASK_GAS, N_("Assume GAS")}, \
265 {"ieee-conformant", MASK_IEEE_CONFORMANT, \
266 N_("Request IEEE-conformant math library routines (OSF/1)")}, \
267 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \
268 N_("Emit IEEE-conformant code, without inexact exceptions")}, \
269 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \
270 N_("Emit IEEE-conformant code, with inexact exceptions")}, \
271 {"build-constants", MASK_BUILD_CONSTANTS, \
272 N_("Do not emit complex integer constants to read-only memory")}, \
273 {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \
274 {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \
275 {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \
276 {"no-bwx", -MASK_BWX, ""}, \
278 N_("Emit code for the motion video ISA extension")}, \
279 {"no-max", -MASK_MAX, ""}, \
281 N_("Emit code for the fp move and sqrt ISA extension")}, \
282 {"no-fix", -MASK_FIX, ""}, \
283 {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
284 {"no-cix", -MASK_CIX, ""}, \
285 {"explicit-relocs", MASK_EXPLICIT_RELOCS, \
286 N_("Emit code using explicit relocation directives")}, \
287 {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
288 {"small-data", MASK_SMALL_DATA, \
289 N_("Emit 16-bit relocations to the small data areas")}, \
290 {"large-data", -MASK_SMALL_DATA, \
291 N_("Emit 32-bit relocations to the small data areas")}, \
292 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \
293 | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} }
295 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
297 #ifndef TARGET_CPU_DEFAULT
298 #define TARGET_CPU_DEFAULT 0
301 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
302 #ifdef HAVE_AS_EXPLICIT_RELOCS
303 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
305 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
309 extern const char *alpha_cpu_string
; /* For -mcpu= */
310 extern const char *alpha_tune_string
; /* For -mtune= */
311 extern const char *alpha_fprm_string
; /* For -mfp-rounding-mode=[n|m|c|d] */
312 extern const char *alpha_fptm_string
; /* For -mfp-trap-mode=[n|u|su|sui] */
313 extern const char *alpha_tp_string
; /* For -mtrap-precision=[p|f|i] */
314 extern const char *alpha_mlat_string
; /* For -mmemory-latency= */
316 #define TARGET_OPTIONS \
318 {"cpu=", &alpha_cpu_string, \
319 N_("Use features of and schedule given CPU")}, \
320 {"tune=", &alpha_tune_string, \
321 N_("Schedule given CPU")}, \
322 {"fp-rounding-mode=", &alpha_fprm_string, \
323 N_("Control the generated fp rounding mode")}, \
324 {"fp-trap-mode=", &alpha_fptm_string, \
325 N_("Control the IEEE trap mode")}, \
326 {"trap-precision=", &alpha_tp_string, \
327 N_("Control the precision given to fp exceptions")}, \
328 {"memory-latency=", &alpha_mlat_string, \
329 N_("Tune expected memory latency")}, \
332 /* This macro defines names of additional specifications to put in the
333 specs that can be used in various specifications like CC1_SPEC. Its
334 definition is an initializer with a subgrouping for each command option.
336 Each subgrouping contains a string constant, that defines the
337 specification name, and a string constant that used by the GNU CC driver
340 Do not define this macro if it does not need to do anything. */
342 #ifndef SUBTARGET_EXTRA_SPECS
343 #define SUBTARGET_EXTRA_SPECS
346 #define EXTRA_SPECS \
347 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \
348 SUBTARGET_EXTRA_SPECS
351 /* Sometimes certain combinations of command options do not make sense
352 on a particular target machine. You can define a macro
353 `OVERRIDE_OPTIONS' to take account of this. This macro, if
354 defined, is executed once just after all the command options have
357 On the Alpha, it is used to translate target-option strings into
360 #define OVERRIDE_OPTIONS override_options ()
363 /* Define this macro to change register usage conditional on target flags.
365 On the Alpha, we use this to disable the floating-point registers when
368 #define CONDITIONAL_REGISTER_USAGE \
371 if (! TARGET_FPREGS) \
372 for (i = 32; i < 63; i++) \
373 fixed_regs[i] = call_used_regs[i] = 1; \
377 /* Show we can debug even without a frame pointer. */
378 #define CAN_DEBUG_WITHOUT_FP
380 /* target machine storage layout */
382 /* Define the size of `int'. The default is the same as the word size. */
383 #define INT_TYPE_SIZE 32
385 /* Define the size of `long long'. The default is the twice the word size. */
386 #define LONG_LONG_TYPE_SIZE 64
388 /* The two floating-point formats we support are S-floating, which is
389 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
390 and `long double' are T. */
392 #define FLOAT_TYPE_SIZE 32
393 #define DOUBLE_TYPE_SIZE 64
394 #define LONG_DOUBLE_TYPE_SIZE 64
396 #define WCHAR_TYPE "unsigned int"
397 #define WCHAR_TYPE_SIZE 32
399 /* Define this macro if it is advisable to hold scalars in registers
400 in a wider mode than that declared by the program. In such cases,
401 the value is constrained to be within the bounds of the declared
402 type, but kept valid in the wider mode. The signedness of the
403 extension may differ from that of the type.
405 For Alpha, we always store objects in a full register. 32-bit objects
406 are always sign-extended, but smaller objects retain their signedness. */
408 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
409 if (GET_MODE_CLASS (MODE) == MODE_INT \
410 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
412 if ((MODE) == SImode) \
417 /* Define this if function arguments should also be promoted using the above
420 #define PROMOTE_FUNCTION_ARGS
422 /* Likewise, if the function return value is promoted. */
424 #define PROMOTE_FUNCTION_RETURN
426 /* Define this if most significant bit is lowest numbered
427 in instructions that operate on numbered bit-fields.
429 There are no such instructions on the Alpha, but the documentation
431 #define BITS_BIG_ENDIAN 0
433 /* Define this if most significant byte of a word is the lowest numbered.
434 This is false on the Alpha. */
435 #define BYTES_BIG_ENDIAN 0
437 /* Define this if most significant word of a multiword number is lowest
440 For Alpha we can decide arbitrarily since there are no machine instructions
441 for them. Might as well be consistent with bytes. */
442 #define WORDS_BIG_ENDIAN 0
444 /* Width of a word, in units (bytes). */
445 #define UNITS_PER_WORD 8
447 /* Width in bits of a pointer.
448 See also the macro `Pmode' defined below. */
449 #define POINTER_SIZE 64
451 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
452 #define PARM_BOUNDARY 64
454 /* Boundary (in *bits*) on which stack pointer should be aligned. */
455 #define STACK_BOUNDARY 64
457 /* Allocation boundary (in *bits*) for the code of a function. */
458 #define FUNCTION_BOUNDARY 32
460 /* Alignment of field after `int : 0' in a structure. */
461 #define EMPTY_FIELD_BOUNDARY 64
463 /* Every structure's size must be a multiple of this. */
464 #define STRUCTURE_SIZE_BOUNDARY 8
466 /* A bitfield declared as `int' forces `int' alignment for the struct. */
467 #define PCC_BITFIELD_TYPE_MATTERS 1
469 /* No data type wants to be aligned rounder than this. */
470 #define BIGGEST_ALIGNMENT 128
472 /* For atomic access to objects, must have at least 32-bit alignment
473 unless the machine has byte operations. */
474 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
476 /* Align all constants and variables to at least a word boundary so
477 we can pick up pieces of them faster. */
478 /* ??? Only if block-move stuff knows about different source/destination
481 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
482 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
485 /* Set this non-zero if move instructions will actually fail to work
486 when given unaligned data.
488 Since we get an error message when we do one, call them invalid. */
490 #define STRICT_ALIGNMENT 1
492 /* Set this non-zero if unaligned move instructions are extremely slow.
494 On the Alpha, they trap. */
496 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
498 /* Standard register usage. */
500 /* Number of actual hardware registers.
501 The hardware registers are assigned numbers for the compiler
502 from 0 to just below FIRST_PSEUDO_REGISTER.
503 All registers that the compiler knows about must be given numbers,
504 even those that are not normally considered general registers.
506 We define all 32 integer registers, even though $31 is always zero,
507 and all 32 floating-point registers, even though $f31 is also
508 always zero. We do not bother defining the FP status register and
509 there are no other registers.
511 Since $31 is always zero, we will use register number 31 as the
512 argument pointer. It will never appear in the generated code
513 because we will always be eliminating it in favor of the stack
514 pointer or hardware frame pointer.
516 Likewise, we use $f31 for the frame pointer, which will always
517 be eliminated in favor of the hardware frame pointer or the
520 #define FIRST_PSEUDO_REGISTER 64
522 /* 1 for registers that have pervasive standard uses
523 and are not available for the register allocator. */
525 #define FIXED_REGISTERS \
526 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
527 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
528 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
529 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
531 /* 1 for registers not available across function calls.
532 These must include the FIXED_REGISTERS and also any
533 registers that can be used without being saved.
534 The latter must include the registers where values are returned
535 and the register where structure-value addresses are passed.
536 Aside from that, you can include as many other registers as you like. */
537 #define CALL_USED_REGISTERS \
538 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
539 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
540 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
541 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
543 /* List the order in which to allocate registers. Each register must be
544 listed once, even those in FIXED_REGISTERS.
546 We allocate in the following order:
547 $f10-$f15 (nonsaved floating-point register)
549 $f21-$f16 (likewise, but input args)
550 $f0 (nonsaved, but return value)
551 $f1 (nonsaved, but immediate before saved)
552 $f2-$f9 (saved floating-point registers)
553 $1-$8 (nonsaved integer registers)
556 $0 (likewise, but return value)
557 $21-$16 (likewise, but input args)
558 $27 (procedure value in OSF, nonsaved in NT)
559 $9-$14 (saved integer registers)
563 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
565 #define REG_ALLOC_ORDER \
566 {42, 43, 44, 45, 46, 47, \
567 54, 55, 56, 57, 58, 59, 60, 61, 62, \
568 53, 52, 51, 50, 49, 48, \
570 34, 35, 36, 37, 38, 39, 40, 41, \
571 1, 2, 3, 4, 5, 6, 7, 8, \
575 21, 20, 19, 18, 17, 16, \
577 9, 10, 11, 12, 13, 14, \
583 /* Return number of consecutive hard regs needed starting at reg REGNO
584 to hold something of mode MODE.
585 This is ordinarily the length in words of a value of mode MODE
586 but can be less for certain modes in special long registers. */
588 #define HARD_REGNO_NREGS(REGNO, MODE) \
589 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
591 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
592 On Alpha, the integer registers can hold any mode. The floating-point
593 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
596 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
597 ((REGNO) >= 32 && (REGNO) <= 62 \
598 ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \
601 /* A C expression that is nonzero if a value of mode
602 MODE1 is accessible in mode MODE2 without copying.
604 This asymmetric test is true when MODE1 could be put
605 in an FP register but MODE2 could not. */
607 #define MODES_TIEABLE_P(MODE1, MODE2) \
608 (HARD_REGNO_MODE_OK (32, (MODE1)) \
609 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
612 /* Specify the registers used for certain standard purposes.
613 The values of these macros are register numbers. */
615 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
616 /* #define PC_REGNUM */
618 /* Register to use for pushing function arguments. */
619 #define STACK_POINTER_REGNUM 30
621 /* Base register for access to local variables of the function. */
622 #define HARD_FRAME_POINTER_REGNUM 15
624 /* Value should be nonzero if functions must have frame pointers.
625 Zero means the frame pointer need not be set up (and parms
626 may be accessed via the stack pointer) in functions that seem suitable.
627 This is computed in `reload', in reload1.c. */
628 #define FRAME_POINTER_REQUIRED 0
630 /* Base register for access to arguments of the function. */
631 #define ARG_POINTER_REGNUM 31
633 /* Base register for access to local variables of function. */
634 #define FRAME_POINTER_REGNUM 63
636 /* Register in which static-chain is passed to a function.
638 For the Alpha, this is based on an example; the calling sequence
639 doesn't seem to specify this. */
640 #define STATIC_CHAIN_REGNUM 1
642 /* The register number of the register used to address a table of
643 static data addresses in memory. */
644 #define PIC_OFFSET_TABLE_REGNUM 29
646 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
647 is clobbered by calls. */
648 /* ??? It is and it isn't. It's required to be valid for a given
649 function when the function returns. It isn't clobbered by
650 current_file functions. Moreover, we do not expose the ldgp
651 until after reload, so we're probably safe. */
652 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
654 /* Register in which address to store a structure value
655 arrives in the function. On the Alpha, the address is passed
656 as a hidden argument. */
657 #define STRUCT_VALUE 0
659 /* Define the classes of registers for register constraints in the
660 machine description. Also define ranges of constants.
662 One of the classes must always be named ALL_REGS and include all hard regs.
663 If there is more than one class, another class must be named NO_REGS
664 and contain no registers.
666 The name GENERAL_REGS must be the name of a class (or an alias for
667 another name such as ALL_REGS). This is the class of registers
668 that is allowed by "g" or "r" in a register constraint.
669 Also, registers outside this class are allocated only when
670 instructions express preferences for them.
672 The classes must be numbered in nondecreasing order; that is,
673 a larger-numbered class must never be contained completely
674 in a smaller-numbered class.
676 For any two classes, it is very desirable that there be another
677 class that represents their union. */
680 NO_REGS
, R24_REG
, R25_REG
, R27_REG
,
681 GENERAL_REGS
, FLOAT_REGS
, ALL_REGS
,
685 #define N_REG_CLASSES (int) LIM_REG_CLASSES
687 /* Give names of register classes as strings for dump file. */
689 #define REG_CLASS_NAMES \
690 {"NO_REGS", "R24_REG", "R25_REG", "R27_REG", \
691 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
693 /* Define which registers fit in which classes.
694 This is an initializer for a vector of HARD_REG_SET
695 of length N_REG_CLASSES. */
697 #define REG_CLASS_CONTENTS \
698 { {0x00000000, 0x00000000}, /* NO_REGS */ \
699 {0x01000000, 0x00000000}, /* R24_REG */ \
700 {0x02000000, 0x00000000}, /* R25_REG */ \
701 {0x08000000, 0x00000000}, /* R27_REG */ \
702 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
703 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
704 {0xffffffff, 0xffffffff} }
706 /* The same information, inverted:
707 Return the class number of the smallest class containing
708 reg number REGNO. This could be a conditional expression
709 or could index an array. */
711 #define REGNO_REG_CLASS(REGNO) \
712 ((REGNO) == 24 ? R24_REG \
713 : (REGNO) == 25 ? R25_REG \
714 : (REGNO) == 27 ? R27_REG \
715 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
718 /* The class value for index registers, and the one for base regs. */
719 #define INDEX_REG_CLASS NO_REGS
720 #define BASE_REG_CLASS GENERAL_REGS
722 /* Get reg_class from a letter such as appears in the machine description. */
724 #define REG_CLASS_FROM_LETTER(C) \
725 ((C) == 'a' ? R24_REG \
726 : (C) == 'b' ? R25_REG \
727 : (C) == 'c' ? R27_REG \
728 : (C) == 'f' ? FLOAT_REGS \
731 /* Define this macro to change register usage conditional on target flags. */
732 /* #define CONDITIONAL_REGISTER_USAGE */
734 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
735 can be used to stand for particular ranges of immediate operands.
736 This macro defines what the ranges are.
737 C is the letter, and VALUE is a constant value.
738 Return 1 if VALUE is in the range specified by C.
741 `I' is used for the range of constants most insns can contain.
742 `J' is the constant zero.
743 `K' is used for the constant in an LDA insn.
744 `L' is used for the constant in a LDAH insn.
745 `M' is used for the constants that can be AND'ed with using a ZAP insn.
746 `N' is used for complemented 8-bit constants.
747 `O' is used for negated 8-bit constants.
748 `P' is used for the constants 1, 2 and 3. */
750 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
752 /* Similar, but for floating or large integer constants, and defining letters
753 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
755 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
756 that is the operand of a ZAP insn. */
758 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
760 /* Optional extra constraints for this machine.
762 For the Alpha, `Q' means that this is a memory operand but not a
763 reference to an unaligned location.
765 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
768 'S' is a 6-bit constant (valid for a shift insn).
772 'U' is a symbolic operand. */
774 #define EXTRA_CONSTRAINT alpha_extra_constraint
776 /* Given an rtx X being reloaded into a reg required to be
777 in class CLASS, return the class of reg to actually use.
778 In general this is just CLASS; but on some machines
779 in some cases it is preferable to use a more restrictive class. */
781 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
783 /* Loading and storing HImode or QImode values to and from memory
784 usually requires a scratch register. The exceptions are loading
785 QImode and HImode from an aligned address to a general register
786 unless byte instructions are permitted.
787 We also cannot load an unaligned address or a paradoxical SUBREG into an
790 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
791 secondary_reload_class((CLASS), (MODE), (IN), 1)
793 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
794 secondary_reload_class((CLASS), (MODE), (OUT), 0)
796 /* If we are copying between general and FP registers, we need a memory
797 location unless the FIX extension is available. */
799 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
800 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
801 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
803 /* Specify the mode to be used for memory when a secondary memory
804 location is needed. If MODE is floating-point, use it. Otherwise,
805 widen to a word like the default. This is needed because we always
806 store integers in FP registers in quadword format. This whole
807 area is very tricky! */
808 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
809 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
810 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
811 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
813 /* Return the maximum number of consecutive registers
814 needed to represent mode MODE in a register of class CLASS. */
816 #define CLASS_MAX_NREGS(CLASS, MODE) \
817 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
819 /* If defined, gives a class of registers that cannot be used as the
820 operand of a SUBREG that changes the mode of the object illegally. */
822 #define CLASS_CANNOT_CHANGE_MODE FLOAT_REGS
824 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
826 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
827 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
829 /* Define the cost of moving between registers of various classes. Moving
830 between FLOAT_REGS and anything else except float regs is expensive.
831 In fact, we make it quite expensive because we really don't want to
832 do these moves unless it is clearly worth it. Optimizations may
833 reduce the impact of not being able to allocate a pseudo to a
836 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
837 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
839 : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
841 /* A C expressions returning the cost of moving data of MODE from a register to
844 On the Alpha, bump this up a bit. */
846 extern int alpha_memory_latency
;
847 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
849 /* Provide the cost of a branch. Exact meaning under development. */
850 #define BRANCH_COST 5
852 /* Stack layout; function entry, exit and calling. */
854 /* Define this if pushing a word on the stack
855 makes the stack pointer a smaller address. */
856 #define STACK_GROWS_DOWNWARD
858 /* Define this if the nominal address of the stack frame
859 is at the high-address end of the local variables;
860 that is, each additional local variable allocated
861 goes at a more negative offset in the frame. */
862 /* #define FRAME_GROWS_DOWNWARD */
864 /* Offset within stack frame to start allocating local variables at.
865 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
866 first local allocated. Otherwise, it is the offset to the BEGINNING
867 of the first local allocated. */
869 #define STARTING_FRAME_OFFSET 0
871 /* If we generate an insn to push BYTES bytes,
872 this says how many the stack pointer really advances by.
873 On Alpha, don't define this because there are no push insns. */
874 /* #define PUSH_ROUNDING(BYTES) */
876 /* Define this to be nonzero if stack checking is built into the ABI. */
877 #define STACK_CHECK_BUILTIN 1
879 /* Define this if the maximum size of all the outgoing args is to be
880 accumulated and pushed during the prologue. The amount can be
881 found in the variable current_function_outgoing_args_size. */
882 #define ACCUMULATE_OUTGOING_ARGS 1
884 /* Offset of first parameter from the argument pointer register value. */
886 #define FIRST_PARM_OFFSET(FNDECL) 0
888 /* Definitions for register eliminations.
890 We have two registers that can be eliminated on the Alpha. First, the
891 frame pointer register can often be eliminated in favor of the stack
892 pointer register. Secondly, the argument pointer register can always be
893 eliminated; it is replaced with either the stack or frame pointer. */
895 /* This is an array of structures. Each structure initializes one pair
896 of eliminable registers. The "from" register number is given first,
897 followed by "to". Eliminations of the same "from" register are listed
898 in order of preference. */
900 #define ELIMINABLE_REGS \
901 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
902 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
903 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
904 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
906 /* Given FROM and TO register numbers, say whether this elimination is allowed.
907 Frame pointer elimination is automatically handled.
909 All eliminations are valid since the cases where FP can't be
910 eliminated are already handled. */
912 #define CAN_ELIMINATE(FROM, TO) 1
914 /* Round up to a multiple of 16 bytes. */
915 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
917 /* Define the offset between two registers, one to be eliminated, and the other
918 its replacement, at the start of a routine. */
919 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
920 { if ((FROM) == FRAME_POINTER_REGNUM) \
921 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
922 + alpha_sa_size ()); \
923 else if ((FROM) == ARG_POINTER_REGNUM) \
924 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
926 + (ALPHA_ROUND (get_frame_size () \
927 + current_function_pretend_args_size) \
928 - current_function_pretend_args_size)); \
933 /* Define this if stack space is still allocated for a parameter passed
935 /* #define REG_PARM_STACK_SPACE */
937 /* Value is the number of bytes of arguments automatically
938 popped when returning from a subroutine call.
939 FUNDECL is the declaration node of the function (as a tree),
940 FUNTYPE is the data type of the function (as a tree),
941 or for a library call it is an identifier node for the subroutine name.
942 SIZE is the number of bytes of arguments passed on the stack. */
944 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
946 /* Define how to find the value returned by a function.
947 VALTYPE is the data type of the value (as a tree).
948 If the precise function being called is known, FUNC is its FUNCTION_DECL;
949 otherwise, FUNC is 0.
951 On Alpha the value is found in $0 for integer functions and
952 $f0 for floating-point functions. */
954 #define FUNCTION_VALUE(VALTYPE, FUNC) \
955 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
956 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
957 || POINTER_TYPE_P (VALTYPE)) \
958 ? word_mode : TYPE_MODE (VALTYPE), \
960 && (TREE_CODE (VALTYPE) == REAL_TYPE \
961 || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \
964 /* Define how to find the value returned by a library function
965 assuming the value has mode MODE. */
967 #define LIBCALL_VALUE(MODE) \
970 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
971 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
974 /* The definition of this macro implies that there are cases where
975 a scalar value cannot be returned in registers.
977 For the Alpha, any structure or union type is returned in memory, as
978 are integers whose size is larger than 64 bits. */
980 #define RETURN_IN_MEMORY(TYPE) \
981 (TYPE_MODE (TYPE) == BLKmode \
982 || TYPE_MODE (TYPE) == TFmode \
983 || TYPE_MODE (TYPE) == TCmode \
984 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
986 /* 1 if N is a possible register number for a function value
987 as seen by the caller. */
989 #define FUNCTION_VALUE_REGNO_P(N) \
990 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
992 /* 1 if N is a possible register number for function argument passing.
993 On Alpha, these are $16-$21 and $f16-$f21. */
995 #define FUNCTION_ARG_REGNO_P(N) \
996 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
998 /* Define a data type for recording info about an argument list
999 during the scan of that argument list. This data type should
1000 hold all necessary information about the function itself
1001 and about the args processed so far, enough to enable macros
1002 such as FUNCTION_ARG to determine where the next arg should go.
1004 On Alpha, this is a single integer, which is a number of words
1005 of arguments scanned so far.
1006 Thus 6 or more means all following args should go on the stack. */
1008 #define CUMULATIVE_ARGS int
1010 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1011 for a call to a function whose data type is FNTYPE.
1012 For a library call, FNTYPE is 0. */
1014 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0
1016 /* Define intermediate macro to compute the size (in registers) of an argument
1019 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
1020 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
1021 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1022 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1024 /* Update the data in CUM to advance over an argument
1025 of mode MODE and data type TYPE.
1026 (TYPE is null for libcalls where that information may not be available.) */
1028 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1029 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
1032 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
1034 /* Determine where to put an argument to a function.
1035 Value is zero to push the argument on the stack,
1036 or a hard register in which to store the argument.
1038 MODE is the argument's machine mode.
1039 TYPE is the data type of the argument (as a tree).
1040 This is null for libcalls where that information may
1042 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1043 the preceding args and about the function being called.
1044 NAMED is nonzero if this argument is a named parameter
1045 (otherwise it is an extra parameter matching an ellipsis).
1047 On Alpha the first 6 words of args are normally in registers
1048 and the rest are pushed. */
1050 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1051 function_arg((CUM), (MODE), (TYPE), (NAMED))
1053 /* A C expression that indicates when an argument must be passed by
1054 reference. If nonzero for an argument, a copy of that argument is
1055 made in memory and a pointer to the argument is passed instead of
1056 the argument itself. The pointer is passed in whatever way is
1057 appropriate for passing a pointer to that type. */
1059 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1060 ((MODE) == TFmode || (MODE) == TCmode)
1062 /* Specify the padding direction of arguments.
1064 On the Alpha, we must pad upwards in order to be able to pass args in
1067 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
1069 /* For an arg passed partly in registers and partly in memory,
1070 this is the number of registers used.
1071 For args passed entirely in registers or entirely in memory, zero. */
1073 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1074 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
1077 /* Perform any needed actions needed for a function that is receiving a
1078 variable number of arguments.
1082 MODE and TYPE are the mode and type of the current parameter.
1084 PRETEND_SIZE is a variable that should be set to the amount of stack
1085 that must be pushed by the prolog to pretend that our caller pushed
1088 Normally, this macro will push all remaining incoming registers on the
1089 stack and set PRETEND_SIZE to the length of the registers pushed.
1091 On the Alpha, we allocate space for all 12 arg registers, but only
1092 push those that are remaining.
1094 However, if NO registers need to be saved, don't allocate any space.
1095 This is not only because we won't need the space, but because AP includes
1096 the current_pretend_args_size and we don't want to mess up any
1097 ap-relative addresses already made.
1099 If we are not to use the floating-point registers, save the integer
1100 registers where we would put the floating-point registers. This is
1101 not the most efficient way to implement varargs with just one register
1102 class, but it isn't worth doing anything more efficient in this rare
1105 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
1110 rtx tmp; int set = get_varargs_alias_set (); \
1111 tmp = gen_rtx_MEM (BLKmode, \
1112 plus_constant (virtual_incoming_args_rtx, \
1113 ((CUM) + 6)* UNITS_PER_WORD)); \
1114 set_mem_alias_set (tmp, set); \
1115 move_block_from_reg \
1117 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1119 tmp = gen_rtx_MEM (BLKmode, \
1120 plus_constant (virtual_incoming_args_rtx, \
1121 (CUM) * UNITS_PER_WORD)); \
1122 set_mem_alias_set (tmp, set); \
1123 move_block_from_reg \
1124 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp, \
1125 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1127 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
1131 /* We do not allow indirect calls to be optimized into sibling calls, nor
1132 can we allow a call to a function in a different compilation unit to
1133 be optimized into a sibcall. Except if the function is known not to
1134 return, in which case our caller doesn't care what the gp is. */
1135 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1137 && ((TREE_ASM_WRITTEN (DECL) && !flag_pic) \
1138 || ! TREE_PUBLIC (DECL)))
1140 /* Try to output insns to set TARGET equal to the constant C if it can be
1141 done in less than N insns. Do all computations in MODE. Returns the place
1142 where the output has been placed if it can be done and the insns have been
1143 emitted. If it would take more than N insns, zero is returned and no
1144 insns and emitted. */
1146 /* Define the information needed to generate branch and scc insns. This is
1147 stored from the compare operation. Note that we can't use "rtx" here
1148 since it hasn't been defined! */
1150 struct alpha_compare
1152 struct rtx_def
*op0
, *op1
;
1156 extern struct alpha_compare alpha_compare
;
1158 /* Make (or fake) .linkage entry for function call.
1159 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1161 /* This macro defines the start of an assembly comment. */
1163 #define ASM_COMMENT_START " #"
1165 /* This macro produces the initial definition of a function. */
1167 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1168 alpha_start_function(FILE,NAME,DECL);
1170 /* This macro closes up a function definition for the assembler. */
1172 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
1173 alpha_end_function(FILE,NAME,DECL)
1175 /* Output any profiling code before the prologue. */
1177 #define PROFILE_BEFORE_PROLOGUE 1
1179 /* Output assembler code to FILE to increment profiler label # LABELNO
1180 for profiling a function entry. Under OSF/1, profiling is enabled
1181 by simply passing -pg to the assembler and linker. */
1183 #define FUNCTION_PROFILER(FILE, LABELNO)
1185 /* Output assembler code to FILE to initialize this source file's
1186 basic block profiling info, if that has not already been done.
1187 This assumes that __bb_init_func doesn't garble a1-a5. */
1189 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1191 ASM_OUTPUT_REG_PUSH (FILE, 16); \
1192 fputs ("\tlda $16,$PBX32\n", (FILE)); \
1193 fputs ("\tldq $26,0($16)\n", (FILE)); \
1194 fputs ("\tbne $26,1f\n", (FILE)); \
1195 fputs ("\tlda $27,__bb_init_func\n", (FILE)); \
1196 fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \
1197 fputs ("\tldgp $29,0($26)\n", (FILE)); \
1198 fputs ("1:\n", (FILE)); \
1199 ASM_OUTPUT_REG_POP (FILE, 16); \
1202 /* Output assembler code to FILE to increment the entry-count for
1203 the BLOCKNO'th basic block in this source file. */
1205 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1207 int blockn = (BLOCKNO); \
1208 fputs ("\tsubq $30,16,$30\n", (FILE)); \
1209 fputs ("\tstq $26,0($30)\n", (FILE)); \
1210 fputs ("\tstq $27,8($30)\n", (FILE)); \
1211 fputs ("\tlda $26,$PBX34\n", (FILE)); \
1212 fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \
1213 fputs ("\taddq $27,1,$27\n", (FILE)); \
1214 fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \
1215 fputs ("\tldq $26,0($30)\n", (FILE)); \
1216 fputs ("\tldq $27,8($30)\n", (FILE)); \
1217 fputs ("\taddq $30,16,$30\n", (FILE)); \
1221 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1222 the stack pointer does not matter. The value is tested only in
1223 functions that have frame pointers.
1224 No definition is equivalent to always zero. */
1226 #define EXIT_IGNORE_STACK 1
1228 /* Define registers used by the epilogue and return instruction. */
1230 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
1232 /* Output assembler code for a block containing the constant parts
1233 of a trampoline, leaving space for the variable parts.
1235 The trampoline should set the static chain pointer to value placed
1236 into the trampoline and should branch to the specified routine.
1237 Note that $27 has been set to the address of the trampoline, so we can
1238 use it for addressability of the two data items. */
1240 #define TRAMPOLINE_TEMPLATE(FILE) \
1242 fprintf (FILE, "\tldq $1,24($27)\n"); \
1243 fprintf (FILE, "\tldq $27,16($27)\n"); \
1244 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1245 fprintf (FILE, "\tnop\n"); \
1246 fprintf (FILE, "\t.quad 0,0\n"); \
1249 /* Section in which to place the trampoline. On Alpha, instructions
1250 may only be placed in a text segment. */
1252 #define TRAMPOLINE_SECTION text_section
1254 /* Length in units of the trampoline for entering a nested function. */
1256 #define TRAMPOLINE_SIZE 32
1258 /* The alignment of a trampoline, in bits. */
1260 #define TRAMPOLINE_ALIGNMENT 64
1262 /* Emit RTL insns to initialize the variable parts of a trampoline.
1263 FNADDR is an RTX for the address of the function's pure code.
1264 CXT is an RTX for the static chain value for the function. */
1266 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1267 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
1269 /* A C expression whose value is RTL representing the value of the return
1270 address for the frame COUNT steps up from the current frame.
1271 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1272 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
1274 #define RETURN_ADDR_RTX alpha_return_addr
1276 /* Before the prologue, RA lives in $26. */
1277 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
1278 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
1280 /* Describe how we implement __builtin_eh_return. */
1281 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
1282 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
1283 #define EH_RETURN_HANDLER_RTX \
1284 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
1285 current_function_outgoing_args_size))
1287 /* Addressing modes, and classification of registers for them. */
1289 /* #define HAVE_POST_INCREMENT 0 */
1290 /* #define HAVE_POST_DECREMENT 0 */
1292 /* #define HAVE_PRE_DECREMENT 0 */
1293 /* #define HAVE_PRE_INCREMENT 0 */
1295 /* Macros to check register numbers against specific register classes. */
1297 /* These assume that REGNO is a hard or pseudo reg number.
1298 They give nonzero only if REGNO is a hard reg of the suitable class
1299 or a pseudo reg currently allocated to a suitable hard reg.
1300 Since they use reg_renumber, they are safe only once reg_renumber
1301 has been allocated, which happens in local-alloc.c. */
1303 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1304 #define REGNO_OK_FOR_BASE_P(REGNO) \
1305 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1306 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1308 /* Maximum number of registers that can appear in a valid memory address. */
1309 #define MAX_REGS_PER_ADDRESS 1
1311 /* Recognize any constant value that is a valid address. For the Alpha,
1312 there are only constants none since we want to use LDA to load any
1313 symbolic addresses into registers. */
1315 #define CONSTANT_ADDRESS_P(X) \
1316 (GET_CODE (X) == CONST_INT \
1317 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1319 /* Include all constant integers and constant doubles, but not
1320 floating-point, except for floating-point zero. */
1322 #define LEGITIMATE_CONSTANT_P(X) \
1323 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1324 || (X) == CONST0_RTX (GET_MODE (X)))
1326 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1327 and check its validity for a certain class.
1328 We have two alternate definitions for each of them.
1329 The usual definition accepts all pseudo regs; the other rejects
1330 them unless they have been allocated suitable hard regs.
1331 The symbol REG_OK_STRICT causes the latter definition to be used.
1333 Most source files want to accept pseudo regs in the hope that
1334 they will get allocated to the class that the insn wants them to be in.
1335 Source files for reload pass need to be strict.
1336 After reload, it makes no difference, since pseudo regs have
1337 been eliminated by then. */
1339 /* Nonzero if X is a hard reg that can be used as an index
1340 or if it is a pseudo reg. */
1341 #define REG_OK_FOR_INDEX_P(X) 0
1343 /* Nonzero if X is a hard reg that can be used as a base reg
1344 or if it is a pseudo reg. */
1345 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
1346 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1348 /* ??? Nonzero if X is the frame pointer, or some virtual register
1349 that may eliminate to the frame pointer. These will be allowed to
1350 have offsets greater than 32K. This is done because register
1351 elimination offsets will change the hi/lo split, and if we split
1352 before reload, we will require additional instructions. */
1353 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
1354 (REGNO (X) == 31 || REGNO (X) == 63 \
1355 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
1356 && REGNO (X) < LAST_VIRTUAL_REGISTER))
1358 /* Nonzero if X is a hard reg that can be used as a base reg. */
1359 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1361 #ifdef REG_OK_STRICT
1362 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
1364 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
1367 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1368 valid memory address for an instruction. */
1370 #ifdef REG_OK_STRICT
1371 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1373 if (alpha_legitimate_address_p (MODE, X, 1)) \
1377 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1379 if (alpha_legitimate_address_p (MODE, X, 0)) \
1384 /* Try machine-dependent ways of modifying an illegitimate address
1385 to be legitimate. If we find one, return the new, valid address.
1386 This macro is used in only one place: `memory_address' in explow.c. */
1388 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1390 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1398 /* Try a machine-dependent way of reloading an illegitimate address
1399 operand. If we find one, push the reload and jump to WIN. This
1400 macro is used in only one place: `find_reloads_address' in reload.c. */
1402 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1404 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1412 /* Go to LABEL if ADDR (a legitimate address expression)
1413 has an effect that depends on the machine mode it is used for.
1414 On the Alpha this is true only for the unaligned modes. We can
1415 simplify this test since we know that the address must be valid. */
1417 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1418 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1420 /* Compute the cost of an address. For the Alpha, all valid addresses are
1423 #define ADDRESS_COST(X) 0
1425 /* Machine-dependent reorg pass. */
1426 #define MACHINE_DEPENDENT_REORG(X) alpha_reorg(X)
1428 /* Specify the machine mode that this machine uses
1429 for the index in the tablejump instruction. */
1430 #define CASE_VECTOR_MODE SImode
1432 /* Define as C expression which evaluates to nonzero if the tablejump
1433 instruction expects the table to contain offsets from the address of the
1436 Do not define this if the table should contain absolute addresses.
1437 On the Alpha, the table is really GP-relative, not relative to the PC
1438 of the table, but we pretend that it is PC-relative; this should be OK,
1439 but we should try to find some better way sometime. */
1440 #define CASE_VECTOR_PC_RELATIVE 1
1442 /* Define this as 1 if `char' should by default be signed; else as 0. */
1443 #define DEFAULT_SIGNED_CHAR 1
1445 /* This flag, if defined, says the same insns that convert to a signed fixnum
1446 also convert validly to an unsigned one.
1448 We actually lie a bit here as overflow conditions are different. But
1449 they aren't being checked anyway. */
1451 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1453 /* Max number of bytes we can move to or from memory
1454 in one reasonably fast instruction. */
1458 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1459 move-instruction pairs, we will do a movstr or libcall instead.
1461 Without byte/word accesses, we want no more than four instructions;
1462 with, several single byte accesses are better. */
1464 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1466 /* Largest number of bytes of an object that can be placed in a register.
1467 On the Alpha we have plenty of registers, so use TImode. */
1468 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1470 /* Nonzero if access to memory by bytes is no faster than for words.
1471 Also non-zero if doing byte operations (specifically shifts) in registers
1474 On the Alpha, we want to not use the byte operation and instead use
1475 masking operations to access fields; these will save instructions. */
1477 #define SLOW_BYTE_ACCESS 1
1479 /* Define if operations between registers always perform the operation
1480 on the full register even if a narrower mode is specified. */
1481 #define WORD_REGISTER_OPERATIONS
1483 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1484 will either zero-extend or sign-extend. The value of this macro should
1485 be the code that says which one of the two operations is implicitly
1486 done, NIL if none. */
1487 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1489 /* Define if loading short immediate values into registers sign extends. */
1490 #define SHORT_IMMEDIATES_SIGN_EXTEND
1492 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1493 is done just by pretending it is already truncated. */
1494 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1496 /* We assume that the store-condition-codes instructions store 0 for false
1497 and some other value for true. This is the value stored for true. */
1499 #define STORE_FLAG_VALUE 1
1501 /* Define the value returned by a floating-point comparison instruction. */
1503 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1504 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1506 /* Canonicalize a comparison from one we don't have to one we do have. */
1508 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1510 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1511 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1516 (CODE) = swap_condition (CODE); \
1518 if (((CODE) == LT || (CODE) == LTU) \
1519 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1521 (CODE) = (CODE) == LT ? LE : LEU; \
1522 (OP1) = GEN_INT (255); \
1526 /* Specify the machine mode that pointers have.
1527 After generation of rtl, the compiler makes no further distinction
1528 between pointers and any other objects of this machine mode. */
1529 #define Pmode DImode
1531 /* Mode of a function address in a call instruction (for indexing purposes). */
1533 #define FUNCTION_MODE Pmode
1535 /* Define this if addresses of constant functions
1536 shouldn't be put through pseudo regs where they can be cse'd.
1537 Desirable on machines where ordinary constants are expensive
1538 but a CALL with constant address is cheap.
1540 We define this on the Alpha so that gen_call and gen_call_value
1541 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1542 then copy it into a register, thus actually letting the address be
1545 #define NO_FUNCTION_CSE
1547 /* Define this to be nonzero if shift instructions ignore all but the low-order
1549 #define SHIFT_COUNT_TRUNCATED 1
1551 /* Compute the cost of computing a constant rtl expression RTX
1552 whose rtx-code is CODE. The body of this macro is a portion
1553 of a switch statement. If the code is computed here,
1554 return it with a return statement. Otherwise, break from the switch.
1556 If this is an 8-bit constant, return zero since it can be used
1557 nearly anywhere with no cost. If it is a valid operand for an
1558 ADD or AND, likewise return 0 if we know it will be used in that
1559 context. Otherwise, return 2 since it might be used there later.
1560 All other constants take at least two insns. */
1562 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1564 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1566 case CONST_DOUBLE: \
1567 if ((RTX) == CONST0_RTX (GET_MODE (RTX))) \
1569 else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1570 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1572 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1575 return COSTS_N_INSNS (2); \
1579 switch (alpha_cpu) \
1581 case PROCESSOR_EV4: \
1582 return COSTS_N_INSNS (3); \
1583 case PROCESSOR_EV5: \
1584 case PROCESSOR_EV6: \
1585 return COSTS_N_INSNS (2); \
1589 /* Provide the costs of a rtl expression. This is in the body of a
1592 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1593 case PLUS: case MINUS: \
1594 if (FLOAT_MODE_P (GET_MODE (X))) \
1595 switch (alpha_cpu) \
1597 case PROCESSOR_EV4: \
1598 return COSTS_N_INSNS (6); \
1599 case PROCESSOR_EV5: \
1600 case PROCESSOR_EV6: \
1601 return COSTS_N_INSNS (4); \
1604 else if (GET_CODE (XEXP (X, 0)) == MULT \
1605 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1606 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1607 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1610 switch (alpha_cpu) \
1612 case PROCESSOR_EV4: \
1613 if (FLOAT_MODE_P (GET_MODE (X))) \
1614 return COSTS_N_INSNS (6); \
1615 return COSTS_N_INSNS (23); \
1616 case PROCESSOR_EV5: \
1617 if (FLOAT_MODE_P (GET_MODE (X))) \
1618 return COSTS_N_INSNS (4); \
1619 else if (GET_MODE (X) == DImode) \
1620 return COSTS_N_INSNS (12); \
1622 return COSTS_N_INSNS (8); \
1623 case PROCESSOR_EV6: \
1624 if (FLOAT_MODE_P (GET_MODE (X))) \
1625 return COSTS_N_INSNS (4); \
1627 return COSTS_N_INSNS (7); \
1631 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1632 && INTVAL (XEXP (X, 1)) <= 3) \
1634 /* ... fall through ... */ \
1635 case ASHIFTRT: case LSHIFTRT: \
1636 switch (alpha_cpu) \
1638 case PROCESSOR_EV4: \
1639 return COSTS_N_INSNS (2); \
1640 case PROCESSOR_EV5: \
1641 case PROCESSOR_EV6: \
1642 return COSTS_N_INSNS (1); \
1645 case IF_THEN_ELSE: \
1646 switch (alpha_cpu) \
1648 case PROCESSOR_EV4: \
1649 case PROCESSOR_EV6: \
1650 return COSTS_N_INSNS (2); \
1651 case PROCESSOR_EV5: \
1652 return COSTS_N_INSNS (1); \
1655 case DIV: case UDIV: case MOD: case UMOD: \
1656 switch (alpha_cpu) \
1658 case PROCESSOR_EV4: \
1659 if (GET_MODE (X) == SFmode) \
1660 return COSTS_N_INSNS (34); \
1661 else if (GET_MODE (X) == DFmode) \
1662 return COSTS_N_INSNS (63); \
1664 return COSTS_N_INSNS (70); \
1665 case PROCESSOR_EV5: \
1666 if (GET_MODE (X) == SFmode) \
1667 return COSTS_N_INSNS (15); \
1668 else if (GET_MODE (X) == DFmode) \
1669 return COSTS_N_INSNS (22); \
1671 return COSTS_N_INSNS (70); /* ??? */ \
1672 case PROCESSOR_EV6: \
1673 if (GET_MODE (X) == SFmode) \
1674 return COSTS_N_INSNS (12); \
1675 else if (GET_MODE (X) == DFmode) \
1676 return COSTS_N_INSNS (15); \
1678 return COSTS_N_INSNS (70); /* ??? */ \
1682 switch (alpha_cpu) \
1684 case PROCESSOR_EV4: \
1685 case PROCESSOR_EV6: \
1686 return COSTS_N_INSNS (3); \
1687 case PROCESSOR_EV5: \
1688 return COSTS_N_INSNS (2); \
1691 case NEG: case ABS: \
1692 if (! FLOAT_MODE_P (GET_MODE (X))) \
1694 /* ... fall through ... */ \
1695 case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
1696 case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
1697 switch (alpha_cpu) \
1699 case PROCESSOR_EV4: \
1700 return COSTS_N_INSNS (6); \
1701 case PROCESSOR_EV5: \
1702 case PROCESSOR_EV6: \
1703 return COSTS_N_INSNS (4); \
1707 /* Control the assembler format that we output. */
1709 /* Output to assembler file text saying following lines
1710 may contain character constants, extra white space, comments, etc. */
1711 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1713 /* Output to assembler file text saying following lines
1714 no longer contain unusual constructs. */
1715 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1717 #define TEXT_SECTION_ASM_OP "\t.text"
1719 /* Output before read-only data. */
1721 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1723 /* Output before writable data. */
1725 #define DATA_SECTION_ASM_OP "\t.data"
1727 /* Define an extra section for read-only data, a routine to enter it, and
1728 indicate that it is for read-only data.
1730 The first time we enter the readonly data section for a file, we write
1731 eight bytes of zero. This works around a bug in DEC's assembler in
1732 some versions of OSF/1 V3.x. */
1734 #define EXTRA_SECTIONS readonly_data
1736 #define EXTRA_SECTION_FUNCTIONS \
1738 literal_section () \
1740 if (in_section != readonly_data) \
1742 static int firsttime = 1; \
1744 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1748 assemble_aligned_integer (8, const0_rtx); \
1751 in_section = readonly_data; \
1755 #define READONLY_DATA_SECTION literal_section
1757 /* Define this macro if references to a symbol must be treated differently
1758 depending on something about the variable or function named by the symbol
1759 (such as what section it is in). */
1761 #define ENCODE_SECTION_INFO(DECL, FIRST) \
1762 alpha_encode_section_info (DECL, FIRST)
1764 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1766 (VAR) = (SYMBOL_NAME); \
1767 if ((VAR)[0] == '@') \
1769 if ((VAR)[0] == '*') \
1773 /* How to refer to registers in assembler output.
1774 This sequence is indexed by compiler's hard-register-number (see above). */
1776 #define REGISTER_NAMES \
1777 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1778 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1779 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1780 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1781 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1782 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1783 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1784 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1786 /* Strip name encoding when emitting labels. */
1788 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1790 const char *name_ = NAME; \
1791 if (*name_ == '@') \
1793 if (*name_ == '*') \
1796 fputs (user_label_prefix, STREAM); \
1797 fputs (name_, STREAM); \
1800 /* This is how to output the definition of a user-level label named NAME,
1801 such as the label on a static function or variable NAME. */
1803 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1804 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1806 /* This is how to output a command to make the user-level label named NAME
1807 defined for reference from other files. */
1809 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1810 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1812 /* The prefix to add to user-visible assembler symbols. */
1814 #define USER_LABEL_PREFIX ""
1816 /* This is how to output an internal numbered label where
1817 PREFIX is the class of label and NUM is the number within the class. */
1819 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1820 fprintf (FILE, "$%s%d:\n", PREFIX, NUM)
1822 /* This is how to output a label for a jump table. Arguments are the same as
1823 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1826 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1827 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1829 /* This is how to store into the string LABEL
1830 the symbol_ref name of an internal numbered label where
1831 PREFIX is the class of label and NUM is the number within the class.
1832 This is suitable for output with `assemble_name'. */
1834 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1835 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1837 /* Check a floating-point value for validity for a particular machine mode. */
1839 #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \
1840 ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))
1842 /* We use the default ASCII-output routine, except that we don't write more
1843 than 50 characters since the assembler doesn't support very long lines. */
1845 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1847 FILE *_hide_asm_out_file = (MYFILE); \
1848 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1849 int _hide_thissize = (MYLENGTH); \
1850 int _size_so_far = 0; \
1852 FILE *asm_out_file = _hide_asm_out_file; \
1853 const unsigned char *p = _hide_p; \
1854 int thissize = _hide_thissize; \
1856 fprintf (asm_out_file, "\t.ascii \""); \
1858 for (i = 0; i < thissize; i++) \
1860 register int c = p[i]; \
1862 if (_size_so_far ++ > 50 && i < thissize - 4) \
1863 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1865 if (c == '\"' || c == '\\') \
1866 putc ('\\', asm_out_file); \
1867 if (c >= ' ' && c < 0177) \
1868 putc (c, asm_out_file); \
1871 fprintf (asm_out_file, "\\%o", c); \
1872 /* After an octal-escape, if a digit follows, \
1873 terminate one string constant and start another. \
1874 The VAX assembler fails to stop reading the escape \
1875 after three digits, so this is the only way we \
1876 can get it to parse the data properly. */ \
1877 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1878 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1881 fprintf (asm_out_file, "\"\n"); \
1886 /* This is how to output an insn to push a register on the stack.
1887 It need not be very fast code. */
1889 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1890 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1891 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1894 /* This is how to output an insn to pop a register from the stack.
1895 It need not be very fast code. */
1897 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1898 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1899 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1902 /* This is how to output an element of a case-vector that is absolute.
1903 (Alpha does not use such vectors, but we must define this macro anyway.) */
1905 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1907 /* This is how to output an element of a case-vector that is relative. */
1909 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1910 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1913 /* This is how to output an assembler line
1914 that says to advance the location counter
1915 to a multiple of 2**LOG bytes. */
1917 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1919 fprintf (FILE, "\t.align %d\n", LOG);
1921 /* This is how to advance the location counter by SIZE bytes. */
1923 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1924 fprintf (FILE, "\t.space %d\n", (SIZE))
1926 /* This says how to output an assembler line
1927 to define a global common symbol. */
1929 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1930 ( fputs ("\t.comm ", (FILE)), \
1931 assemble_name ((FILE), (NAME)), \
1932 fprintf ((FILE), ",%d\n", (SIZE)))
1934 /* This says how to output an assembler line
1935 to define a local common symbol. */
1937 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1938 ( fputs ("\t.lcomm ", (FILE)), \
1939 assemble_name ((FILE), (NAME)), \
1940 fprintf ((FILE), ",%d\n", (SIZE)))
1942 /* Store in OUTPUT a string (made with alloca) containing
1943 an assembler-name for a local static variable named NAME.
1944 LABELNO is an integer which is different for each call. */
1946 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1947 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1948 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1951 /* Print operand X (an rtx) in assembler syntax to file FILE.
1952 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1953 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1955 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1957 /* Determine which codes are valid without a following integer. These must
1960 ~ Generates the name of the current function.
1962 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1963 attributes are examined to determine what is appropriate.
1965 , Generates single precision suffix for floating point
1966 instructions (s for IEEE, f for VAX)
1968 - Generates double precision suffix for floating point
1969 instructions (t for IEEE, g for VAX)
1972 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1973 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1974 || (CODE) == '#' || (CODE) == '*')
1976 /* Print a memory address as an operand to reference that memory location. */
1978 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1979 print_operand_address((FILE), (ADDR))
1981 /* Define the codes that are matched by predicates in alpha.c. */
1983 #define PREDICATE_CODES \
1984 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1985 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1986 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1987 {"cint8_operand", {CONST_INT}}, \
1988 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1989 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1990 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1991 {"const48_operand", {CONST_INT}}, \
1992 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1993 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1994 {"mode_mask_operand", {CONST_INT}}, \
1995 {"mul8_operand", {CONST_INT}}, \
1996 {"mode_width_operand", {CONST_INT}}, \
1997 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1998 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1999 {"alpha_zero_comparison_operator", {EQ, NE, LE, LT, LEU, LTU}}, \
2000 {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \
2001 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
2002 {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \
2003 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
2004 {"fp0_operand", {CONST_DOUBLE}}, \
2005 {"current_file_function_operand", {SYMBOL_REF}}, \
2006 {"direct_call_operand", {SYMBOL_REF}}, \
2007 {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2008 {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \
2009 {"global_symbolic_operand", {SYMBOL_REF, CONST}}, \
2010 {"call_operand", {REG, SYMBOL_REF}}, \
2011 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2012 SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
2013 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2014 SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
2015 {"some_ni_operand", {SUBREG, REG, MEM}}, \
2016 {"aligned_memory_operand", {MEM}}, \
2017 {"unaligned_memory_operand", {MEM}}, \
2018 {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
2019 {"any_memory_operand", {MEM}}, \
2020 {"hard_fp_register_operand", {SUBREG, REG}}, \
2021 {"hard_int_register_operand", {SUBREG, REG}}, \
2022 {"reg_not_elim_operand", {SUBREG, REG}}, \
2023 {"reg_no_subreg_operand", {REG}}, \
2024 {"addition_operation", {PLUS}}, \
2025 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2026 {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC, \
2029 /* Define the `__builtin_va_list' type for the ABI. */
2030 #define BUILD_VA_LIST_TYPE(VALIST) \
2031 (VALIST) = alpha_build_va_list ()
2033 /* Implement `va_start' for varargs and stdarg. */
2034 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
2035 alpha_va_start (stdarg, valist, nextarg)
2037 /* Implement `va_arg'. */
2038 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
2039 alpha_va_arg (valist, type)
2041 /* Tell collect that the object format is ECOFF. */
2042 #define OBJECT_FORMAT_COFF
2043 #define EXTENDED_COFF
2045 /* If we use NM, pass -g to it so it only lists globals. */
2046 #define NM_FLAGS "-pg"
2048 /* Definitions for debugging. */
2050 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
2051 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
2052 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
2054 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
2055 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
2059 /* Correct the offset of automatic variables and arguments. Note that
2060 the Alpha debug format wants all automatic variables and arguments
2061 to be in terms of two different offsets from the virtual frame pointer,
2062 which is the stack pointer before any adjustment in the function.
2063 The offset for the argument pointer is fixed for the native compiler,
2064 it is either zero (for the no arguments case) or large enough to hold
2065 all argument registers.
2066 The offset for the auto pointer is the fourth argument to the .frame
2067 directive (local_offset).
2068 To stay compatible with the native tools we use the same offsets
2069 from the virtual frame pointer and adjust the debugger arg/auto offsets
2070 accordingly. These debugger offsets are set up in output_prolog. */
2072 extern long alpha_arg_offset
;
2073 extern long alpha_auto_offset
;
2074 #define DEBUGGER_AUTO_OFFSET(X) \
2075 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
2076 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
2079 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
2080 alpha_output_lineno (STREAM, LINE)
2082 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
2083 alpha_output_filename (STREAM, NAME)
2085 /* mips-tfile.c limits us to strings of one page. We must underestimate this
2086 number, because the real length runs past this up to the next
2087 continuation point. This is really a dbxout.c bug. */
2088 #define DBX_CONTIN_LENGTH 3000
2090 /* By default, turn on GDB extensions. */
2091 #define DEFAULT_GDB_EXTENSIONS 1
2093 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
2094 #define NO_DBX_FUNCTION_END 1
2096 /* If we are smuggling stabs through the ALPHA ECOFF object
2097 format, put a comment in front of the .stab<x> operation so
2098 that the ALPHA assembler does not choke. The mips-tfile program
2099 will correctly put the stab into the object file. */
2101 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
2102 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
2103 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
2105 /* Forward references to tags are allowed. */
2106 #define SDB_ALLOW_FORWARD_REFERENCES
2108 /* Unknown tags are also allowed. */
2109 #define SDB_ALLOW_UNKNOWN_REFERENCES
2111 #define PUT_SDB_DEF(a) \
2113 fprintf (asm_out_file, "\t%s.def\t", \
2114 (TARGET_GAS) ? "" : "#"); \
2115 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2116 fputc (';', asm_out_file); \
2119 #define PUT_SDB_PLAIN_DEF(a) \
2121 fprintf (asm_out_file, "\t%s.def\t.%s;", \
2122 (TARGET_GAS) ? "" : "#", (a)); \
2125 #define PUT_SDB_TYPE(a) \
2127 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
2130 /* For block start and end, we create labels, so that
2131 later we can figure out where the correct offset is.
2132 The normal .ent/.end serve well enough for functions,
2133 so those are just commented out. */
2135 extern int sdb_label_count
; /* block start/end next label # */
2137 #define PUT_SDB_BLOCK_START(LINE) \
2139 fprintf (asm_out_file, \
2140 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
2142 (TARGET_GAS) ? "" : "#", \
2145 sdb_label_count++; \
2148 #define PUT_SDB_BLOCK_END(LINE) \
2150 fprintf (asm_out_file, \
2151 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
2153 (TARGET_GAS) ? "" : "#", \
2156 sdb_label_count++; \
2159 #define PUT_SDB_FUNCTION_START(LINE)
2161 #define PUT_SDB_FUNCTION_END(LINE)
2163 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
2165 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
2166 mips-tdump.c to print them out.
2168 These must match the corresponding definitions in gdb/mipsread.c.
2169 Unfortunately, gcc and gdb do not currently share any directories. */
2171 #define CODE_MASK 0x8F300
2172 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2173 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2174 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2176 /* Override some mips-tfile definitions. */
2178 #define SHASH_SIZE 511
2179 #define THASH_SIZE 55
2181 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2183 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2185 /* The system headers under Alpha systems are generally C++-aware. */
2186 #define NO_IMPLICIT_EXTERN_C
2188 /* Generate calls to memcpy, etc., not bcopy, etc. */
2189 #define TARGET_MEM_FUNCTIONS 1
2191 /* Output code to add DELTA to the first argument, and then jump to FUNCTION.
2192 Used for C++ multiple inheritance. */
2193 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
2194 alpha_output_mi_thunk_osf (FILE, THUNK_FNDECL, DELTA, FUNCTION)