1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "\
25 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
26 -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
28 /* Write out the correct language type definition for the header files.
29 Unless we have assembler language, write out the symbols for C. */
31 %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
32 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
33 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
34 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
38 /* Set the spec to use for signed char. The default tests the above macro
39 but DEC's compiler can't handle the conditional in a "constant"
42 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
44 /* No point in running CPP on our assembler output. */
45 #define ASM_SPEC "-nocpp"
47 /* Right now Alpha OSF/1 doesn't seem to have debugging libraries. */
49 #define LIB_SPEC "%{p:-lprof1} -lc"
51 /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are optimizing,
52 -O1 if we are not. Pass -non_shared or -call_shared as appropriate. */
54 "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} %{!static:-call_shared}"
56 /* Print subsidiary information on the compiler version in use. */
57 #define TARGET_VERSION
59 /* Define the location for the startup file on OSF/1 for Alpha. */
61 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
63 /* Run-time compilation parameters selecting different hardware subsets. */
65 extern int target_flags
;
67 /* This means that floating-point support exists in the target implementation
68 of the Alpha architecture. This is usually the default. */
70 #define TARGET_FP (target_flags & 1)
72 /* This means that floating-point registers are allowed to be used. Note
73 that Alpha implementations without FP operations are required to
74 provide the FP registers. */
76 #define TARGET_FPREGS (target_flags & 2)
78 /* This means that gas is used to process the assembler file. */
81 #define TARGET_GAS (target_flags & MASK_GAS)
83 /* Macro to define tables used to set the flags.
84 This is a list in braces of pairs in braces,
85 each pair being { "NAME", VALUE }
86 where VALUE is the bits to set or minus the bits to clear.
87 An empty string NAME is used to identify the default VALUE. */
89 #define TARGET_SWITCHES \
90 { {"no-soft-float", 1}, \
94 {"alpha-as", -MASK_GAS}, \
96 {"", TARGET_DEFAULT} }
98 #define TARGET_DEFAULT 3
100 /* Define this macro to change register usage conditional on target flags.
102 On the Alpha, we use this to disable the floating-point registers when
105 #define CONDITIONAL_REGISTER_USAGE \
106 if (! TARGET_FPREGS) \
107 for (i = 32; i < 64; i++) \
108 fixed_regs[i] = call_used_regs[i] = 1;
110 /* Show we can debug even without a frame pointer. */
111 #define CAN_DEBUG_WITHOUT_FP
113 /* target machine storage layout */
115 /* Define to enable software floating point emulation. */
116 #define REAL_ARITHMETIC
118 /* Define the size of `int'. The default is the same as the word size. */
119 #define INT_TYPE_SIZE 32
121 /* Define the size of `long long'. The default is the twice the word size. */
122 #define LONG_LONG_TYPE_SIZE 64
124 /* The two floating-point formats we support are S-floating, which is
125 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
126 and `long double' are T. */
128 #define FLOAT_TYPE_SIZE 32
129 #define DOUBLE_TYPE_SIZE 64
130 #define LONG_DOUBLE_TYPE_SIZE 64
132 #define WCHAR_TYPE "short unsigned int"
133 #define WCHAR_TYPE_SIZE 16
135 /* Define this macro if it is advisable to hold scalars in registers
136 in a wider mode than that declared by the program. In such cases,
137 the value is constrained to be within the bounds of the declared
138 type, but kept valid in the wider mode. The signedness of the
139 extension may differ from that of the type.
141 For Alpha, we always store objects in a full register. 32-bit objects
142 are always sign-extended, but smaller objects retain their signedness. */
144 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
145 if (GET_MODE_CLASS (MODE) == MODE_INT \
146 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
148 if ((MODE) == SImode) \
153 /* Define this if function arguments should also be promoted using the above
156 #define PROMOTE_FUNCTION_ARGS
158 /* Likewise, if the function return value is promoted. */
160 #define PROMOTE_FUNCTION_RETURN
162 /* Define this if most significant bit is lowest numbered
163 in instructions that operate on numbered bit-fields.
165 There are no such instructions on the Alpha, but the documentation
167 #define BITS_BIG_ENDIAN 0
169 /* Define this if most significant byte of a word is the lowest numbered.
170 This is false on the Alpha. */
171 #define BYTES_BIG_ENDIAN 0
173 /* Define this if most significant word of a multiword number is lowest
176 For Alpha we can decide arbitrarily since there are no machine instructions
177 for them. Might as well be consistent with bytes. */
178 #define WORDS_BIG_ENDIAN 0
180 /* number of bits in an addressable storage unit */
181 #define BITS_PER_UNIT 8
183 /* Width in bits of a "word", which is the contents of a machine register.
184 Note that this is not necessarily the width of data type `int';
185 if using 16-bit ints on a 68000, this would still be 32.
186 But on a machine with 16-bit registers, this would be 16. */
187 #define BITS_PER_WORD 64
189 /* Width of a word, in units (bytes). */
190 #define UNITS_PER_WORD 8
192 /* Width in bits of a pointer.
193 See also the macro `Pmode' defined below. */
194 #define POINTER_SIZE 64
196 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
197 #define PARM_BOUNDARY 64
199 /* Boundary (in *bits*) on which stack pointer should be aligned. */
200 #define STACK_BOUNDARY 64
202 /* Allocation boundary (in *bits*) for the code of a function. */
203 #define FUNCTION_BOUNDARY 64
205 /* Alignment of field after `int : 0' in a structure. */
206 #define EMPTY_FIELD_BOUNDARY 64
208 /* Every structure's size must be a multiple of this. */
209 #define STRUCTURE_SIZE_BOUNDARY 8
211 /* A bitfield declared as `int' forces `int' alignment for the struct. */
212 #define PCC_BITFIELD_TYPE_MATTERS 1
214 /* Align loop starts for optimal branching.
216 ??? Kludge this and the next macro for the moment by not doing anything if
217 we don't optimize and also if we are writing ECOFF symbols to work around
218 a bug in DEC's assembler. */
220 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
221 if (optimize > 0 && write_symbols != SDB_DEBUG) \
222 ASM_OUTPUT_ALIGN (FILE, 5)
224 /* This is how to align an instruction for optimal branching.
225 On Alpha we'll get better performance by aligning on a quadword
228 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
229 if (optimize > 0 && write_symbols != SDB_DEBUG) \
230 ASM_OUTPUT_ALIGN ((FILE), 4)
232 /* No data type wants to be aligned rounder than this. */
233 #define BIGGEST_ALIGNMENT 64
235 /* Make strings word-aligned so strcpy from constants will be faster. */
236 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
237 (TREE_CODE (EXP) == STRING_CST \
238 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
240 /* Make arrays of chars word-aligned for the same reasons. */
241 #define DATA_ALIGNMENT(TYPE, ALIGN) \
242 (TREE_CODE (TYPE) == ARRAY_TYPE \
243 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
244 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
246 /* Set this non-zero if move instructions will actually fail to work
247 when given unaligned data.
249 Since we get an error message when we do one, call them invalid. */
251 #define STRICT_ALIGNMENT 1
253 /* Set this non-zero if unaligned move instructions are extremely slow.
255 On the Alpha, they trap. */
257 #define SLOW_UNALIGNED_ACCESS 1
259 /* Standard register usage. */
261 /* Number of actual hardware registers.
262 The hardware registers are assigned numbers for the compiler
263 from 0 to just below FIRST_PSEUDO_REGISTER.
264 All registers that the compiler knows about must be given numbers,
265 even those that are not normally considered general registers.
267 We define all 32 integer registers, even though $31 is always zero,
268 and all 32 floating-point registers, even though $f31 is also
269 always zero. We do not bother defining the FP status register and
270 there are no other registers.
272 Since $31 is always zero, we will use register number 31 as the
273 argument pointer. It will never appear in the generated code
274 because we will always be eliminating it in favor of the stack
275 poointer or frame pointer. */
277 #define FIRST_PSEUDO_REGISTER 64
279 /* 1 for registers that have pervasive standard uses
280 and are not available for the register allocator. */
282 #define FIXED_REGISTERS \
283 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
284 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
285 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
286 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
288 /* 1 for registers not available across function calls.
289 These must include the FIXED_REGISTERS and also any
290 registers that can be used without being saved.
291 The latter must include the registers where values are returned
292 and the register where structure-value addresses are passed.
293 Aside from that, you can include as many other registers as you like. */
294 #define CALL_USED_REGISTERS \
295 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
296 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
297 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
298 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
300 /* List the order in which to allocate registers. Each register must be
301 listed once, even those in FIXED_REGISTERS.
303 We allocate in the following order:
304 $f1 (nonsaved floating-point register)
307 $f21-$f16 (likewise, but input args)
308 $f0 (nonsaved, but return value)
309 $f2-$f9 (saved floating-point registers)
310 $1-$8 (nonsaved integer registers)
313 $0 (likewise, but return value)
314 $21-$16 (likewise, but input args)
315 $27 (procedure value)
316 $9-$14 (saved integer registers)
320 $30, $31, $f31 (stack pointer and always zero/ap) */
322 #define REG_ALLOC_ORDER \
324 42, 43, 44, 45, 46, 47, \
325 54, 55, 56, 57, 58, 59, 60, 61, 62, \
326 53, 52, 51, 50, 49, 48, \
328 34, 35, 36, 37, 38, 39, 40, 41, \
329 1, 2, 3, 4, 5, 6, 7, 8, \
333 21, 20, 19, 18, 17, 16, \
335 9, 10, 11, 12, 13, 14, \
341 /* Return number of consecutive hard regs needed starting at reg REGNO
342 to hold something of mode MODE.
343 This is ordinarily the length in words of a value of mode MODE
344 but can be less for certain modes in special long registers. */
346 #define HARD_REGNO_NREGS(REGNO, MODE) \
347 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
349 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
350 On Alpha, the integer registers can hold any mode. The floating-point
351 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
352 or 8-bit values. If we only allowed the larger integers into FP registers,
353 we'd have to say that QImode and SImode aren't tiable, which is a
354 pain. So say all registers can hold everything and see how that works. */
356 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
358 /* Value is 1 if it is a good idea to tie two pseudo registers
359 when one has mode MODE1 and one has mode MODE2.
360 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
361 for any hard reg, then this must be 0 for correct output. */
363 #define MODES_TIEABLE_P(MODE1, MODE2) 1
365 /* Specify the registers used for certain standard purposes.
366 The values of these macros are register numbers. */
368 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
369 /* #define PC_REGNUM */
371 /* Register to use for pushing function arguments. */
372 #define STACK_POINTER_REGNUM 30
374 /* Base register for access to local variables of the function. */
375 #define FRAME_POINTER_REGNUM 15
377 /* Value should be nonzero if functions must have frame pointers.
378 Zero means the frame pointer need not be set up (and parms
379 may be accessed via the stack pointer) in functions that seem suitable.
380 This is computed in `reload', in reload1.c. */
381 #define FRAME_POINTER_REQUIRED 0
383 /* Base register for access to arguments of the function. */
384 #define ARG_POINTER_REGNUM 31
386 /* Register in which static-chain is passed to a function.
388 For the Alpha, this is based on an example; the calling sequence
389 doesn't seem to specify this. */
390 #define STATIC_CHAIN_REGNUM 1
392 /* Register in which address to store a structure value
393 arrives in the function. On the Alpha, the address is passed
394 as a hidden argument. */
395 #define STRUCT_VALUE 0
397 /* Define the classes of registers for register constraints in the
398 machine description. Also define ranges of constants.
400 One of the classes must always be named ALL_REGS and include all hard regs.
401 If there is more than one class, another class must be named NO_REGS
402 and contain no registers.
404 The name GENERAL_REGS must be the name of a class (or an alias for
405 another name such as ALL_REGS). This is the class of registers
406 that is allowed by "g" or "r" in a register constraint.
407 Also, registers outside this class are allocated only when
408 instructions express preferences for them.
410 The classes must be numbered in nondecreasing order; that is,
411 a larger-numbered class must never be contained completely
412 in a smaller-numbered class.
414 For any two classes, it is very desirable that there be another
415 class that represents their union. */
417 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FLOAT_REGS
, ALL_REGS
,
420 #define N_REG_CLASSES (int) LIM_REG_CLASSES
422 /* Give names of register classes as strings for dump file. */
424 #define REG_CLASS_NAMES \
425 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
427 /* Define which registers fit in which classes.
428 This is an initializer for a vector of HARD_REG_SET
429 of length N_REG_CLASSES. */
431 #define REG_CLASS_CONTENTS \
432 { {0, 0}, {~0, 0}, {0, ~0}, {~0, ~0} }
434 /* The same information, inverted:
435 Return the class number of the smallest class containing
436 reg number REGNO. This could be a conditional expression
437 or could index an array. */
439 #define REGNO_REG_CLASS(REGNO) ((REGNO) >= 32 ? FLOAT_REGS : GENERAL_REGS)
441 /* The class value for index registers, and the one for base regs. */
442 #define INDEX_REG_CLASS NO_REGS
443 #define BASE_REG_CLASS GENERAL_REGS
445 /* Get reg_class from a letter such as appears in the machine description. */
447 #define REG_CLASS_FROM_LETTER(C) \
448 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
450 /* Define this macro to change register usage conditional on target flags. */
451 /* #define CONDITIONAL_REGISTER_USAGE */
453 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
454 can be used to stand for particular ranges of immediate operands.
455 This macro defines what the ranges are.
456 C is the letter, and VALUE is a constant value.
457 Return 1 if VALUE is in the range specified by C.
460 `I' is used for the range of constants most insns can contain.
461 `J' is the constant zero.
462 `K' is used for the constant in an LDA insn.
463 `L' is used for the constant in a LDAH insn.
464 `M' is used for the constants that can be AND'ed with using a ZAP insn.
465 `N' is used for complemented 8-bit constants.
466 `O' is used for negated 8-bit constants.
467 `P' is used for the constants 1, 2 and 3. */
469 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
470 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
471 : (C) == 'J' ? (VALUE) == 0 \
472 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
473 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
474 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \
475 : (C) == 'M' ? zap_mask (VALUE) \
476 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
477 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
478 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
481 /* Similar, but for floating or large integer constants, and defining letters
482 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
484 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
485 that is the operand of a ZAP insn. */
487 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
488 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
489 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
490 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
491 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
492 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
495 /* Optional extra constraints for this machine.
497 For the Alpha, `Q' means that this is a memory operand but not a
498 reference to an unaligned location. */
500 #define EXTRA_CONSTRAINT(OP, C) \
501 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
504 /* Given an rtx X being reloaded into a reg required to be
505 in class CLASS, return the class of reg to actually use.
506 In general this is just CLASS; but on some machines
507 in some cases it is preferable to use a more restrictive class.
509 On the Alpha, all constants except zero go into a floating-point
510 register via memory. */
512 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
513 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
514 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
517 /* Loading and storing HImode or QImode values to and from memory
518 usually requires a scratch register. The exceptions are loading
519 QImode and HImode from an aligned address to a general register.
520 We also cannot load an unaligned address into an FP register. */
522 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
523 (((GET_CODE (IN) == MEM \
524 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
525 || (GET_CODE (IN) == SUBREG \
526 && (GET_CODE (SUBREG_REG (IN)) == MEM \
527 || (GET_CODE (SUBREG_REG (IN)) == REG \
528 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
529 && (((CLASS) == FLOAT_REGS \
530 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
531 || (((MODE) == QImode || (MODE) == HImode) \
532 && unaligned_memory_operand (IN, MODE)))) \
534 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
535 && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
538 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
539 (((GET_CODE (OUT) == MEM \
540 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
541 || (GET_CODE (OUT) == SUBREG \
542 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
543 || (GET_CODE (SUBREG_REG (OUT)) == REG \
544 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
545 && (((MODE) == HImode || (MODE) == QImode \
546 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
548 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
549 && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
552 /* If we are copying between general and FP registers, we need a memory
555 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
557 /* Return the maximum number of consecutive registers
558 needed to represent mode MODE in a register of class CLASS. */
560 #define CLASS_MAX_NREGS(CLASS, MODE) \
561 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
563 /* Define the cost of moving between registers of various classes. Moving
564 between FLOAT_REGS and anything else except float regs is expensive.
565 In fact, we make it quite expensive because we really don't want to
566 do these moves unless it is clearly worth it. Optimizations may
567 reduce the impact of not being able to allocate a pseudo to a
570 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
571 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
573 /* A C expressions returning the cost of moving data of MODE from a register to
576 On the Alpha, bump this up a bit. */
578 #define MEMORY_MOVE_COST(MODE) 6
580 /* Provide the cost of a branch. Exact meaning under development. */
581 #define BRANCH_COST 5
583 /* Adjust the cost of dependencies. */
585 #define ADJUST_COST(INSN,LINK,DEP,COST) \
586 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
588 /* Stack layout; function entry, exit and calling. */
590 /* Define this if pushing a word on the stack
591 makes the stack pointer a smaller address. */
592 #define STACK_GROWS_DOWNWARD
594 /* Define this if the nominal address of the stack frame
595 is at the high-address end of the local variables;
596 that is, each additional local variable allocated
597 goes at a more negative offset in the frame. */
598 /* #define FRAME_GROWS_DOWNWARD */
600 /* Offset within stack frame to start allocating local variables at.
601 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
602 first local allocated. Otherwise, it is the offset to the BEGINNING
603 of the first local allocated. */
605 #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
607 /* If we generate an insn to push BYTES bytes,
608 this says how many the stack pointer really advances by.
609 On Alpha, don't define this because there are no push insns. */
610 /* #define PUSH_ROUNDING(BYTES) */
612 /* Define this if the maximum size of all the outgoing args is to be
613 accumulated and pushed during the prologue. The amount can be
614 found in the variable current_function_outgoing_args_size. */
615 #define ACCUMULATE_OUTGOING_ARGS
617 /* Offset of first parameter from the argument pointer register value. */
619 #define FIRST_PARM_OFFSET(FNDECL) 0
621 /* Definitions for register eliminations.
623 We have two registers that can be eliminated on the Alpha. First, the
624 frame pointer register can often be eliminated in favor of the stack
625 pointer register. Secondly, the argument pointer register can always be
626 eliminated; it is replaced with either the stack or frame pointer. */
628 /* This is an array of structures. Each structure initializes one pair
629 of eliminable registers. The "from" register number is given first,
630 followed by "to". Eliminations of the same "from" register are listed
631 in order of preference. */
633 #define ELIMINABLE_REGS \
634 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
635 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
636 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
638 /* Given FROM and TO register numbers, say whether this elimination is allowed.
639 Frame pointer elimination is automatically handled.
641 All eliminations are valid since the cases where FP can't be
642 eliminated are already handled. */
644 #define CAN_ELIMINATE(FROM, TO) 1
646 /* Define the offset between two registers, one to be eliminated, and the other
647 its replacement, at the start of a routine. */
648 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
649 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
653 (OFFSET) = ((get_frame_size () + current_function_outgoing_args_size \
654 + current_function_pretend_args_size \
655 + alpha_sa_size () + 15) \
657 if ((FROM) == ARG_POINTER_REGNUM) \
658 (OFFSET) -= current_function_pretend_args_size; \
662 /* Define this if stack space is still allocated for a parameter passed
664 /* #define REG_PARM_STACK_SPACE */
666 /* Value is the number of bytes of arguments automatically
667 popped when returning from a subroutine call.
668 FUNTYPE is the data type of the function (as a tree),
669 or for a library call it is an identifier node for the subroutine name.
670 SIZE is the number of bytes of arguments passed on the stack. */
672 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
674 /* Define how to find the value returned by a function.
675 VALTYPE is the data type of the value (as a tree).
676 If the precise function being called is known, FUNC is its FUNCTION_DECL;
677 otherwise, FUNC is 0.
679 On Alpha the value is found in $0 for integer functions and
680 $f0 for floating-point functions. */
682 #define FUNCTION_VALUE(VALTYPE, FUNC) \
684 ((TREE_CODE (VALTYPE) == INTEGER_TYPE \
685 || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \
686 || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \
687 || TREE_CODE (VALTYPE) == CHAR_TYPE \
688 || TREE_CODE (VALTYPE) == POINTER_TYPE \
689 || TREE_CODE (VALTYPE) == OFFSET_TYPE) \
690 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
691 ? word_mode : TYPE_MODE (VALTYPE), \
692 TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
694 /* Define how to find the value returned by a library function
695 assuming the value has mode MODE. */
697 #define LIBCALL_VALUE(MODE) \
698 gen_rtx (REG, MODE, \
699 TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
701 /* The definition of this macro implies that there are cases where
702 a scalar value cannot be returned in registers.
704 For the Alpha, any structure or union type is returned in memory, as
705 are integers whose size is larger than 64 bits. */
707 #define RETURN_IN_MEMORY(TYPE) \
708 (TYPE_MODE (TYPE) == BLKmode \
709 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
711 /* 1 if N is a possible register number for a function value
712 as seen by the caller. */
714 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
716 /* 1 if N is a possible register number for function argument passing.
717 On Alpha, these are $16-$21 and $f16-$f21. */
719 #define FUNCTION_ARG_REGNO_P(N) \
720 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
722 /* Define a data type for recording info about an argument list
723 during the scan of that argument list. This data type should
724 hold all necessary information about the function itself
725 and about the args processed so far, enough to enable macros
726 such as FUNCTION_ARG to determine where the next arg should go.
728 On Alpha, this is a single integer, which is a number of words
729 of arguments scanned so far.
730 Thus 6 or more means all following args should go on the stack. */
732 #define CUMULATIVE_ARGS int
734 /* Initialize a variable CUM of type CUMULATIVE_ARGS
735 for a call to a function whose data type is FNTYPE.
736 For a library call, FNTYPE is 0. */
738 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
740 /* Define intermediate macro to compute the size (in registers) of an argument
743 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
745 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
746 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
748 /* Update the data in CUM to advance over an argument
749 of mode MODE and data type TYPE.
750 (TYPE is null for libcalls where that information may not be available.) */
752 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
753 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
756 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
758 /* Determine where to put an argument to a function.
759 Value is zero to push the argument on the stack,
760 or a hard register in which to store the argument.
762 MODE is the argument's machine mode.
763 TYPE is the data type of the argument (as a tree).
764 This is null for libcalls where that information may
766 CUM is a variable of type CUMULATIVE_ARGS which gives info about
767 the preceding args and about the function being called.
768 NAMED is nonzero if this argument is a named parameter
769 (otherwise it is an extra parameter matching an ellipsis).
771 On Alpha the first 6 words of args are normally in registers
772 and the rest are pushed. */
774 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
775 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
776 ? gen_rtx(REG, (MODE), \
777 (CUM) + 16 + ((TARGET_FPREGS \
778 && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
779 || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
783 /* Specify the padding direction of arguments.
785 On the Alpha, we must pad upwards in order to be able to pass args in
788 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
790 /* For an arg passed partly in registers and partly in memory,
791 this is the number of registers used.
792 For args passed entirely in registers or entirely in memory, zero. */
794 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
795 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
798 /* Perform any needed actions needed for a function that is receiving a
799 variable number of arguments.
803 MODE and TYPE are the mode and type of the current parameter.
805 PRETEND_SIZE is a variable that should be set to the amount of stack
806 that must be pushed by the prolog to pretend that our caller pushed
809 Normally, this macro will push all remaining incoming registers on the
810 stack and set PRETEND_SIZE to the length of the registers pushed.
812 On the Alpha, we allocate space for all 12 arg registers, but only
813 push those that are remaining.
815 However, if NO registers need to be saved, don't allocate any space.
816 This is not only because we won't need the space, but because AP includes
817 the current_pretend_args_size and we don't want to mess up any
818 ap-relative addresses already made.
820 If we are not to use the floating-point registers, save the integer
821 registers where we would put the floating-point registers. This is
822 not the most efficient way to implement varargs with just one register
823 class, but it isn't worth doing anything more efficient in this rare
827 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
832 move_block_from_reg \
834 gen_rtx (MEM, BLKmode, \
835 plus_constant (virtual_incoming_args_rtx, \
836 ((CUM) + 6)* UNITS_PER_WORD)), \
837 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
838 move_block_from_reg \
839 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
840 gen_rtx (MEM, BLKmode, \
841 plus_constant (virtual_incoming_args_rtx, \
842 (CUM) * UNITS_PER_WORD)), \
843 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
845 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
849 /* Generate necessary RTL for __builtin_saveregs().
850 ARGLIST is the argument list; see expr.c. */
851 extern struct rtx_def
*alpha_builtin_saveregs ();
852 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
854 /* Define the information needed to generate branch and scc insns. This is
855 stored from the compare operation. Note that we can't use "rtx" here
856 since it hasn't been defined! */
858 extern struct rtx_def
*alpha_compare_op0
, *alpha_compare_op1
;
859 extern int alpha_compare_fp_p
;
861 /* This macro produces the initial definition of a function name. On the
862 Alpha, we need to save the function name for the prologue and epilogue. */
864 extern char *alpha_function_name
;
866 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
868 alpha_function_name = NAME; \
871 /* This macro generates the assembly code for function entry.
872 FILE is a stdio stream to output the code to.
873 SIZE is an int: how many units of temporary storage to allocate.
874 Refer to the array `regs_ever_live' to determine which registers
875 to save; `regs_ever_live[I]' is nonzero if register number I
876 is ever used in the function. This macro is responsible for
877 knowing which registers should not be saved even if used. */
879 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
881 /* Output assembler code to FILE to increment profiler label # LABELNO
882 for profiling a function entry. */
884 #define FUNCTION_PROFILER(FILE, LABELNO)
886 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
887 the stack pointer does not matter. The value is tested only in
888 functions that have frame pointers.
889 No definition is equivalent to always zero. */
891 #define EXIT_IGNORE_STACK 1
893 /* This macro generates the assembly code for function exit,
894 on machines that need it. If FUNCTION_EPILOGUE is not defined
895 then individual return instructions are generated for each
896 return statement. Args are same as for FUNCTION_PROLOGUE.
898 The function epilogue should not depend on the current stack pointer!
899 It should use the frame pointer only. This is mandatory because
900 of alloca; we also take advantage of it to omit stack adjustments
903 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
906 /* Output assembler code for a block containing the constant parts
907 of a trampoline, leaving space for the variable parts.
909 The trampoline should set the static chain pointer to value placed
910 into the trampoline and should branch to the specified routine.
911 Note that $27 has been set to the address of the trampoline, so we can
912 use it for addressability of the two data items. Trampolines are always
913 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
915 #define TRAMPOLINE_TEMPLATE(FILE) \
917 fprintf (FILE, "\tldq $1,24($27)\n"); \
918 fprintf (FILE, "\tldq $27,16($27)\n"); \
919 fprintf (FILE, "\tjmp $31,($27),0\n"); \
920 fprintf (FILE, "\tnop\n"); \
921 fprintf (FILE, "\t.quad 0,0\n"); \
924 /* Section in which to place the trampoline. On Alpha, instructions
925 may only be placed in a text segment. */
927 #define TRAMPOLINE_SECTION text_section
929 /* Length in units of the trampoline for entering a nested function. */
931 #define TRAMPOLINE_SIZE 32
933 /* Emit RTL insns to initialize the variable parts of a trampoline.
934 FNADDR is an RTX for the address of the function's pure code.
935 CXT is an RTX for the static chain value for the function. We assume
936 here that a function will be called many more times than its address
937 is taken (e.g., it might be passed to qsort), so we take the trouble
938 to initialize the "hint" field in the JMP insn. Note that the hint
939 field is PC (new) + 4 * bits 13:0. */
941 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
943 rtx _temp, _temp1, _addr; \
945 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
946 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
947 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
948 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
950 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
951 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
953 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
954 build_int_2 (2, 0), NULL_RTX, 1); \
955 _temp = expand_and (gen_lowpart (SImode, _temp), \
956 GEN_INT (0x3fff), 0); \
958 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
959 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
960 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
961 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
964 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
966 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
967 "__enable_execute_stack"), \
968 0, VOIDmode, 1,_addr, Pmode); \
970 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
971 gen_rtvec (1, const0_rtx), 0)); \
974 /* Attempt to turn on access permissions for the stack. */
976 #define TRANSFER_FROM_TRAMPOLINE \
979 __enable_execute_stack (addr) \
982 long size = getpagesize (); \
983 long mask = ~(size-1); \
984 char *page = (char *) (((long) addr) & mask); \
985 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
987 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
988 if (mprotect (page, end - page, 7) < 0) \
989 perror ("mprotect of trampoline code"); \
992 /* Addressing modes, and classification of registers for them. */
994 /* #define HAVE_POST_INCREMENT */
995 /* #define HAVE_POST_DECREMENT */
997 /* #define HAVE_PRE_DECREMENT */
998 /* #define HAVE_PRE_INCREMENT */
1000 /* Macros to check register numbers against specific register classes. */
1002 /* These assume that REGNO is a hard or pseudo reg number.
1003 They give nonzero only if REGNO is a hard reg of the suitable class
1004 or a pseudo reg currently allocated to a suitable hard reg.
1005 Since they use reg_renumber, they are safe only once reg_renumber
1006 has been allocated, which happens in local-alloc.c. */
1008 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1009 #define REGNO_OK_FOR_BASE_P(REGNO) \
1010 (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1012 /* Maximum number of registers that can appear in a valid memory address. */
1013 #define MAX_REGS_PER_ADDRESS 1
1015 /* Recognize any constant value that is a valid address. For the Alpha,
1016 there are only constants none since we want to use LDA to load any
1017 symbolic addresses into registers. */
1019 #define CONSTANT_ADDRESS_P(X) \
1020 (GET_CODE (X) == CONST_INT \
1021 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1023 /* Include all constant integers and constant doubles, but not
1024 floating-point, except for floating-point zero. */
1026 #define LEGITIMATE_CONSTANT_P(X) \
1027 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1028 || (X) == CONST0_RTX (GET_MODE (X)))
1030 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1031 and check its validity for a certain class.
1032 We have two alternate definitions for each of them.
1033 The usual definition accepts all pseudo regs; the other rejects
1034 them unless they have been allocated suitable hard regs.
1035 The symbol REG_OK_STRICT causes the latter definition to be used.
1037 Most source files want to accept pseudo regs in the hope that
1038 they will get allocated to the class that the insn wants them to be in.
1039 Source files for reload pass need to be strict.
1040 After reload, it makes no difference, since pseudo regs have
1041 been eliminated by then. */
1043 #ifndef REG_OK_STRICT
1045 /* Nonzero if X is a hard reg that can be used as an index
1046 or if it is a pseudo reg. */
1047 #define REG_OK_FOR_INDEX_P(X) 0
1048 /* Nonzero if X is a hard reg that can be used as a base reg
1049 or if it is a pseudo reg. */
1050 #define REG_OK_FOR_BASE_P(X) \
1051 (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1055 /* Nonzero if X is a hard reg that can be used as an index. */
1056 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1057 /* Nonzero if X is a hard reg that can be used as a base reg. */
1058 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1062 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1063 that is a valid memory address for an instruction.
1064 The MODE argument is the machine mode for the MEM expression
1065 that wants to use this address.
1067 For Alpha, we have either a constant address or the sum of a register
1068 and a constant address, or just a register. For DImode, any of those
1069 forms can be surrounded with an AND that clear the low-order three bits;
1070 this is an "unaligned" access.
1072 We also allow a SYMBOL_REF that is the name of the current function as
1073 valid address. This is for CALL_INSNs. It cannot be used in any other
1076 First define the basic valid address. */
1078 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1079 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1081 if (CONSTANT_ADDRESS_P (X)) \
1083 if (GET_CODE (X) == PLUS \
1084 && REG_P (XEXP (X, 0)) \
1085 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1086 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1090 /* Now accept the simple address, or, for DImode only, an AND of a simple
1091 address that turns off the low three bits. */
1093 extern char *current_function_name
;
1095 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1096 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1097 if ((MODE) == DImode \
1098 && GET_CODE (X) == AND \
1099 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1100 && INTVAL (XEXP (X, 1)) == -8) \
1101 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1102 if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \
1103 && ! strcmp (XSTR (X, 0), current_function_name)) \
1107 /* Try machine-dependent ways of modifying an illegitimate address
1108 to be legitimate. If we find one, return the new, valid address.
1109 This macro is used in only one place: `memory_address' in explow.c.
1111 OLDX is the address as it was before break_out_memory_refs was called.
1112 In some cases it is useful to look at this to decide what needs to be done.
1114 MODE and WIN are passed so that this macro can use
1115 GO_IF_LEGITIMATE_ADDRESS.
1117 It is always safe for this macro to do nothing. It exists to recognize
1118 opportunities to optimize the output.
1120 For the Alpha, there are three cases we handle:
1122 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1123 valid offset, compute the high part of the constant and add it to the
1124 register. Then our address is (plus temp low-part-const).
1125 (2) If the address is (const (plus FOO const_int)), find the low-order
1126 part of the CONST_INT. Then load FOO plus any high-order part of the
1127 CONST_INT into a register. Our address is (plus reg low-part-const).
1128 This is done to reduce the number of GOT entries.
1129 (3) If we have a (plus reg const), emit the load as in (2), then add
1130 the two registers, and finally generate (plus reg low-part-const) as
1133 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1134 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1135 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1136 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1138 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1139 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1140 HOST_WIDE_INT highpart = val - lowpart; \
1141 rtx high = GEN_INT (highpart); \
1142 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1143 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1145 (X) = plus_constant (temp, lowpart); \
1148 else if (GET_CODE (X) == CONST \
1149 && GET_CODE (XEXP (X, 0)) == PLUS \
1150 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1152 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1153 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1154 HOST_WIDE_INT highpart = val - lowpart; \
1155 rtx high = XEXP (XEXP (X, 0), 0); \
1158 high = plus_constant (high, highpart); \
1160 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1163 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1164 && GET_CODE (XEXP (X, 1)) == CONST \
1165 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1166 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1168 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1169 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1170 HOST_WIDE_INT highpart = val - lowpart; \
1171 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1174 high = plus_constant (high, highpart); \
1176 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1177 force_reg (Pmode, high), \
1178 high, 1, OPTAB_LIB_WIDEN); \
1179 (X) = plus_constant (high, lowpart); \
1184 /* Go to LABEL if ADDR (a legitimate address expression)
1185 has an effect that depends on the machine mode it is used for.
1186 On the Alpha this is true only for the unaligned modes. We can
1187 simplify this test since we know that the address must be valid. */
1189 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1190 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1192 /* Compute the cost of an address. For the Alpha, all valid addresses are
1195 #define ADDRESS_COST(X) 0
1197 /* Define this if some processing needs to be done immediately before
1198 emitting code for an insn. */
1200 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1202 /* Specify the machine mode that this machine uses
1203 for the index in the tablejump instruction. */
1204 #define CASE_VECTOR_MODE SImode
1206 /* Define this if the tablejump instruction expects the table
1207 to contain offsets from the address of the table.
1208 Do not define this if the table should contain absolute addresses. */
1209 /* #define CASE_VECTOR_PC_RELATIVE */
1211 /* Specify the tree operation to be used to convert reals to integers. */
1212 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1214 /* This is the kind of divide that is easiest to do in the general case. */
1215 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1217 /* Define this as 1 if `char' should by default be signed; else as 0. */
1218 #define DEFAULT_SIGNED_CHAR 1
1220 /* This flag, if defined, says the same insns that convert to a signed fixnum
1221 also convert validly to an unsigned one.
1223 We actually lie a bit here as overflow conditions are different. But
1224 they aren't being checked anyway. */
1226 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1228 /* Max number of bytes we can move to or from memory
1229 in one reasonably fast instruction. */
1233 /* Largest number of bytes of an object that can be placed in a register.
1234 On the Alpha we have plenty of registers, so use TImode. */
1235 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1237 /* Nonzero if access to memory by bytes is no faster than for words.
1238 Also non-zero if doing byte operations (specifically shifts) in registers
1241 On the Alpha, we want to not use the byte operation and instead use
1242 masking operations to access fields; these will save instructions. */
1244 #define SLOW_BYTE_ACCESS 1
1246 /* Define if operations between registers always perform the operation
1247 on the full register even if a narrower mode is specified. */
1248 #define WORD_REGISTER_OPERATIONS
1250 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1251 will either zero-extend or sign-extend. The value of this macro should
1252 be the code that says which one of the two operations is implicitly
1253 done, NIL if none. */
1254 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1256 /* Define if loading short immediate values into registers sign extends. */
1257 #define SHORT_IMMEDIATES_SIGN_EXTEND
1259 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1260 is done just by pretending it is already truncated. */
1261 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1263 /* We assume that the store-condition-codes instructions store 0 for false
1264 and some other value for true. This is the value stored for true. */
1266 #define STORE_FLAG_VALUE 1
1268 /* Define the value returned by a floating-point comparison instruction. */
1270 #define FLOAT_STORE_FLAG_VALUE 0.5
1272 /* Specify the machine mode that pointers have.
1273 After generation of rtl, the compiler makes no further distinction
1274 between pointers and any other objects of this machine mode. */
1275 #define Pmode DImode
1277 /* Mode of a function address in a call instruction (for indexing purposes). */
1279 #define FUNCTION_MODE Pmode
1281 /* Define this if addresses of constant functions
1282 shouldn't be put through pseudo regs where they can be cse'd.
1283 Desirable on machines where ordinary constants are expensive
1284 but a CALL with constant address is cheap.
1286 We define this on the Alpha so that gen_call and gen_call_value
1287 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1288 then copy it into a register, thus actually letting the address be
1291 #define NO_FUNCTION_CSE
1293 /* Define this to be nonzero if shift instructions ignore all but the low-order
1295 #define SHIFT_COUNT_TRUNCATED 1
1297 /* Use atexit for static constructors/destructors, instead of defining
1298 our own exit function. */
1301 /* Compute the cost of computing a constant rtl expression RTX
1302 whose rtx-code is CODE. The body of this macro is a portion
1303 of a switch statement. If the code is computed here,
1304 return it with a return statement. Otherwise, break from the switch.
1306 We only care about the cost if it is valid in an insn, so all constants
1309 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1311 case CONST_DOUBLE: \
1318 /* Provide the costs of a rtl expression. This is in the body of a
1321 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1324 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1325 return COSTS_N_INSNS (6); \
1326 else if (GET_CODE (XEXP (X, 0)) == MULT \
1327 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1328 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1329 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1332 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1333 return COSTS_N_INSNS (6); \
1334 else if (GET_CODE (XEXP (X, 1)) != CONST_INT \
1335 || exact_log2 (INTVAL (XEXP (X, 1))) < 0) \
1336 return COSTS_N_INSNS (21); \
1337 else if (const48_operand (XEXP (X, 1), VOIDmode)) \
1339 return COSTS_N_INSNS (2); \
1341 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1342 && INTVAL (XEXP (X, 1)) <= 3) \
1344 /* ... fall through ... */ \
1345 case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1346 return COSTS_N_INSNS (2); \
1351 if (GET_MODE (X) == SFmode) \
1352 return COSTS_N_INSNS (34); \
1353 else if (GET_MODE (X) == DFmode) \
1354 return COSTS_N_INSNS (63); \
1356 return COSTS_N_INSNS (70); \
1358 return COSTS_N_INSNS (3);
1360 /* Control the assembler format that we output. */
1362 /* Output at beginning of assembler file. */
1364 #define ASM_FILE_START(FILE) \
1366 alpha_write_verstamp (FILE); \
1367 fprintf (FILE, "\t.set noreorder\n"); \
1368 fprintf (FILE, "\t.set noat\n"); \
1369 ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1372 /* Output to assembler file text saying following lines
1373 may contain character constants, extra white space, comments, etc. */
1375 #define ASM_APP_ON ""
1377 /* Output to assembler file text saying following lines
1378 no longer contain unusual constructs. */
1380 #define ASM_APP_OFF ""
1382 #define TEXT_SECTION_ASM_OP ".text"
1384 /* Output before read-only data. */
1386 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1388 /* Output before writable data. */
1390 #define DATA_SECTION_ASM_OP ".data"
1392 /* Define an extra section for read-only data, a routine to enter it, and
1393 indicate that it is for read-only data. */
1395 #define EXTRA_SECTIONS readonly_data
1397 #define EXTRA_SECTION_FUNCTIONS \
1399 literal_section () \
1401 if (in_section != readonly_data) \
1403 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1404 in_section = readonly_data; \
1408 #define READONLY_DATA_SECTION literal_section
1410 /* If we are referencing a function that is static or is known to be
1411 in this file, make the SYMBOL_REF special. We can use this to see
1412 indicate that we can branch to this function without setting PV or
1415 #define ENCODE_SECTION_INFO(DECL) \
1416 if (TREE_CODE (DECL) == FUNCTION_DECL \
1417 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1418 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1420 /* How to refer to registers in assembler output.
1421 This sequence is indexed by compiler's hard-register-number (see above). */
1423 #define REGISTER_NAMES \
1424 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1425 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1426 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1427 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1428 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1429 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1430 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1431 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"}
1433 /* How to renumber registers for dbx and gdb. */
1435 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1437 /* This is how to output the definition of a user-level label named NAME,
1438 such as the label on a static function or variable NAME. */
1440 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1441 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1443 /* This is how to output a command to make the user-level label named NAME
1444 defined for reference from other files. */
1446 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1447 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1449 /* This is how to output a reference to a user-level label named NAME.
1450 `assemble_name' uses this. */
1452 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1453 fprintf (FILE, "%s", NAME)
1455 /* This is how to output an internal numbered label where
1456 PREFIX is the class of label and NUM is the number within the class. */
1458 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1459 if ((PREFIX)[0] == 'L') \
1460 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1462 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1464 /* This is how to output a label for a jump table. Arguments are the same as
1465 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1468 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1469 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1471 /* This is how to store into the string LABEL
1472 the symbol_ref name of an internal numbered label where
1473 PREFIX is the class of label and NUM is the number within the class.
1474 This is suitable for output with `assemble_name'. */
1476 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1477 if ((PREFIX)[0] == 'L') \
1478 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1480 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1482 /* This is how to output an assembler line defining a `double' constant. */
1484 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1486 if (REAL_VALUE_ISINF (VALUE) \
1487 || REAL_VALUE_ISNAN (VALUE) \
1488 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1491 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1492 fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1493 t[1] & 0xffffffff, t[0] & 0xffffffff); \
1498 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1499 fprintf (FILE, "\t.t_floating %s\n", str); \
1503 /* This is how to output an assembler line defining a `float' constant. */
1505 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1507 if (REAL_VALUE_ISINF (VALUE) \
1508 || REAL_VALUE_ISNAN (VALUE) \
1509 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1512 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1513 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1518 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1519 fprintf (FILE, "\t.s_floating %s\n", str); \
1523 /* This is how to output an assembler line defining an `int' constant. */
1525 #define ASM_OUTPUT_INT(FILE,VALUE) \
1526 fprintf (FILE, "\t.long %d\n", \
1527 (GET_CODE (VALUE) == CONST_INT \
1528 ? INTVAL (VALUE) & 0xffffffff : (abort (), 0)))
1530 /* This is how to output an assembler line defining a `long' constant. */
1532 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1533 ( fprintf (FILE, "\t.quad "), \
1534 output_addr_const (FILE, (VALUE)), \
1535 fprintf (FILE, "\n"))
1537 /* Likewise for `char' and `short' constants. */
1539 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1540 fprintf (FILE, "\t.word %d\n", \
1541 (GET_CODE (VALUE) == CONST_INT \
1542 ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1544 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1545 fprintf (FILE, "\t.byte %d\n", \
1546 (GET_CODE (VALUE) == CONST_INT \
1547 ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1549 /* We use the default ASCII-output routine, except that we don't write more
1550 than 50 characters since the assembler doesn't support very long lines. */
1552 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1554 FILE *_hide_asm_out_file = (MYFILE); \
1555 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1556 int _hide_thissize = (MYLENGTH); \
1557 int _size_so_far = 0; \
1559 FILE *asm_out_file = _hide_asm_out_file; \
1560 unsigned char *p = _hide_p; \
1561 int thissize = _hide_thissize; \
1563 fprintf (asm_out_file, "\t.ascii \""); \
1565 for (i = 0; i < thissize; i++) \
1567 register int c = p[i]; \
1569 if (_size_so_far ++ > 50 && i < thissize - 4) \
1570 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1572 if (c == '\"' || c == '\\') \
1573 putc ('\\', asm_out_file); \
1574 if (c >= ' ' && c < 0177) \
1575 putc (c, asm_out_file); \
1578 fprintf (asm_out_file, "\\%o", c); \
1579 /* After an octal-escape, if a digit follows, \
1580 terminate one string constant and start another. \
1581 The Vax assembler fails to stop reading the escape \
1582 after three digits, so this is the only way we \
1583 can get it to parse the data properly. */ \
1584 if (i < thissize - 1 \
1585 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1586 fprintf (asm_out_file, "\"\n\t.ascii \""); \
1589 fprintf (asm_out_file, "\"\n"); \
1593 /* This is how to output an insn to push a register on the stack.
1594 It need not be very fast code. */
1596 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1597 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1598 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1601 /* This is how to output an insn to pop a register from the stack.
1602 It need not be very fast code. */
1604 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1605 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1606 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1609 /* This is how to output an assembler line for a numeric constant byte. */
1611 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1612 fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1614 /* This is how to output an element of a case-vector that is absolute. */
1616 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1617 fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1619 /* This is how to output an element of a case-vector that is relative.
1620 (Alpha does not use such vectors, but we must define this macro anyway.) */
1622 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1624 /* This is how to output an assembler line
1625 that says to advance the location counter
1626 to a multiple of 2**LOG bytes. */
1628 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1630 fprintf (FILE, "\t.align %d\n", LOG);
1632 /* This is how to advance the location counter by SIZE bytes. */
1634 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1635 fprintf (FILE, "\t.space %d\n", (SIZE))
1637 /* This says how to output an assembler line
1638 to define a global common symbol. */
1640 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1641 ( fputs ("\t.comm ", (FILE)), \
1642 assemble_name ((FILE), (NAME)), \
1643 fprintf ((FILE), ",%d\n", (SIZE)))
1645 /* This says how to output an assembler line
1646 to define a local common symbol. */
1648 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1649 ( fputs ("\t.lcomm ", (FILE)), \
1650 assemble_name ((FILE), (NAME)), \
1651 fprintf ((FILE), ",%d\n", (SIZE)))
1653 /* Store in OUTPUT a string (made with alloca) containing
1654 an assembler-name for a local static variable named NAME.
1655 LABELNO is an integer which is different for each call. */
1657 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1658 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1659 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1661 /* Define the parentheses used to group arithmetic operations
1662 in assembler code. */
1664 #define ASM_OPEN_PAREN "("
1665 #define ASM_CLOSE_PAREN ")"
1667 /* Define results of standard character escape sequences. */
1668 #define TARGET_BELL 007
1669 #define TARGET_BS 010
1670 #define TARGET_TAB 011
1671 #define TARGET_NEWLINE 012
1672 #define TARGET_VT 013
1673 #define TARGET_FF 014
1674 #define TARGET_CR 015
1676 /* Print operand X (an rtx) in assembler syntax to file FILE.
1677 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1678 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1680 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1682 /* Determine which codes are valid without a following integer. These must
1683 not be alphabetic. */
1685 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1687 /* Print a memory address as an operand to reference that memory location. */
1689 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1690 { rtx addr = (ADDR); \
1692 HOST_WIDE_INT offset = 0; \
1694 if (GET_CODE (addr) == AND) \
1695 addr = XEXP (addr, 0); \
1697 if (GET_CODE (addr) == REG) \
1698 basereg = REGNO (addr); \
1699 else if (GET_CODE (addr) == CONST_INT) \
1700 offset = INTVAL (addr); \
1701 else if (GET_CODE (addr) == PLUS \
1702 && GET_CODE (XEXP (addr, 0)) == REG \
1703 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1704 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1708 fprintf (FILE, "%d($%d)", offset, basereg); \
1710 /* Define the codes that are matched by predicates in alpha.c. */
1712 #define PREDICATE_CODES \
1713 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1714 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1715 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1716 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1717 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1718 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1719 {"const48_operand", {CONST_INT}}, \
1720 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1721 {"ior_operand", {SUBREG, REG, CONST_INT}}, \
1722 {"mode_mask_operand", {CONST_INT}}, \
1723 {"mul8_operand", {CONST_INT}}, \
1724 {"mode_width_operand", {CONST_INT}}, \
1725 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1726 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1727 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1728 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1729 {"fp0_operand", {CONST_DOUBLE}}, \
1730 {"current_file_function_operand", {SYMBOL_REF}}, \
1731 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1732 SYMBOL_REF, CONST, LABEL_REF}}, \
1733 {"aligned_memory_operand", {MEM}}, \
1734 {"unaligned_memory_operand", {MEM}}, \
1735 {"any_memory_operand", {MEM}},
1737 /* Definitions for debugging. */
1739 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1740 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1741 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1743 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1744 #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1748 /* Correct the offset of automatic variables and arguments. Note that
1749 the Alpha debug format wants all automatic variables and arguments
1750 to be in terms of two different offsets from the virtual frame pointer,
1751 which is the stack pointer before any adjustment in the function.
1752 The offset for the argument pointer is fixed for the native compiler,
1753 it is either zero (for the no arguments case) or large enough to hold
1754 all argument registers.
1755 The offset for the auto pointer is the fourth argument to the .frame
1756 directive (local_offset).
1757 To stay compatible with the native tools we use the same offsets
1758 from the virtual frame pointer and adjust the debugger arg/auto offsets
1759 accordingly. These debugger offsets are set up in output_prolog. */
1761 long alpha_arg_offset
;
1762 long alpha_auto_offset
;
1763 #define DEBUGGER_AUTO_OFFSET(X) \
1764 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1765 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1768 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1769 alpha_output_lineno (STREAM, LINE)
1770 extern void alpha_output_lineno ();
1772 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1773 alpha_output_filename (STREAM, NAME)
1774 extern void alpha_output_filename ();
1777 /* mips-tfile.c limits us to strings of one page. */
1778 #define DBX_CONTIN_LENGTH 4000
1780 /* By default, turn on GDB extensions. */
1781 #define DEFAULT_GDB_EXTENSIONS 1
1783 /* If we are smuggling stabs through the ALPHA ECOFF object
1784 format, put a comment in front of the .stab<x> operation so
1785 that the ALPHA assembler does not choke. The mips-tfile program
1786 will correctly put the stab into the object file. */
1788 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
1789 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
1790 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
1792 /* Forward references to tags are allowed. */
1793 #define SDB_ALLOW_FORWARD_REFERENCES
1795 /* Unknown tags are also allowed. */
1796 #define SDB_ALLOW_UNKNOWN_REFERENCES
1798 #define PUT_SDB_DEF(a) \
1800 fprintf (asm_out_file, "\t%s.def\t", \
1801 (TARGET_GAS) ? "" : "#"); \
1802 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1803 fputc (';', asm_out_file); \
1806 #define PUT_SDB_PLAIN_DEF(a) \
1808 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1809 (TARGET_GAS) ? "" : "#", (a)); \
1812 #define PUT_SDB_TYPE(a) \
1814 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1817 /* For block start and end, we create labels, so that
1818 later we can figure out where the correct offset is.
1819 The normal .ent/.end serve well enough for functions,
1820 so those are just commented out. */
1822 extern int sdb_label_count
; /* block start/end next label # */
1824 #define PUT_SDB_BLOCK_START(LINE) \
1826 fprintf (asm_out_file, \
1827 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1829 (TARGET_GAS) ? "" : "#", \
1832 sdb_label_count++; \
1835 #define PUT_SDB_BLOCK_END(LINE) \
1837 fprintf (asm_out_file, \
1838 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1840 (TARGET_GAS) ? "" : "#", \
1843 sdb_label_count++; \
1846 #define PUT_SDB_FUNCTION_START(LINE)
1848 #define PUT_SDB_FUNCTION_END(LINE)
1850 #define PUT_SDB_EPILOGUE_END(NAME)
1852 /* Specify to run a post-processor, mips-tfile after the assembler
1853 has run to stuff the ecoff debug information into the object file.
1854 This is needed because the Alpha assembler provides no way
1855 of specifying such information in the assembly file. */
1857 #if (TARGET_DEFAULT & MASK_GAS) != 0
1859 #define ASM_FINAL_SPEC "\
1860 %{malpha-as: %{!mno-mips-tfile: \
1861 \n mips-tfile %{v*: -v} \
1863 %{!K: %{save-temps: -I %b.o~}} \
1864 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1865 %{.s:%i} %{!.s:%g.s}}}"
1868 #define ASM_FINAL_SPEC "\
1869 %{!mgas: %{!mno-mips-tfile: \
1870 \n mips-tfile %{v*: -v} \
1872 %{!K: %{save-temps: -I %b.o~}} \
1873 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1874 %{.s:%i} %{!.s:%g.s}}}"
1878 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1879 mips-tdump.c to print them out.
1881 These must match the corresponding definitions in gdb/mipsread.c.
1882 Unfortunately, gcc and gdb do not currently share any directories. */
1884 #define CODE_MASK 0x8F300
1885 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1886 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1887 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1889 /* Override some mips-tfile definitions. */
1891 #define SHASH_SIZE 511
1892 #define THASH_SIZE 55