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alpha.h (PROMOTE_MODE): Don't promote vector types.
[gcc.git] / gcc / config / alpha / alpha.h
1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
25 do \
26 { \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
31 if (TARGET_CIX) \
32 { \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
35 } \
36 if (TARGET_FIX) \
37 { \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
40 } \
41 if (TARGET_BWX) \
42 { \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
45 } \
46 if (TARGET_MAX) \
47 { \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
50 } \
51 if (TARGET_CPU_EV6) \
52 { \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
55 } \
56 else if (TARGET_CPU_EV5) \
57 { \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
60 } \
61 else /* Presumably ev4. */ \
62 { \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
65 } \
66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
67 builtin_define ("_IEEE_FP"); \
68 if (TARGET_IEEE_WITH_INEXACT) \
69 builtin_define ("_IEEE_FP_INEXACT"); \
70 if (TARGET_LONG_DOUBLE_128) \
71 builtin_define ("__LONG_DOUBLE_128__"); \
72 \
73 /* Macros dependent on the C dialect. */ \
74 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
75 } while (0)
76
77 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
78 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
79 do \
80 { \
81 if (preprocessing_asm_p ()) \
82 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
83 else if (c_dialect_cxx ()) \
84 { \
85 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
86 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
87 } \
88 else \
89 builtin_define_std ("LANGUAGE_C"); \
90 if (c_dialect_objc ()) \
91 { \
92 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
93 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
94 } \
95 } \
96 while (0)
97 #endif
98
99 #define CPP_SPEC "%(cpp_subtarget)"
100
101 #ifndef CPP_SUBTARGET_SPEC
102 #define CPP_SUBTARGET_SPEC ""
103 #endif
104
105 #define WORD_SWITCH_TAKES_ARG(STR) \
106 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
107
108 /* Print subsidiary information on the compiler version in use. */
109 #define TARGET_VERSION
110
111 /* Run-time compilation parameters selecting different hardware subsets. */
112
113 /* Which processor to schedule for. The cpu attribute defines a list that
114 mirrors this list, so changes to alpha.md must be made at the same time. */
115
116 enum processor_type
117 {
118 PROCESSOR_EV4, /* 2106[46]{a,} */
119 PROCESSOR_EV5, /* 21164{a,pc,} */
120 PROCESSOR_EV6, /* 21264 */
121 PROCESSOR_MAX
122 };
123
124 extern enum processor_type alpha_cpu;
125
126 enum alpha_trap_precision
127 {
128 ALPHA_TP_PROG, /* No precision (default). */
129 ALPHA_TP_FUNC, /* Trap contained within originating function. */
130 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
131 };
132
133 enum alpha_fp_rounding_mode
134 {
135 ALPHA_FPRM_NORM, /* Normal rounding mode. */
136 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
137 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
138 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
139 };
140
141 enum alpha_fp_trap_mode
142 {
143 ALPHA_FPTM_N, /* Normal trap mode. */
144 ALPHA_FPTM_U, /* Underflow traps enabled. */
145 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
146 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
147 };
148
149 extern int target_flags;
150
151 extern enum alpha_trap_precision alpha_tp;
152 extern enum alpha_fp_rounding_mode alpha_fprm;
153 extern enum alpha_fp_trap_mode alpha_fptm;
154 extern int alpha_tls_size;
155
156 /* This means that floating-point support exists in the target implementation
157 of the Alpha architecture. This is usually the default. */
158 #define MASK_FP (1 << 0)
159 #define TARGET_FP (target_flags & MASK_FP)
160
161 /* This means that floating-point registers are allowed to be used. Note
162 that Alpha implementations without FP operations are required to
163 provide the FP registers. */
164
165 #define MASK_FPREGS (1 << 1)
166 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
167
168 /* This means that gas is used to process the assembler file. */
169
170 #define MASK_GAS (1 << 2)
171 #define TARGET_GAS (target_flags & MASK_GAS)
172
173 /* This means that we should mark procedures as IEEE conformant. */
174
175 #define MASK_IEEE_CONFORMANT (1 << 3)
176 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
177
178 /* This means we should be IEEE-compliant except for inexact. */
179
180 #define MASK_IEEE (1 << 4)
181 #define TARGET_IEEE (target_flags & MASK_IEEE)
182
183 /* This means we should be fully IEEE-compliant. */
184
185 #define MASK_IEEE_WITH_INEXACT (1 << 5)
186 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
187
188 /* This means we must construct all constants rather than emitting
189 them as literal data. */
190
191 #define MASK_BUILD_CONSTANTS (1 << 6)
192 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
193
194 /* This means we handle floating points in VAX F- (float)
195 or G- (double) Format. */
196
197 #define MASK_FLOAT_VAX (1 << 7)
198 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
199
200 /* This means that the processor has byte and half word loads and stores
201 (the BWX extension). */
202
203 #define MASK_BWX (1 << 8)
204 #define TARGET_BWX (target_flags & MASK_BWX)
205
206 /* This means that the processor has the MAX extension. */
207 #define MASK_MAX (1 << 9)
208 #define TARGET_MAX (target_flags & MASK_MAX)
209
210 /* This means that the processor has the FIX extension. */
211 #define MASK_FIX (1 << 10)
212 #define TARGET_FIX (target_flags & MASK_FIX)
213
214 /* This means that the processor has the CIX extension. */
215 #define MASK_CIX (1 << 11)
216 #define TARGET_CIX (target_flags & MASK_CIX)
217
218 /* This means use !literal style explicit relocations. */
219 #define MASK_EXPLICIT_RELOCS (1 << 12)
220 #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
221
222 /* This means use 16-bit relocations to .sdata/.sbss. */
223 #define MASK_SMALL_DATA (1 << 13)
224 #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA)
225
226 /* This means emit thread pointer loads for kernel not user. */
227 #define MASK_TLS_KERNEL (1 << 14)
228 #define TARGET_TLS_KERNEL (target_flags & MASK_TLS_KERNEL)
229
230 /* This means use direct branches to local functions. */
231 #define MASK_SMALL_TEXT (1 << 15)
232 #define TARGET_SMALL_TEXT (target_flags & MASK_SMALL_TEXT)
233
234 /* This means use IEEE quad-format for long double. Assumes the
235 presence of the GEM support library routines. */
236 #define MASK_LONG_DOUBLE_128 (1 << 16)
237 #define TARGET_LONG_DOUBLE_128 (target_flags & MASK_LONG_DOUBLE_128)
238
239 /* This means that the processor is an EV5, EV56, or PCA56.
240 Unlike alpha_cpu this is not affected by -mtune= setting. */
241 #define MASK_CPU_EV5 (1 << 28)
242 #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5)
243
244 /* Likewise for EV6. */
245 #define MASK_CPU_EV6 (1 << 29)
246 #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6)
247
248 /* This means we support the .arch directive in the assembler. Only
249 defined in TARGET_CPU_DEFAULT. */
250 #define MASK_SUPPORT_ARCH (1 << 30)
251 #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
252
253 /* These are for target os support and cannot be changed at runtime. */
254 #define TARGET_ABI_WINDOWS_NT 0
255 #define TARGET_ABI_OPEN_VMS 0
256 #define TARGET_ABI_UNICOSMK 0
257 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
258 && !TARGET_ABI_OPEN_VMS \
259 && !TARGET_ABI_UNICOSMK)
260
261 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
262 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
263 #endif
264 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
265 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
266 #endif
267 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
268 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
269 #endif
270 #ifndef TARGET_HAS_XFLOATING_LIBS
271 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128
272 #endif
273 #ifndef TARGET_PROFILING_NEEDS_GP
274 #define TARGET_PROFILING_NEEDS_GP 0
275 #endif
276 #ifndef TARGET_LD_BUGGY_LDGP
277 #define TARGET_LD_BUGGY_LDGP 0
278 #endif
279 #ifndef TARGET_FIXUP_EV5_PREFETCH
280 #define TARGET_FIXUP_EV5_PREFETCH 0
281 #endif
282 #ifndef HAVE_AS_TLS
283 #define HAVE_AS_TLS 0
284 #endif
285
286 /* Macro to define tables used to set the flags.
287 This is a list in braces of pairs in braces,
288 each pair being { "NAME", VALUE }
289 where VALUE is the bits to set or minus the bits to clear.
290 An empty string NAME is used to identify the default VALUE. */
291
292 #define TARGET_SWITCHES \
293 { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \
294 {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \
295 {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \
296 {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \
297 N_("Do not use fp registers")}, \
298 {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \
299 {"gas", MASK_GAS, N_("Assume GAS")}, \
300 {"ieee-conformant", MASK_IEEE_CONFORMANT, \
301 N_("Request IEEE-conformant math library routines (OSF/1)")}, \
302 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \
303 N_("Emit IEEE-conformant code, without inexact exceptions")}, \
304 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \
305 N_("Emit IEEE-conformant code, with inexact exceptions")}, \
306 {"build-constants", MASK_BUILD_CONSTANTS, \
307 N_("Do not emit complex integer constants to read-only memory")}, \
308 {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \
309 {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \
310 {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \
311 {"no-bwx", -MASK_BWX, ""}, \
312 {"max", MASK_MAX, \
313 N_("Emit code for the motion video ISA extension")}, \
314 {"no-max", -MASK_MAX, ""}, \
315 {"fix", MASK_FIX, \
316 N_("Emit code for the fp move and sqrt ISA extension")}, \
317 {"no-fix", -MASK_FIX, ""}, \
318 {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
319 {"no-cix", -MASK_CIX, ""}, \
320 {"explicit-relocs", MASK_EXPLICIT_RELOCS, \
321 N_("Emit code using explicit relocation directives")}, \
322 {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
323 {"small-data", MASK_SMALL_DATA, \
324 N_("Emit 16-bit relocations to the small data areas")}, \
325 {"large-data", -MASK_SMALL_DATA, \
326 N_("Emit 32-bit relocations to the small data areas")}, \
327 {"small-text", MASK_SMALL_TEXT, \
328 N_("Emit direct branches to local functions")}, \
329 {"large-text", -MASK_SMALL_TEXT, ""}, \
330 {"tls-kernel", MASK_TLS_KERNEL, \
331 N_("Emit rdval instead of rduniq for thread pointer")}, \
332 {"long-double-128", MASK_LONG_DOUBLE_128, \
333 N_("Use 128-bit long double")}, \
334 {"long-double-64", -MASK_LONG_DOUBLE_128, \
335 N_("Use 64-bit long double")}, \
336 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \
337 | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} }
338
339 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
340
341 #ifndef TARGET_CPU_DEFAULT
342 #define TARGET_CPU_DEFAULT 0
343 #endif
344
345 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
346 #ifdef HAVE_AS_EXPLICIT_RELOCS
347 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
348 #else
349 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
350 #endif
351 #endif
352
353 extern const char *alpha_cpu_string; /* For -mcpu= */
354 extern const char *alpha_tune_string; /* For -mtune= */
355 extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
356 extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
357 extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
358 extern const char *alpha_mlat_string; /* For -mmemory-latency= */
359 extern const char *alpha_tls_size_string; /* For -mtls-size= */
360
361 #define TARGET_OPTIONS \
362 { \
363 {"cpu=", &alpha_cpu_string, \
364 N_("Use features of and schedule given CPU"), 0}, \
365 {"tune=", &alpha_tune_string, \
366 N_("Schedule given CPU"), 0}, \
367 {"fp-rounding-mode=", &alpha_fprm_string, \
368 N_("Control the generated fp rounding mode"), 0}, \
369 {"fp-trap-mode=", &alpha_fptm_string, \
370 N_("Control the IEEE trap mode"), 0}, \
371 {"trap-precision=", &alpha_tp_string, \
372 N_("Control the precision given to fp exceptions"), 0}, \
373 {"memory-latency=", &alpha_mlat_string, \
374 N_("Tune expected memory latency"), 0}, \
375 {"tls-size=", &alpha_tls_size_string, \
376 N_("Specify bit size of immediate TLS offsets"), 0}, \
377 }
378
379 /* Support for a compile-time default CPU, et cetera. The rules are:
380 --with-cpu is ignored if -mcpu is specified.
381 --with-tune is ignored if -mtune is specified. */
382 #define OPTION_DEFAULT_SPECS \
383 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
384 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
385
386 /* This macro defines names of additional specifications to put in the
387 specs that can be used in various specifications like CC1_SPEC. Its
388 definition is an initializer with a subgrouping for each command option.
389
390 Each subgrouping contains a string constant, that defines the
391 specification name, and a string constant that used by the GCC driver
392 program.
393
394 Do not define this macro if it does not need to do anything. */
395
396 #ifndef SUBTARGET_EXTRA_SPECS
397 #define SUBTARGET_EXTRA_SPECS
398 #endif
399
400 #define EXTRA_SPECS \
401 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \
402 SUBTARGET_EXTRA_SPECS
403
404
405 /* Sometimes certain combinations of command options do not make sense
406 on a particular target machine. You can define a macro
407 `OVERRIDE_OPTIONS' to take account of this. This macro, if
408 defined, is executed once just after all the command options have
409 been parsed.
410
411 On the Alpha, it is used to translate target-option strings into
412 numeric values. */
413
414 #define OVERRIDE_OPTIONS override_options ()
415
416
417 /* Define this macro to change register usage conditional on target flags.
418
419 On the Alpha, we use this to disable the floating-point registers when
420 they don't exist. */
421
422 #define CONDITIONAL_REGISTER_USAGE \
423 { \
424 int i; \
425 if (! TARGET_FPREGS) \
426 for (i = 32; i < 63; i++) \
427 fixed_regs[i] = call_used_regs[i] = 1; \
428 }
429
430
431 /* Show we can debug even without a frame pointer. */
432 #define CAN_DEBUG_WITHOUT_FP
433 \f
434 /* target machine storage layout */
435
436 /* Define the size of `int'. The default is the same as the word size. */
437 #define INT_TYPE_SIZE 32
438
439 /* Define the size of `long long'. The default is the twice the word size. */
440 #define LONG_LONG_TYPE_SIZE 64
441
442 /* We're IEEE unless someone says to use VAX. */
443 #define TARGET_FLOAT_FORMAT \
444 (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)
445
446 /* The two floating-point formats we support are S-floating, which is
447 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
448 and `long double' are T. */
449
450 #define FLOAT_TYPE_SIZE 32
451 #define DOUBLE_TYPE_SIZE 64
452 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
453
454 /* Define this to set long double type size to use in libgcc2.c, which can
455 not depend on target_flags. */
456 #ifdef __LONG_DOUBLE_128__
457 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
458 #else
459 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
460 #endif
461
462 /* Work around target_flags dependency in ada/targtyps.c. */
463 #define WIDEST_HARDWARE_FP_SIZE 64
464
465 #define WCHAR_TYPE "unsigned int"
466 #define WCHAR_TYPE_SIZE 32
467
468 /* Define this macro if it is advisable to hold scalars in registers
469 in a wider mode than that declared by the program. In such cases,
470 the value is constrained to be within the bounds of the declared
471 type, but kept valid in the wider mode. The signedness of the
472 extension may differ from that of the type.
473
474 For Alpha, we always store objects in a full register. 32-bit integers
475 are always sign-extended, but smaller objects retain their signedness.
476
477 Note that small vector types can get mapped onto integer modes at the
478 whim of not appearing in alpha-modes.def. We never promoted these
479 values before; don't do so now that we've trimed the set of modes to
480 those actually implemented in the backend. */
481
482 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
483 if (GET_MODE_CLASS (MODE) == MODE_INT \
484 && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \
485 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
486 { \
487 if ((MODE) == SImode) \
488 (UNSIGNEDP) = 0; \
489 (MODE) = DImode; \
490 }
491
492 /* Define this if most significant bit is lowest numbered
493 in instructions that operate on numbered bit-fields.
494
495 There are no such instructions on the Alpha, but the documentation
496 is little endian. */
497 #define BITS_BIG_ENDIAN 0
498
499 /* Define this if most significant byte of a word is the lowest numbered.
500 This is false on the Alpha. */
501 #define BYTES_BIG_ENDIAN 0
502
503 /* Define this if most significant word of a multiword number is lowest
504 numbered.
505
506 For Alpha we can decide arbitrarily since there are no machine instructions
507 for them. Might as well be consistent with bytes. */
508 #define WORDS_BIG_ENDIAN 0
509
510 /* Width of a word, in units (bytes). */
511 #define UNITS_PER_WORD 8
512
513 /* Width in bits of a pointer.
514 See also the macro `Pmode' defined below. */
515 #define POINTER_SIZE 64
516
517 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
518 #define PARM_BOUNDARY 64
519
520 /* Boundary (in *bits*) on which stack pointer should be aligned. */
521 #define STACK_BOUNDARY 128
522
523 /* Allocation boundary (in *bits*) for the code of a function. */
524 #define FUNCTION_BOUNDARY 32
525
526 /* Alignment of field after `int : 0' in a structure. */
527 #define EMPTY_FIELD_BOUNDARY 64
528
529 /* Every structure's size must be a multiple of this. */
530 #define STRUCTURE_SIZE_BOUNDARY 8
531
532 /* A bit-field declared as `int' forces `int' alignment for the struct. */
533 #define PCC_BITFIELD_TYPE_MATTERS 1
534
535 /* No data type wants to be aligned rounder than this. */
536 #define BIGGEST_ALIGNMENT 128
537
538 /* For atomic access to objects, must have at least 32-bit alignment
539 unless the machine has byte operations. */
540 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
541
542 /* Align all constants and variables to at least a word boundary so
543 we can pick up pieces of them faster. */
544 /* ??? Only if block-move stuff knows about different source/destination
545 alignment. */
546 #if 0
547 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
548 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
549 #endif
550
551 /* Set this nonzero if move instructions will actually fail to work
552 when given unaligned data.
553
554 Since we get an error message when we do one, call them invalid. */
555
556 #define STRICT_ALIGNMENT 1
557
558 /* Set this nonzero if unaligned move instructions are extremely slow.
559
560 On the Alpha, they trap. */
561
562 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
563 \f
564 /* Standard register usage. */
565
566 /* Number of actual hardware registers.
567 The hardware registers are assigned numbers for the compiler
568 from 0 to just below FIRST_PSEUDO_REGISTER.
569 All registers that the compiler knows about must be given numbers,
570 even those that are not normally considered general registers.
571
572 We define all 32 integer registers, even though $31 is always zero,
573 and all 32 floating-point registers, even though $f31 is also
574 always zero. We do not bother defining the FP status register and
575 there are no other registers.
576
577 Since $31 is always zero, we will use register number 31 as the
578 argument pointer. It will never appear in the generated code
579 because we will always be eliminating it in favor of the stack
580 pointer or hardware frame pointer.
581
582 Likewise, we use $f31 for the frame pointer, which will always
583 be eliminated in favor of the hardware frame pointer or the
584 stack pointer. */
585
586 #define FIRST_PSEUDO_REGISTER 64
587
588 /* 1 for registers that have pervasive standard uses
589 and are not available for the register allocator. */
590
591 #define FIXED_REGISTERS \
592 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
593 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
594 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
595 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
596
597 /* 1 for registers not available across function calls.
598 These must include the FIXED_REGISTERS and also any
599 registers that can be used without being saved.
600 The latter must include the registers where values are returned
601 and the register where structure-value addresses are passed.
602 Aside from that, you can include as many other registers as you like. */
603 #define CALL_USED_REGISTERS \
604 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
605 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
606 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
607 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
608
609 /* List the order in which to allocate registers. Each register must be
610 listed once, even those in FIXED_REGISTERS. */
611
612 #define REG_ALLOC_ORDER { \
613 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \
614 22, 23, 24, 25, 28, /* likewise */ \
615 0, /* likewise, but return value */ \
616 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \
617 27, /* likewise, but OSF procedure value */ \
618 \
619 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \
620 54, 55, 56, 57, 58, 59, /* likewise */ \
621 60, 61, 62, /* likewise */ \
622 32, 33, /* likewise, but return values */ \
623 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \
624 \
625 9, 10, 11, 12, 13, 14, /* saved integer registers */ \
626 26, /* return address */ \
627 15, /* hard frame pointer */ \
628 \
629 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \
630 40, 41, /* likewise */ \
631 \
632 29, 30, 31, 63 /* gp, sp, ap, sfp */ \
633 }
634
635 /* Return number of consecutive hard regs needed starting at reg REGNO
636 to hold something of mode MODE.
637 This is ordinarily the length in words of a value of mode MODE
638 but can be less for certain modes in special long registers. */
639
640 #define HARD_REGNO_NREGS(REGNO, MODE) \
641 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
642
643 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
644 On Alpha, the integer registers can hold any mode. The floating-point
645 registers can hold 64-bit integers as well, but not smaller values. */
646
647 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
648 ((REGNO) >= 32 && (REGNO) <= 62 \
649 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
650 : 1)
651
652 /* Value is 1 if MODE is a supported vector mode. */
653
654 #define VECTOR_MODE_SUPPORTED_P(MODE) \
655 (TARGET_MAX \
656 && ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode))
657
658 /* A C expression that is nonzero if a value of mode
659 MODE1 is accessible in mode MODE2 without copying.
660
661 This asymmetric test is true when MODE1 could be put
662 in an FP register but MODE2 could not. */
663
664 #define MODES_TIEABLE_P(MODE1, MODE2) \
665 (HARD_REGNO_MODE_OK (32, (MODE1)) \
666 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
667 : 1)
668
669 /* Specify the registers used for certain standard purposes.
670 The values of these macros are register numbers. */
671
672 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
673 /* #define PC_REGNUM */
674
675 /* Register to use for pushing function arguments. */
676 #define STACK_POINTER_REGNUM 30
677
678 /* Base register for access to local variables of the function. */
679 #define HARD_FRAME_POINTER_REGNUM 15
680
681 /* Value should be nonzero if functions must have frame pointers.
682 Zero means the frame pointer need not be set up (and parms
683 may be accessed via the stack pointer) in functions that seem suitable.
684 This is computed in `reload', in reload1.c. */
685 #define FRAME_POINTER_REQUIRED 0
686
687 /* Base register for access to arguments of the function. */
688 #define ARG_POINTER_REGNUM 31
689
690 /* Base register for access to local variables of function. */
691 #define FRAME_POINTER_REGNUM 63
692
693 /* Register in which static-chain is passed to a function.
694
695 For the Alpha, this is based on an example; the calling sequence
696 doesn't seem to specify this. */
697 #define STATIC_CHAIN_REGNUM 1
698
699 /* The register number of the register used to address a table of
700 static data addresses in memory. */
701 #define PIC_OFFSET_TABLE_REGNUM 29
702
703 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
704 is clobbered by calls. */
705 /* ??? It is and it isn't. It's required to be valid for a given
706 function when the function returns. It isn't clobbered by
707 current_file functions. Moreover, we do not expose the ldgp
708 until after reload, so we're probably safe. */
709 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
710 \f
711 /* Define the classes of registers for register constraints in the
712 machine description. Also define ranges of constants.
713
714 One of the classes must always be named ALL_REGS and include all hard regs.
715 If there is more than one class, another class must be named NO_REGS
716 and contain no registers.
717
718 The name GENERAL_REGS must be the name of a class (or an alias for
719 another name such as ALL_REGS). This is the class of registers
720 that is allowed by "g" or "r" in a register constraint.
721 Also, registers outside this class are allocated only when
722 instructions express preferences for them.
723
724 The classes must be numbered in nondecreasing order; that is,
725 a larger-numbered class must never be contained completely
726 in a smaller-numbered class.
727
728 For any two classes, it is very desirable that there be another
729 class that represents their union. */
730
731 enum reg_class {
732 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
733 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
734 LIM_REG_CLASSES
735 };
736
737 #define N_REG_CLASSES (int) LIM_REG_CLASSES
738
739 /* Give names of register classes as strings for dump file. */
740
741 #define REG_CLASS_NAMES \
742 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
743 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
744
745 /* Define which registers fit in which classes.
746 This is an initializer for a vector of HARD_REG_SET
747 of length N_REG_CLASSES. */
748
749 #define REG_CLASS_CONTENTS \
750 { {0x00000000, 0x00000000}, /* NO_REGS */ \
751 {0x00000001, 0x00000000}, /* R0_REG */ \
752 {0x01000000, 0x00000000}, /* R24_REG */ \
753 {0x02000000, 0x00000000}, /* R25_REG */ \
754 {0x08000000, 0x00000000}, /* R27_REG */ \
755 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
756 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
757 {0xffffffff, 0xffffffff} }
758
759 /* The same information, inverted:
760 Return the class number of the smallest class containing
761 reg number REGNO. This could be a conditional expression
762 or could index an array. */
763
764 #define REGNO_REG_CLASS(REGNO) \
765 ((REGNO) == 0 ? R0_REG \
766 : (REGNO) == 24 ? R24_REG \
767 : (REGNO) == 25 ? R25_REG \
768 : (REGNO) == 27 ? R27_REG \
769 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
770 : GENERAL_REGS)
771
772 /* The class value for index registers, and the one for base regs. */
773 #define INDEX_REG_CLASS NO_REGS
774 #define BASE_REG_CLASS GENERAL_REGS
775
776 /* Get reg_class from a letter such as appears in the machine description. */
777
778 #define REG_CLASS_FROM_LETTER(C) \
779 ((C) == 'a' ? R24_REG \
780 : (C) == 'b' ? R25_REG \
781 : (C) == 'c' ? R27_REG \
782 : (C) == 'f' ? FLOAT_REGS \
783 : (C) == 'v' ? R0_REG \
784 : NO_REGS)
785
786 /* Define this macro to change register usage conditional on target flags. */
787 /* #define CONDITIONAL_REGISTER_USAGE */
788
789 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
790 can be used to stand for particular ranges of immediate operands.
791 This macro defines what the ranges are.
792 C is the letter, and VALUE is a constant value.
793 Return 1 if VALUE is in the range specified by C.
794
795 For Alpha:
796 `I' is used for the range of constants most insns can contain.
797 `J' is the constant zero.
798 `K' is used for the constant in an LDA insn.
799 `L' is used for the constant in a LDAH insn.
800 `M' is used for the constants that can be AND'ed with using a ZAP insn.
801 `N' is used for complemented 8-bit constants.
802 `O' is used for negated 8-bit constants.
803 `P' is used for the constants 1, 2 and 3. */
804
805 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
806
807 /* Similar, but for floating or large integer constants, and defining letters
808 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
809
810 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
811 that is the operand of a ZAP insn. */
812
813 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
814
815 /* Optional extra constraints for this machine.
816
817 For the Alpha, `Q' means that this is a memory operand but not a
818 reference to an unaligned location.
819
820 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
821 function.
822
823 'S' is a 6-bit constant (valid for a shift insn).
824
825 'T' is a HIGH.
826
827 'U' is a symbolic operand.
828
829 'W' is a vector zero. */
830
831 #define EXTRA_CONSTRAINT alpha_extra_constraint
832
833 /* Given an rtx X being reloaded into a reg required to be
834 in class CLASS, return the class of reg to actually use.
835 In general this is just CLASS; but on some machines
836 in some cases it is preferable to use a more restrictive class. */
837
838 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
839
840 /* Loading and storing HImode or QImode values to and from memory
841 usually requires a scratch register. The exceptions are loading
842 QImode and HImode from an aligned address to a general register
843 unless byte instructions are permitted.
844 We also cannot load an unaligned address or a paradoxical SUBREG into an
845 FP register. */
846
847 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
848 secondary_reload_class((CLASS), (MODE), (IN), 1)
849
850 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
851 secondary_reload_class((CLASS), (MODE), (OUT), 0)
852
853 /* If we are copying between general and FP registers, we need a memory
854 location unless the FIX extension is available. */
855
856 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
857 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
858 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
859
860 /* Specify the mode to be used for memory when a secondary memory
861 location is needed. If MODE is floating-point, use it. Otherwise,
862 widen to a word like the default. This is needed because we always
863 store integers in FP registers in quadword format. This whole
864 area is very tricky! */
865 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
866 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
867 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
868 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
869
870 /* Return the maximum number of consecutive registers
871 needed to represent mode MODE in a register of class CLASS. */
872
873 #define CLASS_MAX_NREGS(CLASS, MODE) \
874 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
875
876 /* Return the class of registers that cannot change mode from FROM to TO. */
877
878 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
879 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
880 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
881
882 /* Define the cost of moving between registers of various classes. Moving
883 between FLOAT_REGS and anything else except float regs is expensive.
884 In fact, we make it quite expensive because we really don't want to
885 do these moves unless it is clearly worth it. Optimizations may
886 reduce the impact of not being able to allocate a pseudo to a
887 hard register. */
888
889 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
890 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
891 ? 2 \
892 : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
893
894 /* A C expressions returning the cost of moving data of MODE from a register to
895 or from memory.
896
897 On the Alpha, bump this up a bit. */
898
899 extern int alpha_memory_latency;
900 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
901
902 /* Provide the cost of a branch. Exact meaning under development. */
903 #define BRANCH_COST 5
904 \f
905 /* Stack layout; function entry, exit and calling. */
906
907 /* Define this if pushing a word on the stack
908 makes the stack pointer a smaller address. */
909 #define STACK_GROWS_DOWNWARD
910
911 /* Define this if the nominal address of the stack frame
912 is at the high-address end of the local variables;
913 that is, each additional local variable allocated
914 goes at a more negative offset in the frame. */
915 /* #define FRAME_GROWS_DOWNWARD */
916
917 /* Offset within stack frame to start allocating local variables at.
918 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
919 first local allocated. Otherwise, it is the offset to the BEGINNING
920 of the first local allocated. */
921
922 #define STARTING_FRAME_OFFSET 0
923
924 /* If we generate an insn to push BYTES bytes,
925 this says how many the stack pointer really advances by.
926 On Alpha, don't define this because there are no push insns. */
927 /* #define PUSH_ROUNDING(BYTES) */
928
929 /* Define this to be nonzero if stack checking is built into the ABI. */
930 #define STACK_CHECK_BUILTIN 1
931
932 /* Define this if the maximum size of all the outgoing args is to be
933 accumulated and pushed during the prologue. The amount can be
934 found in the variable current_function_outgoing_args_size. */
935 #define ACCUMULATE_OUTGOING_ARGS 1
936
937 /* Offset of first parameter from the argument pointer register value. */
938
939 #define FIRST_PARM_OFFSET(FNDECL) 0
940
941 /* Definitions for register eliminations.
942
943 We have two registers that can be eliminated on the Alpha. First, the
944 frame pointer register can often be eliminated in favor of the stack
945 pointer register. Secondly, the argument pointer register can always be
946 eliminated; it is replaced with either the stack or frame pointer. */
947
948 /* This is an array of structures. Each structure initializes one pair
949 of eliminable registers. The "from" register number is given first,
950 followed by "to". Eliminations of the same "from" register are listed
951 in order of preference. */
952
953 #define ELIMINABLE_REGS \
954 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
955 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
956 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
957 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
958
959 /* Given FROM and TO register numbers, say whether this elimination is allowed.
960 Frame pointer elimination is automatically handled.
961
962 All eliminations are valid since the cases where FP can't be
963 eliminated are already handled. */
964
965 #define CAN_ELIMINATE(FROM, TO) 1
966
967 /* Round up to a multiple of 16 bytes. */
968 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
969
970 /* Define the offset between two registers, one to be eliminated, and the other
971 its replacement, at the start of a routine. */
972 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
973 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
974
975 /* Define this if stack space is still allocated for a parameter passed
976 in a register. */
977 /* #define REG_PARM_STACK_SPACE */
978
979 /* Value is the number of bytes of arguments automatically
980 popped when returning from a subroutine call.
981 FUNDECL is the declaration node of the function (as a tree),
982 FUNTYPE is the data type of the function (as a tree),
983 or for a library call it is an identifier node for the subroutine name.
984 SIZE is the number of bytes of arguments passed on the stack. */
985
986 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
987
988 /* Define how to find the value returned by a function.
989 VALTYPE is the data type of the value (as a tree).
990 If the precise function being called is known, FUNC is its FUNCTION_DECL;
991 otherwise, FUNC is 0.
992
993 On Alpha the value is found in $0 for integer functions and
994 $f0 for floating-point functions. */
995
996 #define FUNCTION_VALUE(VALTYPE, FUNC) \
997 function_value (VALTYPE, FUNC, VOIDmode)
998
999 /* Define how to find the value returned by a library function
1000 assuming the value has mode MODE. */
1001
1002 #define LIBCALL_VALUE(MODE) \
1003 function_value (NULL, NULL, MODE)
1004
1005 /* 1 if N is a possible register number for a function value
1006 as seen by the caller. */
1007
1008 #define FUNCTION_VALUE_REGNO_P(N) \
1009 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
1010
1011 /* 1 if N is a possible register number for function argument passing.
1012 On Alpha, these are $16-$21 and $f16-$f21. */
1013
1014 #define FUNCTION_ARG_REGNO_P(N) \
1015 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
1016 \f
1017 /* Define a data type for recording info about an argument list
1018 during the scan of that argument list. This data type should
1019 hold all necessary information about the function itself
1020 and about the args processed so far, enough to enable macros
1021 such as FUNCTION_ARG to determine where the next arg should go.
1022
1023 On Alpha, this is a single integer, which is a number of words
1024 of arguments scanned so far.
1025 Thus 6 or more means all following args should go on the stack. */
1026
1027 #define CUMULATIVE_ARGS int
1028
1029 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1030 for a call to a function whose data type is FNTYPE.
1031 For a library call, FNTYPE is 0. */
1032
1033 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
1034 (CUM) = 0
1035
1036 /* Define intermediate macro to compute the size (in registers) of an argument
1037 for the Alpha. */
1038
1039 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
1040 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
1041 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1042 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1043
1044 /* Update the data in CUM to advance over an argument
1045 of mode MODE and data type TYPE.
1046 (TYPE is null for libcalls where that information may not be available.) */
1047
1048 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1049 ((CUM) += \
1050 (targetm.calls.must_pass_in_stack (MODE, TYPE)) \
1051 ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))
1052
1053 /* Determine where to put an argument to a function.
1054 Value is zero to push the argument on the stack,
1055 or a hard register in which to store the argument.
1056
1057 MODE is the argument's machine mode.
1058 TYPE is the data type of the argument (as a tree).
1059 This is null for libcalls where that information may
1060 not be available.
1061 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1062 the preceding args and about the function being called.
1063 NAMED is nonzero if this argument is a named parameter
1064 (otherwise it is an extra parameter matching an ellipsis).
1065
1066 On Alpha the first 6 words of args are normally in registers
1067 and the rest are pushed. */
1068
1069 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1070 function_arg((CUM), (MODE), (TYPE), (NAMED))
1071
1072 /* For an arg passed partly in registers and partly in memory,
1073 this is the number of registers used.
1074 For args passed entirely in registers or entirely in memory, zero. */
1075
1076 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1077 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
1078 ? 6 - (CUM) : 0)
1079
1080 /* Try to output insns to set TARGET equal to the constant C if it can be
1081 done in less than N insns. Do all computations in MODE. Returns the place
1082 where the output has been placed if it can be done and the insns have been
1083 emitted. If it would take more than N insns, zero is returned and no
1084 insns and emitted. */
1085
1086 /* Define the information needed to generate branch and scc insns. This is
1087 stored from the compare operation. Note that we can't use "rtx" here
1088 since it hasn't been defined! */
1089
1090 struct alpha_compare
1091 {
1092 struct rtx_def *op0, *op1;
1093 int fp_p;
1094 };
1095
1096 extern struct alpha_compare alpha_compare;
1097
1098 /* Make (or fake) .linkage entry for function call.
1099 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1100
1101 /* This macro defines the start of an assembly comment. */
1102
1103 #define ASM_COMMENT_START " #"
1104
1105 /* This macro produces the initial definition of a function. */
1106
1107 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1108 alpha_start_function(FILE,NAME,DECL);
1109
1110 /* This macro closes up a function definition for the assembler. */
1111
1112 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
1113 alpha_end_function(FILE,NAME,DECL)
1114
1115 /* Output any profiling code before the prologue. */
1116
1117 #define PROFILE_BEFORE_PROLOGUE 1
1118
1119 /* Never use profile counters. */
1120
1121 #define NO_PROFILE_COUNTERS 1
1122
1123 /* Output assembler code to FILE to increment profiler label # LABELNO
1124 for profiling a function entry. Under OSF/1, profiling is enabled
1125 by simply passing -pg to the assembler and linker. */
1126
1127 #define FUNCTION_PROFILER(FILE, LABELNO)
1128
1129 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1130 the stack pointer does not matter. The value is tested only in
1131 functions that have frame pointers.
1132 No definition is equivalent to always zero. */
1133
1134 #define EXIT_IGNORE_STACK 1
1135
1136 /* Define registers used by the epilogue and return instruction. */
1137
1138 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
1139 \f
1140 /* Output assembler code for a block containing the constant parts
1141 of a trampoline, leaving space for the variable parts.
1142
1143 The trampoline should set the static chain pointer to value placed
1144 into the trampoline and should branch to the specified routine.
1145 Note that $27 has been set to the address of the trampoline, so we can
1146 use it for addressability of the two data items. */
1147
1148 #define TRAMPOLINE_TEMPLATE(FILE) \
1149 do { \
1150 fprintf (FILE, "\tldq $1,24($27)\n"); \
1151 fprintf (FILE, "\tldq $27,16($27)\n"); \
1152 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1153 fprintf (FILE, "\tnop\n"); \
1154 fprintf (FILE, "\t.quad 0,0\n"); \
1155 } while (0)
1156
1157 /* Section in which to place the trampoline. On Alpha, instructions
1158 may only be placed in a text segment. */
1159
1160 #define TRAMPOLINE_SECTION text_section
1161
1162 /* Length in units of the trampoline for entering a nested function. */
1163
1164 #define TRAMPOLINE_SIZE 32
1165
1166 /* The alignment of a trampoline, in bits. */
1167
1168 #define TRAMPOLINE_ALIGNMENT 64
1169
1170 /* Emit RTL insns to initialize the variable parts of a trampoline.
1171 FNADDR is an RTX for the address of the function's pure code.
1172 CXT is an RTX for the static chain value for the function. */
1173
1174 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1175 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
1176
1177 /* A C expression whose value is RTL representing the value of the return
1178 address for the frame COUNT steps up from the current frame.
1179 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1180 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
1181
1182 #define RETURN_ADDR_RTX alpha_return_addr
1183
1184 /* Before the prologue, RA lives in $26. */
1185 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
1186 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
1187 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
1188
1189 /* Describe how we implement __builtin_eh_return. */
1190 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
1191 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
1192 #define EH_RETURN_HANDLER_RTX \
1193 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
1194 current_function_outgoing_args_size))
1195 \f
1196 /* Addressing modes, and classification of registers for them. */
1197
1198 /* Macros to check register numbers against specific register classes. */
1199
1200 /* These assume that REGNO is a hard or pseudo reg number.
1201 They give nonzero only if REGNO is a hard reg of the suitable class
1202 or a pseudo reg currently allocated to a suitable hard reg.
1203 Since they use reg_renumber, they are safe only once reg_renumber
1204 has been allocated, which happens in local-alloc.c. */
1205
1206 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1207 #define REGNO_OK_FOR_BASE_P(REGNO) \
1208 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1209 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1210 \f
1211 /* Maximum number of registers that can appear in a valid memory address. */
1212 #define MAX_REGS_PER_ADDRESS 1
1213
1214 /* Recognize any constant value that is a valid address. For the Alpha,
1215 there are only constants none since we want to use LDA to load any
1216 symbolic addresses into registers. */
1217
1218 #define CONSTANT_ADDRESS_P(X) \
1219 (GET_CODE (X) == CONST_INT \
1220 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1221
1222 /* Include all constant integers and constant doubles, but not
1223 floating-point, except for floating-point zero. */
1224
1225 #define LEGITIMATE_CONSTANT_P(X) \
1226 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1227 || (X) == CONST0_RTX (GET_MODE (X)))
1228
1229 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1230 and check its validity for a certain class.
1231 We have two alternate definitions for each of them.
1232 The usual definition accepts all pseudo regs; the other rejects
1233 them unless they have been allocated suitable hard regs.
1234 The symbol REG_OK_STRICT causes the latter definition to be used.
1235
1236 Most source files want to accept pseudo regs in the hope that
1237 they will get allocated to the class that the insn wants them to be in.
1238 Source files for reload pass need to be strict.
1239 After reload, it makes no difference, since pseudo regs have
1240 been eliminated by then. */
1241
1242 /* Nonzero if X is a hard reg that can be used as an index
1243 or if it is a pseudo reg. */
1244 #define REG_OK_FOR_INDEX_P(X) 0
1245
1246 /* Nonzero if X is a hard reg that can be used as a base reg
1247 or if it is a pseudo reg. */
1248 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
1249 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1250
1251 /* ??? Nonzero if X is the frame pointer, or some virtual register
1252 that may eliminate to the frame pointer. These will be allowed to
1253 have offsets greater than 32K. This is done because register
1254 elimination offsets will change the hi/lo split, and if we split
1255 before reload, we will require additional instructions. */
1256 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
1257 (REGNO (X) == 31 || REGNO (X) == 63 \
1258 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
1259 && REGNO (X) < LAST_VIRTUAL_REGISTER))
1260
1261 /* Nonzero if X is a hard reg that can be used as a base reg. */
1262 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1263
1264 #ifdef REG_OK_STRICT
1265 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
1266 #else
1267 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
1268 #endif
1269 \f
1270 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1271 valid memory address for an instruction. */
1272
1273 #ifdef REG_OK_STRICT
1274 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1275 do { \
1276 if (alpha_legitimate_address_p (MODE, X, 1)) \
1277 goto WIN; \
1278 } while (0)
1279 #else
1280 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1281 do { \
1282 if (alpha_legitimate_address_p (MODE, X, 0)) \
1283 goto WIN; \
1284 } while (0)
1285 #endif
1286
1287 /* Try machine-dependent ways of modifying an illegitimate address
1288 to be legitimate. If we find one, return the new, valid address.
1289 This macro is used in only one place: `memory_address' in explow.c. */
1290
1291 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1292 do { \
1293 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1294 if (new_x) \
1295 { \
1296 X = new_x; \
1297 goto WIN; \
1298 } \
1299 } while (0)
1300
1301 /* Try a machine-dependent way of reloading an illegitimate address
1302 operand. If we find one, push the reload and jump to WIN. This
1303 macro is used in only one place: `find_reloads_address' in reload.c. */
1304
1305 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1306 do { \
1307 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1308 if (new_x) \
1309 { \
1310 X = new_x; \
1311 goto WIN; \
1312 } \
1313 } while (0)
1314
1315 /* Go to LABEL if ADDR (a legitimate address expression)
1316 has an effect that depends on the machine mode it is used for.
1317 On the Alpha this is true only for the unaligned modes. We can
1318 simplify this test since we know that the address must be valid. */
1319
1320 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1321 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1322 \f
1323 /* Specify the machine mode that this machine uses
1324 for the index in the tablejump instruction. */
1325 #define CASE_VECTOR_MODE SImode
1326
1327 /* Define as C expression which evaluates to nonzero if the tablejump
1328 instruction expects the table to contain offsets from the address of the
1329 table.
1330
1331 Do not define this if the table should contain absolute addresses.
1332 On the Alpha, the table is really GP-relative, not relative to the PC
1333 of the table, but we pretend that it is PC-relative; this should be OK,
1334 but we should try to find some better way sometime. */
1335 #define CASE_VECTOR_PC_RELATIVE 1
1336
1337 /* Define this as 1 if `char' should by default be signed; else as 0. */
1338 #define DEFAULT_SIGNED_CHAR 1
1339
1340 /* Max number of bytes we can move to or from memory
1341 in one reasonably fast instruction. */
1342
1343 #define MOVE_MAX 8
1344
1345 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1346 move-instruction pairs, we will do a movmem or libcall instead.
1347
1348 Without byte/word accesses, we want no more than four instructions;
1349 with, several single byte accesses are better. */
1350
1351 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1352
1353 /* Largest number of bytes of an object that can be placed in a register.
1354 On the Alpha we have plenty of registers, so use TImode. */
1355 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1356
1357 /* Nonzero if access to memory by bytes is no faster than for words.
1358 Also nonzero if doing byte operations (specifically shifts) in registers
1359 is undesirable.
1360
1361 On the Alpha, we want to not use the byte operation and instead use
1362 masking operations to access fields; these will save instructions. */
1363
1364 #define SLOW_BYTE_ACCESS 1
1365
1366 /* Define if operations between registers always perform the operation
1367 on the full register even if a narrower mode is specified. */
1368 #define WORD_REGISTER_OPERATIONS
1369
1370 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1371 will either zero-extend or sign-extend. The value of this macro should
1372 be the code that says which one of the two operations is implicitly
1373 done, NIL if none. */
1374 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1375
1376 /* Define if loading short immediate values into registers sign extends. */
1377 #define SHORT_IMMEDIATES_SIGN_EXTEND
1378
1379 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1380 is done just by pretending it is already truncated. */
1381 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1382
1383 /* The CIX ctlz and cttz instructions return 64 for zero. */
1384 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1385 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1386
1387 /* Define the value returned by a floating-point comparison instruction. */
1388
1389 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1390 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1391
1392 /* Canonicalize a comparison from one we don't have to one we do have. */
1393
1394 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1395 do { \
1396 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1397 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1398 { \
1399 rtx tem = (OP0); \
1400 (OP0) = (OP1); \
1401 (OP1) = tem; \
1402 (CODE) = swap_condition (CODE); \
1403 } \
1404 if (((CODE) == LT || (CODE) == LTU) \
1405 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1406 { \
1407 (CODE) = (CODE) == LT ? LE : LEU; \
1408 (OP1) = GEN_INT (255); \
1409 } \
1410 } while (0)
1411
1412 /* Specify the machine mode that pointers have.
1413 After generation of rtl, the compiler makes no further distinction
1414 between pointers and any other objects of this machine mode. */
1415 #define Pmode DImode
1416
1417 /* Mode of a function address in a call instruction (for indexing purposes). */
1418
1419 #define FUNCTION_MODE Pmode
1420
1421 /* Define this if addresses of constant functions
1422 shouldn't be put through pseudo regs where they can be cse'd.
1423 Desirable on machines where ordinary constants are expensive
1424 but a CALL with constant address is cheap.
1425
1426 We define this on the Alpha so that gen_call and gen_call_value
1427 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1428 then copy it into a register, thus actually letting the address be
1429 cse'ed. */
1430
1431 #define NO_FUNCTION_CSE
1432
1433 /* Define this to be nonzero if shift instructions ignore all but the low-order
1434 few bits. */
1435 #define SHIFT_COUNT_TRUNCATED 1
1436 \f
1437 /* Control the assembler format that we output. */
1438
1439 /* Output to assembler file text saying following lines
1440 may contain character constants, extra white space, comments, etc. */
1441 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1442
1443 /* Output to assembler file text saying following lines
1444 no longer contain unusual constructs. */
1445 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1446
1447 #define TEXT_SECTION_ASM_OP "\t.text"
1448
1449 /* Output before read-only data. */
1450
1451 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1452
1453 /* Output before writable data. */
1454
1455 #define DATA_SECTION_ASM_OP "\t.data"
1456
1457 /* How to refer to registers in assembler output.
1458 This sequence is indexed by compiler's hard-register-number (see above). */
1459
1460 #define REGISTER_NAMES \
1461 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1462 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1463 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1464 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1465 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1466 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1467 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1468 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1469
1470 /* Strip name encoding when emitting labels. */
1471
1472 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1473 do { \
1474 const char *name_ = NAME; \
1475 if (*name_ == '@' || *name_ == '%') \
1476 name_ += 2; \
1477 if (*name_ == '*') \
1478 name_++; \
1479 else \
1480 fputs (user_label_prefix, STREAM); \
1481 fputs (name_, STREAM); \
1482 } while (0)
1483
1484 /* Globalizing directive for a label. */
1485 #define GLOBAL_ASM_OP "\t.globl "
1486
1487 /* The prefix to add to user-visible assembler symbols. */
1488
1489 #define USER_LABEL_PREFIX ""
1490
1491 /* This is how to output a label for a jump table. Arguments are the same as
1492 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1493 passed. */
1494
1495 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1496 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1497
1498 /* This is how to store into the string LABEL
1499 the symbol_ref name of an internal numbered label where
1500 PREFIX is the class of label and NUM is the number within the class.
1501 This is suitable for output with `assemble_name'. */
1502
1503 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1504 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1505
1506 /* We use the default ASCII-output routine, except that we don't write more
1507 than 50 characters since the assembler doesn't support very long lines. */
1508
1509 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1510 do { \
1511 FILE *_hide_asm_out_file = (MYFILE); \
1512 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1513 int _hide_thissize = (MYLENGTH); \
1514 int _size_so_far = 0; \
1515 { \
1516 FILE *asm_out_file = _hide_asm_out_file; \
1517 const unsigned char *p = _hide_p; \
1518 int thissize = _hide_thissize; \
1519 int i; \
1520 fprintf (asm_out_file, "\t.ascii \""); \
1521 \
1522 for (i = 0; i < thissize; i++) \
1523 { \
1524 register int c = p[i]; \
1525 \
1526 if (_size_so_far ++ > 50 && i < thissize - 4) \
1527 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1528 \
1529 if (c == '\"' || c == '\\') \
1530 putc ('\\', asm_out_file); \
1531 if (c >= ' ' && c < 0177) \
1532 putc (c, asm_out_file); \
1533 else \
1534 { \
1535 fprintf (asm_out_file, "\\%o", c); \
1536 /* After an octal-escape, if a digit follows, \
1537 terminate one string constant and start another. \
1538 The VAX assembler fails to stop reading the escape \
1539 after three digits, so this is the only way we \
1540 can get it to parse the data properly. */ \
1541 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1542 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1543 } \
1544 } \
1545 fprintf (asm_out_file, "\"\n"); \
1546 } \
1547 } \
1548 while (0)
1549
1550 /* This is how to output an element of a case-vector that is absolute.
1551 (Alpha does not use such vectors, but we must define this macro anyway.) */
1552
1553 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1554
1555 /* This is how to output an element of a case-vector that is relative. */
1556
1557 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1558 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1559 (VALUE))
1560
1561 /* This is how to output an assembler line
1562 that says to advance the location counter
1563 to a multiple of 2**LOG bytes. */
1564
1565 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1566 if ((LOG) != 0) \
1567 fprintf (FILE, "\t.align %d\n", LOG);
1568
1569 /* This is how to advance the location counter by SIZE bytes. */
1570
1571 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1572 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1573
1574 /* This says how to output an assembler line
1575 to define a global common symbol. */
1576
1577 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1578 ( fputs ("\t.comm ", (FILE)), \
1579 assemble_name ((FILE), (NAME)), \
1580 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1581
1582 /* This says how to output an assembler line
1583 to define a local common symbol. */
1584
1585 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1586 ( fputs ("\t.lcomm ", (FILE)), \
1587 assemble_name ((FILE), (NAME)), \
1588 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1589 \f
1590
1591 /* Print operand X (an rtx) in assembler syntax to file FILE.
1592 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1593 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1594
1595 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1596
1597 /* Determine which codes are valid without a following integer. These must
1598 not be alphabetic.
1599
1600 ~ Generates the name of the current function.
1601
1602 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1603 attributes are examined to determine what is appropriate.
1604
1605 , Generates single precision suffix for floating point
1606 instructions (s for IEEE, f for VAX)
1607
1608 - Generates double precision suffix for floating point
1609 instructions (t for IEEE, g for VAX)
1610
1611 + Generates a nop instruction after a noreturn call at the very end
1612 of the function
1613 */
1614
1615 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1616 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1617 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+')
1618
1619 /* Print a memory address as an operand to reference that memory location. */
1620
1621 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1622 print_operand_address((FILE), (ADDR))
1623 \f
1624 /* Implement `va_start' for varargs and stdarg. */
1625 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1626 alpha_va_start (valist, nextarg)
1627 \f
1628 /* Tell collect that the object format is ECOFF. */
1629 #define OBJECT_FORMAT_COFF
1630 #define EXTENDED_COFF
1631
1632 /* If we use NM, pass -g to it so it only lists globals. */
1633 #define NM_FLAGS "-pg"
1634
1635 /* Definitions for debugging. */
1636
1637 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1638 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1639 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1640
1641 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1642 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1643 #endif
1644
1645
1646 /* Correct the offset of automatic variables and arguments. Note that
1647 the Alpha debug format wants all automatic variables and arguments
1648 to be in terms of two different offsets from the virtual frame pointer,
1649 which is the stack pointer before any adjustment in the function.
1650 The offset for the argument pointer is fixed for the native compiler,
1651 it is either zero (for the no arguments case) or large enough to hold
1652 all argument registers.
1653 The offset for the auto pointer is the fourth argument to the .frame
1654 directive (local_offset).
1655 To stay compatible with the native tools we use the same offsets
1656 from the virtual frame pointer and adjust the debugger arg/auto offsets
1657 accordingly. These debugger offsets are set up in output_prolog. */
1658
1659 extern long alpha_arg_offset;
1660 extern long alpha_auto_offset;
1661 #define DEBUGGER_AUTO_OFFSET(X) \
1662 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1663 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1664
1665
1666 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) \
1667 alpha_output_lineno (STREAM, LINE)
1668
1669 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1670 alpha_output_filename (STREAM, NAME)
1671
1672 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1673 number, because the real length runs past this up to the next
1674 continuation point. This is really a dbxout.c bug. */
1675 #define DBX_CONTIN_LENGTH 3000
1676
1677 /* By default, turn on GDB extensions. */
1678 #define DEFAULT_GDB_EXTENSIONS 1
1679
1680 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1681 #define NO_DBX_FUNCTION_END 1
1682
1683 /* If we are smuggling stabs through the ALPHA ECOFF object
1684 format, put a comment in front of the .stab<x> operation so
1685 that the ALPHA assembler does not choke. The mips-tfile program
1686 will correctly put the stab into the object file. */
1687
1688 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1689 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1690 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1691
1692 /* Forward references to tags are allowed. */
1693 #define SDB_ALLOW_FORWARD_REFERENCES
1694
1695 /* Unknown tags are also allowed. */
1696 #define SDB_ALLOW_UNKNOWN_REFERENCES
1697
1698 #define PUT_SDB_DEF(a) \
1699 do { \
1700 fprintf (asm_out_file, "\t%s.def\t", \
1701 (TARGET_GAS) ? "" : "#"); \
1702 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1703 fputc (';', asm_out_file); \
1704 } while (0)
1705
1706 #define PUT_SDB_PLAIN_DEF(a) \
1707 do { \
1708 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1709 (TARGET_GAS) ? "" : "#", (a)); \
1710 } while (0)
1711
1712 #define PUT_SDB_TYPE(a) \
1713 do { \
1714 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1715 } while (0)
1716
1717 /* For block start and end, we create labels, so that
1718 later we can figure out where the correct offset is.
1719 The normal .ent/.end serve well enough for functions,
1720 so those are just commented out. */
1721
1722 extern int sdb_label_count; /* block start/end next label # */
1723
1724 #define PUT_SDB_BLOCK_START(LINE) \
1725 do { \
1726 fprintf (asm_out_file, \
1727 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1728 sdb_label_count, \
1729 (TARGET_GAS) ? "" : "#", \
1730 sdb_label_count, \
1731 (LINE)); \
1732 sdb_label_count++; \
1733 } while (0)
1734
1735 #define PUT_SDB_BLOCK_END(LINE) \
1736 do { \
1737 fprintf (asm_out_file, \
1738 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1739 sdb_label_count, \
1740 (TARGET_GAS) ? "" : "#", \
1741 sdb_label_count, \
1742 (LINE)); \
1743 sdb_label_count++; \
1744 } while (0)
1745
1746 #define PUT_SDB_FUNCTION_START(LINE)
1747
1748 #define PUT_SDB_FUNCTION_END(LINE)
1749
1750 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1751
1752 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1753 mips-tdump.c to print them out.
1754
1755 These must match the corresponding definitions in gdb/mipsread.c.
1756 Unfortunately, gcc and gdb do not currently share any directories. */
1757
1758 #define CODE_MASK 0x8F300
1759 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1760 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1761 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1762
1763 /* Override some mips-tfile definitions. */
1764
1765 #define SHASH_SIZE 511
1766 #define THASH_SIZE 55
1767
1768 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1769
1770 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1771
1772 /* The system headers under Alpha systems are generally C++-aware. */
1773 #define NO_IMPLICIT_EXTERN_C