alloc-pool.h, [...]: Update copyright.
[gcc.git] / gcc / config / arm / netbsd.h
1 /* NetBSD/arm a.out version.
2 Copyright (C) 1993, 1994, 1997, 1998, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Mark Brinicombe (amb@physig.ph.kcl.ac.uk)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 2, or (at your
11 option) any later version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 /* Run-time Target Specification. */
24 #undef TARGET_VERSION
25 #define TARGET_VERSION fputs (" (ARM/NetBSD)", stderr);
26
27 /* Unsigned chars produces much better code than signed. */
28 #define DEFAULT_SIGNED_CHAR 0
29
30 /* Since we always use GAS as our assembler we support stabs. */
31 #define DBX_DEBUGGING_INFO 1
32
33 /*#undef ASM_DECLARE_FUNCTION_NAME*/
34
35 /* ARM6 family default cpu. */
36 #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
37
38 /* Default is to use APCS-32 mode. */
39 #undef TARGET_DEFAULT
40 #define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_FRAME)
41
42 /* Some defines for CPP.
43 arm32 is the NetBSD port name, so we always define arm32 and __arm32__. */
44 #define TARGET_OS_CPP_BUILTINS() \
45 do { \
46 NETBSD_OS_CPP_BUILTINS_AOUT(); \
47 builtin_define_std ("arm32"); \
48 builtin_define_std ("unix"); \
49 builtin_define_std ("riscbsd"); \
50 } while (0)
51
52 #undef SUBTARGET_EXTRA_SPECS
53 #define SUBTARGET_EXTRA_SPECS \
54 { "netbsd_cpp_spec", NETBSD_CPP_SPEC }, \
55 { "netbsd_link_spec", NETBSD_LINK_SPEC_AOUT },
56
57 #undef CPP_SPEC
58 #define CPP_SPEC "\
59 %(cpp_cpu_arch) %(cpp_apcs_pc) %(cpp_float) %(cpp_endian) %(netbsd_cpp_spec) \
60 "
61
62 /* Because TARGET_DEFAULT sets ARM_FLAG_APCS_32 */
63 #undef CPP_APCS_PC_DEFAULT_SPEC
64 #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
65
66 /* Because TARGET_DEFAULT sets ARM_FLAG_SOFT_FLOAT */
67 #undef CPP_FLOAT_DEFAULT_SPEC
68 #define CPP_FLOAT_DEFAULT_SPEC "-D__SOFTFP__"
69
70 /* Pass -X to the linker so that it will strip symbols starting with 'L' */
71 #undef LINK_SPEC
72 #define LINK_SPEC "-X %(netbsd_link_spec)"
73
74 #undef SIZE_TYPE
75 #define SIZE_TYPE "unsigned int"
76
77 #undef PTRDIFF_TYPE
78 #define PTRDIFF_TYPE "int"
79
80 #define HANDLE_SYSV_PRAGMA 1
81
82 /* We don't have any limit on the length as out debugger is GDB. */
83 #undef DBX_CONTIN_LENGTH
84
85 /* NetBSD does its profiling differently to the Acorn compiler. We
86 don't need a word following the mcount call; and to skip it
87 requires either an assembly stub or use of fomit-frame-pointer when
88 compiling the profiling functions. Since we break Acorn CC
89 compatibility below a little more won't hurt. */
90
91 #undef ARM_FUNCTION_PROFILER
92 #define ARM_FUNCTION_PROFILER(STREAM,LABELNO) \
93 { \
94 fprintf(STREAM, "\tmov\t%sip, %slr\n", REGISTER_PREFIX, REGISTER_PREFIX); \
95 fprintf(STREAM, "\tbl\tmcount\n"); \
96 }
97
98 /* On the ARM `@' introduces a comment, so we must use something else
99 for .type directives. */
100 #undef TYPE_OPERAND_FMT
101 #define TYPE_OPERAND_FMT "%%%s"
102
103 /* NetBSD uses the old PCC style aggregate returning conventions. */
104 #undef DEFAULT_PCC_STRUCT_RETURN
105 #define DEFAULT_PCC_STRUCT_RETURN 1
106
107 /* Although not normally relevant (since by default, all aggregates
108 are returned in memory) compiling some parts of libc requires
109 non-APCS style struct returns. */
110 #undef RETURN_IN_MEMORY
111
112 /* VERY BIG NOTE : Change of structure alignment for RiscBSD.
113 There are consequences you should be aware of...
114
115 Normally GCC/arm uses a structure alignment of 32 for compatibility
116 with armcc. This means that structures are padded to a word
117 boundary. However this causes problems with bugged NetBSD kernel
118 code (possibly userland code as well - I have not checked every
119 binary). The nature of this bugged code is to rely on sizeof()
120 returning the correct size of various structures rounded to the
121 nearest byte (SCSI and ether code are two examples, the vm system
122 is another). This code breaks when the structure alignment is 32
123 as sizeof() will report a word=rounded size. By changing the
124 structure alignment to 8. GCC will conform to what is expected by
125 NetBSD.
126
127 This has several side effects that should be considered.
128 1. Structures will only be aligned to the size of the largest member.
129 i.e. structures containing only bytes will be byte aligned.
130 structures containing shorts will be half word aligned.
131 structures containing ints will be word aligned.
132
133 This means structures should be padded to a word boundary if
134 alignment of 32 is required for byte structures etc.
135
136 2. A potential performance penalty may exist if strings are no longer
137 word aligned. GCC will not be able to use word load/stores to copy
138 short strings.
139
140 This modification is not encouraged but with the present state of the
141 NetBSD source tree it is currently the only solution that meets the
142 requirements. */
143 #undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
144 #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8
145
146 /* Emit code to set up a trampoline and synchronize the caches. */
147 #undef INITIALIZE_TRAMPOLINE
148 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
149 { \
150 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
151 (CXT)); \
152 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
153 (FNADDR)); \
154 emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
155 0, VOIDmode, 2, TRAMP, Pmode, \
156 plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); \
157 }
158
159 /* Clear the instruction cache from `BEG' to `END'. This makes a
160 call to the ARM32_SYNC_ICACHE architecture specific syscall. */
161 #define CLEAR_INSN_CACHE(BEG, END) \
162 { \
163 extern int sysarch(int number, void *args); \
164 struct { \
165 unsigned int addr; \
166 int len; \
167 } s; \
168 s.addr = (unsigned int)(BEG); \
169 s.len = (END) - (BEG); \
170 (void)sysarch(0, &s); \
171 }