2 ;; Copyright (C) 2012-2019 Free Software Foundation, Inc.
3 ;; Contributed by ARM Ltd.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
22 ;; Note: sin and cos are no-longer used.
23 ;; Unspec enumerators for Neon are defined in neon.md.
24 ;; Unspec enumerators for iwmmxt2 are defined in iwmmxt2.md
26 (define_c_enum "unspec" [
27 UNSPEC_PUSH_MULT ; `push multiple' operation:
28 ; operand 0 is the first register,
29 ; subsequent registers are in parallel (use ...)
31 UNSPEC_PIC_SYM ; A symbol that has been treated properly for pic
32 ; usage, that is, we will add the pic_register
33 ; value to it before trying to dereference it.
34 UNSPEC_PIC_BASE ; Add PC and all but the last operand together,
35 ; The last operand is the number of a PIC_LABEL
36 ; that points at the containing instruction.
37 UNSPEC_PRLG_STK ; A special barrier that prevents frame accesses
38 ; being scheduled before the stack adjustment insn.
39 UNSPEC_REGISTER_USE ; As USE insns are not meaningful after reload,
40 ; this unspec is used to prevent the deletion of
41 ; instructions setting registers for EH handling
42 ; and stack frame generation. Operand 0 is the
44 UNSPEC_CHECK_ARCH ; Set CCs to indicate 26-bit or 32-bit mode.
45 UNSPEC_WSHUFH ; Used by the intrinsic form of the iWMMXt WSHUFH instruction.
46 UNSPEC_WACC ; Used by the intrinsic form of the iWMMXt WACC instruction.
47 UNSPEC_TMOVMSK ; Used by the intrinsic form of the iWMMXt TMOVMSK instruction.
48 UNSPEC_WSAD ; Used by the intrinsic form of the iWMMXt WSAD instruction.
49 UNSPEC_WSADZ ; Used by the intrinsic form of the iWMMXt WSADZ instruction.
50 UNSPEC_WMACS ; Used by the intrinsic form of the iWMMXt WMACS instruction.
51 UNSPEC_WMACU ; Used by the intrinsic form of the iWMMXt WMACU instruction.
52 UNSPEC_WMACSZ ; Used by the intrinsic form of the iWMMXt WMACSZ instruction.
53 UNSPEC_WMACUZ ; Used by the intrinsic form of the iWMMXt WMACUZ instruction.
54 UNSPEC_CLRDI ; Used by the intrinsic form of the iWMMXt CLRDI instruction.
55 UNSPEC_WALIGNI ; Used by the intrinsic form of the iWMMXt WALIGN instruction.
56 UNSPEC_TLS ; A symbol that has been treated properly for TLS usage.
57 UNSPEC_PIC_LABEL ; A label used for PIC access that does not appear in the
59 UNSPEC_PIC_OFFSET ; A symbolic 12-bit OFFSET that has been treated
60 ; correctly for PIC usage.
61 UNSPEC_GOTSYM_OFF ; The offset of the start of the GOT from a
62 ; a given symbolic address.
63 UNSPEC_THUMB1_CASESI ; A Thumb1 compressed dispatch-table call.
64 UNSPEC_RBIT ; rbit operation.
65 UNSPEC_SYMBOL_OFFSET ; The offset of the start of the symbol from
66 ; another symbolic address.
67 UNSPEC_MEMORY_BARRIER ; Represent a memory barrier.
68 UNSPEC_UNALIGNED_LOAD ; Used to represent ldr/ldrh instructions that access
69 ; unaligned locations, on architectures which support
71 UNSPEC_UNALIGNED_STORE ; Same for str/strh.
72 UNSPEC_PIC_UNIFIED ; Create a common pic addressing form.
73 UNSPEC_LL ; Represent an unpaired load-register-exclusive.
74 UNSPEC_VRINTZ ; Represent a float to integral float rounding
76 UNSPEC_VRINTP ; Represent a float to integral float rounding
78 UNSPEC_VRINTM ; Represent a float to integral float rounding
80 UNSPEC_VRINTR ; Represent a float to integral float rounding
81 ; FPSCR rounding mode.
82 UNSPEC_VRINTX ; Represent a float to integral float rounding
83 ; FPSCR rounding mode and signal inexactness.
84 UNSPEC_VRINTA ; Represent a float to integral float rounding
85 ; towards nearest, ties away from zero.
86 UNSPEC_PROBE_STACK ; Probe stack memory reference
87 UNSPEC_NONSECURE_MEM ; Represent non-secure memory in ARMv8-M with
89 UNSPEC_SP_SET ; Represent the setting of stack protector's canary
90 UNSPEC_SP_TEST ; Represent the testing of stack protector's canary
94 (define_c_enum "unspec" [
95 UNSPEC_WADDC ; Used by the intrinsic form of the iWMMXt WADDC instruction.
96 UNSPEC_WABS ; Used by the intrinsic form of the iWMMXt WABS instruction.
97 UNSPEC_WQMULWMR ; Used by the intrinsic form of the iWMMXt WQMULWMR instruction.
98 UNSPEC_WQMULMR ; Used by the intrinsic form of the iWMMXt WQMULMR instruction.
99 UNSPEC_WQMULWM ; Used by the intrinsic form of the iWMMXt WQMULWM instruction.
100 UNSPEC_WQMULM ; Used by the intrinsic form of the iWMMXt WQMULM instruction.
101 UNSPEC_WQMIAxyn ; Used by the intrinsic form of the iWMMXt WMIAxyn instruction.
102 UNSPEC_WQMIAxy ; Used by the intrinsic form of the iWMMXt WMIAxy instruction.
103 UNSPEC_TANDC ; Used by the intrinsic form of the iWMMXt TANDC instruction.
104 UNSPEC_TORC ; Used by the intrinsic form of the iWMMXt TORC instruction.
105 UNSPEC_TORVSC ; Used by the intrinsic form of the iWMMXt TORVSC instruction.
106 UNSPEC_TEXTRC ; Used by the intrinsic form of the iWMMXt TEXTRC instruction.
110 ;; UNSPEC_VOLATILE Usage:
112 (define_c_enum "unspecv" [
113 VUNSPEC_BLOCKAGE ; `blockage' insn to prevent scheduling across an
115 VUNSPEC_EPILOGUE ; `epilogue' insn, used to represent any part of the
116 ; instruction epilogue sequence that isn't expanded
117 ; into normal RTL. Used for both normal and sibcall
119 VUNSPEC_THUMB1_INTERWORK ; `prologue_thumb1_interwork' insn, used to swap
120 ; modes from arm to thumb.
121 VUNSPEC_ALIGN ; `align' insn. Used at the head of a minipool table
122 ; for inlined constants.
123 VUNSPEC_POOL_END ; `end-of-table'. Used to mark the end of a minipool
125 VUNSPEC_POOL_1 ; `pool-entry(1)'. An entry in the constant pool for
127 VUNSPEC_POOL_2 ; `pool-entry(2)'. An entry in the constant pool for
129 VUNSPEC_POOL_4 ; `pool-entry(4)'. An entry in the constant pool for
131 VUNSPEC_POOL_8 ; `pool-entry(8)'. An entry in the constant pool for
133 VUNSPEC_POOL_16 ; `pool-entry(16)'. An entry in the constant pool for
135 VUNSPEC_TMRC ; Used by the iWMMXt TMRC instruction.
136 VUNSPEC_TMCR ; Used by the iWMMXt TMCR instruction.
137 VUNSPEC_ALIGN8 ; 8-byte alignment version of VUNSPEC_ALIGN
138 VUNSPEC_WCMP_EQ ; Used by the iWMMXt WCMPEQ instructions
139 VUNSPEC_WCMP_GTU ; Used by the iWMMXt WCMPGTU instructions
140 VUNSPEC_WCMP_GT ; Used by the iwMMXT WCMPGT instructions
141 VUNSPEC_EH_RETURN ; Use to override the return address for exception
143 VUNSPEC_ATOMIC_CAS ; Represent an atomic compare swap.
144 VUNSPEC_ATOMIC_XCHG ; Represent an atomic exchange.
145 VUNSPEC_ATOMIC_OP ; Represent an atomic operation.
146 VUNSPEC_LL ; Represent a load-register-exclusive.
147 VUNSPEC_LDRD_ATOMIC ; Represent an LDRD used as an atomic DImode load.
148 VUNSPEC_SC ; Represent a store-register-exclusive.
149 VUNSPEC_LAX ; Represent a load-register-acquire-exclusive.
150 VUNSPEC_SLX ; Represent a store-register-release-exclusive.
151 VUNSPEC_LDA ; Represent a store-register-acquire.
152 VUNSPEC_STL ; Represent a store-register-release.
153 VUNSPEC_GET_FPSCR ; Represent fetch of FPSCR content.
154 VUNSPEC_SET_FPSCR ; Represent assign of FPSCR content.
155 VUNSPEC_PROBE_STACK_RANGE ; Represent stack range probing.
156 VUNSPEC_CDP ; Represent the coprocessor cdp instruction.
157 VUNSPEC_CDP2 ; Represent the coprocessor cdp2 instruction.
158 VUNSPEC_LDC ; Represent the coprocessor ldc instruction.
159 VUNSPEC_LDC2 ; Represent the coprocessor ldc2 instruction.
160 VUNSPEC_LDCL ; Represent the coprocessor ldcl instruction.
161 VUNSPEC_LDC2L ; Represent the coprocessor ldc2l instruction.
162 VUNSPEC_STC ; Represent the coprocessor stc instruction.
163 VUNSPEC_STC2 ; Represent the coprocessor stc2 instruction.
164 VUNSPEC_STCL ; Represent the coprocessor stcl instruction.
165 VUNSPEC_STC2L ; Represent the coprocessor stc2l instruction.
166 VUNSPEC_MCR ; Represent the coprocessor mcr instruction.
167 VUNSPEC_MCR2 ; Represent the coprocessor mcr2 instruction.
168 VUNSPEC_MRC ; Represent the coprocessor mrc instruction.
169 VUNSPEC_MRC2 ; Represent the coprocessor mrc2 instruction.
170 VUNSPEC_MCRR ; Represent the coprocessor mcrr instruction.
171 VUNSPEC_MCRR2 ; Represent the coprocessor mcrr2 instruction.
172 VUNSPEC_MRRC ; Represent the coprocessor mrrc instruction.
173 VUNSPEC_MRRC2 ; Represent the coprocessor mrrc2 instruction.
174 VUNSPEC_SPECULATION_BARRIER ; Represents an unconditional speculation barrier.
177 ;; Enumerators for NEON unspecs.
178 (define_c_enum "unspec" [
180 UNSPEC_ASHIFT_UNSIGNED
401 UNSPEC_MISALIGNED_ACCESS
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