config.gcc (avr-*-rtems*, avr-*-*): Set extra_gcc_objs and extra_objs.
[gcc.git] / gcc / config / avr / avr.h
1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
4 2008, 2009 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (chertykov@gmail.com)
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* Names to predefine in the preprocessor for this target machine. */
24
25 struct base_arch_s {
26 /* Assembler only. */
27 int asm_only;
28
29 /* Core have 'MUL*' instructions. */
30 int have_mul;
31
32 /* Core have 'CALL' and 'JMP' instructions. */
33 int have_jmp_call;
34
35 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
36 int have_movw_lpmx;
37
38 /* Core have 'ELPM' instructions. */
39 int have_elpm;
40
41 /* Core have 'ELPM Rx,Z' instructions. */
42 int have_elpmx;
43
44 /* Core have 'EICALL' and 'EIJMP' instructions. */
45 int have_eijmp_eicall;
46
47 /* Reserved for xmega architecture. */
48 int reserved;
49
50 /* Reserved for xmega architecture. */
51 int reserved2;
52
53 /* Default start of data section address for architecture. */
54 int default_data_section_start;
55
56 const char *const macro;
57
58 /* Architecture name. */
59 const char *const arch_name;
60 };
61
62 /* These names are used as the index into the avr_arch_types[] table
63 above. */
64
65 enum avr_arch
66 {
67 ARCH_UNKNOWN,
68 ARCH_AVR1,
69 ARCH_AVR2,
70 ARCH_AVR25,
71 ARCH_AVR3,
72 ARCH_AVR31,
73 ARCH_AVR35,
74 ARCH_AVR4,
75 ARCH_AVR5,
76 ARCH_AVR51,
77 ARCH_AVR6
78 };
79
80 struct mcu_type_s {
81 /* Device name. */
82 const char *const name;
83
84 /* Index in avr_arch_types[]. */
85 int arch;
86
87 /* Must lie outside user's namespace. NULL == no macro. */
88 const char *const macro;
89
90 /* Stack pointer have 8 bits width. */
91 int short_sp;
92
93 /* Start of data section. */
94 int data_section_start;
95
96 /* Name of device library. */
97 const char *const library_name;
98 };
99
100 extern const struct base_arch_s *avr_current_arch;
101 extern const struct mcu_type_s *avr_current_device;
102 extern const struct mcu_type_s avr_mcu_types[];
103 extern const struct base_arch_s avr_arch_types[];
104
105 #define TARGET_CPU_CPP_BUILTINS() \
106 do \
107 { \
108 builtin_define_std ("AVR"); \
109 if (avr_current_arch->macro) \
110 builtin_define (avr_current_arch->macro); \
111 if (avr_extra_arch_macro) \
112 builtin_define (avr_extra_arch_macro); \
113 if (avr_current_arch->have_elpm) \
114 builtin_define ("__AVR_HAVE_RAMPZ__"); \
115 if (avr_current_arch->have_elpm) \
116 builtin_define ("__AVR_HAVE_ELPM__"); \
117 if (avr_current_arch->have_elpmx) \
118 builtin_define ("__AVR_HAVE_ELPMX__"); \
119 if (avr_current_arch->have_movw_lpmx) \
120 { \
121 builtin_define ("__AVR_HAVE_MOVW__"); \
122 builtin_define ("__AVR_HAVE_LPMX__"); \
123 } \
124 if (avr_current_arch->asm_only) \
125 builtin_define ("__AVR_ASM_ONLY__"); \
126 if (avr_current_arch->have_mul) \
127 { \
128 builtin_define ("__AVR_ENHANCED__"); \
129 builtin_define ("__AVR_HAVE_MUL__"); \
130 } \
131 if (avr_current_arch->have_jmp_call) \
132 { \
133 builtin_define ("__AVR_MEGA__"); \
134 builtin_define ("__AVR_HAVE_JMP_CALL__"); \
135 } \
136 if (avr_current_arch->have_eijmp_eicall) \
137 { \
138 builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
139 builtin_define ("__AVR_3_BYTE_PC__"); \
140 } \
141 else \
142 { \
143 builtin_define ("__AVR_2_BYTE_PC__"); \
144 } \
145 if (TARGET_NO_INTERRUPTS) \
146 builtin_define ("__NO_INTERRUPTS__"); \
147 } \
148 while (0)
149
150 extern const char *avr_extra_arch_macro;
151
152 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
153 extern GTY(()) section *progmem_section;
154 #endif
155
156 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
157 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
158 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
159 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
160 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
161 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
162
163 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
164 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
165
166 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
167
168 #define OVERRIDE_OPTIONS avr_override_options ()
169
170 #define CAN_DEBUG_WITHOUT_FP
171
172 #define BITS_BIG_ENDIAN 0
173 #define BYTES_BIG_ENDIAN 0
174 #define WORDS_BIG_ENDIAN 0
175
176 #ifdef IN_LIBGCC2
177 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
178 #define UNITS_PER_WORD 4
179 #else
180 /* Width of a word, in units (bytes). */
181 #define UNITS_PER_WORD 1
182 #endif
183
184 #define POINTER_SIZE 16
185
186
187 /* Maximum sized of reasonable data type
188 DImode or Dfmode ... */
189 #define MAX_FIXED_MODE_SIZE 32
190
191 #define PARM_BOUNDARY 8
192
193 #define FUNCTION_BOUNDARY 8
194
195 #define EMPTY_FIELD_BOUNDARY 8
196
197 /* No data type wants to be aligned rounder than this. */
198 #define BIGGEST_ALIGNMENT 8
199
200 #define MAX_OFILE_ALIGNMENT (32768 * 8)
201
202 #define TARGET_VTABLE_ENTRY_ALIGN 8
203
204 #define STRICT_ALIGNMENT 0
205
206 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
207 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
208 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
209 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
210 #define FLOAT_TYPE_SIZE 32
211 #define DOUBLE_TYPE_SIZE 32
212 #define LONG_DOUBLE_TYPE_SIZE 32
213
214 #define DEFAULT_SIGNED_CHAR 1
215
216 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
217 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
218
219 #define WCHAR_TYPE_SIZE 16
220
221 #define FIRST_PSEUDO_REGISTER 36
222
223 #define FIXED_REGISTERS {\
224 1,1,/* r0 r1 */\
225 0,0,/* r2 r3 */\
226 0,0,/* r4 r5 */\
227 0,0,/* r6 r7 */\
228 0,0,/* r8 r9 */\
229 0,0,/* r10 r11 */\
230 0,0,/* r12 r13 */\
231 0,0,/* r14 r15 */\
232 0,0,/* r16 r17 */\
233 0,0,/* r18 r19 */\
234 0,0,/* r20 r21 */\
235 0,0,/* r22 r23 */\
236 0,0,/* r24 r25 */\
237 0,0,/* r26 r27 */\
238 0,0,/* r28 r29 */\
239 0,0,/* r30 r31 */\
240 1,1,/* STACK */\
241 1,1 /* arg pointer */ }
242
243 #define CALL_USED_REGISTERS { \
244 1,1,/* r0 r1 */ \
245 0,0,/* r2 r3 */ \
246 0,0,/* r4 r5 */ \
247 0,0,/* r6 r7 */ \
248 0,0,/* r8 r9 */ \
249 0,0,/* r10 r11 */ \
250 0,0,/* r12 r13 */ \
251 0,0,/* r14 r15 */ \
252 0,0,/* r16 r17 */ \
253 1,1,/* r18 r19 */ \
254 1,1,/* r20 r21 */ \
255 1,1,/* r22 r23 */ \
256 1,1,/* r24 r25 */ \
257 1,1,/* r26 r27 */ \
258 0,0,/* r28 r29 */ \
259 1,1,/* r30 r31 */ \
260 1,1,/* STACK */ \
261 1,1 /* arg pointer */ }
262
263 #define REG_ALLOC_ORDER { \
264 24,25, \
265 18,19, \
266 20,21, \
267 22,23, \
268 30,31, \
269 26,27, \
270 28,29, \
271 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
272 0,1, \
273 32,33,34,35 \
274 }
275
276 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
277
278
279 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
280
281 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
282
283 #define MODES_TIEABLE_P(MODE1, MODE2) 1
284
285 enum reg_class {
286 NO_REGS,
287 R0_REG, /* r0 */
288 POINTER_X_REGS, /* r26 - r27 */
289 POINTER_Y_REGS, /* r28 - r29 */
290 POINTER_Z_REGS, /* r30 - r31 */
291 STACK_REG, /* STACK */
292 BASE_POINTER_REGS, /* r28 - r31 */
293 POINTER_REGS, /* r26 - r31 */
294 ADDW_REGS, /* r24 - r31 */
295 SIMPLE_LD_REGS, /* r16 - r23 */
296 LD_REGS, /* r16 - r31 */
297 NO_LD_REGS, /* r0 - r15 */
298 GENERAL_REGS, /* r0 - r31 */
299 ALL_REGS, LIM_REG_CLASSES
300 };
301
302
303 #define N_REG_CLASSES (int)LIM_REG_CLASSES
304
305 #define REG_CLASS_NAMES { \
306 "NO_REGS", \
307 "R0_REG", /* r0 */ \
308 "POINTER_X_REGS", /* r26 - r27 */ \
309 "POINTER_Y_REGS", /* r28 - r29 */ \
310 "POINTER_Z_REGS", /* r30 - r31 */ \
311 "STACK_REG", /* STACK */ \
312 "BASE_POINTER_REGS", /* r28 - r31 */ \
313 "POINTER_REGS", /* r26 - r31 */ \
314 "ADDW_REGS", /* r24 - r31 */ \
315 "SIMPLE_LD_REGS", /* r16 - r23 */ \
316 "LD_REGS", /* r16 - r31 */ \
317 "NO_LD_REGS", /* r0 - r15 */ \
318 "GENERAL_REGS", /* r0 - r31 */ \
319 "ALL_REGS" }
320
321 #define REG_CLASS_CONTENTS { \
322 {0x00000000,0x00000000}, /* NO_REGS */ \
323 {0x00000001,0x00000000}, /* R0_REG */ \
324 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
325 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
326 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
327 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
328 {(3 << REG_Y) | (3 << REG_Z), \
329 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
330 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
331 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
332 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
333 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
334 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
335 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
336 0x00000000}, /* LD_REGS, r16 - r31 */ \
337 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
338 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
339 {0xffffffff,0x00000003} /* ALL_REGS */ \
340 }
341
342 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
343
344 /* The following macro defines cover classes for Integrated Register
345 Allocator. Cover classes is a set of non-intersected register
346 classes covering all hard registers used for register allocation
347 purpose. Any move between two registers of a cover class should be
348 cheaper than load or store of the registers. The macro value is
349 array of register classes with LIM_REG_CLASSES used as the end
350 marker. */
351
352 #define IRA_COVER_CLASSES \
353 { \
354 GENERAL_REGS, LIM_REG_CLASSES \
355 }
356
357 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
358
359 #define INDEX_REG_CLASS NO_REGS
360
361 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
362 && ((r) == REG_X \
363 || (r) == REG_Y \
364 || (r) == REG_Z \
365 || (r) == ARG_POINTER_REGNUM)) \
366 || (reg_renumber \
367 && (reg_renumber[r] == REG_X \
368 || reg_renumber[r] == REG_Y \
369 || reg_renumber[r] == REG_Z \
370 || (reg_renumber[r] \
371 == ARG_POINTER_REGNUM))))
372
373 #define REGNO_OK_FOR_INDEX_P(NUM) 0
374
375 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
376
377 #define SMALL_REGISTER_CLASSES 1
378
379 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
380
381 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
382
383 #define STACK_PUSH_CODE POST_DEC
384
385 #define STACK_GROWS_DOWNWARD
386
387 #define STARTING_FRAME_OFFSET 1
388
389 #define STACK_POINTER_OFFSET 1
390
391 #define FIRST_PARM_OFFSET(FUNDECL) 0
392
393 #define STACK_BOUNDARY 8
394
395 #define STACK_POINTER_REGNUM 32
396
397 #define FRAME_POINTER_REGNUM REG_Y
398
399 #define ARG_POINTER_REGNUM 34
400
401 #define STATIC_CHAIN_REGNUM 2
402
403 #define FRAME_POINTER_REQUIRED avr_frame_pointer_required_p()
404
405 /* Offset from the frame pointer register value to the top of the stack. */
406 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
407
408 #define ELIMINABLE_REGS { \
409 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
410 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
411 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
412
413 #define CAN_ELIMINATE(FROM, TO) avr_can_eliminate (FROM, TO)
414
415 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
416 OFFSET = avr_initial_elimination_offset (FROM, TO)
417
418 #define RETURN_ADDR_RTX(count, x) \
419 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
420
421 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
422 for POST_DEC targets (PR27386). */
423 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
424
425 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
426
427 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
428
429 typedef struct avr_args {
430 int nregs; /* # registers available for passing */
431 int regno; /* next available register number */
432 } CUMULATIVE_ARGS;
433
434 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
435 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
436
437 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
438 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
439
440 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
441
442 extern int avr_reg_order[];
443
444 #define RET_REGISTER avr_ret_register ()
445
446 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
447
448 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
449
450 #define DEFAULT_PCC_STRUCT_RETURN 0
451
452 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
453
454 #define HAVE_POST_INCREMENT 1
455 #define HAVE_PRE_DECREMENT 1
456
457 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
458
459 #define MAX_REGS_PER_ADDRESS 1
460
461 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
462 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
463
464 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
465
466 #ifdef REG_OK_STRICT
467 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
468 #else
469 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
470 #endif
471
472 #define REG_OK_FOR_INDEX_P(X) 0
473
474 #define XEXP_(X,Y) (X)
475
476 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
477 is no worse than normal base pointers R28/29 and R30/31. For example:
478 If base offset is greater than 63 bytes or for R++ or --R addressing. */
479
480 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
481 do { \
482 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
483 { \
484 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
485 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
486 OPNUM, RELOAD_OTHER); \
487 goto WIN; \
488 } \
489 if (GET_CODE (X) == PLUS \
490 && REG_P (XEXP (X, 0)) \
491 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
492 && GET_CODE (XEXP (X, 1)) == CONST_INT \
493 && INTVAL (XEXP (X, 1)) >= 1) \
494 { \
495 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
496 if (fit) \
497 { \
498 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
499 { \
500 int regno = REGNO (XEXP (X, 0)); \
501 rtx mem = make_memloc (X, regno); \
502 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
503 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
504 1, ADDR_TYPE (TYPE)); \
505 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
506 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
507 OPNUM, TYPE); \
508 goto WIN; \
509 } \
510 } \
511 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
512 { \
513 push_reload (X, NULL_RTX, &X, NULL, \
514 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
515 OPNUM, TYPE); \
516 goto WIN; \
517 } \
518 } \
519 } while(0)
520
521 #define LEGITIMATE_CONSTANT_P(X) 1
522
523 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
524 : (TO) == STACK_REG ? 12 \
525 : 2)
526
527 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
528 (MODE)==HImode ? 4 : \
529 (MODE)==SImode ? 8 : \
530 (MODE)==SFmode ? 8 : 16)
531
532 #define BRANCH_COST(speed_p, predictable_p) 0
533
534 #define SLOW_BYTE_ACCESS 0
535
536 #define NO_FUNCTION_CSE
537
538 #define TEXT_SECTION_ASM_OP "\t.text"
539
540 #define DATA_SECTION_ASM_OP "\t.data"
541
542 #define BSS_SECTION_ASM_OP "\t.section .bss"
543
544 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
545 There are no shared libraries on this target, and these sections are
546 placed in the read-only program memory, so they are not writable. */
547
548 #undef CTORS_SECTION_ASM_OP
549 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
550
551 #undef DTORS_SECTION_ASM_OP
552 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
553
554 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
555
556 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
557
558 #define SUPPORTS_INIT_PRIORITY 0
559
560 #define JUMP_TABLES_IN_TEXT_SECTION 0
561
562 #define ASM_COMMENT_START " ; "
563
564 #define ASM_APP_ON "/* #APP */\n"
565
566 #define ASM_APP_OFF "/* #NOAPP */\n"
567
568 /* Switch into a generic section. */
569 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
570 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
571
572 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
573
574 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
575
576 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
577 do { \
578 fputs ("\t.comm ", (STREAM)); \
579 assemble_name ((STREAM), (NAME)); \
580 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
581 } while (0)
582
583 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
584 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
585
586 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
587 do { \
588 fputs ("\t.lcomm ", (STREAM)); \
589 assemble_name ((STREAM), (NAME)); \
590 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
591 } while (0)
592
593 #undef TYPE_ASM_OP
594 #undef SIZE_ASM_OP
595 #undef WEAK_ASM_OP
596 #define TYPE_ASM_OP "\t.type\t"
597 #define SIZE_ASM_OP "\t.size\t"
598 #define WEAK_ASM_OP "\t.weak\t"
599 /* Define the strings used for the special svr4 .type and .size directives.
600 These strings generally do not vary from one system running svr4 to
601 another, but if a given system (e.g. m88k running svr) needs to use
602 different pseudo-op names for these, they may be overridden in the
603 file which includes this one. */
604
605
606 #undef TYPE_OPERAND_FMT
607 #define TYPE_OPERAND_FMT "@%s"
608 /* The following macro defines the format used to output the second
609 operand of the .type assembler directive. Different svr4 assemblers
610 expect various different forms for this operand. The one given here
611 is just a default. You may need to override it in your machine-
612 specific tm.h file (depending upon the particulars of your assembler). */
613
614 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
615 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
616
617 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
618 do { \
619 if (!flag_inhibit_size_directive) \
620 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
621 } while (0)
622
623 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
624 do { \
625 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
626 size_directive_output = 0; \
627 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
628 { \
629 size_directive_output = 1; \
630 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
631 int_size_in_bytes (TREE_TYPE (DECL))); \
632 } \
633 ASM_OUTPUT_LABEL(FILE, NAME); \
634 } while (0)
635
636 #undef ASM_FINISH_DECLARE_OBJECT
637 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
638 do { \
639 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
640 HOST_WIDE_INT size; \
641 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
642 && ! AT_END && TOP_LEVEL \
643 && DECL_INITIAL (DECL) == error_mark_node \
644 && !size_directive_output) \
645 { \
646 size_directive_output = 1; \
647 size = int_size_in_bytes (TREE_TYPE (DECL)); \
648 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
649 } \
650 } while (0)
651
652
653 #define ESCAPES \
654 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
655 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
656 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
657 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
658 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
659 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
660 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
661 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
662 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
663 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
664 corresponds to a particular byte value [0..255]. For any
665 given byte value, if the value in the corresponding table
666 position is zero, the given character can be output directly.
667 If the table value is 1, the byte must be output as a \ooo
668 octal escape. If the tables value is anything else, then the
669 byte value should be output as a \ followed by the value
670 in the table. Note that we can use standard UN*X escape
671 sequences for many control characters, but we don't use
672 \a to represent BEL because some svr4 assemblers (e.g. on
673 the i386) don't know about that. Also, we don't use \v
674 since some versions of gas, such as 2.2 did not accept it. */
675
676 #define STRING_LIMIT ((unsigned) 64)
677 #define STRING_ASM_OP "\t.string\t"
678 /* Some svr4 assemblers have a limit on the number of characters which
679 can appear in the operand of a .string directive. If your assembler
680 has such a limitation, you should define STRING_LIMIT to reflect that
681 limit. Note that at least some svr4 assemblers have a limit on the
682 actual number of bytes in the double-quoted string, and that they
683 count each character in an escape sequence as one byte. Thus, an
684 escape sequence like \377 would count as four bytes.
685
686 If your target assembler doesn't support the .string directive, you
687 should define this to zero. */
688
689 /* Globalizing directive for a label. */
690 #define GLOBAL_ASM_OP ".global\t"
691
692 #define SET_ASM_OP "\t.set\t"
693
694 #define ASM_WEAKEN_LABEL(FILE, NAME) \
695 do \
696 { \
697 fputs ("\t.weak\t", (FILE)); \
698 assemble_name ((FILE), (NAME)); \
699 fputc ('\n', (FILE)); \
700 } \
701 while (0)
702
703 #define SUPPORTS_WEAK 1
704
705 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
706 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
707
708 #define HAS_INIT_SECTION 1
709
710 #define REGISTER_NAMES { \
711 "r0","r1","r2","r3","r4","r5","r6","r7", \
712 "r8","r9","r10","r11","r12","r13","r14","r15", \
713 "r16","r17","r18","r19","r20","r21","r22","r23", \
714 "r24","r25","r26","r27","r28","r29","r30","r31", \
715 "__SP_L__","__SP_H__","argL","argH"}
716
717 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
718
719 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
720
721 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
722
723 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
724
725 #define USER_LABEL_PREFIX ""
726
727 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
728
729 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
730 { \
731 gcc_assert (REGNO < 32); \
732 fprintf (STREAM, "\tpush\tr%d", REGNO); \
733 }
734
735 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
736 { \
737 gcc_assert (REGNO < 32); \
738 fprintf (STREAM, "\tpop\tr%d", REGNO); \
739 }
740
741 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
742 avr_output_addr_vec_elt(STREAM, VALUE)
743
744 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
745 (switch_to_section (progmem_section), \
746 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
747
748 #define ASM_OUTPUT_SKIP(STREAM, N) \
749 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
750
751 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
752 do { \
753 if ((POWER) > 1) \
754 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
755 } while (0)
756
757 #define CASE_VECTOR_MODE HImode
758
759 #undef WORD_REGISTER_OPERATIONS
760
761 #define MOVE_MAX 4
762
763 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
764
765 #define Pmode HImode
766
767 #define FUNCTION_MODE HImode
768
769 #define DOLLARS_IN_IDENTIFIERS 0
770
771 #define NO_DOLLAR_IN_LABEL 1
772
773 #define TRAMPOLINE_TEMPLATE(FILE) \
774 internal_error ("trampolines not supported")
775
776 #define TRAMPOLINE_SIZE 4
777
778 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
779 { \
780 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
781 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
782 }
783 /* Store in cc_status the expressions
784 that the condition codes will describe
785 after execution of an instruction whose pattern is EXP.
786 Do not alter them if the instruction would not alter the cc's. */
787
788 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
789
790 /* The add insns don't set overflow in a usable way. */
791 #define CC_OVERFLOW_UNUSABLE 01000
792 /* The mov,and,or,xor insns don't set carry. That's ok though as the
793 Z bit is all we need when doing unsigned comparisons on the result of
794 these insns (since they're always with 0). However, conditions.h has
795 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
796 understandable. */
797 #define CC_NO_CARRY CC_NO_OVERFLOW
798
799
800 /* Output assembler code to FILE to increment profiler label # LABELNO
801 for profiling a function entry. */
802
803 #define FUNCTION_PROFILER(FILE, LABELNO) \
804 fprintf (FILE, "/* profiler %d */", (LABELNO))
805
806 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
807 adjust_insn_length (INSN, LENGTH))
808
809 extern const char *avr_device_to_arch (int argc, const char **argv);
810 extern const char *avr_device_to_data_start (int argc, const char **argv);
811 extern const char *avr_device_to_startfiles (int argc, const char **argv);
812 extern const char *avr_device_to_devicelib (int argc, const char **argv);
813
814 #define EXTRA_SPEC_FUNCTIONS \
815 { "device_to_arch", avr_device_to_arch }, \
816 { "device_to_data_start", avr_device_to_data_start }, \
817 { "device_to_startfile", avr_device_to_startfiles }, \
818 { "device_to_devicelib", avr_device_to_devicelib },
819
820 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
821
822 #define CC1_SPEC "%{profile:-p}"
823
824 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
825 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
826 %{!fexceptions:-fno-exceptions}"
827 /* A C string constant that tells the GCC driver program options to
828 pass to `cc1plus'. */
829
830 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
831 mmcu=*:-mmcu=%*}"
832
833 #define LINK_SPEC "\
834 %{mrelax:--relax\
835 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
836 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
837 %{mmcu=atmega32*|\
838 mmcu=at90can32*:--pmem-wrap-around=32k}\
839 %{mmcu=atmega64*|\
840 mmcu=at90can64*|\
841 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
842 %:device_to_arch(%{mmcu=*:%*})\
843 %:device_to_data_start(%{mmcu=*:%*})"
844
845 #define LIB_SPEC \
846 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
847
848 #define LIBSTDCXX "-lgcc"
849 /* No libstdc++ for now. Empty string doesn't work. */
850
851 #define LIBGCC_SPEC \
852 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
853
854 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
855
856 #define ENDFILE_SPEC ""
857
858 /* This is the default without any -mmcu=* option (AT90S*). */
859 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
860
861 /* This is undefined macro for collect2 disabling */
862 #define LINKER_NAME "ld"
863
864 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
865 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
866
867 /* Note that the other files fail to use these
868 in some of the places where they should. */
869
870 #if defined(__STDC__) || defined(ALMOST_STDC)
871 #define AS2(a,b,c) #a " " #b "," #c
872 #define AS2C(b,c) " " #b "," #c
873 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
874 #define AS1(a,b) #a " " #b
875 #else
876 #define AS1(a,b) "a b"
877 #define AS2(a,b,c) "a b,c"
878 #define AS2C(b,c) " b,c"
879 #define AS3(a,b,c,d) "a b,c,d"
880 #endif
881 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
882 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
883 #define CR_TAB "\n\t"
884
885 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
886
887 #define DWARF2_DEBUGGING_INFO 1
888
889 #define DWARF2_ADDR_SIZE 4
890
891 #define OBJECT_FORMAT_ELF
892
893 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
894 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
895
896 /* A C structure for machine-specific, per-function data.
897 This is added to the cfun structure. */
898 struct GTY(()) machine_function
899 {
900 /* 'true' - if the current function is a leaf function. */
901 int is_leaf;
902
903 /* 'true' - if current function is a naked function. */
904 int is_naked;
905
906 /* 'true' - if current function is an interrupt function
907 as specified by the "interrupt" attribute. */
908 int is_interrupt;
909
910 /* 'true' - if current function is a signal function
911 as specified by the "signal" attribute. */
912 int is_signal;
913
914 /* 'true' - if current function is a 'task' function
915 as specified by the "OS_task" attribute. */
916 int is_OS_task;
917
918 /* 'true' - if current function is a 'main' function
919 as specified by the "OS_main" attribute. */
920 int is_OS_main;
921 };