gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   4    2008, 2009, 2010, 2011
   5    Free Software Foundation, Inc.
   6    Contributed by Denis Chertykov (chertykov@gmail.com)
   7
   8 This file is part of GCC.
   9
  10 GCC is free software; you can redistribute it and/or modify
  11 it under the terms of the GNU General Public License as published by
  12 the Free Software Foundation; either version 3, or (at your option)
  13 any later version.
  14
  15 GCC is distributed in the hope that it will be useful,
  16 but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 GNU General Public License for more details.
  19
  20 You should have received a copy of the GNU General Public License
  21 along with GCC; see the file COPYING3.  If not see
  22 <http://www.gnu.org/licenses/>.  */
  23
  24 /* Names to predefine in the preprocessor for this target machine.  */
  25
  26 struct base_arch_s
  27 {
  28   /* Assembler only.  */
  29   int asm_only;
  30
  31   /* Core have 'MUL*' instructions.  */
  32   int have_mul;
  33
  34   /* Core have 'CALL' and 'JMP' instructions.  */
  35   int have_jmp_call;
  36
  37   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  38   int have_movw_lpmx;
  39
  40   /* Core have 'ELPM' instructions.  */
  41   int have_elpm;
  42
  43   /* Core have 'ELPM Rx,Z' instructions.  */
  44   int have_elpmx;
  45
  46   /* Core have 'EICALL' and 'EIJMP' instructions.  */
  47   int have_eijmp_eicall;
  48
  49   /* This is an XMEGA core.  */
  50   int xmega_p;
  51
  52   /* This core has the RAMPD special function register
  53      and thus also the RAMPX, RAMPY and RAMPZ registers.  */
  54   int have_rampd;
  55
  56   /* Default start of data section address for architecture.  */
  57   int default_data_section_start;
  58
  59   /* Offset between SFR address and RAM address:
  60      SFR-address = RAM-address - sfr_offset  */
  61   int sfr_offset;
  62
  63   /* Architecture id to built-in define __AVR_ARCH__ (NULL -> no macro) */
  64   const char *const macro;
  65
  66   /* Architecture name.  */
  67   const char *const arch_name;
  68 };
  69
  70 /* These names are used as the index into the avr_arch_types[] table
  71    above.  */
  72
  73 enum avr_arch
  74 {
  75   ARCH_UNKNOWN,
  76   ARCH_AVR1,
  77   ARCH_AVR2,
  78   ARCH_AVR25,
  79   ARCH_AVR3,
  80   ARCH_AVR31,
  81   ARCH_AVR35,
  82   ARCH_AVR4,
  83   ARCH_AVR5,
  84   ARCH_AVR51,
  85   ARCH_AVR6,
  86   ARCH_AVRXMEGA2,
  87   ARCH_AVRXMEGA4,
  88   ARCH_AVRXMEGA5,
  89   ARCH_AVRXMEGA6,
  90   ARCH_AVRXMEGA7
  91 };
  92
  93 struct mcu_type_s {
  94   /* Device name.  */
  95   const char *const name;
  96
  97   /* Index in avr_arch_types[].  */
  98   int arch;
  99
 100   /* Must lie outside user's namespace.  NULL == no macro.  */
 101   const char *const macro;
 102
 103   /* Stack pointer have 8 bits width.  */
 104   int short_sp;
 105
 106   /* Some AVR devices have a core erratum when skipping a 2-word instruction.
 107      Skip instructions are:  SBRC, SBRS, SBIC, SBIS, CPSE.
 108      Problems will occur with return address is IRQ executes during the
 109      skip sequence.
 110
 111      A support ticket from Atmel returned the following information:
 112
 113          Subject: (ATTicket:644469) On AVR skip-bug core Erratum
 114          From: avr@atmel.com                    Date: 2011-07-27
 115          (Please keep the subject when replying to this mail)
 116
 117          This errata exists only in AT90S8515 and ATmega103 devices.
 118
 119          For information please refer the following respective errata links
 120             http://www.atmel.com/dyn/resources/prod_documents/doc2494.pdf
 121             http://www.atmel.com/dyn/resources/prod_documents/doc1436.pdf  */
 122
 123   /* Core Erratum:  Must not skip 2-word instruction.  */
 124   int errata_skip;
 125
 126   /* Start of data section.  */
 127   int data_section_start;
 128
 129   /* Number of 64k segments in the flash.  */
 130   int n_flash;
 131
 132   /* Name of device library.  */
 133   const char *const library_name;
 134 };
 135
 136 /* Preprocessor macros to define depending on MCU type.  */
 137 extern const char *avr_extra_arch_macro;
 138 extern const struct base_arch_s *avr_current_arch;
 139 extern const struct mcu_type_s *avr_current_device;
 140 extern const struct mcu_type_s avr_mcu_types[];
 141 extern const struct base_arch_s avr_arch_types[];
 142
 143 typedef struct
 144 {
 145   /* Id of the address space as used in c_register_addr_space */
 146   unsigned char id;
 147
 148   /* Flavour of memory: 0 = RAM, 1 = Flash */
 149   int memory_class;
 150
 151   /* Width of pointer (in bytes) */
 152   int pointer_size;
 153
 154   /* Name of the address space as visible to the user */
 155   const char *name;
 156
 157   /* Segment (i.e. 64k memory chunk) number.  */
 158   int segment;
 159 } avr_addrspace_t;
 160
 161 extern const avr_addrspace_t avr_addrspace[];
 162
 163 /* Known address spaces */
 164
 165 enum
 166   {
 167     ADDR_SPACE_RAM,
 168     ADDR_SPACE_FLASH,
 169     ADDR_SPACE_FLASH1,
 170     ADDR_SPACE_FLASH2,
 171     ADDR_SPACE_FLASH3,
 172     ADDR_SPACE_FLASH4,
 173     ADDR_SPACE_FLASH5,
 174     ADDR_SPACE_MEMX
 175   };
 176
 177 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
 178
 179 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
 180 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
 181 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
 182 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
 183 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
 184 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
 185 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
 186 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
 187 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
 188 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm             \
 189                         || avr_current_arch->have_rampd)
 190 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
 191 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK)
 192
 193 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 194 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 195
 196 #define AVR_XMEGA (avr_current_arch->xmega_p)
 197
 198 #define BITS_BIG_ENDIAN 0
 199 #define BYTES_BIG_ENDIAN 0
 200 #define WORDS_BIG_ENDIAN 0
 201
 202 #ifdef IN_LIBGCC2
 203 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 204 #define UNITS_PER_WORD 4
 205 #else
 206 /* Width of a word, in units (bytes).  */
 207 #define UNITS_PER_WORD 1
 208 #endif
 209
 210 #define POINTER_SIZE 16
 211
 212
 213 /* Maximum sized of reasonable data type
 214    DImode or Dfmode ...  */
 215 #define MAX_FIXED_MODE_SIZE 32
 216
 217 #define PARM_BOUNDARY 8
 218
 219 #define FUNCTION_BOUNDARY 8
 220
 221 #define EMPTY_FIELD_BOUNDARY 8
 222
 223 /* No data type wants to be aligned rounder than this.  */
 224 #define BIGGEST_ALIGNMENT 8
 225
 226 #define TARGET_VTABLE_ENTRY_ALIGN 8
 227
 228 #define STRICT_ALIGNMENT 0
 229
 230 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 231 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 232 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 233 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 234 #define FLOAT_TYPE_SIZE 32
 235 #define DOUBLE_TYPE_SIZE 32
 236 #define LONG_DOUBLE_TYPE_SIZE 32
 237
 238 #define DEFAULT_SIGNED_CHAR 1
 239
 240 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 241 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 242
 243 #define WCHAR_TYPE_SIZE 16
 244
 245 #define FIRST_PSEUDO_REGISTER 36
 246
 247 #define FIXED_REGISTERS {\
 248   1,1,/* r0 r1 */\
 249   0,0,/* r2 r3 */\
 250   0,0,/* r4 r5 */\
 251   0,0,/* r6 r7 */\
 252   0,0,/* r8 r9 */\
 253   0,0,/* r10 r11 */\
 254   0,0,/* r12 r13 */\
 255   0,0,/* r14 r15 */\
 256   0,0,/* r16 r17 */\
 257   0,0,/* r18 r19 */\
 258   0,0,/* r20 r21 */\
 259   0,0,/* r22 r23 */\
 260   0,0,/* r24 r25 */\
 261   0,0,/* r26 r27 */\
 262   0,0,/* r28 r29 */\
 263   0,0,/* r30 r31 */\
 264   1,1,/*  STACK */\
 265   1,1 /* arg pointer */  }
 266
 267 #define CALL_USED_REGISTERS {                   \
 268   1,1,/* r0 r1 */                               \
 269     0,0,/* r2 r3 */                             \
 270     0,0,/* r4 r5 */                             \
 271     0,0,/* r6 r7 */                             \
 272     0,0,/* r8 r9 */                             \
 273     0,0,/* r10 r11 */                           \
 274     0,0,/* r12 r13 */                           \
 275     0,0,/* r14 r15 */                           \
 276     0,0,/* r16 r17 */                           \
 277     1,1,/* r18 r19 */                           \
 278     1,1,/* r20 r21 */                           \
 279     1,1,/* r22 r23 */                           \
 280     1,1,/* r24 r25 */                           \
 281     1,1,/* r26 r27 */                           \
 282     0,0,/* r28 r29 */                           \
 283     1,1,/* r30 r31 */                           \
 284     1,1,/*  STACK */                            \
 285     1,1 /* arg pointer */  }
 286
 287 #define REG_ALLOC_ORDER {                       \
 288     24,25,                                      \
 289     18,19,                                      \
 290     20,21,                                      \
 291     22,23,                                      \
 292     30,31,                                      \
 293     26,27,                                      \
 294     28,29,                                      \
 295     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 296     0,1,                                        \
 297     32,33,34,35                                 \
 298     }
 299
 300 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
 301
 302
 303 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 304
 305 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 306
 307 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 308
 309 enum reg_class {
 310   NO_REGS,
 311   R0_REG,                       /* r0 */
 312   POINTER_X_REGS,               /* r26 - r27 */
 313   POINTER_Y_REGS,               /* r28 - r29 */
 314   POINTER_Z_REGS,               /* r30 - r31 */
 315   STACK_REG,                    /* STACK */
 316   BASE_POINTER_REGS,            /* r28 - r31 */
 317   POINTER_REGS,                 /* r26 - r31 */
 318   ADDW_REGS,                    /* r24 - r31 */
 319   SIMPLE_LD_REGS,               /* r16 - r23 */
 320   LD_REGS,                      /* r16 - r31 */
 321   NO_LD_REGS,                   /* r0 - r15 */
 322   GENERAL_REGS,                 /* r0 - r31 */
 323   ALL_REGS, LIM_REG_CLASSES
 324 };
 325
 326
 327 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 328
 329 #define REG_CLASS_NAMES {                                       \
 330                  "NO_REGS",                                     \
 331                    "R0_REG",    /* r0 */                        \
 332                    "POINTER_X_REGS", /* r26 - r27 */            \
 333                    "POINTER_Y_REGS", /* r28 - r29 */            \
 334                    "POINTER_Z_REGS", /* r30 - r31 */            \
 335                    "STACK_REG", /* STACK */                     \
 336                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 337                    "POINTER_REGS", /* r26 - r31 */              \
 338                    "ADDW_REGS", /* r24 - r31 */                 \
 339                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 340                    "LD_REGS",   /* r16 - r31 */                 \
 341                    "NO_LD_REGS", /* r0 - r15 */                 \
 342                    "GENERAL_REGS", /* r0 - r31 */               \
 343                    "ALL_REGS" }
 344
 345 #define REG_CLASS_CONTENTS {                                            \
 346   {0x00000000,0x00000000},      /* NO_REGS */                           \
 347   {0x00000001,0x00000000},      /* R0_REG */                            \
 348   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 349   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 350   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 351   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 352   {(3 << REG_Y) | (3 << REG_Z),                                         \
 353      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 354   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 355      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 356   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 357      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 358   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 359   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 360      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 361   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 362   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 363   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 364 }
 365
 366 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 367
 368 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 369   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 370
 371 #define INDEX_REG_CLASS NO_REGS
 372
 373 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 374   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 375
 376 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 377
 378 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 379
 380 #define STACK_PUSH_CODE POST_DEC
 381
 382 #define STACK_GROWS_DOWNWARD
 383
 384 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 385
 386 #define STACK_POINTER_OFFSET 1
 387
 388 #define FIRST_PARM_OFFSET(FUNDECL) 0
 389
 390 #define STACK_BOUNDARY 8
 391
 392 #define STACK_POINTER_REGNUM 32
 393
 394 #define FRAME_POINTER_REGNUM REG_Y
 395
 396 #define ARG_POINTER_REGNUM 34
 397
 398 #define STATIC_CHAIN_REGNUM 2
 399
 400 #define ELIMINABLE_REGS {                                       \
 401       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 402         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 403        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 404
 405 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 406   OFFSET = avr_initial_elimination_offset (FROM, TO)
 407
 408 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 409
 410 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 411    for POST_DEC targets (PR27386).  */
 412 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 413
 414 typedef struct avr_args {
 415   int nregs;                    /* # registers available for passing */
 416   int regno;                    /* next available register number */
 417 } CUMULATIVE_ARGS;
 418
 419 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 420   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 421
 422 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 423
 424 #define DEFAULT_PCC_STRUCT_RETURN 0
 425
 426 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 427
 428 #define HAVE_POST_INCREMENT 1
 429 #define HAVE_PRE_DECREMENT 1
 430
 431 #define MAX_REGS_PER_ADDRESS 1
 432
 433 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 434   do {                                                                  \
 435     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 436                                                ADDR_TYPE (TYPE),        \
 437                                                IND_L, make_memloc);     \
 438     if (new_x)                                                          \
 439       {                                                                 \
 440         X = new_x;                                                      \
 441         goto WIN;                                                       \
 442       }                                                                 \
 443   } while (0)
 444
 445 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 446
 447 #define SLOW_BYTE_ACCESS 0
 448
 449 #define NO_FUNCTION_CSE
 450
 451 #define REGISTER_TARGET_PRAGMAS()                                       \
 452   do {                                                                  \
 453     avr_register_target_pragmas();                                      \
 454   } while (0)
 455
 456 #define TEXT_SECTION_ASM_OP "\t.text"
 457
 458 #define DATA_SECTION_ASM_OP "\t.data"
 459
 460 #define BSS_SECTION_ASM_OP "\t.section .bss"
 461
 462 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 463    There are no shared libraries on this target, and these sections are
 464    placed in the read-only program memory, so they are not writable.  */
 465
 466 #undef CTORS_SECTION_ASM_OP
 467 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 468
 469 #undef DTORS_SECTION_ASM_OP
 470 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 471
 472 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 473
 474 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 475
 476 #define SUPPORTS_INIT_PRIORITY 0
 477
 478 #define JUMP_TABLES_IN_TEXT_SECTION 0
 479
 480 #define ASM_COMMENT_START " ; "
 481
 482 #define ASM_APP_ON "/* #APP */\n"
 483
 484 #define ASM_APP_OFF "/* #NOAPP */\n"
 485
 486 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 487
 488 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 489   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 490
 491 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 492   asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
 493
 494 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 495   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 496
 497 /* Globalizing directive for a label.  */
 498 #define GLOBAL_ASM_OP ".global\t"
 499
 500 #define SUPPORTS_WEAK 1
 501
 502 #define HAS_INIT_SECTION 1
 503
 504 #define REGISTER_NAMES {                                \
 505   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 506     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 507     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 508     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 509     "__SP_L__","__SP_H__","argL","argH"}
 510
 511 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
 512
 513 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 514 {                                               \
 515   gcc_assert (REGNO < 32);                      \
 516   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 517 }
 518
 519 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 520 {                                               \
 521   gcc_assert (REGNO < 32);                      \
 522   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 523 }
 524
 525 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
 526   avr_output_addr_vec_elt(STREAM, VALUE)
 527
 528 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 529   do {                                                  \
 530       if ((POWER) > 1)                                  \
 531           fprintf (STREAM, "\t.p2align\t%d\n", POWER);  \
 532   } while (0)
 533
 534 #define CASE_VECTOR_MODE HImode
 535
 536 #undef WORD_REGISTER_OPERATIONS
 537
 538 #define MOVE_MAX 4
 539
 540 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 541
 542 #define Pmode HImode
 543
 544 #define FUNCTION_MODE HImode
 545
 546 #define DOLLARS_IN_IDENTIFIERS 0
 547
 548 #define TRAMPOLINE_SIZE 4
 549
 550 /* Store in cc_status the expressions
 551    that the condition codes will describe
 552    after execution of an instruction whose pattern is EXP.
 553    Do not alter them if the instruction would not alter the cc's.  */
 554
 555 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 556
 557 /* The add insns don't set overflow in a usable way.  */
 558 #define CC_OVERFLOW_UNUSABLE 01000
 559 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 560    Z bit is all we need when doing unsigned comparisons on the result of
 561    these insns (since they're always with 0).  However, conditions.h has
 562    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 563    understandable.  */
 564 #define CC_NO_CARRY CC_NO_OVERFLOW
 565
 566
 567 /* Output assembler code to FILE to increment profiler label # LABELNO
 568    for profiling a function entry.  */
 569
 570 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 571   fprintf (FILE, "/* profiler %d */", (LABELNO))
 572
 573 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
 574                                           adjust_insn_length (INSN, LENGTH))
 575
 576 extern const char *avr_device_to_arch (int argc, const char **argv);
 577 extern const char *avr_device_to_data_start (int argc, const char **argv);
 578 extern const char *avr_device_to_startfiles (int argc, const char **argv);
 579 extern const char *avr_device_to_devicelib (int argc, const char **argv);
 580
 581 #define EXTRA_SPEC_FUNCTIONS \
 582   { "device_to_arch", avr_device_to_arch }, \
 583   { "device_to_data_start", avr_device_to_data_start }, \
 584   { "device_to_startfile", avr_device_to_startfiles }, \
 585   { "device_to_devicelib", avr_device_to_devicelib },
 586
 587 #define CPP_SPEC ""
 588
 589 #define CC1_SPEC ""
 590
 591 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 592     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 593     %{!fexceptions:-fno-exceptions}"
 594 /* A C string constant that tells the GCC driver program options to
 595    pass to `cc1plus'.  */
 596
 597 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 598 mmcu=*:-mmcu=%*} \
 599 %{mmcu=*:%{!mmcu=avr2:%{!mmcu=at90s8515:%{!mmcu=avr31:%{!mmcu=atmega103:\
 600 -mno-skip-bug}}}}}"
 601
 602 #define LINK_SPEC "\
 603 %{mrelax:--relax\
 604          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 605                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 606                              %{mmcu=atmega32*|\
 607                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 608                              %{mmcu=atmega64*|\
 609                                mmcu=at90can64*|\
 610                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 611 %:device_to_arch(%{mmcu=*:%*})\
 612 %:device_to_data_start(%{mmcu=*:%*})"
 613
 614 #define LIB_SPEC \
 615   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 616
 617 #define LIBSTDCXX "gcc"
 618 /* No libstdc++ for now.  Empty string doesn't work.  */
 619
 620 #define LIBGCC_SPEC \
 621   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 622
 623 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
 624
 625 #define ENDFILE_SPEC ""
 626
 627 /* This is the default without any -mmcu=* option (AT90S*).  */
 628 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 629
 630 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 631   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 632
 633 #define CR_TAB "\n\t"
 634
 635 #define DWARF2_ADDR_SIZE 4
 636
 637 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 638 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 639
 640 /* The caller's stack pointer value immediately before the call
 641    is one byte below the first argument.  */
 642 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 643
 644 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 645   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 646
 647 /* A C structure for machine-specific, per-function data.
 648    This is added to the cfun structure.  */
 649 struct GTY(()) machine_function
 650 {
 651   /* 'true' - if current function is a naked function.  */
 652   int is_naked;
 653
 654   /* 'true' - if current function is an interrupt function
 655      as specified by the "interrupt" attribute.  */
 656   int is_interrupt;
 657
 658   /* 'true' - if current function is a signal function
 659      as specified by the "signal" attribute.  */
 660   int is_signal;
 661
 662   /* 'true' - if current function is a 'task' function
 663      as specified by the "OS_task" attribute.  */
 664   int is_OS_task;
 665
 666   /* 'true' - if current function is a 'main' function
 667      as specified by the "OS_main" attribute.  */
 668   int is_OS_main;
 669
 670   /* Current function stack size.  */
 671   int stack_usage;
 672
 673   /* 'true' if a callee might be tail called */
 674   int sibcall_fails;
 675 };
 676
 677 /* AVR does not round pushes, but the existance of this macro is
 678    required in order for pushes to be generated.  */
 679 #define PUSH_ROUNDING(X)        (X)
 680
 681 /* Define prototype here to avoid build warning.  Some files using
 682    ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
 683    tm.h but not tm_p.h.  */
 684 extern int avr_accumulate_outgoing_args (void);
 685 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 686
 687 #define INIT_EXPANDERS avr_init_expanders()