gcc/config/bfin/bfin.h

   1 /* Definitions for the Blackfin port.
   2    Copyright (C) 2005  Free Software Foundation, Inc.
   3    Contributed by Analog Devices.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 2, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING.  If not, write to
  19    the Free Software Foundation, 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #ifndef _BFIN_CONFIG
  23 #define _BFIN_CONFIG
  24
  25 #define OBJECT_FORMAT_ELF
  26
  27 #define BRT 1
  28 #define BRF 0
  29
  30 /* Print subsidiary information on the compiler version in use.  */
  31 #define TARGET_VERSION fprintf (stderr, " (BlackFin bfin)")
  32
  33 /* Run-time compilation parameters selecting different hardware subsets.  */
  34
  35 extern int target_flags;
  36
  37 /* Predefinition in the preprocessor for this target machine */
  38 #ifndef TARGET_CPU_CPP_BUILTINS
  39 #define TARGET_CPU_CPP_BUILTINS()               \
  40   do                                            \
  41     {                                           \
  42       builtin_define ("bfin");                  \
  43       builtin_define ("BFIN");                  \
  44     }                                           \
  45   while (0)
  46 #endif
  47
  48 /* Generate DSP instructions, like DSP halfword loads */
  49 #define TARGET_DSP                      (1)
  50
  51 #define TARGET_DEFAULT MASK_CSYNC
  52
  53 /* This macro is similar to `TARGET_SWITCHES' but defines names of
  54    command options that have values.  Its definition is an
  55    initializer with a subgrouping for each command option.
  56
  57    Each subgrouping contains a string constant, that defines the
  58    fixed part of the option name, and the address of a variable.  The
  59    variable, type `char *', is set to the variable part of the given
  60    option if the fixed part matches.  The actual option name is made
  61    by appending `-m' to the specified name.  */
  62 #define TARGET_OPTIONS                                                  \
  63 { { "shared-library-id=",       &bfin_library_id_string,                \
  64     "ID of shared library to build", 0}                                 \
  65 }
  66
  67 /* Maximum number of library ids we permit */
  68 #define MAX_LIBRARY_ID 255
  69
  70 extern const char *bfin_library_id_string;
  71
  72 /* Sometimes certain combinations of command options do not make
  73    sense on a particular target machine.  You can define a macro
  74    `OVERRIDE_OPTIONS' to take account of this.  This macro, if
  75    defined, is executed once just after all the command options have
  76    been parsed.
  77
  78    Don't use this macro to turn on various extra optimizations for
  79    `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.  */
  80
  81 #define OVERRIDE_OPTIONS override_options ()
  82
  83 #define FUNCTION_MODE    SImode
  84 #define Pmode            SImode
  85
  86 /* store-condition-codes instructions store 0 for false
  87    This is the value stored for true.  */
  88 #define STORE_FLAG_VALUE 1
  89
  90 /* Define this if pushing a word on the stack
  91    makes the stack pointer a smaller address.  */
  92 #define STACK_GROWS_DOWNWARD
  93
  94 #define STACK_PUSH_CODE PRE_DEC
  95
  96 /* Define this if the nominal address of the stack frame
  97    is at the high-address end of the local variables;
  98    that is, each additional local variable allocated
  99    goes at a more negative offset in the frame.  */
 100 #define FRAME_GROWS_DOWNWARD
 101
 102 /* We define a dummy ARGP register; the parameters start at offset 0 from
 103    it. */
 104 #define FIRST_PARM_OFFSET(DECL) 0
 105
 106 /* Offset within stack frame to start allocating local variables at.
 107    If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
 108    first local allocated.  Otherwise, it is the offset to the BEGINNING
 109    of the first local allocated.  */
 110 #define STARTING_FRAME_OFFSET 0
 111
 112 /* Register to use for pushing function arguments.  */
 113 #define STACK_POINTER_REGNUM REG_P6
 114
 115 /* Base register for access to local variables of the function.  */
 116 #define FRAME_POINTER_REGNUM REG_P7
 117
 118 /* A dummy register that will be eliminated to either FP or SP.  */
 119 #define ARG_POINTER_REGNUM REG_ARGP
 120
 121 /* `PIC_OFFSET_TABLE_REGNUM'
 122      The register number of the register used to address a table of
 123      static data addresses in memory.  In some cases this register is
 124      defined by a processor's "application binary interface" (ABI).
 125      When this macro is defined, RTL is generated for this register
 126      once, as with the stack pointer and frame pointer registers.  If
 127      this macro is not defined, it is up to the machine-dependent files
 128      to allocate such a register (if necessary). */
 129 #define PIC_OFFSET_TABLE_REGNUM (REG_P5)
 130
 131 /* A static chain register for nested functions.  We need to use a
 132    call-clobbered register for this.  */
 133 #define STATIC_CHAIN_REGNUM REG_P2
 134
 135 /* Define this if functions should assume that stack space has been
 136    allocated for arguments even when their values are passed in
 137    registers.
 138
 139    The value of this macro is the size, in bytes, of the area reserved for
 140    arguments passed in registers.
 141
 142    This space can either be allocated by the caller or be a part of the
 143    machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
 144    says which.  */
 145 #define FIXED_STACK_AREA 12
 146 #define REG_PARM_STACK_SPACE(FNDECL) FIXED_STACK_AREA
 147
 148 /* Define this if the above stack space is to be considered part of the
 149  * space allocated by the caller.  */
 150 #define OUTGOING_REG_PARM_STACK_SPACE
 151
 152 /* Define this if the maximum size of all the outgoing args is to be
 153    accumulated and pushed during the prologue.  The amount can be
 154    found in the variable current_function_outgoing_args_size. */
 155 #define ACCUMULATE_OUTGOING_ARGS 1
 156
 157 /* Value should be nonzero if functions must have frame pointers.
 158    Zero means the frame pointer need not be set up (and parms
 159    may be accessed via the stack pointer) in functions that seem suitable.
 160    This is computed in `reload', in reload1.c.
 161 */
 162 #define FRAME_POINTER_REQUIRED (bfin_frame_pointer_required ())
 163
 164 #define PARM_BOUNDRY            32
 165
 166 #define STACK_BOUNDRY           32
 167
 168 /*#define DATA_ALIGNMENT(TYPE, BASIC-ALIGN) for arrays.. */
 169
 170 /* Make strings word-aligned so strcpy from constants will be faster.  */
 171 #define CONSTANT_ALIGNMENT(EXP, ALIGN)  \
 172   (TREE_CODE (EXP) == STRING_CST        \
 173    && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
 174
 175 #define TRAMPOLINE_SIZE 18
 176 #define TRAMPOLINE_TEMPLATE(FILE)                                       \
 177   fprintf(FILE, "\t.dd\t0x0000e109\n"); /* p1.l = fn low */             \
 178   fprintf(FILE, "\t.dd\t0x0000e149\n"); /* p1.h = fn high */;           \
 179   fprintf(FILE, "\t.dd\t0x0000e10a\n"); /* p2.l = sc low */;            \
 180   fprintf(FILE, "\t.dd\t0x0000e14a\n"); /* p2.h = sc high */;           \
 181   fprintf(FILE, "\t.dw\t0x0051\n"); /* jump (p1)*/
 182
 183 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
 184   initialize_trampoline (TRAMP, FNADDR, CXT)
 185 \f
 186 /* Definitions for register eliminations.
 187
 188    This is an array of structures.  Each structure initializes one pair
 189    of eliminable registers.  The "from" register number is given first,
 190    followed by "to".  Eliminations of the same "from" register are listed
 191    in order of preference.
 192
 193    There are two registers that can always be eliminated on the i386.
 194    The frame pointer and the arg pointer can be replaced by either the
 195    hard frame pointer or to the stack pointer, depending upon the
 196    circumstances.  The hard frame pointer is not used before reload and
 197    so it is not eligible for elimination.  */
 198
 199 #define ELIMINABLE_REGS                         \
 200 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},   \
 201  { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},   \
 202  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} \
 203
 204 /* Given FROM and TO register numbers, say whether this elimination is
 205    allowed.  Frame pointer elimination is automatically handled.
 206
 207    All other eliminations are valid.  */
 208
 209 #define CAN_ELIMINATE(FROM, TO) \
 210   ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
 211
 212 /* Define the offset between two registers, one to be eliminated, and the other
 213    its replacement, at the start of a routine.  */
 214
 215 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 216   ((OFFSET) = bfin_initial_elimination_offset ((FROM), (TO)))
 217 \f
 218 /* This processor has
 219    8 data register for doing arithmetic
 220    8  pointer register for doing addressing, including
 221       1  stack pointer P6
 222       1  frame pointer P7
 223    4 sets of indexing registers (I0-3, B0-3, L0-3, M0-3)
 224    1  condition code flag register CC
 225    5  return address registers RETS/I/X/N/E
 226    1  arithmetic status register (ASTAT).  */
 227
 228 #define FIRST_PSEUDO_REGISTER 44
 229
 230 #define PREG_P(X) (REG_P (X) && REGNO (X) >= REG_P0 && REGNO (X) <= REG_P7)
 231 #define ADDRESS_REGNO_P(X) ((X) >= REG_P0 && (X) <= REG_M3)
 232 #define D_REGNO_P(X) ((X) <= REG_R7)
 233
 234 #define REGISTER_NAMES { \
 235   "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", \
 236   "P0", "P1", "P2", "P3", "P4", "P5", "SP", "FP", \
 237   "I0", "B0", "L0", "I1", "B1", "L1", "I2", "B2", \
 238   "L2", "I3", "B3", "L3", "M0", "M1", "M2", "M3", \
 239   "A0", "A1", \
 240   "CC", \
 241   "RETS", "RETI", "RETX", "RETN", "RETE", "ASTAT", "SEQSTAT", "USP", \
 242   "ARGP" \
 243 }
 244
 245 #define SHORT_REGISTER_NAMES { \
 246         "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L", \
 247         "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L", \
 248         "I0.L", "B0.L", "L0.L", "I1.L", "B1.L", "L1.L", "I2.L", "B2.L", \
 249         "L2.L", "I3.L", "B3.L", "L3.L", "M0.L", "M1.L", "M2.L", "M3.L", }
 250
 251 #define HIGH_REGISTER_NAMES { \
 252         "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H", \
 253         "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H", \
 254         "I0.H", "B0.H", "L0.H", "I1.H", "B1.H", "L1.H", "I2.H", "B2.H", \
 255         "L2.H", "I3.H", "B3.H", "L3.H", "M0.H", "M1.H", "M2.H", "M3.H", }
 256
 257 #define DREGS_PAIR_NAMES { \
 258   "R1:0.p", 0, "R3:2.p", 0, "R5:4.p", 0, "R7:6.p", 0,  }
 259
 260 #define BYTE_REGISTER_NAMES { \
 261   "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B",  }
 262
 263
 264 /* 1 for registers that have pervasive standard uses
 265    and are not available for the register allocator.  */
 266
 267 #define FIXED_REGISTERS \
 268 /*r0 r1 r2 r3 r4 r5 r6 r7   p0 p1 p2 p3 p4 p5 p6 p7 */ \
 269 { 0, 0, 0, 0, 0, 0, 0, 0,   0, 0, 0, 0, 0, 0, 1, 0,    \
 270 /*i0 b0 l0 i1 b1 l1 i2 b2   l2 i3 b3 l3 m0 m1 m2 m3 */ \
 271   0, 0, 1, 0, 0, 1, 0, 0,   1, 0, 0, 1, 0, 0, 0, 0,    \
 272 /*a0 a1 cc rets/i/x/n/e     astat seqstat usp argp */ \
 273   0, 0, 1, 1, 1, 1, 1, 1,   1, 1, 1, 1   \
 274 }
 275
 276 /* 1 for registers not available across function calls.
 277    These must include the FIXED_REGISTERS and also any
 278    registers that can be used without being saved.
 279    The latter must include the registers where values are returned
 280    and the register where structure-value addresses are passed.
 281    Aside from that, you can include as many other registers as you like.  */
 282
 283 #define CALL_USED_REGISTERS \
 284 /*r0 r1 r2 r3 r4 r5 r6 r7   p0 p1 p2 p3 p4 p5 p6 p7 */ \
 285 { 1, 1, 1, 1, 0, 0, 0, 0,   1, 1, 1, 0, 0, 0, 1, 0, \
 286 /*i0 b0 l0 i1 b1 l1 i2 b2   l2 i3 b3 l3 m0 m1 m2 m3 */ \
 287   1, 1, 1, 1, 1, 1, 1, 1,   1, 1, 1, 1, 1, 1, 1, 1,   \
 288 /*a0 a1 cc rets/i/x/n/e     astat seqstat usp argp */ \
 289   1, 1, 1, 1, 1, 1, 1, 1,   1, 1, 1, 1   \
 290 }
 291
 292 /* Order in which to allocate registers.  Each register must be
 293    listed once, even those in FIXED_REGISTERS.  List frame pointer
 294    late and fixed registers last.  Note that, in general, we prefer
 295    registers listed in CALL_USED_REGISTERS, keeping the others
 296    available for storage of persistent values. */
 297
 298 #define REG_ALLOC_ORDER \
 299 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
 300   REG_P2, REG_P1, REG_P0, REG_P5, REG_P4, REG_P3, REG_P6, REG_P7, \
 301   REG_A0, REG_A1, \
 302   REG_I0, REG_B0, REG_L0, REG_I1, REG_B1, REG_L1, REG_I2, REG_B2, \
 303   REG_L2, REG_I3, REG_B3, REG_L3, REG_M0, REG_M1, REG_M2, REG_M3, \
 304   REG_RETS, REG_RETI, REG_RETX, REG_RETN, REG_RETE,               \
 305   REG_ASTAT, REG_SEQSTAT, REG_USP,                                \
 306   REG_CC, REG_ARGP                                                \
 307 }
 308
 309 /* Macro to conditionally modify fixed_regs/call_used_regs.  */
 310 #define CONDITIONAL_REGISTER_USAGE                      \
 311   {                                                     \
 312     conditional_register_usage();                       \
 313     if (flag_pic)                                       \
 314       {                                                 \
 315         fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;        \
 316         call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;    \
 317       }                                                 \
 318   }
 319
 320 /* Define the classes of registers for register constraints in the
 321    machine description.  Also define ranges of constants.
 322
 323    One of the classes must always be named ALL_REGS and include all hard regs.
 324    If there is more than one class, another class must be named NO_REGS
 325    and contain no registers.
 326
 327    The name GENERAL_REGS must be the name of a class (or an alias for
 328    another name such as ALL_REGS).  This is the class of registers
 329    that is allowed by "g" or "r" in a register constraint.
 330    Also, registers outside this class are allocated only when
 331    instructions express preferences for them.
 332
 333    The classes must be numbered in nondecreasing order; that is,
 334    a larger-numbered class must never be contained completely
 335    in a smaller-numbered class.
 336
 337    For any two classes, it is very desirable that there be another
 338    class that represents their union. */
 339
 340
 341 enum reg_class
 342 {
 343   NO_REGS,
 344   IREGS,
 345   BREGS,
 346   LREGS,
 347   MREGS,
 348   CIRCREGS, /* Circular buffering registers, Ix, Bx, Lx together form. See Automatic Circlur Buffering */
 349   DAGREGS,
 350   EVEN_AREGS,
 351   ODD_AREGS,
 352   AREGS,
 353   CCREGS,
 354   EVEN_DREGS,
 355   ODD_DREGS,
 356   DREGS,
 357   PREGS_CLOBBERED,
 358   PREGS,
 359   DPREGS,
 360   MOST_REGS,
 361   PROLOGUE_REGS,
 362   NON_A_CC_REGS,
 363   ALL_REGS, LIM_REG_CLASSES
 364 };
 365
 366 #define N_REG_CLASSES ((int)LIM_REG_CLASSES)
 367
 368 #define GENERAL_REGS DPREGS
 369
 370 /* Give names of register classes as strings for dump file.   */
 371
 372 #define REG_CLASS_NAMES \
 373 {  "NO_REGS",           \
 374    "IREGS",             \
 375    "BREGS",             \
 376    "LREGS",             \
 377    "MREGS",             \
 378    "CIRCREGS",          \
 379    "DAGREGS",           \
 380    "EVEN_AREGS",        \
 381    "ODD_AREGS",         \
 382    "AREGS",             \
 383    "CCREGS",            \
 384    "EVEN_DREGS",        \
 385    "ODD_DREGS",         \
 386    "DREGS",             \
 387    "PREGS_CLOBBERED",   \
 388    "PREGS",             \
 389    "DPREGS",            \
 390    "MOST_REGS",         \
 391    "PROLOGUE_REGS",     \
 392    "NON_A_CC_REGS",     \
 393    "ALL_REGS" }
 394
 395 /* An initializer containing the contents of the register classes, as integers
 396    which are bit masks.  The Nth integer specifies the contents of class N.
 397    The way the integer MASK is interpreted is that register R is in the class
 398    if `MASK & (1 << R)' is 1.
 399
 400    When the machine has more than 32 registers, an integer does not suffice.
 401    Then the integers are replaced by sub-initializers, braced groupings
 402    containing several integers.  Each sub-initializer must be suitable as an
 403    initializer for the type `HARD_REG_SET' which is defined in
 404    `hard-reg-set.h'.  */
 405
 406 /* NOTE: DSP registers, IREGS - AREGS, are not GENERAL_REGS.  We use
 407    MOST_REGS as the union of DPREGS and DAGREGS.  */
 408
 409 #define REG_CLASS_CONTENTS \
 410     /* 31 - 0       63-32   */ \
 411 {   { 0x00000000,    0 },               /* NO_REGS */   \
 412     { 0x02490000,    0 },               /* IREGS */     \
 413     { 0x04920000,    0 },               /* BREGS */             \
 414     { 0x09240000,    0 },               /* LREGS */     \
 415     { 0xf0000000,    0 },               /* MREGS */   \
 416     { 0x0fff0000,    0 },               /* CIRCREGS */   \
 417     { 0xffff0000,    0 },               /* DAGREGS */   \
 418     { 0x00000000,    0x1 },             /* EVEN_AREGS */   \
 419     { 0x00000000,    0x2 },             /* ODD_AREGS */   \
 420     { 0x00000000,    0x3 },             /* AREGS */   \
 421     { 0x00000000,    0x4 },             /* CCREGS */  \
 422     { 0x00000055,    0 },               /* EVEN_DREGS */   \
 423     { 0x000000aa,    0 },               /* ODD_DREGS */   \
 424     { 0x000000ff,    0 },               /* DREGS */   \
 425     { 0x00004700,    0x800 },           /* PREGS_CLOBBERED */   \
 426     { 0x0000ff00,    0x800 },           /* PREGS */   \
 427     { 0x0000ffff,    0x800 },           /* DPREGS */   \
 428     { 0xffffffff,    0x800 },           /* MOST_REGS */\
 429     { 0x00000000,    0x7f8 },           /* PROLOGUE_REGS */\
 430     { 0xffffffff,    0xff8 },           /* NON_A_CC_REGS */\
 431     { 0xffffffff,    0xfff }}           /* ALL_REGS */
 432
 433 #define BASE_REG_CLASS          PREGS
 434 #define INDEX_REG_CLASS         PREGS
 435
 436 #define REGNO_OK_FOR_BASE_STRICT_P(X) (REGNO_REG_CLASS (X) == BASE_REG_CLASS)
 437 #define REGNO_OK_FOR_BASE_NONSTRICT_P(X)  \
 438  (((X) >= FIRST_PSEUDO_REGISTER) || REGNO_REG_CLASS (X) == BASE_REG_CLASS)
 439
 440 #ifdef REG_OK_STRICT
 441 #define REGNO_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_STRICT_P (X)
 442 #else
 443 #define REGNO_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_NONSTRICT_P (X)
 444 #endif
 445
 446 #define REG_OK_FOR_BASE_P(X)    (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
 447 #define REG_OK_FOR_INDEX_P(X)   0
 448 #define REGNO_OK_FOR_INDEX_P(X)   0
 449
 450 /* Get reg_class from a letter such as appears in the machine description.  */
 451
 452 #define REG_CLASS_FROM_LETTER(LETTER)   \
 453   ((LETTER) == 'a' ? PREGS :            \
 454    (LETTER) == 'd' ? DREGS :            \
 455    (LETTER) == 'z' ? PREGS_CLOBBERED :  \
 456    (LETTER) == 'D' ? EVEN_DREGS :       \
 457    (LETTER) == 'W' ? ODD_DREGS :        \
 458    (LETTER) == 'e' ? AREGS :            \
 459    (LETTER) == 'A' ? EVEN_AREGS :       \
 460    (LETTER) == 'B' ? ODD_AREGS :        \
 461    (LETTER) == 'b' ? IREGS :            \
 462    (LETTER) == 'B' ? BREGS :            \
 463    (LETTER) == 'f' ? MREGS :            \
 464    (LETTER) == 'c' ? CIRCREGS :         \
 465    (LETTER) == 'C' ? CCREGS :           \
 466    (LETTER) == 'x' ? MOST_REGS :        \
 467    (LETTER) == 'y' ? PROLOGUE_REGS :    \
 468    (LETTER) == 'w' ? NON_A_CC_REGS :    \
 469    NO_REGS)
 470
 471 /* The same information, inverted:
 472    Return the class number of the smallest class containing
 473    reg number REGNO.  This could be a conditional expression
 474    or could index an array.  */
 475
 476 #define REGNO_REG_CLASS(REGNO) \
 477  ((REGNO) < REG_P0 ? DREGS                              \
 478  : (REGNO) < REG_I0 ? PREGS                             \
 479  : (REGNO) == REG_ARGP ? BASE_REG_CLASS                 \
 480  : (REGNO) >= REG_I0 && (REGNO) <= REG_I3 ? IREGS       \
 481  : (REGNO) >= REG_L0 && (REGNO) <= REG_L3 ? LREGS       \
 482  : (REGNO) >= REG_B0 && (REGNO) <= REG_B3 ? BREGS       \
 483  : (REGNO) >= REG_M0 && (REGNO) <= REG_M3 ? MREGS       \
 484  : (REGNO) == REG_A0 || (REGNO) == REG_A1 ? AREGS       \
 485  : (REGNO) == REG_CC ? CCREGS                           \
 486  : (REGNO) >= REG_RETS ? PROLOGUE_REGS                  \
 487  : NO_REGS)
 488
 489 /* When defined, the compiler allows registers explicitly used in the
 490    rtl to be used as spill registers but prevents the compiler from
 491    extending the lifetime of these registers. */
 492 #define SMALL_REGISTER_CLASSES 1
 493
 494 #define CLASS_LIKELY_SPILLED_P(CLASS) \
 495     ((CLASS) == PREGS_CLOBBERED \
 496      || (CLASS) == PROLOGUE_REGS \
 497      || (CLASS) == CCREGS)
 498
 499 /* Do not allow to store a value in REG_CC for any mode */
 500 /* Do not allow to store value in pregs if mode is not SI*/
 501 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok((REGNO), (MODE))
 502
 503 /* Return the maximum number of consecutive registers
 504    needed to represent mode MODE in a register of class CLASS.  */
 505 #define CLASS_MAX_NREGS(CLASS, MODE)    \
 506   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 507
 508 #define HARD_REGNO_NREGS(REGNO, MODE) \
 509 ((MODE) == PDImode && ((REGNO) == REG_A0 || (REGNO) == REG_A1) \
 510  ? 1 : CLASS_MAX_NREGS (GENERAL_REGS, MODE))
 511
 512 /* A C expression that is nonzero if hard register TO can be
 513    considered for use as a rename register for FROM register */
 514 #define HARD_REGNO_RENAME_OK(FROM, TO) bfin_hard_regno_rename_ok (FROM, TO)
 515
 516 /* A C expression that is nonzero if it is desirable to choose
 517    register allocation so as to avoid move instructions between a
 518    value of mode MODE1 and a value of mode MODE2.
 519
 520    If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
 521    MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
 522    MODE2)' must be zero. */
 523 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
 524
 525 /* `PREFERRED_RELOAD_CLASS (X, CLASS)'
 526    A C expression that places additional restrictions on the register
 527    class to use when it is necessary to copy value X into a register
 528    in class CLASS.  The value is a register class; perhaps CLASS, or
 529    perhaps another, smaller class.  */
 530 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
 531
 532 #define  SECONDARY_OUTPUT_RELOAD_CLASS(class,mode,x) \
 533     secondary_output_reload_class(class,mode,x)
 534 #define  SECONDARY_INPUT_RELOAD_CLASS(class,mode,x)  \
 535     secondary_input_reload_class(class,mode,x)
 536
 537 /* Function Calling Conventions. */
 538
 539 /* The type of the current function; normal functions are of type
 540    SUBROUTINE.  */
 541 typedef enum {
 542   SUBROUTINE, INTERRUPT_HANDLER, EXCPT_HANDLER, NMI_HANDLER
 543 } e_funkind;
 544
 545 #define FUNCTION_ARG_REGISTERS { REG_R0, REG_R1, REG_R2, -1 }
 546
 547 typedef struct {
 548   int words;                    /* # words passed so far */
 549   int nregs;                    /* # registers available for passing */
 550   int *arg_regs;                /* array of register -1 terminated */
 551 } CUMULATIVE_ARGS;
 552
 553 /* Define where to put the arguments to a function.
 554    Value is zero to push the argument on the stack,
 555    or a hard register in which to store the argument.
 556
 557    MODE is the argument's machine mode.
 558    TYPE is the data type of the argument (as a tree).
 559     This is null for libcalls where that information may
 560     not be available.
 561    CUM is a variable of type CUMULATIVE_ARGS which gives info about
 562     the preceding args and about the function being called.
 563    NAMED is nonzero if this argument is a named parameter
 564     (otherwise it is an extra parameter matching an ellipsis).  */
 565
 566 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 567   (function_arg (&CUM, MODE, TYPE, NAMED))
 568
 569 #define FUNCTION_ARG_REGNO_P(REGNO) function_arg_regno_p (REGNO)
 570
 571
 572 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 573    for a call to a function whose data type is FNTYPE.
 574    For a library call, FNTYPE is 0.  */
 575 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT, N_NAMED_ARGS) \
 576   (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
 577
 578 /* Update the data in CUM to advance over an argument
 579    of mode MODE and data type TYPE.
 580    (TYPE is null for libcalls where that information may not be available.)  */
 581 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)    \
 582   (function_arg_advance (&CUM, MODE, TYPE, NAMED))
 583
 584 #define RETURN_POPS_ARGS(FDECL, FUNTYPE, STKSIZE) 0
 585
 586 /* Define how to find the value returned by a function.
 587    VALTYPE is the data type of the value (as a tree).
 588    If the precise function being called is known, FUNC is its FUNCTION_DECL;
 589    otherwise, FUNC is 0.
 590 */
 591
 592 #define VALUE_REGNO(MODE) (REG_R0)
 593
 594 #define FUNCTION_VALUE(VALTYPE, FUNC)           \
 595   gen_rtx_REG (TYPE_MODE (VALTYPE),             \
 596                VALUE_REGNO(TYPE_MODE(VALTYPE)))
 597
 598 /* Define how to find the value returned by a library function
 599    assuming the value has mode MODE.  */
 600
 601 #define LIBCALL_VALUE(MODE)  gen_rtx_REG (MODE, VALUE_REGNO(MODE))
 602
 603 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_R0)
 604
 605 #define DEFAULT_PCC_STRUCT_RETURN 0
 606 #define RETURN_IN_MEMORY(TYPE) bfin_return_in_memory(TYPE)
 607
 608 /* Before the prologue, the return address is in the RETS register.  */
 609 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, REG_RETS)
 610
 611 #define RETURN_ADDR_RTX(COUNT, FRAME) bfin_return_addr_rtx (COUNT)
 612
 613 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (REG_RETS)
 614
 615 /* Call instructions don't modify the stack pointer on the Blackfin.  */
 616 #define INCOMING_FRAME_SP_OFFSET 0
 617
 618 /* Describe how we implement __builtin_eh_return.  */
 619 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? (N) : INVALID_REGNUM)
 620 #define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, REG_P2)
 621 #define EH_RETURN_HANDLER_RTX \
 622     gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, UNITS_PER_WORD))
 623
 624 /* Addressing Modes */
 625
 626 /* Recognize any constant value that is a valid address.  */
 627 #define CONSTANT_ADDRESS_P(X)   (CONSTANT_P (X))
 628
 629 /* Nonzero if the constant value X is a legitimate general operand.
 630    symbol_ref are not legitimate and will be put into constant pool.
 631    See force_const_mem().
 632    If -mno-pool, all constants are legitimate.
 633  */
 634 #define LEGITIMATE_CONSTANT_P(x) 1
 635
 636 /*   A number, the maximum number of registers that can appear in a
 637      valid memory address.  Note that it is up to you to specify a
 638      value equal to the maximum number that `GO_IF_LEGITIMATE_ADDRESS'
 639      would ever accept. */
 640 #define MAX_REGS_PER_ADDRESS 1
 641
 642 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
 643    that is a valid memory address for an instruction.
 644    The MODE argument is the machine mode for the MEM expression
 645    that wants to use this address.
 646
 647    Blackfin addressing modes are as follows:
 648
 649       [preg]
 650       [preg + imm16]
 651
 652       B [ Preg + uimm15 ]
 653       W [ Preg + uimm16m2 ]
 654       [ Preg + uimm17m4 ]
 655
 656       [preg++]
 657       [preg--]
 658       [--sp]
 659 */
 660
 661 #define LEGITIMATE_MODE_FOR_AUTOINC_P(MODE) \
 662       (GET_MODE_SIZE (MODE) <= 4 || (MODE) == PDImode)
 663
 664 #ifdef REG_OK_STRICT
 665 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)          \
 666   do {                                                  \
 667     if (bfin_legitimate_address_p (MODE, X, 1))         \
 668       goto WIN;                                         \
 669   } while (0);
 670 #else
 671 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)          \
 672   do {                                                  \
 673     if (bfin_legitimate_address_p (MODE, X, 0))         \
 674       goto WIN;                                         \
 675   } while (0);
 676 #endif
 677
 678 /* Try machine-dependent ways of modifying an illegitimate address
 679    to be legitimate.  If we find one, return the new, valid address.
 680    This macro is used in only one place: `memory_address' in explow.c.
 681
 682    OLDX is the address as it was before break_out_memory_refs was called.
 683    In some cases it is useful to look at this to decide what needs to be done.
 684
 685    MODE and WIN are passed so that this macro can use
 686    GO_IF_LEGITIMATE_ADDRESS.
 687
 688    It is always safe for this macro to do nothing.  It exists to recognize
 689    opportunities to optimize the output.
 690  */
 691 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)    \
 692 do {                                           \
 693    rtx _q = legitimize_address(X, OLDX, MODE); \
 694    if (_q) { X = _q; goto WIN; }               \
 695 } while (0)
 696
 697 #define HAVE_POST_INCREMENT 1
 698 #define HAVE_POST_DECREMENT 1
 699 #define HAVE_PRE_DECREMENT  1
 700
 701 /* `LEGITIMATE_PIC_OPERAND_P (X)'
 702      A C expression that is nonzero if X is a legitimate immediate
 703      operand on the target machine when generating position independent
 704      code.  You can assume that X satisfies `CONSTANT_P', so you need
 705      not check this.  You can also assume FLAG_PIC is true, so you need
 706      not check it either.  You need not define this macro if all
 707      constants (including `SYMBOL_REF') can be immediate operands when
 708      generating position independent code. */
 709 #define LEGITIMATE_PIC_OPERAND_P(X) ! SYMBOLIC_CONST (X)
 710
 711 #define SYMBOLIC_CONST(X)       \
 712 (GET_CODE (X) == SYMBOL_REF                                             \
 713  || GET_CODE (X) == LABEL_REF                                           \
 714  || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
 715
 716 /*
 717      A C statement or compound statement with a conditional `goto
 718      LABEL;' executed if memory address X (an RTX) can have different
 719      meanings depending on the machine mode of the memory reference it
 720      is used for or if the address is valid for some modes but not
 721      others.
 722
 723      Autoincrement and autodecrement addresses typically have
 724      mode-dependent effects because the amount of the increment or
 725      decrement is the size of the operand being addressed.  Some
 726      machines have other mode-dependent addresses.  Many RISC machines
 727      have no mode-dependent addresses.
 728
 729      You may assume that ADDR is a valid address for the machine.
 730 */
 731 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)  \
 732 do {                                              \
 733  if (GET_CODE (ADDR) == POST_INC                  \
 734      || GET_CODE (ADDR) == POST_DEC               \
 735      || GET_CODE (ADDR) == PRE_DEC)               \
 736    goto LABEL;                                    \
 737 } while (0)
 738
 739 #define NOTICE_UPDATE_CC(EXPR, INSN) 0
 740
 741 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 742    is done just by pretending it is already truncated.  */
 743 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 744
 745 /* Max number of bytes we can move from memory to memory
 746    in one reasonably fast instruction.  */
 747 #define MOVE_MAX UNITS_PER_WORD
 748
 749
 750 /* STORAGE LAYOUT: target machine storage layout
 751    Define this macro as a C expression which is nonzero if accessing
 752    less than a word of memory (i.e. a `char' or a `short') is no
 753    faster than accessing a word of memory, i.e., if such access
 754    require more than one instruction or if there is no difference in
 755    cost between byte and (aligned) word loads.
 756
 757    When this macro is not defined, the compiler will access a field by
 758    finding the smallest containing object; when it is defined, a
 759    fullword load will be used if alignment permits.  Unless bytes
 760    accesses are faster than word accesses, using word accesses is
 761    preferable since it may eliminate subsequent memory access if
 762    subsequent accesses occur to other fields in the same word of the
 763    structure, but to different bytes.  */
 764 #define SLOW_BYTE_ACCESS  0
 765 #define SLOW_SHORT_ACCESS 0
 766
 767 /* Define this if most significant bit is lowest numbered
 768    in instructions that operate on numbered bit-fields. */
 769 #define BITS_BIG_ENDIAN  0
 770
 771 /* Define this if most significant byte of a word is the lowest numbered.
 772    We can't access bytes but if we could we would in the Big Endian order. */
 773 #define BYTES_BIG_ENDIAN 0
 774
 775 /* Define this if most significant word of a multiword number is numbered. */
 776 #define WORDS_BIG_ENDIAN 0
 777
 778 /* number of bits in an addressable storage unit */
 779 #define BITS_PER_UNIT 8
 780
 781 /* Width in bits of a "word", which is the contents of a machine register.
 782    Note that this is not necessarily the width of data type `int';
 783    if using 16-bit ints on a 68000, this would still be 32.
 784    But on a machine with 16-bit registers, this would be 16.  */
 785 #define BITS_PER_WORD 32
 786
 787 /* Width of a word, in units (bytes).  */
 788 #define UNITS_PER_WORD 4
 789
 790 /* Size of a vector for autovectorization.  */
 791 #define UNITS_PER_SIMD_WORD 4
 792
 793 /* Width in bits of a pointer.
 794    See also the macro `Pmode1' defined below.  */
 795 #define POINTER_SIZE 32
 796
 797 /* Allocation boundary (in *bits*) for storing pointers in memory.  */
 798 #define POINTER_BOUNDARY 32
 799
 800 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
 801 #define PARM_BOUNDARY 32
 802
 803 /* Boundary (in *bits*) on which stack pointer should be aligned.  */
 804 #define STACK_BOUNDARY 32
 805
 806 /* Allocation boundary (in *bits*) for the code of a function.  */
 807 #define FUNCTION_BOUNDARY 32
 808
 809 /* Alignment of field after `int : 0' in a structure.  */
 810 #define EMPTY_FIELD_BOUNDARY BITS_PER_WORD
 811
 812 /* No data type wants to be aligned rounder than this.  */
 813 #define BIGGEST_ALIGNMENT 32
 814
 815 /* Define this if move instructions will actually fail to work
 816    when given unaligned data.  */
 817 #define STRICT_ALIGNMENT 1
 818
 819 /* (shell-command "rm c-decl.o stor-layout.o")
 820  *  never define PCC_BITFIELD_TYPE_MATTERS
 821  *  really cause some alignment problem
 822  */
 823
 824 #define UNITS_PER_FLOAT  ((FLOAT_TYPE_SIZE  + BITS_PER_UNIT - 1) / \
 825                            BITS_PER_UNIT)
 826
 827 #define UNITS_PER_DOUBLE ((DOUBLE_TYPE_SIZE + BITS_PER_UNIT - 1) / \
 828                            BITS_PER_UNIT)
 829
 830
 831 /* what is the 'type' of size_t */
 832 #define SIZE_TYPE "long unsigned int"
 833
 834 /* Define this as 1 if `char' should by default be signed; else as 0.  */
 835 #define DEFAULT_SIGNED_CHAR 1
 836 #define FLOAT_TYPE_SIZE BITS_PER_WORD
 837 #define SHORT_TYPE_SIZE 16
 838 #define CHAR_TYPE_SIZE  8
 839 #define INT_TYPE_SIZE   32
 840 #define LONG_TYPE_SIZE  32
 841 #define LONG_LONG_TYPE_SIZE 64
 842
 843 /* Note: Fix this to depend on target switch. -- lev */
 844
 845 /* Note: Try to implement double and force long double. -- tonyko
 846  * #define __DOUBLES_ARE_FLOATS__
 847  * #define DOUBLE_TYPE_SIZE FLOAT_TYPE_SIZE
 848  * #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
 849  * #define DOUBLES_ARE_FLOATS 1
 850  */
 851
 852 #define DOUBLE_TYPE_SIZE        64
 853 #define LONG_DOUBLE_TYPE_SIZE   64
 854
 855 /* `PROMOTE_MODE (M, UNSIGNEDP, TYPE)'
 856      A macro to update M and UNSIGNEDP when an object whose type is
 857      TYPE and which has the specified mode and signedness is to be
 858      stored in a register.  This macro is only called when TYPE is a
 859      scalar type.
 860
 861      On most RISC machines, which only have operations that operate on
 862      a full register, define this macro to set M to `word_mode' if M is
 863      an integer mode narrower than `BITS_PER_WORD'.  In most cases,
 864      only integer modes should be widened because wider-precision
 865      floating-point operations are usually more expensive than their
 866      narrower counterparts.
 867
 868      For most machines, the macro definition does not change UNSIGNEDP.
 869      However, some machines, have instructions that preferentially
 870      handle either signed or unsigned quantities of certain modes.  For
 871      example, on the DEC Alpha, 32-bit loads from memory and 32-bit add
 872      instructions sign-extend the result to 64 bits.  On such machines,
 873      set UNSIGNEDP according to which kind of extension is more
 874      efficient.
 875
 876      Do not define this macro if it would never modify M.*/
 877
 878 #define BFIN_PROMOTE_MODE_P(MODE) \
 879     (!TARGET_DSP && GET_MODE_CLASS (MODE) == MODE_INT   \
 880       && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)
 881
 882 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 883   if (BFIN_PROMOTE_MODE_P(MODE))                \
 884     {                                           \
 885       if (MODE == QImode)                       \
 886         UNSIGNEDP = 1;                          \
 887       else if (MODE == HImode)                  \
 888         UNSIGNEDP = 0;                          \
 889       (MODE) = SImode;                          \
 890     }
 891
 892 /* Describing Relative Costs of Operations */
 893
 894 /* Do not put function addr into constant pool */
 895 #define NO_FUNCTION_CSE 1
 896
 897 /* A C expression for the cost of moving data from a register in class FROM to
 898    one in class TO.  The classes are expressed using the enumeration values
 899    such as `GENERAL_REGS'.  A value of 2 is the default; other values are
 900    interpreted relative to that.
 901
 902    It is not required that the cost always equal 2 when FROM is the same as TO;
 903    on some machines it is expensive to move between registers if they are not
 904    general registers.  */
 905
 906 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
 907    bfin_register_move_cost ((MODE), (CLASS1), (CLASS2))
 908
 909 /* A C expression for the cost of moving data of mode M between a
 910    register and memory.  A value of 2 is the default; this cost is
 911    relative to those in `REGISTER_MOVE_COST'.
 912
 913    If moving between registers and memory is more expensive than
 914    between two registers, you should define this macro to express the
 915    relative cost.  */
 916
 917 #define MEMORY_MOVE_COST(MODE, CLASS, IN)       \
 918   bfin_memory_move_cost ((MODE), (CLASS), (IN))
 919
 920 /* Specify the machine mode that this machine uses
 921    for the index in the tablejump instruction.  */
 922 #define CASE_VECTOR_MODE SImode
 923
 924 #define JUMP_TABLES_IN_TEXT_SECTION flag_pic
 925
 926 /* Define if operations between registers always perform the operation
 927    on the full register even if a narrower mode is specified.
 928 #define WORD_REGISTER_OPERATIONS
 929 */
 930
 931 #define CONST_18UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 262140)
 932 #define CONST_16BIT_IMM_P(VALUE) ((VALUE) >= -32768 && (VALUE) <= 32767)
 933 #define CONST_16UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 65535)
 934 #define CONST_7BIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 63)
 935 #define CONST_7NBIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 0)
 936 #define CONST_5UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 31)
 937 #define CONST_4BIT_IMM_P(VALUE) ((VALUE) >= -8 && (VALUE) <= 7)
 938 #define CONST_4UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 15)
 939 #define CONST_3BIT_IMM_P(VALUE) ((VALUE) >= -4 && (VALUE) <= 3)
 940 #define CONST_3UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 7)
 941
 942 #define CONSTRAINT_LEN(C, STR)                  \
 943     ((C) == 'P' || (C) == 'M' || (C) == 'N' ? 2 \
 944      : (C) == 'K' ? 3                           \
 945      : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
 946
 947 #define CONST_OK_FOR_P(VALUE, STR)    \
 948     ((STR)[1] == '0' ? (VALUE) == 0   \
 949      : (STR)[1] == '1' ? (VALUE) == 1 \
 950      : (STR)[1] == '2' ? (VALUE) == 2 \
 951      : (STR)[1] == '3' ? (VALUE) == 3 \
 952      : (STR)[1] == '4' ? (VALUE) == 4 \
 953      : 0)
 954
 955 #define CONST_OK_FOR_K(VALUE, STR)                      \
 956     ((STR)[1] == 'u'                                    \
 957      ? ((STR)[2] == '3' ? CONST_3UBIT_IMM_P (VALUE)     \
 958         : (STR)[2] == '4' ? CONST_4UBIT_IMM_P (VALUE)   \
 959         : (STR)[2] == '5' ? CONST_5UBIT_IMM_P (VALUE)   \
 960         : (STR)[2] == 'h' ? CONST_16UBIT_IMM_P (VALUE)  \
 961         : 0)                                            \
 962      : (STR)[1] == 's'                                  \
 963      ? ((STR)[2] == '3' ? CONST_3BIT_IMM_P (VALUE)      \
 964         : (STR)[2] == '4' ? CONST_4BIT_IMM_P (VALUE)    \
 965         : (STR)[2] == '7' ? CONST_7BIT_IMM_P (VALUE)    \
 966         : (STR)[2] == 'h' ? CONST_16BIT_IMM_P (VALUE)   \
 967         : 0)                                            \
 968      : (STR)[1] == 'n'                                  \
 969      ? ((STR)[2] == '7' ? CONST_7NBIT_IMM_P (VALUE)     \
 970         : 0)                                            \
 971      : 0)
 972
 973 #define CONST_OK_FOR_M(VALUE, STR)                      \
 974     ((STR)[1] == '1' ? (VALUE) == 255                   \
 975      : (STR)[1] == '2' ? (VALUE) == 65535               \
 976      : 0)
 977
 978 /* The letters I, J, K, L and M in a register constraint string
 979    can be used to stand for particular ranges of immediate operands.
 980    This macro defines what the ranges are.
 981    C is the letter, and VALUE is a constant value.
 982    Return 1 if VALUE is in the range specified by C.
 983
 984    bfin constant operands are as follows
 985
 986      J   2**N       5bit imm scaled
 987      Ks7 -64 .. 63  signed 7bit imm
 988      Ku5 0..31      unsigned 5bit imm
 989      Ks4 -8 .. 7    signed 4bit imm
 990      Ks3 -4 .. 3    signed 3bit imm
 991      Ku3 0 .. 7     unsigned 3bit imm
 992      Pn  0, 1, 2    constants 0, 1 or 2, corresponding to n
 993 */
 994 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR)                \
 995   ((C) == 'J' ? (log2constp (VALUE))                            \
 996    : (C) == 'K' ? CONST_OK_FOR_K (VALUE, STR)                   \
 997    : (C) == 'L' ? log2constp (~(VALUE))                         \
 998    : (C) == 'M' ? CONST_OK_FOR_M (VALUE, STR)                   \
 999    : (C) == 'P' ? CONST_OK_FOR_P (VALUE, STR)                   \
1000    : 0)
1001
1002      /*Constant Output Formats */
1003 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)  \
1004   ((C) == 'H' ? 1 : 0)
1005
1006 #define EXTRA_CONSTRAINT(VALUE, D) \
1007     ((D) == 'Q' ? GET_CODE (VALUE) == SYMBOL_REF : 0)
1008
1009 /* `FINALIZE_PIC'
1010      By generating position-independent code, when two different
1011      programs (A and B) share a common library (libC.a), the text of
1012      the library can be shared whether or not the library is linked at
1013      the same address for both programs.  In some of these
1014      environments, position-independent code requires not only the use
1015      of different addressing modes, but also special code to enable the
1016      use of these addressing modes.
1017
1018      The `FINALIZE_PIC' macro serves as a hook to emit these special
1019      codes once the function is being compiled into assembly code, but
1020      not before.  (It is not done before, because in the case of
1021      compiling an inline function, it would lead to multiple PIC
1022      prologues being included in functions which used inline functions
1023      and were compiled to assembly language.) */
1024 #define FINALIZE_PIC  do {} while (0)
1025
1026 /* Switch into a generic section.  */
1027 #define TARGET_ASM_NAMED_SECTION  default_elf_asm_named_section
1028
1029 #define PRINT_OPERAND(FILE, RTX, CODE)   print_operand (FILE, RTX, CODE)
1030 #define PRINT_OPERAND_ADDRESS(FILE, RTX) print_address_operand (FILE, RTX)
1031
1032 typedef enum sections {
1033     CODE_DIR,
1034     DATA_DIR,
1035     LAST_SECT_NM
1036 } SECT_ENUM_T;
1037
1038 typedef enum directives {
1039     LONG_CONST_DIR,
1040     SHORT_CONST_DIR,
1041     BYTE_CONST_DIR,
1042     SPACE_DIR,
1043     INIT_DIR,
1044     LAST_DIR_NM
1045 } DIR_ENUM_T;
1046
1047 #define TEXT_SECTION_ASM_OP ".text;"
1048 #define DATA_SECTION_ASM_OP ".data;"
1049
1050 #define ASM_APP_ON  ""
1051 #define ASM_APP_OFF ""
1052
1053 #define ASM_GLOBALIZE_LABEL1(FILE, NAME) \
1054   do {  fputs (".global ", FILE);               \
1055         assemble_name (FILE, NAME);             \
1056         fputc (';',FILE);                       \
1057         fputc ('\n',FILE);                      \
1058       } while (0)
1059
1060 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1061   do {                                  \
1062     fputs (".type ", FILE);             \
1063     assemble_name (FILE, NAME);         \
1064     fputs (", STT_FUNC", FILE);         \
1065     fputc (';',FILE);                   \
1066     fputc ('\n',FILE);                  \
1067     ASM_OUTPUT_LABEL(FILE, NAME);       \
1068   } while (0)
1069
1070 #define ASM_OUTPUT_LABEL(FILE, NAME)    \
1071   do {  assemble_name (FILE, NAME);             \
1072         fputs (":\n",FILE);                     \
1073       } while (0)
1074
1075 #define ASM_OUTPUT_LABELREF(FILE,NAME)  \
1076     do {  fprintf (FILE, "_%s", NAME); \
1077         } while (0)
1078
1079 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)                  \
1080   do {                                                                  \
1081     int len = strlen (NAME);                                            \
1082     char *temp = (char *) alloca (len + 4);                             \
1083     temp[0] = 'L';                                                      \
1084     temp[1] = '_';                                                      \
1085     strcpy (&temp[2], (NAME));                                          \
1086     temp[len + 2] = '_';                                                \
1087     temp[len + 3] = 0;                                                  \
1088     (OUTPUT) = (char *) alloca (strlen (NAME) + 13);                    \
1089     sprintf (OUTPUT, "_%s$%d", temp, LABELNO);                          \
1090   } while (0)
1091
1092 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)            \
1093 do { char __buf[256];                                   \
1094      fprintf (FILE, "\t.dd\t");                         \
1095      ASM_GENERATE_INTERNAL_LABEL (__buf, "L", VALUE);   \
1096      assemble_name (FILE, __buf);                       \
1097      fputc (';', FILE);                                 \
1098      fputc ('\n', FILE);                                \
1099    } while (0)
1100
1101 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1102     MY_ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)
1103
1104 #define MY_ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL)           \
1105     do {                                                        \
1106         char __buf[256];                                        \
1107         fprintf (FILE, "\t.dd\t");                              \
1108         ASM_GENERATE_INTERNAL_LABEL (__buf, "L", VALUE);        \
1109         assemble_name (FILE, __buf);                            \
1110         fputs (" - ", FILE);                                    \
1111         ASM_GENERATE_INTERNAL_LABEL (__buf, "L", REL);          \
1112         assemble_name (FILE, __buf);                            \
1113         fputc (';', FILE);                                      \
1114         fputc ('\n', FILE);                                     \
1115     } while (0)
1116
1117 #define ASM_OUTPUT_ALIGN(FILE,LOG)                              \
1118     do {                                                        \
1119         fprintf (FILE, ".align %d\n", LOG);                     \
1120     } while (0)
1121
1122 #define ASM_OUTPUT_SKIP(FILE,SIZE)              \
1123     do {                                        \
1124         asm_output_skip (FILE, SIZE);           \
1125     } while (0)
1126
1127 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)     \
1128 do {                                            \
1129     data_section();                             \
1130     if ((SIZE) >= (unsigned int) 4 ) ASM_OUTPUT_ALIGN(FILE,2);  \
1131     ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE);               \
1132     ASM_OUTPUT_LABEL (FILE, NAME);                              \
1133     fprintf (FILE, "%s %ld;\n", ASM_SPACE,                      \
1134              (ROUNDED) > (unsigned int) 1 ? (ROUNDED) : 1);     \
1135 } while (0)
1136
1137 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)    \
1138      do {                                               \
1139         ASM_GLOBALIZE_LABEL1(FILE,NAME);                \
1140         ASM_OUTPUT_LOCAL (FILE, NAME, SIZE, ROUNDED); } while(0)
1141
1142 #define ASM_COMMENT_START "//"
1143
1144 #define FUNCTION_PROFILER(FILE, LABELNO) \
1145   do {\
1146     fprintf (FILE, "\tP1.l =LP$%d; P1.h =LP$%d; call mcount;\n", \
1147        LABELNO, LABELNO);\
1148   } while(0)
1149
1150 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) fprintf (FILE, "[SP--] = %s;\n", reg_names[REGNO])
1151 #define ASM_OUTPUT_REG_POP(FILE, REGNO)  fprintf (FILE, "%s = [SP++];\n", reg_names[REGNO])
1152
1153 extern struct rtx_def *bfin_compare_op0, *bfin_compare_op1;
1154 extern struct rtx_def *bfin_cc_rtx, *bfin_rets_rtx;
1155
1156 /* This works for GAS and some other assemblers.  */
1157 #define SET_ASM_OP              ".set "
1158
1159 /* Don't know how to order these.  UNALIGNED_WORD_ASM_OP is in
1160    dwarf2.out. */
1161 #define UNALIGNED_WORD_ASM_OP ".4byte"
1162
1163 /* DBX register number for a given compiler register number */
1164 #define DBX_REGISTER_NUMBER(REGNO)  (REGNO)
1165
1166 #define SIZE_ASM_OP     "\t.size\t"
1167
1168 #endif /*  _BFIN_CONFIG */