re PR target/17377 (cris.md bug in "return" pattern trigged by __builtin_return_address)
[gcc.git] / gcc / config / cris / cris.c
1 /* Definitions for GCC. Part of the machine description for CRIS.
2 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Axis Communications. Written by Hans-Peter Nilsson.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
27 #include "rtl.h"
28 #include "regs.h"
29 #include "hard-reg-set.h"
30 #include "real.h"
31 #include "insn-config.h"
32 #include "conditions.h"
33 #include "insn-attr.h"
34 #include "flags.h"
35 #include "tree.h"
36 #include "expr.h"
37 #include "except.h"
38 #include "function.h"
39 #include "toplev.h"
40 #include "recog.h"
41 #include "tm_p.h"
42 #include "debug.h"
43 #include "output.h"
44 #include "target.h"
45 #include "target-def.h"
46 #include "ggc.h"
47 #include "optabs.h"
48
49 /* Usable when we have an amount to add or subtract, and want the
50 optimal size of the insn. */
51 #define ADDITIVE_SIZE_MODIFIER(size) \
52 ((size) <= 63 ? "q" : (size) <= 255 ? "u.b" : (size) <= 65535 ? "u.w" : ".d")
53
54 #define ASSERT_PLT_UNSPEC(x) \
55 do \
56 { \
57 if (XEXP (x, 1) != NULL_RTX \
58 || (GET_CODE (XVECEXP (x, 0, 0)) != SYMBOL_REF \
59 && GET_CODE (XVECEXP (x, 0, 0)) != LABEL_REF)) \
60 abort (); \
61 } while (0)
62
63 #define LOSE_AND_RETURN(msgid, x) \
64 do \
65 { \
66 cris_operand_lossage (msgid, x); \
67 return; \
68 } while (0)
69
70 /* Per-function machine data. */
71 struct machine_function GTY(())
72 {
73 int needs_return_address_on_stack;
74 };
75
76 /* This little fix suppresses the 'u' or 's' when '%e' in assembly
77 pattern. */
78 static char cris_output_insn_is_bound = 0;
79
80 /* This one suppresses printing out the "rPIC+" in
81 "rPIC+sym:GOTOFF+offset" when doing PIC. For a PLT symbol, it
82 suppresses outputting it as [rPIC+sym:GOTPLT] and outputs similarly
83 just the "sym:GOTOFF" part. */
84 static int cris_pic_sympart_only = 0;
85
86 /* Fix for reg_overlap_mentioned_p. */
87 static int cris_reg_overlap_mentioned_p (rtx, rtx);
88
89 static void cris_print_base (rtx, FILE *);
90
91 static void cris_print_index (rtx, FILE *);
92
93 static struct machine_function * cris_init_machine_status (void);
94
95 static rtx cris_struct_value_rtx (tree, int);
96
97 static void cris_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
98 tree type, int *, int);
99
100 static int cris_initial_frame_pointer_offset (void);
101
102 static int saved_regs_mentioned (rtx);
103
104 static void cris_target_asm_function_prologue (FILE *, HOST_WIDE_INT);
105
106 static void cris_target_asm_function_epilogue (FILE *, HOST_WIDE_INT);
107
108 static void cris_operand_lossage (const char *, rtx);
109
110 static void cris_asm_output_mi_thunk
111 (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree);
112
113 static void cris_file_start (void);
114 static void cris_init_libfuncs (void);
115
116 static bool cris_rtx_costs (rtx, int, int, int *);
117 static int cris_address_cost (rtx);
118 static bool cris_pass_by_reference (CUMULATIVE_ARGS *, enum machine_mode,
119 tree, bool);
120
121 /* The function cris_target_asm_function_epilogue puts the last insn to
122 output here. It always fits; there won't be a symbol operand. Used in
123 delay_slots_for_epilogue and function_epilogue. */
124 static char save_last[80];
125
126 /* This is the argument from the "-max-stack-stackframe=" option. */
127 const char *cris_max_stackframe_str;
128
129 /* This is the argument from the "-march=" option. */
130 const char *cris_cpu_str;
131
132 /* This is the argument from the "-mtune=" option. */
133 const char *cris_tune_str;
134
135 /* This is the argument from the "-melinux-stacksize=" option. */
136 const char *cris_elinux_stacksize_str;
137
138 /* This is the parsed result of the "-max-stack-stackframe=" option. If
139 it (still) is zero, then there was no such option given. */
140 int cris_max_stackframe = 0;
141
142 /* This is the parsed result of the "-march=" option, if given. */
143 int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
144
145 #undef TARGET_ASM_ALIGNED_HI_OP
146 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
147 #undef TARGET_ASM_ALIGNED_SI_OP
148 #define TARGET_ASM_ALIGNED_SI_OP "\t.dword\t"
149 #undef TARGET_ASM_ALIGNED_DI_OP
150 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
151
152 /* We need to define these, since the 2byte, 4byte, 8byte op:s are only
153 available in ELF. These "normal" pseudos do not have any alignment
154 constraints or side-effects. */
155 #undef TARGET_ASM_UNALIGNED_HI_OP
156 #define TARGET_ASM_UNALIGNED_HI_OP TARGET_ASM_ALIGNED_HI_OP
157
158 #undef TARGET_ASM_UNALIGNED_SI_OP
159 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
160
161 #undef TARGET_ASM_UNALIGNED_DI_OP
162 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
163
164 #undef TARGET_ASM_FUNCTION_PROLOGUE
165 #define TARGET_ASM_FUNCTION_PROLOGUE cris_target_asm_function_prologue
166
167 #undef TARGET_ASM_FUNCTION_EPILOGUE
168 #define TARGET_ASM_FUNCTION_EPILOGUE cris_target_asm_function_epilogue
169
170 #undef TARGET_ASM_OUTPUT_MI_THUNK
171 #define TARGET_ASM_OUTPUT_MI_THUNK cris_asm_output_mi_thunk
172 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
173 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
174
175 #undef TARGET_ASM_FILE_START
176 #define TARGET_ASM_FILE_START cris_file_start
177
178 #undef TARGET_INIT_LIBFUNCS
179 #define TARGET_INIT_LIBFUNCS cris_init_libfuncs
180
181 #undef TARGET_RTX_COSTS
182 #define TARGET_RTX_COSTS cris_rtx_costs
183 #undef TARGET_ADDRESS_COST
184 #define TARGET_ADDRESS_COST cris_address_cost
185
186 #undef TARGET_PROMOTE_FUNCTION_ARGS
187 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
188 #undef TARGET_STRUCT_VALUE_RTX
189 #define TARGET_STRUCT_VALUE_RTX cris_struct_value_rtx
190 #undef TARGET_SETUP_INCOMING_VARARGS
191 #define TARGET_SETUP_INCOMING_VARARGS cris_setup_incoming_varargs
192 #undef TARGET_PASS_BY_REFERENCE
193 #define TARGET_PASS_BY_REFERENCE cris_pass_by_reference
194
195 struct gcc_target targetm = TARGET_INITIALIZER;
196
197 /* Predicate functions. */
198
199 /* This checks a part of an address, the one that is not a plain register
200 for an addressing mode using BDAP.
201 Allowed operands is either:
202 a) a register
203 b) a CONST operand (but not a symbol when generating PIC)
204 c) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
205
206 int
207 cris_bdap_operand (rtx op, enum machine_mode mode)
208 {
209 register enum rtx_code code = GET_CODE (op);
210
211 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
212 return 0;
213
214 /* Just return whether this is a simple register or constant. */
215 if (register_operand (op, mode)
216 || (CONSTANT_P (op) && !(flag_pic && cris_symbol (op))))
217 return 1;
218
219 /* Is it a [r] or possibly a [r+]? */
220 if (code == MEM)
221 {
222 rtx tem = XEXP (op, 0);
223
224 if (mode == SImode
225 && (register_operand (tem, SImode)
226 || (GET_CODE (tem) == POST_INC
227 && register_operand (XEXP (tem, 0), SImode))))
228 return 1;
229 else
230 return 0;
231 }
232
233 /* Perhaps a sign-extended mem: [r].(b|w) or [r+].(b|w)? */
234 if (code == SIGN_EXTEND)
235 {
236 rtx tem = XEXP (op, 0);
237
238 if (GET_CODE (tem) != MEM)
239 return 0;
240
241 tem = XEXP (tem, 0);
242 if (mode == SImode
243 && (register_operand (tem, SImode)
244 || (GET_CODE (tem) == POST_INC
245 && register_operand (XEXP (tem, 0), SImode))))
246 return 1;
247 else
248 return 0;
249 }
250
251 return 0;
252 }
253
254 /* This is similar to cris_bdap_operand:
255 It checks a part of an address, the one that is not a plain register
256 for an addressing mode using BDAP *or* BIAP.
257 Allowed operands is either:
258 a) a register
259 b) a CONST operand (but not a symbol when generating PIC)
260 c) a mult of (1, 2 or 4) and a register
261 d) a [r] or [r+] in SImode, or sign-extend from HI or QI. */
262
263 int
264 cris_bdap_biap_operand (rtx op, enum machine_mode mode)
265 {
266 register enum rtx_code code = GET_CODE (op);
267 rtx reg;
268 rtx val;
269
270 /* Check for bdap operand. */
271 if (cris_bdap_operand (op, mode))
272 return 1;
273
274 if (mode != SImode && (mode != VOIDmode || GET_MODE (op) != VOIDmode))
275 return 0;
276
277 /* Check that we're looking at a BIAP operand. */
278 if (code != MULT)
279 return 0;
280
281 /* Canonicalize register and multiplicand. */
282 if (GET_CODE (XEXP (op, 0)) == CONST_INT)
283 {
284 val = XEXP (op, 0);
285 reg = XEXP (op, 1);
286 }
287 else
288 {
289 val = XEXP (op, 1);
290 reg = XEXP (op, 0);
291 }
292
293 /* Check that the operands are correct after canonicalization. */
294 if (! register_operand (reg, SImode) || GET_CODE (val) != CONST_INT)
295 return 0;
296
297 /* Check that the multiplicand has a valid value. */
298 if ((code == MULT
299 && (INTVAL (val) == 1 || INTVAL (val) == 2 || INTVAL (val) == 4)))
300 return 1;
301
302 return 0;
303 }
304
305 /* Check if MODE is same as mode for X, and X is PLUS, MINUS, IOR or
306 AND or UMIN. */
307
308 int
309 cris_orthogonal_operator (rtx x, enum machine_mode mode)
310 {
311 enum rtx_code code = GET_CODE (x);
312
313 if (mode == VOIDmode)
314 mode = GET_MODE (x);
315
316 return (GET_MODE (x) == mode
317 && (code == PLUS || code == MINUS
318 || code == IOR || code == AND || code == UMIN));
319 }
320
321 /* Check if MODE is same as mode for X, and X is PLUS, IOR or AND or
322 UMIN. */
323
324 int
325 cris_commutative_orth_op (rtx x, enum machine_mode mode)
326 {
327 enum rtx_code code = GET_CODE (x);
328
329 if (mode == VOIDmode)
330 mode = GET_MODE (x);
331
332 return (GET_MODE (x) == mode &&
333 (code == PLUS
334 || code == IOR || code == AND || code == UMIN));
335 }
336
337 /* Check if MODE is same as mode for X, and X is PLUS or MINUS or UMIN.
338 By the name, you might think we should include MULT. We don't because
339 it doesn't accept the same addressing modes as the others (ony
340 registers) and there's also the problem of handling TARGET_MUL_BUG. */
341
342 int
343 cris_operand_extend_operator (rtx x, enum machine_mode mode)
344 {
345 enum rtx_code code = GET_CODE (x);
346
347 if (mode == VOIDmode)
348 mode = GET_MODE (x);
349
350 return (GET_MODE (x) == mode
351 && (code == PLUS || code == MINUS || code == UMIN));
352 }
353
354 /* Check if MODE is same as mode for X, and X is PLUS or MINUS. */
355
356 int
357 cris_additive_operand_extend_operator (rtx x, enum machine_mode mode)
358 {
359 enum rtx_code code = GET_CODE (x);
360
361 if (mode == VOIDmode)
362 mode = GET_MODE (x);
363
364 return (GET_MODE (x) == mode
365 && (code == PLUS || code == MINUS));
366 }
367
368 /* Check to see if MODE is same as mode for X, and X is SIGN_EXTEND or
369 ZERO_EXTEND. */
370
371 int
372 cris_extend_operator (rtx x, enum machine_mode mode)
373 {
374 enum rtx_code code = GET_CODE (x);
375
376 if (mode == VOIDmode)
377 mode = GET_MODE (x);
378
379 return
380 (GET_MODE (x) == mode && (code == SIGN_EXTEND || code == ZERO_EXTEND));
381 }
382
383 /* Check to see if MODE is same as mode for X, and X is PLUS or BOUND. */
384
385 int
386 cris_plus_or_bound_operator (rtx x, enum machine_mode mode)
387 {
388 enum rtx_code code = GET_CODE (x);
389
390 if (mode == VOIDmode)
391 mode = GET_MODE (x);
392
393 return
394 (GET_MODE (x) == mode && (code == UMIN || code == PLUS));
395 }
396
397 /* Used as an operator to get a handle on a already-known-valid MEM rtx:es
398 (no need to validate the address), where some address expression parts
399 have their own match_operand. */
400
401 int
402 cris_mem_op (rtx x, enum machine_mode mode)
403 {
404 if (mode == VOIDmode)
405 mode = GET_MODE (x);
406
407 return GET_MODE (x) == mode && GET_CODE (x) == MEM;
408 }
409
410 /* Since with -fPIC, not all symbols are valid PIC symbols or indeed
411 general_operands, we have to have a predicate that matches it for the
412 "movsi" expander. */
413
414 int
415 cris_general_operand_or_symbol (rtx op, enum machine_mode mode)
416 {
417 return general_operand (op, mode)
418 || (CONSTANT_P (op) && cris_symbol (op));
419 }
420
421 /* Since a PIC symbol without a GOT entry is not a general_operand, we
422 have to have a predicate that matches it. We use this in the expanded
423 "movsi" anonymous pattern for PIC symbols. */
424
425 int
426 cris_general_operand_or_gotless_symbol (rtx op, enum machine_mode mode)
427 {
428 return general_operand (op, mode)
429 || (CONSTANT_P (op) && cris_gotless_symbol (op));
430 }
431
432 /* Since a PLT symbol is not a general_operand, we have to have a
433 predicate that matches it when we need it. We use this in the expanded
434 "call" and "call_value" anonymous patterns. */
435
436 int
437 cris_general_operand_or_plt_symbol (rtx op, enum machine_mode mode)
438 {
439 return general_operand (op, mode)
440 || (GET_CODE (op) == CONST
441 && GET_CODE (XEXP (op, 0)) == UNSPEC
442 && !TARGET_AVOID_GOTPLT);
443 }
444
445 /* This matches a (MEM (general_operand)) or
446 (MEM (cris_general_operand_or_symbol)). The second one isn't a valid
447 memory_operand, so we need this predicate to recognize call
448 destinations before we change them to a PLT operand (by wrapping in
449 UNSPEC 0). */
450
451 int
452 cris_mem_call_operand (rtx op, enum machine_mode mode)
453 {
454 rtx xmem;
455
456 if (GET_CODE (op) != MEM)
457 return 0;
458
459 if (memory_operand (op, mode))
460 return 1;
461
462 xmem = XEXP (op, 0);
463
464 return cris_general_operand_or_symbol (xmem, GET_MODE (op));
465 }
466
467 /* The CONDITIONAL_REGISTER_USAGE worker. */
468
469 void
470 cris_conditional_register_usage (void)
471 {
472 /* FIXME: This isn't nice. We should be able to use that register for
473 something else if the PIC table isn't needed. */
474 if (flag_pic)
475 fixed_regs[PIC_OFFSET_TABLE_REGNUM]
476 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;
477 }
478
479 /* Return current_function_uses_pic_offset_table. For use in cris.md,
480 since some generated files do not include function.h. */
481
482 int
483 cris_cfun_uses_pic_table (void)
484 {
485 return current_function_uses_pic_offset_table;
486 }
487
488 /* Given an rtx, return the text string corresponding to the CODE of X.
489 Intended for use in the assembly language output section of a
490 define_insn. */
491
492 const char *
493 cris_op_str (rtx x)
494 {
495 cris_output_insn_is_bound = 0;
496 switch (GET_CODE (x))
497 {
498 case PLUS:
499 return "add";
500 break;
501
502 case MINUS:
503 return "sub";
504 break;
505
506 case MULT:
507 /* This function is for retrieving a part of an instruction name for
508 an operator, for immediate output. If that ever happens for
509 MULT, we need to apply TARGET_MUL_BUG in the caller. Make sure
510 we notice. */
511 abort ();
512 break;
513
514 case DIV:
515 return "div";
516 break;
517
518 case AND:
519 return "and";
520 break;
521
522 case IOR:
523 return "or";
524 break;
525
526 case XOR:
527 return "xor";
528 break;
529
530 case NOT:
531 return "not";
532 break;
533
534 case ASHIFT:
535 return "lsl";
536 break;
537
538 case LSHIFTRT:
539 return "lsr";
540 break;
541
542 case ASHIFTRT:
543 return "asr";
544 break;
545
546 case UMIN:
547 /* Used to control the sign/zero-extend character for the 'e' modifier.
548 BOUND has none. */
549 cris_output_insn_is_bound = 1;
550 return "bound";
551 break;
552
553 default:
554 return "Unknown operator";
555 break;
556 }
557 }
558
559 /* Emit an error message when we're in an asm, and a fatal error for
560 "normal" insns. Formatted output isn't easily implemented, since we
561 use output_operand_lossage to output the actual message and handle the
562 categorization of the error. */
563
564 static void
565 cris_operand_lossage (const char *msgid, rtx op)
566 {
567 debug_rtx (op);
568 output_operand_lossage ("%s", msgid);
569 }
570
571 /* Print an index part of an address to file. */
572
573 static void
574 cris_print_index (rtx index, FILE *file)
575 {
576 rtx inner = XEXP (index, 0);
577
578 /* Make the index "additive" unless we'll output a negative number, in
579 which case the sign character is free (as in free beer). */
580 if (GET_CODE (index) != CONST_INT || INTVAL (index) >= 0)
581 putc ('+', file);
582
583 if (REG_P (index))
584 fprintf (file, "$%s.b", reg_names[REGNO (index)]);
585 else if (CONSTANT_P (index))
586 cris_output_addr_const (file, index);
587 else if (GET_CODE (index) == MULT)
588 {
589 fprintf (file, "$%s.",
590 reg_names[REGNO (XEXP (index, 0))]);
591
592 putc (INTVAL (XEXP (index, 1)) == 2 ? 'w' : 'd', file);
593 }
594 else if (GET_CODE (index) == SIGN_EXTEND &&
595 GET_CODE (inner) == MEM)
596 {
597 rtx inner_inner = XEXP (inner, 0);
598
599 if (GET_CODE (inner_inner) == POST_INC)
600 {
601 fprintf (file, "[$%s+].",
602 reg_names[REGNO (XEXP (inner_inner, 0))]);
603 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
604 }
605 else
606 {
607 fprintf (file, "[$%s].", reg_names[REGNO (inner_inner)]);
608
609 putc (GET_MODE (inner) == HImode ? 'w' : 'b', file);
610 }
611 }
612 else if (GET_CODE (index) == MEM)
613 {
614 if (GET_CODE (inner) == POST_INC)
615 fprintf (file, "[$%s+].d", reg_names[REGNO (XEXP (inner, 0))]);
616 else
617 fprintf (file, "[$%s].d", reg_names[REGNO (inner)]);
618 }
619 else
620 cris_operand_lossage ("unexpected index-type in cris_print_index",
621 index);
622 }
623
624 /* Print a base rtx of an address to file. */
625
626 static void
627 cris_print_base (rtx base, FILE *file)
628 {
629 if (REG_P (base))
630 fprintf (file, "$%s", reg_names[REGNO (base)]);
631 else if (GET_CODE (base) == POST_INC)
632 fprintf (file, "$%s+", reg_names[REGNO (XEXP (base, 0))]);
633 else
634 cris_operand_lossage ("unexpected base-type in cris_print_base",
635 base);
636 }
637
638 /* Usable as a guard in expressions. */
639
640 int
641 cris_fatal (char *arg)
642 {
643 internal_error (arg);
644
645 /* We'll never get here; this is just to appease compilers. */
646 return 0;
647 }
648
649 /* Textual function prologue. */
650
651 static void
652 cris_target_asm_function_prologue (FILE *file, HOST_WIDE_INT size)
653 {
654 int regno;
655
656 /* Shorten the used name for readability. */
657 int cfoa_size = current_function_outgoing_args_size;
658 int last_movem_reg = -1;
659 int doing_dwarf = dwarf2out_do_frame ();
660 int framesize;
661 int faked_args_size = 0;
662 int cfa_write_offset = 0;
663 char *cfa_label = NULL;
664 int return_address_on_stack
665 = regs_ever_live[CRIS_SRP_REGNUM]
666 || cfun->machine->needs_return_address_on_stack != 0;
667
668 /* Don't do anything if no prologues or epilogues are wanted. */
669 if (!TARGET_PROLOGUE_EPILOGUE)
670 return;
671
672 if (size < 0)
673 abort ();
674
675 /* Align the size to what's best for the CPU model. */
676 if (TARGET_STACK_ALIGN)
677 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
678
679 if (current_function_pretend_args_size)
680 {
681 int pretend = current_function_pretend_args_size;
682 for (regno = CRIS_FIRST_ARG_REG + CRIS_MAX_ARGS_IN_REGS - 1;
683 pretend > 0;
684 regno--, pretend -= 4)
685 {
686 fprintf (file, "\tpush $%s\n", reg_names[regno]);
687 faked_args_size += 4;
688 }
689 }
690
691 framesize = faked_args_size;
692
693 if (doing_dwarf)
694 {
695 /* FIXME: Slightly redundant calculation, as we do the same in
696 pieces below. This offset must be the total adjustment of the
697 stack-pointer. We can then def_cfa call at the end of this
698 function with the current implementation of execute_cfa_insn, but
699 that wouldn't really be clean. */
700
701 int cfa_offset
702 = faked_args_size
703 + (return_address_on_stack ? 4 : 0)
704 + (frame_pointer_needed ? 4 : 0);
705
706 int cfa_reg;
707
708 if (frame_pointer_needed)
709 cfa_reg = FRAME_POINTER_REGNUM;
710 else
711 {
712 cfa_reg = STACK_POINTER_REGNUM;
713 cfa_offset += cris_initial_frame_pointer_offset ();
714 }
715
716 cfa_label = dwarf2out_cfi_label ();
717 dwarf2out_def_cfa (cfa_label, cfa_reg, cfa_offset);
718
719 cfa_write_offset = - faked_args_size - 4;
720 }
721
722 /* Save SRP if not a leaf function. */
723 if (return_address_on_stack)
724 {
725 fprintf (file, "\tPush $srp\n");
726 framesize += 4;
727
728 if (doing_dwarf)
729 {
730 dwarf2out_return_save (cfa_label, cfa_write_offset);
731 cfa_write_offset -= 4;
732 }
733 }
734
735 /* Set up frame pointer if needed. */
736 if (frame_pointer_needed)
737 {
738 fprintf (file, "\tpush $%s\n\tmove.d $sp,$%s\n",
739 reg_names[FRAME_POINTER_REGNUM],
740 reg_names[FRAME_POINTER_REGNUM]);
741 framesize += 4;
742
743 if (doing_dwarf)
744 {
745 dwarf2out_reg_save (cfa_label, FRAME_POINTER_REGNUM,
746 cfa_write_offset);
747 cfa_write_offset -= 4;
748 }
749 }
750
751 /* Local vars are located above saved regs. */
752 cfa_write_offset -= size;
753
754 /* Get a contiguous sequence of registers, starting with r0, that need
755 to be saved. */
756 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
757 {
758 if ((((regs_ever_live[regno]
759 && !call_used_regs[regno])
760 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
761 && (current_function_uses_pic_offset_table
762 /* It is saved anyway, if there would be a gap. */
763 || (flag_pic
764 && regs_ever_live[regno + 1]
765 && !call_used_regs[regno + 1]))))
766 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
767 && regno != CRIS_SRP_REGNUM)
768 || (current_function_calls_eh_return
769 && (regno == EH_RETURN_DATA_REGNO (0)
770 || regno == EH_RETURN_DATA_REGNO (1)
771 || regno == EH_RETURN_DATA_REGNO (2)
772 || regno == EH_RETURN_DATA_REGNO (3))))
773 {
774 /* Check if movem may be used for registers so far. */
775 if (regno == last_movem_reg + 1)
776 /* Yes, update next expected register. */
777 last_movem_reg++;
778 else
779 {
780 /* We cannot use movem for all registers. We have to flush
781 any movem:ed registers we got so far. */
782 if (last_movem_reg != -1)
783 {
784 /* It is a win to use a side-effect assignment for
785 64 <= size <= 128. But side-effect on movem was
786 not usable for CRIS v0..3. Also only do it if
787 side-effects insns are allowed. */
788 if ((last_movem_reg + 1) * 4 + size >= 64
789 && (last_movem_reg + 1) * 4 + size <= 128
790 && cris_cpu_version >= CRIS_CPU_SVINTO
791 && TARGET_SIDE_EFFECT_PREFIXES)
792 fprintf (file, "\tmovem $%s,[$sp=$sp-"HOST_WIDE_INT_PRINT_DEC"]\n",
793 reg_names[last_movem_reg],
794 (last_movem_reg + 1) * 4 + size);
795 else
796 {
797 /* Avoid printing multiple subsequent sub:s for sp. */
798 fprintf (file, "\tsub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
799 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1)
800 * 4 + size),
801 (last_movem_reg + 1) * 4 + size);
802
803 fprintf (file, "\tmovem $%s,[$sp]\n",
804 reg_names[last_movem_reg]);
805 }
806
807 framesize += (last_movem_reg + 1) * 4 + size;
808
809 if (TARGET_PDEBUG)
810 fprintf (file, "; frame "HOST_WIDE_INT_PRINT_DEC
811 ", #regs %d, bytes %d args %d\n",
812 size,
813 last_movem_reg + 1,
814 (last_movem_reg + 1) * 4,
815 current_function_args_size);
816
817 last_movem_reg = -1;
818 size = 0;
819 }
820 else if (size > 0)
821 {
822 /* Local vars on stack, but there are no movem:s.
823 Just allocate space. */
824 fprintf (file, "\tSub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
825 ADDITIVE_SIZE_MODIFIER (size),
826 size);
827 framesize += size;
828 size = 0;
829 }
830
831 fprintf (file, "\tPush $%s\n", reg_names[regno]);
832 framesize += 4;
833 }
834
835 if (doing_dwarf)
836 {
837 /* Registers are stored lowest numbered at highest address,
838 which matches the loop order; we just need to update the
839 write-offset. */
840 dwarf2out_reg_save (cfa_label, regno, cfa_write_offset);
841 cfa_write_offset -= 4;
842 }
843 }
844 }
845
846 /* Check after, if we can movem all registers. This is the normal
847 case. */
848 if (last_movem_reg != -1)
849 {
850 /* Side-effect assignment on movem was not supported for CRIS v0..3,
851 and don't do it if we're asked not to.
852
853 The movem is already accounted for, for unwind. */
854
855 if ((last_movem_reg + 1) * 4 + size >= 64
856 && (last_movem_reg + 1) * 4 + size <= 128
857 && cris_cpu_version >= CRIS_CPU_SVINTO
858 && TARGET_SIDE_EFFECT_PREFIXES)
859 fprintf (file, "\tmovem $%s,[$sp=$sp-"HOST_WIDE_INT_PRINT_DEC"]\n",
860 reg_names[last_movem_reg],
861 (last_movem_reg+1) * 4 + size);
862 else
863 {
864 /* Avoid printing multiple subsequent sub:s for sp. FIXME:
865 Clean up the conditional expression. */
866 fprintf (file, "\tsub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
867 ADDITIVE_SIZE_MODIFIER ((last_movem_reg + 1) * 4 + size),
868 (last_movem_reg + 1) * 4 + size);
869 /* To be compatible with v0..v3 means we do not use an assignment
870 addressing mode with movem. We normally don't need that
871 anyway. It would only be slightly more efficient for 64..128
872 bytes frame size. */
873 fprintf (file, "\tmovem $%s,[$sp]\n", reg_names[last_movem_reg]);
874 }
875
876 framesize += (last_movem_reg + 1) * 4 + size;
877
878 if (TARGET_PDEBUG)
879 fprintf (file, "; frame "HOST_WIDE_INT_PRINT_DEC
880 ", #regs %d, bytes %d args %d\n",
881 size,
882 last_movem_reg + 1,
883 (last_movem_reg + 1) * 4,
884 current_function_args_size);
885
886 /* We have to put outgoing argument space after regs. */
887 if (cfoa_size)
888 {
889 /* This does not need to be accounted for, for unwind. */
890
891 fprintf (file, "\tSub%s %d,$sp\n",
892 ADDITIVE_SIZE_MODIFIER (cfoa_size),
893 cfoa_size);
894 framesize += cfoa_size;
895 }
896 }
897 else if ((size + cfoa_size) > 0)
898 {
899 /* This does not need to be accounted for, for unwind. */
900
901 /* Local vars on stack, and we could not use movem. Add a sub here. */
902 fprintf (file, "\tSub%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
903 ADDITIVE_SIZE_MODIFIER (size + cfoa_size),
904 cfoa_size + size);
905 framesize += size + cfoa_size;
906 }
907
908 /* Set up the PIC register. */
909 if (current_function_uses_pic_offset_table)
910 fprintf (file, "\tmove.d $pc,$%s\n\tsub.d .:GOTOFF,$%s\n",
911 reg_names[PIC_OFFSET_TABLE_REGNUM],
912 reg_names[PIC_OFFSET_TABLE_REGNUM]);
913
914 if (TARGET_PDEBUG)
915 fprintf (file,
916 "; parm #%d @ %d; frame " HOST_WIDE_INT_PRINT_DEC
917 ", FP-SP is %d; leaf: %s%s; fp %s, outg: %d arg %d\n",
918 CRIS_MAX_ARGS_IN_REGS + 1, FIRST_PARM_OFFSET (0),
919 get_frame_size (),
920 cris_initial_frame_pointer_offset (),
921 leaf_function_p () ? "yes" : "no",
922 return_address_on_stack ? "no" :"yes",
923 frame_pointer_needed ? "yes" : "no",
924 cfoa_size, current_function_args_size);
925
926 if (cris_max_stackframe && framesize > cris_max_stackframe)
927 warning ("stackframe too big: %d bytes", framesize);
928 }
929
930 /* Return nonzero if there are regs mentioned in the insn that are not all
931 in the call_used regs. This is part of the decision whether an insn
932 can be put in the epilogue. */
933
934 static int
935 saved_regs_mentioned (rtx x)
936 {
937 int i;
938 const char *fmt;
939 RTX_CODE code;
940
941 /* Mainly stolen from refers_to_regno_p in rtlanal.c. */
942
943 code = GET_CODE (x);
944
945 switch (code)
946 {
947 case REG:
948 i = REGNO (x);
949 return !call_used_regs[i];
950
951 case SUBREG:
952 /* If this is a SUBREG of a hard reg, we can see exactly which
953 registers are being modified. Otherwise, handle normally. */
954 i = REGNO (SUBREG_REG (x));
955 return !call_used_regs[i];
956
957 default:
958 ;
959 }
960
961 fmt = GET_RTX_FORMAT (code);
962 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
963 {
964 if (fmt[i] == 'e')
965 {
966 if (saved_regs_mentioned (XEXP (x, i)))
967 return 1;
968 }
969 else if (fmt[i] == 'E')
970 {
971 int j;
972 for (j = XVECLEN (x, i) - 1; j >=0; j--)
973 if (saved_regs_mentioned (XEXP (x, i)))
974 return 1;
975 }
976 }
977
978 return 0;
979 }
980
981 /* Figure out if the insn may be put in the epilogue. */
982
983 int
984 cris_eligible_for_epilogue_delay (rtx insn)
985 {
986 /* First of all, it must be as slottable as for a delayed branch insn. */
987 if (get_attr_slottable (insn) != SLOTTABLE_YES)
988 return 0;
989
990 /* It must not refer to the stack pointer (may be valid for some cases
991 that I can't think of). */
992 if (reg_mentioned_p (stack_pointer_rtx, PATTERN (insn)))
993 return 0;
994
995 /* The frame pointer will be restored in the epilogue, before the
996 "ret", so it can't be referred to. */
997 if (frame_pointer_needed
998 && reg_mentioned_p (frame_pointer_rtx, PATTERN (insn)))
999 return 0;
1000
1001 /* All saved regs are restored before the delayed insn.
1002 This means that we cannot have any instructions that mention the
1003 registers that are restored by the epilogue. */
1004 if (saved_regs_mentioned (PATTERN (insn)))
1005 return 0;
1006
1007 /* It seems to be ok. */
1008 return 1;
1009 }
1010
1011 /* Return the number of delay-slots in the epilogue: return 1 if it
1012 contains "ret", else 0. */
1013
1014 int
1015 cris_delay_slots_for_epilogue (void)
1016 {
1017 /* Check if we use a return insn, which we only do for leaf functions.
1018 Else there is no slot to fill. */
1019 if (regs_ever_live[CRIS_SRP_REGNUM]
1020 || cfun->machine->needs_return_address_on_stack != 0)
1021 return 0;
1022
1023 /* By calling function_epilogue with the same parameters as from gcc
1024 we can get info about if the epilogue can fill the delay-slot by itself.
1025 If it is filled from the epilogue, then the corresponding string
1026 is in save_last.
1027 This depends on that the "size" argument to function_epilogue
1028 always is get_frame_size.
1029 FIXME: Kludgy. At least make it a separate function that is not
1030 misnamed or abuses the stream parameter. */
1031 cris_target_asm_function_epilogue (NULL, get_frame_size ());
1032
1033 if (*save_last)
1034 return 1;
1035 return 0;
1036 }
1037
1038 /* Textual function epilogue. When file is NULL, it serves doubly as
1039 a test for whether the epilogue can fill any "ret" delay-slots by
1040 itself by storing the delay insn in save_last. */
1041
1042 static void
1043 cris_target_asm_function_epilogue (FILE *file, HOST_WIDE_INT size)
1044 {
1045 int regno;
1046 int last_movem_reg = -1;
1047 rtx insn = get_last_insn ();
1048 int argspace_offset = current_function_outgoing_args_size;
1049 int pretend = current_function_pretend_args_size;
1050 int return_address_on_stack
1051 = regs_ever_live[CRIS_SRP_REGNUM]
1052 || cfun->machine->needs_return_address_on_stack != 0;
1053
1054 save_last[0] = 0;
1055
1056 if (file && !TARGET_PROLOGUE_EPILOGUE)
1057 return;
1058
1059 if (TARGET_PDEBUG && file)
1060 fprintf (file, ";;\n");
1061
1062 /* Align byte count of stack frame. */
1063 if (TARGET_STACK_ALIGN)
1064 size = TARGET_ALIGN_BY_32 ? (size + 3) & ~3 : (size + 1) & ~1;
1065
1066 /* If the last insn was a BARRIER, we don't have to write any code,
1067 then all returns were covered by "return" insns. */
1068 if (GET_CODE (insn) == NOTE)
1069 insn = prev_nonnote_insn (insn);
1070 if (insn
1071 && (GET_CODE (insn) == BARRIER
1072 /* We must make sure that the insn really is a "return" and
1073 not a conditional branch. Try to match the return exactly,
1074 and if it doesn't match, assume it is a conditional branch
1075 (and output an epilogue). */
1076 || (GET_CODE (insn) == JUMP_INSN
1077 && GET_CODE (PATTERN (insn)) == RETURN)))
1078 {
1079 if (TARGET_PDEBUG && file)
1080 fprintf (file, ";;;;;\n");
1081 return;
1082 }
1083
1084 /* Check how many saved regs we can movem. They start at r0 and must
1085 be contiguous. */
1086 for (regno = 0;
1087 regno < FIRST_PSEUDO_REGISTER;
1088 regno++)
1089 if ((((regs_ever_live[regno]
1090 && !call_used_regs[regno])
1091 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1092 && (current_function_uses_pic_offset_table
1093 /* It is saved anyway, if there would be a gap. */
1094 || (flag_pic
1095 && regs_ever_live[regno + 1]
1096 && !call_used_regs[regno + 1]))))
1097 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1098 && regno != CRIS_SRP_REGNUM)
1099 || (current_function_calls_eh_return
1100 && (regno == EH_RETURN_DATA_REGNO (0)
1101 || regno == EH_RETURN_DATA_REGNO (1)
1102 || regno == EH_RETURN_DATA_REGNO (2)
1103 || regno == EH_RETURN_DATA_REGNO (3))))
1104
1105 {
1106 if (regno == last_movem_reg + 1)
1107 last_movem_reg++;
1108 else
1109 break;
1110 }
1111
1112 for (regno = FIRST_PSEUDO_REGISTER - 1;
1113 regno > last_movem_reg;
1114 regno--)
1115 if ((((regs_ever_live[regno]
1116 && !call_used_regs[regno])
1117 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1118 && (current_function_uses_pic_offset_table
1119 /* It is saved anyway, if there would be a gap. */
1120 || (flag_pic
1121 && regs_ever_live[regno + 1]
1122 && !call_used_regs[regno + 1]))))
1123 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1124 && regno != CRIS_SRP_REGNUM)
1125 || (current_function_calls_eh_return
1126 && (regno == EH_RETURN_DATA_REGNO (0)
1127 || regno == EH_RETURN_DATA_REGNO (1)
1128 || regno == EH_RETURN_DATA_REGNO (2)
1129 || regno == EH_RETURN_DATA_REGNO (3))))
1130 {
1131 if (argspace_offset)
1132 {
1133 /* There is an area for outgoing parameters located before
1134 the saved registers. We have to adjust for that. */
1135 if (file)
1136 fprintf (file, "\tAdd%s %d,$sp\n",
1137 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1138 argspace_offset);
1139
1140 /* Make sure we only do this once. */
1141 argspace_offset = 0;
1142 }
1143
1144 /* Flush previous non-movem:ed registers. */
1145 if (*save_last && file)
1146 fprintf (file, save_last);
1147 sprintf (save_last, "\tPop $%s\n", reg_names[regno]);
1148 }
1149
1150 if (last_movem_reg != -1)
1151 {
1152 if (argspace_offset)
1153 {
1154 /* Adjust for the outgoing parameters area, if that's not
1155 handled yet. */
1156 if (*save_last && file)
1157 {
1158 fprintf (file, save_last);
1159 *save_last = 0;
1160 }
1161
1162 if (file)
1163 fprintf (file, "\tAdd%s %d,$sp\n",
1164 ADDITIVE_SIZE_MODIFIER (argspace_offset),
1165 argspace_offset);
1166 argspace_offset = 0;
1167 }
1168 /* Flush previous non-movem:ed registers. */
1169 else if (*save_last && file)
1170 fprintf (file, save_last);
1171 sprintf (save_last, "\tmovem [$sp+],$%s\n", reg_names[last_movem_reg]);
1172 }
1173
1174 /* Restore frame pointer if necessary. */
1175 if (frame_pointer_needed)
1176 {
1177 if (*save_last && file)
1178 fprintf (file, save_last);
1179
1180 if (file)
1181 fprintf (file, "\tmove.d $%s,$sp\n",
1182 reg_names[FRAME_POINTER_REGNUM]);
1183 sprintf (save_last, "\tPop $%s\n",
1184 reg_names[FRAME_POINTER_REGNUM]);
1185 }
1186 else
1187 {
1188 /* If there was no frame-pointer to restore sp from, we must
1189 explicitly deallocate local variables. */
1190
1191 /* Handle space for outgoing parameters that hasn't been handled
1192 yet. */
1193 size += argspace_offset;
1194
1195 if (size)
1196 {
1197 if (*save_last && file)
1198 fprintf (file, save_last);
1199
1200 sprintf (save_last, "\tadd%s "HOST_WIDE_INT_PRINT_DEC",$sp\n",
1201 ADDITIVE_SIZE_MODIFIER (size), size);
1202 }
1203
1204 /* If the size was not in the range for a "quick", we must flush
1205 it here. */
1206 if (size > 63)
1207 {
1208 if (file)
1209 fprintf (file, save_last);
1210 *save_last = 0;
1211 }
1212 }
1213
1214 /* If this function has no pushed register parameters
1215 (stdargs/varargs), and if it is not a leaf function, then we can
1216 just jump-return here. */
1217 if (return_address_on_stack && pretend == 0)
1218 {
1219 if (*save_last && file)
1220 fprintf (file, save_last);
1221 *save_last = 0;
1222
1223 if (file)
1224 {
1225 if (current_function_calls_eh_return)
1226 {
1227 /* The installed EH-return address is in *this* frame, so we
1228 need to pop it before we return. */
1229 fprintf (file, "\tpop $srp\n");
1230 fprintf (file, "\tret\n");
1231 fprintf (file, "\tadd.d $%s,$sp\n", reg_names[CRIS_STACKADJ_REG]);
1232 }
1233 else
1234 fprintf (file, "\tJump [$sp+]\n");
1235
1236 /* Do a sanity check to avoid generating invalid code. */
1237 if (current_function_epilogue_delay_list)
1238 internal_error ("allocated but unused delay list in epilogue");
1239 }
1240 return;
1241 }
1242
1243 /* Rather than add current_function_calls_eh_return conditions
1244 everywhere in the following code (and not be able to test it
1245 thoroughly), assert the assumption that all usage of
1246 __builtin_eh_return are handled above. */
1247 if (current_function_calls_eh_return)
1248 internal_error ("unexpected function type needing stack adjustment for\
1249 __builtin_eh_return");
1250
1251 /* If we pushed some register parameters, then adjust the stack for
1252 them. */
1253 if (pretend)
1254 {
1255 /* Since srp is stored on the way, we need to restore it first. */
1256 if (return_address_on_stack)
1257 {
1258 if (*save_last && file)
1259 fprintf (file, save_last);
1260 *save_last = 0;
1261
1262 if (file)
1263 fprintf (file, "\tpop $srp\n");
1264 }
1265
1266 if (*save_last && file)
1267 fprintf (file, save_last);
1268
1269 sprintf (save_last, "\tadd%s %d,$sp\n",
1270 ADDITIVE_SIZE_MODIFIER (pretend), pretend);
1271 }
1272
1273 /* Here's where we have a delay-slot we need to fill. */
1274 if (file && current_function_epilogue_delay_list)
1275 {
1276 /* If gcc has allocated an insn for the epilogue delay slot, but
1277 things were arranged so we now thought we could do it
1278 ourselves, don't forget to flush that insn. */
1279 if (*save_last)
1280 fprintf (file, save_last);
1281
1282 fprintf (file, "\tRet\n");
1283
1284 /* Output the delay-slot-insn the mandated way. */
1285 final_scan_insn (XEXP (current_function_epilogue_delay_list, 0),
1286 file, 1, -2, 1, NULL);
1287 }
1288 else if (file)
1289 {
1290 fprintf (file, "\tRet\n");
1291
1292 /* If the GCC did not do it, we have to use whatever insn we have,
1293 or a nop. */
1294 if (*save_last)
1295 fprintf (file, save_last);
1296 else
1297 fprintf (file, "\tnOp\n");
1298 }
1299 }
1300
1301 /* The PRINT_OPERAND worker. */
1302
1303 void
1304 cris_print_operand (FILE *file, rtx x, int code)
1305 {
1306 rtx operand = x;
1307
1308 /* Size-strings corresponding to MULT expressions. */
1309 static const char *const mults[] = { "BAD:0", ".b", ".w", "BAD:3", ".d" };
1310
1311 /* New code entries should just be added to the switch below. If
1312 handling is finished, just return. If handling was just a
1313 modification of the operand, the modified operand should be put in
1314 "operand", and then do a break to let default handling
1315 (zero-modifier) output the operand. */
1316
1317 switch (code)
1318 {
1319 case 'b':
1320 /* Print the unsigned supplied integer as if it were signed
1321 and < 0, i.e print 255 or 65535 as -1, 254, 65534 as -2, etc. */
1322 if (GET_CODE (x) != CONST_INT
1323 || ! CONST_OK_FOR_LETTER_P (INTVAL (x), 'O'))
1324 LOSE_AND_RETURN ("invalid operand for 'b' modifier", x);
1325 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
1326 INTVAL (x)| (INTVAL (x) <= 255 ? ~255 : ~65535));
1327 return;
1328
1329 case 'x':
1330 /* Print assembler code for operator. */
1331 fprintf (file, "%s", cris_op_str (operand));
1332 return;
1333
1334 case 'v':
1335 /* Print the operand without the PIC register. */
1336 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1337 LOSE_AND_RETURN ("invalid operand for 'v' modifier", x);
1338 cris_pic_sympart_only++;
1339 cris_output_addr_const (file, x);
1340 cris_pic_sympart_only--;
1341 return;
1342
1343 case 'P':
1344 /* Print the PIC register. Applied to a GOT-less PIC symbol for
1345 sanity. */
1346 if (! flag_pic || ! CONSTANT_P (x) || ! cris_gotless_symbol (x))
1347 LOSE_AND_RETURN ("invalid operand for 'P' modifier", x);
1348 fprintf (file, "$%s", reg_names [PIC_OFFSET_TABLE_REGNUM]);
1349 return;
1350
1351 case 'p':
1352 /* Adjust a power of two to its log2. */
1353 if (GET_CODE (x) != CONST_INT || exact_log2 (INTVAL (x)) < 0 )
1354 LOSE_AND_RETURN ("invalid operand for 'p' modifier", x);
1355 fprintf (file, "%d", exact_log2 (INTVAL (x)));
1356 return;
1357
1358 case 's':
1359 /* For an integer, print 'b' or 'w' if <= 255 or <= 65535
1360 respectively. This modifier also terminates the inhibiting
1361 effects of the 'x' modifier. */
1362 cris_output_insn_is_bound = 0;
1363 if (GET_MODE (x) == VOIDmode && GET_CODE (x) == CONST_INT)
1364 {
1365 if (INTVAL (x) >= 0)
1366 {
1367 if (INTVAL (x) <= 255)
1368 putc ('b', file);
1369 else if (INTVAL (x) <= 65535)
1370 putc ('w', file);
1371 else
1372 putc ('d', file);
1373 }
1374 else
1375 putc ('d', file);
1376 return;
1377 }
1378
1379 /* For a non-integer, print the size of the operand. */
1380 putc ((GET_MODE (x) == SImode || GET_MODE (x) == SFmode)
1381 ? 'd' : GET_MODE (x) == HImode ? 'w'
1382 : GET_MODE (x) == QImode ? 'b'
1383 /* If none of the above, emit an erroneous size letter. */
1384 : 'X',
1385 file);
1386 return;
1387
1388 case 'z':
1389 /* Const_int: print b for -127 <= x <= 255,
1390 w for -32768 <= x <= 65535, else abort. */
1391 if (GET_CODE (x) != CONST_INT
1392 || INTVAL (x) < -32768 || INTVAL (x) > 65535)
1393 LOSE_AND_RETURN ("invalid operand for 'z' modifier", x);
1394 putc (INTVAL (x) >= -128 && INTVAL (x) <= 255 ? 'b' : 'w', file);
1395 return;
1396
1397 case '#':
1398 /* Output a 'nop' if there's nothing for the delay slot.
1399 This method stolen from the sparc files. */
1400 if (dbr_sequence_length () == 0)
1401 fputs ("\n\tnop", file);
1402 return;
1403
1404 case '!':
1405 /* Output directive for alignment padded with "nop" insns.
1406 Optimizing for size, it's plain 4-byte alignment, otherwise we
1407 align the section to a cache-line (32 bytes) and skip at max 2
1408 bytes, i.e. we skip if it's the last insn on a cache-line. The
1409 latter is faster by a small amount (for two test-programs 99.6%
1410 and 99.9%) and larger by a small amount (ditto 100.1% and
1411 100.2%). This is supposed to be the simplest yet performance-
1412 wise least intrusive way to make sure the immediately following
1413 (supposed) muls/mulu insn isn't located at the end of a
1414 cache-line. */
1415 if (TARGET_MUL_BUG)
1416 fputs (optimize_size
1417 ? ".p2alignw 2,0x050f\n\t"
1418 : ".p2alignw 5,0x050f,2\n\t", file);
1419 return;
1420
1421 case 'H':
1422 /* Print high (most significant) part of something. */
1423 switch (GET_CODE (operand))
1424 {
1425 case CONST_INT:
1426 if (HOST_BITS_PER_WIDE_INT == 32)
1427 /* Sign-extension from a normal int to a long long. */
1428 fprintf (file, INTVAL (operand) < 0 ? "-1" : "0");
1429 else
1430 fprintf (file, "0x%x", (unsigned int)(INTVAL (x) >> 31 >> 1));
1431 return;
1432
1433 case CONST_DOUBLE:
1434 /* High part of a long long constant. */
1435 if (GET_MODE (operand) == VOIDmode)
1436 {
1437 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_HIGH (x));
1438 return;
1439 }
1440 else
1441 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1442
1443 case REG:
1444 /* Print reg + 1. Check that there's not an attempt to print
1445 high-parts of registers like stack-pointer or higher. */
1446 if (REGNO (operand) > STACK_POINTER_REGNUM - 2)
1447 LOSE_AND_RETURN ("bad register", operand);
1448 fprintf (file, "$%s", reg_names[REGNO (operand) + 1]);
1449 return;
1450
1451 case MEM:
1452 /* Adjust memory address to high part. */
1453 {
1454 rtx adj_mem = operand;
1455 int size
1456 = GET_MODE_BITSIZE (GET_MODE (operand)) / BITS_PER_UNIT;
1457
1458 /* Adjust so we can use two SImode in DImode.
1459 Calling adj_offsettable_operand will make sure it is an
1460 offsettable address. Don't do this for a postincrement
1461 though; it should remain as it was. */
1462 if (GET_CODE (XEXP (adj_mem, 0)) != POST_INC)
1463 adj_mem
1464 = adjust_address (adj_mem, GET_MODE (adj_mem), size / 2);
1465
1466 output_address (XEXP (adj_mem, 0));
1467 return;
1468 }
1469
1470 default:
1471 LOSE_AND_RETURN ("invalid operand for 'H' modifier", x);
1472 }
1473
1474 case 'L':
1475 /* Strip the MEM expression. */
1476 operand = XEXP (operand, 0);
1477 break;
1478
1479 case 'e':
1480 /* Print 's' if operand is SIGN_EXTEND or 'u' if ZERO_EXTEND unless
1481 cris_output_insn_is_bound is nonzero. */
1482 if (GET_CODE (operand) != SIGN_EXTEND
1483 && GET_CODE (operand) != ZERO_EXTEND
1484 && GET_CODE (operand) != CONST_INT)
1485 LOSE_AND_RETURN ("invalid operand for 'e' modifier", x);
1486
1487 if (cris_output_insn_is_bound)
1488 {
1489 cris_output_insn_is_bound = 0;
1490 return;
1491 }
1492
1493 putc (GET_CODE (operand) == SIGN_EXTEND
1494 || (GET_CODE (operand) == CONST_INT && INTVAL (operand) < 0)
1495 ? 's' : 'u', file);
1496 return;
1497
1498 case 'm':
1499 /* Print the size letter of the inner element. We can do it by
1500 calling ourselves with the 's' modifier. */
1501 if (GET_CODE (operand) != SIGN_EXTEND && GET_CODE (operand) != ZERO_EXTEND)
1502 LOSE_AND_RETURN ("invalid operand for 'm' modifier", x);
1503 cris_print_operand (file, XEXP (operand, 0), 's');
1504 return;
1505
1506 case 'M':
1507 /* Print the least significant part of operand. */
1508 if (GET_CODE (operand) == CONST_DOUBLE)
1509 {
1510 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
1511 return;
1512 }
1513 else if (HOST_BITS_PER_WIDE_INT > 32 && GET_CODE (operand) == CONST_INT)
1514 {
1515 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
1516 INTVAL (x) & ((unsigned int) 0x7fffffff * 2 + 1));
1517 return;
1518 }
1519 /* Otherwise the least significant part equals the normal part,
1520 so handle it normally. */
1521 break;
1522
1523 case 'A':
1524 /* When emitting an add for the high part of a DImode constant, we
1525 want to use addq for 0 and adds.w for -1. */
1526 if (GET_CODE (operand) != CONST_INT)
1527 LOSE_AND_RETURN ("invalid operand for 'A' modifier", x);
1528 fprintf (file, INTVAL (operand) < 0 ? "adds.w" : "addq");
1529 return;
1530
1531 case 'D':
1532 /* When emitting an sub for the high part of a DImode constant, we
1533 want to use subq for 0 and subs.w for -1. */
1534 if (GET_CODE (operand) != CONST_INT)
1535 LOSE_AND_RETURN ("invalid operand for 'D' modifier", x);
1536 fprintf (file, INTVAL (operand) < 0 ? "subs.w" : "subq");
1537 return;
1538
1539 case 'S':
1540 /* Print the operand as the index-part of an address.
1541 Easiest way out is to use cris_print_index. */
1542 cris_print_index (operand, file);
1543 return;
1544
1545 case 'T':
1546 /* Print the size letter for an operand to a MULT, which must be a
1547 const_int with a suitable value. */
1548 if (GET_CODE (operand) != CONST_INT || INTVAL (operand) > 4)
1549 LOSE_AND_RETURN ("invalid operand for 'T' modifier", x);
1550 fprintf (file, "%s", mults[INTVAL (operand)]);
1551 return;
1552
1553 case 0:
1554 /* No code, print as usual. */
1555 break;
1556
1557 default:
1558 LOSE_AND_RETURN ("invalid operand modifier letter", x);
1559 }
1560
1561 /* Print an operand as without a modifier letter. */
1562 switch (GET_CODE (operand))
1563 {
1564 case REG:
1565 if (REGNO (operand) > 15)
1566 internal_error ("internal error: bad register: %d", REGNO (operand));
1567 fprintf (file, "$%s", reg_names[REGNO (operand)]);
1568 return;
1569
1570 case MEM:
1571 output_address (XEXP (operand, 0));
1572 return;
1573
1574 case CONST_DOUBLE:
1575 if (GET_MODE (operand) == VOIDmode)
1576 /* A long long constant. */
1577 output_addr_const (file, operand);
1578 else
1579 {
1580 /* Only single precision is allowed as plain operands the
1581 moment. FIXME: REAL_VALUE_FROM_CONST_DOUBLE isn't
1582 documented. */
1583 REAL_VALUE_TYPE r;
1584 long l;
1585
1586 /* FIXME: Perhaps check overflow of the "single". */
1587 REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
1588 REAL_VALUE_TO_TARGET_SINGLE (r, l);
1589
1590 fprintf (file, "0x%lx", l);
1591 }
1592 return;
1593
1594 case UNSPEC:
1595 ASSERT_PLT_UNSPEC (operand);
1596 /* Fall through. */
1597
1598 case CONST:
1599 cris_output_addr_const (file, operand);
1600 return;
1601
1602 case MULT:
1603 case ASHIFT:
1604 {
1605 /* For a (MULT (reg X) const_int) we output "rX.S". */
1606 int i = GET_CODE (XEXP (operand, 1)) == CONST_INT
1607 ? INTVAL (XEXP (operand, 1)) : INTVAL (XEXP (operand, 0));
1608 rtx reg = GET_CODE (XEXP (operand, 1)) == CONST_INT
1609 ? XEXP (operand, 0) : XEXP (operand, 1);
1610
1611 if (GET_CODE (reg) != REG
1612 || (GET_CODE (XEXP (operand, 0)) != CONST_INT
1613 && GET_CODE (XEXP (operand, 1)) != CONST_INT))
1614 LOSE_AND_RETURN ("unexpected multiplicative operand", x);
1615
1616 cris_print_base (reg, file);
1617 fprintf (file, ".%c",
1618 i == 0 || (i == 1 && GET_CODE (operand) == MULT) ? 'b'
1619 : i == 4 ? 'd'
1620 : (i == 2 && GET_CODE (operand) == MULT) || i == 1 ? 'w'
1621 : 'd');
1622 return;
1623 }
1624
1625 default:
1626 /* No need to handle all strange variants, let output_addr_const
1627 do it for us. */
1628 if (CONSTANT_P (operand))
1629 {
1630 cris_output_addr_const (file, operand);
1631 return;
1632 }
1633
1634 LOSE_AND_RETURN ("unexpected operand", x);
1635 }
1636 }
1637
1638 /* The PRINT_OPERAND_ADDRESS worker. */
1639
1640 void
1641 cris_print_operand_address (FILE *file, rtx x)
1642 {
1643 /* All these were inside MEM:s so output indirection characters. */
1644 putc ('[', file);
1645
1646 if (CONSTANT_ADDRESS_P (x))
1647 cris_output_addr_const (file, x);
1648 else if (BASE_OR_AUTOINCR_P (x))
1649 cris_print_base (x, file);
1650 else if (GET_CODE (x) == PLUS)
1651 {
1652 rtx x1, x2;
1653
1654 x1 = XEXP (x, 0);
1655 x2 = XEXP (x, 1);
1656 if (BASE_P (x1))
1657 {
1658 cris_print_base (x1, file);
1659 cris_print_index (x2, file);
1660 }
1661 else if (BASE_P (x2))
1662 {
1663 cris_print_base (x2, file);
1664 cris_print_index (x1, file);
1665 }
1666 else
1667 LOSE_AND_RETURN ("unrecognized address", x);
1668 }
1669 else if (GET_CODE (x) == MEM)
1670 {
1671 /* A DIP. Output more indirection characters. */
1672 putc ('[', file);
1673 cris_print_base (XEXP (x, 0), file);
1674 putc (']', file);
1675 }
1676 else
1677 LOSE_AND_RETURN ("unrecognized address", x);
1678
1679 putc (']', file);
1680 }
1681
1682 /* The RETURN_ADDR_RTX worker.
1683 We mark that the return address is used, either by EH or
1684 __builtin_return_address, for use by the function prologue and
1685 epilogue. FIXME: This isn't optimal; we just use the mark in the
1686 prologue and epilogue to say that the return address is to be stored
1687 in the stack frame. We could return SRP for leaf-functions and use the
1688 initial-value machinery. */
1689
1690 rtx
1691 cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED)
1692 {
1693 cfun->machine->needs_return_address_on_stack = 1;
1694
1695 /* The return-address is stored just above the saved frame-pointer (if
1696 present). Apparently we can't eliminate from the frame-pointer in
1697 that direction, so use the incoming args (maybe pretended) pointer. */
1698 return count == 0
1699 ? gen_rtx_MEM (Pmode, plus_constant (virtual_incoming_args_rtx, -4))
1700 : NULL_RTX;
1701 }
1702
1703 /* Accessor used in cris.md:return because cfun->machine isn't available
1704 there. */
1705
1706 int
1707 cris_return_address_on_stack ()
1708 {
1709 return cfun->machine->needs_return_address_on_stack;
1710 }
1711
1712 /* This used to be the INITIAL_FRAME_POINTER_OFFSET worker; now only
1713 handles FP -> SP elimination offset. */
1714
1715 static int
1716 cris_initial_frame_pointer_offset (void)
1717 {
1718 int regno;
1719
1720 /* Initial offset is 0 if we don't have a frame pointer. */
1721 int offs = 0;
1722
1723 /* And 4 for each register pushed. */
1724 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1725 if ((((regs_ever_live[regno]
1726 && !call_used_regs[regno])
1727 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
1728 && (current_function_uses_pic_offset_table
1729 /* It is saved anyway, if there would be a gap. */
1730 || (flag_pic
1731 && regs_ever_live[regno + 1]
1732 && !call_used_regs[regno + 1]))))
1733 && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed)
1734 && regno != CRIS_SRP_REGNUM)
1735 || (current_function_calls_eh_return
1736 && (regno == EH_RETURN_DATA_REGNO (0)
1737 || regno == EH_RETURN_DATA_REGNO (1)
1738 || regno == EH_RETURN_DATA_REGNO (2)
1739 || regno == EH_RETURN_DATA_REGNO (3))))
1740 offs += 4;
1741
1742 /* And then, last, we add the locals allocated. */
1743 offs += get_frame_size ();
1744
1745 /* And more; the accumulated args size. */
1746 offs += current_function_outgoing_args_size;
1747
1748 /* Then round it off, in case we use aligned stack. */
1749 if (TARGET_STACK_ALIGN)
1750 offs = TARGET_ALIGN_BY_32 ? (offs + 3) & ~3 : (offs + 1) & ~1;
1751
1752 return offs;
1753 }
1754
1755 /* The INITIAL_ELIMINATION_OFFSET worker.
1756 Calculate the difference between imaginary registers such as frame
1757 pointer and the stack pointer. Used to eliminate the frame pointer
1758 and imaginary arg pointer. */
1759
1760 int
1761 cris_initial_elimination_offset (int fromreg, int toreg)
1762 {
1763 int fp_sp_offset
1764 = cris_initial_frame_pointer_offset ();
1765
1766 /* We should be able to use regs_ever_live and related prologue
1767 information here, or alpha should not as well. */
1768 int return_address_on_stack
1769 = regs_ever_live[CRIS_SRP_REGNUM]
1770 || cfun->machine->needs_return_address_on_stack != 0;
1771
1772 /* Here we act as if the frame-pointer were needed. */
1773 int ap_fp_offset = 4 + (return_address_on_stack ? 4 : 0);
1774
1775 if (fromreg == ARG_POINTER_REGNUM
1776 && toreg == FRAME_POINTER_REGNUM)
1777 return ap_fp_offset;
1778
1779 /* Between the frame pointer and the stack are only "normal" stack
1780 variables and saved registers. */
1781 if (fromreg == FRAME_POINTER_REGNUM
1782 && toreg == STACK_POINTER_REGNUM)
1783 return fp_sp_offset;
1784
1785 /* We need to balance out the frame pointer here. */
1786 if (fromreg == ARG_POINTER_REGNUM
1787 && toreg == STACK_POINTER_REGNUM)
1788 return ap_fp_offset + fp_sp_offset - 4;
1789
1790 abort ();
1791 }
1792
1793 /* This function looks into the pattern to see how this insn affects
1794 condition codes.
1795
1796 Used when to eliminate test insns before a condition-code user,
1797 such as a "scc" insn or a conditional branch. This includes
1798 checking if the entities that cc was updated by, are changed by the
1799 operation.
1800
1801 Currently a jumble of the old peek-inside-the-insn and the newer
1802 check-cc-attribute methods. */
1803
1804 void
1805 cris_notice_update_cc (rtx exp, rtx insn)
1806 {
1807 /* Check if user specified "-mcc-init" as a bug-workaround. FIXME:
1808 TARGET_CCINIT does not work; we must set CC_REVERSED as below.
1809 Several testcases will otherwise fail, for example
1810 gcc.c-torture/execute/20000217-1.c -O0 and -O1. */
1811 if (TARGET_CCINIT)
1812 {
1813 CC_STATUS_INIT;
1814 return;
1815 }
1816
1817 /* Slowly, we're converting to using attributes to control the setting
1818 of condition-code status. */
1819 switch (get_attr_cc (insn))
1820 {
1821 case CC_NONE:
1822 /* Even if it is "none", a setting may clobber a previous
1823 cc-value, so check. */
1824 if (GET_CODE (exp) == SET)
1825 {
1826 if (cc_status.value1
1827 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1828 cc_status.value1))
1829 cc_status.value1 = 0;
1830
1831 if (cc_status.value2
1832 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1833 cc_status.value2))
1834 cc_status.value2 = 0;
1835 }
1836 return;
1837
1838 case CC_CLOBBER:
1839 CC_STATUS_INIT;
1840 break;
1841
1842 case CC_NORMAL:
1843 /* Which means, for:
1844 (set (cc0) (...)):
1845 CC is (...).
1846
1847 (set (reg) (...)):
1848 CC is (reg) and (...) - unless (...) is 0, then CC does not change.
1849 CC_NO_OVERFLOW unless (...) is reg or mem.
1850
1851 (set (mem) (...)):
1852 CC does not change.
1853
1854 (set (pc) (...)):
1855 CC does not change.
1856
1857 (parallel
1858 (set (reg1) (mem (bdap/biap)))
1859 (set (reg2) (bdap/biap))):
1860 CC is (reg1) and (mem (reg2))
1861
1862 (parallel
1863 (set (mem (bdap/biap)) (reg1)) [or 0]
1864 (set (reg2) (bdap/biap))):
1865 CC does not change.
1866
1867 (where reg and mem includes strict_low_parts variants thereof)
1868
1869 For all others, assume CC is clobbered.
1870 Note that we do not have to care about setting CC_NO_OVERFLOW,
1871 since the overflow flag is set to 0 (i.e. right) for
1872 instructions where it does not have any sane sense, but where
1873 other flags have meanings. (This includes shifts; the carry is
1874 not set by them).
1875
1876 Note that there are other parallel constructs we could match,
1877 but we don't do that yet. */
1878
1879 if (GET_CODE (exp) == SET)
1880 {
1881 /* FIXME: Check when this happens. It looks like we should
1882 actually do a CC_STATUS_INIT here to be safe. */
1883 if (SET_DEST (exp) == pc_rtx)
1884 return;
1885
1886 /* Record CC0 changes, so we do not have to output multiple
1887 test insns. */
1888 if (SET_DEST (exp) == cc0_rtx)
1889 {
1890 cc_status.value1 = SET_SRC (exp);
1891 cc_status.value2 = 0;
1892
1893 /* Handle flags for the special btstq on one bit. */
1894 if (GET_CODE (SET_SRC (exp)) == ZERO_EXTRACT
1895 && XEXP (SET_SRC (exp), 1) == const1_rtx)
1896 {
1897 if (GET_CODE (XEXP (SET_SRC (exp), 0)) == CONST_INT)
1898 /* Using cmpq. */
1899 cc_status.flags = CC_INVERTED;
1900 else
1901 /* A one-bit btstq. */
1902 cc_status.flags = CC_Z_IN_NOT_N;
1903 }
1904 else
1905 cc_status.flags = 0;
1906
1907 if (GET_CODE (SET_SRC (exp)) == COMPARE)
1908 {
1909 if (!REG_P (XEXP (SET_SRC (exp), 0))
1910 && XEXP (SET_SRC (exp), 1) != const0_rtx)
1911 /* For some reason gcc will not canonicalize compare
1912 operations, reversing the sign by itself if
1913 operands are in wrong order. */
1914 /* (But NOT inverted; eq is still eq.) */
1915 cc_status.flags = CC_REVERSED;
1916
1917 /* This seems to be overlooked by gcc. FIXME: Check again.
1918 FIXME: Is it really safe? */
1919 cc_status.value2
1920 = gen_rtx_MINUS (GET_MODE (SET_SRC (exp)),
1921 XEXP (SET_SRC (exp), 0),
1922 XEXP (SET_SRC (exp), 1));
1923 }
1924 return;
1925 }
1926 else if (REG_P (SET_DEST (exp))
1927 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1928 && REG_P (XEXP (SET_DEST (exp), 0))))
1929 {
1930 /* A register is set; normally CC is set to show that no
1931 test insn is needed. Catch the exceptions. */
1932
1933 /* If not to cc0, then no "set"s in non-natural mode give
1934 ok cc0... */
1935 if (GET_MODE_SIZE (GET_MODE (SET_DEST (exp))) > UNITS_PER_WORD
1936 || GET_MODE_CLASS (GET_MODE (SET_DEST (exp))) == MODE_FLOAT)
1937 {
1938 /* ... except add:s and sub:s in DImode. */
1939 if (GET_MODE (SET_DEST (exp)) == DImode
1940 && (GET_CODE (SET_SRC (exp)) == PLUS
1941 || GET_CODE (SET_SRC (exp)) == MINUS))
1942 {
1943 cc_status.flags = 0;
1944 cc_status.value1 = SET_DEST (exp);
1945 cc_status.value2 = SET_SRC (exp);
1946
1947 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1948 cc_status.value2))
1949 cc_status.value2 = 0;
1950
1951 /* Add and sub may set V, which gets us
1952 unoptimizable results in "gt" and "le" condition
1953 codes. */
1954 cc_status.flags |= CC_NO_OVERFLOW;
1955
1956 return;
1957 }
1958 }
1959 else if (SET_SRC (exp) == const0_rtx)
1960 {
1961 /* There's no CC0 change when clearing a register or
1962 memory. Just check for overlap. */
1963 if ((cc_status.value1
1964 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1965 cc_status.value1)))
1966 cc_status.value1 = 0;
1967
1968 if ((cc_status.value2
1969 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
1970 cc_status.value2)))
1971 cc_status.value2 = 0;
1972
1973 return;
1974 }
1975 else
1976 {
1977 cc_status.flags = 0;
1978 cc_status.value1 = SET_DEST (exp);
1979 cc_status.value2 = SET_SRC (exp);
1980
1981 if (cris_reg_overlap_mentioned_p (cc_status.value1,
1982 cc_status.value2))
1983 cc_status.value2 = 0;
1984
1985 /* Some operations may set V, which gets us
1986 unoptimizable results in "gt" and "le" condition
1987 codes. */
1988 if (GET_CODE (SET_SRC (exp)) == PLUS
1989 || GET_CODE (SET_SRC (exp)) == MINUS
1990 || GET_CODE (SET_SRC (exp)) == NEG)
1991 cc_status.flags |= CC_NO_OVERFLOW;
1992
1993 return;
1994 }
1995 }
1996 else if (GET_CODE (SET_DEST (exp)) == MEM
1997 || (GET_CODE (SET_DEST (exp)) == STRICT_LOW_PART
1998 && GET_CODE (XEXP (SET_DEST (exp), 0)) == MEM))
1999 {
2000 /* When SET to MEM, then CC is not changed (except for
2001 overlap). */
2002 if ((cc_status.value1
2003 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
2004 cc_status.value1)))
2005 cc_status.value1 = 0;
2006
2007 if ((cc_status.value2
2008 && cris_reg_overlap_mentioned_p (SET_DEST (exp),
2009 cc_status.value2)))
2010 cc_status.value2 = 0;
2011
2012 return;
2013 }
2014 }
2015 else if (GET_CODE (exp) == PARALLEL)
2016 {
2017 if (GET_CODE (XVECEXP (exp, 0, 0)) == SET
2018 && GET_CODE (XVECEXP (exp, 0, 1)) == SET
2019 && REG_P (XEXP (XVECEXP (exp, 0, 1), 0)))
2020 {
2021 if (REG_P (XEXP (XVECEXP (exp, 0, 0), 0))
2022 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 1)) == MEM)
2023 {
2024 /* For "move.S [rx=ry+o],rz", say CC reflects
2025 value1=rz and value2=[rx] */
2026 cc_status.value1 = XEXP (XVECEXP (exp, 0, 0), 0);
2027 cc_status.value2
2028 = replace_equiv_address (XEXP (XVECEXP (exp, 0, 0), 1),
2029 XEXP (XVECEXP (exp, 0, 1), 0));
2030 cc_status.flags = 0;
2031
2032 /* Huh? A side-effect cannot change the destination
2033 register. */
2034 if (cris_reg_overlap_mentioned_p (cc_status.value1,
2035 cc_status.value2))
2036 internal_error ("internal error: sideeffect-insn affecting main effect");
2037 return;
2038 }
2039 else if ((REG_P (XEXP (XVECEXP (exp, 0, 0), 1))
2040 || XEXP (XVECEXP (exp, 0, 0), 1) == const0_rtx)
2041 && GET_CODE (XEXP (XVECEXP (exp, 0, 0), 0)) == MEM)
2042 {
2043 /* For "move.S rz,[rx=ry+o]" and "clear.S [rx=ry+o]",
2044 say flags are not changed, except for overlap. */
2045 if (cc_status.value1
2046 && cris_reg_overlap_mentioned_p (XEXP
2047 (XVECEXP
2048 (exp, 0, 0), 0),
2049 cc_status.value1))
2050 cc_status.value1 = 0;
2051
2052 if (cc_status.value1
2053 && cris_reg_overlap_mentioned_p (XEXP
2054 (XVECEXP
2055 (exp, 0, 1), 0),
2056 cc_status.value1))
2057 cc_status.value1 = 0;
2058
2059 if (cc_status.value2
2060 && cris_reg_overlap_mentioned_p (XEXP
2061 (XVECEXP
2062 (exp, 0, 0), 0),
2063 cc_status.value2))
2064 cc_status.value2 = 0;
2065
2066 if (cc_status.value2
2067 && cris_reg_overlap_mentioned_p (XEXP
2068 (XVECEXP
2069 (exp, 0, 1), 0),
2070 cc_status.value2))
2071 cc_status.value2 = 0;
2072
2073 return;
2074 }
2075 }
2076 }
2077 break;
2078
2079 default:
2080 /* Unknown cc_attr value. */
2081 abort ();
2082 }
2083
2084 CC_STATUS_INIT;
2085 }
2086
2087 /* Return != 0 if the return sequence for the current function is short,
2088 like "ret" or "jump [sp+]". Prior to reloading, we can't tell how
2089 many registers must be saved, so return 0 then. */
2090
2091 int
2092 cris_simple_epilogue (void)
2093 {
2094 int regno;
2095 int reglimit = STACK_POINTER_REGNUM;
2096 int lastreg = -1;
2097
2098 if (! reload_completed
2099 || frame_pointer_needed
2100 || get_frame_size () != 0
2101 || current_function_pretend_args_size
2102 || current_function_args_size
2103 || current_function_outgoing_args_size
2104 || current_function_calls_eh_return
2105
2106 /* If we're not supposed to emit prologue and epilogue, we must
2107 not emit return-type instructions. */
2108 || !TARGET_PROLOGUE_EPILOGUE)
2109 return 0;
2110
2111 /* We allow a "movem [sp+],rN" to sit in front if the "jump [sp+]" or
2112 in the delay-slot of the "ret". */
2113 for (regno = 0; regno < reglimit; regno++)
2114 if ((regs_ever_live[regno] && ! call_used_regs[regno])
2115 || (regno == (int) PIC_OFFSET_TABLE_REGNUM
2116 && (current_function_uses_pic_offset_table
2117 /* It is saved anyway, if there would be a gap. */
2118 || (flag_pic
2119 && regs_ever_live[regno + 1]
2120 && !call_used_regs[regno + 1]))))
2121 {
2122 if (lastreg != regno - 1)
2123 return 0;
2124 lastreg = regno;
2125 }
2126
2127 return 1;
2128 }
2129
2130 /* Compute a (partial) cost for rtx X. Return true if the complete
2131 cost has been computed, and false if subexpressions should be
2132 scanned. In either case, *TOTAL contains the cost result. */
2133
2134 static bool
2135 cris_rtx_costs (rtx x, int code, int outer_code, int *total)
2136 {
2137 switch (code)
2138 {
2139 case CONST_INT:
2140 {
2141 HOST_WIDE_INT val = INTVAL (x);
2142 if (val == 0)
2143 *total = 0;
2144 else if (val < 32 && val >= -32)
2145 *total = 1;
2146 /* Eight or 16 bits are a word and cycle more expensive. */
2147 else if (val <= 32767 && val >= -32768)
2148 *total = 2;
2149 /* A 32 bit constant (or very seldom, unsigned 16 bits) costs
2150 another word. FIXME: This isn't linear to 16 bits. */
2151 else
2152 *total = 4;
2153 return true;
2154 }
2155
2156 case LABEL_REF:
2157 *total = 6;
2158 return true;
2159
2160 case CONST:
2161 case SYMBOL_REF:
2162 /* For PIC, we need a prefix (if it isn't already there),
2163 and the PIC register. For a global PIC symbol, we also
2164 need a read of the GOT. */
2165 if (flag_pic)
2166 {
2167 if (cris_got_symbol (x))
2168 *total = 2 + 4 + 6;
2169 else
2170 *total = 2 + 6;
2171 }
2172 else
2173 *total = 6;
2174 return true;
2175
2176 case CONST_DOUBLE:
2177 if (x != CONST0_RTX (GET_MODE (x) == VOIDmode ? DImode : GET_MODE (x)))
2178 *total = 12;
2179 else
2180 /* Make 0.0 cheap, else test-insns will not be used. */
2181 *total = 0;
2182 return true;
2183
2184 case MULT:
2185 /* Identify values that are no powers of two. Powers of 2 are
2186 taken care of already and those values should not be changed. */
2187 if (GET_CODE (XEXP (x, 1)) != CONST_INT
2188 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
2189 {
2190 /* If we have a multiply insn, then the cost is between
2191 1 and 2 "fast" instructions. */
2192 if (TARGET_HAS_MUL_INSNS)
2193 {
2194 *total = COSTS_N_INSNS (1) + COSTS_N_INSNS (1) / 2;
2195 return true;
2196 }
2197
2198 /* Estimate as 4 + 4 * #ofbits. */
2199 *total = COSTS_N_INSNS (132);
2200 return true;
2201 }
2202 return false;
2203
2204 case UDIV:
2205 case MOD:
2206 case UMOD:
2207 case DIV:
2208 if (GET_CODE (XEXP (x, 1)) != CONST_INT
2209 || exact_log2 (INTVAL (XEXP (x, 1)) < 0))
2210 {
2211 /* Estimate this as 4 + 8 * #of bits. */
2212 *total = COSTS_N_INSNS (260);
2213 return true;
2214 }
2215 return false;
2216
2217 case AND:
2218 if (GET_CODE (XEXP (x, 1)) == CONST_INT
2219 /* Two constants may actually happen before optimization. */
2220 && GET_CODE (XEXP (x, 0)) != CONST_INT
2221 && !CONST_OK_FOR_LETTER_P (INTVAL (XEXP (x, 1)), 'I'))
2222 {
2223 *total = (rtx_cost (XEXP (x, 0), outer_code) + 2
2224 + 2 * GET_MODE_NUNITS (GET_MODE (XEXP (x, 0))));
2225 return true;
2226 }
2227 return false;
2228
2229 case ZERO_EXTEND: case SIGN_EXTEND:
2230 *total = rtx_cost (XEXP (x, 0), outer_code);
2231 return true;
2232
2233 default:
2234 return false;
2235 }
2236 }
2237
2238 /* The ADDRESS_COST worker. */
2239
2240 static int
2241 cris_address_cost (rtx x)
2242 {
2243 /* The metric to use for the cost-macros is unclear.
2244 The metric used here is (the number of cycles needed) / 2,
2245 where we consider equal a cycle for a word of code and a cycle to
2246 read memory. */
2247
2248 /* The cheapest addressing modes get 0, since nothing extra is needed. */
2249 if (BASE_OR_AUTOINCR_P (x))
2250 return 0;
2251
2252 /* An indirect mem must be a DIP. This means two bytes extra for code,
2253 and 4 bytes extra for memory read, i.e. (2 + 4) / 2. */
2254 if (GET_CODE (x) == MEM)
2255 return (2 + 4) / 2;
2256
2257 /* Assume (2 + 4) / 2 for a single constant; a dword, since it needs
2258 an extra DIP prefix and 4 bytes of constant in most cases.
2259 For PIC and a symbol with a GOT entry, we double the cost since we
2260 add a [rPIC+...] offset. A GOT-less symbol uses a BDAP prefix
2261 equivalent to the DIP prefix for non-PIC, hence the same cost. */
2262 if (CONSTANT_P (x))
2263 return flag_pic && cris_got_symbol (x) ? 2 * (2 + 4) / 2 : (2 + 4) / 2;
2264
2265 /* Handle BIAP and BDAP prefixes. */
2266 if (GET_CODE (x) == PLUS)
2267 {
2268 rtx tem1 = XEXP (x, 0);
2269 rtx tem2 = XEXP (x, 1);
2270
2271 /* A BIAP is 2 extra bytes for the prefix insn, nothing more. We
2272 recognize the typical MULT which is always in tem1 because of
2273 insn canonicalization. */
2274 if ((GET_CODE (tem1) == MULT && BIAP_INDEX_P (tem1))
2275 || REG_P (tem1))
2276 return 2 / 2;
2277
2278 /* A BDAP (quick) is 2 extra bytes. Any constant operand to the
2279 PLUS is always found in tem2. */
2280 if (GET_CODE (tem2) == CONST_INT
2281 && INTVAL (tem2) < 128 && INTVAL (tem2) >= -128)
2282 return 2 / 2;
2283
2284 /* A BDAP -32768 .. 32767 is like BDAP quick, but with 2 extra
2285 bytes. */
2286 if (GET_CODE (tem2) == CONST_INT
2287 && CONST_OK_FOR_LETTER_P (INTVAL (tem2), 'L'))
2288 return (2 + 2) / 2;
2289
2290 /* A BDAP with some other constant is 2 bytes extra. */
2291 if (CONSTANT_P (tem2))
2292 return (2 + 2 + 2) / 2;
2293
2294 /* BDAP with something indirect should have a higher cost than
2295 BIAP with register. FIXME: Should it cost like a MEM or more? */
2296 /* Don't need to check it, it's the only one left.
2297 FIXME: There was a REG test missing, perhaps there are others.
2298 Think more. */
2299 return (2 + 2 + 2) / 2;
2300 }
2301
2302 /* What else? Return a high cost. It matters only for valid
2303 addressing modes. */
2304 return 10;
2305 }
2306
2307 /* Check various objections to the side-effect. Used in the test-part
2308 of an anonymous insn describing an insn with a possible side-effect.
2309 Returns nonzero if the implied side-effect is ok.
2310
2311 code : PLUS or MULT
2312 ops : An array of rtx:es. lreg, rreg, rval,
2313 The variables multop and other_op are indexes into this,
2314 or -1 if they are not applicable.
2315 lreg : The register that gets assigned in the side-effect.
2316 rreg : One register in the side-effect expression
2317 rval : The other register, or an int.
2318 multop : An integer to multiply rval with.
2319 other_op : One of the entities of the main effect,
2320 whose mode we must consider. */
2321
2322 int
2323 cris_side_effect_mode_ok (enum rtx_code code, rtx *ops,
2324 int lreg, int rreg, int rval,
2325 int multop, int other_op)
2326 {
2327 /* Find what value to multiply with, for rx =ry + rz * n. */
2328 int mult = multop < 0 ? 1 : INTVAL (ops[multop]);
2329
2330 rtx reg_rtx = ops[rreg];
2331 rtx val_rtx = ops[rval];
2332
2333 /* The operands may be swapped. Canonicalize them in reg_rtx and
2334 val_rtx, where reg_rtx always is a reg (for this constraint to
2335 match). */
2336 if (! BASE_P (reg_rtx))
2337 reg_rtx = val_rtx, val_rtx = ops[rreg];
2338
2339 /* Don't forget to check that reg_rtx really is a reg. If it isn't,
2340 we have no business. */
2341 if (! BASE_P (reg_rtx))
2342 return 0;
2343
2344 /* Don't do this when -mno-split. */
2345 if (!TARGET_SIDE_EFFECT_PREFIXES)
2346 return 0;
2347
2348 /* The mult expression may be hidden in lreg. FIXME: Add more
2349 commentary about that. */
2350 if (GET_CODE (val_rtx) == MULT)
2351 {
2352 mult = INTVAL (XEXP (val_rtx, 1));
2353 val_rtx = XEXP (val_rtx, 0);
2354 code = MULT;
2355 }
2356
2357 /* First check the "other operand". */
2358 if (other_op >= 0)
2359 {
2360 if (GET_MODE_SIZE (GET_MODE (ops[other_op])) > UNITS_PER_WORD)
2361 return 0;
2362
2363 /* Check if the lvalue register is the same as the "other
2364 operand". If so, the result is undefined and we shouldn't do
2365 this. FIXME: Check again. */
2366 if ((BASE_P (ops[lreg])
2367 && BASE_P (ops[other_op])
2368 && REGNO (ops[lreg]) == REGNO (ops[other_op]))
2369 || rtx_equal_p (ops[other_op], ops[lreg]))
2370 return 0;
2371 }
2372
2373 /* Do not accept frame_pointer_rtx as any operand. */
2374 if (ops[lreg] == frame_pointer_rtx || ops[rreg] == frame_pointer_rtx
2375 || ops[rval] == frame_pointer_rtx
2376 || (other_op >= 0 && ops[other_op] == frame_pointer_rtx))
2377 return 0;
2378
2379 if (code == PLUS
2380 && ! BASE_P (val_rtx))
2381 {
2382
2383 /* Do not allow rx = rx + n if a normal add or sub with same size
2384 would do. */
2385 if (rtx_equal_p (ops[lreg], reg_rtx)
2386 && GET_CODE (val_rtx) == CONST_INT
2387 && (INTVAL (val_rtx) <= 63 && INTVAL (val_rtx) >= -63))
2388 return 0;
2389
2390 /* Check allowed cases, like [r(+)?].[bwd] and const.
2391 A symbol is not allowed with PIC. */
2392 if (CONSTANT_P (val_rtx))
2393 return flag_pic == 0 || cris_symbol (val_rtx) == 0;
2394
2395 if (GET_CODE (val_rtx) == MEM
2396 && BASE_OR_AUTOINCR_P (XEXP (val_rtx, 0)))
2397 return 1;
2398
2399 if (GET_CODE (val_rtx) == SIGN_EXTEND
2400 && GET_CODE (XEXP (val_rtx, 0)) == MEM
2401 && BASE_OR_AUTOINCR_P (XEXP (XEXP (val_rtx, 0), 0)))
2402 return 1;
2403
2404 /* If we got here, it's not a valid addressing mode. */
2405 return 0;
2406 }
2407 else if (code == MULT
2408 || (code == PLUS && BASE_P (val_rtx)))
2409 {
2410 /* Do not allow rx = rx + ry.S, since it doesn't give better code. */
2411 if (rtx_equal_p (ops[lreg], reg_rtx)
2412 || (mult == 1 && rtx_equal_p (ops[lreg], val_rtx)))
2413 return 0;
2414
2415 /* Do not allow bad multiply-values. */
2416 if (mult != 1 && mult != 2 && mult != 4)
2417 return 0;
2418
2419 /* Only allow r + ... */
2420 if (! BASE_P (reg_rtx))
2421 return 0;
2422
2423 /* If we got here, all seems ok.
2424 (All checks need to be done above). */
2425 return 1;
2426 }
2427
2428 /* If we get here, the caller got its initial tests wrong. */
2429 internal_error ("internal error: cris_side_effect_mode_ok with bad operands");
2430 }
2431
2432 /* The function reg_overlap_mentioned_p in CVS (still as of 2001-05-16)
2433 does not handle the case where the IN operand is strict_low_part; it
2434 does handle it for X. Test-case in Axis-20010516. This function takes
2435 care of that for THIS port. FIXME: strict_low_part is going away
2436 anyway. */
2437
2438 static int
2439 cris_reg_overlap_mentioned_p (rtx x, rtx in)
2440 {
2441 /* The function reg_overlap_mentioned now handles when X is
2442 strict_low_part, but not when IN is a STRICT_LOW_PART. */
2443 if (GET_CODE (in) == STRICT_LOW_PART)
2444 in = XEXP (in, 0);
2445
2446 return reg_overlap_mentioned_p (x, in);
2447 }
2448
2449 /* The TARGET_ASM_NAMED_SECTION worker.
2450 We just dispatch to the functions for ELF and a.out. */
2451
2452 void
2453 cris_target_asm_named_section (const char *name, unsigned int flags)
2454 {
2455 if (! TARGET_ELF)
2456 default_no_named_section (name, flags);
2457 else
2458 default_elf_asm_named_section (name, flags);
2459 }
2460
2461 /* The LEGITIMATE_PIC_OPERAND_P worker. */
2462
2463 int
2464 cris_legitimate_pic_operand (rtx x)
2465 {
2466 /* The PIC representation of a symbol with a GOT entry will be (for
2467 example; relocations differ):
2468 sym => [rPIC+sym:GOT]
2469 and for a GOT-less symbol it will be (for example, relocation differ):
2470 sym => rPIC+sym:GOTOFF
2471 so only a symbol with a GOT is by itself a valid operand, and it
2472 can't be a sum of a symbol and an offset. */
2473 return ! cris_symbol (x) || cris_got_symbol (x);
2474 }
2475
2476 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2477 CONSTANT_P. */
2478
2479 int
2480 cris_symbol (rtx x)
2481 {
2482 switch (GET_CODE (x))
2483 {
2484 case SYMBOL_REF:
2485 case LABEL_REF:
2486 return 1;
2487
2488 case UNSPEC:
2489 /* A PLT reference. */
2490 ASSERT_PLT_UNSPEC (x);
2491 return 1;
2492
2493 case CONST:
2494 return cris_symbol (XEXP (x, 0));
2495
2496 case PLUS:
2497 case MINUS:
2498 return cris_symbol (XEXP (x, 0)) || cris_symbol (XEXP (x, 1));
2499
2500 case CONST_INT:
2501 case CONST_DOUBLE:
2502 return 0;
2503
2504 default:
2505 fatal_insn ("unrecognized supposed constant", x);
2506 }
2507
2508 return 1;
2509 }
2510
2511 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2512 CONSTANT_P, and the symbol does not need a GOT entry. Also set
2513 current_function_uses_pic_offset_table if we're generating PIC and ever
2514 see something that would need one. */
2515
2516 int
2517 cris_gotless_symbol (rtx x)
2518 {
2519 #ifdef ENABLE_CHECKING
2520 if (!flag_pic)
2521 abort ();
2522 #endif
2523
2524 switch (GET_CODE (x))
2525 {
2526 case UNSPEC:
2527 ASSERT_PLT_UNSPEC (x);
2528 return 1;
2529
2530 case SYMBOL_REF:
2531 if (cfun != NULL)
2532 current_function_uses_pic_offset_table = 1;
2533 return SYMBOL_REF_LOCAL_P (x);
2534
2535 case LABEL_REF:
2536 /* We don't set current_function_uses_pic_offset_table for
2537 LABEL_REF:s in here, since they are almost always originating
2538 from some branch. The only time it does not come from a label is
2539 when GCC does something like __builtin_setjmp. Then we get the
2540 LABEL_REF from the movsi expander, so we mark it there as a
2541 special case. */
2542 return 1;
2543
2544 case CONST:
2545 return cris_gotless_symbol (XEXP (x, 0));
2546
2547 case PLUS:
2548 case MINUS:
2549 {
2550 int x0 = cris_gotless_symbol (XEXP (x, 0)) != 0;
2551 int x1 = cris_gotless_symbol (XEXP (x, 1)) != 0;
2552
2553 /* One and only one of them must be a local symbol. Neither must
2554 be some other, more general kind of symbol. */
2555 return
2556 (x0 ^ x1)
2557 && ! (x0 == 0 && cris_symbol (XEXP (x, 0)))
2558 && ! (x1 == 0 && cris_symbol (XEXP (x, 1)));
2559 }
2560
2561 case CONST_INT:
2562 case CONST_DOUBLE:
2563 return 0;
2564
2565 default:
2566 fatal_insn ("unrecognized supposed constant", x);
2567 }
2568
2569 return 1;
2570 }
2571
2572 /* Return nonzero if there's a SYMBOL_REF or LABEL_REF hiding inside this
2573 CONSTANT_P, and the symbol needs a GOT entry. */
2574
2575 int
2576 cris_got_symbol (rtx x)
2577 {
2578 #ifdef ENABLE_CHECKING
2579 if (!flag_pic)
2580 abort ();
2581 #endif
2582
2583 switch (GET_CODE (x))
2584 {
2585 case UNSPEC:
2586 ASSERT_PLT_UNSPEC (x);
2587 return 0;
2588
2589 case SYMBOL_REF:
2590 if (cfun != NULL)
2591 current_function_uses_pic_offset_table = 1;
2592 return ! SYMBOL_REF_LOCAL_P (x);
2593
2594 case CONST:
2595 return cris_got_symbol (XEXP (x, 0));
2596
2597 case LABEL_REF:
2598 /* A LABEL_REF is never visible as a symbol outside the local
2599 function. */
2600 case PLUS:
2601 case MINUS:
2602 /* Nope, can't access the GOT for "symbol + offset". */
2603 return 0;
2604
2605 case CONST_INT:
2606 case CONST_DOUBLE:
2607 return 0;
2608
2609 default:
2610 fatal_insn ("unrecognized supposed constant in cris_global_pic_symbol",
2611 x);
2612 }
2613
2614 return 1;
2615 }
2616
2617 /* The OVERRIDE_OPTIONS worker.
2618 As is the norm, this also parses -mfoo=bar type parameters. */
2619
2620 void
2621 cris_override_options (void)
2622 {
2623 if (cris_max_stackframe_str)
2624 {
2625 cris_max_stackframe = atoi (cris_max_stackframe_str);
2626
2627 /* Do some sanity checking. */
2628 if (cris_max_stackframe < 0 || cris_max_stackframe > 0x20000000)
2629 internal_error ("-max-stackframe=%d is not usable, not between 0 and %d",
2630 cris_max_stackframe, 0x20000000);
2631 }
2632
2633 /* Let "-metrax4" and "-metrax100" change the cpu version. */
2634 if (TARGET_SVINTO && cris_cpu_version < CRIS_CPU_SVINTO)
2635 cris_cpu_version = CRIS_CPU_SVINTO;
2636 else if (TARGET_ETRAX4_ADD && cris_cpu_version < CRIS_CPU_ETRAX4)
2637 cris_cpu_version = CRIS_CPU_ETRAX4;
2638
2639 /* Parse -march=... and its synonym, the deprecated -mcpu=... */
2640 if (cris_cpu_str)
2641 {
2642 cris_cpu_version
2643 = (*cris_cpu_str == 'v' ? atoi (cris_cpu_str + 1) : -1);
2644
2645 if (strcmp ("etrax4", cris_cpu_str) == 0)
2646 cris_cpu_version = 3;
2647
2648 if (strcmp ("svinto", cris_cpu_str) == 0
2649 || strcmp ("etrax100", cris_cpu_str) == 0)
2650 cris_cpu_version = 8;
2651
2652 if (strcmp ("ng", cris_cpu_str) == 0
2653 || strcmp ("etrax100lx", cris_cpu_str) == 0)
2654 cris_cpu_version = 10;
2655
2656 if (cris_cpu_version < 0 || cris_cpu_version > 10)
2657 error ("unknown CRIS version specification in -march= or -mcpu= : %s",
2658 cris_cpu_str);
2659
2660 /* Set the target flags. */
2661 if (cris_cpu_version >= CRIS_CPU_ETRAX4)
2662 target_flags |= TARGET_MASK_ETRAX4_ADD;
2663
2664 /* If this is Svinto or higher, align for 32 bit accesses. */
2665 if (cris_cpu_version >= CRIS_CPU_SVINTO)
2666 target_flags
2667 |= (TARGET_MASK_SVINTO | TARGET_MASK_ALIGN_BY_32
2668 | TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2669 | TARGET_MASK_DATA_ALIGN);
2670
2671 /* Note that we do not add new flags when it can be completely
2672 described with a macro that uses -mcpu=X. So
2673 TARGET_HAS_MUL_INSNS is (cris_cpu_version >= CRIS_CPU_NG). */
2674 }
2675
2676 if (cris_tune_str)
2677 {
2678 int cris_tune
2679 = (*cris_tune_str == 'v' ? atoi (cris_tune_str + 1) : -1);
2680
2681 if (strcmp ("etrax4", cris_tune_str) == 0)
2682 cris_tune = 3;
2683
2684 if (strcmp ("svinto", cris_tune_str) == 0
2685 || strcmp ("etrax100", cris_tune_str) == 0)
2686 cris_tune = 8;
2687
2688 if (strcmp ("ng", cris_tune_str) == 0
2689 || strcmp ("etrax100lx", cris_tune_str) == 0)
2690 cris_tune = 10;
2691
2692 if (cris_tune < 0 || cris_tune > 10)
2693 error ("unknown CRIS cpu version specification in -mtune= : %s",
2694 cris_tune_str);
2695
2696 if (cris_tune >= CRIS_CPU_SVINTO)
2697 /* We have currently nothing more to tune than alignment for
2698 memory accesses. */
2699 target_flags
2700 |= (TARGET_MASK_STACK_ALIGN | TARGET_MASK_CONST_ALIGN
2701 | TARGET_MASK_DATA_ALIGN | TARGET_MASK_ALIGN_BY_32);
2702 }
2703
2704 if (flag_pic)
2705 {
2706 /* Use error rather than warning, so invalid use is easily
2707 detectable. Still change to the values we expect, to avoid
2708 further errors. */
2709 if (! TARGET_LINUX)
2710 {
2711 error ("-fPIC and -fpic are not supported in this configuration");
2712 flag_pic = 0;
2713 }
2714
2715 /* Turn off function CSE. We need to have the addresses reach the
2716 call expanders to get PLT-marked, as they could otherwise be
2717 compared against zero directly or indirectly. After visiting the
2718 call expanders they will then be cse:ed, as the call expanders
2719 force_reg the addresses, effectively forcing flag_no_function_cse
2720 to 0. */
2721 flag_no_function_cse = 1;
2722 }
2723
2724 if (write_symbols == DWARF2_DEBUG && ! TARGET_ELF)
2725 {
2726 warning ("that particular -g option is invalid with -maout and -melinux");
2727 write_symbols = DBX_DEBUG;
2728 }
2729
2730 /* Set the per-function-data initializer. */
2731 init_machine_status = cris_init_machine_status;
2732 }
2733
2734 /* The TARGET_ASM_OUTPUT_MI_THUNK worker. */
2735
2736 static void
2737 cris_asm_output_mi_thunk (FILE *stream,
2738 tree thunkdecl ATTRIBUTE_UNUSED,
2739 HOST_WIDE_INT delta,
2740 HOST_WIDE_INT vcall_offset ATTRIBUTE_UNUSED,
2741 tree funcdecl)
2742 {
2743 if (delta > 0)
2744 fprintf (stream, "\tadd%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2745 ADDITIVE_SIZE_MODIFIER (delta), delta,
2746 reg_names[CRIS_FIRST_ARG_REG]);
2747 else if (delta < 0)
2748 fprintf (stream, "\tsub%s " HOST_WIDE_INT_PRINT_DEC ",$%s\n",
2749 ADDITIVE_SIZE_MODIFIER (-delta), -delta,
2750 reg_names[CRIS_FIRST_ARG_REG]);
2751
2752 if (flag_pic)
2753 {
2754 const char *name = XSTR (XEXP (DECL_RTL (funcdecl), 0), 0);
2755
2756 name = (* targetm.strip_name_encoding) (name);
2757 fprintf (stream, "add.d ");
2758 assemble_name (stream, name);
2759 fprintf (stream, "%s,$pc\n", CRIS_PLT_PCOFFSET_SUFFIX);
2760 }
2761 else
2762 {
2763 fprintf (stream, "jump ");
2764 assemble_name (stream, XSTR (XEXP (DECL_RTL (funcdecl), 0), 0));
2765 fprintf (stream, "\n");
2766 }
2767 }
2768
2769 /* Boilerplate emitted at start of file.
2770
2771 NO_APP *only at file start* means faster assembly. It also means
2772 comments are not allowed. In some cases comments will be output
2773 for debugging purposes. Make sure they are allowed then.
2774
2775 We want a .file directive only if TARGET_ELF. */
2776 static void
2777 cris_file_start (void)
2778 {
2779 /* These expressions can vary at run time, so we cannot put
2780 them into TARGET_INITIALIZER. */
2781 targetm.file_start_app_off = !(TARGET_PDEBUG || flag_print_asm_name);
2782 targetm.file_start_file_directive = TARGET_ELF;
2783
2784 default_file_start ();
2785 }
2786
2787 /* Rename the function calls for integer multiply and divide. */
2788 static void
2789 cris_init_libfuncs (void)
2790 {
2791 set_optab_libfunc (smul_optab, SImode, "__Mul");
2792 set_optab_libfunc (sdiv_optab, SImode, "__Div");
2793 set_optab_libfunc (udiv_optab, SImode, "__Udiv");
2794 set_optab_libfunc (smod_optab, SImode, "__Mod");
2795 set_optab_libfunc (umod_optab, SImode, "__Umod");
2796 }
2797
2798 /* The INIT_EXPANDERS worker sets the per-function-data initializer and
2799 mark functions. */
2800
2801 void
2802 cris_init_expanders (void)
2803 {
2804 /* Nothing here at the moment. */
2805 }
2806
2807 /* Zero initialization is OK for all current fields. */
2808
2809 static struct machine_function *
2810 cris_init_machine_status (void)
2811 {
2812 return ggc_alloc_cleared (sizeof (struct machine_function));
2813 }
2814
2815 /* Split a 2 word move (DI or presumably DF) into component parts.
2816 Originally a copy of gen_split_move_double in m32r.c. */
2817
2818 rtx
2819 cris_split_movdx (rtx *operands)
2820 {
2821 enum machine_mode mode = GET_MODE (operands[0]);
2822 rtx dest = operands[0];
2823 rtx src = operands[1];
2824 rtx val;
2825
2826 /* We used to have to handle (SUBREG (MEM)) here, but that should no
2827 longer happen; after reload there are no SUBREGs any more, and we're
2828 only called after reload. */
2829 if (GET_CODE (dest) == SUBREG || GET_CODE (src) == SUBREG)
2830 abort ();
2831
2832 start_sequence ();
2833 if (GET_CODE (dest) == REG)
2834 {
2835 int dregno = REGNO (dest);
2836
2837 /* Reg-to-reg copy. */
2838 if (GET_CODE (src) == REG)
2839 {
2840 int sregno = REGNO (src);
2841
2842 int reverse = (dregno == sregno + 1);
2843
2844 /* We normally copy the low-numbered register first. However, if
2845 the first register operand 0 is the same as the second register of
2846 operand 1, we must copy in the opposite order. */
2847 emit_insn (gen_rtx_SET (VOIDmode,
2848 operand_subword (dest, reverse, TRUE, mode),
2849 operand_subword (src, reverse, TRUE, mode)));
2850
2851 emit_insn (gen_rtx_SET (VOIDmode,
2852 operand_subword (dest, !reverse, TRUE, mode),
2853 operand_subword (src, !reverse, TRUE, mode)));
2854 }
2855 /* Constant-to-reg copy. */
2856 else if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE)
2857 {
2858 rtx words[2];
2859 split_double (src, &words[0], &words[1]);
2860 emit_insn (gen_rtx_SET (VOIDmode,
2861 operand_subword (dest, 0, TRUE, mode),
2862 words[0]));
2863
2864 emit_insn (gen_rtx_SET (VOIDmode,
2865 operand_subword (dest, 1, TRUE, mode),
2866 words[1]));
2867 }
2868 /* Mem-to-reg copy. */
2869 else if (GET_CODE (src) == MEM)
2870 {
2871 /* If the high-address word is used in the address, we must load it
2872 last. Otherwise, load it first. */
2873 rtx addr = XEXP (src, 0);
2874 int reverse
2875 = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
2876
2877 /* The original code implies that we can't do
2878 move.x [rN+],rM move.x [rN],rM+1
2879 when rN is dead, because of REG_NOTES damage. That is
2880 consistent with what I've seen, so don't try it.
2881
2882 We have two different cases here; if the addr is POST_INC,
2883 just pass it through, otherwise add constants. */
2884
2885 if (GET_CODE (addr) == POST_INC)
2886 {
2887 emit_insn (gen_rtx_SET (VOIDmode,
2888 operand_subword (dest, 0, TRUE, mode),
2889 change_address (src, SImode, addr)));
2890 emit_insn (gen_rtx_SET (VOIDmode,
2891 operand_subword (dest, 1, TRUE, mode),
2892 change_address (src, SImode, addr)));
2893 }
2894 else
2895 {
2896 /* Make sure we don't get any other addresses with
2897 embedded postincrements. They should be stopped in
2898 GO_IF_LEGITIMATE_ADDRESS, but we're here for your
2899 safety. */
2900 if (side_effects_p (addr))
2901 fatal_insn ("unexpected side-effects in address", addr);
2902
2903 emit_insn (gen_rtx_SET
2904 (VOIDmode,
2905 operand_subword (dest, reverse, TRUE, mode),
2906 change_address
2907 (src, SImode,
2908 plus_constant (addr,
2909 reverse * UNITS_PER_WORD))));
2910 emit_insn (gen_rtx_SET
2911 (VOIDmode,
2912 operand_subword (dest, ! reverse, TRUE, mode),
2913 change_address
2914 (src, SImode,
2915 plus_constant (addr,
2916 (! reverse) *
2917 UNITS_PER_WORD))));
2918 }
2919 }
2920 else
2921 abort ();
2922 }
2923 /* Reg-to-mem copy or clear mem. */
2924 else if (GET_CODE (dest) == MEM
2925 && (GET_CODE (src) == REG
2926 || src == const0_rtx
2927 || src == CONST0_RTX (DFmode)))
2928 {
2929 rtx addr = XEXP (dest, 0);
2930
2931 if (GET_CODE (addr) == POST_INC)
2932 {
2933 emit_insn (gen_rtx_SET (VOIDmode,
2934 change_address (dest, SImode, addr),
2935 operand_subword (src, 0, TRUE, mode)));
2936 emit_insn (gen_rtx_SET (VOIDmode,
2937 change_address (dest, SImode, addr),
2938 operand_subword (src, 1, TRUE, mode)));
2939 }
2940 else
2941 {
2942 /* Make sure we don't get any other addresses with embedded
2943 postincrements. They should be stopped in
2944 GO_IF_LEGITIMATE_ADDRESS, but we're here for your safety. */
2945 if (side_effects_p (addr))
2946 fatal_insn ("unexpected side-effects in address", addr);
2947
2948 emit_insn (gen_rtx_SET
2949 (VOIDmode,
2950 change_address (dest, SImode, addr),
2951 operand_subword (src, 0, TRUE, mode)));
2952
2953 emit_insn (gen_rtx_SET
2954 (VOIDmode,
2955 change_address (dest, SImode,
2956 plus_constant (addr,
2957 UNITS_PER_WORD)),
2958 operand_subword (src, 1, TRUE, mode)));
2959 }
2960 }
2961
2962 else
2963 abort ();
2964
2965 val = get_insns ();
2966 end_sequence ();
2967 return val;
2968 }
2969
2970 /* This is in essence a copy of output_addr_const altered to output
2971 symbolic operands as PIC.
2972
2973 FIXME: Add hooks similar to ASM_OUTPUT_SYMBOL_REF to get this effect in
2974 the "real" output_addr_const. All we need is one for LABEL_REF (and
2975 one for CODE_LABEL?). */
2976
2977 void
2978 cris_output_addr_const (FILE *file, rtx x)
2979 {
2980 int is_plt = 0;
2981
2982 restart:
2983 switch (GET_CODE (x))
2984 {
2985 case UNSPEC:
2986 ASSERT_PLT_UNSPEC (x);
2987 x = XVECEXP (x, 0, 0);
2988 is_plt = 1;
2989
2990 /* Fall through. */
2991 case SYMBOL_REF:
2992 if (flag_pic)
2993 {
2994 const char *origstr = XSTR (x, 0);
2995 const char *str;
2996
2997 str = (* targetm.strip_name_encoding) (origstr);
2998
2999 if (is_plt)
3000 {
3001 if (cris_pic_sympart_only)
3002 {
3003 assemble_name (file, str);
3004 fprintf (file, ":PLTG");
3005 }
3006 else
3007 {
3008 if (TARGET_AVOID_GOTPLT)
3009 /* We shouldn't get here. */
3010 abort ();
3011
3012 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3013 assemble_name (file, XSTR (x, 0));
3014
3015 if (flag_pic == 1)
3016 fprintf (file, ":GOTPLT16]");
3017 else
3018 fprintf (file, ":GOTPLT]");
3019 }
3020 }
3021 else if (cris_gotless_symbol (x))
3022 {
3023 if (! cris_pic_sympart_only)
3024 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3025 assemble_name (file, str);
3026 fprintf (file, ":GOTOFF");
3027 }
3028 else if (cris_got_symbol (x))
3029 {
3030 if (cris_pic_sympart_only)
3031 abort ();
3032 fprintf (file, "[$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3033 assemble_name (file, XSTR (x, 0));
3034
3035 if (flag_pic == 1)
3036 fprintf (file, ":GOT16]");
3037 else
3038 fprintf (file, ":GOT]");
3039 }
3040 else
3041 LOSE_AND_RETURN ("unexpected PIC symbol", x);
3042
3043 /* Sanity check. */
3044 if (! current_function_uses_pic_offset_table)
3045 output_operand_lossage ("PIC register isn't set up");
3046 }
3047 else
3048 assemble_name (file, XSTR (x, 0));
3049 break;
3050
3051 case LABEL_REF:
3052 /* If we get one of those here, it should be dressed as PIC. Branch
3053 labels are normally output with the 'l' specifier, which means it
3054 will go directly to output_asm_label and not end up here. */
3055 if (GET_CODE (XEXP (x, 0)) != CODE_LABEL
3056 && (GET_CODE (XEXP (x, 0)) != NOTE
3057 || NOTE_LINE_NUMBER (XEXP (x, 0)) != NOTE_INSN_DELETED_LABEL))
3058 fatal_insn ("unexpected address expression", x);
3059
3060 if (flag_pic)
3061 {
3062 if (cris_gotless_symbol (x))
3063 {
3064 if (! cris_pic_sympart_only)
3065 fprintf (file, "$%s+", reg_names [PIC_OFFSET_TABLE_REGNUM]);
3066 cris_output_addr_const (file, XEXP (x, 0));
3067
3068 fprintf (file, ":GOTOFF");
3069 }
3070 else
3071 /* Labels are never marked as global symbols. */
3072 fatal_insn ("unexpected PIC symbol", x);
3073
3074 /* Sanity check. */
3075 if (! current_function_uses_pic_offset_table)
3076 internal_error ("emitting PIC operand, but PIC register isn't set up");
3077 break;
3078 }
3079
3080 output_addr_const (file, x);
3081 break;
3082
3083 case NOTE:
3084 if (NOTE_LINE_NUMBER (x) != NOTE_INSN_DELETED_LABEL)
3085 fatal_insn ("unexpected NOTE as addr_const:", x);
3086 case CODE_LABEL:
3087 case CONST_INT:
3088 case CONST_DOUBLE:
3089 case ZERO_EXTEND:
3090 case SIGN_EXTEND:
3091 output_addr_const (file, x);
3092 break;
3093
3094 case CONST:
3095 /* This used to output parentheses around the expression,
3096 but that does not work on the 386 (either ATT or BSD assembler). */
3097 cris_output_addr_const (file, XEXP (x, 0));
3098 break;
3099
3100 case PLUS:
3101 /* Some assemblers need integer constants to appear last (eg masm). */
3102 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3103 {
3104 cris_output_addr_const (file, XEXP (x, 1));
3105 if (INTVAL (XEXP (x, 0)) >= 0)
3106 fprintf (file, "+");
3107 output_addr_const (file, XEXP (x, 0));
3108 }
3109 else
3110 {
3111 cris_output_addr_const (file, XEXP (x, 0));
3112 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3113 || INTVAL (XEXP (x, 1)) >= 0)
3114 fprintf (file, "+");
3115 cris_output_addr_const (file, XEXP (x, 1));
3116 }
3117 break;
3118
3119 case MINUS:
3120 /* Avoid outputting things like x-x or x+5-x,
3121 since some assemblers can't handle that. */
3122 x = simplify_subtraction (x);
3123 if (GET_CODE (x) != MINUS)
3124 goto restart;
3125
3126 cris_output_addr_const (file, XEXP (x, 0));
3127 fprintf (file, "-");
3128 if ((GET_CODE (XEXP (x, 1)) == CONST_INT
3129 && INTVAL (XEXP (x, 1)) < 0)
3130 || GET_CODE (XEXP (x, 1)) != CONST_INT)
3131 {
3132 fprintf (file, "%s", targetm.asm_out.open_paren);
3133 cris_output_addr_const (file, XEXP (x, 1));
3134 fprintf (file, "%s", targetm.asm_out.close_paren);
3135 }
3136 else
3137 output_addr_const (file, XEXP (x, 1));
3138 break;
3139
3140 default:
3141 LOSE_AND_RETURN ("unexpected address expression", x);
3142 }
3143 }
3144
3145 /* Worker function for TARGET_STRUCT_VALUE_RTX. */
3146
3147 static rtx
3148 cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED,
3149 int incoming ATTRIBUTE_UNUSED)
3150 {
3151 return gen_rtx_REG (Pmode, CRIS_STRUCT_VALUE_REGNUM);
3152 }
3153
3154 /* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
3155
3156 static void
3157 cris_setup_incoming_varargs (CUMULATIVE_ARGS *ca,
3158 enum machine_mode mode ATTRIBUTE_UNUSED,
3159 tree type ATTRIBUTE_UNUSED,
3160 int *pretend_arg_size,
3161 int second_time)
3162 {
3163 if (ca->regs < CRIS_MAX_ARGS_IN_REGS)
3164 *pretend_arg_size = (CRIS_MAX_ARGS_IN_REGS - ca->regs) * 4;
3165 if (TARGET_PDEBUG)
3166 {
3167 fprintf (asm_out_file,
3168 "\n; VA:: ANSI: %d args before, anon @ #%d, %dtime\n",
3169 ca->regs, *pretend_arg_size, second_time);
3170 }
3171 }
3172
3173 /* Return true if TYPE must be passed by invisible reference.
3174 For cris, we pass <= 8 bytes by value, others by reference. */
3175
3176 static bool
3177 cris_pass_by_reference (CUMULATIVE_ARGS *ca ATTRIBUTE_UNUSED,
3178 enum machine_mode mode, tree type,
3179 bool named ATTRIBUTE_UNUSED)
3180 {
3181 return (targetm.calls.must_pass_in_stack (mode, type)
3182 || CRIS_FUNCTION_ARG_SIZE (mode, type) > 8);
3183 }
3184
3185
3186 #if 0
3187 /* Various small functions to replace macros. Only called from a
3188 debugger. They might collide with gcc functions or system functions,
3189 so only emit them when '#if 1' above. */
3190
3191 enum rtx_code Get_code (rtx);
3192
3193 enum rtx_code
3194 Get_code (rtx x)
3195 {
3196 return GET_CODE (x);
3197 }
3198
3199 const char *Get_mode (rtx);
3200
3201 const char *
3202 Get_mode (rtx x)
3203 {
3204 return GET_MODE_NAME (GET_MODE (x));
3205 }
3206
3207 rtx Xexp (rtx, int);
3208
3209 rtx
3210 Xexp (rtx x, int n)
3211 {
3212 return XEXP (x, n);
3213 }
3214
3215 rtx Xvecexp (rtx, int, int);
3216
3217 rtx
3218 Xvecexp (rtx x, int n, int m)
3219 {
3220 return XVECEXP (x, n, m);
3221 }
3222
3223 int Get_rtx_len (rtx);
3224
3225 int
3226 Get_rtx_len (rtx x)
3227 {
3228 return GET_RTX_LENGTH (GET_CODE (x));
3229 }
3230
3231 /* Use upper-case to distinguish from local variables that are sometimes
3232 called next_insn and prev_insn. */
3233
3234 rtx Next_insn (rtx);
3235
3236 rtx
3237 Next_insn (rtx insn)
3238 {
3239 return NEXT_INSN (insn);
3240 }
3241
3242 rtx Prev_insn (rtx);
3243
3244 rtx
3245 Prev_insn (rtx insn)
3246 {
3247 return PREV_INSN (insn);
3248 }
3249 #endif
3250
3251 #include "gt-cris.h"
3252
3253 /*
3254 * Local variables:
3255 * eval: (c-set-style "gnu")
3256 * indent-tabs-mode: t
3257 * End:
3258 */