1 /* Definitions of target machine for Mitsubishi D30V.
2 Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3 Contributed by Cygnus Solutions.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
44 static void d30v_print_operand_memory_reference
PARAMS ((FILE *, rtx
));
45 static void d30v_build_long_insn
PARAMS ((HOST_WIDE_INT
, HOST_WIDE_INT
,
47 static void d30v_add_gc_roots
PARAMS ((void));
49 /* Define the information needed to generate branch and scc insns. This is
50 stored from the compare operation. */
52 struct rtx_def
*d30v_compare_op0
;
53 struct rtx_def
*d30v_compare_op1
;
55 /* Define the information needed to modify the epilogue for EH. */
57 rtx d30v_eh_epilogue_sp_ofs
;
59 /* Cached value of d30v_stack_info */
60 static d30v_stack_t
*d30v_stack_cache
= (d30v_stack_t
*)0;
62 /* Cache for __builtin_return_addr */
63 static rtx d30v_return_addr_rtx
;
65 /* Values of the -mbranch-cost=n string. */
66 int d30v_branch_cost
= D30V_DEFAULT_BRANCH_COST
;
67 const char *d30v_branch_cost_string
= (const char *)0;
69 /* Values of the -mcond-exec=n string. */
70 int d30v_cond_exec
= D30V_DEFAULT_MAX_CONDITIONAL_EXECUTE
;
71 const char *d30v_cond_exec_string
= (const char *)0;
73 /* Whether or not a hard register can accept a register */
74 unsigned char hard_regno_mode_ok
[ (int)MAX_MACHINE_MODE
][FIRST_PSEUDO_REGISTER
];
76 /* Whether to try and avoid moves between two different modes */
77 unsigned char modes_tieable_p
[ (NUM_MACHINE_MODES
) * (NUM_MACHINE_MODES
) ];
79 /* Map register number to smallest register class. */
80 enum reg_class regno_reg_class
[FIRST_PSEUDO_REGISTER
];
82 /* Map class letter into register class */
83 enum reg_class reg_class_from_letter
[256];
86 /* Sometimes certain combinations of command options do not make
87 sense on a particular target machine. You can define a macro
88 `OVERRIDE_OPTIONS' to take account of this. This macro, if
89 defined, is executed once just after all the command options have
92 Don't use this macro to turn on various extra optimizations for
93 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
99 enum machine_mode mode1
, mode2
;
101 /* Set up the branch cost information */
102 if (d30v_branch_cost_string
)
103 d30v_branch_cost
= atoi (d30v_branch_cost_string
);
105 /* Set up max # instructions to use with conditional execution */
106 if (d30v_cond_exec_string
)
107 d30v_cond_exec
= atoi (d30v_cond_exec_string
);
109 /* Setup hard_regno_mode_ok/modes_tieable_p */
110 for (mode1
= VOIDmode
;
111 (int)mode1
< NUM_MACHINE_MODES
;
112 mode1
= (enum machine_mode
)((int)mode1
+ 1))
114 int size
= GET_MODE_SIZE (mode1
);
115 int large_p
= size
> UNITS_PER_WORD
;
116 int int_p
= GET_MODE_CLASS (mode1
) == MODE_INT
;
118 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
120 if (mode1
== VOIDmode
)
123 else if (GPR_P (regno
))
128 ok_p
= (((regno
- GPR_FIRST
) & 1) == 0);
131 else if (FLAG_P (regno
))
132 ok_p
= (mode1
== CCmode
);
134 else if (CR_P (regno
))
135 ok_p
= int_p
&& !large_p
;
137 else if (ACCUM_P (regno
))
138 ok_p
= (mode1
== DImode
);
140 else if (SPECIAL_REG_P (regno
))
141 ok_p
= (mode1
== SImode
);
146 hard_regno_mode_ok
[ (int)mode1
][ regno
] = ok_p
;
149 /* A C expression that is nonzero if it is desirable to choose
150 register allocation so as to avoid move instructions between a
151 value of mode MODE1 and a value of mode MODE2.
153 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
154 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
155 MODE2)' must be zero. */
156 for (mode2
= VOIDmode
;
157 (int)mode2
<= NUM_MACHINE_MODES
;
158 mode2
= (enum machine_mode
)((int)mode2
+ 1))
164 else if (GET_MODE_CLASS (mode1
) == MODE_INT
165 && GET_MODE_SIZE (mode1
) <= UNITS_PER_WORD
166 && GET_MODE_CLASS (mode2
) == MODE_INT
167 && GET_MODE_SIZE (mode2
) <= UNITS_PER_WORD
)
174 modes_tieable_p
[ ((int)mode1
* (NUM_MACHINE_MODES
)) + (int)mode2
] = ok_p
;
179 for (mode1
= VOIDmode
;
180 (int)mode1
< NUM_MACHINE_MODES
;
181 mode1
= (enum machine_mode
)((int)mode1
+ 1))
183 for (mode2
= VOIDmode
;
184 (int)mode2
<= NUM_MACHINE_MODES
;
185 mode2
= (enum machine_mode
)((int)mode2
+ 1))
187 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
189 && (hard_regno_mode_ok
[(int)mode1
][regno
]
190 != hard_regno_mode_ok
[(int)mode2
][regno
]))
191 error ("Bad modes_tieable_p for register %s, mode1 %s, mode2 %s",
192 reg_names
[regno
], GET_MODE_NAME (mode1
),
193 GET_MODE_NAME (mode2
));
198 /* A C expression whose value is a register class containing hard
199 register REGNO. In general there is more than one such class;
200 choose a class which is "minimal", meaning that no smaller class
201 also contains the register. */
202 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
204 enum reg_class
class;
207 class = (IN_RANGE_P (regno
, GPR_FIRST
+2, GPR_FIRST
+62)
208 && ((regno
- GPR_FIRST
) & 1) == 0) ? EVEN_REGS
: GPR_REGS
;
210 else if (regno
== FLAG_F0
)
213 else if (regno
== FLAG_F1
)
216 else if (FLAG_P (regno
))
217 class = OTHER_FLAG_REGS
;
219 else if (ACCUM_P (regno
))
222 else if (regno
== CR_RPT_C
)
225 else if (CR_P (regno
))
228 else if (SPECIAL_REG_P (regno
))
234 regno_reg_class
[regno
] = class;
238 static char *names
[] = REG_CLASS_NAMES
;
239 fprintf (stderr
, "Register %s class is %s, can hold modes", reg_names
[regno
], names
[class]);
240 for (mode1
= VOIDmode
;
241 (int)mode1
< NUM_MACHINE_MODES
;
242 mode1
= (enum machine_mode
)((int)mode1
+ 1))
244 if (hard_regno_mode_ok
[ (int)mode1
][ regno
])
245 fprintf (stderr
, " %s", GET_MODE_NAME (mode1
));
247 fprintf (stderr
, "\n");
252 /* A C expression which defines the machine-dependent operand
253 constraint letters for register classes. If CHAR is such a
254 letter, the value should be the register class corresponding to
255 it. Otherwise, the value should be `NO_REGS'. The register
256 letter `r', corresponding to class `GENERAL_REGS', will not be
257 passed to this macro; you do not need to handle it.
259 The following letters are unavailable, due to being used as
264 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P'
265 'Q', 'R', 'S', 'T', 'U'
267 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */
269 for (i
= 0; i
< 256; i
++)
270 reg_class_from_letter
[i
] = NO_REGS
;
272 reg_class_from_letter
['a'] = ACCUM_REGS
;
273 reg_class_from_letter
['b'] = BR_FLAG_REGS
;
274 reg_class_from_letter
['c'] = CR_REGS
;
275 reg_class_from_letter
['d'] = GPR_REGS
;
276 reg_class_from_letter
['e'] = EVEN_REGS
;
277 reg_class_from_letter
['f'] = FLAG_REGS
;
278 reg_class_from_letter
['l'] = REPEAT_REGS
;
279 reg_class_from_letter
['x'] = F0_REGS
;
280 reg_class_from_letter
['y'] = F1_REGS
;
281 reg_class_from_letter
['z'] = OTHER_FLAG_REGS
;
283 d30v_add_gc_roots ();
287 /* Return true if a memory operand is a short memory operand. */
290 short_memory_operand (op
, mode
)
292 enum machine_mode mode
;
294 if (GET_CODE (op
) != MEM
)
297 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
300 return (d30v_legitimate_address_p (mode
, XEXP (op
, 0), reload_completed
)
304 /* Return true if a memory operand is a long operand. */
307 long_memory_operand (op
, mode
)
309 enum machine_mode mode
;
311 if (GET_CODE (op
) != MEM
)
314 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
317 return (d30v_legitimate_address_p (mode
, XEXP (op
, 0), reload_completed
)
321 /* Return true if a memory operand is valid for the D30V. */
324 d30v_memory_operand (op
, mode
)
326 enum machine_mode mode
;
328 if (GET_CODE (op
) != MEM
)
331 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
334 return (d30v_legitimate_address_p (mode
, XEXP (op
, 0), reload_completed
)
338 /* Return true if a memory operand uses a single register for the
342 single_reg_memory_operand (op
, mode
)
344 enum machine_mode mode
;
348 if (GET_CODE (op
) != MEM
)
351 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
355 if (! d30v_legitimate_address_p (mode
, addr
, reload_completed
))
358 if (GET_CODE (addr
) == SUBREG
)
359 addr
= SUBREG_REG (addr
);
361 return (GET_CODE (addr
) == REG
);
364 /* Return true if a memory operand uses a constant address. */
367 const_addr_memory_operand (op
, mode
)
369 enum machine_mode mode
;
371 if (GET_CODE (op
) != MEM
)
374 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
377 if (! d30v_legitimate_address_p (mode
, XEXP (op
, 0), reload_completed
))
380 switch (GET_CODE (XEXP (op
, 0)))
395 /* Return true if operand is a memory reference suitable for a call. */
398 call_operand (op
, mode
)
400 enum machine_mode mode
;
402 if (GET_CODE (op
) != MEM
)
405 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
408 if (! d30v_legitimate_address_p (mode
, XEXP (op
, 0), reload_completed
))
411 switch (GET_CODE (XEXP (op
, 0)))
417 op
= SUBREG_REG (op
);
418 if (GET_CODE (op
) != REG
)
424 return (GPR_OR_PSEUDO_P (REGNO (XEXP (op
, 0))));
436 /* Return true if operand is a GPR register. */
439 gpr_operand (op
, mode
)
441 enum machine_mode mode
;
443 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
446 if (GET_CODE (op
) == SUBREG
)
448 if (GET_CODE (SUBREG_REG (op
)) != REG
)
449 return register_operand (op
, mode
);
451 op
= SUBREG_REG (op
);
454 if (GET_CODE (op
) != REG
)
457 return GPR_OR_PSEUDO_P (REGNO (op
));
460 /* Return true if operand is an accumulator register. */
463 accum_operand (op
, mode
)
465 enum machine_mode mode
;
467 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
470 if (GET_CODE (op
) == SUBREG
)
472 if (GET_CODE (SUBREG_REG (op
)) != REG
)
473 return register_operand (op
, mode
);
475 op
= SUBREG_REG (op
);
478 if (GET_CODE (op
) != REG
)
481 return ACCUM_OR_PSEUDO_P (REGNO (op
));
484 /* Return true if operand is a GPR or an accumulator register. */
487 gpr_or_accum_operand (op
, mode
)
489 enum machine_mode mode
;
491 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
494 if (GET_CODE (op
) == SUBREG
)
496 if (GET_CODE (SUBREG_REG (op
)) != REG
)
497 return register_operand (op
, mode
);
499 op
= SUBREG_REG (op
);
502 if (GET_CODE (op
) != REG
)
505 if (ACCUM_P (REGNO (op
)))
508 return GPR_OR_PSEUDO_P (REGNO (op
));
511 /* Return true if operand is a CR register. */
514 cr_operand (op
, mode
)
516 enum machine_mode mode
;
518 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
521 if (GET_CODE (op
) == SUBREG
)
523 if (GET_CODE (SUBREG_REG (op
)) != REG
)
524 return register_operand (op
, mode
);
526 op
= SUBREG_REG (op
);
529 if (GET_CODE (op
) != REG
)
532 return CR_OR_PSEUDO_P (REGNO (op
));
535 /* Return true if operand is the repeat count register. */
538 repeat_operand (op
, mode
)
540 enum machine_mode mode
;
542 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
545 if (GET_CODE (op
) == SUBREG
)
547 if (GET_CODE (SUBREG_REG (op
)) != REG
)
548 return register_operand (op
, mode
);
550 op
= SUBREG_REG (op
);
553 if (GET_CODE (op
) != REG
)
556 return (REGNO (op
) == CR_RPT_C
|| REGNO (op
) >= FIRST_PSEUDO_REGISTER
);
559 /* Return true if operand is a FLAG register. */
562 flag_operand (op
, mode
)
564 enum machine_mode mode
;
566 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
569 if (GET_CODE (op
) == SUBREG
)
571 if (GET_CODE (SUBREG_REG (op
)) != REG
)
572 return register_operand (op
, mode
);
574 op
= SUBREG_REG (op
);
577 if (GET_CODE (op
) != REG
)
580 return FLAG_OR_PSEUDO_P (REGNO (op
));
583 /* Return true if operand is either F0 or F1. */
586 br_flag_operand (op
, mode
)
588 enum machine_mode mode
;
590 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
593 if (GET_CODE (op
) == SUBREG
)
595 if (GET_CODE (SUBREG_REG (op
)) != REG
)
596 return register_operand (op
, mode
);
598 op
= SUBREG_REG (op
);
601 if (GET_CODE (op
) != REG
)
604 return BR_FLAG_OR_PSEUDO_P (REGNO (op
));
607 /* Return true if operand is either F0/F1 or the constants 0/1. */
610 br_flag_or_constant_operand (op
, mode
)
612 enum machine_mode mode
;
614 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
617 if (GET_CODE (op
) == SUBREG
)
619 if (GET_CODE (SUBREG_REG (op
)) != REG
)
620 return register_operand (op
, mode
);
622 op
= SUBREG_REG (op
);
625 if (GET_CODE (op
) == CONST_INT
)
626 return (INTVAL (op
) == 0 || INTVAL (op
) == 1);
628 if (GET_CODE (op
) != REG
)
631 return BR_FLAG_OR_PSEUDO_P (REGNO (op
));
634 /* Return true if operand is either F0 or F1, or a GPR register. */
637 gpr_or_br_flag_operand (op
, mode
)
639 enum machine_mode mode
;
641 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
644 if (GET_CODE (op
) == SUBREG
)
646 if (GET_CODE (SUBREG_REG (op
)) != REG
)
647 return register_operand (op
, mode
);
649 op
= SUBREG_REG (op
);
652 if (GET_CODE (op
) != REG
)
655 return GPR_OR_PSEUDO_P (REGNO (op
)) || BR_FLAG_P (REGNO (op
));
658 /* Return true if operand is the F0 register. */
661 f0_operand (op
, mode
)
663 enum machine_mode mode
;
665 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
668 if (GET_CODE (op
) == SUBREG
)
670 if (GET_CODE (SUBREG_REG (op
)) != REG
)
671 return register_operand (op
, mode
);
673 op
= SUBREG_REG (op
);
676 if (GET_CODE (op
) != REG
)
679 return (REGNO (op
) == FLAG_F0
|| REGNO (op
) >= FIRST_PSEUDO_REGISTER
);
682 /* Return true if operand is the F1 register. */
685 f1_operand (op
, mode
)
687 enum machine_mode mode
;
689 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
692 if (GET_CODE (op
) == SUBREG
)
694 if (GET_CODE (SUBREG_REG (op
)) != REG
)
695 return register_operand (op
, mode
);
697 op
= SUBREG_REG (op
);
700 if (GET_CODE (op
) != REG
)
703 return (REGNO (op
) == FLAG_F1
|| REGNO (op
) >= FIRST_PSEUDO_REGISTER
);
706 /* Return true if operand is the F1 register. */
709 carry_operand (op
, mode
)
711 enum machine_mode mode
;
713 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
716 if (GET_CODE (op
) == SUBREG
)
718 if (GET_CODE (SUBREG_REG (op
)) != REG
)
719 return register_operand (op
, mode
);
721 op
= SUBREG_REG (op
);
724 if (GET_CODE (op
) != REG
)
727 return (REGNO (op
) == FLAG_CARRY
|| REGNO (op
) >= FIRST_PSEUDO_REGISTER
);
730 /* Return true if operand is a register of any flavor or a 0 of the
734 reg_or_0_operand (op
, mode
)
736 enum machine_mode mode
;
738 switch (GET_CODE (op
))
745 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
748 return register_operand (op
, mode
);
751 return INTVAL (op
) == 0;
754 return CONST_DOUBLE_HIGH (op
) == 0 && CONST_DOUBLE_LOW (op
) == 0;
760 /* Return true if operand is a GPR register or a signed 6 bit immediate. */
763 gpr_or_signed6_operand (op
, mode
)
765 enum machine_mode mode
;
767 if (GET_CODE (op
) == SUBREG
)
769 if (GET_CODE (SUBREG_REG (op
)) != REG
)
770 return register_operand (op
, mode
);
772 op
= SUBREG_REG (op
);
775 if (GET_CODE (op
) == CONST_INT
)
776 return IN_RANGE_P (INTVAL (op
), -32, 31);
778 if (GET_CODE (op
) != REG
)
781 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
784 return GPR_OR_PSEUDO_P (REGNO (op
));
787 /* Return true if operand is a GPR register or an unsigned 5 bit immediate. */
790 gpr_or_unsigned5_operand (op
, mode
)
792 enum machine_mode mode
;
794 if (GET_CODE (op
) == SUBREG
)
796 if (GET_CODE (SUBREG_REG (op
)) != REG
)
797 return register_operand (op
, mode
);
799 op
= SUBREG_REG (op
);
802 if (GET_CODE (op
) == CONST_INT
)
803 return IN_RANGE_P (INTVAL (op
), 0, 31);
805 if (GET_CODE (op
) != REG
)
808 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
811 return GPR_OR_PSEUDO_P (REGNO (op
));
814 /* Return true if operand is a GPR register or an unsigned 6 bit immediate. */
817 gpr_or_unsigned6_operand (op
, mode
)
819 enum machine_mode mode
;
821 if (GET_CODE (op
) == SUBREG
)
823 if (GET_CODE (SUBREG_REG (op
)) != REG
)
824 return register_operand (op
, mode
);
826 op
= SUBREG_REG (op
);
829 if (GET_CODE (op
) == CONST_INT
)
830 return IN_RANGE_P (INTVAL (op
), 0, 63);
832 if (GET_CODE (op
) != REG
)
835 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
838 return GPR_OR_PSEUDO_P (REGNO (op
));
841 /* Return true if operand is a GPR register or a constant of some form. */
844 gpr_or_constant_operand (op
, mode
)
846 enum machine_mode mode
;
848 switch (GET_CODE (op
))
860 if (GET_CODE (SUBREG_REG (op
)) != REG
)
861 return register_operand (op
, mode
);
863 op
= SUBREG_REG (op
);
867 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
870 return GPR_OR_PSEUDO_P (REGNO (op
));
876 /* Return true if operand is a GPR register or a constant of some form,
877 including a CONST_DOUBLE, which gpr_or_constant_operand doesn't recognize. */
880 gpr_or_dbl_const_operand (op
, mode
)
882 enum machine_mode mode
;
884 switch (GET_CODE (op
))
897 if (GET_CODE (SUBREG_REG (op
)) != REG
)
898 return register_operand (op
, mode
);
900 op
= SUBREG_REG (op
);
904 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
907 return GPR_OR_PSEUDO_P (REGNO (op
));
913 /* Return true if operand is a gpr register or a valid memory operation. */
916 gpr_or_memory_operand (op
, mode
)
918 enum machine_mode mode
;
920 switch (GET_CODE (op
))
926 if (GET_CODE (SUBREG_REG (op
)) != REG
)
927 return register_operand (op
, mode
);
929 op
= SUBREG_REG (op
);
933 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
936 return GPR_OR_PSEUDO_P (REGNO (op
));
939 return d30v_legitimate_address_p (mode
, XEXP (op
, 0), reload_completed
);
945 /* Return true if operand is something that can be an input for a move
949 move_input_operand (op
, mode
)
951 enum machine_mode mode
;
956 switch (GET_CODE (op
))
969 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
972 subreg
= SUBREG_REG (op
);
973 code
= GET_CODE (subreg
);
975 return d30v_legitimate_address_p ((int)mode
, XEXP (subreg
, 0),
978 return (code
== REG
);
981 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
987 if (GET_CODE (XEXP (op
, 0)) == ADDRESSOF
)
989 return d30v_legitimate_address_p (mode
, XEXP (op
, 0),
996 /* Return true if operand is something that can be an output for a move
1000 move_output_operand (op
, mode
)
1002 enum machine_mode mode
;
1007 switch (GET_CODE (op
))
1013 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1016 subreg
= SUBREG_REG (op
);
1017 code
= GET_CODE (subreg
);
1019 return d30v_legitimate_address_p ((int)mode
, XEXP (subreg
, 0),
1022 return (code
== REG
);
1025 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1031 if (GET_CODE (XEXP (op
, 0)) == ADDRESSOF
)
1033 return d30v_legitimate_address_p (mode
, XEXP (op
, 0),
1040 /* Return true if operand is a signed 6 bit immediate. */
1043 signed6_operand (op
, mode
)
1045 enum machine_mode mode ATTRIBUTE_UNUSED
;
1047 if (GET_CODE (op
) == CONST_INT
)
1048 return IN_RANGE_P (INTVAL (op
), -32, 31);
1053 /* Return true if operand is an unsigned 5 bit immediate. */
1056 unsigned5_operand (op
, mode
)
1058 enum machine_mode mode ATTRIBUTE_UNUSED
;
1060 if (GET_CODE (op
) == CONST_INT
)
1061 return IN_RANGE_P (INTVAL (op
), 0, 31);
1066 /* Return true if operand is an unsigned 6 bit immediate. */
1069 unsigned6_operand (op
, mode
)
1071 enum machine_mode mode ATTRIBUTE_UNUSED
;
1073 if (GET_CODE (op
) == CONST_INT
)
1074 return IN_RANGE_P (INTVAL (op
), 0, 63);
1079 /* Return true if operand is a constant with a single bit set. */
1082 bitset_operand (op
, mode
)
1084 enum machine_mode mode ATTRIBUTE_UNUSED
;
1086 if (GET_CODE (op
) == CONST_INT
)
1087 return IN_RANGE_P (exact_log2 (INTVAL (op
)), 0, 31);
1092 /* Return true if the operator is a ==/!= test against f0 or f1 that can be
1093 used in conditional execution. */
1096 condexec_test_operator (op
, mode
)
1098 enum machine_mode mode
;
1102 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1105 if (GET_CODE (op
) != EQ
&& GET_CODE (op
) != NE
)
1109 if (GET_CODE (x0
) != REG
|| !BR_FLAG_OR_PSEUDO_P (REGNO (x0
)))
1113 if (GET_CODE (x1
) != CONST_INT
|| INTVAL (x1
) != 0)
1119 /* Return true if the operator is a ==/!= test against f0, f1, or a general
1120 register that can be used in a branch instruction. */
1123 condexec_branch_operator (op
, mode
)
1125 enum machine_mode mode
;
1129 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1132 if (GET_CODE (op
) != EQ
&& GET_CODE (op
) != NE
)
1136 if (GET_CODE (x0
) == REG
)
1138 int regno
= REGNO (x0
);
1139 if (!GPR_OR_PSEUDO_P (regno
) && !BR_FLAG_P (regno
))
1142 /* Allow the optimizer to generate things like:
1143 (if_then_else (ne (const_int 1) (const_int 0))) */
1144 else if (GET_CODE (x0
) != CONST_INT
)
1148 if (GET_CODE (x1
) != CONST_INT
|| INTVAL (x1
) != 0)
1154 /* Return true if the unary operator can be executed with conditional
1158 condexec_unary_operator (op
, mode
)
1160 enum machine_mode mode ATTRIBUTE_UNUSED
;
1164 /* Only do this after register allocation, so that we can look at the register # */
1165 if (!reload_completed
)
1168 if (GET_RTX_CLASS (GET_CODE (op
)) != '1')
1172 if (GET_CODE (op0
) == SUBREG
)
1173 op0
= SUBREG_REG (op0
);
1175 switch (GET_CODE (op
))
1182 if (GET_MODE (op
) == SImode
&& GET_CODE (op0
) == REG
&& GPR_P (REGNO (op0
)))
1191 /* Return true if the add or subtraction can be executed with conditional
1195 condexec_addsub_operator (op
, mode
)
1197 enum machine_mode mode ATTRIBUTE_UNUSED
;
1201 /* Only do this after register allocation, so that we can look at the register # */
1202 if (!reload_completed
)
1205 if (GET_RTX_CLASS (GET_CODE (op
)) != '2' && GET_RTX_CLASS (GET_CODE (op
)) != 'c')
1211 if (GET_CODE (op0
) == SUBREG
)
1212 op0
= SUBREG_REG (op0
);
1214 if (GET_CODE (op1
) == SUBREG
)
1215 op1
= SUBREG_REG (op1
);
1217 if (GET_CODE (op0
) != REG
)
1220 switch (GET_CODE (op
))
1227 return (GET_MODE (op
) == SImode
&& GPR_P (REGNO (op0
))
1228 && gpr_or_constant_operand (op1
, SImode
));
1234 /* Return true if the binary operator can be executed with conditional
1235 execution. We don't include add/sub here, since they have extra
1236 clobbers for the flags registers. */
1239 condexec_binary_operator (op
, mode
)
1241 enum machine_mode mode ATTRIBUTE_UNUSED
;
1245 /* Only do this after register allocation, so that we can look at the register # */
1246 if (!reload_completed
)
1249 if (GET_RTX_CLASS (GET_CODE (op
)) != '2' && GET_RTX_CLASS (GET_CODE (op
)) != 'c')
1255 if (GET_CODE (op0
) == SUBREG
)
1256 op0
= SUBREG_REG (op0
);
1258 if (GET_CODE (op1
) == SUBREG
)
1259 op1
= SUBREG_REG (op1
);
1261 if (GET_CODE (op0
) != REG
)
1264 /* MULT is not included here, because it is an IU only instruction. */
1265 switch (GET_CODE (op
))
1276 return (GET_MODE (op
) == SImode
&& GPR_P (REGNO (op0
))
1277 && gpr_or_constant_operand (op1
, SImode
));
1281 return (GET_MODE (op
) == SImode
&& GPR_P (REGNO (op0
))
1282 && GET_CODE (op1
) == CONST_INT
);
1288 /* Return true if the shift/rotate left operator can be executed with
1289 conditional execution. */
1292 condexec_shiftl_operator (op
, mode
)
1294 enum machine_mode mode ATTRIBUTE_UNUSED
;
1298 /* Only do this after register allocation, so that we can look at the register # */
1299 if (!reload_completed
)
1302 if (GET_RTX_CLASS (GET_CODE (op
)) != '2' && GET_RTX_CLASS (GET_CODE (op
)) != 'c')
1308 if (GET_CODE (op0
) == SUBREG
)
1309 op0
= SUBREG_REG (op0
);
1311 if (GET_CODE (op1
) == SUBREG
)
1312 op1
= SUBREG_REG (op1
);
1314 if (GET_CODE (op0
) != REG
)
1317 switch (GET_CODE (op
))
1324 return (GET_MODE (op
) == SImode
&& GPR_P (REGNO (op0
))
1325 && GET_CODE (op1
) == NEG
1326 && GET_CODE (XEXP (op1
, 0)) == REG
1327 && GPR_P (REGNO (XEXP (op1
, 0))));
1333 /* Return true if the {sign,zero} extend operator from memory can be
1334 conditionally executed. */
1337 condexec_extend_operator (op
, mode
)
1339 enum machine_mode mode ATTRIBUTE_UNUSED
;
1341 /* Only do this after register allocation, so that we can look at the register # */
1342 if (!reload_completed
)
1345 if (GET_RTX_CLASS (GET_CODE (op
)) != '1')
1348 switch (GET_CODE (op
))
1355 if ((GET_MODE (op
) == SImode
&& GET_MODE (XEXP (op
, 0)) == QImode
)
1356 || (GET_MODE (op
) == SImode
&& GET_MODE (XEXP (op
, 0)) == HImode
)
1357 || (GET_MODE (op
) == HImode
&& GET_MODE (XEXP (op
, 0)) == QImode
))
1366 /* Return true for comparisons against 0 that can be turned into a
1367 bratnz/bratzr instruction. */
1370 branch_zero_operator (op
, mode
)
1372 enum machine_mode mode
;
1376 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1379 if (GET_CODE (op
) != EQ
&& GET_CODE (op
) != NE
)
1383 if (GET_CODE (x0
) != REG
|| !GPR_OR_PSEUDO_P (REGNO (x0
)))
1387 if (GET_CODE (x1
) != CONST_INT
|| INTVAL (x1
) != 0)
1393 /* Return true if an operand is simple, suitable for use as the destination of
1394 a conditional move */
1397 cond_move_dest_operand (op
, mode
)
1399 enum machine_mode mode ATTRIBUTE_UNUSED
;
1403 if (mode
!= QImode
&& mode
!= HImode
&& mode
!= SImode
&& mode
!= SFmode
)
1406 switch (GET_CODE (op
))
1413 return gpr_operand (op
, mode
);
1415 /* Don't allow post dec/inc, since we might not get the side effects correct. */
1417 addr
= XEXP (op
, 0);
1418 return (GET_CODE (addr
) != POST_DEC
1419 && GET_CODE (addr
) != POST_INC
1420 && d30v_legitimate_address_p (mode
, addr
, reload_completed
));
1426 /* Return true if an operand is simple, suitable for use in a conditional move */
1429 cond_move_operand (op
, mode
)
1431 enum machine_mode mode ATTRIBUTE_UNUSED
;
1435 if (mode
!= QImode
&& mode
!= HImode
&& mode
!= SImode
&& mode
!= SFmode
)
1438 switch (GET_CODE (op
))
1445 return gpr_operand (op
, mode
);
1448 return GET_MODE (op
) == SFmode
;
1456 /* Don't allow post dec/inc, since we might not get the side effects correct. */
1458 addr
= XEXP (op
, 0);
1459 return (GET_CODE (addr
) != POST_DEC
1460 && GET_CODE (addr
) != POST_INC
1461 && d30v_legitimate_address_p (mode
, addr
, reload_completed
));
1467 /* Return true if an operand is simple, suitable for use in conditional execution.
1468 Unlike cond_move, we can allow auto inc/dec. */
1471 cond_exec_operand (op
, mode
)
1473 enum machine_mode mode
;
1475 if (mode
!= QImode
&& mode
!= HImode
&& mode
!= SImode
&& mode
!= SFmode
)
1478 switch (GET_CODE (op
))
1485 return gpr_operand (op
, mode
);
1488 return GET_MODE (op
) == SFmode
;
1497 return memory_operand (op
, mode
);
1503 /* Return true if operand is a SI mode signed relational test. */
1506 srelational_si_operator (op
, mode
)
1508 enum machine_mode mode
;
1512 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1515 switch (GET_CODE (op
))
1530 if (GET_CODE (x0
) != REG
&& GET_CODE (x0
) != SUBREG
)
1533 if (GET_MODE (x0
) != SImode
)
1537 switch (GET_CODE (x1
))
1554 /* Return true if operand is a SI mode unsigned relational test. */
1557 urelational_si_operator (op
, mode
)
1559 enum machine_mode mode
;
1563 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1566 switch (GET_CODE (op
))
1579 if (GET_CODE (x0
) != REG
&& GET_CODE (x0
) != SUBREG
)
1582 if (GET_MODE (x0
) != SImode
)
1586 switch (GET_CODE (x1
))
1603 /* Return true if operand is a DI mode relational test. */
1606 relational_di_operator (op
, mode
)
1608 enum machine_mode mode
;
1612 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1615 if (GET_RTX_CLASS (GET_CODE (op
)) != '<')
1619 if (GET_CODE (x0
) != REG
&& GET_CODE (x0
) != SUBREG
)
1622 if (GET_MODE (x0
) != DImode
)
1626 if (GET_CODE (x1
) != REG
&& GET_CODE (x1
) != SUBREG
1627 && GET_CODE (x1
) != CONST_INT
&& GET_CODE (x1
) != CONST_DOUBLE
)
1634 /* Calculate the stack information for the current function.
1636 D30V stack frames look like:
1639 +-------------------------------+
1640 | Argument word #19 |
1641 +-------------------------------+
1642 | Argument word #18 |
1643 +-------------------------------+
1644 | Argument word #17 |
1645 +-------------------------------+
1646 | Argument word #16 |
1647 Prev sp +-------------------------------+
1649 | Save for arguments 1..16 if |
1650 | the func. uses stdarg/varargs |
1652 +-------------------------------+
1654 | Save area for GPR registers |
1656 +-------------------------------+
1658 | Save area for accumulators |
1660 +-------------------------------+
1664 +-------------------------------+
1666 | alloca space if used |
1668 +-------------------------------+
1670 | Space for outgoing arguments |
1672 low SP----> +-------------------------------+
1678 static d30v_stack_t info
, zero_info
;
1679 d30v_stack_t
*info_ptr
= &info
;
1680 tree fndecl
= current_function_decl
;
1681 tree fntype
= TREE_TYPE (fndecl
);
1689 unsigned char save_gpr_p
[GPR_LAST
];
1692 /* If we've already calculated the values and reload is complete, just return now */
1693 if (d30v_stack_cache
)
1694 return d30v_stack_cache
;
1696 /* Zero all fields */
1700 regs_ever_live
[GPR_LINK
] = 1;
1702 /* Determine if this is a stdarg function */
1703 if (TYPE_ARG_TYPES (fntype
) != 0
1704 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
))) != void_type_node
))
1708 /* Find the last argument, and see if it is __builtin_va_alist. */
1709 for (cur_arg
= DECL_ARGUMENTS (fndecl
); cur_arg
!= (tree
)0; cur_arg
= next_arg
)
1711 next_arg
= TREE_CHAIN (cur_arg
);
1712 if (next_arg
== (tree
)0)
1714 if (DECL_NAME (cur_arg
)
1715 && !strcmp (IDENTIFIER_POINTER (DECL_NAME (cur_arg
)), "__builtin_va_alist"))
1723 /* Calculate which registers need to be saved & save area size */
1727 for (i
= ACCUM_FIRST
; i
<= ACCUM_LAST
; i
++)
1729 if (regs_ever_live
[i
] && !call_used_regs
[i
])
1731 info_ptr
->save_p
[i
] = 2;
1738 for (i
= GPR_FIRST
; i
<= GPR_LAST
; i
++)
1740 if (regs_ever_live
[i
] && (!call_used_regs
[i
] || i
== GPR_LINK
))
1749 /* Determine which register pairs can be saved together with ld2w/st2w */
1750 for (i
= GPR_FIRST
; i
<= GPR_LAST
; i
++)
1752 if (((i
- GPR_FIRST
) & 1) == 0 && save_gpr_p
[i
] && save_gpr_p
[i
+1])
1755 info_ptr
->save_p
[i
++] = 2;
1757 else if (save_gpr_p
[i
])
1760 info_ptr
->save_p
[i
] = 1;
1764 /* Determine various sizes */
1765 info_ptr
->varargs_p
= varargs_p
;
1766 info_ptr
->varargs_size
= ((varargs_p
)
1767 ? (GPR_ARG_LAST
+ 1 - GPR_ARG_FIRST
) * UNITS_PER_WORD
1770 info_ptr
->accum_size
= 2 * UNITS_PER_WORD
* saved_accs
;
1771 info_ptr
->gpr_size
= D30V_ALIGN (UNITS_PER_WORD
* saved_gprs
,
1772 2 * UNITS_PER_WORD
);
1773 info_ptr
->vars_size
= D30V_ALIGN (get_frame_size (), 2 * UNITS_PER_WORD
);
1774 info_ptr
->parm_size
= D30V_ALIGN (current_function_outgoing_args_size
,
1775 2 * UNITS_PER_WORD
);
1777 info_ptr
->total_size
= D30V_ALIGN ((info_ptr
->gpr_size
1778 + info_ptr
->accum_size
1779 + info_ptr
->vars_size
1780 + info_ptr
->parm_size
1781 + info_ptr
->varargs_size
1782 + current_function_pretend_args_size
),
1783 (STACK_BOUNDARY
/ BITS_PER_UNIT
));
1785 info_ptr
->save_offset
= (info_ptr
->total_size
1786 - (current_function_pretend_args_size
1787 + info_ptr
->varargs_size
1788 + info_ptr
->gpr_size
1789 + info_ptr
->accum_size
));
1791 /* The link register is the last GPR saved, but there might be some padding
1792 bytes after it, so account for that. */
1793 info_ptr
->link_offset
= (info_ptr
->total_size
1794 - (current_function_pretend_args_size
1795 + info_ptr
->varargs_size
1796 + (info_ptr
->gpr_size
1797 - UNITS_PER_WORD
* saved_gprs
)
1800 info_ptr
->memrefs_varargs
= info_ptr
->varargs_size
/ (2 * UNITS_PER_WORD
);
1801 info_ptr
->memrefs_2words
= memrefs_2words
;
1802 info_ptr
->memrefs_1word
= memrefs_1word
;
1804 if (reload_completed
)
1805 d30v_stack_cache
= info_ptr
;
1811 /* Internal function to print all of the information about the stack */
1814 debug_stack_info (info
)
1820 info
= d30v_stack_info ();
1822 fprintf (stderr
, "\nStack information for function %s:\n",
1823 ((current_function_decl
&& DECL_NAME (current_function_decl
))
1824 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
1827 fprintf (stderr
, "\tsave_offset = %d\n", info
->save_offset
);
1828 fprintf (stderr
, "\tmemrefs_varargs = %d\n", info
->memrefs_varargs
);
1829 fprintf (stderr
, "\tmemrefs_2words = %d\n", info
->memrefs_2words
);
1830 fprintf (stderr
, "\tmemrefs_1word = %d\n", info
->memrefs_1word
);
1831 fprintf (stderr
, "\tvarargs_p = %d\n", info
->varargs_p
);
1832 fprintf (stderr
, "\tvarargs_size = %d\n", info
->varargs_size
);
1833 fprintf (stderr
, "\tvars_size = %d\n", info
->vars_size
);
1834 fprintf (stderr
, "\tparm_size = %d\n", info
->parm_size
);
1835 fprintf (stderr
, "\tgpr_size = %d\n", info
->gpr_size
);
1836 fprintf (stderr
, "\taccum_size = %d\n", info
->accum_size
);
1837 fprintf (stderr
, "\ttotal_size = %d\n", info
->total_size
);
1838 fprintf (stderr
, "\tsaved registers =");
1840 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1842 if (info
->save_p
[i
] == 2)
1844 fprintf (stderr
, " %s-%s", reg_names
[i
], reg_names
[i
+1]);
1847 else if (info
->save_p
[i
])
1848 fprintf (stderr
, " %s", reg_names
[i
]);
1851 putc ('\n', stderr
);
1856 /* Return non-zero if this function is known to have a null or 1 instruction epilogue. */
1861 if (reload_completed
)
1863 d30v_stack_t
*info
= d30v_stack_info ();
1865 /* If no epilogue code is needed, can use just a simple jump */
1866 if (info
->total_size
== 0)
1870 /* If just a small amount of local stack was allocated and no registers
1871 saved, skip forward branch */
1872 if (info
->total_size
== info
->vars_size
1873 && IN_RANGE_P (info
->total_size
, 1, 31))
1882 /* A C statement (sans semicolon) for initializing the variable CUM for the
1883 state at the beginning of the argument list. The variable has type
1884 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type
1885 of the function which will receive the args, or 0 if the args are to a
1886 compiler support library function. The value of INDIRECT is nonzero when
1887 processing an indirect call, for example a call through a function pointer.
1888 The value of INDIRECT is zero for a call to an explicitly named function, a
1889 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find
1890 arguments for the function being compiled.
1892 When processing a call to a compiler support library function, LIBNAME
1893 identifies which one. It is a `symbol_ref' rtx which contains the name of
1894 the function, as a string. LIBNAME is 0 when an ordinary C function call is
1895 being processed. Thus, each time this macro is called, either LIBNAME or
1896 FNTYPE is nonzero, but never both of them at once. */
1899 d30v_init_cumulative_args (cum
, fntype
, libname
, indirect
, incoming
)
1900 CUMULATIVE_ARGS
*cum
;
1906 *cum
= GPR_ARG_FIRST
;
1908 if (TARGET_DEBUG_ARG
)
1910 fprintf (stderr
, "\ninit_cumulative_args:");
1912 fputs (" indirect", stderr
);
1915 fputs (" incoming", stderr
);
1919 tree ret_type
= TREE_TYPE (fntype
);
1920 fprintf (stderr
, " return=%s,",
1921 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1924 if (libname
&& GET_CODE (libname
) == SYMBOL_REF
)
1925 fprintf (stderr
, " libname=%s", XSTR (libname
, 0));
1927 putc ('\n', stderr
);
1932 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1933 argument with the specified mode and type. If it is not defined,
1934 `PARM_BOUNDARY' is used for all arguments. */
1937 d30v_function_arg_boundary (mode
, type
)
1938 enum machine_mode mode
;
1941 int size
= ((mode
== BLKmode
&& type
)
1942 ? int_size_in_bytes (type
)
1943 : GET_MODE_SIZE (mode
));
1945 return (size
> UNITS_PER_WORD
) ? 2*UNITS_PER_WORD
: UNITS_PER_WORD
;
1949 /* A C expression that controls whether a function argument is passed in a
1950 register, and which register.
1952 The arguments are CUM, which summarizes all the previous arguments; MODE,
1953 the machine mode of the argument; TYPE, the data type of the argument as a
1954 tree node or 0 if that is not known (which happens for C support library
1955 functions); and NAMED, which is 1 for an ordinary argument and 0 for
1956 nameless arguments that correspond to `...' in the called function's
1959 The value of the expression should either be a `reg' RTX for the hard
1960 register in which to pass the argument, or zero to pass the argument on the
1963 For machines like the Vax and 68000, where normally all arguments are
1964 pushed, zero suffices as a definition.
1966 The usual way to make the ANSI library `stdarg.h' work on a machine where
1967 some arguments are usually passed in registers, is to cause nameless
1968 arguments to be passed on the stack instead. This is done by making
1969 `FUNCTION_ARG' return 0 whenever NAMED is 0.
1971 You may use the macro `MUST_PASS_IN_STACK (MODE, TYPE)' in the definition of
1972 this macro to determine if this argument is of a type that must be passed in
1973 the stack. If `REG_PARM_STACK_SPACE' is not defined and `FUNCTION_ARG'
1974 returns non-zero for such an argument, the compiler will abort. If
1975 `REG_PARM_STACK_SPACE' is defined, the argument will be computed in the
1976 stack and then loaded into a register. */
1979 d30v_function_arg (cum
, mode
, type
, named
, incoming
)
1980 CUMULATIVE_ARGS
*cum
;
1981 enum machine_mode mode
;
1984 int incoming ATTRIBUTE_UNUSED
;
1986 int size
= ((mode
== BLKmode
&& type
)
1987 ? int_size_in_bytes (type
)
1988 : GET_MODE_SIZE (mode
));
1989 int adjust
= (size
> UNITS_PER_WORD
&& (*cum
& 1) != 0);
1992 /* Return a marker for use in the call instruction. */
1993 if (mode
== VOIDmode
)
1996 else if (*cum
+ adjust
<= GPR_ARG_LAST
)
1997 ret
= gen_rtx (REG
, mode
, *cum
+ adjust
);
2002 if (TARGET_DEBUG_ARG
)
2004 "function_arg: words = %2d, mode = %4s, named = %d, size = %3d, adjust = %1d, arg = %s\n",
2005 *cum
, GET_MODE_NAME (mode
), named
, size
, adjust
,
2006 (ret
) ? ((ret
== const0_rtx
) ? "<0>" : reg_names
[ REGNO (ret
) ]) : "memory");
2012 /* A C expression for the number of words, at the beginning of an argument,
2013 must be put in registers. The value must be zero for arguments that are
2014 passed entirely in registers or that are entirely pushed on the stack.
2016 On some machines, certain arguments must be passed partially in registers
2017 and partially in memory. On these machines, typically the first N words of
2018 arguments are passed in registers, and the rest on the stack. If a
2019 multi-word argument (a `double' or a structure) crosses that boundary, its
2020 first few words must be passed in registers and the rest must be pushed.
2021 This macro tells the compiler when this occurs, and how many of the words
2022 should go in registers.
2024 `FUNCTION_ARG' for these arguments should return the first register to be
2025 used by the caller for this argument; likewise `FUNCTION_INCOMING_ARG', for
2026 the called function. */
2029 d30v_function_arg_partial_nregs (cum
, mode
, type
, named
)
2030 CUMULATIVE_ARGS
*cum
;
2031 enum machine_mode mode
;
2033 int named ATTRIBUTE_UNUSED
;
2035 int bytes
= ((mode
== BLKmode
)
2036 ? int_size_in_bytes (type
)
2037 : GET_MODE_SIZE (mode
));
2038 int words
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2039 int adjust
= (bytes
> UNITS_PER_WORD
&& (*cum
& 1) != 0);
2040 int arg_num
= *cum
+ adjust
;
2043 ret
= ((arg_num
<= GPR_ARG_LAST
&& arg_num
+ words
> GPR_ARG_LAST
+1)
2044 ? GPR_ARG_LAST
- arg_num
+ 1
2047 if (TARGET_DEBUG_ARG
&& ret
)
2048 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
2054 /* A C expression that indicates when an argument must be passed by reference.
2055 If nonzero for an argument, a copy of that argument is made in memory and a
2056 pointer to the argument is passed instead of the argument itself. The
2057 pointer is passed in whatever way is appropriate for passing a pointer to
2060 On machines where `REG_PARM_STACK_SPACE' is not defined, a suitable
2061 definition of this macro might be
2062 #define FUNCTION_ARG_PASS_BY_REFERENCE\
2063 (CUM, MODE, TYPE, NAMED) \
2064 MUST_PASS_IN_STACK (MODE, TYPE) */
2067 d30v_function_arg_pass_by_reference (cum
, mode
, type
, named
)
2068 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
2069 enum machine_mode mode
;
2071 int named ATTRIBUTE_UNUSED
;
2073 int ret
= MUST_PASS_IN_STACK (mode
, type
);
2075 if (TARGET_DEBUG_ARG
&& ret
)
2076 fprintf (stderr
, "function_arg_pass_by_reference: %d\n", ret
);
2082 /* A C statement (sans semicolon) to update the summarizer variable CUM to
2083 advance past an argument in the argument list. The values MODE, TYPE and
2084 NAMED describe that argument. Once this is done, the variable CUM is
2085 suitable for analyzing the *following* argument with `FUNCTION_ARG', etc.
2087 This macro need not do anything if the argument in question was passed on
2088 the stack. The compiler knows how to track the amount of stack space used
2089 for arguments without any special help. */
2092 d30v_function_arg_advance (cum
, mode
, type
, named
)
2093 CUMULATIVE_ARGS
*cum
;
2094 enum machine_mode mode
;
2098 int bytes
= ((mode
== BLKmode
)
2099 ? int_size_in_bytes (type
)
2100 : GET_MODE_SIZE (mode
));
2101 int words
= D30V_ALIGN (bytes
, UNITS_PER_WORD
) / UNITS_PER_WORD
;
2102 int adjust
= (bytes
> UNITS_PER_WORD
&& (*cum
& 1) != 0);
2104 *cum
+= words
+ adjust
;
2106 if (TARGET_DEBUG_ARG
)
2108 "function_adv: words = %2d, mode = %4s, named = %d, size = %3d, adjust = %1d\n",
2109 *cum
, GET_MODE_NAME (mode
), named
, words
* UNITS_PER_WORD
, adjust
);
2113 /* If defined, is a C expression that produces the machine-specific code for a
2114 call to `__builtin_saveregs'. This code will be moved to the very beginning
2115 of the function, before any parameter access are made. The return value of
2116 this function should be an RTX that contains the value to use as the return
2117 of `__builtin_saveregs'.
2119 If this macro is not defined, the compiler will output an ordinary call to
2120 the library function `__builtin_saveregs'. */
2123 d30v_expand_builtin_saveregs ()
2125 int offset
= UNITS_PER_WORD
* (GPR_ARG_LAST
+ 1 - GPR_ARG_FIRST
);
2127 if (TARGET_DEBUG_ARG
)
2128 fprintf (stderr
, "expand_builtin_saveregs: offset from ap = %d\n",
2131 return gen_rtx (PLUS
, Pmode
, virtual_incoming_args_rtx
, GEN_INT (- offset
));
2135 /* This macro offers an alternative to using `__builtin_saveregs' and defining
2136 the macro `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
2137 arguments into the stack so that all the arguments appear to have been
2138 passed consecutively on the stack. Once this is done, you can use the
2139 standard implementation of varargs that works for machines that pass all
2140 their arguments on the stack.
2142 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure, containing
2143 the values that obtain after processing of the named arguments. The
2144 arguments MODE and TYPE describe the last named argument--its machine mode
2145 and its data type as a tree node.
2147 The macro implementation should do two things: first, push onto the stack
2148 all the argument registers *not* used for the named arguments, and second,
2149 store the size of the data thus pushed into the `int'-valued variable whose
2150 name is supplied as the argument PRETEND_ARGS_SIZE. The value that you
2151 store here will serve as additional offset for setting up the stack frame.
2153 Because you must generate code to push the anonymous arguments at compile
2154 time without knowing their data types, `SETUP_INCOMING_VARARGS' is only
2155 useful on machines that have just a single category of argument register and
2156 use it uniformly for all data types.
2158 If the argument SECOND_TIME is nonzero, it means that the arguments of the
2159 function are being analyzed for the second time. This happens for an inline
2160 function, which is not actually compiled until the end of the source file.
2161 The macro `SETUP_INCOMING_VARARGS' should not generate any instructions in
2165 d30v_setup_incoming_varargs (cum
, mode
, type
, pretend_size
, second_time
)
2166 CUMULATIVE_ARGS
*cum
;
2167 enum machine_mode mode
;
2168 tree type ATTRIBUTE_UNUSED
;
2169 int *pretend_size ATTRIBUTE_UNUSED
;
2172 if (TARGET_DEBUG_ARG
)
2174 "setup_vararg: words = %2d, mode = %4s, second_time = %d\n",
2175 *cum
, GET_MODE_NAME (mode
), second_time
);
2179 /* Create the va_list data type. */
2182 d30v_build_va_list ()
2184 tree f_arg_ptr
, f_arg_num
, record
, type_decl
;
2187 record
= make_lang_type (RECORD_TYPE
);
2188 type_decl
= build_decl (TYPE_DECL
, get_identifier ("__va_list_tag"), record
);
2189 int_type_node
= make_signed_type (INT_TYPE_SIZE
);
2191 f_arg_ptr
= build_decl (FIELD_DECL
, get_identifier ("__va_arg_ptr"),
2193 f_arg_num
= build_decl (FIELD_DECL
, get_identifier ("__va_arg_num"),
2196 DECL_FIELD_CONTEXT (f_arg_ptr
) = record
;
2197 DECL_FIELD_CONTEXT (f_arg_num
) = record
;
2199 TREE_CHAIN (record
) = type_decl
;
2200 TYPE_NAME (record
) = type_decl
;
2201 TYPE_FIELDS (record
) = f_arg_ptr
;
2202 TREE_CHAIN (f_arg_ptr
) = f_arg_num
;
2204 layout_type (record
);
2206 /* The correct type is an array type of one element. */
2207 return build_array_type (record
, build_index_type (size_zero_node
));
2211 /* Expand __builtin_va_start to do the va_start macro. */
2214 d30v_expand_builtin_va_start (stdarg_p
, valist
, nextarg
)
2215 int stdarg_p ATTRIBUTE_UNUSED
;
2217 rtx nextarg ATTRIBUTE_UNUSED
;
2219 HOST_WIDE_INT words
;
2220 tree f_arg_ptr
, f_arg_num
;
2221 tree arg_ptr
, arg_num
, saveregs
, t
;
2223 f_arg_ptr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2224 f_arg_num
= TREE_CHAIN (f_arg_ptr
);
2226 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2227 arg_ptr
= build (COMPONENT_REF
, TREE_TYPE (f_arg_ptr
), valist
, f_arg_ptr
);
2228 arg_num
= build (COMPONENT_REF
, TREE_TYPE (f_arg_num
), valist
, f_arg_num
);
2230 words
= current_function_args_info
; /* __builtin_args_info (0) */
2232 /* (AP)->__va_arg_ptr = (int *) __builtin_saveregs (); */
2233 saveregs
= make_tree (TREE_TYPE (arg_ptr
), d30v_expand_builtin_saveregs ());
2234 t
= build (MODIFY_EXPR
, TREE_TYPE (arg_ptr
), arg_ptr
, saveregs
);
2235 TREE_SIDE_EFFECTS (t
) = 1;
2236 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2238 /* (AP)->__va_arg_num = __builtin_args_info (0) - 2; */
2239 t
= build (PLUS_EXPR
, TREE_TYPE (arg_num
), build_int_2 (words
, 0),
2240 build_int_2 (-GPR_ARG_FIRST
, 0));
2241 t
= build (MODIFY_EXPR
, TREE_TYPE (arg_num
), arg_num
, t
);
2242 TREE_SIDE_EFFECTS (t
) = 1;
2243 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2247 /* Expand __builtin_va_arg to do the va_arg macro. */
2250 d30v_expand_builtin_va_arg(valist
, type
)
2254 tree f_arg_ptr
, f_arg_num
;
2255 tree arg_ptr
, arg_num
, t
, ptr
;
2257 rtx lab_false
, ptr_rtx
, r
;
2259 f_arg_ptr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2260 f_arg_num
= TREE_CHAIN (f_arg_ptr
);
2262 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2263 arg_ptr
= build (COMPONENT_REF
, TREE_TYPE (f_arg_ptr
), valist
, f_arg_ptr
);
2264 arg_num
= build (COMPONENT_REF
, TREE_TYPE (f_arg_num
), valist
, f_arg_num
);
2266 size
= int_size_in_bytes (type
);
2268 lab_false
= gen_label_rtx ();
2269 ptr_rtx
= gen_reg_rtx (Pmode
);
2271 /* if (sizeof (TYPE) > 4 && ((AP)->__va_arg_num & 1) != 0)
2272 (AP)->__va_arg_num++; */
2274 if (size
> UNITS_PER_WORD
)
2276 t
= build (BIT_AND_EXPR
, TREE_TYPE (arg_num
), arg_num
,
2277 build_int_2 (1, 0));
2279 emit_cmp_and_jump_insns (expand_expr (t
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
2280 GEN_INT (0), EQ
, const1_rtx
, QImode
, 1, 1,
2283 t
= build (POSTINCREMENT_EXPR
, TREE_TYPE (arg_num
), arg_num
,
2284 build_int_2 (1, 0));
2285 TREE_SIDE_EFFECTS (t
) = 1;
2286 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2288 emit_label (lab_false
);
2292 /* __ptr = (TYPE *)(((char *)(void *)((AP)->__va_arg_ptr
2293 + (AP)->__va_arg_num))); */
2295 t
= build (MULT_EXPR
, TREE_TYPE (arg_num
), arg_num
, build_int_2 (4, 0));
2296 t
= build (PLUS_EXPR
, ptr_type_node
, arg_ptr
, t
);
2298 /* if (sizeof (TYPE) < 4)
2299 __ptr = (void *)__ptr + 4 - sizeof (TYPE); */
2301 if (size
< UNITS_PER_WORD
)
2302 t
= build (PLUS_EXPR
, ptr_type_node
, t
,
2303 build_int_2 (UNITS_PER_WORD
- size
, 0));
2305 TREE_SIDE_EFFECTS (t
) = 1;
2307 ptr
= build1 (NOP_EXPR
, build_pointer_type (type
), t
);
2308 t
= build (MODIFY_EXPR
, type
, ptr
, t
);
2310 r
= expand_expr (t
, ptr_rtx
, Pmode
, EXPAND_NORMAL
);
2312 emit_move_insn (ptr_rtx
, r
);
2315 /* (AP)->__va_arg_num += (sizeof (TYPE) + 3) / 4; */
2316 num
= (size
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
2317 t
= build (POSTINCREMENT_EXPR
, TREE_TYPE (arg_num
), arg_num
,
2318 build_int_2 (num
, 0));
2319 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2325 /* A C compound statement that outputs the assembler code for entry to a
2326 function. The prologue is responsible for setting up the stack frame,
2327 initializing the frame pointer register, saving registers that must be
2328 saved, and allocating SIZE additional bytes of storage for the local
2329 variables. SIZE is an integer. FILE is a stdio stream to which the
2330 assembler code should be output.
2332 The label for the beginning of the function need not be output by this
2333 macro. That has already been done when the macro is run.
2335 To determine which registers to save, the macro can refer to the array
2336 `regs_ever_live': element R is nonzero if hard register R is used anywhere
2337 within the function. This implies the function prologue should save
2338 register R, provided it is not one of the call-used registers.
2339 (`FUNCTION_EPILOGUE' must likewise use `regs_ever_live'.)
2341 On machines that have "register windows", the function entry code does not
2342 save on the stack the registers that are in the windows, even if they are
2343 supposed to be preserved by function calls; instead it takes appropriate
2344 steps to "push" the register stack, if any non-call-used registers are used
2347 On machines where functions may or may not have frame-pointers, the function
2348 entry code must vary accordingly; it must set up the frame pointer if one is
2349 wanted, and not otherwise. To determine whether a frame pointer is in
2350 wanted, the macro can refer to the variable `frame_pointer_needed'. The
2351 variable's value will be 1 at run time in a function that needs a frame
2352 pointer. *Note Elimination::.
2354 The function entry code is responsible for allocating any stack space
2355 required for the function. This stack space consists of the regions listed
2356 below. In most cases, these regions are allocated in the order listed, with
2357 the last listed region closest to the top of the stack (the lowest address
2358 if `STACK_GROWS_DOWNWARD' is defined, and the highest address if it is not
2359 defined). You can use a different order for a machine if doing so is more
2360 convenient or required for compatibility reasons. Except in cases where
2361 required by standard or by a debugger, there is no reason why the stack
2362 layout used by GCC need agree with that used by other compilers for a
2365 * A region of `current_function_pretend_args_size' bytes of
2366 uninitialized space just underneath the first argument
2367 arriving on the stack. (This may not be at the very start of
2368 the allocated stack region if the calling sequence has pushed
2369 anything else since pushing the stack arguments. But
2370 usually, on such machines, nothing else has been pushed yet,
2371 because the function prologue itself does all the pushing.)
2372 This region is used on machines where an argument may be
2373 passed partly in registers and partly in memory, and, in some
2374 cases to support the features in `varargs.h' and `stdargs.h'.
2376 * An area of memory used to save certain registers used by the
2377 function. The size of this area, which may also include
2378 space for such things as the return address and pointers to
2379 previous stack frames, is machine-specific and usually
2380 depends on which registers have been used in the function.
2381 Machines with register windows often do not require a save
2384 * A region of at least SIZE bytes, possibly rounded up to an
2385 allocation boundary, to contain the local variables of the
2386 function. On some machines, this region and the save area
2387 may occur in the opposite order, with the save area closer to
2388 the top of the stack.
2390 * Optionally, when `ACCUMULATE_OUTGOING_ARGS' is defined, a
2391 region of `current_function_outgoing_args_size' bytes to be
2392 used for outgoing argument lists of the function. *Note
2395 Normally, it is necessary for the macros `FUNCTION_PROLOGUE' and
2396 `FUNCTION_EPILOGUE' to treat leaf functions specially. The C variable
2397 `leaf_function' is nonzero for such a function. */
2399 /* For the d30v, move all of the prologue processing into separate insns. */
2401 d30v_function_prologue (stream
, size
)
2402 FILE *stream ATTRIBUTE_UNUSED
;
2403 int size ATTRIBUTE_UNUSED
;
2408 /* Called after register allocation to add any instructions needed for the
2409 prologue. Using a prologue insn is favored compared to putting all of the
2410 instructions in the FUNCTION_PROLOGUE macro, since it allows the scheduler
2411 to intermix instructions with the saves of the caller saved registers. In
2412 some cases, it might be necessary to emit a barrier instruction as the last
2413 insn to prevent such scheduling. */
2416 d30v_expand_prologue ()
2418 rtx sp
= stack_pointer_rtx
;
2419 d30v_stack_t
*info
= d30v_stack_info ();
2421 rtx mem_di
= NULL_RTX
;
2422 rtx mem_si
= NULL_RTX
;
2423 int num_memrefs
= (info
->memrefs_2words
2424 + info
->memrefs_1word
2425 + info
->memrefs_varargs
);
2427 if (TARGET_DEBUG_STACK
)
2428 debug_stack_info (info
);
2430 /* Grow the stack. */
2431 if (info
->total_size
)
2432 emit_insn (gen_addsi3 (sp
, sp
, GEN_INT (- info
->total_size
)));
2434 /* If there is more than one save, use post-increment addressing which will
2435 result in smaller code, than would the normal references. If there is
2436 only one save, just do the store as normal. */
2438 if (num_memrefs
> 1)
2440 rtx save_tmp
= gen_rtx (REG
, Pmode
, GPR_STACK_TMP
);
2441 rtx post_inc
= gen_rtx (POST_INC
, Pmode
, save_tmp
);
2442 mem_di
= gen_rtx (MEM
, DImode
, post_inc
);
2443 mem_si
= gen_rtx (MEM
, SImode
, post_inc
);
2444 emit_insn (gen_addsi3 (save_tmp
, sp
, GEN_INT (info
->save_offset
)));
2446 else if (num_memrefs
== 1)
2448 rtx addr
= plus_constant (sp
, info
->save_offset
);
2449 mem_di
= gen_rtx (MEM
, DImode
, addr
);
2450 mem_si
= gen_rtx (MEM
, SImode
, addr
);
2453 /* Save the accumulators. */
2454 for (i
= ACCUM_FIRST
; i
<= ACCUM_LAST
; i
++)
2455 if (info
->save_p
[i
])
2457 rtx acc_tmp
= gen_rtx (REG
, DImode
, GPR_ATMP_FIRST
);
2458 emit_insn (gen_movdi (acc_tmp
, gen_rtx (REG
, DImode
, i
)));
2459 emit_insn (gen_movdi (mem_di
, acc_tmp
));
2462 /* Save the GPR registers that are adjacent to each other with st2w. */
2463 for (i
= GPR_FIRST
; i
<= GPR_LAST
; i
+= 2)
2464 if (info
->save_p
[i
] == 2)
2465 emit_insn (gen_movdi (mem_di
, gen_rtx (REG
, DImode
, i
)));
2467 /* Save the GPR registers that need to be saved with a single word store. */
2468 for (i
= GPR_FIRST
; i
<= GPR_LAST
; i
++)
2469 if (info
->save_p
[i
] == 1)
2470 emit_insn (gen_movsi (mem_si
, gen_rtx (REG
, SImode
, i
)));
2472 /* Save the argument registers if this function accepts variable args. */
2473 if (info
->varargs_p
)
2475 /* Realign r22 if an odd # of GPRs were saved. */
2476 if ((info
->memrefs_1word
& 1) != 0)
2478 rtx save_tmp
= XEXP (XEXP (mem_si
, 0), 0);
2479 emit_insn (gen_addsi3 (save_tmp
, save_tmp
, GEN_INT (UNITS_PER_WORD
)));
2482 for (i
= GPR_ARG_FIRST
; i
<= GPR_ARG_LAST
; i
+= 2)
2483 emit_insn (gen_movdi (mem_di
, gen_rtx (REG
, DImode
, i
)));
2486 /* Update the frame pointer. */
2487 if (frame_pointer_needed
)
2488 emit_move_insn (frame_pointer_rtx
, sp
);
2490 /* Hack for now, to prevent scheduler from being too cleaver */
2491 emit_insn (gen_blockage ());
2495 /* A C compound statement that outputs the assembler code for exit from a
2496 function. The epilogue is responsible for restoring the saved registers and
2497 stack pointer to their values when the function was called, and returning
2498 control to the caller. This macro takes the same arguments as the macro
2499 `FUNCTION_PROLOGUE', and the registers to restore are determined from
2500 `regs_ever_live' and `CALL_USED_REGISTERS' in the same way.
2502 On some machines, there is a single instruction that does all the work of
2503 returning from the function. On these machines, give that instruction the
2504 name `return' and do not define the macro `FUNCTION_EPILOGUE' at all.
2506 Do not define a pattern named `return' if you want the `FUNCTION_EPILOGUE'
2507 to be used. If you want the target switches to control whether return
2508 instructions or epilogues are used, define a `return' pattern with a
2509 validity condition that tests the target switches appropriately. If the
2510 `return' pattern's validity condition is false, epilogues will be used.
2512 On machines where functions may or may not have frame-pointers, the function
2513 exit code must vary accordingly. Sometimes the code for these two cases is
2514 completely different. To determine whether a frame pointer is wanted, the
2515 macro can refer to the variable `frame_pointer_needed'. The variable's
2516 value will be 1 when compiling a function that needs a frame pointer.
2518 Normally, `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' must treat leaf
2519 functions specially. The C variable `leaf_function' is nonzero for such a
2520 function. *Note Leaf Functions::.
2522 On some machines, some functions pop their arguments on exit while others
2523 leave that for the caller to do. For example, the 68020 when given `-mrtd'
2524 pops arguments in functions that take a fixed number of arguments.
2526 Your definition of the macro `RETURN_POPS_ARGS' decides which functions pop
2527 their own arguments. `FUNCTION_EPILOGUE' needs to know what was decided.
2528 The variable that is called `current_function_pops_args' is the number of
2529 bytes of its arguments that a function should pop. *Note Scalar Return::. */
2531 /* For the d30v, move all processing to be as insns, but do any cleanup
2532 here, since it is done after handling all of the insns. */
2534 d30v_function_epilogue (stream
, size
)
2535 FILE *stream ATTRIBUTE_UNUSED
;
2536 int size ATTRIBUTE_UNUSED
;
2538 d30v_stack_cache
= (d30v_stack_t
*)0; /* reset stack cache */
2543 /* Called after register allocation to add any instructions needed for the
2544 epilogue. Using a epilogue insn is favored compared to putting all of the
2545 instructions in the FUNCTION_PROLOGUE macro, since it allows the scheduler
2546 to intermix instructions with the saves of the caller saved registers. In
2547 some cases, it might be necessary to emit a barrier instruction as the last
2548 insn to prevent such scheduling. */
2551 d30v_expand_epilogue ()
2553 rtx sp
= stack_pointer_rtx
;
2554 d30v_stack_t
*info
= d30v_stack_info ();
2556 rtx mem_di
= NULL_RTX
;
2557 rtx mem_si
= NULL_RTX
;
2561 /* Hack for now, to prevent scheduler from being too cleaver */
2562 emit_insn (gen_blockage ());
2564 /* Restore sp from fp. */
2565 if (frame_pointer_needed
)
2566 emit_move_insn (sp
, frame_pointer_rtx
);
2568 /* For the epilogue, use post-increment addressing all of the time. First
2569 adjust the sp, to eliminate all of the stack, except for the save area. */
2571 if (info
->save_offset
)
2572 emit_insn (gen_addsi3 (sp
, sp
, GEN_INT (info
->save_offset
)));
2574 post_inc
= gen_rtx (POST_INC
, Pmode
, sp
);
2575 mem_di
= gen_rtx (MEM
, DImode
, post_inc
);
2576 mem_si
= gen_rtx (MEM
, SImode
, post_inc
);
2578 /* Restore the accumulators. */
2579 for (i
= ACCUM_FIRST
; i
<= ACCUM_LAST
; i
++)
2580 if (info
->save_p
[i
])
2582 rtx acc_tmp
= gen_rtx (REG
, DImode
, GPR_ATMP_FIRST
);
2583 emit_insn (gen_movdi (acc_tmp
, mem_di
));
2584 emit_insn (gen_movdi (gen_rtx (REG
, DImode
, i
), acc_tmp
));
2587 /* Restore the GPR registers that are adjacent to each other with ld2w. */
2588 for (i
= GPR_FIRST
; i
<= GPR_LAST
; i
+= 2)
2589 if (info
->save_p
[i
] == 2)
2590 emit_insn (gen_movdi (gen_rtx (REG
, DImode
, i
), mem_di
));
2592 /* Save the GPR registers that need to be saved with a single word store. */
2594 for (i
= GPR_FIRST
; i
<= GPR_LAST
; i
++)
2595 if (info
->save_p
[i
] == 1)
2597 if (d30v_eh_epilogue_sp_ofs
&& i
== GPR_LINK
)
2603 emit_insn (gen_addsi3 (sp
, sp
, GEN_INT (extra_stack
)));
2606 emit_insn (gen_movsi (gen_rtx (REG
, SImode
, i
), mem_si
));
2610 /* Release any remaining stack that was allocated for saving the
2611 varargs registers or because an odd # of registers were stored. */
2612 if ((info
->memrefs_1word
& 1) != 0)
2613 extra_stack
+= UNITS_PER_WORD
;
2614 extra_stack
+= current_function_pretend_args_size
+ info
->varargs_size
;
2618 if (d30v_eh_epilogue_sp_ofs
)
2619 emit_insn (gen_addsi3 (d30v_eh_epilogue_sp_ofs
,
2620 d30v_eh_epilogue_sp_ofs
,
2621 GEN_INT (extra_stack
)));
2623 emit_insn (gen_addsi3 (sp
, sp
, GEN_INT (extra_stack
)));
2625 if (d30v_eh_epilogue_sp_ofs
)
2626 emit_insn (gen_addsi3 (sp
, sp
, d30v_eh_epilogue_sp_ofs
));
2628 /* Now emit the return instruction. */
2629 emit_jump_insn (gen_rtx_RETURN (VOIDmode
));
2633 /* A C statement or compound statement to output to FILE some assembler code to
2634 call the profiling subroutine `mcount'. Before calling, the assembler code
2635 must load the address of a counter variable into a register where `mcount'
2636 expects to find the address. The name of this variable is `LP' followed by
2637 the number LABELNO, so you would generate the name using `LP%d' in a
2640 The details of how the address should be passed to `mcount' are determined
2641 by your operating system environment, not by GNU CC. To figure them out,
2642 compile a small program for profiling using the system's installed C
2643 compiler and look at the assembler code that results. */
2646 d30v_function_profiler (stream
, labelno
)
2648 int labelno ATTRIBUTE_UNUSED
;
2650 fprintf (stream
, "# profile\n");
2654 /* Split a 64 bit item into an upper and a lower part. We specifically do not
2655 want to call gen_highpart/gen_lowpart on CONST_DOUBLEs since it will give us
2656 the wrong part for floating point in cross compilers, and split_double does
2657 not handle registers. Also abort if the register is not a general purpose
2661 d30v_split_double (value
, p_high
, p_low
)
2669 if (!reload_completed
)
2672 switch (GET_CODE (value
))
2675 offset
= SUBREG_WORD (value
);
2676 value
= SUBREG_REG (value
);
2677 if (GET_CODE (value
) != REG
)
2683 regno
= REGNO (value
) + offset
;
2687 *p_high
= gen_rtx (REG
, SImode
, regno
);
2688 *p_low
= gen_rtx (REG
, SImode
, regno
+1);
2693 split_double (value
, p_high
, p_low
);
2702 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2703 for an instruction operand that is a memory reference whose address is X. X
2704 is an RTL expression.
2706 On some machines, the syntax for a symbolic address depends on the section
2707 that the address refers to. On these machines, define the macro
2708 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and
2709 then check for it here. *Note Assembler Format::. */
2712 d30v_print_operand_address (stream
, x
)
2716 if (GET_CODE (x
) == MEM
)
2719 switch (GET_CODE (x
))
2725 fputs (reg_names
[ REGNO (x
) ], stream
);
2729 fprintf (stream
, "%ld", (long) INTVAL (x
));
2732 /* We wrap simple symbol refs inside a parenthesis, so that a name
2733 like `r2' is not taken for a register name. */
2735 fputs ("(", stream
);
2736 assemble_name (stream
, XSTR (x
, 0));
2737 fputs (")", stream
);
2742 output_addr_const (stream
, x
);
2746 fatal_insn ("Bad insn to d30v_print_operand_address:", x
);
2750 /* Print a memory reference suitable for the ld/st instructions. */
2753 d30v_print_operand_memory_reference (stream
, x
)
2760 switch (GET_CODE (x
))
2763 fatal_insn ("Bad insn to d30v_print_operand_memory_reference:", x
);
2783 if (GET_CODE (x0
) == CONST_INT
|| GET_CODE (x0
) == SYMBOL_REF
2784 || GET_CODE (x0
) == CONST
|| GET_CODE (x0
) == LABEL_REF
)
2792 fputs ("@(", stream
);
2794 fputs (reg_names
[GPR_R0
], stream
);
2801 if (GET_CODE (x0
) == SUBREG
)
2803 offset0
= SUBREG_WORD (x0
);
2804 x0
= SUBREG_REG (x0
);
2807 if (GET_CODE (x0
) == POST_INC
)
2812 else if (GET_CODE (x0
) == POST_DEC
)
2818 if (GET_CODE (x0
) == REG
&& GPR_P (REGNO (x0
)))
2819 fprintf (stream
, "%s%s", reg_names
[REGNO (x0
) + offset0
], suffix
);
2821 fatal_insn ("Bad insn to d30v_print_operand_memory_reference:", x
);
2824 fputs (",", stream
);
2827 fputs (reg_names
[GPR_R0
], stream
);
2833 switch (GET_CODE (x1
))
2836 offset1
= SUBREG_WORD (x1
);
2837 x1
= SUBREG_REG (x1
);
2838 if (GET_CODE (x1
) != REG
)
2839 fatal_insn ("Bad insn to d30v_print_operand_memory_reference:", x
);
2843 fputs (reg_names
[REGNO (x1
) + offset1
], stream
);
2847 fprintf (stream
, "%ld", (long) INTVAL (x1
));
2853 d30v_print_operand_address (stream
, x1
);
2857 fatal_insn ("Bad insn to d30v_print_operand_memory_reference:", x
);
2861 fputs (")", stream
);
2865 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2866 for an instruction operand X. X is an RTL expression.
2868 LETTER is a value that can be used to specify one of several ways of
2869 printing the operand. It is used when identical operands must be printed
2870 differently depending on the context. LETTER comes from the `%'
2871 specification that was used to request printing of the operand. If the
2872 specification was just `%DIGIT' then LETTER is 0; if the specification was
2873 `%LTR DIGIT' then LETTER is the ASCII code for LTR.
2875 If X is a register, this macro should print the register's name. The names
2876 can be found in an array `reg_names' whose type is `char *[]'. `reg_names'
2877 is initialized from `REGISTER_NAMES'.
2879 When the machine description has a specification `%PUNCT' (a `%' followed by
2880 a punctuation character), this macro is called with a null pointer for X and
2881 the punctuation character for LETTER.
2883 Standard operand flags that are handled elsewhere:
2884 `=' Output a number unique to each instruction in the compilation.
2885 `a' Substitute an operand as if it were a memory reference.
2886 `c' Omit the syntax that indicates an immediate operand.
2887 `l' Substitute a LABEL_REF into a jump instruction.
2888 `n' Like %cDIGIT, except negate the value before printing.
2890 The d30v specific operand flags are:
2892 `f' Print a SF constant as an int.
2893 `s' Subtract 32 and negate.
2894 `A' Print accumulator number without an `a' in front of it.
2895 `B' Print bit offset for BSET, etc. instructions.
2896 `E' Print u if this is zero extend, nothing if this is sign extend.
2897 `F' Emit /{f,t,x}{f,t,x} for executing a false condition.
2898 `L' Print the lower half of a 64 bit item.
2899 `M' Print a memory reference for ld/st instructions.
2900 `R' Return appropriate cmp instruction for relational test.
2902 `T' Emit /{f,t,x}{f,t,x} for executing a true condition.
2903 `U' Print the upper half of a 64 bit item. */
2906 d30v_print_operand (stream
, x
, letter
)
2911 enum rtx_code code
= (x
) ? GET_CODE (x
) : NIL
;
2912 rtx split_values
[2];
2919 case '.': /* Output r0 */
2920 fputs (reg_names
[GPR_R0
], stream
);
2923 case 'f': /* Print a SF floating constant as an int */
2924 if (GET_CODE (x
) != CONST_DOUBLE
)
2925 fatal_insn ("Bad insn to d30v_print_operand, 'f' modifier:", x
);
2927 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
2928 REAL_VALUE_TO_TARGET_SINGLE (rv
, num
);
2929 fprintf (stream
, "%ld", num
);
2932 case 'A': /* Print accumulator number without an `a' in front of it. */
2933 if (GET_CODE (x
) != REG
|| !ACCUM_P (REGNO (x
)))
2934 fatal_insn ("Bad insn to d30v_print_operand, 'A' modifier:", x
);
2936 putc ('0' + REGNO (x
) - ACCUM_FIRST
, stream
);
2939 case 'M': /* Print a memory reference for ld/st */
2940 if (GET_CODE (x
) != MEM
)
2941 fatal_insn ("Bad insn to d30v_print_operand, 'M' modifier:", x
);
2943 d30v_print_operand_memory_reference (stream
, XEXP (x
, 0));
2946 case 'L': /* print lower part of 64 bit item. */
2947 case 'U': /* print upper part of 64 bit item. */
2948 d30v_split_double (x
, &split_values
[0], &split_values
[1]);
2949 d30v_print_operand (stream
, split_values
[ letter
== 'L' ], '\0');
2952 case 'F': /* Print an appropriate suffix for a false comparision. */
2953 case 'T': /* Print an appropriate suffix for a true comparision. */
2954 /* Note that the sense of appropriate suffix is for conditional execution
2955 and opposite of what branches want. Branches just use the inverse
2957 if ((GET_CODE (x
) == NE
|| GET_CODE (x
) == EQ
)
2958 && GET_MODE (x
) == CCmode
2959 && GET_CODE (XEXP (x
, 0)) == REG
2960 && (GPR_P (REGNO (XEXP (x
, 0))) || BR_FLAG_P (REGNO (XEXP (x
, 0))))
2961 && GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) == 0)
2963 int true_false
= (letter
== 'T');
2965 if (GET_CODE (x
) == EQ
)
2966 true_false
= !true_false
;
2968 if (REGNO (XEXP (x
, 0)) == FLAG_F0
)
2969 fprintf (stream
, "/%cx", (true_false
) ? 'f' : 't');
2971 else if (REGNO (XEXP (x
, 0)) == FLAG_F1
)
2972 fprintf (stream
, "/x%c", (true_false
) ? 'f' : 't');
2975 fputs ((true_false
) ? "tnz" : "tzr", stream
);
2978 else if (GET_CODE (x
) == REG
&& REGNO (x
) == FLAG_F0
)
2979 fprintf (stream
, "/%cx", (letter
== 'T') ? 't' : 'f');
2981 else if (GET_CODE (x
) == REG
&& REGNO (x
) == FLAG_F1
)
2982 fprintf (stream
, "/x%c", (letter
== 'T') ? 't' : 'f');
2984 else if (GET_CODE (x
) == REG
&& GPR_P (REGNO (x
)))
2985 fputs ((letter
== 'T') ? "tnz" : "tzr", stream
);
2988 fatal_insn ("Bad insn to print_operand, 'F' or 'T' modifier:", x
);
2991 case 'B': /* emit offset single bit to change */
2992 if (GET_CODE (x
) == CONST_INT
&& (log
= exact_log2 (INTVAL (x
))) >= 0)
2993 fprintf (stream
, "%d", 31 - log
);
2995 else if (GET_CODE (x
) == CONST_INT
&& (log
= exact_log2 (~ INTVAL (x
))) >= 0)
2996 fprintf (stream
, "%d", 31 - log
);
2999 fatal_insn ("Bad insn to print_operand, 'B' modifier:", x
);
3002 case 'E': /* Print u if this is zero extend, nothing if sign extend. */
3003 if (GET_CODE (x
) == ZERO_EXTEND
)
3005 else if (GET_CODE (x
) != SIGN_EXTEND
)
3006 fatal_insn ("Bad insn to print_operand, 'E' modifier:", x
);
3009 case 'R': /* Return appropriate cmp instruction for relational test. */
3010 switch (GET_CODE (x
))
3012 case EQ
: fputs ("cmpeq", stream
); break;
3013 case NE
: fputs ("cmpne", stream
); break;
3014 case LT
: fputs ("cmplt", stream
); break;
3015 case LE
: fputs ("cmple", stream
); break;
3016 case GT
: fputs ("cmpgt", stream
); break;
3017 case GE
: fputs ("cmpge", stream
); break;
3018 case LTU
: fputs ("cmpult", stream
); break;
3019 case LEU
: fputs ("cmpule", stream
); break;
3020 case GTU
: fputs ("cmpugt", stream
); break;
3021 case GEU
: fputs ("cmpuge", stream
); break;
3024 fatal_insn ("Bad insn to print_operand, 'R' modifier:", x
);
3028 case 's': /* Subtract 32 and negate (for 64 bit shifts). */
3029 if (GET_CODE (x
) == CONST_INT
)
3030 fprintf (stream
, "%d", (int) (32 - INTVAL (x
)));
3033 fatal_insn ("Bad insn to print_operand, 's' modifier:", x
);
3036 case 'S': /* Subtract 32. */
3037 if (GET_CODE (x
) == CONST_INT
)
3038 fprintf (stream
, "%d", (int)(INTVAL (x
) - 32));
3041 fatal_insn ("Bad insn to print_operand, 's' modifier:", x
);
3045 case 'z': /* If arg is 0 or 0.0, print r0, otherwise print as normal */
3046 if ((GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == 0)
3047 || (GET_CODE (x
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (x
) == 0
3048 && CONST_DOUBLE_HIGH (x
) == 0))
3050 fputs (reg_names
[GPR_FIRST
], stream
);
3058 fputs (reg_names
[ REGNO (x
) ], stream
);
3060 else if (code
== CONST_INT
)
3061 fprintf (stream
, "%d", (int)INTVAL (x
));
3063 else if (code
== MEM
)
3064 d30v_print_operand_address (stream
, XEXP (x
, 0));
3066 else if (CONSTANT_ADDRESS_P (x
))
3067 d30v_print_operand_address (stream
, x
);
3070 fatal_insn ("Bad insn in d30v_print_operand, 0 case", x
);
3078 sprintf (buf
, "Invalid asm template character '%%%c'", letter
);
3079 fatal_insn (buf
, x
);
3085 /* A C expression for the size in bytes of the trampoline, as an integer. */
3088 d30v_trampoline_size ()
3094 /* Create a long instruction for building up a trampoline. */
3097 d30v_build_long_insn (high_bits
, low_bits
, imm
, mem
)
3098 HOST_WIDE_INT high_bits
;
3099 HOST_WIDE_INT low_bits
;
3103 rtx reg
= gen_reg_rtx (DImode
);
3104 rtx high_word
= gen_highpart (SImode
, reg
);
3105 rtx low_word
= gen_lowpart (SImode
, reg
);
3106 rtx tmp1
= gen_reg_rtx (SImode
);
3107 rtx tmp2
= gen_reg_rtx (SImode
);
3108 rtx tmp3
= gen_reg_rtx (SImode
);
3109 rtx tmp4
= gen_reg_rtx (SImode
);
3110 rtx tmp5
= gen_reg_rtx (SImode
);
3111 rtx tmp6
= gen_reg_rtx (SImode
);
3113 imm
= force_reg (SImode
, imm
);
3115 /* Stuff top 6 bits of immediate value into high word */
3116 emit_insn (gen_lshrsi3 (tmp1
, imm
, GEN_INT (26)));
3117 emit_insn (gen_andsi3 (tmp2
, tmp1
, GEN_INT (0x3F)));
3118 emit_insn (gen_iorsi3 (high_word
, tmp2
, GEN_INT (high_bits
)));
3120 /* Now get the next 8 bits for building the low word */
3121 emit_insn (gen_andsi3 (tmp3
, imm
, GEN_INT (0x03FC0000)));
3122 emit_insn (gen_ashlsi3 (tmp4
, tmp3
, GEN_INT (2)));
3124 /* And the bottom 18 bits */
3125 emit_insn (gen_andsi3 (tmp5
, imm
, GEN_INT (0x0003FFFF)));
3126 emit_insn (gen_iorsi3 (tmp6
, tmp4
, tmp5
));
3127 emit_insn (gen_iorsi3 (low_word
, tmp6
, GEN_INT (low_bits
)));
3129 /* Store the instruction */
3130 emit_insn (gen_movdi (mem
, reg
));
3134 /* A C statement to initialize the variable parts of a trampoline. ADDR is an
3135 RTX for the address of the trampoline; FNADDR is an RTX for the address of
3136 the nested function; STATIC_CHAIN is an RTX for the static chain value that
3137 should be passed to the function when it is called. */
3140 d30v_initialize_trampoline (addr
, fnaddr
, static_chain
)
3145 /* The instruction space can only be accessed by ld2w/st2w.
3146 Generate on the fly:
3147 or r18,r0,<static-chain>
3149 d30v_build_long_insn (0x83A80000 | ((STATIC_CHAIN_REGNUM
- GPR_FIRST
) << 12),
3150 0x80000000, static_chain
,
3151 gen_rtx (MEM
, DImode
, addr
));
3153 d30v_build_long_insn (0x80180000, 0x80000000, fnaddr
,
3154 gen_rtx (MEM
, DImode
, plus_constant (addr
, 8)));
3158 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
3159 RTX) is a legitimate memory address on the target machine for a memory
3160 operand of mode MODE.
3162 It usually pays to define several simpler macros to serve as subroutines for
3163 this one. Otherwise it may be too complicated to understand.
3165 This macro must exist in two variants: a strict variant and a non-strict
3166 one. The strict variant is used in the reload pass. It must be defined so
3167 that any pseudo-register that has not been allocated a hard register is
3168 considered a memory reference. In contexts where some kind of register is
3169 required, a pseudo-register with no hard register must be rejected.
3171 The non-strict variant is used in other passes. It must be defined to
3172 accept all pseudo-registers in every context where some kind of register is
3175 Compiler source files that want to use the strict variant of this macro
3176 define the macro `REG_OK_STRICT'. You should use an `#ifdef REG_OK_STRICT'
3177 conditional to define the strict variant in that case and the non-strict
3180 Subroutines to check for acceptable registers for various purposes (one for
3181 base registers, one for index registers, and so on) are typically among the
3182 subroutines used to define `GO_IF_LEGITIMATE_ADDRESS'. Then only these
3183 subroutine macros need have two variants; the higher levels of macros may be
3184 the same whether strict or not.
3186 Normally, constant addresses which are the sum of a `symbol_ref' and an
3187 integer are stored inside a `const' RTX to mark them as constant.
3188 Therefore, there is no need to recognize such sums specifically as
3189 legitimate addresses. Normally you would simply recognize any `const' as
3192 Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant sums that
3193 are not marked with `const'. It assumes that a naked `plus' indicates
3194 indexing. If so, then you *must* reject such naked constant sums as
3195 illegitimate addresses, so that none of them will be given to
3196 `PRINT_OPERAND_ADDRESS'.
3198 On some machines, whether a symbolic address is legitimate depends on the
3199 section that the address refers to. On these machines, define the macro
3200 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and
3201 then check for it here. When you see a `const', you will have to look
3202 inside it to find the `symbol_ref' in order to determine the section. *Note
3205 The best way to modify the name string is by adding text to the beginning,
3206 with suitable punctuation to prevent any ambiguity. Allocate the new name
3207 in `saveable_obstack'. You will have to modify `ASM_OUTPUT_LABELREF' to
3208 remove and decode the added text and output the name accordingly, and define
3209 `STRIP_NAME_ENCODING' to access the original name string.
3211 You can check the information stored here into the `symbol_ref' in the
3212 definitions of the macros `GO_IF_LEGITIMATE_ADDRESS' and
3213 `PRINT_OPERAND_ADDRESS'.
3215 Return 0 if the address is not legitimate, 1 if the address would fit
3216 in a short instruction, or 2 if the address would fit in a long
3219 #define XREGNO_OK_FOR_BASE_P(REGNO, STRICT_P) \
3221 ? REGNO_OK_FOR_BASE_P (REGNO) \
3222 : GPR_OR_PSEUDO_P (REGNO))
3225 d30v_legitimate_address_p (mode
, x
, strict_p
)
3226 enum machine_mode mode
;
3233 switch (GET_CODE (x
))
3240 if (GET_CODE (x
) != REG
)
3246 ret
= XREGNO_OK_FOR_BASE_P (REGNO (x
), strict_p
);
3253 if (GET_CODE (x0
) == SUBREG
)
3254 x0
= SUBREG_REG (x0
);
3256 if (GET_CODE (x0
) == POST_INC
|| GET_CODE (x0
) == POST_DEC
)
3259 if (GET_CODE (x0
) != REG
|| !XREGNO_OK_FOR_BASE_P (REGNO (x0
), strict_p
))
3262 switch (GET_CODE (x1
))
3268 x1
= SUBREG_REG (x1
);
3269 if (GET_CODE (x1
) != REG
)
3275 ret
= XREGNO_OK_FOR_BASE_P (REGNO (x1
), strict_p
);
3279 ret
= (IN_RANGE_P (INTVAL (x1
), -32, 31)) ? 1 : 2;
3291 ret
= (IN_RANGE_P (INTVAL (x
), -32, 31)) ? 1 : 2;
3303 if (GET_CODE (x0
) == REG
&& XREGNO_OK_FOR_BASE_P (REGNO (x0
), strict_p
))
3308 if (TARGET_DEBUG_ADDR
)
3310 fprintf (stderr
, "\n========== GO_IF_LEGITIMATE_ADDRESS, mode = %s, result = %d, addresses are %sstrict\n",
3311 GET_MODE_NAME (mode
), ret
, (strict_p
) ? "" : "not ");
3319 /* A C compound statement that attempts to replace X with a valid memory
3320 address for an operand of mode MODE. WIN will be a C statement label
3321 elsewhere in the code; the macro definition may use
3323 GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN);
3325 to avoid further processing if the address has become legitimate.
3327 X will always be the result of a call to `break_out_memory_refs', and OLDX
3328 will be the operand that was given to that function to produce X.
3330 The code generated by this macro should not alter the substructure of X. If
3331 it transforms X into a more legitimate form, it should assign X (which will
3332 always be a C variable) a new value.
3334 It is not necessary for this macro to come up with a legitimate address.
3335 The compiler has standard ways of doing so in all cases. In fact, it is
3336 safe for this macro to do nothing. But often a machine-dependent strategy
3337 can generate better code. */
3340 d30v_legitimize_address (x
, oldx
, mode
, strict_p
)
3342 rtx oldx ATTRIBUTE_UNUSED
;
3343 enum machine_mode mode ATTRIBUTE_UNUSED
;
3344 int strict_p ATTRIBUTE_UNUSED
;
3348 if (TARGET_DEBUG_ADDR
)
3352 fprintf (stderr
, "\n========== LEGITIMIZE_ADDRESS, transformed:\n");
3354 fprintf (stderr
, "\ninto:\n");
3359 fprintf (stderr
, "\n========== LEGITIMIZE_ADDRESS, did nothing with:\n");
3368 /* A C statement or compound statement with a conditional `goto LABEL;'
3369 executed if memory address X (an RTX) can have different meanings depending
3370 on the machine mode of the memory reference it is used for or if the address
3371 is valid for some modes but not others.
3373 Autoincrement and autodecrement addresses typically have mode-dependent
3374 effects because the amount of the increment or decrement is the size of the
3375 operand being addressed. Some machines have other mode-dependent addresses.
3376 Many RISC machines have no mode-dependent addresses.
3378 You may assume that ADDR is a valid address for the machine. */
3381 d30v_mode_dependent_address_p (addr
)
3384 switch (GET_CODE (addr
))
3398 /* Generate the appropriate comparison code for a test. */
3401 d30v_emit_comparison (test_int
, result
, arg1
, arg2
)
3407 enum rtx_code test
= (enum rtx_code
) test_int
;
3408 enum machine_mode mode
= GET_MODE (arg1
);
3409 rtx rtx_test
= gen_rtx (SET
, VOIDmode
, result
, gen_rtx (test
, CCmode
, arg1
, arg2
));
3412 || (mode
== DImode
&& (test
== EQ
|| test
== NE
))
3413 || (mode
== DImode
&& (test
== LT
|| test
== GE
)
3414 && GET_CODE (arg2
) == CONST_INT
&& INTVAL (arg2
) == 0))
3417 else if (mode
== DImode
)
3418 return gen_rtx (PARALLEL
, VOIDmode
,
3421 gen_rtx (CLOBBER
, VOIDmode
,
3422 gen_reg_rtx (CCmode
))));
3425 fatal_insn ("d30v_emit_comparison", rtx_test
);
3429 /* Return appropriate code to move 2 words. Since DImode registers must start
3430 on even register numbers, there is no possibility of overlap. */
3433 d30v_move_2words (operands
, insn
)
3437 if (GET_CODE (operands
[0]) == REG
&& GPR_P (REGNO (operands
[0])))
3439 if (GET_CODE (operands
[1]) == REG
&& GPR_P (REGNO (operands
[1])))
3440 return "or %U0,%.,%U1\n\tor %L0,%.,%L1";
3442 else if (GET_CODE (operands
[1]) == REG
&& ACCUM_P (REGNO (operands
[1])))
3443 return "mvfacc %L0,%1,%.\n\tmvfacc %U0,%1,32";
3445 else if (GET_CODE (operands
[1]) == MEM
)
3446 return "ld2w %0,%M1";
3448 else if (GET_CODE (operands
[1]) == CONST_INT
3449 || GET_CODE (operands
[1]) == CONST_DOUBLE
)
3450 return "or %U0,%.,%U1\n\tor %L0,%.,%L1";
3453 else if (GET_CODE (operands
[0]) == REG
&& ACCUM_P (REGNO (operands
[0])))
3455 if (GET_CODE (operands
[1]) == REG
3456 && GPR_P (REGNO (operands
[1])))
3457 return "mvtacc %0,%U1,%L1";
3459 if (GET_CODE (operands
[1]) == CONST_INT
3460 && INTVAL (operands
[1]) == 0)
3461 return "mvtacc %0,%.,%.";
3464 else if (GET_CODE (operands
[0]) == MEM
3465 && GET_CODE (operands
[1]) == REG
3466 && GPR_P (REGNO (operands
[1])))
3467 return "st2w %1,%M0";
3469 fatal_insn ("Bad call to d30v_move_2words", insn
);
3473 /* Emit the code to do a conditional move instruction. Return FALSE
3474 if the conditional move could not be executed. */
3477 d30v_emit_cond_move (dest
, test
, true_value
, false_value
)
3484 enum machine_mode mode
= GET_MODE (dest
);
3485 int two_mem_moves_p
= FALSE
;
3487 if (GET_CODE (dest
) == MEM
)
3489 if (!reg_or_0_operand (true_value
, mode
))
3492 if (rtx_equal_p (dest
, false_value
))
3493 two_mem_moves_p
= TRUE
;
3495 else if (!reg_or_0_operand (false_value
, mode
))
3499 /* We used to try to optimize setting 0/1 by using mvfsys, but that turns out
3500 to be slower than just doing the conditional execution. */
3502 br_reg
= gen_reg_rtx (CCmode
);
3503 emit_insn (d30v_emit_comparison (GET_CODE (test
), br_reg
,
3504 d30v_compare_op0
, d30v_compare_op1
));
3506 if (!two_mem_moves_p
)
3507 emit_insn (gen_rtx_SET (VOIDmode
,
3509 gen_rtx_IF_THEN_ELSE (mode
,
3510 gen_rtx_NE (CCmode
, br_reg
,
3516 /* Emit conditional stores as two separate stores. This avoids a problem
3517 where you have a conditional store, and one of the arms of the
3518 conditional store is spilled to memory. */
3519 emit_insn (gen_rtx_SET (VOIDmode
,
3521 gen_rtx_IF_THEN_ELSE (mode
,
3522 gen_rtx_NE (CCmode
, br_reg
,
3527 emit_insn (gen_rtx_SET (VOIDmode
,
3529 gen_rtx_IF_THEN_ELSE (mode
,
3530 gen_rtx_EQ (CCmode
, br_reg
,
3541 /* In rare cases, correct code generation requires extra machine dependent
3542 processing between the second jump optimization pass and delayed branch
3543 scheduling. On those machines, define this macro as a C statement to act on
3544 the code starting at INSN. */
3547 d30v_machine_dependent_reorg (insn
)
3548 rtx insn ATTRIBUTE_UNUSED
;
3553 /* A C statement (sans semicolon) to update the integer variable COST based on
3554 the relationship between INSN that is dependent on DEP_INSN through the
3555 dependence LINK. The default is to make no adjustment to COST. This can be
3556 used for example to specify to the scheduler that an output- or
3557 anti-dependence does not incur the same cost as a data-dependence. */
3559 /* For the d30v, try to insure that the source operands for a load/store are
3560 set 2 cycles before the memory reference. */
3563 d30v_adjust_cost (insn
, link
, dep_insn
, cost
)
3565 rtx link ATTRIBUTE_UNUSED
;
3569 rtx set_dep
= single_set (dep_insn
);
3570 rtx set_insn
= single_set (insn
);
3572 if (set_dep
!= NULL_RTX
&& set_insn
!= NULL_RTX
3573 && GET_CODE (SET_DEST (set_dep
)) == REG
)
3575 rtx reg
= SET_DEST (set_dep
);
3578 if ((GET_CODE (mem
= SET_SRC (set_insn
)) == MEM
3579 && reg_mentioned_p (reg
, XEXP (mem
, 0)))
3580 || (GET_CODE (mem
= SET_DEST (set_insn
)) == MEM
3581 && reg_mentioned_p (reg
, XEXP (mem
, 0))))
3583 return cost
+ ((HAIFA_P
) ? 2 : 4);
3591 /* Functions to save and restore d30v_return_addr_rtx. */
3593 struct machine_function
3599 d30v_save_machine_status (p
)
3602 struct machine_function
*machine
=
3603 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
3605 p
->machine
= machine
;
3606 machine
->ra_rtx
= d30v_return_addr_rtx
;
3610 d30v_restore_machine_status (p
)
3613 struct machine_function
*machine
= p
->machine
;
3615 d30v_return_addr_rtx
= machine
->ra_rtx
;
3618 p
->machine
= (struct machine_function
*)0;
3621 /* Do anything needed before RTL is emitted for each function. */
3624 d30v_init_expanders ()
3626 d30v_return_addr_rtx
= NULL_RTX
;
3627 d30v_eh_epilogue_sp_ofs
= NULL_RTX
;
3629 /* Arrange to save and restore machine status around nested functions. */
3630 save_machine_status
= d30v_save_machine_status
;
3631 restore_machine_status
= d30v_restore_machine_status
;
3634 /* Find the current function's return address.
3636 ??? It would be better to arrange things such that if we would ordinarily
3637 have been a leaf function and we didn't spill the hard reg that we
3638 wouldn't have to save the register in the prolog. But it's not clear
3639 how to get the right information at the right time. */
3646 if ((ret
= d30v_return_addr_rtx
) == NULL
)
3650 d30v_return_addr_rtx
= ret
= gen_reg_rtx (Pmode
);
3652 init
= gen_rtx (SET
, VOIDmode
, ret
, gen_rtx (REG
, Pmode
, GPR_LINK
));
3653 push_topmost_sequence ();
3654 emit_insn_after (init
, get_insns ());
3655 pop_topmost_sequence ();
3661 /* Called to register all of our global variables with the garbage
3665 d30v_add_gc_roots ()
3667 ggc_add_rtx_root (&d30v_compare_op0
, 1);
3668 ggc_add_rtx_root (&d30v_compare_op1
, 1);
3669 ggc_add_rtx_root (&d30v_eh_epilogue_sp_ofs
, 1);
3670 ggc_add_rtx_root (&d30v_return_addr_rtx
, 1);