gcc/config/epiphany/predicates.md

   1 ;; Predicate definitions for code generation on the EPIPHANY cpu.
   2 ;; Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
   3 ;; 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
   4 ;; Free Software Foundation, Inc.
   5 ;; Contributed by Embecosm on behalf of Adapteva, Inc.
   6 ;;
   7 ;; This file is part of GCC.
   8
   9 ;; GCC is free software; you can redistribute it and/or modify
  10 ;; it under the terms of the GNU General Public License as published by
  11 ;; the Free Software Foundation; either version 3, or (at your option)
  12 ;; any later version.
  13
  14 ;; GCC is distributed in the hope that it will be useful,
  15 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 ;; GNU General Public License for more details.
  18
  19 ;; You should have received a copy of the GNU General Public License
  20 ;; along with GCC; see the file COPYING3.  If not see
  21 ;; <http://www.gnu.org/licenses/>.
  22
  23 ;; Returns true iff OP is a symbol reference that is a valid operand
  24 ;; in a jump or call instruction.
  25
  26 (define_predicate "symbolic_operand"
  27   (match_code "symbol_ref,label_ref,const")
  28 {
  29   if (GET_CODE (op) == SYMBOL_REF)
  30     return (!epiphany_is_long_call_p (op)
  31             && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
  32   if (GET_CODE (op) == LABEL_REF)
  33     return true;
  34   if (GET_CODE (op) == CONST)
  35     {
  36       op = XEXP (op, 0);
  37       if (GET_CODE (op) != PLUS || !symbolic_operand (XEXP (op, 0), mode))
  38         return false;
  39       /* The idea here is that a 'small' constant offset should be OK.
  40          What exactly is considered 'small' is a bit arbitrary.  */
  41       return satisfies_constraint_L (XEXP (op, 1));
  42     }
  43   gcc_unreachable ();
  44 })
  45
  46 ;; Acceptable arguments to the call insn.
  47
  48 (define_predicate "call_address_operand"
  49   (ior (match_code "reg")
  50        (match_operand 0 "symbolic_operand")))
  51
  52 (define_predicate "call_operand"
  53   (match_code "mem")
  54 {
  55   op = XEXP (op, 0);
  56   return call_address_operand (op, mode);
  57 })
  58
  59 ;; general purpose register.
  60 (define_predicate "gpr_operand"
  61   (match_code "reg,subreg")
  62 {
  63   int regno;
  64
  65   if (!register_operand (op, mode))
  66     return 0;
  67   if (GET_CODE (op) == SUBREG)
  68     op = XEXP (op, 0);
  69   regno = REGNO (op);
  70   return regno >= FIRST_PSEUDO_REGISTER || regno <= 63;
  71 })
  72
  73 (define_special_predicate "any_gpr_operand"
  74   (match_code "subreg,reg")
  75 {
  76   return gpr_operand (op, mode);
  77 })
  78
  79 ;; register suitable for integer add / sub operations; besides general purpose
  80 ;; registers we allow fake hard registers that are eliminated to a real
  81 ;; hard register via an offset.
  82 (define_predicate "add_reg_operand"
  83   (match_code "reg,subreg")
  84 {
  85   int regno;
  86
  87   if (!register_operand (op, mode))
  88     return 0;
  89   if (GET_CODE (op) == SUBREG)
  90     op = XEXP (op, 0);
  91   regno = REGNO (op);
  92   return (regno >= FIRST_PSEUDO_REGISTER || regno <= 63
  93           || regno == FRAME_POINTER_REGNUM
  94           || regno == ARG_POINTER_REGNUM);
  95 })
  96
  97 ;; Also allows suitable constants
  98 (define_predicate "add_operand"
  99   (match_code "reg,subreg,const_int,symbol_ref,label_ref,const")
 100 {
 101   if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
 102     return add_reg_operand (op, mode);
 103   return satisfies_constraint_L (op);
 104 })
 105
 106 ;; Ordinary 3rd operand for arithmetic operations
 107 (define_predicate "arith_operand"
 108   (match_code "reg,subreg,const_int,symbol_ref,label_ref,const")
 109 {
 110   if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
 111     return register_operand (op, mode);
 112   return satisfies_constraint_L (op);
 113 })
 114
 115 ;; Constant integer 3rd operand for arithmetic operations
 116 (define_predicate "arith_int_operand"
 117   (match_code "const_int,symbol_ref,label_ref,const")
 118 {
 119   return satisfies_constraint_L (op);
 120 })
 121
 122 ;; Return true if OP is an acceptable argument for a single word move source.
 123
 124 (define_predicate "move_src_operand"
 125   (match_code
 126    "symbol_ref,label_ref,const,const_int,const_double,reg,subreg,mem,unspec")
 127 {
 128   switch (GET_CODE (op))
 129     {
 130     case SYMBOL_REF :
 131     case LABEL_REF :
 132     case CONST :
 133       return 1;
 134     case CONST_INT :
 135       return immediate_operand (op, mode);
 136     case CONST_DOUBLE :
 137       /* SImode constants should always fit into a CONST_INT.  Large
 138          unsigned 32-bit constants are represented as negative CONST_INTs.  */
 139       gcc_assert (GET_MODE (op) != SImode);
 140       /* We can handle 32-bit floating point constants.  */
 141       if (mode == SFmode)
 142         return GET_MODE (op) == SFmode;
 143       return 0;
 144     case REG :
 145       return op != frame_pointer_rtx && register_operand (op, mode);
 146     case SUBREG :
 147       /* (subreg (mem ...) ...) can occur here if the inner part was once a
 148          pseudo-reg and is now a stack slot.  */
 149       if (GET_CODE (SUBREG_REG (op)) == MEM)
 150         return address_operand (XEXP (SUBREG_REG (op), 0), mode);
 151       else
 152         return register_operand (op, mode);
 153     case MEM :
 154       return address_operand (XEXP (op, 0), mode);
 155     case UNSPEC:
 156       return satisfies_constraint_Sra (op);
 157     default :
 158       return 0;
 159     }
 160 })
 161
 162 ;; Return true if OP is an acceptable argument for a double word move source.
 163
 164 (define_predicate "move_double_src_operand"
 165   (match_code "reg,subreg,mem,const_int,const_double,const_vector")
 166 {
 167   if (GET_CODE (op) == MEM && misaligned_operand (op, mode)
 168       && !address_operand (plus_constant (Pmode, XEXP (op, 0), 4), SImode))
 169     return 0;
 170   return general_operand (op, mode);
 171 })
 172
 173 ;; Return true if OP is an acceptable argument for a move destination.
 174
 175 (define_predicate "move_dest_operand"
 176   (match_code "reg,subreg,mem")
 177 {
 178   switch (GET_CODE (op))
 179     {
 180     case REG :
 181       return register_operand (op, mode);
 182     case SUBREG :
 183       /* (subreg (mem ...) ...) can occur here if the inner part was once a
 184          pseudo-reg and is now a stack slot.  */
 185       if (GET_CODE (SUBREG_REG (op)) == MEM)
 186         {
 187           return address_operand (XEXP (SUBREG_REG (op), 0), mode);
 188         }
 189       else
 190         {
 191           return register_operand (op, mode);
 192         }
 193     case MEM :
 194       if (GET_MODE_SIZE (mode) == 8 && misaligned_operand (op, mode)
 195           && !address_operand (plus_constant (Pmode, XEXP (op, 0), 4), SImode))
 196         return 0;
 197       return address_operand (XEXP (op, 0), mode);
 198     default :
 199       return 0;
 200     }
 201 })
 202
 203 (define_special_predicate "stacktop_operand"
 204   (match_code "mem")
 205 {
 206   if (mode != VOIDmode && GET_MODE (op) != mode)
 207     return false;
 208   return rtx_equal_p (XEXP (op, 0), stack_pointer_rtx);
 209 })
 210
 211 ;; Return 1 if OP is a comparison operator valid for the mode of CC.
 212 ;; This allows the use of MATCH_OPERATOR to recognize all the branch insns.
 213 ;;
 214 ;; Some insns only set a few bits in the condition code.  So only allow those
 215 ;; comparisons that use the bits that are valid.
 216
 217 (define_predicate "proper_comparison_operator"
 218   (match_code "eq, ne, le, lt, ge, gt, leu, ltu, geu, gtu, unordered, ordered, uneq, unge, ungt, unle, unlt, ltgt")
 219 {
 220   enum rtx_code code = GET_CODE (op);
 221   rtx cc = XEXP (op, 0);
 222
 223   /* combine can try strange things.  */
 224   if (!REG_P (cc))
 225     return 0;
 226   switch (GET_MODE (cc))
 227     {
 228     case CC_Zmode:
 229     case CC_N_NEmode:
 230     case CC_FP_EQmode:
 231       return REGNO (cc) == CC_REGNUM && (code == EQ || code == NE);
 232     case CC_C_LTUmode:
 233       return REGNO (cc) == CC_REGNUM && (code == LTU || code == GEU);
 234     case CC_C_GTUmode:
 235       return REGNO (cc) == CC_REGNUM && (code == GTU || code == LEU);
 236     case CC_FPmode:
 237       return (REGNO (cc) == CCFP_REGNUM
 238               && (code == EQ || code == NE || code == LT || code == LE));
 239     case CC_FP_GTEmode:
 240       return (REGNO (cc) == CC_REGNUM
 241               && (code == EQ || code == NE || code == GT || code == GE
 242                   || code == UNLE || code == UNLT));
 243     case CC_FP_ORDmode:
 244       return REGNO (cc) == CC_REGNUM && (code == ORDERED || code == UNORDERED);
 245     case CC_FP_UNEQmode:
 246       return REGNO (cc) == CC_REGNUM && (code == UNEQ || code == LTGT);
 247     case CCmode:
 248       return REGNO (cc) == CC_REGNUM;
 249     /* From combiner.  */
 250     case QImode: case SImode: case SFmode: case HImode:
 251     /* From cse.c:dead_libcall_p.  */
 252     case DFmode:
 253       return 0;
 254     default:
 255       gcc_unreachable ();
 256     }
 257 })
 258
 259 (define_predicate "cc_operand"
 260   (and (match_code "reg")
 261        (match_test "REGNO (op) == CC_REGNUM || REGNO (op) == CCFP_REGNUM")))
 262
 263 (define_predicate "const0_operand"
 264   (match_code "const_int, const_double")
 265 {
 266   if (mode == VOIDmode)
 267     mode = GET_MODE (op);
 268   return op == CONST0_RTX (mode);
 269 })
 270
 271 (define_predicate "const_float_1_operand"
 272   (match_code "const_double")
 273 {
 274   return op == CONST1_RTX (mode);
 275 })
 276
 277 (define_predicate "cc_move_operand"
 278   (and (match_code "reg")
 279        (ior (match_test "REGNO (op) == CC_REGNUM")
 280             (match_test "gpr_operand (op, mode)"))))
 281
 282 (define_predicate "float_operation"
 283   (match_code "parallel")
 284 {
 285   /* Most patterns start out with one SET and one CLOBBER, and gain a USE
 286      or two of FP_NEAREST_REGNUM / FP_TRUNCATE_REGNUM / FP_ANYFP_REGNUM
 287      after mode switching.  The longer patterns are
 288      all beyond length 4, and before mode switching, end with a
 289      CLOBBER of CCFP_REGNUM.  */
 290   int count = XVECLEN (op, 0);
 291   bool inserted = MACHINE_FUNCTION (cfun)->control_use_inserted;
 292   int i;
 293
 294   if (count == 2)
 295     return !inserted;
 296
 297   /* combine / recog will pass any old garbage here before checking the
 298      rest of the insn.  */
 299   if (count <= 3)
 300     return false;
 301
 302   i = 1;
 303   if (count > 4)
 304     for (i = 4; i < count; i++)
 305       {
 306         rtx x = XVECEXP (op, 0, i);
 307
 308         if (GET_CODE (x) == CLOBBER)
 309           {
 310             if (!REG_P (XEXP (x, 0)))
 311               return false;
 312             if (REGNO (XEXP (x, 0)) == CCFP_REGNUM)
 313               {
 314                 if (count == i + 1)
 315                   return !inserted;
 316                 break;
 317             }
 318           /* Just an ordinary clobber, keep looking.  */
 319         }
 320       else if (GET_CODE (x) == USE
 321                || (GET_CODE (x) == SET && i == 2))
 322         continue;
 323       else
 324         return false;
 325     }
 326   if (count != i + 3 || !inserted)
 327     return false;
 328   for (i = i+1; i < count; i++)
 329     {
 330       rtx x = XVECEXP (op, 0, i);
 331
 332       if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
 333         return false;
 334       x = XEXP (x, 0);
 335       if (!REG_P (x)
 336           || (REGNO (x) != FP_NEAREST_REGNUM
 337               && REGNO (x) != FP_TRUNCATE_REGNUM
 338               && REGNO (x) != FP_ANYFP_REGNUM))
 339         return false;
 340     }
 341   return true;
 342 })
 343
 344 (define_predicate "set_fp_mode_operand"
 345   (ior (match_test "gpr_operand (op, mode)")
 346        (and (match_code "const")
 347             (match_test "satisfies_constraint_Cfm (op)"))))
 348
 349 (define_predicate "post_modify_address"
 350   (match_code "post_modify,post_inc,post_dec"))
 351
 352 (define_predicate "post_modify_operand"
 353   (and (match_code "mem")
 354        (match_test "post_modify_address (XEXP (op, 0), Pmode)")))
 355
 356 (define_predicate "nonsymbolic_immediate_operand"
 357   (ior (match_test "immediate_operand (op, mode)")
 358        (match_code "const_vector"))) /* Is this specific enough?  */
 359
 360 ;; Return true if OP is misaligned memory operand
 361 (define_predicate "misaligned_operand"
 362   (and (match_code "mem")
 363        (match_test "MEM_ALIGN (op) < GET_MODE_ALIGNMENT (mode)")))