aarch64.c, [...]: Move target-def.h includes to end.
[gcc.git] / gcc / config / ft32 / ft32.c
1 /* Target Code for ft32
2 Copyright (C) 2015 Free Software Foundation
3 Contributed by FTDI <support@ftdi.com>
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "rtl.h"
26 #include "regs.h"
27 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
31 #include "output.h"
32 #include "insn-attr.h"
33 #include "flags.h"
34 #include "recog.h"
35 #include "reload.h"
36 #include "diagnostic-core.h"
37 #include "obstack.h"
38 #include "alias.h"
39 #include "symtab.h"
40 #include "tree.h"
41 #include "stor-layout.h"
42 #include "calls.h"
43 #include "expr.h"
44 #include "optabs.h"
45 #include "except.h"
46 #include "function.h"
47 #include "target.h"
48 #include "tm_p.h"
49 #include "langhooks.h"
50 #include "dominance.h"
51 #include "cfg.h"
52 #include "cfgrtl.h"
53 #include "cfganal.h"
54 #include "lcm.h"
55 #include "cfgbuild.h"
56 #include "cfgcleanup.h"
57 #include "predict.h"
58 #include "basic-block.h"
59 #include "df.h"
60 #include "builtins.h"
61 #include "emit-rtl.h"
62
63 #include <stdint.h>
64
65 #define LOSE_AND_RETURN(msgid, x) \
66 do \
67 { \
68 ft32_operand_lossage (msgid, x); \
69 return; \
70 } while (0)
71
72 /* Worker function for TARGET_RETURN_IN_MEMORY. */
73
74 static bool
75 ft32_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED)
76 {
77 const HOST_WIDE_INT size = int_size_in_bytes (type);
78 return (size == -1 || size > 2 * UNITS_PER_WORD);
79 }
80
81 /* Define how to find the value returned by a function.
82 VALTYPE is the data type of the value (as a tree).
83 If the precise function being called is known, FUNC is its
84 FUNCTION_DECL; otherwise, FUNC is 0.
85
86 We always return values in register $r0 for ft32. */
87
88 static rtx
89 ft32_function_value (const_tree valtype,
90 const_tree fntype_or_decl ATTRIBUTE_UNUSED,
91 bool outgoing ATTRIBUTE_UNUSED)
92 {
93 return gen_rtx_REG (TYPE_MODE (valtype), FT32_R0);
94 }
95
96 /* Define how to find the value returned by a library function.
97
98 We always return values in register $r0 for ft32. */
99
100 static rtx
101 ft32_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED)
102 {
103 return gen_rtx_REG (mode, FT32_R0);
104 }
105
106 /* Handle TARGET_FUNCTION_VALUE_REGNO_P.
107
108 We always return values in register $r0 for ft32. */
109
110 static bool
111 ft32_function_value_regno_p (const unsigned int regno)
112 {
113 return (regno == FT32_R0);
114 }
115
116 /* Emit an error message when we're in an asm, and a fatal error for
117 "normal" insns. Formatted output isn't easily implemented, since we
118 use output_operand_lossage to output the actual message and handle the
119 categorization of the error. */
120
121 static void
122 ft32_operand_lossage (const char *msgid, rtx op)
123 {
124 debug_rtx (op);
125 output_operand_lossage ("%s", msgid);
126 }
127
128 /* The PRINT_OPERAND_ADDRESS worker. */
129
130 void
131 ft32_print_operand_address (FILE * file, rtx x)
132 {
133 switch (GET_CODE (x))
134 {
135 case REG:
136 fprintf (file, "%s,0", reg_names[REGNO (x)]);
137 break;
138
139 case PLUS:
140 switch (GET_CODE (XEXP (x, 1)))
141 {
142 case CONST_INT:
143 fprintf (file, "%s,%ld",
144 reg_names[REGNO (XEXP (x, 0))], INTVAL (XEXP (x, 1)));
145 break;
146 case SYMBOL_REF:
147 output_addr_const (file, XEXP (x, 1));
148 fprintf (file, "(%s)", reg_names[REGNO (XEXP (x, 0))]);
149 break;
150 case CONST:
151 {
152 rtx plus = XEXP (XEXP (x, 1), 0);
153 if (GET_CODE (XEXP (plus, 0)) == SYMBOL_REF
154 && CONST_INT_P (XEXP (plus, 1)))
155 {
156 output_addr_const (file, XEXP (plus, 0));
157 fprintf (file, "+%ld(%s)", INTVAL (XEXP (plus, 1)),
158 reg_names[REGNO (XEXP (x, 0))]);
159 }
160 else
161 abort ();
162 }
163 break;
164 default:
165 abort ();
166 }
167 break;
168
169 default:
170 output_addr_const (file, x);
171 break;
172 }
173 }
174
175 /* The PRINT_OPERAND worker. */
176
177 void
178 ft32_print_operand (FILE * file, rtx x, int code)
179 {
180 rtx operand = x;
181
182 /* New code entries should just be added to the switch below. If
183 handling is finished, just return. If handling was just a
184 modification of the operand, the modified operand should be put in
185 "operand", and then do a break to let default handling
186 (zero-modifier) output the operand. */
187
188 switch (code)
189 {
190 case 0:
191 /* No code, print as usual. */
192 break;
193
194 case 'h':
195 if (GET_CODE (operand) != REG)
196 internal_error ("'h' applied to non-register operand");
197 fprintf (file, "%s", reg_names[REGNO (operand) + 1]);
198 return;
199
200 case 'm':
201 fprintf (file, "%ld", (long) (- INTVAL(x)));
202 return;
203
204 case 'd': // a DW spec, from an integer alignment (for BLKmode insns)
205 {
206 int i = INTVAL (x);
207 char dwspec;
208 switch (i)
209 {
210 case 1:
211 dwspec = 'b';
212 break;
213 case 2:
214 dwspec = 's';
215 break;
216 case 4:
217 dwspec = 'l';
218 break;
219 default:
220 if ((i % 4) != 0)
221 internal_error ("bad alignment: %d", i);
222 else
223 dwspec = 'l';
224 break;
225 }
226 fprintf (file, "%c", dwspec);
227 return;
228 }
229
230 case 'f':
231 {
232 int bf = ft32_as_bitfield (INTVAL (x));
233 fprintf (file, "512|(%d<<5)|%d", bf >> 5, bf & 31);
234 return;
235 }
236
237 case 'g':
238 {
239 int bf = ft32_as_bitfield (0xffffffff ^ INTVAL (x));
240 fprintf (file, "(%d<<5)|%d", bf >> 5, bf & 31);
241 return;
242 }
243
244 case 'b':
245 {
246 ft32_print_operand (file, XEXP (x, 0), 0);
247 return;
248 }
249
250 default:
251 LOSE_AND_RETURN ("invalid operand modifier letter", x);
252 }
253
254 /* Print an operand as without a modifier letter. */
255 switch (GET_CODE (operand))
256 {
257 case REG:
258 fprintf (file, "%s", reg_names[REGNO (operand)]);
259 return;
260
261 case MEM:
262 output_address (XEXP (operand, 0));
263 return;
264
265 default:
266 /* No need to handle all strange variants, let output_addr_const
267 do it for us. */
268 if (CONSTANT_P (operand))
269 {
270 output_addr_const (file, operand);
271 return;
272 }
273
274 LOSE_AND_RETURN ("unexpected operand", x);
275 }
276 }
277
278 const char *
279 ft32_load_immediate (rtx dst, int32_t i)
280 {
281 char pattern[100];
282
283 if ((-524288 <= i) && (i <= 524287))
284 {
285 sprintf (pattern, "ldk.l %%0,%d", i);
286 output_asm_insn (pattern, &dst);
287 }
288 else if ((-536870912 <= i) && (i <= 536870911))
289 {
290 ft32_load_immediate (dst, i >> 10);
291 sprintf (pattern, "ldl.l %%0,%%0,%d", i & 1023);
292 output_asm_insn (pattern, &dst);
293 }
294 else
295 {
296 int rd; // rotate distance
297 uint32_t u = i;
298 for (rd = 1; rd < 32; rd++)
299 {
300 u = ((u >> 31) & 1) | (u << 1);
301 if ((-524288 <= (int32_t) u) && ((int32_t) u <= 524287))
302 {
303 ft32_load_immediate (dst, (int32_t) u);
304 sprintf (pattern, "ror.l %%0,%%0,%d", rd);
305 output_asm_insn (pattern, &dst);
306 return "";
307 }
308 }
309 ft32_load_immediate (dst, i >> 10);
310 sprintf (pattern, "ldl.l %%0,%%0,%d", i & 1023);
311 output_asm_insn (pattern, &dst);
312 }
313
314 return "";
315 }
316
317 // x is a bit mask, for example:
318 // 00000000000000000000001111111110
319 // If x contains a single bit mask, return the bitfield spec.
320 // in the above case it returns ((9 << 5) | 1)
321 // Otherwise return -1.
322 //
323
324 #define NBITS(n) ((1U << (n)) - 1U)
325
326 int
327 ft32_as_bitfield (unsigned int x)
328 {
329 int lobit, hibit;
330
331 if (x == 0)
332 return -1;
333
334 for (lobit = 0; lobit < 32; lobit++)
335 if (x & (1 << lobit))
336 break;
337 for (hibit = 31; hibit >= 0; hibit--)
338 if (x & (1 << hibit))
339 break;
340
341 int width = 1 + hibit - lobit;
342 if (width > 16)
343 return -1;
344
345 if (x != (NBITS (width) << lobit))
346 return -1; // not a clean bitfield
347
348 return ((width & 15) << 5) | lobit;
349 }
350
351 /* Per-function machine data. */
352 struct GTY (()) machine_function
353 {
354 /* Number of bytes saved on the stack for callee saved registers. */
355 int callee_saved_reg_size;
356
357 /* Number of bytes saved on the stack for local variables. */
358 int local_vars_size;
359
360 /* The sum of 2 sizes: locals vars and padding byte for saving the
361 * registers. Used in expand_prologue () and expand_epilogue (). */
362 int size_for_adjusting_sp;
363 };
364
365 /* Zero initialization is OK for all current fields. */
366
367 static struct machine_function *
368 ft32_init_machine_status (void)
369 {
370 return ggc_cleared_alloc < machine_function > ();
371 }
372
373 #include "target-def.h"
374
375
376 /* The TARGET_OPTION_OVERRIDE worker.
377 All this curently does is set init_machine_status. */
378 static void
379 ft32_option_override (void)
380 {
381 /* Set the per-function-data initializer. */
382 init_machine_status = ft32_init_machine_status;
383 }
384
385 /* Implement targetm.select_section. */
386 static section *
387 ft32_select_section (tree decl, int reloc, unsigned HOST_WIDE_INT align)
388 {
389 /* Variables and constants defined in the __ea address space
390 go into a special section named "._ea". */
391 if (TREE_TYPE (decl) != error_mark_node
392 && TYPE_ADDR_SPACE (TREE_TYPE (decl)) == ADDR_SPACE_PM)
393 {
394 /* We might get called with string constants, but get_named_section
395 doesn't like them as they are not DECLs. Also, we need to set
396 flags in that case. */
397 if (!DECL_P (decl))
398 return get_section ("._pm", SECTION_WRITE | SECTION_DEBUG, NULL);
399
400 return get_named_section (decl, "._pm", reloc);
401 }
402
403 return default_elf_select_section (decl, reloc, align);
404 }
405
406 /* Compute the size of the local area and the size to be adjusted by the
407 * prologue and epilogue. */
408
409 static void
410 ft32_compute_frame (void)
411 {
412 /* For aligning the local variables. */
413 int stack_alignment = STACK_BOUNDARY / BITS_PER_UNIT;
414 int padding_locals;
415 int regno;
416
417 /* Padding needed for each element of the frame. */
418 cfun->machine->local_vars_size = get_frame_size ();
419
420 /* Align to the stack alignment. */
421 padding_locals = cfun->machine->local_vars_size % stack_alignment;
422 if (padding_locals)
423 padding_locals = stack_alignment - padding_locals;
424
425 cfun->machine->local_vars_size += padding_locals;
426
427 cfun->machine->callee_saved_reg_size = 0;
428
429 /* Save callee-saved registers. */
430 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
431 if (df_regs_ever_live_p (regno) && (!call_used_regs[regno]))
432 cfun->machine->callee_saved_reg_size += 4;
433
434 cfun->machine->size_for_adjusting_sp =
435 crtl->args.pretend_args_size
436 + cfun->machine->local_vars_size
437 + (ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
438 }
439
440 // Must use LINK/UNLINK when...
441 // the frame is bigger than 512 bytes so cannot just "SUB" from SP
442 // the function actually uses $fp
443
444 static int
445 must_link (void)
446 {
447 int bigframe = (cfun->machine->size_for_adjusting_sp >= 512);
448 return (bigframe || frame_pointer_needed || df_regs_ever_live_p (FT32_FP)
449 || df_regs_ever_live_p (FT32_FP));
450 }
451
452 void
453 ft32_expand_prologue (void)
454 {
455 int regno;
456 rtx insn;
457
458 ft32_compute_frame ();
459
460 if (flag_stack_usage_info)
461 current_function_static_stack_size = cfun->machine->size_for_adjusting_sp;
462
463 if (!must_link () && (cfun->machine->callee_saved_reg_size == 4))
464 {
465 insn =
466 emit_insn (gen_link
467 (gen_rtx_REG (Pmode, FT32_R13),
468 GEN_INT (-cfun->machine->size_for_adjusting_sp)));
469 RTX_FRAME_RELATED_P (insn) = 1;
470 return;
471 }
472 /* Save callee-saved registers. */
473 if (optimize_size)
474 {
475 for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
476 {
477 if (!fixed_regs[regno] && !call_used_regs[regno]
478 && df_regs_ever_live_p (regno))
479 {
480 rtx preg = gen_rtx_REG (Pmode, regno);
481 emit_insn (gen_call_prolog (preg));
482 break;
483 }
484 }
485 }
486 else
487 {
488 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
489 {
490 if (!fixed_regs[regno] && df_regs_ever_live_p (regno)
491 && !call_used_regs[regno])
492 {
493 insn = emit_insn (gen_movsi_push (gen_rtx_REG (Pmode, regno)));
494 RTX_FRAME_RELATED_P (insn) = 1;
495 }
496 }
497 }
498
499 if (65536 <= cfun->machine->size_for_adjusting_sp)
500 {
501 error ("stack frame must be smaller than 64K");
502 return;
503 }
504 if (must_link ())
505 {
506 insn =
507 emit_insn (gen_link
508 (gen_rtx_REG (Pmode, FT32_FP),
509 GEN_INT (-cfun->machine->size_for_adjusting_sp)));
510 RTX_FRAME_RELATED_P (insn) = 1;
511 }
512 else if (cfun->machine->size_for_adjusting_sp > 0)
513 {
514 insn = emit_insn (gen_addsi3 (gen_rtx_REG (SImode, FT32_SP),
515 gen_rtx_REG (SImode, FT32_SP),
516 GEN_INT (-(cfun->machine->
517 size_for_adjusting_sp))));
518 RTX_FRAME_RELATED_P (insn) = 1;
519 }
520 }
521
522 void
523 ft32_expand_epilogue (void)
524 {
525 int regno;
526
527 if (!must_link ()
528 && (cfun->machine->size_for_adjusting_sp == 24)
529 && (cfun->machine->callee_saved_reg_size == 0))
530 {
531 emit_jump_insn (gen_returner24 ());
532 return;
533 }
534
535 // Set when the epilog code will also add 24 to $sp
536 int epilog24 = (!must_link ()
537 && (cfun->machine->size_for_adjusting_sp == 24)
538 && optimize_size);
539
540 if (must_link ())
541 {
542 emit_insn (gen_unlink ());
543 }
544 else if (!epilog24 && (cfun->machine->size_for_adjusting_sp > 0))
545 {
546 emit_insn (gen_addsi3 (gen_rtx_REG (SImode, FT32_SP),
547 gen_rtx_REG (SImode, FT32_SP),
548 GEN_INT (cfun->machine->size_for_adjusting_sp)));
549 }
550
551 if (cfun->machine->callee_saved_reg_size != 0)
552 {
553 for (regno = FIRST_PSEUDO_REGISTER; regno-- > 0;)
554 {
555 if (!fixed_regs[regno] && !call_used_regs[regno]
556 && df_regs_ever_live_p (regno))
557 {
558 rtx preg = gen_rtx_REG (Pmode, regno);
559 if (optimize_size)
560 {
561 if (epilog24)
562 emit_insn (gen_jump_epilog24 (preg));
563 else
564 emit_insn (gen_jump_epilog (preg));
565 return;
566 }
567 emit_insn (gen_movsi_pop (preg));
568 }
569 }
570 }
571
572 emit_jump_insn (gen_returner ());
573 }
574
575 #undef TARGET_FRAME_POINTER_REQUIRED
576 #define TARGET_FRAME_POINTER_REQUIRED ft32_frame_pointer_required
577 static bool
578 ft32_frame_pointer_required (void)
579 {
580 return cfun->calls_alloca;
581 }
582
583 #undef TARGET_CAN_ELIMINATE
584 #define TARGET_CAN_ELIMINATE ft32_can_eliminate
585
586 /* Return true if register FROM can be eliminated via register TO. */
587
588 static bool
589 ft32_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to)
590 {
591 return 1;
592 return (to == FRAME_POINTER_REGNUM) || !ft32_frame_pointer_required ();
593 }
594
595 /* Implements the macro INITIAL_ELIMINATION_OFFSET, return the OFFSET. */
596
597 int
598 ft32_initial_elimination_offset (int from, int to)
599 {
600 ft32_compute_frame ();
601
602 if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
603 {
604 return cfun->machine->callee_saved_reg_size + 2 * UNITS_PER_WORD;
605 }
606
607 if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM)
608 {
609 int arg_offset;
610 arg_offset = must_link ()? 2 : 1;
611 return ((cfun->machine->callee_saved_reg_size
612 + arg_offset * UNITS_PER_WORD)
613 + cfun->machine->size_for_adjusting_sp);
614 }
615
616 if ((from == FRAME_POINTER_REGNUM) && (to == STACK_POINTER_REGNUM))
617 {
618 return cfun->machine->size_for_adjusting_sp;
619 }
620
621 gcc_unreachable ();
622 }
623
624 /* Worker function for TARGET_SETUP_INCOMING_VARARGS. */
625
626 static void
627 ft32_setup_incoming_varargs (cumulative_args_t cum_v,
628 enum machine_mode mode ATTRIBUTE_UNUSED,
629 tree type ATTRIBUTE_UNUSED,
630 int *pretend_size, int no_rtl)
631 {
632 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
633 int regno;
634 int regs = 8 - *cum;
635
636 *pretend_size = regs < 0 ? 0 : GET_MODE_SIZE (SImode) * regs;
637
638 if (no_rtl)
639 return;
640
641 for (regno = *cum; regno < 8; regno++)
642 {
643 rtx reg = gen_rtx_REG (SImode, regno);
644 rtx slot = gen_rtx_PLUS (Pmode,
645 gen_rtx_REG (SImode, ARG_POINTER_REGNUM),
646 GEN_INT (UNITS_PER_WORD * (regno - FT32_R0)));
647
648 emit_move_insn (gen_rtx_MEM (SImode, slot), reg);
649 }
650 }
651
652
653 /* Return the fixed registers used for condition codes. */
654
655 static bool
656 ft32_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
657 {
658 *p1 = CC_REG;
659 *p2 = INVALID_REGNUM;
660 return true;
661 }
662
663 /* Return the next register to be used to hold a function argument or
664 NULL_RTX if there's no more space. */
665
666 static rtx
667 ft32_function_arg (cumulative_args_t cum_v, enum machine_mode mode,
668 const_tree type ATTRIBUTE_UNUSED,
669 bool named ATTRIBUTE_UNUSED)
670 {
671 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
672
673 if (*cum < 8)
674 return gen_rtx_REG (mode, *cum);
675 else
676 return NULL_RTX;
677 }
678
679 #define FT32_FUNCTION_ARG_SIZE(MODE, TYPE) \
680 ((MODE) != BLKmode ? GET_MODE_SIZE (MODE) \
681 : (unsigned) int_size_in_bytes (TYPE))
682
683 static void
684 ft32_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode,
685 const_tree type, bool named ATTRIBUTE_UNUSED)
686 {
687 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
688
689 *cum = (*cum < FT32_R6
690 ? *cum + ((3 + FT32_FUNCTION_ARG_SIZE (mode, type)) / 4) : *cum);
691 }
692
693 /* Return non-zero if the function argument described by TYPE is to be
694 passed by reference. */
695
696 static bool
697 ft32_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED,
698 enum machine_mode mode, const_tree type,
699 bool named ATTRIBUTE_UNUSED)
700 {
701 unsigned HOST_WIDE_INT size;
702
703 if (type)
704 {
705 if (AGGREGATE_TYPE_P (type))
706 return true;
707 size = int_size_in_bytes (type);
708 }
709 else
710 size = GET_MODE_SIZE (mode);
711
712 return size > 4 * 6;
713 }
714
715 /* Some function arguments will only partially fit in the registers
716 that hold arguments. Given a new arg, return the number of bytes
717 that fit in argument passing registers. */
718
719 static int
720 ft32_arg_partial_bytes (cumulative_args_t cum_v,
721 enum machine_mode mode, tree type, bool named)
722 {
723 CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v);
724 int bytes_left, size;
725
726 if (*cum >= 8)
727 return 0;
728
729 if (ft32_pass_by_reference (cum_v, mode, type, named))
730 size = 4;
731 else if (type)
732 {
733 if (AGGREGATE_TYPE_P (type))
734 return 0;
735 size = int_size_in_bytes (type);
736 }
737 else
738 size = GET_MODE_SIZE (mode);
739
740 bytes_left = (4 * 6) - ((*cum - 2) * 4);
741
742 if (size > bytes_left)
743 return bytes_left;
744 else
745 return 0;
746 }
747
748 /* Used by constraints.md to distinguish between GENERIC and PM
749 memory addresses. */
750
751 int
752 ft32_is_mem_pm (rtx o)
753 {
754 if (GET_CODE (o) != MEM)
755 return false;
756 if (MEM_EXPR (o))
757 return TYPE_ADDR_SPACE (TREE_TYPE (MEM_EXPR (o))) == ADDR_SPACE_PM;
758 else
759 return MEM_ADDR_SPACE (o) == ADDR_SPACE_PM;
760 }
761
762 /* The Global `targetm' Variable. */
763
764 /* Initialize the GCC target structure. */
765
766 #undef TARGET_PROMOTE_PROTOTYPES
767 #define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true
768
769 #undef TARGET_RETURN_IN_MEMORY
770 #define TARGET_RETURN_IN_MEMORY ft32_return_in_memory
771 #undef TARGET_MUST_PASS_IN_STACK
772 #define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size
773 #undef TARGET_PASS_BY_REFERENCE
774 #define TARGET_PASS_BY_REFERENCE ft32_pass_by_reference
775 #undef TARGET_ARG_PARTIAL_BYTES
776 #define TARGET_ARG_PARTIAL_BYTES ft32_arg_partial_bytes
777 #undef TARGET_FUNCTION_ARG
778 #define TARGET_FUNCTION_ARG ft32_function_arg
779 #undef TARGET_FUNCTION_ARG_ADVANCE
780 #define TARGET_FUNCTION_ARG_ADVANCE ft32_function_arg_advance
781
782
783 #undef TARGET_SETUP_INCOMING_VARARGS
784 #define TARGET_SETUP_INCOMING_VARARGS ft32_setup_incoming_varargs
785
786 #undef TARGET_FIXED_CONDITION_CODE_REGS
787 #define TARGET_FIXED_CONDITION_CODE_REGS ft32_fixed_condition_code_regs
788
789 /* Define this to return an RTX representing the place where a
790 function returns or receives a value of data type RET_TYPE, a tree
791 node node representing a data type. */
792 #undef TARGET_FUNCTION_VALUE
793 #define TARGET_FUNCTION_VALUE ft32_function_value
794 #undef TARGET_LIBCALL_VALUE
795 #define TARGET_LIBCALL_VALUE ft32_libcall_value
796 #undef TARGET_FUNCTION_VALUE_REGNO_P
797 #define TARGET_FUNCTION_VALUE_REGNO_P ft32_function_value_regno_p
798
799 #undef TARGET_OPTION_OVERRIDE
800 #define TARGET_OPTION_OVERRIDE ft32_option_override
801
802 #undef TARGET_ASM_SELECT_SECTION
803 #define TARGET_ASM_SELECT_SECTION ft32_select_section
804
805 #undef TARGET_VALID_POINTER_MODE
806 #define TARGET_VALID_POINTER_MODE ft32_valid_pointer_mode
807 static bool
808 ft32_valid_pointer_mode (enum machine_mode mode)
809 {
810 if (mode == SImode)
811 return 1;
812 return 0;
813 }
814
815 #undef TARGET_ADDR_SPACE_POINTER_MODE
816 #define TARGET_ADDR_SPACE_POINTER_MODE ft32_addr_space_pointer_mode
817 static enum machine_mode
818 ft32_addr_space_pointer_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
819 {
820 return Pmode;
821 }
822
823 #undef TARGET_ADDR_SPACE_ADDRESS_MODE
824 #define TARGET_ADDR_SPACE_ADDRESS_MODE ft32_addr_space_address_mode
825 static enum machine_mode
826 ft32_addr_space_address_mode (addr_space_t addrspace ATTRIBUTE_UNUSED)
827 {
828 return Pmode;
829 }
830
831 #undef TARGET_ADDR_SPACE_SUBSET_P
832 #define TARGET_ADDR_SPACE_SUBSET_P ft32_addr_space_subset_p
833 static bool
834 ft32_addr_space_subset_p (addr_space_t subset ATTRIBUTE_UNUSED,
835 addr_space_t superset ATTRIBUTE_UNUSED)
836 {
837 return false;
838 }
839
840 #undef TARGET_CASE_VALUES_THRESHOLD
841 #define TARGET_CASE_VALUES_THRESHOLD ft32_target_case_values_threshold
842
843 static unsigned int
844 ft32_target_case_values_threshold (void)
845 {
846 return 4;
847 }
848
849 #undef TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P
850 #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P \
851 ft32_addr_space_legitimate_address_p
852
853
854 // Enabling LRA gives the infamous
855 // internal compiler error: Max. number of generated reload insns per insn is achieved (90)
856 // errors e.g. when compiling sieve.c
857
858 static bool
859 ft32_lra_p (void)
860 {
861 return ft32_lra_flag;
862 }
863
864 #undef TARGET_LRA_P
865 #define TARGET_LRA_P ft32_lra_p
866
867 static bool
868 reg_ok_for_base_p (rtx r, bool strict)
869 {
870 int NUM = REGNO (r);
871 if (strict)
872 return (HARD_REGNO_OK_FOR_BASE_P (NUM)
873 || HARD_REGNO_OK_FOR_BASE_P (reg_renumber[(NUM)]));
874 else
875 return ((NUM) >= FIRST_PSEUDO_REGISTER || HARD_REGNO_OK_FOR_BASE_P (NUM));
876 }
877
878 static bool
879 ft32_addr_space_legitimate_address_p (enum machine_mode mode, rtx x,
880 bool strict,
881 addr_space_t as ATTRIBUTE_UNUSED)
882 {
883 if (mode != BLKmode)
884 {
885 if (GET_CODE (x) == PLUS)
886 {
887 rtx op1, op2;
888 op1 = XEXP (x, 0);
889 op2 = XEXP (x, 1);
890 if (GET_CODE (op1) == REG
891 && CONST_INT_P (op2)
892 && INTVAL (op2) >= -128
893 && INTVAL (op2) < 128 && reg_ok_for_base_p (op1, strict))
894 goto yes;
895 if (GET_CODE (op1) == SYMBOL_REF && CONST_INT_P (op2))
896 goto yes;
897 }
898 if (REG_P (x) && reg_ok_for_base_p (x, strict))
899 goto yes;
900 if (GET_CODE (x) == SYMBOL_REF
901 || GET_CODE (x) == LABEL_REF || CONST_INT_P (x))
902 goto yes;
903 }
904 else
905 {
906 if (REG_P (x) && reg_ok_for_base_p (x, strict))
907 goto yes;
908 }
909
910 return 0;
911 yes:
912 return 1;
913 }
914
915 struct gcc_target targetm = TARGET_INITIALIZER;
916
917 #include "gt-ft32.h"