d7d89b02c4250160945f77a848563896adf56e58
1 /* Definitions of target machine for GNU compiler.
2 Hitachi H8/300 version generating coff
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999,
4 2000, 2001, 2002 Free Software Foundation, Inc.
5 Contributed by Steve Chamberlain (sac@cygnus.com),
6 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
28 /* Which CPU to compile for.
29 We use int for CPU_TYPE to avoid lots of casts. */
30 #if 0 /* defined in insn-attr.h, here for documentation */
31 enum attr_cpu
{ CPU_H8300
, CPU_H8300H
};
35 /* Various globals defined in h8300.c. */
37 extern const char *h8_push_op
, *h8_pop_op
, *h8_mov_op
;
38 extern const char * const *h8_reg_names
;
40 /* Names to predefine in the preprocessor for this target machine. */
42 #define CPP_PREDEFINES \
43 "-D__LONG_MAX__=2147483647L -D__LONG_LONG_MAX__=2147483647L"
46 "%{!mh:%{!ms:-D__H8300__}} %{mh:-D__H8300H__} %{ms:-D__H8300S__} \
47 %{!mh:%{!ms:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int}} \
48 %{mh:-D__SIZE_TYPE__=unsigned\\ long -D__PTRDIFF_TYPE__=long} \
49 %{ms:-D__SIZE_TYPE__=unsigned\\ long -D__PTRDIFF_TYPE__=long} \
50 %{!mh:%{!ms:-Acpu=h8300 -Amachine=h8300}} \
51 %{mh:-Acpu=h8300h -Amachine=h8300h} \
52 %{ms:-Acpu=h8300s -Amachine=h8300s} \
53 %{!mint32:-D__INT_MAX__=32767} %{mint32:-D__INT_MAX__=2147483647} \
54 %(subtarget_cpp_spec)"
56 #define SUBTARGET_CPP_SPEC ""
58 #define LINK_SPEC "%{mh:-m h8300h} %{ms:-m h8300s}"
60 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
63 { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \
66 #define SUBTARGET_EXTRA_SPECS
68 /* Print subsidiary information on the compiler version in use. */
70 #define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");
72 /* Run-time compilation parameters selecting different hardware subsets. */
74 extern int target_flags
;
76 /* Macros used in the machine description to test the flags. */
78 /* Make int's 32 bits. */
79 #define TARGET_INT32 (target_flags & 8)
81 /* Dump recorded insn lengths into the output file. This helps debug the
83 #define TARGET_ADDRESSES (target_flags & 64)
85 /* Pass the first few arguments in registers. */
86 #define TARGET_QUICKCALL (target_flags & 128)
88 /* Pretend byte accesses are slow. */
89 #define TARGET_SLOWBYTE (target_flags & 256)
91 /* Dump each assembler insn's rtl into the output file.
92 This is for debugging the compiler only. */
93 #define TARGET_RTL_DUMP (target_flags & 2048)
95 /* Select between the H8/300 and H8/300H CPUs. */
96 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S)
97 #define TARGET_H8300H (target_flags & 4096)
98 #define TARGET_H8300S (target_flags & 1)
100 /* mac register and relevant instructions are available. */
101 #define TARGET_MAC (target_flags & 2)
103 /* Align all values on the H8/300H the same way as the H8/300. Specifically,
104 32 bit and larger values are aligned on 16 bit boundaries.
105 This is all the hardware requires, but the default is 32 bits for the 300H.
106 ??? Now watch someone add hardware floating point requiring 32 bit
108 #define TARGET_ALIGN_300 (target_flags & 8192)
110 /* Macro to define tables used to set the flags.
111 This is a list in braces of pairs in braces,
112 each pair being { "NAME", VALUE }
113 where VALUE is the bits to set or minus the bits to clear.
114 An empty string NAME is used to identify the default VALUE. */
116 #define TARGET_SWITCHES \
117 { {"s", 1, N_("Generate H8/S code")}, \
118 {"no-s", -1, N_("Do not generate H8/S code")}, \
119 {"s2600", 2, N_("Generate H8/S2600 code")}, \
120 {"no-s2600", -2, N_("Do not generate H8/S2600 code")}, \
121 {"int32", 8, N_("Make integers 32 bits wide")}, \
122 {"addresses", 64, NULL}, \
124 N_("Use registers for argument passing")}, \
125 {"no-quickcall", -128, \
126 N_("Do not use registers for argument passing")}, \
128 N_("Consider access to byte sized memory slow")}, \
129 {"relax", 1024, N_("Enable linker relaxing")}, \
130 {"rtl-dump", 2048, NULL}, \
131 {"h", 4096, N_("Generate H8/300H code")}, \
132 {"no-h", -4096, N_("Do not generate H8/300H code")}, \
133 {"align-300", 8192, N_("Use H8/300 alignment rules")}, \
134 { "", TARGET_DEFAULT, NULL}}
139 /* If compiling libgcc2, make these compile time constants based on what
140 flags are we actually compiling with. */
142 #define TARGET_H8300H 1
144 #define TARGET_H8300H 0
147 #define TARGET_H8300S 1
149 #define TARGET_H8300S 0
151 #endif /* !IN_LIBGCC2 */
153 /* Do things that must be done once at start up. */
155 #define OVERRIDE_OPTIONS \
158 h8300_init_once (); \
162 /* Default target_flags if no switches specified. */
164 #ifndef TARGET_DEFAULT
165 #define TARGET_DEFAULT (128) /* quickcall */
168 /* Show we can debug even without a frame pointer. */
169 /* #define CAN_DEBUG_WITHOUT_FP */
171 /* Define this if addresses of constant functions
172 shouldn't be put through pseudo regs where they can be cse'd.
173 Desirable on machines where ordinary constants are expensive
174 but a CALL with constant address is cheap.
176 Calls through a register are cheaper than calls to named
177 functions; however, the register pressure this causes makes
178 CSEing of function addresses generally a lose. */
179 #define NO_FUNCTION_CSE
181 /* Target machine storage layout */
183 /* Define to use software floating point emulator for REAL_ARITHMETIC and
184 decimal <-> binary conversion. */
185 #define REAL_ARITHMETIC
187 /* Define this if most significant bit is lowest numbered
188 in instructions that operate on numbered bit-fields.
189 This is not true on the H8/300. */
190 #define BITS_BIG_ENDIAN 0
192 /* Define this if most significant byte of a word is the lowest numbered. */
193 /* That is true on the H8/300. */
194 #define BYTES_BIG_ENDIAN 1
196 /* Define this if most significant word of a multiword number is lowest
198 This is true on an H8/300 (actually we can make it up, but we choose to
200 #define WORDS_BIG_ENDIAN 1
202 /* Number of bits in an addressable storage unit */
203 #define BITS_PER_UNIT 8
205 /* Width in bits of a "word", which is the contents of a machine register.
206 Note that this is not necessarily the width of data type `int';
207 if using 16-bit ints on a 68000, this would still be 32.
208 But on a machine with 16-bit registers, this would be 16. */
209 #define BITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
210 #define MAX_BITS_PER_WORD 32
212 /* Width of a word, in units (bytes). */
213 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
214 #define MIN_UNITS_PER_WORD 2
216 /* Width in bits of a pointer.
217 See also the macro `Pmode' defined below. */
218 #define POINTER_SIZE (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
220 #define SHORT_TYPE_SIZE 16
221 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
222 #define LONG_TYPE_SIZE 32
223 #define LONG_LONG_TYPE_SIZE 32
224 #define FLOAT_TYPE_SIZE 32
225 #define DOUBLE_TYPE_SIZE 32
226 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
228 #define MAX_FIXED_MODE_SIZE 32
230 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
231 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16)
233 /* Allocation boundary (in *bits*) for the code of a function. */
234 #define FUNCTION_BOUNDARY 16
236 /* Alignment of field after `int : 0' in a structure. */
237 /* One can argue this should be 32 for -mint32, but since 32 bit ints only
238 need 16 bit alignment, this is left as is so that -mint32 doesn't change
239 structure layouts. */
240 #define EMPTY_FIELD_BOUNDARY 16
242 /* A bitfield declared as `int' forces `int' alignment for the struct. */
243 #define PCC_BITFIELD_TYPE_MATTERS 0
245 /* No data type wants to be aligned rounder than this.
246 32 bit values are aligned as such on the H8/300H and H8/S for speed. */
247 #define BIGGEST_ALIGNMENT \
248 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16)
250 /* The stack goes in 16/32 bit lumps. */
251 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)
253 /* Define this if move instructions will actually fail to work
254 when given unaligned data. */
255 /* On the H8/300, longs can be aligned on halfword boundaries, but not
257 #define STRICT_ALIGNMENT 1
259 /* Standard register usage. */
261 /* Number of actual hardware registers.
262 The hardware registers are assigned numbers for the compiler
263 from 0 to just below FIRST_PSEUDO_REGISTER.
265 All registers that the compiler knows about must be given numbers,
266 even those that are not normally considered general registers.
268 Reg 9 does not correspond to any hardware register, but instead
269 appears in the RTL as an argument pointer prior to reload, and is
270 eliminated during reloading in favor of either the stack or frame
273 #define FIRST_PSEUDO_REGISTER 11
275 /* 1 for registers that have pervasive standard uses
276 and are not available for the register allocator. */
278 #define FIXED_REGISTERS \
279 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1}
281 /* 1 for registers not available across function calls.
282 These must include the FIXED_REGISTERS and also any
283 registers that can be used without being saved.
284 The latter must include the registers where values are returned
285 and the register where structure-value addresses are passed.
286 Aside from that, you can include as many other registers as you
289 H8 destroys r0,r1,r2,r3. */
291 #define CALL_USED_REGISTERS \
292 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 }
294 #define REG_ALLOC_ORDER \
295 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10}
297 #define CONDITIONAL_REGISTER_USAGE \
300 fixed_regs[8] = call_used_regs[8] = 1; \
303 /* Return number of consecutive hard regs needed starting at reg REGNO
304 to hold something of mode MODE.
306 This is ordinarily the length in words of a value of mode MODE
307 but can be less for certain modes in special long registers.
309 We pretend the MAC register is 32bits -- we don't have any data
310 types on the H8 series to handle more than 32bits. */
312 #define HARD_REGNO_NREGS(REGNO, MODE) \
313 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
315 /* Value is 1 if hard register REGNO can hold a value of machine-mode
318 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI
320 H8/300H: Anything goes. */
322 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
324 ? ((((REGNO) & 1) == 0) || ((MODE) == HImode) || ((MODE) == QImode)) \
325 : (REGNO) == 8 ? (MODE) == SImode : 1)
327 /* Value is 1 if it is a good idea to tie two pseudo registers
328 when one has mode MODE1 and one has mode MODE2.
329 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
330 for any hard reg, then this must be 0 for correct output. */
331 #define MODES_TIEABLE_P(MODE1, MODE2) \
332 ((MODE1) == (MODE2) \
333 || ((MODE1) == HImode && (MODE2) == QImode) \
334 || ((MODE1) == QImode && (MODE2) == HImode) \
335 || ((TARGET_H8300H || TARGET_H8300S) \
336 && (((MODE1) == SImode && (MODE2) == HImode) \
337 || ((MODE1) == HImode && (MODE2) == SImode))))
339 /* Specify the registers used for certain standard purposes.
340 The values of these macros are register numbers. */
342 /* H8/300 pc is not overloaded on a register. */
344 /*#define PC_REGNUM 15*/
346 /* Register to use for pushing function arguments. */
347 #define STACK_POINTER_REGNUM 7
349 /* Base register for access to local variables of the function. */
350 #define FRAME_POINTER_REGNUM 6
352 /* Value should be nonzero if functions must have frame pointers.
353 Zero means the frame pointer need not be set up (and parms
354 may be accessed via the stack pointer) in functions that seem suitable.
355 This is computed in `reload', in reload1.c. */
356 #define FRAME_POINTER_REQUIRED 0
358 /* Base register for access to arguments of the function. */
359 #define ARG_POINTER_REGNUM 9
361 /* Register in which static-chain is passed to a function. */
362 #define STATIC_CHAIN_REGNUM 3
364 /* Fake register that holds the address on the stack of the
365 current function's return address. */
366 #define RETURN_ADDRESS_POINTER_REGNUM 10
368 /* A C expression whose value is RTL representing the value of the return
369 address for the frame COUNT steps up from the current frame.
370 FRAMEADDR is already the frame pointer of the COUNT frame, assuming
371 a stack layout with the frame pointer as the first saved register. */
372 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME))
374 /* Define the classes of registers for register constraints in the
375 machine description. Also define ranges of constants.
377 One of the classes must always be named ALL_REGS and include all hard regs.
378 If there is more than one class, another class must be named NO_REGS
379 and contain no registers.
381 The name GENERAL_REGS must be the name of a class (or an alias for
382 another name such as ALL_REGS). This is the class of registers
383 that is allowed by "g" or "r" in a register constraint.
384 Also, registers outside this class are allocated only when
385 instructions express preferences for them.
387 The classes must be numbered in nondecreasing order; that is,
388 a larger-numbered class must never be contained completely
389 in a smaller-numbered class.
391 For any two classes, it is very desirable that there be another
392 class that represents their union. */
395 NO_REGS
, GENERAL_REGS
, MAC_REGS
, ALL_REGS
, LIM_REG_CLASSES
398 #define N_REG_CLASSES (int) LIM_REG_CLASSES
400 /* Give names of register classes as strings for dump file. */
402 #define REG_CLASS_NAMES \
403 { "NO_REGS", "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" }
405 /* Define which registers fit in which classes.
406 This is an initializer for a vector of HARD_REG_SET
407 of length N_REG_CLASSES. */
409 #define REG_CLASS_CONTENTS \
410 { {0}, /* No regs */ \
411 {0x6ff}, /* GENERAL_REGS */ \
412 {0x100}, /* MAC_REGS */ \
413 {0x7ff}, /* ALL_REGS */ \
416 /* The same information, inverted:
417 Return the class number of the smallest class containing
418 reg number REGNO. This could be a conditional expression
419 or could index an array. */
421 #define REGNO_REG_CLASS(REGNO) (REGNO != 8 ? GENERAL_REGS : MAC_REGS)
423 /* The class value for index registers, and the one for base regs. */
425 #define INDEX_REG_CLASS NO_REGS
426 #define BASE_REG_CLASS GENERAL_REGS
428 /* Get reg_class from a letter such as appears in the machine description.
430 'a' is the MAC register. */
432 #define REG_CLASS_FROM_LETTER(C) ((C) == 'a' ? MAC_REGS : NO_REGS)
434 /* The letters I, J, K, L, M, N, O, P in a register constraint string
435 can be used to stand for particular ranges of immediate operands.
436 This macro defines what the ranges are.
437 C is the letter, and VALUE is a constant value.
438 Return 1 if VALUE is in the range specified by C. */
440 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
441 #define CONST_OK_FOR_J(VALUE) ((unsigned HOST_WIDE_INT) (VALUE) < 256)
442 #define CONST_OK_FOR_K(VALUE) ((VALUE) == 1 || (VALUE) == 2)
443 #define CONST_OK_FOR_L(VALUE) \
444 (TARGET_H8300H || TARGET_H8300S \
445 ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \
446 : (VALUE) == 1 || (VALUE) == 2)
447 #define CONST_OK_FOR_M(VALUE) ((VALUE) == 3 || (VALUE) == 4)
448 #define CONST_OK_FOR_N(VALUE) \
449 (TARGET_H8300H || TARGET_H8300S \
450 ? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \
451 : (VALUE) == -1 || (VALUE) == -2)
452 #define CONST_OK_FOR_O(VALUE) (ok_for_bclr (VALUE))
453 #define CONST_OK_FOR_P(VALUE) (small_power_of_two (VALUE))
455 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
456 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
457 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
458 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
459 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
460 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
461 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
462 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
463 (C) == 'P' ? CONST_OK_FOR_P (VALUE) : \
466 /* Similar, but for floating constants, and defining letters G and H.
467 Here VALUE is the CONST_DOUBLE rtx itself.
469 `G' is a floating-point zero. */
471 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
472 ((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \
475 /* Given an rtx X being reloaded into a reg required to be
476 in class CLASS, return the class of reg to actually use.
477 In general this is just CLASS; but on some machines
478 in some cases it is preferable to use a more restrictive class. */
480 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
482 /* Return the maximum number of consecutive registers
483 needed to represent mode MODE in a register of class CLASS. */
485 /* On the H8, this is the size of MODE in words. */
487 #define CLASS_MAX_NREGS(CLASS, MODE) \
488 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
490 /* Any SI register-to-register move may need to be reloaded,
491 so define REGISTER_MOVE_COST to be > 2 so that reload never
494 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
495 (CLASS1 == MAC_REGS || CLASS2 == MAC_REGS ? 6 : 3)
497 /* Stack layout; function entry, exit and calling. */
499 /* Define this if pushing a word on the stack
500 makes the stack pointer a smaller address. */
502 #define STACK_GROWS_DOWNWARD
504 /* Define this if the nominal address of the stack frame
505 is at the high-address end of the local variables;
506 that is, each additional local variable allocated
507 goes at a more negative offset in the frame. */
509 #define FRAME_GROWS_DOWNWARD
511 /* Offset within stack frame to start allocating local variables at.
512 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
513 first local allocated. Otherwise, it is the offset to the BEGINNING
514 of the first local allocated. */
516 #define STARTING_FRAME_OFFSET 0
518 /* If we generate an insn to push BYTES bytes,
519 this says how many the stack pointer really advances by.
521 On the H8/300, @-sp really pushes a byte if you ask it to - but that's
522 dangerous, so we claim that it always pushes a word, then we catch
523 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output.
525 On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4
526 and doing a similar thing. */
528 #define PUSH_ROUNDING(BYTES) \
529 (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8)
531 /* Offset of first parameter from the argument pointer register value. */
532 /* Is equal to the size of the saved fp + pc, even if an fp isn't
533 saved since the value is used before we know. */
535 #define FIRST_PARM_OFFSET(FNDECL) 0
537 /* Value is the number of bytes of arguments automatically
538 popped when returning from a subroutine call.
539 FUNDECL is the declaration node of the function (as a tree),
540 FUNTYPE is the data type of the function (as a tree),
541 or for a library call it is an identifier node for the subroutine name.
542 SIZE is the number of bytes of arguments passed on the stack.
544 On the H8 the return does not pop anything. */
546 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
548 /* Definitions for register eliminations.
550 This is an array of structures. Each structure initializes one pair
551 of eliminable registers. The "from" register number is given first,
552 followed by "to". Eliminations of the same "from" register are listed
553 in order of preference.
555 We have two registers that can be eliminated on the h8300. First, the
556 frame pointer register can often be eliminated in favor of the stack
557 pointer register. Secondly, the argument pointer register can always be
558 eliminated; it is replaced with either the stack or frame pointer. */
560 #define ELIMINABLE_REGS \
561 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
562 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
563 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},\
564 { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM},\
565 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
567 /* Given FROM and TO register numbers, say whether this elimination is allowed.
568 Frame pointer elimination is automatically handled.
570 For the h8300, if frame pointer elimination is being done, we would like to
571 convert ap and rp into sp, not fp.
573 All other eliminations are valid. */
575 #define CAN_ELIMINATE(FROM, TO) \
576 ((((FROM) == ARG_POINTER_REGNUM || (FROM) == RETURN_ADDRESS_POINTER_REGNUM) \
577 && (TO) == STACK_POINTER_REGNUM) \
578 ? ! frame_pointer_needed \
581 /* Define the offset between two registers, one to be eliminated, and the other
582 its replacement, at the start of a routine. */
584 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
585 OFFSET = initial_offset (FROM, TO)
587 /* Define how to find the value returned by a function.
588 VALTYPE is the data type of the value (as a tree).
589 If the precise function being called is known, FUNC is its FUNCTION_DECL;
590 otherwise, FUNC is 0.
592 On the H8 the return value is in R0/R1. */
594 #define FUNCTION_VALUE(VALTYPE, FUNC) \
595 gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
597 /* Define how to find the value returned by a library function
598 assuming the value has mode MODE. */
600 /* On the H8 the return value is in R0/R1. */
602 #define LIBCALL_VALUE(MODE) \
603 gen_rtx_REG (MODE, 0)
605 /* 1 if N is a possible register number for a function value.
606 On the H8, R0 is the only register thus used. */
608 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
610 /* Define this if PCC uses the nonreentrant convention for returning
611 structure and union values. */
613 /*#define PCC_STATIC_STRUCT_RETURN*/
615 /* 1 if N is a possible register number for function argument passing.
616 On the H8, no registers are used in this way. */
618 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0)
620 /* Register in which address to store a structure value
621 is passed to a function. */
623 #define STRUCT_VALUE 0
625 /* Return true if X should be returned in memory. */
626 #define RETURN_IN_MEMORY(X) \
627 (TYPE_MODE (X) == BLKmode || GET_MODE_SIZE (TYPE_MODE (X)) > 4)
629 /* When defined, the compiler allows registers explicitly used in the
630 rtl to be used as spill registers but prevents the compiler from
631 extending the lifetime of these registers. */
633 #define SMALL_REGISTER_CLASSES 1
635 /* Define a data type for recording info about an argument list
636 during the scan of that argument list. This data type should
637 hold all necessary information about the function itself
638 and about the args processed so far, enough to enable macros
639 such as FUNCTION_ARG to determine where the next arg should go.
641 On the H8/300, this is a two item struct, the first is the number
642 of bytes scanned so far and the second is the rtx of the called
643 library function if any. */
645 #define CUMULATIVE_ARGS struct cum_arg
649 struct rtx_def
*libcall
;
652 /* Initialize a variable CUM of type CUMULATIVE_ARGS
653 for a call to a function whose data type is FNTYPE.
654 For a library call, FNTYPE is 0.
656 On the H8/300, the offset starts at 0. */
658 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
659 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
661 /* Update the data in CUM to advance over an argument
662 of mode MODE and data type TYPE.
663 (TYPE is null for libcalls where that information may not be available.) */
665 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
666 ((CUM).nbytes += ((MODE) != BLKmode \
667 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
668 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
670 /* Define where to put the arguments to a function.
671 Value is zero to push the argument on the stack,
672 or a hard register in which to store the argument.
674 MODE is the argument's machine mode.
675 TYPE is the data type of the argument (as a tree).
676 This is null for libcalls where that information may
678 CUM is a variable of type CUMULATIVE_ARGS which gives info about
679 the preceding args and about the function being called.
680 NAMED is nonzero if this argument is a named parameter
681 (otherwise it is an extra parameter matching an ellipsis). */
683 /* On the H8/300 all normal args are pushed, unless -mquickcall in which
684 case the first 3 arguments are passed in registers.
685 See function `function_arg'. */
687 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
688 function_arg (&CUM, MODE, TYPE, NAMED)
690 /* Output assembler code to FILE to increment profiler label # LABELNO
691 for profiling a function entry. */
693 #define FUNCTION_PROFILER(FILE, LABELNO) \
694 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
695 h8_mov_op, (LABELNO), h8_reg_names[0]);
697 /* Output assembler code to FILE to initialize this source file's
698 basic block profiling info, if that has not already been done. */
699 /* ??? @LPBX0 is moved into r0 twice. */
701 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
702 fprintf (FILE, "\t%s\t%s\n\t%s\t@LPBX0,%s\n\tbne LPI%d\n\t%s\t@LPBX0,%s\n\t%s\t%s\n\tjsr\t@__bb_init_func\nLPI%d:\t%s\t%s\n", \
703 h8_push_op, h8_reg_names[0], \
704 h8_mov_op, h8_reg_names[0], \
706 h8_mov_op, h8_reg_names[0], \
707 h8_push_op, h8_reg_names[0], \
709 h8_pop_op, h8_reg_names[0]);
711 /* Output assembler code to FILE to increment the entry-count for
712 the BLOCKNO'th basic block in this source file. This is a real pain in the
713 sphincter on a VAX, since we do not want to change any of the bits in the
714 processor status word. The way it is done here, it is pushed onto the stack
715 before any flags have changed, and then the stack is fixed up to account for
716 the fact that the instruction to restore the flags only reads a word.
717 It may seem a bit clumsy, but at least it works. */
718 /* ??? This one needs work. */
720 #define BLOCK_PROFILER(FILE, BLOCKNO) \
721 fprintf (FILE, "\tmovpsl -(sp)\n\tmovw (sp),2(sp)\n\taddl2 $2,sp\n\taddl2 $1,LPBX2+%d\n\tbicpsw $255\n\tbispsw (sp)+\n", \
724 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
725 the stack pointer does not matter. The value is tested only in
726 functions that have frame pointers.
727 No definition is equivalent to always zero. */
729 #define EXIT_IGNORE_STACK 0
731 /* Output assembler code for a block containing the constant parts
732 of a trampoline, leaving space for the variable parts.
736 1 0000 7900xxxx mov.w #0x1234,r3
737 2 0004 5A00xxxx jmp @0x1234
742 2 0000 7A00xxxxxxxx mov.l #0x12345678,er3
743 3 0006 5Axxxxxx jmp @0x123456
747 #define TRAMPOLINE_TEMPLATE(FILE) \
751 fprintf (FILE, "\tmov.w #0x1234,r3\n"); \
752 fprintf (FILE, "\tjmp @0x1234\n"); \
756 fprintf (FILE, "\tmov.l #0x12345678,er3\n"); \
757 fprintf (FILE, "\tjmp @0x123456\n"); \
761 /* Length in units of the trampoline for entering a nested function. */
763 #define TRAMPOLINE_SIZE (TARGET_H8300 ? 8 : 12)
765 /* Emit RTL insns to initialize the variable parts of a trampoline.
766 FNADDR is an RTX for the address of the function's pure code.
767 CXT is an RTX for the static chain value for the function. */
769 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
771 enum machine_mode mode = TARGET_H8300H || TARGET_H8300S? SImode : HImode; \
772 emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 2)), CXT); \
773 emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 6)), FNADDR); \
774 if (TARGET_H8300H || TARGET_H8300S) \
775 emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \
779 /* Addressing modes, and classification of registers for them. */
781 #define HAVE_POST_INCREMENT 1
782 /*#define HAVE_POST_DECREMENT 0 */
784 #define HAVE_PRE_DECREMENT 1
785 /*#define HAVE_PRE_INCREMENT 0 */
787 /* Macros to check register numbers against specific register classes. */
789 /* These assume that REGNO is a hard or pseudo reg number.
790 They give nonzero only if REGNO is a hard reg of the suitable class
791 or a pseudo reg currently allocated to a suitable hard reg.
792 Since they use reg_renumber, they are safe only once reg_renumber
793 has been allocated, which happens in local-alloc.c. */
795 #define REGNO_OK_FOR_INDEX_P(regno) 0
797 #define REGNO_OK_FOR_BASE_P(regno) \
798 (((regno) < FIRST_PSEUDO_REGISTER && regno != 8) || reg_renumber[regno] >= 0)
800 /* Maximum number of registers that can appear in a valid memory address. */
802 #define MAX_REGS_PER_ADDRESS 1
804 /* 1 if X is an rtx for a constant that is a valid address. */
806 #define CONSTANT_ADDRESS_P(X) \
807 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
808 || (GET_CODE (X) == CONST_INT \
809 /* We handle signed and unsigned offsets here. */ \
810 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \
811 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \
812 || ((GET_CODE (X) == HIGH || GET_CODE (X) == CONST) \
815 /* Nonzero if the constant value X is a legitimate general operand.
816 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
818 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE)
820 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
821 and check its validity for a certain class.
822 We have two alternate definitions for each of them.
823 The usual definition accepts all pseudo regs; the other rejects
824 them unless they have been allocated suitable hard regs.
825 The symbol REG_OK_STRICT causes the latter definition to be used.
827 Most source files want to accept pseudo regs in the hope that
828 they will get allocated to the class that the insn wants them to be in.
829 Source files for reload pass need to be strict.
830 After reload, it makes no difference, since pseudo regs have
831 been eliminated by then. */
833 #ifndef REG_OK_STRICT
835 /* Nonzero if X is a hard reg that can be used as an index
836 or if it is a pseudo reg. */
837 #define REG_OK_FOR_INDEX_P(X) 0
838 /* Nonzero if X is a hard reg that can be used as a base reg
839 or if it is a pseudo reg. */
840 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */
841 #define REG_OK_FOR_BASE_P(X) \
842 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != 8)
843 #define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
844 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
849 /* Nonzero if X is a hard reg that can be used as an index. */
850 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
851 /* Nonzero if X is a hard reg that can be used as a base reg. */
852 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
857 /* Extra constraints. */
859 /* Nonzero if X is a constant address suitable as an 8-bit absolute on
860 the H8/300H, which is a special case of the 'R' operand. */
862 #define EIGHTBIT_CONSTANT_ADDRESS_P(X) \
863 (GET_CODE (X) == CONST_INT && TARGET_H8300H \
864 && 0xffff00 <= INTVAL (X) && INTVAL (X) <= 0xffffff)
866 /* 'U' if valid for a bset destination;
867 i.e. a register, register indirect, or the eightbit memory region
868 (a SYMBOL_REF with an SYMBOL_REF_FLAG set).
870 On the H8/S 'U' can also be a 16bit or 32bit absolute. */
871 #define OK_FOR_U(OP) \
872 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
873 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
874 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \
875 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \
876 && (TARGET_H8300S || SYMBOL_REF_FLAG (XEXP (OP, 0)))) \
877 || ((GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \
878 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \
879 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \
880 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT) \
881 && (TARGET_H8300S || SYMBOL_REF_FLAG (XEXP (XEXP (OP, 0), 0)))) \
882 || (GET_CODE (OP) == MEM \
883 && EIGHTBIT_CONSTANT_ADDRESS_P (XEXP (OP, 0))) \
884 || (GET_CODE (OP) == MEM && TARGET_H8300S \
885 && GET_CODE (XEXP (OP, 0)) == CONST_INT))
887 #define EXTRA_CONSTRAINT(OP, C) \
888 ((C) == 'U' ? OK_FOR_U (OP) : \
891 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
892 that is a valid memory address for an instruction.
893 The MODE argument is the machine mode for the MEM expression
894 that wants to use this address.
896 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
897 except for CONSTANT_ADDRESS_P which is actually
900 On the H8/300, a legitimate address has the form
901 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */
903 /* Accept either REG or SUBREG where a register is valid. */
905 #define RTX_OK_FOR_BASE_P(X) \
906 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
907 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
908 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
910 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
911 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
912 if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
913 if (GET_CODE (X) == PLUS \
914 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
915 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
917 /* Try machine-dependent ways of modifying an illegitimate address
918 to be legitimate. If we find one, return the new, valid address.
919 This macro is used in only one place: `memory_address' in explow.c.
921 OLDX is the address as it was before break_out_memory_refs was called.
922 In some cases it is useful to look at this to decide what needs to be done.
924 MODE and WIN are passed so that this macro can use
925 GO_IF_LEGITIMATE_ADDRESS.
927 It is always safe for this macro to do nothing. It exists to recognize
928 opportunities to optimize the output.
930 For the H8/300, don't do anything. */
932 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {}
934 /* Go to LABEL if ADDR (a legitimate address expression)
935 has an effect that depends on the machine mode it is used for.
937 On the H8/300, the predecrement and postincrement address depend thus
938 (the amount of decrement or increment being the length of the operand). */
940 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
941 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
943 /* Specify the machine mode that this machine uses
944 for the index in the tablejump instruction. */
945 #define CASE_VECTOR_MODE Pmode
947 /* Define as C expression which evaluates to nonzero if the tablejump
948 instruction expects the table to contain offsets from the address of the
950 Do not define this if the table should contain absolute addresses. */
951 /*#define CASE_VECTOR_PC_RELATIVE 1 */
953 /* Define this as 1 if `char' should by default be signed; else as 0.
955 On the H8/300, sign extension is expensive, so we'll say that chars
957 #define DEFAULT_SIGNED_CHAR 0
959 /* This flag, if defined, says the same insns that convert to a signed fixnum
960 also convert validly to an unsigned one. */
961 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
963 /* Max number of bytes we can move from memory to memory
964 in one reasonably fast instruction. */
965 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2)
966 #define MAX_MOVE_MAX 4
968 /* Nonzero if access to memory by bytes is slow and undesirable. */
969 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
971 /* Define if shifts truncate the shift count
972 which implies one can omit a sign-extension or zero-extension
974 /* #define SHIFT_COUNT_TRUNCATED */
976 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
977 is done just by pretending it is already truncated. */
978 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
980 /* Specify the machine mode that pointers have.
981 After generation of rtl, the compiler makes no further distinction
982 between pointers and any other objects of this machine mode. */
983 #define Pmode (TARGET_H8300H || TARGET_H8300S ? SImode : HImode)
986 We use longs for the 300H because ints can be 16 or 32.
987 GCC requires SIZE_TYPE to be the same size as pointers. */
988 #define NO_BUILTIN_SIZE_TYPE
989 #define NO_BUILTIN_PTRDIFF_TYPE
990 #define SIZE_TYPE (TARGET_H8300 ? "unsigned int" : "long unsigned int")
991 #define PTRDIFF_TYPE (TARGET_H8300 ? "int" : "long int")
993 #define WCHAR_TYPE "short unsigned int"
994 #define WCHAR_TYPE_SIZE 16
995 #define MAX_WCHAR_TYPE_SIZE 16
997 /* A function address in a call instruction
998 is a byte address (for indexing purposes)
999 so give the MEM rtx a byte's mode. */
1000 #define FUNCTION_MODE QImode
1002 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1003 LENGTH += h8300_adjust_insn_length (INSN, LENGTH);
1005 /* Compute the cost of computing a constant rtl expression RTX
1006 whose rtx-code is CODE. The body of this macro is a portion
1007 of a switch statement. If the code is computed here,
1008 return it with a return statement. Otherwise, break from the switch. */
1010 #define DEFAULT_RTX_COSTS(RTX, CODE, OUTER_CODE) \
1011 return (const_costs (RTX, CODE));
1013 #define BRANCH_COST 0
1015 /* We say that MOD and DIV are so cheap because otherwise we'll
1016 generate some really horrible code for division of a power of two. */
1018 /* Provide the costs of a rtl expression. This is in the body of a
1020 /* ??? Shifts need to have a *much* higher cost than this. */
1022 #define RTX_COSTS(RTX, CODE, OUTER_CODE) \
1033 if (GET_MODE (RTX) == HImode) return 2; \
1036 /* Tell final.c how to eliminate redundant test instructions. */
1038 /* Here we define machine-dependent flags and fields in cc_status
1039 (see `conditions.h'). No extra ones are needed for the h8300. */
1041 /* Store in cc_status the expressions
1042 that the condition codes will describe
1043 after execution of an instruction whose pattern is EXP.
1044 Do not alter them if the instruction would not alter the cc's. */
1046 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)
1048 /* The add insns don't set overflow in a usable way. */
1049 #define CC_OVERFLOW_UNUSABLE 01000
1050 /* The mov,and,or,xor insns don't set carry. That's OK though as the
1051 Z bit is all we need when doing unsigned comparisons on the result of
1052 these insns (since they're always with 0). However, conditions.h has
1053 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
1055 #define CC_NO_CARRY CC_NO_OVERFLOW
1057 /* Control the assembler format that we output. */
1059 /* Output at beginning/end of assembler file. */
1061 #define ASM_FILE_START(FILE) asm_file_start (FILE)
1063 #define ASM_FILE_END(FILE) asm_file_end (FILE)
1065 /* Output to assembler file text saying following lines
1066 may contain character constants, extra white space, comments, etc. */
1068 #define ASM_APP_ON "; #APP\n"
1070 /* Output to assembler file text saying following lines
1071 no longer contain unusual constructs. */
1073 #define ASM_APP_OFF "; #NO_APP\n"
1075 #define FILE_ASM_OP "\t.file\n"
1076 #define IDENT_ASM_OP "\t.ident\n"
1078 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
1079 #define ASM_WORD_OP (TARGET_H8300 ? "\t.word\t" : "\t.long\t")
1081 /* We define a readonly data section solely to remove readonly data
1082 from the instruction stream. This can improve relaxing in two significant
1083 ways. First it's more likely that references to readonly data
1084 can be done with a 16bit absolute address since they'll be in low
1085 memory. Second, it's more likely that jsr instructions can be
1086 turned into bsr instructions since read-only data is not in the
1087 instruction stream. */
1088 #define READONLY_DATA_SECTION readonly_data
1090 #define TEXT_SECTION_ASM_OP "\t.section .text"
1091 #define DATA_SECTION_ASM_OP "\t.section .data"
1092 #define BSS_SECTION_ASM_OP "\t.section .bss"
1093 #define INIT_SECTION_ASM_OP "\t.section .init"
1094 #define READONLY_DATA_SECTION_ASM_OP "\t.section .rodata"
1096 #define EXTRA_SECTIONS in_readonly_data
1098 #define EXTRA_SECTION_FUNCTIONS \
1099 extern void readonly_data PARAMS ((void)); \
1103 if (in_section != in_readonly_data) \
1105 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1106 in_section = in_readonly_data; \
1110 #undef DO_GLOBAL_CTORS_BODY
1111 #define DO_GLOBAL_CTORS_BODY \
1113 typedef (*pfunc)(); \
1114 extern pfunc __ctors[]; \
1115 extern pfunc __ctors_end[]; \
1117 for (p = __ctors_end; p > __ctors; ) \
1123 #undef DO_GLOBAL_DTORS_BODY
1124 #define DO_GLOBAL_DTORS_BODY \
1126 typedef (*pfunc)(); \
1127 extern pfunc __dtors[]; \
1128 extern pfunc __dtors_end[]; \
1130 for (p = __dtors; p < __dtors_end; p++) \
1136 #define TINY_DATA_NAME_P(NAME) (*(NAME) == '&')
1138 /* If we are referencing a function that is supposed to be called
1139 through the function vector, the SYMBOL_REF_FLAG in the rtl
1140 so the call patterns can generate the correct code. */
1141 #define ENCODE_SECTION_INFO(DECL) \
1142 if (TREE_CODE (DECL) == FUNCTION_DECL \
1143 && h8300_funcvec_function_p (DECL)) \
1144 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
1145 else if (TREE_CODE (DECL) == VAR_DECL \
1146 && (TREE_STATIC (DECL) || DECL_EXTERNAL (DECL)) \
1147 && h8300_eightbit_data_p (DECL)) \
1148 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
1149 else if (TREE_CODE (DECL) == VAR_DECL \
1150 && (TREE_STATIC (DECL) || DECL_EXTERNAL (DECL)) \
1151 && h8300_tiny_data_p (DECL)) \
1152 h8300_encode_label (DECL);
1154 /* Store the user-specified part of SYMBOL_NAME in VAR.
1155 This is sort of inverse to ENCODE_SECTION_INFO. */
1156 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1157 (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' \
1158 || (SYMBOL_NAME)[0] == '@' \
1159 || (SYMBOL_NAME)[0] == '&');
1161 /* How to refer to registers in assembler output.
1162 This sequence is indexed by compiler's hard-register-number (see above). */
1164 #define REGISTER_NAMES \
1165 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap" }
1167 #define ADDITIONAL_REGISTER_NAMES \
1168 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \
1169 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} }
1171 #define SDB_DEBUGGING_INFO
1172 #define SDB_DELIM "\n"
1174 /* Support -gstabs. */
1176 #include "dbxcoff.h"
1178 /* Override definition in dbxcoff.h. */
1179 /* Generate a blank trailing N_SO to mark the end of the .o file, since
1180 we can't depend upon the linker to mark .o file boundaries with
1183 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
1184 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
1186 "\t.text\n.stabs \"\",%d,0,0,.Letext\n.Letext:\n", N_SO)
1188 /* Switch into a generic section. */
1189 #define TARGET_ASM_NAMED_SECTION h8300_asm_named_section
1191 /* This is how to output the definition of a user-level label named NAME,
1192 such as the label on a static function or variable NAME. */
1194 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1197 assemble_name (FILE, NAME); \
1198 fputs (":\n", FILE); \
1202 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1203 asm_fprintf ((FILE), "%U%s", (NAME) + (TINY_DATA_NAME_P (NAME) ? 1 : 0))
1205 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
1207 /* This is how to output a command to make the user-level label named NAME
1208 defined for reference from other files. */
1210 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1213 fputs ("\t.global ", FILE); \
1214 assemble_name (FILE, NAME); \
1215 fputs ("\n", FILE); \
1219 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1220 ASM_OUTPUT_LABEL(FILE, NAME)
1222 /* The prefix to add to user-visible assembler symbols. */
1224 #define USER_LABEL_PREFIX "_"
1226 /* This is how to output an internal numbered label where
1227 PREFIX is the class of label and NUM is the number within the class.
1229 N.B.: The h8300.md branch_true and branch_false patterns also know
1230 how to generate internal labels. */
1232 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1233 fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
1235 /* This is how to store into the string LABEL
1236 the symbol_ref name of an internal numbered label where
1237 PREFIX is the class of label and NUM is the number within the class.
1238 This is suitable for output with `assemble_name'. */
1240 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1241 sprintf (LABEL, "*.%s%d", PREFIX, NUM)
1243 /* This is how to output an insn to push a register on the stack.
1244 It need not be very fast code. */
1246 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1247 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO])
1249 /* This is how to output an insn to pop a register from the stack.
1250 It need not be very fast code. */
1252 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1253 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])
1255 /* This is how to output an element of a case-vector that is absolute. */
1257 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1258 asm_fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE)
1260 /* This is how to output an element of a case-vector that is relative. */
1262 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1263 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL)
1265 /* This is how to output an assembler line
1266 that says to advance the location counter
1267 to a multiple of 2**LOG bytes. */
1269 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1271 fprintf (FILE, "\t.align %d\n", (LOG))
1273 /* This is how to output an assembler line
1274 that says to advance the location counter by SIZE bytes. */
1276 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1277 fprintf (FILE, "%s\"%s\"\n", IDENT_ASM_OP, NAME)
1279 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1280 fprintf (FILE, "\t.space %d\n", (SIZE))
1282 /* This says how to output an assembler line
1283 to define a global common symbol. */
1285 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1286 ( fputs ("\t.comm ", (FILE)), \
1287 assemble_name ((FILE), (NAME)), \
1288 fprintf ((FILE), ",%d\n", (SIZE)))
1290 /* This says how to output the assembler to define a global
1291 uninitialized but not common symbol.
1292 Try to use asm_output_bss to implement this macro. */
1294 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
1295 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
1297 /* This says how to output an assembler line
1298 to define a local common symbol. */
1300 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1301 ( fputs ("\t.lcomm ", (FILE)), \
1302 assemble_name ((FILE), (NAME)), \
1303 fprintf ((FILE), ",%d\n", (SIZE)))
1305 /* Store in OUTPUT a string (made with alloca) containing
1306 an assembler-name for a local static variable named NAME.
1307 LABELNO is an integer which is different for each call. */
1309 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1310 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1311 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1313 /* Print an instruction operand X on file FILE.
1314 Look in h8300.c for details. */
1316 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1319 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1321 /* Print a memory operand whose address is X, on file FILE.
1322 This uses a function in h8300.c. */
1324 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1326 /* H8300 specific pragmas. */
1327 #define REGISTER_TARGET_PRAGMAS(PFILE) \
1330 cpp_register_pragma (PFILE, 0, "saveall", h8300_pr_saveall); \
1331 cpp_register_pragma (PFILE, 0, "interrupt", h8300_pr_interrupt); \
1335 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
1336 final_prescan_insn (insn, operand, nop)
1338 /* Define this macro if GNU CC should generate calls to the System V
1339 (and ANSI C) library functions `memcpy' and `memset' rather than
1340 the BSD functions `bcopy' and `bzero'. */
1342 #define TARGET_MEM_FUNCTIONS 1
1344 #define MULHI3_LIBCALL "__mulhi3"
1345 #define DIVHI3_LIBCALL "__divhi3"
1346 #define UDIVHI3_LIBCALL "__udivhi3"
1347 #define MODHI3_LIBCALL "__modhi3"
1348 #define UMODHI3_LIBCALL "__umodhi3"
1350 /* Perform target dependent optabs initialization. */
1352 #define INIT_TARGET_OPTABS \
1355 smul_optab->handlers[(int) HImode].libfunc \
1356 = init_one_libfunc (MULHI3_LIBCALL); \
1357 sdiv_optab->handlers[(int) HImode].libfunc \
1358 = init_one_libfunc (DIVHI3_LIBCALL); \
1359 udiv_optab->handlers[(int) HImode].libfunc \
1360 = init_one_libfunc (UDIVHI3_LIBCALL); \
1361 smod_optab->handlers[(int) HImode].libfunc \
1362 = init_one_libfunc (MODHI3_LIBCALL); \
1363 umod_optab->handlers[(int) HImode].libfunc \
1364 = init_one_libfunc (UMODHI3_LIBCALL); \
1368 #define MOVE_RATIO 3
1370 #endif /* ! GCC_H8300_H */