1 /* Definitions of target machine for GNU compiler.
2 Hitachi H8/300 version generating coff
3 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
4 Contributed by Steve Chamberlain (sac@cygnus.com),
5 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com).
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* Which cpu to compile for.
25 We use int for CPU_TYPE to avoid lots of casts. */
26 #if 0 /* defined in insn-attr.h, here for documentation */
27 enum attr_cpu
{ CPU_H8300
, CPU_H8300H
};
31 /* Various globals defined in h8300.c. */
33 extern char *h8_push_op
,*h8_pop_op
,*h8_mov_op
;
34 extern char **h8_reg_names
;
36 /* Names to predefine in the preprocessor for this target machine. */
38 #define CPP_PREDEFINES \
39 "-D__LONG_MAX__=2147483647L -D__LONG_LONG_MAX__=2147483647L"
42 "%{!mh:-D__H8300__} %{mh:-D__H8300H__} \
43 %{!mh:-D__SIZE_TYPE__=unsigned\\ int -D__PTRDIFF_TYPE__=int} \
44 %{mh:-D__SIZE_TYPE__=unsigned\\ long -D__PTRDIFF_TYPE__=long} \
45 %{!mh:-Acpu(h8300) -Amachine(h8300)} %{mh:-Acpu(h8300h) -Amachine(h8300h)} \
46 %{!mint32:-D__INT_MAX__=32767} %{mint32:-D__INT_MAX__=2147483647}"
48 #define LINK_SPEC "%{mh:-m h8300h}"
50 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
52 /* Print subsidiary information on the compiler version in use. */
54 #define TARGET_VERSION fprintf (stderr, " (Hitachi H8/300)");
56 /* Run-time compilation parameters selecting different hardware subsets. */
58 extern int target_flags
;
60 /* Macros used in the machine description to test the flags. */
62 /* Make int's 32 bits. */
63 #define TARGET_INT32 (target_flags & 8)
65 /* Dump recorded insn lengths into the output file. This helps debug the
67 #define TARGET_ADDRESSES (target_flags & 64)
69 /* Pass the first few arguments in registers. */
70 #define TARGET_QUICKCALL (target_flags & 128)
72 /* Pretend byte accesses are slow. */
73 #define TARGET_SLOWBYTE (target_flags & 256)
75 /* Dump each assembler insn's rtl into the output file.
76 This is for debugging the compiler only. */
77 #define TARGET_RTL_DUMP (target_flags & 2048)
79 /* Select between the h8/300 and h8/300h cpus. */
80 #define TARGET_H8300 (! TARGET_H8300H)
81 #define TARGET_H8300H (target_flags & 4096)
83 /* Align all values on the h8/300h the same way as the h8/300. Specifically,
84 32 bit and larger values are aligned on 16 bit boundaries.
85 This is all the hardware requires, but the default is 32 bits for the 300h.
86 ??? Now watch someone add hardware floating point requiring 32 bit
88 #define TARGET_ALIGN_300 (target_flags & 8192)
90 /* Macro to define tables used to set the flags.
91 This is a list in braces of pairs in braces,
92 each pair being { "NAME", VALUE }
93 where VALUE is the bits to set or minus the bits to clear.
94 An empty string NAME is used to identify the default VALUE. */
96 #define TARGET_SWITCHES \
100 {"no-quickcall",-128}, \
106 {"align-300",8192}, \
107 { "", TARGET_DEFAULT}}
109 /* Do things that must be done once at start up. */
111 #define OVERRIDE_OPTIONS \
113 h8300_init_once (); \
116 /* Default target_flags if no switches specified. */
118 #ifndef TARGET_DEFAULT
119 #define TARGET_DEFAULT (128) /* quickcall */
122 /* Show we can debug even without a frame pointer. */
123 /* #define CAN_DEBUG_WITHOUT_FP */
125 /* Define this if addresses of constant functions
126 shouldn't be put through pseudo regs where they can be cse'd.
127 Desirable on machines where ordinary constants are expensive
128 but a CALL with constant address is cheap. */
129 #define NO_FUNCTION_CSE
131 /* Target machine storage layout */
133 /* Define to use software floating point emulator for REAL_ARITHMETIC and
134 decimal <-> binary conversion. */
135 #define REAL_ARITHMETIC
137 /* Define this if most significant bit is lowest numbered
138 in instructions that operate on numbered bit-fields.
139 This is not true on the H8/300. */
140 #define BITS_BIG_ENDIAN 0
142 /* Define this if most significant byte of a word is the lowest numbered. */
143 /* That is true on the H8/300. */
144 #define BYTES_BIG_ENDIAN 1
146 /* Define this if most significant word of a multiword number is lowest
148 This is true on an H8/300 (actually we can make it up, but we choose to
150 #define WORDS_BIG_ENDIAN 1
152 /* Number of bits in an addressable storage unit */
153 #define BITS_PER_UNIT 8
155 /* Width in bits of a "word", which is the contents of a machine register.
156 Note that this is not necessarily the width of data type `int';
157 if using 16-bit ints on a 68000, this would still be 32.
158 But on a machine with 16-bit registers, this would be 16. */
159 #define BITS_PER_WORD (TARGET_H8300H ? 32 : 16)
160 #define MAX_BITS_PER_WORD 32
162 /* Width of a word, in units (bytes). */
163 #define UNITS_PER_WORD (TARGET_H8300H ? 4 : 2)
164 #define MIN_UNITS_PER_WORD 2
166 /* Width in bits of a pointer.
167 See also the macro `Pmode' defined below. */
168 #define POINTER_SIZE (TARGET_H8300H ? 32 : 16)
170 #define SHORT_TYPE_SIZE 16
171 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16)
172 #define LONG_TYPE_SIZE 32
173 #define LONG_LONG_TYPE_SIZE 32
174 #define FLOAT_TYPE_SIZE 32
175 #define DOUBLE_TYPE_SIZE 32
176 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
178 #define MAX_FIXED_MODE_SIZE 32
180 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
181 #define PARM_BOUNDARY (TARGET_H8300H ? 32 : 16)
183 /* Allocation boundary (in *bits*) for the code of a function. */
184 #define FUNCTION_BOUNDARY 16
186 /* Alignment of field after `int : 0' in a structure. */
187 /* One can argue this should be 32 for -mint32, but since 32 bit ints only
188 need 16 bit alignment, this is left as is so that -mint32 doesn't change
189 structure layouts. */
190 #define EMPTY_FIELD_BOUNDARY 16
192 /* A bitfield declared as `int' forces `int' alignment for the struct. */
193 #define PCC_BITFIELD_TYPE_MATTERS 0
195 /* No data type wants to be aligned rounder than this.
196 32 bit values are aligned as such on the 300h for speed. */
197 #define BIGGEST_ALIGNMENT \
198 ((TARGET_H8300H && ! TARGET_ALIGN_300) ? 32 : 16)
200 /* No structure field wants to be aligned rounder than this. */
201 #define BIGGEST_FIELD_ALIGNMENT \
202 ((TARGET_H8300H && ! TARGET_ALIGN_300) ? 32 : 16)
204 /* The stack goes in 16/32 bit lumps. */
205 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32)
207 /* Define this if move instructions will actually fail to work
208 when given unaligned data. */
209 /* On the H8/300, longs can be aligned on halfword boundaries, but not
211 #define STRICT_ALIGNMENT 1
213 /* Standard register usage. */
215 /* Number of actual hardware registers.
216 The hardware registers are assigned numbers for the compiler
217 from 0 to just below FIRST_PSEUDO_REGISTER.
219 All registers that the compiler knows about must be given numbers,
220 even those that are not normally considered general registers.
222 Reg 8 does not correspond to any hardware register, but instead
223 appears in the RTL as an argument pointer prior to reload, and is
224 eliminated during reloading in favor of either the stack or frame
227 #define FIRST_PSEUDO_REGISTER 9
229 /* 1 for registers that have pervasive standard uses
230 and are not available for the register allocator. */
232 #define FIXED_REGISTERS \
233 { 0, 0, 0, 0, 0, 0, 0, 1, 1}
235 /* 1 for registers not available across function calls.
236 These must include the FIXED_REGISTERS and also any
237 registers that can be used without being saved.
238 The latter must include the registers where values are returned
239 and the register where structure-value addresses are passed.
240 Aside from that, you can include as many other registers as you
243 h8 destroys r0,r1,r2,r3. */
245 #define CALL_USED_REGISTERS \
246 { 1, 1, 1, 1, 0, 0, 0, 1, 1 }
248 #define REG_ALLOC_ORDER \
249 { 2, 3, 0, 1, 4, 5, 6, 7, 8}
251 /* Return number of consecutive hard regs needed starting at reg REGNO
252 to hold something of mode MODE.
254 This is ordinarily the length in words of a value of mode MODE
255 but can be less for certain modes in special long registers. */
257 #define HARD_REGNO_NREGS(REGNO, MODE) \
258 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
260 /* Value is 1 if hard register REGNO can hold a value of machine-mode
263 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI
265 H8/300H: Anything goes. */
267 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
268 (TARGET_H8300 ? (((REGNO)&1)==0) || (MODE==HImode) || (MODE==QImode) \
271 /* Value is 1 if it is a good idea to tie two pseudo registers
272 when one has mode MODE1 and one has mode MODE2.
273 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
274 for any hard reg, then this must be 0 for correct output. */
275 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
277 /* Specify the registers used for certain standard purposes.
278 The values of these macros are register numbers. */
280 /* H8/300 pc is not overloaded on a register. */
282 /*#define PC_REGNUM 15*/
284 /* Register to use for pushing function arguments. */
285 #define STACK_POINTER_REGNUM 7
287 /* Base register for access to local variables of the function. */
288 #define FRAME_POINTER_REGNUM 6
290 /* Value should be nonzero if functions must have frame pointers.
291 Zero means the frame pointer need not be set up (and parms
292 may be accessed via the stack pointer) in functions that seem suitable.
293 This is computed in `reload', in reload1.c. */
294 #define FRAME_POINTER_REQUIRED 0
296 /* Base register for access to arguments of the function. */
297 #define ARG_POINTER_REGNUM 8
299 /* Register in which static-chain is passed to a function. */
300 #define STATIC_CHAIN_REGNUM 3
302 /* Define the classes of registers for register constraints in the
303 machine description. Also define ranges of constants.
305 One of the classes must always be named ALL_REGS and include all hard regs.
306 If there is more than one class, another class must be named NO_REGS
307 and contain no registers.
309 The name GENERAL_REGS must be the name of a class (or an alias for
310 another name such as ALL_REGS). This is the class of registers
311 that is allowed by "g" or "r" in a register constraint.
312 Also, registers outside this class are allocated only when
313 instructions express preferences for them.
315 The classes must be numbered in nondecreasing order; that is,
316 a larger-numbered class must never be contained completely
317 in a smaller-numbered class.
319 For any two classes, it is very desirable that there be another
320 class that represents their union. */
322 /* The h8 has only one kind of register, but we mustn't do byte by
323 byte operations on the sp, so we keep it as a different class */
326 NO_REGS
, LONG_REGS
, GENERAL_REGS
, SP_REG
, SP_AND_G_REGS
,
327 ALL_REGS
, LIM_REG_CLASSES
330 #define N_REG_CLASSES (int) LIM_REG_CLASSES
332 /* Give names of register classes as strings for dump file. */
334 #define REG_CLASS_NAMES \
335 { "NO_REGS", "LONG_REGS", "GENERAL_REGS", "SP_REG", "SP_AND_G_REGS", \
336 "ALL_REGS", "LIM_REGS" }
338 /* Define which registers fit in which classes.
339 This is an initializer for a vector of HARD_REG_SET
340 of length N_REG_CLASSES. */
342 #define REG_CLASS_CONTENTS \
344 0x07f, /* LONG_REGS */ \
345 0x07f, /* GENERAL_REGS */ \
346 0x080, /* SP_REG */ \
347 0x0ff, /* SP_AND_G_REGS */ \
348 0x1ff, /* ALL_REGS */ \
351 /* The same information, inverted:
352 Return the class number of the smallest class containing
353 reg number REGNO. This could be a conditional expression
354 or could index an array. */
356 #define REGNO_REG_CLASS(REGNO) \
357 ((REGNO) < 7 ? LONG_REGS : \
358 (REGNO) == 7 ? SP_REG : \
361 /* The class value for index registers, and the one for base regs. */
363 #define INDEX_REG_CLASS NO_REGS
364 #define BASE_REG_CLASS GENERAL_REGS
366 /* Get reg_class from a letter such as appears in the machine description. */
368 #define REG_CLASS_FROM_LETTER(C) \
369 ((C) == 'a' ? (SP_REG) : (C) == 'l' ? (LONG_REGS) : (NO_REGS))
371 /* The letters I, J, K, L, M, N, O, P in a register constraint string
372 can be used to stand for particular ranges of immediate operands.
373 This macro defines what the ranges are.
374 C is the letter, and VALUE is a constant value.
375 Return 1 if VALUE is in the range specified by C. */
377 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
378 #define CONST_OK_FOR_J(VALUE) ((unsigned) (VALUE) < 256)
379 #define CONST_OK_FOR_K(VALUE) (((VALUE) == 1) || (VALUE) == 2)
380 #define CONST_OK_FOR_L(VALUE) (((VALUE) == -1) || (VALUE) == -2)
381 #define CONST_OK_FOR_M(VALUE) (((VALUE) == 3) || (VALUE) == 4)
382 #define CONST_OK_FOR_N(VALUE) (((VALUE) == -3) || (VALUE) == -4)
383 #define CONST_OK_FOR_O(VALUE) (ok_for_bclr (VALUE))
384 #define CONST_OK_FOR_P(VALUE) (small_power_of_two (VALUE))
386 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
387 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
388 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
389 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
390 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
391 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
392 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \
393 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \
394 (C) == 'P' ? CONST_OK_FOR_P(VALUE) : \
397 /* Similar, but for floating constants, and defining letters G and H.
398 Here VALUE is the CONST_DOUBLE rtx itself.
400 `G' is a floating-point zero. */
402 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
403 ((C) == 'G' ? (VALUE) == CONST0_RTX (DFmode) \
406 /* Given an rtx X being reloaded into a reg required to be
407 in class CLASS, return the class of reg to actually use.
408 In general this is just CLASS; but on some machines
409 in some cases it is preferable to use a more restrictive class. */
411 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
413 /* Return the maximum number of consecutive registers
414 needed to represent mode MODE in a register of class CLASS. */
416 /* On the H8, this is the size of MODE in words. */
418 #define CLASS_MAX_NREGS(CLASS, MODE) \
419 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
421 /* Any SI register to register move may need to be reloaded,
422 so define REGISTER_MOVE_COST to be > 2 so that reload never
425 #define REGISTER_MOVE_COST(CLASS1, CLASS2) 3
427 /* Stack layout; function entry, exit and calling. */
429 /* Define this if pushing a word on the stack
430 makes the stack pointer a smaller address. */
432 #define STACK_GROWS_DOWNWARD
434 /* Define this if the nominal address of the stack frame
435 is at the high-address end of the local variables;
436 that is, each additional local variable allocated
437 goes at a more negative offset in the frame. */
439 #define FRAME_GROWS_DOWNWARD
441 /* Offset within stack frame to start allocating local variables at.
442 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
443 first local allocated. Otherwise, it is the offset to the BEGINNING
444 of the first local allocated. */
446 #define STARTING_FRAME_OFFSET 0
448 /* If we generate an insn to push BYTES bytes,
449 this says how many the stack pointer really advances by.
451 On the H8/300, @-sp really pushes a byte if you ask it to - but that's
452 dangerous, so we claim that it always pushes a word, then we catch
453 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output.
455 On the H8/300h, we simplify TARGET_QUICKCALL by setting this to 4 and doing
458 #define PUSH_ROUNDING(BYTES) \
459 (((BYTES) + PARM_BOUNDARY/8 - 1) & -PARM_BOUNDARY/8)
461 /* Offset of first parameter from the argument pointer register value. */
462 /* Is equal to the size of the saved fp + pc, even if an fp isn't
463 saved since the value is used before we know. */
465 #define FIRST_PARM_OFFSET(FNDECL) 0
467 /* Value is the number of bytes of arguments automatically
468 popped when returning from a subroutine call.
469 FUNDECL is the declaration node of the function (as a tree),
470 FUNTYPE is the data type of the function (as a tree),
471 or for a library call it is an identifier node for the subroutine name.
472 SIZE is the number of bytes of arguments passed on the stack.
474 On the H8 the return does not pop anything. */
476 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
478 /* Definitions for register eliminations.
480 This is an array of structures. Each structure initializes one pair
481 of eliminable registers. The "from" register number is given first,
482 followed by "to". Eliminations of the same "from" register are listed
483 in order of preference.
485 We have two registers that can be eliminated on the h8300. First, the
486 frame pointer register can often be eliminated in favor of the stack
487 pointer register. Secondly, the argument pointer register can always be
488 eliminated; it is replaced with either the stack or frame pointer. */
490 #define ELIMINABLE_REGS \
491 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
492 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
493 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
495 /* Given FROM and TO register numbers, say whether this elimination is allowed.
496 Frame pointer elimination is automatically handled.
498 For the h8300, if frame pointer elimination is being done, we would like to
499 convert ap into sp, not fp.
501 All other eliminations are valid. */
503 #define CAN_ELIMINATE(FROM, TO) \
504 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
505 ? ! frame_pointer_needed \
508 /* Define the offset between two registers, one to be eliminated, and the other
509 its replacement, at the start of a routine. */
511 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
512 OFFSET = initial_offset (FROM, TO)
514 /* Define how to find the value returned by a function.
515 VALTYPE is the data type of the value (as a tree).
516 If the precise function being called is known, FUNC is its FUNCTION_DECL;
517 otherwise, FUNC is 0.
519 On the H8 the return value is in R0/R1. */
521 #define FUNCTION_VALUE(VALTYPE, FUNC) \
522 gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
524 /* Define how to find the value returned by a library function
525 assuming the value has mode MODE. */
527 /* On the h8 the return value is in R0/R1 */
529 #define LIBCALL_VALUE(MODE) \
530 gen_rtx (REG, MODE, 0)
532 /* 1 if N is a possible register number for a function value.
533 On the H8, R0 is the only register thus used. */
535 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
537 /* Define this if PCC uses the nonreentrant convention for returning
538 structure and union values. */
540 /*#define PCC_STATIC_STRUCT_RETURN*/
542 /* 1 if N is a possible register number for function argument passing.
543 On the H8, no registers are used in this way. */
544 /* ??? What about TARGET_QUICKCALL? */
546 #define FUNCTION_ARG_REGNO_P(N) 0
548 /* Register in which address to store a structure value
549 is passed to a function. */
551 #define STRUCT_VALUE 0
553 /* Return true if X should be returned in memory. */
554 /* ??? This will return small structs in regs. */
555 #define RETURN_IN_MEMORY(X) (GET_MODE_SIZE (TYPE_MODE (X)) > 4)
557 /* When defined, the compiler allows registers explicitly used in the
558 rtl to be used as spill registers but prevents the compiler from
559 extending the lifetime of these registers. */
561 #define SMALL_REGISTER_CLASSES
563 /* Define a data type for recording info about an argument list
564 during the scan of that argument list. This data type should
565 hold all necessary information about the function itself
566 and about the args processed so far, enough to enable macros
567 such as FUNCTION_ARG to determine where the next arg should go.
569 On the H8/300, this is a two item struct, the first is the number of bytes
570 scanned so far and the second is the rtx of the called library
573 #define CUMULATIVE_ARGS struct cum_arg
574 struct cum_arg
{ int nbytes
; struct rtx_def
* libcall
; };
576 /* Initialize a variable CUM of type CUMULATIVE_ARGS
577 for a call to a function whose data type is FNTYPE.
578 For a library call, FNTYPE is 0.
580 On the H8/300, the offset starts at 0. */
582 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
583 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)
585 /* Update the data in CUM to advance over an argument
586 of mode MODE and data type TYPE.
587 (TYPE is null for libcalls where that information may not be available.) */
589 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
590 ((CUM).nbytes += ((MODE) != BLKmode \
591 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \
592 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))
594 /* Define where to put the arguments to a function.
595 Value is zero to push the argument on the stack,
596 or a hard register in which to store the argument.
598 MODE is the argument's machine mode.
599 TYPE is the data type of the argument (as a tree).
600 This is null for libcalls where that information may
602 CUM is a variable of type CUMULATIVE_ARGS which gives info about
603 the preceding args and about the function being called.
604 NAMED is nonzero if this argument is a named parameter
605 (otherwise it is an extra parameter matching an ellipsis). */
607 /* On the H8/300 all normal args are pushed, unless -mquickcall in which
608 case the first 3 arguments are passed in registers.
609 See function `function_arg'. */
611 struct rtx_def
*function_arg();
612 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
613 function_arg (&CUM, MODE, TYPE, NAMED)
615 /* Perform any needed actions needed for a function that is receiving a
616 variable number of arguments. */
618 extern int current_function_anonymous_args
;
619 #define SETUP_INCOMING_VARARGS(ASF, MODE, TYPE, PAS, ST) \
620 current_function_anonymous_args = 1;
622 /* Generate assembly output for the start of a function. */
624 #define FUNCTION_PROLOGUE(FILE, SIZE) \
625 function_prologue (FILE, SIZE)
627 /* Output assembler code to FILE to increment profiler label # LABELNO
628 for profiling a function entry. */
630 #define FUNCTION_PROFILER(FILE, LABELNO) \
631 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \
632 h8_mov_op, (LABELNO), h8_reg_names[0]);
634 /* Output assembler code to FILE to initialize this source file's
635 basic block profiling info, if that has not already been done. */
636 /* ??? @LPBX0 is moved into r0 twice. */
638 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
639 fprintf (FILE, "\t%s\t%s\n\t%s\t@LPBX0,%s\n\tbne LPI%d\n\t%s\t@LPBX0,%s\n\t%s\t%s\n\tjsr\t@__bb_init_func\nLPI%d:\t%s\t%s\n", \
640 h8_push_op, h8_reg_names[0], \
641 h8_mov_op, h8_reg_names[0], \
643 h8_mov_op, h8_reg_names[0], \
644 h8_push_op, h8_reg_names[0], \
646 h8_pop_op, h8_reg_names[0]);
648 /* Output assembler code to FILE to increment the entry-count for
649 the BLOCKNO'th basic block in this source file. This is a real pain in the
650 sphincter on a VAX, since we do not want to change any of the bits in the
651 processor status word. The way it is done here, it is pushed onto the stack
652 before any flags have changed, and then the stack is fixed up to account for
653 the fact that the instruction to restore the flags only reads a word.
654 It may seem a bit clumsy, but at least it works. */
655 /* ??? This one needs work. */
657 #define BLOCK_PROFILER(FILE, BLOCKNO) \
658 fprintf (FILE, "\tmovpsl -(sp)\n\tmovw (sp),2(sp)\n\taddl2 $2,sp\n\taddl2 $1,LPBX2+%d\n\tbicpsw $255\n\tbispsw (sp)+\n", \
661 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
662 the stack pointer does not matter. The value is tested only in
663 functions that have frame pointers.
664 No definition is equivalent to always zero. */
666 #define EXIT_IGNORE_STACK 0
668 /* This macro generates the assembly code for function exit,
669 on machines that need it. If FUNCTION_EPILOGUE is not defined
670 then individual return instructions are generated for each
671 return statement. Args are same as for FUNCTION_PROLOGUE. */
673 #define FUNCTION_EPILOGUE(FILE, SIZE) \
674 function_epilogue (FILE, SIZE)
676 /* Output assembler code for a block containing the constant parts
677 of a trampoline, leaving space for the variable parts.
681 1 0000 7900xxxx mov.w #0x1234,r3
682 2 0004 5A00xxxx jmp @0x1234
687 2 0000 7A00xxxxxxxx mov.l #0x12345678,er3
688 3 0006 5Axxxxxx jmp @0x123456
692 #define TRAMPOLINE_TEMPLATE(FILE) \
696 fprintf (FILE, "\tmov.w #0x1234,r3\n"); \
697 fprintf (FILE, "\tjmp @0x1234\n"); \
701 fprintf (FILE, "\tmov.l #0x12345678,er3\n"); \
702 fprintf (FILE, "\tjmp @0x123456\n"); \
706 /* Length in units of the trampoline for entering a nested function. */
708 #define TRAMPOLINE_SIZE (TARGET_H8300 ? 8 : 12)
710 /* Emit RTL insns to initialize the variable parts of a trampoline.
711 FNADDR is an RTX for the address of the function's pure code.
712 CXT is an RTX for the static chain value for the function. */
714 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
716 enum machine_mode mode = TARGET_H8300H ? SImode : HImode; \
717 emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 2)), CXT); \
718 emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 6)), FNADDR); \
720 emit_move_insn (gen_rtx (MEM, QImode, plus_constant ((TRAMP), 6)), GEN_INT (0x5A)); \
723 /* Addressing modes, and classification of registers for them. */
725 #define HAVE_POST_INCREMENT
726 /*#define HAVE_POST_DECREMENT */
728 #define HAVE_PRE_DECREMENT
729 /*#define HAVE_PRE_INCREMENT */
731 /* Macros to check register numbers against specific register classes. */
733 /* These assume that REGNO is a hard or pseudo reg number.
734 They give nonzero only if REGNO is a hard reg of the suitable class
735 or a pseudo reg currently allocated to a suitable hard reg.
736 Since they use reg_renumber, they are safe only once reg_renumber
737 has been allocated, which happens in local-alloc.c. */
739 #define REGNO_OK_FOR_INDEX_P(regno) 0
741 #define REGNO_OK_FOR_BASE_P(regno) \
742 ((regno) < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
744 /* Maximum number of registers that can appear in a valid memory address. */
746 #define MAX_REGS_PER_ADDRESS 1
748 /* 1 if X is an rtx for a constant that is a valid address. */
750 #define CONSTANT_ADDRESS_P(X) \
751 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
752 || (GET_CODE (X) == CONST_INT \
753 /* We handle signed and unsigned offsets here. */ \
754 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \
755 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \
756 || GET_CODE (X) == CONST \
757 || GET_CODE (X) == HIGH)
759 /* Nonzero if the constant value X is a legitimate general operand.
760 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
762 #define LEGITIMATE_CONSTANT_P(X) (GET_CODE (X) != CONST_DOUBLE)
764 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
765 and check its validity for a certain class.
766 We have two alternate definitions for each of them.
767 The usual definition accepts all pseudo regs; the other rejects
768 them unless they have been allocated suitable hard regs.
769 The symbol REG_OK_STRICT causes the latter definition to be used.
771 Most source files want to accept pseudo regs in the hope that
772 they will get allocated to the class that the insn wants them to be in.
773 Source files for reload pass need to be strict.
774 After reload, it makes no difference, since pseudo regs have
775 been eliminated by then. */
777 #ifndef REG_OK_STRICT
779 /* Nonzero if X is a hard reg that can be used as an index
780 or if it is a pseudo reg. */
781 #define REG_OK_FOR_INDEX_P(X) 0
782 /* Nonzero if X is a hard reg that can be used as a base reg
783 or if it is a pseudo reg. */
784 #define REG_OK_FOR_BASE_P(X) 1
785 #define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
786 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X))
791 /* Nonzero if X is a hard reg that can be used as an index. */
792 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
793 /* Nonzero if X is a hard reg that can be used as a base reg. */
794 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
799 /* Extra constraints - 'U' if for an operand valid for a bset
800 destination; i.e. a register or register indirect target. */
801 #define OK_FOR_U(OP) \
802 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \
803 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
804 && REG_OK_FOR_BASE_P (XEXP (OP, 0))))
806 #define EXTRA_CONSTRAINT(OP, C) \
807 ((C) == 'U' ? OK_FOR_U (OP) : 0)
809 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
810 that is a valid memory address for an instruction.
811 The MODE argument is the machine mode for the MEM expression
812 that wants to use this address.
814 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
815 except for CONSTANT_ADDRESS_P which is actually
818 On the H8/300, a legitimate address has the form
819 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */
821 /* Accept either REG or SUBREG where a register is valid. */
823 #define RTX_OK_FOR_BASE_P(X) \
824 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
825 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
826 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
828 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
829 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \
830 if (CONSTANT_ADDRESS_P (X)) goto ADDR; \
831 if (GET_CODE (X) == PLUS \
832 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \
833 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR;
835 /* Try machine-dependent ways of modifying an illegitimate address
836 to be legitimate. If we find one, return the new, valid address.
837 This macro is used in only one place: `memory_address' in explow.c.
839 OLDX is the address as it was before break_out_memory_refs was called.
840 In some cases it is useful to look at this to decide what needs to be done.
842 MODE and WIN are passed so that this macro can use
843 GO_IF_LEGITIMATE_ADDRESS.
845 It is always safe for this macro to do nothing. It exists to recognize
846 opportunities to optimize the output.
848 For the H8/300, don't do anything. */
850 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
852 /* Go to LABEL if ADDR (a legitimate address expression)
853 has an effect that depends on the machine mode it is used for.
855 On the H8/300, the predecrement and postincrement address depend thus
856 (the amount of decrement or increment being the length of the operand)
857 and all indexed address depend thus (because the index scale factor
858 is the length of the operand). */
860 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
861 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL;
863 /* Specify the machine mode that this machine uses
864 for the index in the tablejump instruction. */
865 #define CASE_VECTOR_MODE Pmode
867 /* Define this if the case instruction expects the table
868 to contain offsets from the address of the table.
869 Do not define this if the table should contain absolute addresses. */
870 /*#define CASE_VECTOR_PC_RELATIVE*/
872 /* Define this if the case instruction drops through after the table
873 when the index is out of range. Don't define it if the case insn
874 jumps to the default label instead. */
875 #define CASE_DROPS_THROUGH
877 /* Specify the tree operation to be used to convert reals to integers. */
878 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
880 /* This is the kind of divide that is easiest to do in the general case. */
881 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
883 /* Define this as 1 if `char' should by default be signed; else as 0.
885 On the H8/300, sign extension is expensive, so we'll say that chars
887 #define DEFAULT_SIGNED_CHAR 0
889 /* This flag, if defined, says the same insns that convert to a signed fixnum
890 also convert validly to an unsigned one. */
891 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
893 /* Max number of bytes we can move from memory to memory
894 in one reasonably fast instruction. */
895 #define MOVE_MAX (TARGET_H8300H ? 4 : 2)
896 #define MAX_MOVE_MAX 4
898 /* Define this if zero-extension is slow (more than one real instruction). */
899 /* #define SLOW_ZERO_EXTEND */
901 /* Nonzero if access to memory by bytes is slow and undesirable. */
902 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE
904 /* Define if shifts truncate the shift count
905 which implies one can omit a sign-extension or zero-extension
907 /* #define SHIFT_COUNT_TRUNCATED */
909 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
910 is done just by pretending it is already truncated. */
911 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
913 /* Specify the machine mode that pointers have.
914 After generation of rtl, the compiler makes no further distinction
915 between pointers and any other objects of this machine mode. */
916 #define Pmode (TARGET_H8300H ? SImode : HImode)
919 We use longs for the 300h because ints can be 16 or 32.
920 GCC requires SIZE_TYPE to be the same size as pointers. */
921 #define NO_BUILTIN_SIZE_TYPE
922 #define NO_BUILTIN_PTRDIFF_TYPE
923 #define SIZE_TYPE (TARGET_H8300 ? "unsigned int" : "long unsigned int")
924 #define PTRDIFF_TYPE (TARGET_H8300 ? "int" : "long int")
926 #define WCHAR_TYPE "short unsigned int"
927 #define WCHAR_TYPE_SIZE 16
928 #define MAX_WCHAR_TYPE_SIZE 16
930 /* A function address in a call instruction
931 is a byte address (for indexing purposes)
932 so give the MEM rtx a byte's mode. */
933 #define FUNCTION_MODE QImode
935 /* Compute the cost of computing a constant rtl expression RTX
936 whose rtx-code is CODE. The body of this macro is a portion
937 of a switch statement. If the code is computed here,
938 return it with a return statement. Otherwise, break from the switch. */
940 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
941 default: { int _zxy= const_costs(RTX, CODE); \
942 if(_zxy) return _zxy; break;}
944 #define BRANCH_COST 0
946 /* We say that MOD and DIV are so cheap because otherwise we'll
947 generate some really horrible code for division of a power of two. */
949 /* Provide the costs of a rtl expression. This is in the body of a
951 /* ??? Shifts need to have a *much* higher cost than this. */
953 #define RTX_COSTS(RTX,CODE,OUTER_CODE) \
964 if (GET_MODE (RTX) == HImode) return 2; \
967 /* Tell final.c how to eliminate redundant test instructions. */
969 /* Here we define machine-dependent flags and fields in cc_status
970 (see `conditions.h'). No extra ones are needed for the vax. */
972 /* Store in cc_status the expressions
973 that the condition codes will describe
974 after execution of an instruction whose pattern is EXP.
975 Do not alter them if the instruction would not alter the cc's. */
977 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
979 /* The mov,and,or,xor insns always set V to 0. */
980 #define CC_OVERFLOW_0 0400
981 /* The add insns don't set overflow in a usable way. */
982 #define CC_OVERFLOW_UNUSABLE 01000
983 /* The mov,and,or,xor insns don't set carry. That's ok though as the
984 Z bit is all we need when doing unsigned comparisons on the result of
985 these insns (since they're always with 0). However, conditions.h has
986 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
988 #define CC_NO_CARRY CC_NO_OVERFLOW
989 /* ??? Use CC_Z_IN_NOT_C for bld insns? */
991 /* Control the assembler format that we output. */
993 #define ASM_IDENTIFY_GCC /* nothing */
995 /* Output at beginning/end of assembler file. */
997 #define ASM_FILE_START(FILE) asm_file_start(FILE)
999 #define ASM_FILE_END(FILE) asm_file_end(FILE)
1001 /* Output to assembler file text saying following lines
1002 may contain character constants, extra white space, comments, etc. */
1004 #define ASM_APP_ON "; #APP\n"
1006 /* Output to assembler file text saying following lines
1007 no longer contain unusual constructs. */
1009 #define ASM_APP_OFF "; #NO_APP\n"
1011 #define FILE_ASM_OP "\t.file\n"
1012 #define IDENT_ASM_OP "\t.ident\n"
1014 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */
1015 #define ASM_WORD_OP (TARGET_H8300 ? ".word" : ".long")
1017 /* Output before read-only data. */
1019 #define TEXT_SECTION_ASM_OP "\t.section .text"
1020 #define DATA_SECTION_ASM_OP "\t.section .data"
1021 #define BSS_SECTION_ASM_OP "\t.section .bss"
1022 #define INIT_SECTION_ASM_OP "\t.section .init"
1023 #define CTORS_SECTION_ASM_OP "\t.section .ctors"
1024 #define DTORS_SECTION_ASM_OP "\t.section .dtors"
1026 #define EXTRA_SECTIONS in_ctors, in_dtors
1028 #define EXTRA_SECTION_FUNCTIONS \
1033 if (in_section != in_ctors) \
1035 fprintf (asm_out_file, "%s\n", CTORS_SECTION_ASM_OP); \
1036 in_section = in_ctors; \
1043 if (in_section != in_dtors) \
1045 fprintf (asm_out_file, "%s\n", DTORS_SECTION_ASM_OP); \
1046 in_section = in_dtors; \
1050 #define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \
1051 do { ctors_section(); \
1052 fprintf(FILE, "\t%s\t_%s\n", ASM_WORD_OP, NAME); } while (0)
1054 #define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \
1055 do { dtors_section(); \
1056 fprintf(FILE, "\t%s\t_%s\n", ASM_WORD_OP, NAME); } while (0)
1058 #undef DO_GLOBAL_CTORS_BODY
1059 #define DO_GLOBAL_CTORS_BODY \
1061 typedef (*pfunc)(); \
1062 extern pfunc __ctors[]; \
1063 extern pfunc __ctors_end[]; \
1065 for (p = __ctors_end; p > __ctors; ) \
1071 #undef DO_GLOBAL_DTORS_BODY
1072 #define DO_GLOBAL_DTORS_BODY \
1074 typedef (*pfunc)(); \
1075 extern pfunc __dtors[]; \
1076 extern pfunc __dtors_end[]; \
1078 for (p = __dtors; p < __dtors_end; p++) \
1084 /* How to refer to registers in assembler output.
1085 This sequence is indexed by compiler's hard-register-number (see above). */
1087 #define REGISTER_NAMES \
1088 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "ap"}
1090 #define ADDITIONAL_REGISTER_NAMES { { "r7", 7 } }
1092 /* How to renumber registers for dbx and gdb.
1093 H8/300 needs no change in the numeration. */
1095 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1097 #define SDB_DEBUGGING_INFO
1098 #define SDB_DELIM "\n"
1100 /* Support -gstabs. */
1102 #include "dbxcoff.h"
1104 /* A C statement to output something to the assembler file to switch to section
1105 NAME for object DECL which is either a FUNCTION_DECL, a VAR_DECL or
1106 NULL_TREE. Some target formats do not support arbitrary sections. Do not
1107 define this macro in such cases. */
1109 #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \
1110 fprintf (FILE, "\t.section %s\n", NAME)
1112 /* This is how to output the definition of a user-level label named NAME,
1113 such as the label on a static function or variable NAME. */
1115 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1116 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1118 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)
1120 /* This is how to output a command to make the user-level label named NAME
1121 defined for reference from other files. */
1123 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1124 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1126 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1127 ASM_OUTPUT_LABEL(FILE, NAME)
1129 /* This is how to output a reference to a user-level label named NAME.
1130 `assemble_name' uses this. */
1132 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1133 fprintf (FILE, "_%s", NAME)
1135 /* This is how to output an internal numbered label where
1136 PREFIX is the class of label and NUM is the number within the class. */
1138 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1139 fprintf (FILE, ".%s%d:\n", PREFIX, NUM)
1141 /* This is how to store into the string LABEL
1142 the symbol_ref name of an internal numbered label where
1143 PREFIX is the class of label and NUM is the number within the class.
1144 This is suitable for output with `assemble_name'. */
1146 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1147 sprintf (LABEL, "*.%s%d", PREFIX, NUM)
1149 /* This is how to output an assembler line defining a `double' constant.
1150 It is .dfloat or .gfloat, depending. */
1152 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
1153 do { char dstr[30]; \
1154 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
1155 fprintf (FILE, "\t.double %s\n", dstr); \
1159 /* This is how to output an assembler line defining a `float' constant. */
1160 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
1161 do { char dstr[30]; \
1162 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
1163 fprintf (FILE, "\t.float %s\n", dstr); \
1166 /* This is how to output an assembler line defining an `int' constant. */
1168 #define ASM_OUTPUT_INT(FILE, VALUE) \
1169 ( fprintf (FILE, "\t.long "), \
1170 output_addr_const (FILE, (VALUE)), \
1171 fprintf (FILE, "\n"))
1173 /* Likewise for `char' and `short' constants. */
1175 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
1176 ( fprintf (FILE, "\t.word "), \
1177 output_addr_const (FILE, (VALUE)), \
1178 fprintf (FILE, "\n"))
1180 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
1181 ( fprintf (FILE, "\t.byte "), \
1182 output_addr_const (FILE, (VALUE)), \
1183 fprintf (FILE, "\n"))
1185 /* This is how to output an assembler line for a numeric constant byte. */
1186 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
1187 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1189 /* This is how to output an insn to push a register on the stack.
1190 It need not be very fast code. */
1192 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1193 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO])
1195 /* This is how to output an insn to pop a register from the stack.
1196 It need not be very fast code. */
1198 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1199 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])
1201 /* This is how to output an element of a case-vector that is absolute. */
1203 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1204 asm_fprintf (FILE, "\t%s .L%d\n", ASM_WORD_OP, VALUE)
1206 /* This is how to output an element of a case-vector that is relative. */
1208 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1209 fprintf (FILE, "\t%s .L%d-.L%d\n", ASM_WORD_OP, VALUE, REL)
1211 /* This is how to output an assembler line
1212 that says to advance the location counter
1213 to a multiple of 2**LOG bytes. */
1215 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1217 fprintf (FILE, "\t.align %d\n", (LOG))
1219 /* This is how to output an assembler line
1220 that says to advance the location counter by SIZE bytes. */
1222 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1223 fprintf(FILE, "%s\t \"%s\"\n", IDENT_ASM_OP, NAME)
1225 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1226 fprintf (FILE, "\t.space %d\n", (SIZE))
1228 /* This says how to output an assembler line
1229 to define a global common symbol. */
1231 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1232 ( fputs ("\t.comm ", (FILE)), \
1233 assemble_name ((FILE), (NAME)), \
1234 fprintf ((FILE), ",%d\n", (SIZE)))
1236 /* This says how to output the assembler to define a global
1237 uninitialized but not common symbol.
1238 Try to use asm_output_bss to implement this macro. */
1240 #define ASM_OUTPUT_BSS(FILE, NAME, SIZE, ROUNDED) \
1241 asm_output_bss ((FILE), (NAME), (SIZE), (ROUNDED))
1243 /* This says how to output an assembler line
1244 to define a local common symbol. */
1246 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1247 ( fputs ("\t.lcomm ", (FILE)), \
1248 assemble_name ((FILE), (NAME)), \
1249 fprintf ((FILE), ",%d\n", (SIZE)))
1251 /* Store in OUTPUT a string (made with alloca) containing
1252 an assembler-name for a local static variable named NAME.
1253 LABELNO is an integer which is different for each call. */
1255 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1256 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1257 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1259 /* Define the parentheses used to group arithmetic operations
1260 in assembler code. */
1262 #define ASM_OPEN_PAREN "("
1263 #define ASM_CLOSE_PAREN ")"
1265 /* Define results of standard character escape sequences. */
1266 #define TARGET_BELL 007
1267 #define TARGET_BS 010
1268 #define TARGET_TAB 011
1269 #define TARGET_NEWLINE 012
1270 #define TARGET_VT 013
1271 #define TARGET_FF 014
1272 #define TARGET_CR 015
1274 /* Print an instruction operand X on file FILE.
1275 look in h8300.c for details */
1277 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1280 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
1282 /* Print a memory operand whose address is X, on file FILE.
1283 This uses a function in output-vax.c. */
1285 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1287 /* Define this macro if you want to implement any pragmas. If defined, it
1288 should be a C expression to be executed when #pragma is seen. The
1289 argument STREAM is the stdio input stream from which the source
1290 text can be read. CH is the first character after the #pragma. The
1291 result of the expression is the terminating character found
1292 (newline or EOF). */
1293 #define HANDLE_PRAGMA(FILE, CH) handle_pragma (FILE, CH)
1295 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
1297 /* Define this macro if GNU CC should generate calls to the System V
1298 (and ANSI C) library functions `memcpy' and `memset' rather than
1299 the BSD functions `bcopy' and `bzero'. */
1301 #define TARGET_MEM_FUNCTIONS 1
1303 #define MULHI3_LIBCALL "__mulhi3"
1304 #define DIVHI3_LIBCALL "__divhi3"
1305 #define UDIVHI3_LIBCALL "__udivhi3"
1306 #define MODHI3_LIBCALL "__modhi3"
1307 #define UMODHI3_LIBCALL "__umodhi3"
1309 /* Perform target dependent optabs initialization. */
1311 #define INIT_TARGET_OPTABS \
1313 smul_optab->handlers[(int) HImode].libfunc \
1314 = gen_rtx (SYMBOL_REF, Pmode, MULHI3_LIBCALL); \
1315 sdiv_optab->handlers[(int) HImode].libfunc \
1316 = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \
1317 udiv_optab->handlers[(int) HImode].libfunc \
1318 = gen_rtx (SYMBOL_REF, Pmode, UDIVHI3_LIBCALL); \
1319 smod_optab->handlers[(int) HImode].libfunc \
1320 = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \
1321 umod_optab->handlers[(int) HImode].libfunc \
1322 = gen_rtx (SYMBOL_REF, Pmode, UMODHI3_LIBCALL); \
1325 #define MOVE_RATIO 3
1327 /* Declarations for functions used in insn-output.c. */
1328 char *emit_a_shift ();