507671a86bd9ed97a17eeb7bd877d72a0afbd19d
1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 1992, 1994, 1995, 1996 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs
{
58 int add
; /* cost of an add instruction */
59 int lea
; /* cost of a lea instruction */
60 int shift_var
; /* variable shift costs */
61 int shift_const
; /* constant shift costs */
62 int mult_init
; /* cost of starting a multiply */
63 int mult_bit
; /* cost of multiply per each bit set */
64 int divide
; /* cost of a divide/mod */
67 extern struct processor_costs
*ix86_cost
;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags
;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_486 000000000002 /* 80486 specific */
83 #define MASK_NOTUSED1 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 /* Temporary codegen switches */
91 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
92 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
93 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
94 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
95 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 /* Use the floating point instructions */
98 #define TARGET_80387 (target_flags & MASK_80387)
100 /* Compile using ret insn that pops args.
101 This will not work unless you use prototypes at least
102 for all functions that can take varying numbers of args. */
103 #define TARGET_RTD (target_flags & MASK_RTD)
105 /* Align doubles to a two word boundary. This breaks compatibility with
106 the published ABI's for structures containing doubles, but produces
107 faster code on the pentium. */
108 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
110 /* Put uninitialized locals into bss, not data.
111 Meaningful only on svr3. */
112 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
114 /* Use IEEE floating point comparisons. These handle correctly the cases
115 where the result of a comparison is unordered. Normally SIGFPE is
116 generated in such cases, in which case this isn't needed. */
117 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
119 /* Functions that return a floating point value may return that value
120 in the 387 FPU or in 386 integer registers. If set, this flag causes
121 the 387 to be used, which is compatible with most calling conventions. */
122 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
124 /* Disable generation of FP sin, cos and sqrt operations for 387.
125 This is because FreeBSD lacks these in the math-emulator-code */
126 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
128 /* Temporary switches for tuning code generation */
130 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
131 and division by constants, but sometimes cause reload problems. */
132 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
133 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
135 /* Debug GO_IF_LEGITIMATE_ADDRESS */
136 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
138 /* Debug FUNCTION_ARG macros */
139 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
141 /* Hack macros for tuning code generation */
142 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
143 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
145 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
146 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
147 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
148 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
149 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
150 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386)
151 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
152 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
153 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
154 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM)
155 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
157 #define TARGET_SWITCHES \
158 { { "80387", MASK_80387 }, \
159 { "no-80387", -MASK_80387 }, \
160 { "hard-float", MASK_80387 }, \
161 { "soft-float", -MASK_80387 }, \
162 { "no-soft-float", MASK_80387 }, \
168 { "pentiumpro", 0 }, \
169 { "rtd", MASK_RTD }, \
170 { "no-rtd", -MASK_RTD }, \
171 { "align-double", MASK_ALIGN_DOUBLE }, \
172 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
173 { "svr3-shlib", MASK_SVR3_SHLIB }, \
174 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
175 { "ieee-fp", MASK_IEEE_FP }, \
176 { "no-ieee-fp", -MASK_IEEE_FP }, \
177 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
178 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
179 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
180 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
181 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
182 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
183 { "debug-addr", MASK_DEBUG_ADDR }, \
184 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
185 { "move", -MASK_NO_MOVE }, \
186 { "no-move", MASK_NO_MOVE }, \
187 { "debug-arg", MASK_DEBUG_ARG }, \
188 { "no-debug-arg", -MASK_DEBUG_ARG }, \
190 { "", TARGET_DEFAULT}}
192 /* Which processor to schedule for. The cpu attribute defines a list that
193 mirrors this list, so changes to i386.md must be made at the same time. */
196 {PROCESSOR_I386
, /* 80386 */
197 PROCESSOR_I486
, /* 80486DX, 80486SX, 80486DX[24] */
199 PROCESSOR_PENTIUMPRO
};
201 #define PROCESSOR_I386_STRING "i386"
202 #define PROCESSOR_I486_STRING "i486"
203 #define PROCESSOR_I586_STRING "i586"
204 #define PROCESSOR_PENTIUM_STRING "pentium"
205 #define PROCESSOR_I686_STRING "i686"
206 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
208 extern enum processor_type ix86_cpu
;
210 /* Define generic processor types based upon current deployment. */
211 #define PROCESSOR_COMMON PROCESSOR_I386
212 #define PROCESSOR_COMMON_STRING PROCESSOR_I386_STRING
214 /* Define the default processor. This is overridden by other tm.h files. */
215 #define PROCESSOR_DEFAULT \
216 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
218 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
219 ? PROCESSOR_PENTIUM \
220 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
221 ? PROCESSOR_PENTIUMPRO \
223 #define PROCESSOR_DEFAULT_STRING \
224 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
225 ? PROCESSOR_I486_STRING \
226 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
227 ? PROCESSOR_PENTIUM_STRING \
228 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
229 ? PROCESSOR_PENTIUMPRO_STRING \
230 : PROCESSOR_I386_STRING
232 /* This macro is similar to `TARGET_SWITCHES' but defines names of
233 command options that have values. Its definition is an
234 initializer with a subgrouping for each command option.
236 Each subgrouping contains a string constant, that defines the
237 fixed part of the option name, and the address of a variable. The
238 variable, type `char *', is set to the variable part of the given
239 option if the fixed part matches. The actual option name is made
240 by appending `-m' to the specified name. */
241 #define TARGET_OPTIONS \
242 { { "cpu=", &ix86_cpu_string}, \
243 { "arch=", &ix86_isa_string}, \
244 { "reg-alloc=", &i386_reg_alloc_order }, \
245 { "regparm=", &i386_regparm_string }, \
246 { "align-loops=", &i386_align_loops_string }, \
247 { "align-jumps=", &i386_align_jumps_string }, \
248 { "align-functions=", &i386_align_funcs_string }, \
252 /* Sometimes certain combinations of command options do not make
253 sense on a particular target machine. You can define a macro
254 `OVERRIDE_OPTIONS' to take account of this. This macro, if
255 defined, is executed once just after all the command options have
258 Don't use this macro to turn on various extra optimizations for
259 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
261 #define OVERRIDE_OPTIONS override_options ()
263 /* These are meant to be redefined in the host dependent files */
264 #define SUBTARGET_SWITCHES
265 #define SUBTARGET_OPTIONS
267 /* Define this to change the optimizations performed by default. */
268 #define OPTIMIZATION_OPTIONS(LEVEL) optimization_options(LEVEL)
270 /* Specs for the compiler proper */
276 %{mno-486:-mcpu=i386} \
277 %{mno-pentium:-mcpu=i386} \
278 %{mno-pentiumpro:-mcpu=i386} \
280 %{mno-386:-mcpu=i486} \
281 %{mpentium:-mcpu=pentium} \
282 %{mpentiumpro:-mcpu=pentiumpro}}"
285 /* target machine storage layout */
287 /* Define for XFmode extended real floating point support.
288 This will automatically cause REAL_ARITHMETIC to be defined. */
289 #define LONG_DOUBLE_TYPE_SIZE 96
291 /* Define if you don't want extended real, but do want to use the
292 software floating point emulator for REAL_ARITHMETIC and
293 decimal <-> binary conversion. */
294 /* #define REAL_ARITHMETIC */
296 /* Define this if most significant byte of a word is the lowest numbered. */
297 /* That is true on the 80386. */
299 #define BITS_BIG_ENDIAN 0
301 /* Define this if most significant byte of a word is the lowest numbered. */
302 /* That is not true on the 80386. */
303 #define BYTES_BIG_ENDIAN 0
305 /* Define this if most significant word of a multiword number is the lowest
307 /* Not true for 80386 */
308 #define WORDS_BIG_ENDIAN 0
310 /* number of bits in an addressable storage unit */
311 #define BITS_PER_UNIT 8
313 /* Width in bits of a "word", which is the contents of a machine register.
314 Note that this is not necessarily the width of data type `int';
315 if using 16-bit ints on a 80386, this would still be 32.
316 But on a machine with 16-bit registers, this would be 16. */
317 #define BITS_PER_WORD 32
319 /* Width of a word, in units (bytes). */
320 #define UNITS_PER_WORD 4
322 /* Width in bits of a pointer.
323 See also the macro `Pmode' defined below. */
324 #define POINTER_SIZE 32
326 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
327 #define PARM_BOUNDARY 32
329 /* Boundary (in *bits*) on which stack pointer should be aligned. */
330 #define STACK_BOUNDARY 32
332 /* Allocation boundary (in *bits*) for the code of a function.
333 For i486, we get better performance by aligning to a cache
334 line (i.e. 16 byte) boundary. */
335 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
337 /* Alignment of field after `int : 0' in a structure. */
339 #define EMPTY_FIELD_BOUNDARY 32
341 /* Minimum size in bits of the largest boundary to which any
342 and all fundamental data types supported by the hardware
343 might need to be aligned. No data type wants to be aligned
344 rounder than this. The i386 supports 64-bit floating point
345 quantities, but these can be aligned on any 32-bit boundary.
346 The published ABIs say that doubles should be aligned on word
347 boundaries, but the Pentium gets better performance with them
348 aligned on 64 bit boundaries. */
349 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
351 /* align DFmode constants and nonaggregates */
352 #define ALIGN_DFmode (!TARGET_386)
354 /* Set this non-zero if move instructions will actually fail to work
355 when given unaligned data. */
356 #define STRICT_ALIGNMENT 0
358 /* If bit field type is int, don't let it cross an int,
359 and give entire struct the alignment of an int. */
360 /* Required on the 386 since it doesn't have bitfield insns. */
361 #define PCC_BITFIELD_TYPE_MATTERS 1
363 /* Maximum power of 2 that code can be aligned to. */
364 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
366 /* Align loop starts for optimal branching. */
367 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
369 /* This is how to align an instruction for optimal branching.
370 On i486 we'll get better performance by aligning on a
371 cache line (i.e. 16 byte) boundary. */
372 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
375 /* Standard register usage. */
377 /* This processor has special stack-like registers. See reg-stack.c
381 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
383 /* Number of actual hardware registers.
384 The hardware registers are assigned numbers for the compiler
385 from 0 to just below FIRST_PSEUDO_REGISTER.
386 All registers that the compiler knows about must be given numbers,
387 even those that are not normally considered general registers.
389 In the 80386 we give the 8 general purpose registers the numbers 0-7.
390 We number the floating point registers 8-15.
391 Note that registers 0-7 can be accessed as a short or int,
392 while only 0-3 may be used with byte `mov' instructions.
394 Reg 16 does not correspond to any hardware register, but instead
395 appears in the RTL as an argument pointer prior to reload, and is
396 eliminated during reloading in favor of either the stack or frame
399 #define FIRST_PSEUDO_REGISTER 17
401 /* 1 for registers that have pervasive standard uses
402 and are not available for the register allocator.
403 On the 80386, the stack pointer is such, as is the arg pointer. */
404 #define FIXED_REGISTERS \
405 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
406 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
408 /* 1 for registers not available across function calls.
409 These must include the FIXED_REGISTERS and also any
410 registers that can be used without being saved.
411 The latter must include the registers where values are returned
412 and the register where structure-value addresses are passed.
413 Aside from that, you can include as many other registers as you like. */
415 #define CALL_USED_REGISTERS \
416 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
417 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
419 /* Order in which to allocate registers. Each register must be
420 listed once, even those in FIXED_REGISTERS. List frame pointer
421 late and fixed registers last. Note that, in general, we prefer
422 registers listed in CALL_USED_REGISTERS, keeping the others
423 available for storage of persistent values.
425 Three different versions of REG_ALLOC_ORDER have been tried:
427 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
428 but slower code on simple functions returning values in eax.
430 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
431 perl 4.036 due to not being able to create a DImode register (to hold a 2
434 If the order is eax, edx, ecx, ... it produces better code for simple
435 functions, and a slightly slower compiler. Users complained about the code
436 generated by allocating edx first, so restore the 'natural' order of things. */
438 #define REG_ALLOC_ORDER \
439 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
440 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
442 /* A C statement (sans semicolon) to choose the order in which to
443 allocate hard registers for pseudo-registers local to a basic
446 Store the desired register order in the array `reg_alloc_order'.
447 Element 0 should be the register to allocate first; element 1, the
448 next register; and so on.
450 The macro body should not assume anything about the contents of
451 `reg_alloc_order' before execution of the macro.
453 On most machines, it is not necessary to define this macro. */
455 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
457 /* Macro to conditionally modify fixed_regs/call_used_regs. */
458 #define CONDITIONAL_REGISTER_USAGE \
462 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
463 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
465 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
469 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
470 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
471 if (TEST_HARD_REG_BIT (x, i)) \
472 fixed_regs[i] = call_used_regs[i] = 1; \
476 /* Return number of consecutive hard regs needed starting at reg REGNO
477 to hold something of mode MODE.
478 This is ordinarily the length in words of a value of mode MODE
479 but can be less for certain modes in special long registers.
481 Actually there are no two word move instructions for consecutive
482 registers. And only registers 0-3 may have mov byte instructions
486 #define HARD_REGNO_NREGS(REGNO, MODE) \
487 (FP_REGNO_P (REGNO) ? 1 \
488 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
490 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
491 On the 80386, the first 4 cpu registers can hold any mode
492 while the floating point registers may hold only floating point.
493 Make it clear that the fp regs could not hold a 16-byte float. */
495 /* The casts to int placate a compiler on a microvax,
496 for cross-compiler testing. */
498 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
501 : FP_REGNO_P (REGNO) \
502 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
503 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
504 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
505 : (int) (MODE) != (int) QImode ? 1 \
506 : (reload_in_progress | reload_completed) == 1)
508 /* Value is 1 if it is a good idea to tie two pseudo registers
509 when one has mode MODE1 and one has mode MODE2.
510 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
511 for any hard reg, then this must be 0 for correct output. */
513 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
515 /* Specify the registers used for certain standard purposes.
516 The values of these macros are register numbers. */
518 /* on the 386 the pc register is %eip, and is not usable as a general
519 register. The ordinary mov instructions won't work */
520 /* #define PC_REGNUM */
522 /* Register to use for pushing function arguments. */
523 #define STACK_POINTER_REGNUM 7
525 /* Base register for access to local variables of the function. */
526 #define FRAME_POINTER_REGNUM 6
528 /* First floating point reg */
529 #define FIRST_FLOAT_REG 8
531 /* First & last stack-like regs */
532 #define FIRST_STACK_REG FIRST_FLOAT_REG
533 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
535 /* Value should be nonzero if functions must have frame pointers.
536 Zero means the frame pointer need not be set up (and parms
537 may be accessed via the stack pointer) in functions that seem suitable.
538 This is computed in `reload', in reload1.c. */
539 #define FRAME_POINTER_REQUIRED 0
541 /* Base register for access to arguments of the function. */
542 #define ARG_POINTER_REGNUM 16
544 /* Register in which static-chain is passed to a function. */
545 #define STATIC_CHAIN_REGNUM 2
547 /* Register to hold the addressing base for position independent
548 code access to data items. */
549 #define PIC_OFFSET_TABLE_REGNUM 3
551 /* Register in which address to store a structure value
552 arrives in the function. On the 386, the prologue
553 copies this from the stack to register %eax. */
554 #define STRUCT_VALUE_INCOMING 0
556 /* Place in which caller passes the structure value address.
557 0 means push the value on the stack like an argument. */
558 #define STRUCT_VALUE 0
560 /* A C expression which can inhibit the returning of certain function
561 values in registers, based on the type of value. A nonzero value
562 says to return the function value in memory, just as large
563 structures are always returned. Here TYPE will be a C expression
564 of type `tree', representing the data type of the value.
566 Note that values of mode `BLKmode' must be explicitly handled by
567 this macro. Also, the option `-fpcc-struct-return' takes effect
568 regardless of this macro. On most systems, it is possible to
569 leave the macro undefined; this causes a default definition to be
570 used, whose value is the constant 1 for `BLKmode' values, and 0
573 Do not use this macro to indicate that structures and unions
574 should always be returned in memory. You should instead use
575 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
577 #define RETURN_IN_MEMORY(TYPE) \
578 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
581 /* Define the classes of registers for register constraints in the
582 machine description. Also define ranges of constants.
584 One of the classes must always be named ALL_REGS and include all hard regs.
585 If there is more than one class, another class must be named NO_REGS
586 and contain no registers.
588 The name GENERAL_REGS must be the name of a class (or an alias for
589 another name such as ALL_REGS). This is the class of registers
590 that is allowed by "g" or "r" in a register constraint.
591 Also, registers outside this class are allocated only when
592 instructions express preferences for them.
594 The classes must be numbered in nondecreasing order; that is,
595 a larger-numbered class must never be contained completely
596 in a smaller-numbered class.
598 For any two classes, it is very desirable that there be another
599 class that represents their union.
601 It might seem that class BREG is unnecessary, since no useful 386
602 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
603 and the "b" register constraint is useful in asms for syscalls. */
608 AREG
, DREG
, CREG
, BREG
,
609 AD_REGS
, /* %eax/%edx for DImode */
610 Q_REGS
, /* %eax %ebx %ecx %edx */
612 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
613 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
614 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
616 ALL_REGS
, LIM_REG_CLASSES
619 #define N_REG_CLASSES (int) LIM_REG_CLASSES
621 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
623 /* Give names of register classes as strings for dump file. */
625 #define REG_CLASS_NAMES \
627 "AREG", "DREG", "CREG", "BREG", \
633 "FP_TOP_REG", "FP_SECOND_REG", \
637 /* Define which registers fit in which classes.
638 This is an initializer for a vector of HARD_REG_SET
639 of length N_REG_CLASSES. */
641 #define REG_CLASS_CONTENTS \
643 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
646 0x10, 0x20, /* SIREG, DIREG */ \
647 0x7f, /* INDEX_REGS */ \
648 0x100ff, /* GENERAL_REGS */ \
649 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
650 0xff00, /* FLOAT_REGS */ \
653 /* The same information, inverted:
654 Return the class number of the smallest class containing
655 reg number REGNO. This could be a conditional expression
656 or could index an array. */
658 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
660 /* When defined, the compiler allows registers explicitly used in the
661 rtl to be used as spill registers but prevents the compiler from
662 extending the lifetime of these registers. */
664 #define SMALL_REGISTER_CLASSES
666 #define QI_REG_P(X) \
667 (REG_P (X) && REGNO (X) < 4)
668 #define NON_QI_REG_P(X) \
669 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
671 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
672 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
674 #define STACK_REG_P(xop) (REG_P (xop) && \
675 REGNO (xop) >= FIRST_STACK_REG && \
676 REGNO (xop) <= LAST_STACK_REG)
678 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
680 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
682 /* Try to maintain the accuracy of the death notes for regs satisfying the
683 following. Important for stack like regs, to know when to pop. */
685 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
687 /* 1 if register REGNO can magically overlap other regs.
688 Note that nonzero values work only in very special circumstances. */
690 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
692 /* The class value for index registers, and the one for base regs. */
694 #define INDEX_REG_CLASS INDEX_REGS
695 #define BASE_REG_CLASS GENERAL_REGS
697 /* Get reg_class from a letter such as appears in the machine description. */
699 #define REG_CLASS_FROM_LETTER(C) \
700 ((C) == 'r' ? GENERAL_REGS : \
701 (C) == 'q' ? Q_REGS : \
702 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
705 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
708 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
711 (C) == 'a' ? AREG : \
712 (C) == 'b' ? BREG : \
713 (C) == 'c' ? CREG : \
714 (C) == 'd' ? DREG : \
715 (C) == 'A' ? AD_REGS : \
716 (C) == 'D' ? DIREG : \
717 (C) == 'S' ? SIREG : NO_REGS)
719 /* The letters I, J, K, L and M in a register constraint string
720 can be used to stand for particular ranges of immediate operands.
721 This macro defines what the ranges are.
722 C is the letter, and VALUE is a constant value.
723 Return 1 if VALUE is in the range specified by C.
725 I is for non-DImode shifts.
726 J is for DImode shifts.
727 K and L are for an `andsi' optimization.
728 M is for shifts that can be executed by the "lea" opcode.
731 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
732 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
733 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
734 (C) == 'K' ? (VALUE) == 0xff : \
735 (C) == 'L' ? (VALUE) == 0xffff : \
736 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
737 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
738 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
741 /* Similar, but for floating constants, and defining letters G and H.
742 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
743 TARGET_387 isn't set, because the stack register converter may need to
744 load 0.0 into the function value register. */
746 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
747 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
749 /* Place additional restrictions on the register class to use when it
750 is necessary to be able to hold a value of mode MODE in a reload
751 register for which class CLASS would ordinarily be used. */
753 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
754 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
757 /* Given an rtx X being reloaded into a reg required to be
758 in class CLASS, return the class of reg to actually use.
759 In general this is just CLASS; but on some machines
760 in some cases it is preferable to use a more restrictive class.
761 On the 80386 series, we prevent floating constants from being
762 reloaded into floating registers (since no move-insn can do that)
763 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
765 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
766 QImode must go into class Q_REGS.
767 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
768 movdf to do mem-to-mem moves through integer regs. */
770 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
771 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
772 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
773 : ((CLASS) == ALL_REGS \
774 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
777 /* If we are copying between general and FP registers, we need a memory
780 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
781 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
782 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
784 /* Return the maximum number of consecutive registers
785 needed to represent mode MODE in a register of class CLASS. */
786 /* On the 80386, this is the size of MODE in words,
787 except in the FP regs, where a single reg is always enough. */
788 #define CLASS_MAX_NREGS(CLASS, MODE) \
789 (FLOAT_CLASS_P (CLASS) ? 1 : \
790 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
792 /* A C expression whose value is nonzero if pseudos that have been
793 assigned to registers of class CLASS would likely be spilled
794 because registers of CLASS are needed for spill registers.
796 The default value of this macro returns 1 if CLASS has exactly one
797 register and zero otherwise. On most machines, this default
798 should be used. Only define this macro to some other expression
799 if pseudo allocated by `local-alloc.c' end up in memory because
800 their hard registers were needed for spill registers. If this
801 macro returns nonzero for those classes, those pseudos will only
802 be allocated by `global.c', which knows how to reallocate the
803 pseudo to another register. If there would not be another
804 register available for reallocation, you should not change the
805 definition of this macro since the only effect of such a
806 definition would be to slow down register allocation. */
808 #define CLASS_LIKELY_SPILLED_P(CLASS) \
810 || ((CLASS) == DREG) \
811 || ((CLASS) == CREG) \
812 || ((CLASS) == BREG) \
813 || ((CLASS) == AD_REGS) \
814 || ((CLASS) == SIREG) \
815 || ((CLASS) == DIREG))
818 /* Stack layout; function entry, exit and calling. */
820 /* Define this if pushing a word on the stack
821 makes the stack pointer a smaller address. */
822 #define STACK_GROWS_DOWNWARD
824 /* Define this if the nominal address of the stack frame
825 is at the high-address end of the local variables;
826 that is, each additional local variable allocated
827 goes at a more negative offset in the frame. */
828 #define FRAME_GROWS_DOWNWARD
830 /* Offset within stack frame to start allocating local variables at.
831 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
832 first local allocated. Otherwise, it is the offset to the BEGINNING
833 of the first local allocated. */
834 #define STARTING_FRAME_OFFSET 0
836 /* If we generate an insn to push BYTES bytes,
837 this says how many the stack pointer really advances by.
838 On 386 pushw decrements by exactly 2 no matter what the position was.
839 On the 386 there is no pushb; we use pushw instead, and this
840 has the effect of rounding up to 2. */
842 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
844 /* Offset of first parameter from the argument pointer register value. */
845 #define FIRST_PARM_OFFSET(FNDECL) 0
847 /* Value is the number of bytes of arguments automatically
848 popped when returning from a subroutine call.
849 FUNDECL is the declaration node of the function (as a tree),
850 FUNTYPE is the data type of the function (as a tree),
851 or for a library call it is an identifier node for the subroutine name.
852 SIZE is the number of bytes of arguments passed on the stack.
854 On the 80386, the RTD insn may be used to pop them if the number
855 of args is fixed, but if the number is variable then the caller
856 must pop them all. RTD can't be used for library calls now
857 because the library is compiled with the Unix compiler.
858 Use of RTD is a selectable option, since it is incompatible with
859 standard Unix calling sequences. If the option is not selected,
860 the caller must always pop the args.
862 The attribute stdcall is equivalent to RTD on a per module basis. */
864 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
865 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
867 /* Define how to find the value returned by a function.
868 VALTYPE is the data type of the value (as a tree).
869 If the precise function being called is known, FUNC is its FUNCTION_DECL;
870 otherwise, FUNC is 0. */
871 #define FUNCTION_VALUE(VALTYPE, FUNC) \
872 gen_rtx (REG, TYPE_MODE (VALTYPE), \
873 VALUE_REGNO (TYPE_MODE (VALTYPE)))
875 /* Define how to find the value returned by a library function
876 assuming the value has mode MODE. */
878 #define LIBCALL_VALUE(MODE) \
879 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
881 /* Define the size of the result block used for communication between
882 untyped_call and untyped_return. The block contains a DImode value
883 followed by the block used by fnsave and frstor. */
885 #define APPLY_RESULT_SIZE (8+108)
887 /* 1 if N is a possible register number for function argument passing. */
888 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
890 /* Define a data type for recording info about an argument list
891 during the scan of that argument list. This data type should
892 hold all necessary information about the function itself
893 and about the args processed so far, enough to enable macros
894 such as FUNCTION_ARG to determine where the next arg should go. */
896 typedef struct i386_args
{
897 int words
; /* # words passed so far */
898 int nregs
; /* # registers available for passing */
899 int regno
; /* next available register number */
902 /* Initialize a variable CUM of type CUMULATIVE_ARGS
903 for a call to a function whose data type is FNTYPE.
904 For a library call, FNTYPE is 0. */
906 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
907 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
909 /* Update the data in CUM to advance over an argument
910 of mode MODE and data type TYPE.
911 (TYPE is null for libcalls where that information may not be available.) */
913 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
914 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
916 /* Define where to put the arguments to a function.
917 Value is zero to push the argument on the stack,
918 or a hard register in which to store the argument.
920 MODE is the argument's machine mode.
921 TYPE is the data type of the argument (as a tree).
922 This is null for libcalls where that information may
924 CUM is a variable of type CUMULATIVE_ARGS which gives info about
925 the preceding args and about the function being called.
926 NAMED is nonzero if this argument is a named parameter
927 (otherwise it is an extra parameter matching an ellipsis). */
929 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
930 (function_arg (&CUM, MODE, TYPE, NAMED))
932 /* For an arg passed partly in registers and partly in memory,
933 this is the number of registers used.
934 For args passed entirely in registers or entirely in memory, zero. */
936 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
937 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
939 /* This macro generates the assembly code for function entry.
940 FILE is a stdio stream to output the code to.
941 SIZE is an int: how many units of temporary storage to allocate.
942 Refer to the array `regs_ever_live' to determine which registers
943 to save; `regs_ever_live[I]' is nonzero if register number I
944 is ever used in the function. This macro is responsible for
945 knowing which registers should not be saved even if used. */
947 #define FUNCTION_PROLOGUE(FILE, SIZE) \
948 function_prologue (FILE, SIZE)
950 /* Output assembler code to FILE to increment profiler label # LABELNO
951 for profiling a function entry. */
953 #define FUNCTION_PROFILER(FILE, LABELNO) \
957 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
958 LPREFIX, (LABELNO)); \
959 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
963 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
964 fprintf (FILE, "\tcall _mcount\n"); \
969 /* There are three profiling modes for basic blocks available.
970 The modes are selected at compile time by using the options
971 -a or -ax of the gnu compiler.
972 The variable `profile_block_flag' will be set according to the
975 profile_block_flag == 0, no option used:
979 profile_block_flag == 1, -a option used.
981 Count frequency of execution of every basic block.
983 profile_block_flag == 2, -ax option used.
985 Generate code to allow several different profiling modes at run time.
987 Produce a trace of all basic blocks.
988 Count frequency of jump instructions executed.
989 In every mode it is possible to start profiling upon entering
990 certain functions and to disable profiling of some other functions.
992 The result of basic-block profiling will be written to a file `bb.out'.
993 If the -ax option is used parameters for the profiling will be read
998 /* The following macro shall output assembler code to FILE
999 to initialize basic-block profiling.
1001 If profile_block_flag == 2
1003 Output code to call the subroutine `__bb_init_trace_func'
1004 and pass two parameters to it. The first parameter is
1005 the address of a block allocated in the object module.
1006 The second parameter is the number of the first basic block
1009 The name of the block is a local symbol made with this statement:
1011 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1013 Of course, since you are writing the definition of
1014 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1015 can take a short cut in the definition of this macro and use the
1016 name that you know will result.
1018 The number of the first basic block of the function is
1019 passed to the macro in BLOCK_OR_LABEL.
1021 If described in a virtual assembler language the code to be
1025 parameter2 <- BLOCK_OR_LABEL
1026 call __bb_init_trace_func
1028 else if profile_block_flag != 0
1030 Output code to call the subroutine `__bb_init_func'
1031 and pass one single parameter to it, which is the same
1032 as the first parameter to `__bb_init_trace_func'.
1034 The first word of this parameter is a flag which will be nonzero if
1035 the object module has already been initialized. So test this word
1036 first, and do not call `__bb_init_func' if the flag is nonzero.
1037 Note: When profile_block_flag == 2 the test need not be done
1038 but `__bb_init_trace_func' *must* be called.
1040 BLOCK_OR_LABEL may be used to generate a label number as a
1041 branch destination in case `__bb_init_func' will not be called.
1043 If described in a virtual assembler language the code to be
1054 #undef FUNCTION_BLOCK_PROFILER
1055 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1058 static int num_func = 0; \
1060 char block_table[80], false_label[80]; \
1062 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1064 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1065 xops[5] = stack_pointer_rtx; \
1066 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1068 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1070 switch (profile_block_flag) \
1075 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1076 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
1077 xops[6] = GEN_INT (8); \
1079 output_asm_insn (AS1(push%L2,%2), xops); \
1081 output_asm_insn (AS1(push%L1,%1), xops); \
1084 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1085 output_asm_insn (AS1 (push%L7,%7), xops); \
1088 output_asm_insn (AS1(call,%P3), xops); \
1089 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1095 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1097 xops[0] = const0_rtx; \
1098 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
1099 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
1100 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
1101 xops[6] = GEN_INT (4); \
1103 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1105 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1106 output_asm_insn (AS1(jne,%2), xops); \
1109 output_asm_insn (AS1(push%L1,%1), xops); \
1112 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1113 output_asm_insn (AS1 (push%L7,%7), xops); \
1116 output_asm_insn (AS1(call,%P3), xops); \
1117 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1118 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1127 /* The following macro shall output assembler code to FILE
1128 to increment a counter associated with basic block number BLOCKNO.
1130 If profile_block_flag == 2
1132 Output code to initialize the global structure `__bb' and
1133 call the function `__bb_trace_func' which will increment the
1136 `__bb' consists of two words. In the first word the number
1137 of the basic block has to be stored. In the second word
1138 the address of a block allocated in the object module
1141 The basic block number is given by BLOCKNO.
1143 The address of the block is given by the label created with
1145 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1147 by FUNCTION_BLOCK_PROFILER.
1149 Of course, since you are writing the definition of
1150 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1151 can take a short cut in the definition of this macro and use the
1152 name that you know will result.
1154 If described in a virtual assembler language the code to be
1157 move BLOCKNO -> (__bb)
1158 move LPBX0 -> (__bb+4)
1159 call __bb_trace_func
1161 Note that function `__bb_trace_func' must not change the
1162 machine state, especially the flag register. To grant
1163 this, you must output code to save and restore registers
1164 either in this macro or in the macros MACHINE_STATE_SAVE
1165 and MACHINE_STATE_RESTORE. The last two macros will be
1166 used in the function `__bb_trace_func', so you must make
1167 sure that the function prologue does not change any
1168 register prior to saving it with MACHINE_STATE_SAVE.
1170 else if profile_block_flag != 0
1172 Output code to increment the counter directly.
1173 Basic blocks are numbered separately from zero within each
1174 compiled object module. The count associated with block number
1175 BLOCKNO is at index BLOCKNO in an array of words; the name of
1176 this array is a local symbol made with this statement:
1178 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1180 Of course, since you are writing the definition of
1181 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1182 can take a short cut in the definition of this macro and use the
1183 name that you know will result.
1185 If described in a virtual assembler language the code to be
1188 inc (LPBX2+4*BLOCKNO)
1192 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1195 rtx xops[8], cnt_rtx; \
1197 char *block_table = counts; \
1199 switch (profile_block_flag) \
1204 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1206 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1207 xops[2] = GEN_INT ((BLOCKNO)); \
1208 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
1209 xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
1210 xops[5] = plus_constant (xops[4], 4); \
1211 xops[0] = gen_rtx (MEM, SImode, xops[4]); \
1212 xops[6] = gen_rtx (MEM, SImode, xops[5]); \
1214 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1216 fprintf(FILE, "\tpushf\n"); \
1217 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1220 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1221 output_asm_insn (AS1(push%L7,%7), xops); \
1222 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1223 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1224 output_asm_insn (AS1(pop%L7,%7), xops); \
1227 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1228 output_asm_insn (AS1(call,%P3), xops); \
1229 fprintf(FILE, "\tpopf\n"); \
1235 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1236 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
1237 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1240 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1243 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
1245 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
1246 output_asm_insn (AS1(inc%L0,%0), xops); \
1254 /* The following macro shall output assembler code to FILE
1255 to indicate a return from function during basic-block profiling.
1257 If profiling_block_flag == 2:
1259 Output assembler code to call function `__bb_trace_ret'.
1261 Note that function `__bb_trace_ret' must not change the
1262 machine state, especially the flag register. To grant
1263 this, you must output code to save and restore registers
1264 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1265 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1266 used in the function `__bb_trace_ret', so you must make
1267 sure that the function prologue does not change any
1268 register prior to saving it with MACHINE_STATE_SAVE_RET.
1270 else if profiling_block_flag != 0:
1272 The macro will not be used, so it need not distinguish
1276 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1281 xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
1283 output_asm_insn (AS1(call,%P0), xops); \
1288 /* The function `__bb_trace_func' is called in every basic block
1289 and is not allowed to change the machine state. Saving (restoring)
1290 the state can either be done in the BLOCK_PROFILER macro,
1291 before calling function (rsp. after returning from function)
1292 `__bb_trace_func', or it can be done inside the function by
1293 defining the macros:
1295 MACHINE_STATE_SAVE(ID)
1296 MACHINE_STATE_RESTORE(ID)
1298 In the latter case care must be taken, that the prologue code
1299 of function `__bb_trace_func' does not already change the
1300 state prior to saving it with MACHINE_STATE_SAVE.
1302 The parameter `ID' is a string identifying a unique macro use.
1304 On the i386 the initialization code at the begin of
1305 function `__bb_trace_func' contains a `sub' instruction
1306 therefore we handle save and restore of the flag register
1307 in the BLOCK_PROFILER macro. */
1309 #define MACHINE_STATE_SAVE(ID) \
1310 asm (" pushl %eax"); \
1311 asm (" pushl %ecx"); \
1312 asm (" pushl %edx"); \
1313 asm (" pushl %esi");
1315 #define MACHINE_STATE_RESTORE(ID) \
1316 asm (" popl %esi"); \
1317 asm (" popl %edx"); \
1318 asm (" popl %ecx"); \
1321 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1322 the stack pointer does not matter. The value is tested only in
1323 functions that have frame pointers.
1324 No definition is equivalent to always zero. */
1325 /* Note on the 386 it might be more efficient not to define this since
1326 we have to restore it ourselves from the frame pointer, in order to
1329 #define EXIT_IGNORE_STACK 1
1331 /* This macro generates the assembly code for function exit,
1332 on machines that need it. If FUNCTION_EPILOGUE is not defined
1333 then individual return instructions are generated for each
1334 return statement. Args are same as for FUNCTION_PROLOGUE.
1336 The function epilogue should not depend on the current stack pointer!
1337 It should use the frame pointer only. This is mandatory because
1338 of alloca; we also take advantage of it to omit stack adjustments
1341 If the last non-note insn in the function is a BARRIER, then there
1342 is no need to emit a function prologue, because control does not fall
1343 off the end. This happens if the function ends in an "exit" call, or
1344 if a `return' insn is emitted directly into the function. */
1346 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1348 rtx last = get_last_insn (); \
1349 if (last && GET_CODE (last) == NOTE) \
1350 last = prev_nonnote_insn (last); \
1351 if (! last || GET_CODE (last) != BARRIER) \
1352 function_epilogue (FILE, SIZE); \
1355 /* Output assembler code for a block containing the constant parts
1356 of a trampoline, leaving space for the variable parts. */
1358 /* On the 386, the trampoline contains three instructions:
1362 #define TRAMPOLINE_TEMPLATE(FILE) \
1364 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1365 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1366 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1367 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1368 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1369 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1370 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1371 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1374 /* Length in units of the trampoline for entering a nested function. */
1376 #define TRAMPOLINE_SIZE 12
1378 /* Emit RTL insns to initialize the variable parts of a trampoline.
1379 FNADDR is an RTX for the address of the function's pure code.
1380 CXT is an RTX for the static chain value for the function. */
1382 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1384 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1385 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1388 /* Definitions for register eliminations.
1390 This is an array of structures. Each structure initializes one pair
1391 of eliminable registers. The "from" register number is given first,
1392 followed by "to". Eliminations of the same "from" register are listed
1393 in order of preference.
1395 We have two registers that can be eliminated on the i386. First, the
1396 frame pointer register can often be eliminated in favor of the stack
1397 pointer register. Secondly, the argument pointer register can always be
1398 eliminated; it is replaced with either the stack or frame pointer. */
1400 #define ELIMINABLE_REGS \
1401 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1402 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1403 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1405 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1406 Frame pointer elimination is automatically handled.
1408 For the i386, if frame pointer elimination is being done, we would like to
1409 convert ap into sp, not fp.
1411 All other eliminations are valid. */
1413 #define CAN_ELIMINATE(FROM, TO) \
1414 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1415 ? ! frame_pointer_needed \
1418 /* Define the offset between two registers, one to be eliminated, and the other
1419 its replacement, at the start of a routine. */
1421 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1423 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1424 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1430 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1431 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1432 || (current_function_uses_pic_offset_table \
1433 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1436 (OFFSET) = offset + get_frame_size (); \
1438 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1439 (OFFSET) += 4; /* Skip saved PC */ \
1443 /* Addressing modes, and classification of registers for them. */
1445 /* #define HAVE_POST_INCREMENT */
1446 /* #define HAVE_POST_DECREMENT */
1448 /* #define HAVE_PRE_DECREMENT */
1449 /* #define HAVE_PRE_INCREMENT */
1451 /* Macros to check register numbers against specific register classes. */
1453 /* These assume that REGNO is a hard or pseudo reg number.
1454 They give nonzero only if REGNO is a hard reg of the suitable class
1455 or a pseudo reg currently allocated to a suitable hard reg.
1456 Since they use reg_renumber, they are safe only once reg_renumber
1457 has been allocated, which happens in local-alloc.c. */
1459 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1460 ((REGNO) < STACK_POINTER_REGNUM \
1461 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1463 #define REGNO_OK_FOR_BASE_P(REGNO) \
1464 ((REGNO) <= STACK_POINTER_REGNUM \
1465 || (REGNO) == ARG_POINTER_REGNUM \
1466 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1468 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1469 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1471 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1472 and check its validity for a certain class.
1473 We have two alternate definitions for each of them.
1474 The usual definition accepts all pseudo regs; the other rejects
1475 them unless they have been allocated suitable hard regs.
1476 The symbol REG_OK_STRICT causes the latter definition to be used.
1478 Most source files want to accept pseudo regs in the hope that
1479 they will get allocated to the class that the insn wants them to be in.
1480 Source files for reload pass need to be strict.
1481 After reload, it makes no difference, since pseudo regs have
1482 been eliminated by then. */
1485 /* Non strict versions, pseudos are ok */
1486 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1487 (REGNO (X) < STACK_POINTER_REGNUM \
1488 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1490 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1491 (REGNO (X) <= STACK_POINTER_REGNUM \
1492 || REGNO (X) == ARG_POINTER_REGNUM \
1493 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1495 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1496 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1498 /* Strict versions, hard registers only */
1499 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1500 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1501 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1502 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1504 #ifndef REG_OK_STRICT
1505 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1506 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1507 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1510 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1511 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1512 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1515 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1516 that is a valid memory address for an instruction.
1517 The MODE argument is the machine mode for the MEM expression
1518 that wants to use this address.
1520 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1521 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1523 See legitimize_pic_address in i386.c for details as to what
1524 constitutes a legitimate address when -fpic is used. */
1526 #define MAX_REGS_PER_ADDRESS 2
1528 #define CONSTANT_ADDRESS_P(X) \
1529 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1530 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1531 || GET_CODE (X) == HIGH)
1533 /* Nonzero if the constant value X is a legitimate general operand.
1534 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1536 #define LEGITIMATE_CONSTANT_P(X) 1
1538 #ifdef REG_OK_STRICT
1539 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1541 if (legitimate_address_p (MODE, X, 1)) \
1546 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1548 if (legitimate_address_p (MODE, X, 0)) \
1554 /* Try machine-dependent ways of modifying an illegitimate address
1555 to be legitimate. If we find one, return the new, valid address.
1556 This macro is used in only one place: `memory_address' in explow.c.
1558 OLDX is the address as it was before break_out_memory_refs was called.
1559 In some cases it is useful to look at this to decide what needs to be done.
1561 MODE and WIN are passed so that this macro can use
1562 GO_IF_LEGITIMATE_ADDRESS.
1564 It is always safe for this macro to do nothing. It exists to recognize
1565 opportunities to optimize the output.
1567 For the 80386, we handle X+REG by loading X into a register R and
1568 using R+REG. R will go in a general reg and indexing will be used.
1569 However, if REG is a broken-out memory address or multiplication,
1570 nothing needs to be done because REG can certainly go in a general reg.
1572 When -fpic is used, special handling is needed for symbolic references.
1573 See comments by legitimize_pic_address in i386.c for details. */
1575 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1578 (X) = legitimize_address (X, OLDX, MODE); \
1579 if (memory_address_p (MODE, X)) \
1583 #define REWRITE_ADDRESS(x) rewrite_address(x)
1585 /* Nonzero if the constant value X is a legitimate general operand
1586 when generating PIC code. It is given that flag_pic is on and
1587 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1589 #define LEGITIMATE_PIC_OPERAND_P(X) \
1590 (! SYMBOLIC_CONST (X) \
1591 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1593 #define SYMBOLIC_CONST(X) \
1594 (GET_CODE (X) == SYMBOL_REF \
1595 || GET_CODE (X) == LABEL_REF \
1596 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1598 /* Go to LABEL if ADDR (a legitimate address expression)
1599 has an effect that depends on the machine mode it is used for.
1600 On the 80386, only postdecrement and postincrement address depend thus
1601 (the amount of decrement or increment being the length of the operand). */
1602 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1603 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1605 /* Define this macro if references to a symbol must be treated
1606 differently depending on something about the variable or
1607 function named by the symbol (such as what section it is in).
1609 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1610 so that we may access it directly in the GOT. */
1612 #define ENCODE_SECTION_INFO(DECL) \
1617 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1618 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1620 if (TARGET_DEBUG_ADDR \
1621 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1623 fprintf (stderr, "Encode %s, public = %s\n", \
1624 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1625 TREE_PUBLIC (DECL)); \
1628 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1629 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1630 || ! TREE_PUBLIC (DECL)); \
1635 /* Initialize data used by insn expanders. This is called from
1636 init_emit, once for each function, before code is generated.
1637 For 386, clear stack slot assignments remembered from previous
1640 #define INIT_EXPANDERS clear_386_stack_locals ()
1642 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1643 codes once the function is being compiled into assembly code, but
1644 not before. (It is not done before, because in the case of
1645 compiling an inline function, it would lead to multiple PIC
1646 prologues being included in functions which used inline functions
1647 and were compiled to assembly language.) */
1649 #define FINALIZE_PIC \
1652 extern int current_function_uses_pic_offset_table; \
1654 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1659 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1660 with arguments ARGS is a valid machine specific attribute for DECL.
1661 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1663 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1664 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1666 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1667 with arguments ARGS is a valid machine specific attribute for TYPE.
1668 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1670 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1671 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1673 /* If defined, a C expression whose value is zero if the attributes on
1674 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1675 two if they are nearly compatible (which causes a warning to be
1678 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1679 (i386_comp_type_attributes (TYPE1, TYPE2))
1681 /* If defined, a C statement that assigns default attributes to newly
1684 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1686 /* Max number of args passed in registers. If this is more than 3, we will
1687 have problems with ebx (register #4), since it is a caller save register and
1688 is also used as the pic register in ELF. So for now, don't allow more than
1689 3 registers to be passed in registers. */
1691 #define REGPARM_MAX 3
1694 /* Specify the machine mode that this machine uses
1695 for the index in the tablejump instruction. */
1696 #define CASE_VECTOR_MODE Pmode
1698 /* Define this if the tablejump instruction expects the table
1699 to contain offsets from the address of the table.
1700 Do not define this if the table should contain absolute addresses. */
1701 /* #define CASE_VECTOR_PC_RELATIVE */
1703 /* Specify the tree operation to be used to convert reals to integers.
1704 This should be changed to take advantage of fist --wfs ??
1706 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1708 /* This is the kind of divide that is easiest to do in the general case. */
1709 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1711 /* Define this as 1 if `char' should by default be signed; else as 0. */
1712 #define DEFAULT_SIGNED_CHAR 1
1714 /* Max number of bytes we can move from memory to memory
1715 in one reasonably fast instruction. */
1718 /* The number of scalar move insns which should be generated instead
1719 of a string move insn or a library call. Increasing the value
1720 will always make code faster, but eventually incurs high cost in
1721 increased code size.
1723 If you don't define this, a reasonable default is used.
1725 Make this large on i386, since the block move is very inefficient with small
1726 blocks, and the hard register needs of the block move require much reload
1729 #define MOVE_RATIO 5
1731 /* Define if shifts truncate the shift count
1732 which implies one can omit a sign-extension or zero-extension
1733 of a shift count. */
1734 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1736 /* #define SHIFT_COUNT_TRUNCATED */
1738 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1739 is done just by pretending it is already truncated. */
1740 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1742 /* We assume that the store-condition-codes instructions store 0 for false
1743 and some other value for true. This is the value stored for true. */
1745 #define STORE_FLAG_VALUE 1
1747 /* When a prototype says `char' or `short', really pass an `int'.
1748 (The 386 can't easily push less than an int.) */
1750 #define PROMOTE_PROTOTYPES
1752 /* Specify the machine mode that pointers have.
1753 After generation of rtl, the compiler makes no further distinction
1754 between pointers and any other objects of this machine mode. */
1755 #define Pmode SImode
1757 /* A function address in a call instruction
1758 is a byte address (for indexing purposes)
1759 so give the MEM rtx a byte's mode. */
1760 #define FUNCTION_MODE QImode
1762 /* A part of a C `switch' statement that describes the relative costs
1763 of constant RTL expressions. It must contain `case' labels for
1764 expression codes `const_int', `const', `symbol_ref', `label_ref'
1765 and `const_double'. Each case must ultimately reach a `return'
1766 statement to return the relative cost of the use of that kind of
1767 constant value in an expression. The cost may depend on the
1768 precise value of the constant, which is available for examination
1769 in X, and the rtx code of the expression in which it is contained,
1770 found in OUTER_CODE.
1772 CODE is the expression code--redundant, since it can be obtained
1773 with `GET_CODE (X)'. */
1775 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1780 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1782 case CONST_DOUBLE: \
1785 if (GET_MODE (RTX) == VOIDmode) \
1788 code = standard_80387_constant_p (RTX); \
1789 return code == 1 ? 0 : \
1794 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1795 This can be used, for example, to indicate how costly a multiply
1796 instruction is. In writing this macro, you can use the construct
1797 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1798 instructions. OUTER_CODE is the code of the expression in which X
1801 This macro is optional; do not define it if the default cost
1802 assumptions are adequate for the target machine. */
1804 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1806 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1807 && GET_MODE (XEXP (X, 0)) == SImode) \
1809 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1812 return COSTS_N_INSNS (ix86_cost->add); \
1814 if (value == 2 || value == 3) \
1815 return COSTS_N_INSNS (ix86_cost->lea); \
1817 /* fall through */ \
1823 return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) \
1824 ? ix86_cost->shift_const \
1825 : ix86_cost->shift_var); \
1828 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1830 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1833 while (value != 0) \
1839 return COSTS_N_INSNS (ix86_cost->mult_init \
1840 + nbits * ix86_cost->mult_bit); \
1843 else /* This is arbitrary */ \
1844 return COSTS_N_INSNS (ix86_cost->mult_init \
1845 + 7 * ix86_cost->mult_bit); \
1851 return COSTS_N_INSNS (ix86_cost->divide); \
1854 if (GET_CODE (XEXP (X, 0)) == REG \
1855 && GET_MODE (XEXP (X, 0)) == SImode \
1856 && GET_CODE (XEXP (X, 1)) == PLUS) \
1857 return COSTS_N_INSNS (ix86_cost->lea); \
1859 /* fall through */ \
1866 return COSTS_N_INSNS (ix86_cost->add);
1869 /* An expression giving the cost of an addressing mode that contains
1870 ADDRESS. If not defined, the cost is computed from the ADDRESS
1871 expression and the `CONST_COSTS' values.
1873 For most CISC machines, the default cost is a good approximation
1874 of the true cost of the addressing mode. However, on RISC
1875 machines, all instructions normally have the same length and
1876 execution time. Hence all addresses will have equal costs.
1878 In cases where more than one form of an address is known, the form
1879 with the lowest cost will be used. If multiple forms have the
1880 same, lowest, cost, the one that is the most complex will be used.
1882 For example, suppose an address that is equal to the sum of a
1883 register and a constant is used twice in the same basic block.
1884 When this macro is not defined, the address will be computed in a
1885 register and memory references will be indirect through that
1886 register. On machines where the cost of the addressing mode
1887 containing the sum is no higher than that of a simple indirect
1888 reference, this will produce an additional instruction and
1889 possibly require an additional register. Proper specification of
1890 this macro eliminates this overhead for such machines.
1892 Similar use of this macro is made in strength reduction of loops.
1894 ADDRESS need not be valid as an address. In such a case, the cost
1895 is not relevant and can be any value; invalid addresses need not be
1896 assigned a different cost.
1898 On machines where an address involving more than one register is as
1899 cheap as an address computation involving only one register,
1900 defining `ADDRESS_COST' to reflect this can cause two registers to
1901 be live over a region of code where only one would have been if
1902 `ADDRESS_COST' were not defined in that manner. This effect should
1903 be considered in the definition of this macro. Equivalent costs
1904 should probably only be given to addresses with different numbers
1905 of registers on machines with lots of registers.
1907 This macro will normally either not be defined or be defined as a
1910 For i386, it is better to use a complex address than let gcc copy
1911 the address into a reg and make a new pseudo. But not if the address
1912 requires to two regs - that would mean more pseudos with longer
1915 #define ADDRESS_COST(RTX) \
1916 ((CONSTANT_P (RTX) \
1917 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1918 && REG_P (XEXP (RTX, 0)))) ? 0 \
1922 /* A C expression for the cost of moving data of mode M between a
1923 register and memory. A value of 2 is the default; this cost is
1924 relative to those in `REGISTER_MOVE_COST'.
1926 If moving between registers and memory is more expensive than
1927 between two registers, you should define this macro to express the
1930 On the i386, copying between floating-point and fixed-point
1931 registers is expensive. */
1933 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1934 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
1935 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
1939 /* A C expression for the cost of moving data of mode M between a
1940 register and memory. A value of 2 is the default; this cost is
1941 relative to those in `REGISTER_MOVE_COST'.
1943 If moving between registers and memory is more expensive than
1944 between two registers, you should define this macro to express the
1947 /* #define MEMORY_MOVE_COST(M) 2 */
1949 /* A C expression for the cost of a branch instruction. A value of 1
1950 is the default; other values are interpreted relative to that. */
1952 /* #define BRANCH_COST 1 */
1954 /* Define this macro as a C expression which is nonzero if accessing
1955 less than a word of memory (i.e. a `char' or a `short') is no
1956 faster than accessing a word of memory, i.e., if such access
1957 require more than one instruction or if there is no difference in
1958 cost between byte and (aligned) word loads.
1960 When this macro is not defined, the compiler will access a field by
1961 finding the smallest containing object; when it is defined, a
1962 fullword load will be used if alignment permits. Unless bytes
1963 accesses are faster than word accesses, using word accesses is
1964 preferable since it may eliminate subsequent memory access if
1965 subsequent accesses occur to other fields in the same word of the
1966 structure, but to different bytes. */
1968 #define SLOW_BYTE_ACCESS 0
1970 /* Nonzero if access to memory by shorts is slow and undesirable. */
1971 #define SLOW_SHORT_ACCESS 0
1973 /* Define this macro if zero-extension (of a `char' or `short' to an
1974 `int') can be done faster if the destination is a register that is
1977 If you define this macro, you must have instruction patterns that
1978 recognize RTL structures like this:
1980 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
1982 and likewise for `HImode'. */
1984 /* #define SLOW_ZERO_EXTEND */
1986 /* Define this macro to be the value 1 if unaligned accesses have a
1987 cost many times greater than aligned accesses, for example if they
1988 are emulated in a trap handler.
1990 When this macro is non-zero, the compiler will act as if
1991 `STRICT_ALIGNMENT' were non-zero when generating code for block
1992 moves. This can cause significantly more instructions to be
1993 produced. Therefore, do not set this macro non-zero if unaligned
1994 accesses only add a cycle or two to the time for a memory access.
1996 If the value of this macro is always zero, it need not be defined. */
1998 /* #define SLOW_UNALIGNED_ACCESS 0 */
2000 /* Define this macro to inhibit strength reduction of memory
2001 addresses. (On some machines, such strength reduction seems to do
2002 harm rather than good.) */
2004 /* #define DONT_REDUCE_ADDR */
2006 /* Define this macro if it is as good or better to call a constant
2007 function address than to call an address kept in a register.
2009 Desirable on the 386 because a CALL with a constant address is
2010 faster than one with a register address. */
2012 #define NO_FUNCTION_CSE
2014 /* Define this macro if it is as good or better for a function to call
2015 itself with an explicit address than to call an address kept in a
2018 #define NO_RECURSIVE_FUNCTION_CSE
2020 /* A C statement (sans semicolon) to update the integer variable COST
2021 based on the relationship between INSN that is dependent on
2022 DEP_INSN through the dependence LINK. The default is to make no
2023 adjustment to COST. This can be used for example to specify to
2024 the scheduler that an output- or anti-dependence does not incur
2025 the same cost as a data-dependence. */
2027 #define ADJUST_COST(insn,link,dep_insn,cost) \
2030 if (GET_CODE (dep_insn) == CALL_INSN) \
2033 else if (GET_CODE (dep_insn) == INSN \
2034 && GET_CODE (PATTERN (dep_insn)) == SET \
2035 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2036 && GET_CODE (insn) == INSN \
2037 && GET_CODE (PATTERN (insn)) == SET \
2038 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2039 SET_SRC (PATTERN (insn)))) \
2044 else if (GET_CODE (insn) == JUMP_INSN) \
2049 if (TARGET_PENTIUM) \
2051 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2052 && !is_fp_dest (dep_insn)) \
2057 if (agi_dependent (insn, dep_insn)) \
2061 else if (GET_CODE (insn) == INSN \
2062 && GET_CODE (PATTERN (insn)) == SET \
2063 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2064 && (next_inst = next_nonnote_insn (insn)) \
2065 && GET_CODE (next_inst) == JUMP_INSN) \
2066 { /* compare probably paired with jump */ \
2071 if (!is_fp_dest (dep_insn)) \
2073 if(!agi_dependent (insn, dep_insn)) \
2075 else if (TARGET_486) \
2079 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2080 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2081 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2082 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2083 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2084 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2085 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2086 == NOTE_INSN_LOOP_END)) \
2093 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2095 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2096 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2097 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2098 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2099 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2100 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2101 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2102 == NOTE_INSN_LOOP_END)) \
2109 /* Add any extra modes needed to represent the condition code.
2111 For the i386, we need separate modes when floating-point equality
2112 comparisons are being done. */
2114 #define EXTRA_CC_MODES CCFPEQmode
2116 /* Define the names for the modes specified above. */
2117 #define EXTRA_CC_NAMES "CCFPEQ"
2119 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2120 return the mode to be used for the comparison.
2122 For floating-point equality comparisons, CCFPEQmode should be used.
2123 VOIDmode should be used in all other cases. */
2125 #define SELECT_CC_MODE(OP,X,Y) \
2126 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2127 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2129 /* Define the information needed to generate branch and scc insns. This is
2130 stored from the compare operation. Note that we can't use "rtx" here
2131 since it hasn't been defined! */
2133 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
2135 /* Tell final.c how to eliminate redundant test instructions. */
2137 /* Here we define machine-dependent flags and fields in cc_status
2138 (see `conditions.h'). */
2140 /* Set if the cc value is was actually from the 80387 and
2141 we are testing eax directly (i.e. no sahf) */
2142 #define CC_TEST_AX 020000
2144 /* Set if the cc value is actually in the 80387, so a floating point
2145 conditional branch must be output. */
2146 #define CC_IN_80387 04000
2148 /* Set if the CC value was stored in a nonstandard way, so that
2149 the state of equality is indicated by zero in the carry bit. */
2150 #define CC_Z_IN_NOT_C 010000
2152 /* Store in cc_status the expressions
2153 that the condition codes will describe
2154 after execution of an instruction whose pattern is EXP.
2155 Do not alter them if the instruction would not alter the cc's. */
2157 #define NOTICE_UPDATE_CC(EXP, INSN) \
2158 notice_update_cc((EXP))
2160 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2161 FLOAT following a floating point comparison.
2162 Use NO_OV following an arithmetic insn that set the cc's
2163 before a test insn that was deleted.
2164 NO_OV may be zero, meaning final should reinsert the test insn
2165 because the jump cannot be handled properly without it. */
2167 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2169 if (cc_prev_status.flags & CC_IN_80387) \
2171 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2176 /* Control the assembler format that we output, to the extent
2177 this does not vary between assemblers. */
2179 /* How to refer to registers in assembler output.
2180 This sequence is indexed by compiler's hard-register-number (see above). */
2182 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2183 For non floating point regs, the following are the HImode names.
2185 For float regs, the stack top is sometimes referred to as "%st(0)"
2186 instead of just "%st". PRINT_REG handles this with the "y" code. */
2188 #define HI_REGISTER_NAMES \
2189 {"ax","dx","cx","bx","si","di","bp","sp", \
2190 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2192 #define REGISTER_NAMES HI_REGISTER_NAMES
2194 /* Table of additional register names to use in user input. */
2196 #define ADDITIONAL_REGISTER_NAMES \
2197 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
2198 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
2199 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
2200 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
2202 /* Note we are omitting these since currently I don't know how
2203 to get gcc to use these, since they want the same but different
2204 number as al, and ax.
2207 /* note the last four are not really qi_registers, but
2208 the md will have to never output movb into one of them
2209 only a movw . There is no movb into the last four regs */
2211 #define QI_REGISTER_NAMES \
2212 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2214 /* These parallel the array above, and can be used to access bits 8:15
2215 of regs 0 through 3. */
2217 #define QI_HIGH_REGISTER_NAMES \
2218 {"ah", "dh", "ch", "bh", }
2220 /* How to renumber registers for dbx and gdb. */
2222 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2223 #define DBX_REGISTER_NUMBER(n) \
2234 /* This is how to output the definition of a user-level label named NAME,
2235 such as the label on a static function or variable NAME. */
2237 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2238 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2240 /* This is how to output an assembler line defining a `double' constant. */
2242 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2244 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2245 if (sizeof (int) == sizeof (long)) \
2246 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
2248 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2251 /* This is how to output a `long double' extended real constant. */
2253 #undef ASM_OUTPUT_LONG_DOUBLE
2254 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2256 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2257 if (sizeof (int) == sizeof (long)) \
2258 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
2260 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2263 /* This is how to output an assembler line defining a `float' constant. */
2265 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2267 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2268 if (sizeof (int) == sizeof (long)) \
2269 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
2271 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2274 /* Store in OUTPUT a string (made with alloca) containing
2275 an assembler-name for a local static variable named NAME.
2276 LABELNO is an integer which is different for each call. */
2278 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2279 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2280 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2284 /* This is how to output an assembler line defining an `int' constant. */
2286 #define ASM_OUTPUT_INT(FILE,VALUE) \
2287 ( fprintf (FILE, "%s ", ASM_LONG), \
2288 output_addr_const (FILE,(VALUE)), \
2291 /* Likewise for `char' and `short' constants. */
2292 /* is this supposed to do align too?? */
2294 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2295 ( fprintf (FILE, "%s ", ASM_SHORT), \
2296 output_addr_const (FILE,(VALUE)), \
2300 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2301 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2302 output_addr_const (FILE,(VALUE)), \
2303 fputs (",", FILE), \
2304 output_addr_const (FILE,(VALUE)), \
2305 fputs (" >> 8\n",FILE))
2309 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2310 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2311 output_addr_const (FILE, (VALUE)), \
2314 /* This is how to output an assembler line for a numeric constant byte. */
2316 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2317 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2319 /* This is how to output an insn to push a register on the stack.
2320 It need not be very fast code. */
2322 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2323 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
2325 /* This is how to output an insn to pop a register from the stack.
2326 It need not be very fast code. */
2328 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2329 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
2331 /* This is how to output an element of a case-vector that is absolute.
2334 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2335 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2337 /* This is how to output an element of a case-vector that is relative.
2338 We don't use these on the 386 yet, because the ATT assembler can't do
2339 forward reference the differences.
2342 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2343 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2345 /* Define the parentheses used to group arithmetic operations
2346 in assembler code. */
2348 #define ASM_OPEN_PAREN ""
2349 #define ASM_CLOSE_PAREN ""
2351 /* Define results of standard character escape sequences. */
2352 #define TARGET_BELL 007
2353 #define TARGET_BS 010
2354 #define TARGET_TAB 011
2355 #define TARGET_NEWLINE 012
2356 #define TARGET_VT 013
2357 #define TARGET_FF 014
2358 #define TARGET_CR 015
2360 /* Print operand X (an rtx) in assembler syntax to file FILE.
2361 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2362 The CODE z takes the size of operand from the following digit, and
2363 outputs b,w,or l respectively.
2365 On the 80386, we use several such letters:
2366 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2367 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2368 R -- print the prefix for register names.
2369 z -- print the opcode suffix for the size of the current operand.
2370 * -- print a star (in certain assembler syntax)
2371 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2372 b -- print the operand as if it's a byte (QImode) even if it isn't.
2373 c -- don't print special prefixes before constant operands. */
2375 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2378 /* Print the name of a register based on its machine mode and number.
2379 If CODE is 'w', pretend the mode is HImode.
2380 If CODE is 'b', pretend the mode is QImode.
2381 If CODE is 'k', pretend the mode is SImode.
2382 If CODE is 'h', pretend the reg is the `high' byte register.
2383 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2385 extern char *hi_reg_name
[];
2386 extern char *qi_reg_name
[];
2387 extern char *qi_high_reg_name
[];
2389 #define PRINT_REG(X, CODE, FILE) \
2390 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2392 fprintf (FILE, "%s", RP); \
2393 switch ((CODE == 'w' ? 2 \
2398 : GET_MODE_SIZE (GET_MODE (X)))) \
2401 if (STACK_TOP_P (X)) \
2403 fputs ("st(0)", FILE); \
2409 if (! FP_REG_P (X)) fputs ("e", FILE); \
2411 fputs (hi_reg_name[REGNO (X)], FILE); \
2414 fputs (qi_reg_name[REGNO (X)], FILE); \
2417 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2422 #define PRINT_OPERAND(FILE, X, CODE) \
2423 print_operand (FILE, X, CODE)
2425 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2426 print_operand_address (FILE, ADDR)
2428 /* Print the name of a register for based on its machine mode and number.
2429 This macro is used to print debugging output.
2430 This macro is different from PRINT_REG in that it may be used in
2431 programs that are not linked with aux-output.o. */
2433 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2434 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2435 static char *qi_name[] = QI_REGISTER_NAMES; \
2436 fprintf (FILE, "%d %s", REGNO (X), RP); \
2437 if (REGNO (X) == ARG_POINTER_REGNUM) \
2438 { fputs ("argp", FILE); break; } \
2439 if (STACK_TOP_P (X)) \
2440 { fputs ("st(0)", FILE); break; } \
2442 { fputs (hi_name[REGNO(X)], FILE); break; } \
2443 switch (GET_MODE_SIZE (GET_MODE (X))) \
2446 fputs ("e", FILE); \
2448 fputs (hi_name[REGNO (X)], FILE); \
2451 fputs (qi_name[REGNO (X)], FILE); \
2456 /* Output the prefix for an immediate operand, or for an offset operand. */
2457 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2458 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2460 /* Routines in libgcc that return floats must return them in an fp reg,
2461 just as other functions do which return such values.
2462 These macros make that happen. */
2464 #define FLOAT_VALUE_TYPE float
2465 #define INTIFY(FLOATVAL) FLOATVAL
2467 /* Nonzero if INSN magically clobbers register REGNO. */
2469 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2470 (FP_REGNO_P (REGNO) \
2471 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2474 /* a letter which is not needed by the normal asm syntax, which
2475 we can use for operand syntax in the extended asm */
2477 #define ASM_OPERAND_LETTER '#'
2479 #define RET return ""
2480 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
2482 /* Helper macros to expand a binary/unary operator if needed */
2483 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2485 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2489 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2491 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2496 /* Functions in i386.c */
2497 extern void override_options ();
2498 extern void order_regs_for_local_alloc ();
2499 extern char *output_strlen_unroll ();
2500 extern int i386_valid_decl_attribute_p ();
2501 extern int i386_valid_type_attribute_p ();
2502 extern int i386_return_pops_args ();
2503 extern int i386_comp_type_attributes ();
2504 extern void init_cumulative_args ();
2505 extern void function_arg_advance ();
2506 extern struct rtx_def
*function_arg ();
2507 extern int function_arg_partial_nregs ();
2508 extern char *output_strlen_unroll ();
2509 extern void output_op_from_reg ();
2510 extern void output_to_reg ();
2511 extern char *singlemove_string ();
2512 extern char *output_move_double ();
2513 extern char *output_move_memory ();
2514 extern char *output_move_pushmem ();
2515 extern int standard_80387_constant_p ();
2516 extern char *output_move_const_single ();
2517 extern int symbolic_operand ();
2518 extern int call_insn_operand ();
2519 extern int expander_call_insn_operand ();
2520 extern int symbolic_reference_mentioned_p ();
2521 extern int ix86_expand_binary_operator ();
2522 extern int ix86_binary_operator_ok ();
2523 extern int ix86_expand_unary_operator ();
2524 extern int ix86_unary_operator_ok ();
2525 extern void emit_pic_move ();
2526 extern void function_prologue ();
2527 extern int simple_386_epilogue ();
2528 extern void function_epilogue ();
2529 extern int legitimate_address_p ();
2530 extern struct rtx_def
*legitimize_pic_address ();
2531 extern struct rtx_def
*legitimize_address ();
2532 extern void print_operand ();
2533 extern void print_operand_address ();
2534 extern void notice_update_cc ();
2535 extern void split_di ();
2536 extern int binary_387_op ();
2537 extern int shift_op ();
2538 extern int VOIDmode_compare_op ();
2539 extern char *output_387_binary_op ();
2540 extern char *output_fix_trunc ();
2541 extern char *output_float_compare ();
2542 extern char *output_fp_cc0_set ();
2543 extern void save_386_machine_status ();
2544 extern void restore_386_machine_status ();
2545 extern void clear_386_stack_locals ();
2546 extern struct rtx_def
*assign_386_stack_local ();
2547 extern int is_mul ();
2548 extern int is_div ();
2549 extern int last_to_set_cc ();
2550 extern int doesnt_set_condition_code ();
2551 extern int sets_condition_code ();
2552 extern int str_immediate_operand ();
2553 extern int is_fp_insn ();
2554 extern int is_fp_dest ();
2555 extern int is_fp_store ();
2556 extern int agi_dependent ();
2557 extern int reg_mentioned_in_mem ();
2560 extern struct rtx_def
*copy_all_rtx ();
2561 extern void rewrite_address ();
2564 /* Variables in i386.c */
2565 extern char *ix86_cpu_string
; /* for -mcpu=<xxx> */
2566 extern char *ix86_isa_string
; /* for -mcpu=<xxx> */
2567 extern char *i386_reg_alloc_order
; /* register allocation order */
2568 extern char *i386_regparm_string
; /* # registers to use to pass args */
2569 extern char *i386_align_loops_string
; /* power of two alignment for loops */
2570 extern char *i386_align_jumps_string
; /* power of two alignment for non-loop jumps */
2571 extern char *i386_align_funcs_string
; /* power of two alignment for functions */
2572 extern int i386_regparm
; /* i386_regparm_string as a number */
2573 extern int i386_align_loops
; /* power of two alignment for loops */
2574 extern int i386_align_jumps
; /* power of two alignment for non-loop jumps */
2575 extern int i386_align_funcs
; /* power of two alignment for functions */
2576 extern char *hi_reg_name
[]; /* names for 16 bit regs */
2577 extern char *qi_reg_name
[]; /* names for 8 bit regs (low) */
2578 extern char *qi_high_reg_name
[]; /* names for 8 bit regs (high) */
2579 extern enum reg_class regclass_map
[]; /* smalled class containing REGNO */
2580 extern struct rtx_def
*i386_compare_op0
; /* operand 0 for comparisons */
2581 extern struct rtx_def
*i386_compare_op1
; /* operand 1 for comparisons */
2583 /* External variables used */
2584 extern int optimize
; /* optimization level */
2585 extern int obey_regdecls
; /* TRUE if stupid register allocation */
2587 /* External functions used */
2588 extern struct rtx_def
*force_operand ();