gcc/config/i386/predicates.md

   1 ;; Predicate definitions for IA-32 and x86-64.
   2 ;; Copyright (C) 2004 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 2, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING.  If not, write to
  18 ;; the Free Software Foundation, 59 Temple Place - Suite 330,
  19 ;; Boston, MA 02111-1307, USA.
  20
  21 ;; Return nonzero if OP is either a i387 or SSE fp register.
  22 (define_predicate "any_fp_register_operand"
  23   (and (match_code "reg")
  24        (match_test "ANY_FP_REGNO_P (REGNO (op))")))
  25
  26 ;; Return nonzero if OP is an i387 fp register.
  27 (define_predicate "fp_register_operand"
  28   (and (match_code "reg")
  29        (match_test "FP_REGNO_P (REGNO (op))")))
  30
  31 ;; Return nonzero if OP is a non-fp register_operand.
  32 (define_predicate "register_and_not_any_fp_reg_operand"
  33   (and (match_code "reg")
  34        (not (match_test "ANY_FP_REGNO_P (REGNO (op))"))))
  35
  36 ;; Return nonzero if OP is a register operand other than an i387 fp register.
  37 (define_predicate "register_and_not_fp_reg_operand"
  38   (and (match_code "reg")
  39        (not (match_test "FP_REGNO_P (REGNO (op))"))))
  40
  41 ;; True if the operand is an MMX register.
  42 (define_predicate "mmx_reg_operand"
  43   (and (match_code "reg")
  44        (match_test "MMX_REGNO_P (REGNO (op))")))
  45
  46 ;; True if the operand is a Q_REGS class register.
  47 (define_predicate "q_regs_operand"
  48   (match_operand 0 "register_operand")
  49 {
  50   if (GET_CODE (op) == SUBREG)
  51     op = SUBREG_REG (op);
  52   return ANY_QI_REG_P (op);
  53 })
  54
  55 ;; Return true if op is a NON_Q_REGS class register.
  56 (define_predicate "non_q_regs_operand"
  57   (match_operand 0 "register_operand")
  58 {
  59   if (GET_CODE (op) == SUBREG)
  60     op = SUBREG_REG (op);
  61   return NON_QI_REG_P (op);
  62 })
  63
  64 ;; Match an SI or HImode register for a zero_extract.
  65 (define_special_predicate "ext_register_operand"
  66   (match_operand 0 "register_operand")
  67 {
  68   if ((!TARGET_64BIT || GET_MODE (op) != DImode)
  69       && GET_MODE (op) != SImode && GET_MODE (op) != HImode)
  70     return 0;
  71   if (GET_CODE (op) == SUBREG)
  72     op = SUBREG_REG (op);
  73
  74   /* Be careful to accept only registers having upper parts.  */
  75   return REGNO (op) > LAST_VIRTUAL_REGISTER || REGNO (op) < 4;
  76 })
  77
  78 ;; Return true if op is the flags register.
  79 (define_predicate "flags_reg_operand"
  80   (and (match_code "reg")
  81        (match_test "REGNO (op) == FLAGS_REG")))
  82
  83 ;; Return 1 if VALUE can be stored in a sign extended immediate field.
  84 (define_predicate "x86_64_immediate_operand"
  85   (match_code "const_int,symbol_ref,label_ref,const")
  86 {
  87   if (!TARGET_64BIT)
  88     return immediate_operand (op, mode);
  89
  90   switch (GET_CODE (op))
  91     {
  92     case CONST_INT:
  93       /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
  94          to be at least 32 and this all acceptable constants are
  95          represented as CONST_INT.  */
  96       if (HOST_BITS_PER_WIDE_INT == 32)
  97         return 1;
  98       else
  99         {
 100           HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
 101           return trunc_int_for_mode (val, SImode) == val;
 102         }
 103       break;
 104
 105     case SYMBOL_REF:
 106       /* For certain code models, the symbolic references are known to fit.
 107          in CM_SMALL_PIC model we know it fits if it is local to the shared
 108          library.  Don't count TLS SYMBOL_REFs here, since they should fit
 109          only if inside of UNSPEC handled below.  */
 110       /* TLS symbols are not constant.  */
 111       if (tls_symbolic_operand (op, Pmode))
 112         return false;
 113       return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_KERNEL);
 114
 115     case LABEL_REF:
 116       /* For certain code models, the code is near as well.  */
 117       return (ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM
 118               || ix86_cmodel == CM_KERNEL);
 119
 120     case CONST:
 121       /* We also may accept the offsetted memory references in certain
 122          special cases.  */
 123       if (GET_CODE (XEXP (op, 0)) == UNSPEC)
 124         switch (XINT (XEXP (op, 0), 1))
 125           {
 126           case UNSPEC_GOTPCREL:
 127           case UNSPEC_DTPOFF:
 128           case UNSPEC_GOTNTPOFF:
 129           case UNSPEC_NTPOFF:
 130             return 1;
 131           default:
 132             break;
 133           }
 134
 135       if (GET_CODE (XEXP (op, 0)) == PLUS)
 136         {
 137           rtx op1 = XEXP (XEXP (op, 0), 0);
 138           rtx op2 = XEXP (XEXP (op, 0), 1);
 139           HOST_WIDE_INT offset;
 140
 141           if (ix86_cmodel == CM_LARGE)
 142             return 0;
 143           if (GET_CODE (op2) != CONST_INT)
 144             return 0;
 145           offset = trunc_int_for_mode (INTVAL (op2), DImode);
 146           switch (GET_CODE (op1))
 147             {
 148             case SYMBOL_REF:
 149               /* For CM_SMALL assume that latest object is 16MB before
 150                  end of 31bits boundary.  We may also accept pretty
 151                  large negative constants knowing that all objects are
 152                  in the positive half of address space.  */
 153               if (ix86_cmodel == CM_SMALL
 154                   && offset < 16*1024*1024
 155                   && trunc_int_for_mode (offset, SImode) == offset)
 156                 return 1;
 157               /* For CM_KERNEL we know that all object resist in the
 158                  negative half of 32bits address space.  We may not
 159                  accept negative offsets, since they may be just off
 160                  and we may accept pretty large positive ones.  */
 161               if (ix86_cmodel == CM_KERNEL
 162                   && offset > 0
 163                   && trunc_int_for_mode (offset, SImode) == offset)
 164                 return 1;
 165               break;
 166
 167             case LABEL_REF:
 168               /* These conditions are similar to SYMBOL_REF ones, just the
 169                  constraints for code models differ.  */
 170               if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
 171                   && offset < 16*1024*1024
 172                   && trunc_int_for_mode (offset, SImode) == offset)
 173                 return 1;
 174               if (ix86_cmodel == CM_KERNEL
 175                   && offset > 0
 176                   && trunc_int_for_mode (offset, SImode) == offset)
 177                 return 1;
 178               break;
 179
 180             case UNSPEC:
 181               switch (XINT (op1, 1))
 182                 {
 183                 case UNSPEC_DTPOFF:
 184                 case UNSPEC_NTPOFF:
 185                   if (offset > 0
 186                       && trunc_int_for_mode (offset, SImode) == offset)
 187                     return 1;
 188                 }
 189               break;
 190
 191             default:
 192               break;
 193             }
 194         }
 195       break;
 196
 197       default:
 198         abort ();
 199     }
 200
 201   return 0;
 202 })
 203
 204 ;; Return 1 if VALUE can be stored in the zero extended immediate field.
 205 (define_predicate "x86_64_zext_immediate_operand"
 206   (match_code "const_double,const_int,symbol_ref,label_ref,const")
 207 {
 208   switch (GET_CODE (op))
 209     {
 210     case CONST_DOUBLE:
 211       if (HOST_BITS_PER_WIDE_INT == 32)
 212         return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
 213       else
 214         return 0;
 215
 216     case CONST_INT:
 217       if (HOST_BITS_PER_WIDE_INT == 32)
 218         return INTVAL (op) >= 0;
 219       else
 220         return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
 221
 222     case SYMBOL_REF:
 223       /* For certain code models, the symbolic references are known to fit.  */
 224       /* TLS symbols are not constant.  */
 225       if (tls_symbolic_operand (op, Pmode))
 226         return false;
 227       return ix86_cmodel == CM_SMALL;
 228
 229     case LABEL_REF:
 230       /* For certain code models, the code is near as well.  */
 231       return ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM;
 232
 233     case CONST:
 234       /* We also may accept the offsetted memory references in certain
 235          special cases.  */
 236       if (GET_CODE (XEXP (op, 0)) == PLUS)
 237         {
 238           rtx op1 = XEXP (XEXP (op, 0), 0);
 239           rtx op2 = XEXP (XEXP (op, 0), 1);
 240
 241           if (ix86_cmodel == CM_LARGE)
 242             return 0;
 243           switch (GET_CODE (op1))
 244             {
 245             case SYMBOL_REF:
 246               /* For small code model we may accept pretty large positive
 247                  offsets, since one bit is available for free.  Negative
 248                  offsets are limited by the size of NULL pointer area
 249                  specified by the ABI.  */
 250               if (ix86_cmodel == CM_SMALL
 251                   && GET_CODE (op2) == CONST_INT
 252                   && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
 253                   && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
 254                 return 1;
 255               /* ??? For the kernel, we may accept adjustment of
 256                  -0x10000000, since we know that it will just convert
 257                  negative address space to positive, but perhaps this
 258                  is not worthwhile.  */
 259               break;
 260
 261             case LABEL_REF:
 262               /* These conditions are similar to SYMBOL_REF ones, just the
 263                  constraints for code models differ.  */
 264               if ((ix86_cmodel == CM_SMALL || ix86_cmodel == CM_MEDIUM)
 265                   && GET_CODE (op2) == CONST_INT
 266                   && trunc_int_for_mode (INTVAL (op2), DImode) > -0x10000
 267                   && trunc_int_for_mode (INTVAL (op2), SImode) == INTVAL (op2))
 268                 return 1;
 269               break;
 270
 271             default:
 272               return 0;
 273             }
 274         }
 275       break;
 276
 277     default:
 278       abort ();
 279     }
 280   return 0;
 281 })
 282
 283 ;; Return nonzero if OP is general operand representable on x86_64.
 284 (define_predicate "x86_64_general_operand"
 285   (if_then_else (match_test "TARGET_64BIT")
 286     (ior (match_operand 0 "nonimmediate_operand")
 287          (match_operand 0 "x86_64_immediate_operand"))
 288     (match_operand 0 "general_operand")))
 289
 290 ;; Return nonzero if OP is general operand representable on x86_64
 291 ;; as either sign extended or zero extended constant.
 292 (define_predicate "x86_64_szext_general_operand"
 293   (if_then_else (match_test "TARGET_64BIT")
 294     (ior (match_operand 0 "nonimmediate_operand")
 295          (ior (match_operand 0 "x86_64_immediate_operand")
 296               (match_operand 0 "x86_64_zext_immediate_operand")))
 297     (match_operand 0 "general_operand")))
 298
 299 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
 300 (define_predicate "x86_64_nonmemory_operand"
 301   (if_then_else (match_test "TARGET_64BIT")
 302     (ior (match_operand 0 "register_operand")
 303          (match_operand 0 "x86_64_immediate_operand"))
 304     (match_operand 0 "nonmemory_operand")))
 305
 306 ;; Return nonzero if OP is nonmemory operand representable on x86_64.
 307 (define_predicate "x86_64_szext_nonmemory_operand"
 308   (if_then_else (match_test "TARGET_64BIT")
 309     (ior (match_operand 0 "register_operand")
 310          (ior (match_operand 0 "x86_64_immediate_operand")
 311               (match_operand 0 "x86_64_zext_immediate_operand")))
 312     (match_operand 0 "nonmemory_operand")))
 313
 314 ;; Return nonzero if OP is nonmemory operand acceptable by movabs patterns.
 315 (define_predicate "x86_64_movabs_operand"
 316   (if_then_else (match_test "!TARGET_64BIT || !flag_pic")
 317     (match_operand 0 "nonmemory_operand")
 318     (ior (match_operand 0 "register_operand")
 319          (and (match_operand 0 "const_double_operand")
 320               (match_test "GET_MODE_SIZE (mode) <= 8")))))
 321
 322 ;; Returns nonzero if OP is either a symbol reference or a sum of a symbol
 323 ;; reference and a constant.
 324 (define_predicate "symbolic_operand"
 325   (match_code "symbol_ref,label_ref,const")
 326 {
 327   switch (GET_CODE (op))
 328     {
 329     case SYMBOL_REF:
 330     case LABEL_REF:
 331       return 1;
 332
 333     case CONST:
 334       op = XEXP (op, 0);
 335       if (GET_CODE (op) == SYMBOL_REF
 336           || GET_CODE (op) == LABEL_REF
 337           || (GET_CODE (op) == UNSPEC
 338               && (XINT (op, 1) == UNSPEC_GOT
 339                   || XINT (op, 1) == UNSPEC_GOTOFF
 340                   || XINT (op, 1) == UNSPEC_GOTPCREL)))
 341         return 1;
 342       if (GET_CODE (op) != PLUS
 343           || GET_CODE (XEXP (op, 1)) != CONST_INT)
 344         return 0;
 345
 346       op = XEXP (op, 0);
 347       if (GET_CODE (op) == SYMBOL_REF
 348           || GET_CODE (op) == LABEL_REF)
 349         return 1;
 350       /* Only @GOTOFF gets offsets.  */
 351       if (GET_CODE (op) != UNSPEC
 352           || XINT (op, 1) != UNSPEC_GOTOFF)
 353         return 0;
 354
 355       op = XVECEXP (op, 0, 0);
 356       if (GET_CODE (op) == SYMBOL_REF
 357           || GET_CODE (op) == LABEL_REF)
 358         return 1;
 359       return 0;
 360
 361     default:
 362       abort ();
 363     }
 364 })
 365
 366 ;; Return true if the operand contains a @GOT or @GOTOFF reference.
 367 (define_predicate "pic_symbolic_operand"
 368   (match_code "const")
 369 {
 370   op = XEXP (op, 0);
 371   if (TARGET_64BIT)
 372     {
 373       if (GET_CODE (op) == UNSPEC
 374           && XINT (op, 1) == UNSPEC_GOTPCREL)
 375         return 1;
 376       if (GET_CODE (op) == PLUS
 377           && GET_CODE (XEXP (op, 0)) == UNSPEC
 378           && XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL)
 379         return 1;
 380     }
 381   else
 382     {
 383       if (GET_CODE (op) == UNSPEC)
 384         return 1;
 385       if (GET_CODE (op) != PLUS
 386           || GET_CODE (XEXP (op, 1)) != CONST_INT)
 387         return 0;
 388       op = XEXP (op, 0);
 389       if (GET_CODE (op) == UNSPEC)
 390         return 1;
 391     }
 392   return 0;
 393 })
 394
 395 ;; Return true if OP is a symbolic operand that resolves locally.
 396 (define_predicate "local_symbolic_operand"
 397   (match_code "const,label_ref,symbol_ref")
 398 {
 399   if (GET_CODE (op) == CONST
 400       && GET_CODE (XEXP (op, 0)) == PLUS
 401       && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
 402     op = XEXP (XEXP (op, 0), 0);
 403
 404   if (GET_CODE (op) == LABEL_REF)
 405     return 1;
 406
 407   if (GET_CODE (op) != SYMBOL_REF)
 408     return 0;
 409
 410   if (SYMBOL_REF_LOCAL_P (op))
 411     return 1;
 412
 413   /* There is, however, a not insubstantial body of code in the rest of
 414      the compiler that assumes it can just stick the results of
 415      ASM_GENERATE_INTERNAL_LABEL in a symbol_ref and have done.  */
 416   /* ??? This is a hack.  Should update the body of the compiler to
 417      always create a DECL an invoke targetm.encode_section_info.  */
 418   if (strncmp (XSTR (op, 0), internal_label_prefix,
 419                internal_label_prefix_len) == 0)
 420     return 1;
 421
 422   return 0;
 423 })
 424
 425 ;; Test for various thread-local symbols.
 426 (define_predicate "tls_symbolic_operand"
 427   (and (match_code "symbol_ref")
 428        (match_test "SYMBOL_REF_TLS_MODEL (op) != 0")))
 429
 430 (define_predicate "global_dynamic_symbolic_operand"
 431   (and (match_code "symbol_ref")
 432        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_GLOBAL_DYNAMIC")))
 433
 434 (define_predicate "local_dynamic_symbolic_operand"
 435   (and (match_code "symbol_ref")
 436        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
 437
 438 (define_predicate "initial_exec_symbolic_operand"
 439   (and (match_code "symbol_ref")
 440        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC")))
 441
 442 (define_predicate "local_exec_symbolic_operand"
 443   (and (match_code "symbol_ref")
 444        (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC")))
 445
 446 ;; Test for a pc-relative call operand
 447 (define_predicate "constant_call_address_operand"
 448   (ior (match_code "symbol_ref")
 449        (match_operand 0 "local_symbolic_operand")))
 450
 451 ;; True for any non-virtual or eliminable register.  Used in places where
 452 ;; instantiation of such a register may cause the pattern to not be recognized.
 453 (define_predicate "register_no_elim_operand"
 454   (match_operand 0 "register_operand")
 455 {
 456   if (GET_CODE (op) == SUBREG)
 457     op = SUBREG_REG (op);
 458   return !(op == arg_pointer_rtx
 459            || op == frame_pointer_rtx
 460            || (REGNO (op) >= FIRST_PSEUDO_REGISTER
 461                && REGNO (op) <= LAST_VIRTUAL_REGISTER));
 462 })
 463
 464 ;; Similarly, but include the stack pointer.  This is used to prevent esp
 465 ;; from being used as an index reg.
 466 (define_predicate "index_register_operand"
 467   (match_operand 0 "register_operand")
 468 {
 469   if (GET_CODE (op) == SUBREG)
 470     op = SUBREG_REG (op);
 471   if (reload_in_progress || reload_completed)
 472     return REG_OK_FOR_INDEX_STRICT_P (op);
 473   else
 474     return REG_OK_FOR_INDEX_NONSTRICT_P (op);
 475 })
 476
 477 ;; Return false if this is any eliminable register.  Otherwise general_operand.
 478 (define_predicate "general_no_elim_operand"
 479   (if_then_else (match_code "reg,subreg")
 480     (match_operand 0 "register_no_elim_operand")
 481     (match_operand 0 "general_operand")))
 482
 483 ;; Return false if this is any eliminable register.  Otherwise
 484 ;; register_operand or a constant.
 485 (define_predicate "nonmemory_no_elim_operand"
 486   (ior (match_operand 0 "register_no_elim_operand")
 487        (match_operand 0 "immediate_operand")))
 488
 489 ;; Test for a valid operand for a call instruction.
 490 (define_predicate "call_insn_operand"
 491   (ior (match_operand 0 "constant_call_address_operand")
 492        (ior (match_operand 0 "register_no_elim_operand")
 493             (match_operand 0 "memory_operand"))))
 494
 495 ;; Simiarly, but for tail calls, in which we cannot allow memory references.
 496 (define_predicate "sibcall_insn_operand"
 497   (ior (match_operand 0 "constant_call_address_operand")
 498        (match_operand 0 "register_no_elim_operand")))
 499
 500 ;; Match exactly zero.
 501 (define_predicate "const0_operand"
 502   (and (match_code "const_int,const_double,const_vector")
 503        (match_test "op == CONST0_RTX (mode)")))
 504
 505 ;; Match exactly one.
 506 (define_predicate "const1_operand"
 507   (and (match_code "const_int")
 508        (match_test "op == const1_rtx")))
 509
 510 ;; Match 2, 4, or 8.  Used for leal multiplicands.
 511 (define_predicate "const248_operand"
 512   (match_code "const_int")
 513 {
 514   HOST_WIDE_INT i = INTVAL (op);
 515   return i == 2 || i == 4 || i == 8;
 516 })
 517
 518 ;; Match 0 or 1.
 519 (define_predicate "const_0_to_1_operand"
 520   (and (match_code "const_int")
 521        (match_test "op == const0_rtx || op == const1_rtx")))
 522
 523 ;; Match 0 to 3.
 524 (define_predicate "const_0_to_3_operand"
 525   (and (match_code "const_int")
 526        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))
 527
 528 ;; Match 0 to 7.
 529 (define_predicate "const_0_to_7_operand"
 530   (and (match_code "const_int")
 531        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
 532
 533 ;; Match 0 to 15.
 534 (define_predicate "const_0_to_15_operand"
 535   (and (match_code "const_int")
 536        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
 537
 538 ;; Match 0 to 63.
 539 (define_predicate "const_0_to_63_operand"
 540   (and (match_code "const_int")
 541        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 63")))
 542
 543 ;; Match 0 to 255.
 544 (define_predicate "const_0_to_255_operand"
 545   (and (match_code "const_int")
 546        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 255")))
 547
 548 ;; Match (0 to 255) * 8
 549 (define_predicate "const_0_to_255_mul_8_operand"
 550   (match_code "const_int")
 551 {
 552   unsigned HOST_WIDE_INT val = INTVAL (op);
 553   return val <= 255*8 && val % 8 == 0;
 554 })
 555
 556 ;; Return nonzero if OP is CONST_INT >= 1 and <= 31 (a valid operand
 557 ;; for shift & compare patterns, as shifting by 0 does not change flags).
 558 (define_predicate "const_1_to_31_operand"
 559   (and (match_code "const_int")
 560        (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 31")))
 561
 562 ;; Match 2 or 3.
 563 (define_predicate "const_2_to_3_operand"
 564   (and (match_code "const_int")
 565        (match_test "INTVAL (op) == 2 || INTVAL (op) == 3")))
 566
 567 ;; Match 4 to 7.
 568 (define_predicate "const_4_to_7_operand"
 569   (and (match_code "const_int")
 570        (match_test "INTVAL (op) >= 4 && INTVAL (op) <= 7")))
 571
 572 ;; Match exactly one bit in 4-bit mask.
 573 (define_predicate "const_pow2_1_to_8_operand"
 574   (match_code "const_int")
 575 {
 576   unsigned int log = exact_log2 (INTVAL (op));
 577   return log <= 3;
 578 })
 579
 580 ;; Match exactly one bit in 8-bit mask.
 581 (define_predicate "const_pow2_1_to_128_operand"
 582   (match_code "const_int")
 583 {
 584   unsigned int log = exact_log2 (INTVAL (op));
 585   return log <= 7;
 586 })
 587
 588 ;; True if this is a constant appropriate for an increment or decrement.
 589 (define_predicate "incdec_operand"
 590   (match_code "const_int")
 591 {
 592   /* On Pentium4, the inc and dec operations causes extra dependency on flag
 593      registers, since carry flag is not set.  */
 594   if ((TARGET_PENTIUM4 || TARGET_NOCONA) && !optimize_size)
 595     return 0;
 596   return op == const1_rtx || op == constm1_rtx;
 597 })
 598
 599 ;; True for registers, or 1 or -1.  Used to optimize double-word shifts.
 600 (define_predicate "reg_or_pm1_operand"
 601   (ior (match_operand 0 "register_operand")
 602        (and (match_code "const_int")
 603             (match_test "op == const1_rtx || op == constm1_rtx"))))
 604
 605 ;; True if OP is acceptable as operand of DImode shift expander.
 606 (define_predicate "shiftdi_operand"
 607   (if_then_else (match_test "TARGET_64BIT")
 608     (match_operand 0 "nonimmediate_operand")
 609     (match_operand 0 "register_operand")))
 610
 611 (define_predicate "ashldi_input_operand"
 612   (if_then_else (match_test "TARGET_64BIT")
 613     (match_operand 0 "nonimmediate_operand")
 614     (match_operand 0 "reg_or_pm1_operand")))
 615
 616 ;; Return true if OP is a vector load from the constant pool with just
 617 ;; the first element nonzero.
 618 (define_predicate "zero_extended_scalar_load_operand"
 619   (match_code "mem")
 620 {
 621   unsigned n_elts;
 622   op = maybe_get_pool_constant (op);
 623   if (!op)
 624     return 0;
 625   if (GET_CODE (op) != CONST_VECTOR)
 626     return 0;
 627   n_elts =
 628     (GET_MODE_SIZE (GET_MODE (op)) /
 629      GET_MODE_SIZE (GET_MODE_INNER (GET_MODE (op))));
 630   for (n_elts--; n_elts > 0; n_elts--)
 631     {
 632       rtx elt = CONST_VECTOR_ELT (op, n_elts);
 633       if (elt != CONST0_RTX (GET_MODE_INNER (GET_MODE (op))))
 634         return 0;
 635     }
 636   return 1;
 637 })
 638
 639 ;; Return 1 when OP is operand acceptable for standard SSE move.
 640 (define_predicate "vector_move_operand"
 641   (ior (match_operand 0 "nonimmediate_operand")
 642        (match_operand 0 "const0_operand")))
 643
 644 ;; Return true if op if a valid address, and does not contain
 645 ;; a segment override.
 646 (define_special_predicate "no_seg_address_operand"
 647   (match_operand 0 "address_operand")
 648 {
 649   struct ix86_address parts;
 650   if (! ix86_decompose_address (op, &parts))
 651     abort ();
 652   return parts.seg == SEG_DEFAULT;
 653 })
 654
 655 ;; Return nonzero if the rtx is known aligned.
 656 (define_predicate "aligned_operand"
 657   (match_operand 0 "general_operand")
 658 {
 659   struct ix86_address parts;
 660
 661   /* Registers and immediate operands are always "aligned".  */
 662   if (GET_CODE (op) != MEM)
 663     return 1;
 664
 665   /* Don't even try to do any aligned optimizations with volatiles.  */
 666   if (MEM_VOLATILE_P (op))
 667     return 0;
 668   op = XEXP (op, 0);
 669
 670   /* Pushes and pops are only valid on the stack pointer.  */
 671   if (GET_CODE (op) == PRE_DEC
 672       || GET_CODE (op) == POST_INC)
 673     return 1;
 674
 675   /* Decode the address.  */
 676   if (!ix86_decompose_address (op, &parts))
 677     abort ();
 678
 679   /* Look for some component that isn't known to be aligned.  */
 680   if (parts.index)
 681     {
 682       if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
 683         return 0;
 684     }
 685   if (parts.base)
 686     {
 687       if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
 688         return 0;
 689     }
 690   if (parts.disp)
 691     {
 692       if (GET_CODE (parts.disp) != CONST_INT
 693           || (INTVAL (parts.disp) & 3) != 0)
 694         return 0;
 695     }
 696
 697   /* Didn't find one -- this must be an aligned address.  */
 698   return 1;
 699 })
 700
 701 ;; Returns 1 if OP is memory operand with a displacement.
 702 (define_predicate "memory_displacement_operand"
 703   (match_operand 0 "memory_operand")
 704 {
 705   struct ix86_address parts;
 706   if (!ix86_decompose_address (XEXP (op, 0), &parts))
 707     abort ();
 708   return parts.disp != NULL_RTX;
 709 })
 710
 711 ;; Returns 1 if OP is memory operand that cannot be represented
 712 ;; by the modRM array.
 713 (define_predicate "long_memory_operand"
 714   (and (match_operand 0 "memory_operand")
 715        (match_test "memory_address_length (op) != 0")))
 716
 717 ;; Return 1 if OP is a comparison operator that can be issued by fcmov.
 718 (define_predicate "fcmov_comparison_operator"
 719   (match_operand 0 "comparison_operator")
 720 {
 721   enum machine_mode inmode = GET_MODE (XEXP (op, 0));
 722   enum rtx_code code = GET_CODE (op);
 723
 724   if (inmode == CCFPmode || inmode == CCFPUmode)
 725     {
 726       enum rtx_code second_code, bypass_code;
 727       ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
 728       if (bypass_code != UNKNOWN || second_code != UNKNOWN)
 729         return 0;
 730       code = ix86_fp_compare_code_to_integer (code);
 731     }
 732   /* i387 supports just limited amount of conditional codes.  */
 733   switch (code)
 734     {
 735     case LTU: case GTU: case LEU: case GEU:
 736       if (inmode == CCmode || inmode == CCFPmode || inmode == CCFPUmode)
 737         return 1;
 738       return 0;
 739     case ORDERED: case UNORDERED:
 740     case EQ: case NE:
 741       return 1;
 742     default:
 743       return 0;
 744     }
 745 })
 746
 747 ;; Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS insns.
 748 ;; The first set are supported directly; the second set can't be done with
 749 ;; full IEEE support, i.e. NaNs.
 750 ;;
 751 ;; ??? It would seem that we have a lot of uses of this predicate that pass
 752 ;; it the wrong mode.  We got away with this because the old function didn't
 753 ;; check the mode at all.  Mirror that for now by calling this a special
 754 ;; predicate.
 755
 756 (define_special_predicate "sse_comparison_operator"
 757   (ior (match_code "eq,lt,le,unordered,ne,unge,ungt,ordered")
 758        (and (match_code "uneq,unlt,unle,ltgt,ge,gt")
 759             (match_test "!TARGET_IEEE_FP"))))
 760
 761 ;; Return 1 if OP is a valid comparison operator in valid mode.
 762 (define_predicate "ix86_comparison_operator"
 763   (match_operand 0 "comparison_operator")
 764 {
 765   enum machine_mode inmode = GET_MODE (XEXP (op, 0));
 766   enum rtx_code code = GET_CODE (op);
 767
 768   if (inmode == CCFPmode || inmode == CCFPUmode)
 769     {
 770       enum rtx_code second_code, bypass_code;
 771       ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
 772       return (bypass_code == UNKNOWN && second_code == UNKNOWN);
 773     }
 774   switch (code)
 775     {
 776     case EQ: case NE:
 777       return 1;
 778     case LT: case GE:
 779       if (inmode == CCmode || inmode == CCGCmode
 780           || inmode == CCGOCmode || inmode == CCNOmode)
 781         return 1;
 782       return 0;
 783     case LTU: case GTU: case LEU: case ORDERED: case UNORDERED: case GEU:
 784       if (inmode == CCmode)
 785         return 1;
 786       return 0;
 787     case GT: case LE:
 788       if (inmode == CCmode || inmode == CCGCmode || inmode == CCNOmode)
 789         return 1;
 790       return 0;
 791     default:
 792       return 0;
 793     }
 794 })
 795
 796 ;; Return 1 if OP is a valid comparison operator testing carry flag to be set.
 797 (define_predicate "ix86_carry_flag_operator"
 798   (match_code "ltu,lt,unlt,gt,ungt,le,unle,ge,unge,ltgt,uneq")
 799 {
 800   enum machine_mode inmode = GET_MODE (XEXP (op, 0));
 801   enum rtx_code code = GET_CODE (op);
 802
 803   if (GET_CODE (XEXP (op, 0)) != REG
 804       || REGNO (XEXP (op, 0)) != FLAGS_REG
 805       || XEXP (op, 1) != const0_rtx)
 806     return 0;
 807
 808   if (inmode == CCFPmode || inmode == CCFPUmode)
 809     {
 810       enum rtx_code second_code, bypass_code;
 811       ix86_fp_comparison_codes (code, &bypass_code, &code, &second_code);
 812       if (bypass_code != UNKNOWN || second_code != UNKNOWN)
 813         return 0;
 814       code = ix86_fp_compare_code_to_integer (code);
 815     }
 816   else if (inmode != CCmode)
 817     return 0;
 818
 819   return code == LTU;
 820 })
 821
 822 ;; Nearly general operand, but accept any const_double, since we wish
 823 ;; to be able to drop them into memory rather than have them get pulled
 824 ;; into registers.
 825 (define_predicate "cmp_fp_expander_operand"
 826   (ior (match_code "const_double")
 827        (match_operand 0 "general_operand")))
 828
 829 ;; Return true if this is a valid binary floating-point operation.
 830 (define_predicate "binary_fp_operator"
 831   (match_code "plus,minus,mult,div"))
 832
 833 ;; Return true if this is a multiply operation.
 834 (define_predicate "mult_operator"
 835   (match_code "mult"))
 836
 837 ;; Return true if this is a division operation.
 838 (define_predicate "div_operator"
 839   (match_code "div"))
 840
 841 ;; Return true if this is a float extend operation.
 842 (define_predicate "float_operator"
 843   (match_code "float"))
 844
 845 ;; Return true for ARITHMETIC_P.
 846 (define_predicate "arith_or_logical_operator"
 847   (match_code "plus,mult,and,ior,xor,smin,smax,umin,umax,compare,minus,div,
 848                mod,udiv,umod,ashift,rotate,ashiftrt,lshiftrt,rotatert"))
 849
 850 ;; Return 1 if OP is a binary operator that can be promoted to wider mode.
 851 ;; Modern CPUs have same latency for HImode and SImode multiply,
 852 ;; but 386 and 486 do HImode multiply faster.  */
 853 (define_predicate "promotable_binary_operator"
 854   (ior (match_code "plus,and,ior,xor,ashift")
 855        (and (match_code "mult")
 856             (match_test "ix86_tune > PROCESSOR_I486"))))
 857
 858 ;; To avoid problems when jump re-emits comparisons like testqi_ext_ccno_0,
 859 ;; re-recognize the operand to avoid a copy_to_mode_reg that will fail.
 860 ;;
 861 ;; ??? It seems likely that this will only work because cmpsi is an
 862 ;; expander, and no actual insns use this.
 863
 864 (define_predicate "cmpsi_operand_1"
 865   (match_code "and")
 866 {
 867   return (GET_MODE (op) == SImode
 868           && GET_CODE (XEXP (op, 0)) == ZERO_EXTRACT
 869           && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
 870           && GET_CODE (XEXP (XEXP (op, 0), 2)) == CONST_INT
 871           && INTVAL (XEXP (XEXP (op, 0), 1)) == 8
 872           && INTVAL (XEXP (XEXP (op, 0), 2)) == 8
 873           && GET_CODE (XEXP (op, 1)) == CONST_INT);
 874 })
 875
 876 (define_predicate "cmpsi_operand"
 877   (ior (match_operand 0 "nonimmediate_operand")
 878        (match_operand 0 "cmpsi_operand_1")))
 879
 880 (define_predicate "compare_operator"
 881   (match_code "compare"))
 882
 883 (define_predicate "absneg_operator"
 884   (match_code "abs,neg"))