1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3 Contributed by James E. Wilson <wilson@cygnus.com> and
4 David Mosberger <davidm@hpl.hp.com>.
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* ??? Look at ABI group documents for list of preprocessor macros and
24 other features required for ABI compliance. */
26 /* ??? Functions containing a non-local goto target save many registers. Why?
27 See for instance execute/920428-2.c. */
29 /* ??? Add support for short data/bss sections. */
32 /* Run-time target specifications */
34 /* Define this to be a string constant containing `-D' options to define the
35 predefined macros that identify this machine and system. These macros will
36 be predefined unless the `-ansi' option is specified. */
37 /* ??? This is undefed in svr4.h. */
38 #define CPP_PREDEFINES "-Dia64 -Amachine(ia64)"
40 /* This declaration should be present. */
41 extern int target_flags
;
43 /* This series of macros is to allow compiler command arguments to enable or
44 disable the use of optional features of the target machine. */
46 #define MASK_BIG_ENDIAN 0x00000001 /* Generate big endian code. */
48 #define MASK_GNU_AS 0x00000002 /* Generate code for GNU as. */
50 #define MASK_GNU_LD 0x00000004 /* Generate code for GNU ld. */
52 #define MASK_NO_PIC 0x00000008 /* Generate code without GP reg. */
54 #define MASK_VOL_ASM_STOP 0x00000010 /* Emit stop bits for vol ext asm. */
56 #define MASK_A_STEP 0x00000020 /* Emit code for Itanium A step. */
58 #define MASK_REG_NAMES 0x00000040 /* Use in/loc/out register names. */
60 #define MASK_NO_SDATA 0x00000080 /* Disable sdata/scommon/sbss. */
62 #define MASK_CONST_GP 0x00000100 /* treat gp as program-wide constant */
64 #define MASK_AUTO_PIC 0x00000200 /* generate automatically PIC */
66 #define MASK_DWARF2_ASM 0x40000000 /* test dwarf2 line info via gas. */
68 #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
70 #define TARGET_GNU_AS (target_flags & MASK_GNU_AS)
72 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
74 #define TARGET_NO_PIC (target_flags & MASK_NO_PIC)
76 #define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP)
78 #define TARGET_A_STEP (target_flags & MASK_A_STEP)
80 #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES)
82 #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA)
84 #define TARGET_CONST_GP (target_flags & MASK_CONST_GP)
86 #define TARGET_AUTO_PIC (target_flags & MASK_AUTO_PIC)
88 #define TARGET_DWARF2_ASM (target_flags & MASK_DWARF2_ASM)
90 /* This macro defines names of command options to set and clear bits in
91 `target_flags'. Its definition is an initializer with a subgrouping for
92 each command option. */
94 #define TARGET_SWITCHES \
96 { "big-endian", MASK_BIG_ENDIAN, \
97 N_("Generate big endian code") }, \
98 { "little-endian", -MASK_BIG_ENDIAN, \
99 N_("Generate little endian code") }, \
100 { "gnu-as", MASK_GNU_AS, \
101 N_("Generate code for GNU as") }, \
102 { "no-gnu-as", -MASK_GNU_AS, \
103 N_("Generate code for Intel as") }, \
104 { "gnu-ld", MASK_GNU_LD, \
105 N_("Generate code for GNU ld") }, \
106 { "no-gnu-ld", -MASK_GNU_LD, \
107 N_("Generate code for Intel ld") }, \
108 { "no-pic", MASK_NO_PIC, \
109 N_("Generate code without GP reg") }, \
110 { "volatile-asm-stop", MASK_VOL_ASM_STOP, \
111 N_("Emit stop bits before and after volatile extended asms") }, \
112 { "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \
113 N_("Don't emit stop bits before and after volatile extended asms") }, \
114 { "a-step", MASK_A_STEP, \
115 N_("Emit code for Itanium (TM) processor A step")}, \
116 { "register-names", MASK_REG_NAMES, \
117 N_("Use in/loc/out register names")}, \
118 { "no-sdata", MASK_NO_SDATA, \
119 N_("Disable use of sdata/scommon/sbss")}, \
120 { "sdata", -MASK_NO_SDATA, \
121 N_("Enable use of sdata/scommon/sbss")}, \
122 { "constant-gp", MASK_CONST_GP, \
123 N_("gp is constant (but save/restore gp on indirect calls)") }, \
124 { "auto-pic", MASK_AUTO_PIC, \
125 N_("Generate self-relocatable code") }, \
126 { "dwarf2-asm", MASK_DWARF2_ASM, \
127 N_("Enable Dwarf 2 line debug info via GNU as")}, \
128 { "no-dwarf2-asm", -MASK_DWARF2_ASM, \
129 N_("Disable Dwarf 2 line debug info via GNU as")}, \
130 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
134 /* Default target_flags if no switches are specified */
136 #ifndef TARGET_DEFAULT
137 #define TARGET_DEFAULT MASK_DWARF2_ASM
140 #ifndef TARGET_CPU_DEFAULT
141 #define TARGET_CPU_DEFAULT 0
144 /* This macro is similar to `TARGET_SWITCHES' but defines names of command
145 options that have values. Its definition is an initializer with a
146 subgrouping for each command option. */
148 extern const char *ia64_fixed_range_string
;
149 #define TARGET_OPTIONS \
151 { "fixed-range=", &ia64_fixed_range_string, \
152 N_("Specify range of registers to make fixed.")}, \
155 /* This macro is a C statement to print on `stderr' a string describing the
156 particular machine description choice. */
158 #define TARGET_VERSION fprintf (stderr, " (IA-64)");
160 /* Sometimes certain combinations of command options do not make sense on a
161 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
162 take account of this. This macro, if defined, is executed once just after
163 all the command options have been parsed. */
165 #define OVERRIDE_OPTIONS ia64_override_options ()
167 /* Some machines may desire to change what optimizations are performed for
168 various optimization levels. This macro, if defined, is executed once just
169 after the optimization level is determined and before the remainder of the
170 command options have been parsed. Values set in this macro are used as the
171 default values for the other command line options. */
173 /* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
175 /* Driver configuration */
177 /* A C string constant that tells the GNU CC driver program options to pass to
178 CPP. It can also specify how to translate options you give to GNU CC into
179 options for GNU CC to pass to the CPP. */
181 /* ??? __LONG_MAX__ depends on LP64/ILP32 switch. */
182 /* ??? An alternative is to modify glimits.h to check for __LP64__ instead
183 of checked for CPU specific defines. We could also get rid of all LONG_MAX
184 defines in other tm.h files. */
186 "%{mcpu=itanium:-D__itanium__} %{mbig-endian:-D__BIG_ENDIAN__} \
187 -D__LONG_MAX__=9223372036854775807L"
189 /* If this macro is defined, the preprocessor will not define the builtin macro
190 `__SIZE_TYPE__'. The macro `__SIZE_TYPE__' must then be defined by
193 This should be defined if `SIZE_TYPE' depends on target dependent flags
194 which are not accessible to the preprocessor. Otherwise, it should not be
196 /* ??? Needs to be defined for P64 code. */
197 /* #define NO_BUILTIN_SIZE_TYPE */
199 /* If this macro is defined, the preprocessor will not define the builtin macro
200 `__PTRDIFF_TYPE__'. The macro `__PTRDIFF_TYPE__' must then be defined by
203 This should be defined if `PTRDIFF_TYPE' depends on target dependent flags
204 which are not accessible to the preprocessor. Otherwise, it should not be
206 /* ??? Needs to be defined for P64 code. */
207 /* #define NO_BUILTIN_PTRDIFF_TYPE */
209 /* A C string constant that tells the GNU CC driver program options to pass to
210 `cc1'. It can also specify how to translate options you give to GNU CC into
211 options for GNU CC to pass to the `cc1'. */
213 /* #define CC1_SPEC "" */
215 /* A C string constant that tells the GNU CC driver program options to pass to
216 `cc1plus'. It can also specify how to translate options you give to GNU CC
217 into options for GNU CC to pass to the `cc1plus'. */
219 /* #define CC1PLUS_SPEC "" */
221 /* A C string constant that tells the GNU CC driver program options to pass to
222 the assembler. It can also specify how to translate options you give to GNU
223 CC into options for GNU CC to pass to the assembler. */
225 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_AS) != 0
227 #define ASM_SPEC "%{mno-gnu-as:-N so}%{!mno-gnu-as: -x}"
230 #define ASM_SPEC "%{!mgnu-as:-N so}%{mgnu-as: -x}"
233 /* A C string constant that tells the GNU CC driver program options to pass to
234 the linker. It can also specify how to translate options you give to GNU CC
235 into options for GNU CC to pass to the linker. */
237 /* The Intel linker does not support dynamic linking, so we need -dn.
238 The Intel linker gives annoying messages unless -N so is used. */
239 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_LD) != 0
241 #define LINK_SPEC "%{mno-gnu-ld:-dn -N so}"
244 #define LINK_SPEC "%{!mgnu-ld:-dn -N so}"
250 /* Define this macro to have the value 1 if the most significant bit in a byte
251 has the lowest number; otherwise define it to have the value zero. */
253 #define BITS_BIG_ENDIAN 0
255 /* Define this macro to have the value 1 if the most significant byte in a word
256 has the lowest number. This macro need not be a constant. */
258 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
260 /* Define this macro to have the value 1 if, in a multiword object, the most
261 significant word has the lowest number. */
263 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
265 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must be a
266 constant value with the same meaning as WORDS_BIG_ENDIAN, which will be used
267 only when compiling libgcc2.c. Typically the value will be set based on
268 preprocessor defines. */
269 #if defined(__BIG_ENDIAN__)
270 #define LIBGCC2_WORDS_BIG_ENDIAN 1
272 #define LIBGCC2_WORDS_BIG_ENDIAN 0
275 /* Define this macro to be the number of bits in an addressable storage unit
276 (byte); normally 8. */
277 #define BITS_PER_UNIT 8
279 /* Number of bits in a word; normally 32. */
280 #define BITS_PER_WORD 64
282 /* Number of storage units in a word; normally 4. */
283 #define UNITS_PER_WORD 8
285 /* Width of a pointer, in bits. You must specify a value no wider than the
286 width of `Pmode'. If it is not equal to the width of `Pmode', you must
287 define `POINTERS_EXTEND_UNSIGNED'. */
288 /* ??? Implement optional 32 bit pointer size later? */
289 #define POINTER_SIZE 64
291 /* A C expression whose value is nonzero if pointers that need to be extended
292 from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and zero if
293 they are zero-extended.
295 You need not define this macro if the `POINTER_SIZE' is equal to the width
297 /* ??? May need this for 32 bit pointers. */
298 /* #define POINTERS_EXTEND_UNSIGNED */
300 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
301 which has the specified mode and signedness is to be stored in a register.
302 This macro is only called when TYPE is a scalar type. */
304 /* ??? Maybe sign-extend 32 bit values like the alpha? Or maybe zero-extend
305 because we only have zero-extending loads? */
306 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
309 if (GET_MODE_CLASS (MODE) == MODE_INT \
310 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
315 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
316 be done for outgoing function arguments. */
317 /* ??? ABI doesn't allow us to define this. */
318 /* #define PROMOTE_FUNCTION_ARGS */
320 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
321 be done for the return value of functions.
323 If this macro is defined, `FUNCTION_VALUE' must perform the same promotions
324 done by `PROMOTE_MODE'. */
325 /* ??? ABI doesn't allow us to define this. */
326 /* #define PROMOTE_FUNCTION_RETURN */
328 /* Normal alignment required for function parameters on the stack, in bits.
329 All stack parameters receive at least this much alignment regardless of data
330 type. On most machines, this is the same as the size of an integer. */
331 #define PARM_BOUNDARY 64
333 /* Define this macro if you wish to preserve a certain alignment for the stack
334 pointer. The definition is a C expression for the desired alignment
335 (measured in bits). */
337 #define STACK_BOUNDARY 128
339 /* Align frames on double word boundaries */
340 #ifndef IA64_STACK_ALIGN
341 #define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
344 /* Alignment required for a function entry point, in bits. */
345 #define FUNCTION_BOUNDARY 128
347 /* Biggest alignment that any data type can require on this machine,
349 /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
350 128 bit integers all require 128 bit alignment. */
351 #define BIGGEST_ALIGNMENT 128
353 /* If defined, a C expression to compute the alignment for a static variable.
354 TYPE is the data type, and ALIGN is the alignment that the object
355 would ordinarily have. The value of this macro is used instead of that
356 alignment to align the object. */
358 #define DATA_ALIGNMENT(TYPE, ALIGN) \
359 (TREE_CODE (TYPE) == ARRAY_TYPE \
360 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
361 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
363 /* If defined, a C expression to compute the alignment given to a constant that
364 is being placed in memory. CONSTANT is the constant and ALIGN is the
365 alignment that the object would ordinarily have. The value of this macro is
366 used instead of that alignment to align the object. */
368 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
369 (TREE_CODE (EXP) == STRING_CST \
370 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
372 /* Define this macro to be the value 1 if instructions will fail to work if
373 given data not on the nominal alignment. If instructions will merely go
374 slower in that case, define this macro as 0. */
375 #define STRICT_ALIGNMENT 1
377 /* Define this if you wish to imitate the way many other C compilers handle
378 alignment of bitfields and the structures that contain them.
379 The behavior is that the type written for a bitfield (`int', `short', or
380 other integer type) imposes an alignment for the entire structure, as if the
381 structure really did contain an ordinary field of that type. In addition,
382 the bitfield is placed within the structure so that it would fit within such
383 a field, not crossing a boundary for it. */
384 #define PCC_BITFIELD_TYPE_MATTERS 1
386 /* Define this macro as an expression for the overall size of a structure
387 (given by STRUCT as a tree node) when the size computed from the fields is
388 SIZE and the alignment is ALIGN.
390 The default is to round SIZE up to a multiple of ALIGN. */
391 /* ??? Might need this for 80-bit double-extended floats. */
392 /* #define ROUND_TYPE_SIZE(STRUCT, SIZE, ALIGN) */
394 /* Define this macro as an expression for the alignment of a structure (given
395 by STRUCT as a tree node) if the alignment computed in the usual way is
396 COMPUTED and the alignment explicitly specified was SPECIFIED.
398 The default is to use SPECIFIED if it is larger; otherwise, use the smaller
399 of COMPUTED and `BIGGEST_ALIGNMENT' */
400 /* ??? Might need this for 80-bit double-extended floats. */
401 /* #define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) */
403 /* An integer expression for the size in bits of the largest integer machine
404 mode that should actually be used. */
406 /* Allow pairs of registers to be used, which is the intent of the default. */
407 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
409 /* A code distinguishing the floating point format of the target machine. */
410 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
412 /* GNU CC supports two ways of implementing C++ vtables: traditional or with
413 so-called "thunks". The flag `-fvtable-thunk' chooses between them. Define
414 this macro to be a C expression for the default value of that flag. If
415 `DEFAULT_VTABLE_THUNKS' is 0, GNU CC uses the traditional implementation by
416 default. The "thunk" implementation is more efficient (especially if you
417 have provided an implementation of `ASM_OUTPUT_MI_THUNK', but is not binary
418 compatible with code compiled using the traditional implementation. If you
419 are writing a new ports, define `DEFAULT_VTABLE_THUNKS' to 1.
421 If you do not define this macro, the default for `-fvtable-thunk' is 0. */
422 #define DEFAULT_VTABLE_THUNKS 1
425 /* Layout of Source Language Data Types */
427 /* A C expression for the size in bits of the type `int' on the target machine.
428 If you don't define this, the default is one word. */
429 #define INT_TYPE_SIZE 32
431 /* A C expression for the size in bits of the type `short' on the target
432 machine. If you don't define this, the default is half a word. (If this
433 would be less than one storage unit, it is rounded up to one unit.) */
434 #define SHORT_TYPE_SIZE 16
436 /* A C expression for the size in bits of the type `long' on the target
437 machine. If you don't define this, the default is one word. */
438 /* ??? Should be 32 for ILP32 code. */
439 #define LONG_TYPE_SIZE 64
441 /* Maximum number for the size in bits of the type `long' on the target
442 machine. If this is undefined, the default is `LONG_TYPE_SIZE'. Otherwise,
443 it is the constant value that is the largest value that `LONG_TYPE_SIZE' can
444 have at run-time. This is used in `cpp'. */
445 /* ??? Should be 64 for ILP32 code. */
446 /* #define MAX_LONG_TYPE_SIZE */
448 /* A C expression for the size in bits of the type `long long' on the target
449 machine. If you don't define this, the default is two words. If you want
450 to support GNU Ada on your machine, the value of macro must be at least 64. */
451 #define LONG_LONG_TYPE_SIZE 64
453 /* A C expression for the size in bits of the type `char' on the target
454 machine. If you don't define this, the default is one quarter of a word.
455 (If this would be less than one storage unit, it is rounded up to one unit.) */
456 #define CHAR_TYPE_SIZE 8
458 /* A C expression for the size in bits of the type `float' on the target
459 machine. If you don't define this, the default is one word. */
460 #define FLOAT_TYPE_SIZE 32
462 /* A C expression for the size in bits of the type `double' on the target
463 machine. If you don't define this, the default is two words. */
464 #define DOUBLE_TYPE_SIZE 64
466 /* A C expression for the size in bits of the type `long double' on the target
467 machine. If you don't define this, the default is two words. */
468 /* ??? We have an 80 bit extended double format. */
469 #define LONG_DOUBLE_TYPE_SIZE 64
471 /* An expression whose value is 1 or 0, according to whether the type `char'
472 should be signed or unsigned by default. The user can always override this
473 default with the options `-fsigned-char' and `-funsigned-char'. */
474 #define DEFAULT_SIGNED_CHAR 1
476 /* A C expression for a string describing the name of the data type to use for
477 size values. The typedef name `size_t' is defined using the contents of the
479 /* ??? Needs to be defined for P64 code. */
480 /* #define SIZE_TYPE */
482 /* A C expression for a string describing the name of the data type to use for
483 the result of subtracting two pointers. The typedef name `ptrdiff_t' is
484 defined using the contents of the string. See `SIZE_TYPE' above for more
486 /* ??? Needs to be defined for P64 code. */
487 /* #define PTRDIFF_TYPE */
489 /* A C expression for a string describing the name of the data type to use for
490 wide characters. The typedef name `wchar_t' is defined using the contents
491 of the string. See `SIZE_TYPE' above for more information. */
492 /* #define WCHAR_TYPE */
494 /* A C expression for the size in bits of the data type for wide characters.
495 This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
496 /* #define WCHAR_TYPE_SIZE */
498 /* Maximum number for the size in bits of the data type for wide characters.
499 If this is undefined, the default is `WCHAR_TYPE_SIZE'. Otherwise, it is
500 the constant value that is the largest value that `WCHAR_TYPE_SIZE' can have
501 at run-time. This is used in `cpp'. */
502 /* #define MAX_WCHAR_TYPE_SIZE */
504 /* A C constant expression for the integer value for escape sequence
506 #define TARGET_BELL 0x7
508 /* C constant expressions for the integer values for escape sequences
509 `\b', `\t' and `\n'. */
510 #define TARGET_BS 0x8
511 #define TARGET_TAB 0x9
512 #define TARGET_NEWLINE 0xa
514 /* C constant expressions for the integer values for escape sequences
515 `\v', `\f' and `\r'. */
516 #define TARGET_VT 0xb
517 #define TARGET_FF 0xc
518 #define TARGET_CR 0xd
521 /* Register Basics */
523 /* Number of hardware registers known to the compiler.
524 We have 128 general registers, 128 floating point registers,
525 64 predicate registers, 8 branch registers, one frame pointer,
526 and several "application" registers. */
528 #define FIRST_PSEUDO_REGISTER 335
530 /* Ranges for the various kinds of registers. */
531 #define ADDL_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
532 #define GR_REGNO_P(REGNO) ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
533 #define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
534 #define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
535 #define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
536 #define GENERAL_REGNO_P(REGNO) \
537 (GR_REGNO_P (REGNO) \
538 || (REGNO) == FRAME_POINTER_REGNUM \
539 || (REGNO) == RETURN_ADDRESS_POINTER_REGNUM)
541 #define GR_REG(REGNO) ((REGNO) + 0)
542 #define FR_REG(REGNO) ((REGNO) + 128)
543 #define PR_REG(REGNO) ((REGNO) + 256)
544 #define BR_REG(REGNO) ((REGNO) + 320)
545 #define OUT_REG(REGNO) ((REGNO) + 120)
546 #define IN_REG(REGNO) ((REGNO) + 112)
547 #define LOC_REG(REGNO) ((REGNO) + 32)
549 #define AR_CCV_REGNUM 330
550 #define AR_UNAT_REGNUM 331
551 #define AR_PFS_REGNUM 332
552 #define AR_LC_REGNUM 333
553 #define AR_EC_REGNUM 334
555 #define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
556 #define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
557 #define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
559 #define AR_M_REGNO_P(REGNO) ((REGNO) == AR_CCV_REGNUM \
560 || (REGNO) == AR_UNAT_REGNUM)
561 #define AR_I_REGNO_P(REGNO) ((REGNO) >= AR_PFS_REGNUM \
562 && (REGNO) < FIRST_PSEUDO_REGISTER)
563 #define AR_REGNO_P(REGNO) ((REGNO) >= AR_CCV_REGNUM \
564 && (REGNO) < FIRST_PSEUDO_REGISTER)
567 /* ??? Don't really need two sets of macros. I like this one better because
568 it is less typing. */
569 #define R_GR(REGNO) GR_REG (REGNO)
570 #define R_FR(REGNO) FR_REG (REGNO)
571 #define R_PR(REGNO) PR_REG (REGNO)
572 #define R_BR(REGNO) BR_REG (REGNO)
574 /* An initializer that says which registers are used for fixed purposes all
575 throughout the compiled code and are therefore not available for general
579 r1: global pointer (gp)
580 r12: stack pointer (sp)
581 r13: thread pointer (tp)
585 fp: eliminable frame pointer */
587 /* The last 16 stacked regs are reserved for the 8 input and 8 output
590 #define FIXED_REGISTERS \
591 { /* General registers. */ \
592 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
593 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
594 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
595 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
596 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
597 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
598 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
599 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
600 /* Floating-point registers. */ \
601 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
602 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
603 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
604 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
605 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
606 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
607 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
608 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
609 /* Predicate registers. */ \
610 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
611 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
612 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
613 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
614 /* Branch registers. */ \
615 0, 0, 0, 0, 0, 0, 0, 0, \
616 /*FP RA CCV UNAT PFS LC EC */ \
617 1, 1, 1, 1, 1, 0, 1 \
620 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
621 (in general) by function calls as well as for fixed registers. This
622 macro therefore identifies the registers that are not available for
623 general allocation of values that must live across function calls. */
625 #define CALL_USED_REGISTERS \
626 { /* General registers. */ \
627 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
628 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
629 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
630 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
631 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
632 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
633 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
634 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
635 /* Floating-point registers. */ \
636 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
637 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
638 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
639 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
640 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
641 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
642 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
643 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
644 /* Predicate registers. */ \
645 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
646 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
647 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
648 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
649 /* Branch registers. */ \
650 1, 0, 0, 0, 0, 0, 1, 1, \
651 /*FP RA CCV UNAT PFS LC EC */ \
652 1, 1, 1, 1, 1, 0, 1 \
655 /* Define this macro if the target machine has register windows. This C
656 expression returns the register number as seen by the called function
657 corresponding to the register number OUT as seen by the calling function.
658 Return OUT if register number OUT is not an outbound register. */
660 #define INCOMING_REGNO(OUT) \
661 ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
663 /* Define this macro if the target machine has register windows. This C
664 expression returns the register number as seen by the calling function
665 corresponding to the register number IN as seen by the called function.
666 Return IN if register number IN is not an inbound register. */
668 #define OUTGOING_REGNO(IN) \
669 ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
671 /* Define this macro if the target machine has register windows. This
672 C expression returns true if the register is call-saved but is in the
675 #define LOCAL_REGNO(REGNO) \
676 (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
678 /* Add any extra modes needed to represent the condition code.
680 CCImode is used to mark a single predicate register instead
681 of a register pair. This is currently only used in reg_raw_mode
682 so that flow doesn't do something stupid. */
684 #define EXTRA_CC_MODES CC(CCImode, "CCI")
686 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
687 return the mode to be used for the comparison. Must be defined if
688 EXTRA_CC_MODES is defined. */
690 #define SELECT_CC_MODE(OP,X,Y) CCmode
692 /* Order of allocation of registers */
694 /* If defined, an initializer for a vector of integers, containing the numbers
695 of hard registers in the order in which GNU CC should prefer to use them
696 (from most preferred to least).
698 If this macro is not defined, registers are used lowest numbered first (all
701 One use of this macro is on machines where the highest numbered registers
702 must always be saved and the save-multiple-registers instruction supports
703 only sequences of consecutive registers. On such machines, define
704 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
705 allocatable register first. */
707 /* ??? Should the GR return value registers come before or after the rest
708 of the caller-save GRs? */
710 #define REG_ALLOC_ORDER \
712 /* Caller-saved general registers. */ \
713 R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
714 R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
715 R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
716 R_GR (30), R_GR (31), \
717 /* Output registers. */ \
718 R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
719 R_GR (126), R_GR (127), \
720 /* Caller-saved general registers, also used for return values. */ \
721 R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
722 /* addl caller-saved general registers. */ \
723 R_GR (2), R_GR (3), \
724 /* Caller-saved FP registers. */ \
725 R_FR (6), R_FR (7), \
726 /* Caller-saved FP registers, used for parameters and return values. */ \
727 R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
728 R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
729 /* Rotating caller-saved FP registers. */ \
730 R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
731 R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
732 R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
733 R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
734 R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
735 R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
736 R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
737 R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
738 R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
739 R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
740 R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
741 R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
742 R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
743 R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
744 R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
745 R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
746 R_FR (126), R_FR (127), \
747 /* Caller-saved predicate registers. */ \
748 R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
749 R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
750 /* Rotating caller-saved predicate registers. */ \
751 R_PR (16), R_PR (17), \
752 R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
753 R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
754 R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
755 R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
756 R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
757 R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
758 R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
759 R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
760 /* Caller-saved branch registers. */ \
761 R_BR (6), R_BR (7), \
763 /* Stacked callee-saved general registers. */ \
764 R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
765 R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
766 R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
767 R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
768 R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
769 R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
770 R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
771 R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
772 R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
773 R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
774 R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
775 R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
776 R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
778 /* Input registers. */ \
779 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
780 R_GR (118), R_GR (119), \
781 /* Callee-saved general registers. */ \
782 R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
783 /* Callee-saved FP registers. */ \
784 R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
785 R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
786 R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
787 R_FR (30), R_FR (31), \
788 /* Callee-saved predicate registers. */ \
789 R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
790 /* Callee-saved branch registers. */ \
791 R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
793 /* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
794 R_GR (109), R_GR (110), R_GR (111), \
796 /* Special general registers. */ \
797 R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
798 /* Special FP registers. */ \
799 R_FR (0), R_FR (1), \
800 /* Special predicate registers. */ \
802 /* Special branch registers. */ \
804 /* Other fixed registers. */ \
805 FRAME_POINTER_REGNUM, RETURN_ADDRESS_POINTER_REGNUM, \
806 AR_CCV_REGNUM, AR_UNAT_REGNUM, AR_PFS_REGNUM, AR_LC_REGNUM, \
810 /* How Values Fit in Registers */
812 /* A C expression for the number of consecutive hard registers, starting at
813 register number REGNO, required to hold a value of mode MODE. */
815 /* ??? x86 80-bit FP values only require 1 register. */
816 /* ??? We say that CCmode values require two registers. This allows us to
817 easily store the normal and inverted values. We use CCImode to indicate
818 a single predicate register. */
820 #define HARD_REGNO_NREGS(REGNO, MODE) \
821 ((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
822 : PR_REGNO_P (REGNO) && (MODE) == CCmode ? 2 \
823 : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
824 : FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1 \
825 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
827 /* A C expression that is nonzero if it is permissible to store a value of mode
828 MODE in hard register number REGNO (or in several registers starting with
831 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
832 (FR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) != MODE_CC \
833 : PR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
834 : GR_REGNO_P (REGNO) ? (MODE) != XFmode && (MODE) != CCImode \
835 : AR_REGNO_P (REGNO) ? (MODE) == DImode \
838 /* A C expression that is nonzero if it is desirable to choose register
839 allocation so as to avoid move instructions between a value of mode MODE1
840 and a value of mode MODE2.
842 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
843 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
845 /* ??? If the comments are true, then this must be zero if one mode is CCmode,
846 INTEGRAL_MODE_P or FLOAT_MODE_P and the other is not. Otherwise, it is
848 /* Don't tie integer and FP modes, as that causes us to get integer registers
849 allocated for FP instructions. XFmode only supported in FP registers at
850 the moment, so we can't tie it with any other modes. */
851 #define MODES_TIEABLE_P(MODE1, MODE2) \
852 ((GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) \
853 && (((MODE1) == XFmode) == ((MODE2) == XFmode)))
855 /* Define this macro if the compiler should avoid copies to/from CCmode
856 registers. You should only define this macro if support fo copying to/from
857 CCmode is incomplete. */
858 /* ??? CCmode copies are very expensive, so we might want this defined. */
859 /* #define AVOID_CCMODE_COPIES */
862 /* Handling Leaf Functions */
864 /* A C initializer for a vector, indexed by hard register number, which
865 contains 1 for a register that is allowable in a candidate for leaf function
867 /* ??? This might be useful. */
868 /* #define LEAF_REGISTERS */
870 /* A C expression whose value is the register number to which REGNO should be
871 renumbered, when a function is treated as a leaf function. */
872 /* ??? This might be useful. */
873 /* #define LEAF_REG_REMAP(REGNO) */
876 /* Register Classes */
878 /* An enumeral type that must be defined with all the register class names as
879 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
880 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
881 which is not a register class but rather tells how many classes there
883 /* ??? When compiling without optimization, it is possible for the only use of
884 a pseudo to be a parameter load from the stack with a REG_EQUIV note.
885 Regclass handles this case specially and does not assign any costs to the
886 pseudo. The pseudo then ends up using the last class before ALL_REGS.
887 Thus we must not let either PR_REGS or BR_REGS be the last class. The
888 testcase for this is gcc.c-torture/execute/va-arg-7.c. */
904 #define GENERAL_REGS GR_REGS
906 /* The number of distinct register classes. */
907 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
909 /* An initializer containing the names of the register classes as C string
910 constants. These names are used in writing some of the debugging dumps. */
911 #define REG_CLASS_NAMES \
912 { "NO_REGS", "PR_REGS", "BR_REGS", "ADDL_REGS", "GR_REGS", \
913 "FR_REGS", "GR_AND_FR_REGS", "AR_M_REGS", "AR_I_REGS", \
916 /* An initializer containing the contents of the register classes, as integers
917 which are bit masks. The Nth integer specifies the contents of class N.
918 The way the integer MASK is interpreted is that register R is in the class
919 if `MASK & (1 << R)' is 1. */
920 #define REG_CLASS_CONTENTS \
923 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
924 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
925 0x00000000, 0x00000000, 0x0000 }, \
927 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
928 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
929 0xFFFFFFFF, 0xFFFFFFFF, 0x0000 }, \
931 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
932 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
933 0x00000000, 0x00000000, 0x00FF }, \
935 { 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
936 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
937 0x00000000, 0x00000000, 0x0000 }, \
939 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
940 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
941 0x00000000, 0x00000000, 0x0300 }, \
943 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
944 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
945 0x00000000, 0x00000000, 0x0000 }, \
946 /* GR_AND_FR_REGS. */ \
947 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
948 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
949 0x00000000, 0x00000000, 0x0300 }, \
951 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
952 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
953 0x00000000, 0x00000000, 0x0C00 }, \
955 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
956 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
957 0x00000000, 0x00000000, 0x7000 }, \
959 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
960 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
961 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFF }, \
964 /* A C expression whose value is a register class containing hard register
965 REGNO. In general there is more than one such class; choose a class which
966 is "minimal", meaning that no smaller class also contains the register. */
967 /* The NO_REGS case is primarily for the benefit of rws_access_reg, which
968 may call here with private (invalid) register numbers, such as
970 #define REGNO_REG_CLASS(REGNO) \
971 (ADDL_REGNO_P (REGNO) ? ADDL_REGS \
972 : GENERAL_REGNO_P (REGNO) ? GR_REGS \
973 : FR_REGNO_P (REGNO) ? FR_REGS \
974 : PR_REGNO_P (REGNO) ? PR_REGS \
975 : BR_REGNO_P (REGNO) ? BR_REGS \
976 : AR_M_REGNO_P (REGNO) ? AR_M_REGS \
977 : AR_I_REGNO_P (REGNO) ? AR_I_REGS \
980 /* A macro whose definition is the name of the class to which a valid base
981 register must belong. A base register is one used in an address which is
982 the register value plus a displacement. */
983 #define BASE_REG_CLASS GENERAL_REGS
985 /* A macro whose definition is the name of the class to which a valid index
986 register must belong. An index register is one used in an address where its
987 value is either multiplied by a scale factor or added to another register
988 (as well as added to a displacement). */
989 #define INDEX_REG_CLASS NO_REGS
991 /* A C expression which defines the machine-dependent operand constraint
992 letters for register classes. If CHAR is such a letter, the value should be
993 the register class corresponding to it. Otherwise, the value should be
994 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
995 will not be passed to this macro; you do not need to handle it. */
997 #define REG_CLASS_FROM_LETTER(CHAR) \
998 ((CHAR) == 'f' ? FR_REGS \
999 : (CHAR) == 'a' ? ADDL_REGS \
1000 : (CHAR) == 'b' ? BR_REGS \
1001 : (CHAR) == 'c' ? PR_REGS \
1002 : (CHAR) == 'd' ? AR_M_REGS \
1003 : (CHAR) == 'e' ? AR_I_REGS \
1006 /* A C expression which is nonzero if register number NUM is suitable for use
1007 as a base register in operand addresses. It may be either a suitable hard
1008 register or a pseudo register that has been allocated such a hard reg. */
1009 #define REGNO_OK_FOR_BASE_P(REGNO) \
1010 (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
1012 /* A C expression which is nonzero if register number NUM is suitable for use
1013 as an index register in operand addresses. It may be either a suitable hard
1014 register or a pseudo register that has been allocated such a hard reg. */
1015 #define REGNO_OK_FOR_INDEX_P(NUM) 0
1017 /* A C expression that places additional restrictions on the register class to
1018 use when it is necessary to copy value X into a register in class CLASS.
1019 The value is a register class; perhaps CLASS, or perhaps another, smaller
1022 /* Don't allow volatile mem reloads into floating point registers. This
1023 is defined to force reload to choose the r/m case instead of the f/f case
1024 when reloading (set (reg fX) (mem/v)). */
1026 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
1027 ((CLASS == FR_REGS && GET_CODE (X) == MEM && MEM_VOLATILE_P (X)) \
1031 /* You should define this macro to indicate to the reload phase that it may
1032 need to allocate at least one register for a reload in addition to the
1033 register to contain the data. Specifically, if copying X to a register
1034 CLASS in MODE requires an intermediate register, you should define this
1035 to return the largest register class all of whose registers can be used
1036 as intermediate registers or scratch registers. */
1038 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
1039 ia64_secondary_reload_class (CLASS, MODE, X)
1041 /* Certain machines have the property that some registers cannot be copied to
1042 some other registers without using memory. Define this macro on those
1043 machines to be a C expression that is non-zero if objects of mode M in
1044 registers of CLASS1 can only be copied to registers of class CLASS2 by
1045 storing a register of CLASS1 into memory and loading that memory location
1046 into a register of CLASS2. */
1047 /* ??? We may need this for XFmode moves between FR and GR regs. Using
1048 getf.sig/getf.exp almost works, but the result in the GR regs is not
1049 properly formatted and has two extra bits. */
1050 /* #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, M) */
1052 /* A C expression for the maximum number of consecutive registers of
1053 class CLASS needed to hold a value of mode MODE.
1054 This is closely related to the macro `HARD_REGNO_NREGS'. */
1056 #define CLASS_MAX_NREGS(CLASS, MODE) \
1057 ((MODE) == CCmode && (CLASS) == PR_REGS ? 2 \
1058 : ((CLASS) == FR_REGS && (MODE) == XFmode) ? 1 \
1059 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1061 /* If defined, gives a class of registers that cannot be used as the
1062 operand of a SUBREG that changes the mode of the object illegally. */
1064 #define CLASS_CANNOT_CHANGE_MODE FR_REGS
1066 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
1068 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) 1
1070 /* A C expression that defines the machine-dependent operand constraint
1071 letters (`I', `J', `K', .. 'P') that specify particular ranges of
1074 /* 14 bit signed immediate for arithmetic instructions. */
1075 #define CONST_OK_FOR_I(VALUE) \
1076 ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
1077 /* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */
1078 #define CONST_OK_FOR_J(VALUE) \
1079 ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
1080 /* 8 bit signed immediate for logical instructions. */
1081 #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
1082 /* 8 bit adjusted signed immediate for compare pseudo-ops. */
1083 #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
1084 /* 6 bit unsigned immediate for shift counts. */
1085 #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
1086 /* 9 bit signed immediate for load/store post-increments. */
1087 #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
1088 /* 0 for r0. Used by Linux kernel, do not change. */
1089 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1090 /* 0 or -1 for dep instruction. */
1091 #define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1)
1093 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1094 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \
1095 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
1096 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
1097 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
1098 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
1099 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
1100 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
1101 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
1104 /* A C expression that defines the machine-dependent operand constraint letters
1105 (`G', `H') that specify particular ranges of `const_double' values. */
1107 /* 0.0 and 1.0 for fr0 and fr1. */
1108 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1109 ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
1110 || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))
1112 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1113 ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0)
1115 /* A C expression that defines the optional machine-dependent constraint
1116 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1117 types of operands, usually memory references, for the target machine. */
1119 #define CONSTRAINT_OK_FOR_Q(VALUE) \
1120 (memory_operand((VALUE), VOIDmode) && ! MEM_VOLATILE_P (VALUE))
1122 #define EXTRA_CONSTRAINT(VALUE, C) \
1123 ((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) : 0)
1125 /* Basic Stack Layout */
1127 /* Define this macro if pushing a word onto the stack moves the stack pointer
1128 to a smaller address. */
1129 #define STACK_GROWS_DOWNWARD 1
1131 /* Define this macro if the addresses of local variable slots are at negative
1132 offsets from the frame pointer. */
1133 /* #define FRAME_GROWS_DOWNWARD */
1135 /* Offset from the frame pointer to the first local variable slot to
1137 #define STARTING_FRAME_OFFSET 0
1139 /* Offset from the stack pointer register to the first location at which
1140 outgoing arguments are placed. If not specified, the default value of zero
1141 is used. This is the proper value for most machines. */
1142 /* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
1143 #define STACK_POINTER_OFFSET 16
1145 /* Offset from the argument pointer register to the first argument's address.
1146 On some machines it may depend on the data type of the function. */
1147 #define FIRST_PARM_OFFSET(FUNDECL) 0
1149 /* A C expression whose value is RTL representing the value of the return
1150 address for the frame COUNT steps up from the current frame, after the
1153 /* ??? Frames other than zero would likely require interpreting the frame
1154 unwind info, so we don't try to support them. We would also need to define
1155 DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
1157 #define RETURN_ADDR_RTX(COUNT, FRAME) \
1158 ((COUNT) == 0 ? return_address_pointer_rtx : const0_rtx)
1160 /* A C expression whose value is RTL representing the location of the incoming
1161 return address at the beginning of any function, before the prologue. This
1162 RTL is either a `REG', indicating that the return value is saved in `REG',
1163 or a `MEM' representing a location in the stack. This enables DWARF2
1164 unwind info for C++ EH. */
1165 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
1167 /* ??? This is not defined because of three problems.
1168 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte.
1169 The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be
1170 worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise
1171 unused register number.
1172 2) dwarf2out_frame_debug core dumps while processing prologue insns. We
1173 need to refine which insns have RTX_FRAME_RELATED_P set and which don't.
1174 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO
1175 to zero, despite what the documentation implies, because it is tested in
1176 a few places with #ifdef instead of #if. */
1177 #undef INCOMING_RETURN_ADDR_RTX
1179 /* A C expression whose value is an integer giving the offset, in bytes, from
1180 the value of the stack pointer register to the top of the stack frame at the
1181 beginning of any function, before the prologue. The top of the frame is
1182 defined to be the value of the stack pointer in the previous frame, just
1183 before the call instruction. */
1184 #define INCOMING_FRAME_SP_OFFSET 0
1187 /* Register That Address the Stack Frame. */
1189 /* The register number of the stack pointer register, which must also be a
1190 fixed register according to `FIXED_REGISTERS'. On most machines, the
1191 hardware determines which register this is. */
1193 #define STACK_POINTER_REGNUM 12
1195 /* The register number of the frame pointer register, which is used to access
1196 automatic variables in the stack frame. On some machines, the hardware
1197 determines which register this is. On other machines, you can choose any
1198 register you wish for this purpose. */
1200 #define FRAME_POINTER_REGNUM 328
1202 /* Base register for access to local variables of the function. */
1203 #define HARD_FRAME_POINTER_REGNUM LOC_REG (79)
1205 /* The register number of the arg pointer register, which is used to access the
1206 function's argument list. */
1207 /* r0 won't otherwise be used, so put the always eliminated argument pointer
1209 #define ARG_POINTER_REGNUM R_GR(0)
1211 /* The register number for the return address register. For IA-64, this
1212 is not actually a pointer as the name suggests, but that's a name that
1213 gen_rtx_REG already takes care to keep unique. We modify
1214 return_address_pointer_rtx in ia64_expand_prologue to reference the
1215 final output regnum. */
1216 #define RETURN_ADDRESS_POINTER_REGNUM 329
1218 /* Register numbers used for passing a function's static chain pointer. */
1219 /* ??? The ABI sez the static chain should be passed as a normal parameter. */
1220 #define STATIC_CHAIN_REGNUM 15
1222 /* Eliminating the Frame Pointer and the Arg Pointer */
1224 /* A C expression which is nonzero if a function must have and use a frame
1225 pointer. This expression is evaluated in the reload pass. If its value is
1226 nonzero the function will have a frame pointer. */
1227 #define FRAME_POINTER_REQUIRED 0
1229 /* Show we can debug even without a frame pointer. */
1230 #define CAN_DEBUG_WITHOUT_FP
1232 /* If defined, this macro specifies a table of register pairs used to eliminate
1233 unneeded registers that point into the stack frame. */
1235 #define ELIMINABLE_REGS \
1237 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1238 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1239 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1240 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
1241 {RETURN_ADDRESS_POINTER_REGNUM, BR_REG (0)}, \
1244 /* A C expression that returns non-zero if the compiler is allowed to try to
1245 replace register number FROM with register number TO. The frame pointer
1246 is automatically handled. */
1248 #define CAN_ELIMINATE(FROM, TO) \
1249 (TO == BR_REG (0) ? current_function_is_leaf : 1)
1251 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
1252 specifies the initial difference between the specified pair of
1253 registers. This macro must be defined if `ELIMINABLE_REGS' is
1255 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1256 ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
1258 /* Passing Function Arguments on the Stack */
1260 /* Define this macro if an argument declared in a prototype as an integral type
1261 smaller than `int' should actually be passed as an `int'. In addition to
1262 avoiding errors in certain cases of mismatch, it also makes for better code
1263 on certain machines. */
1264 /* ??? Investigate. */
1265 /* #define PROMOTE_PROTOTYPES */
1267 /* If defined, the maximum amount of space required for outgoing arguments will
1268 be computed and placed into the variable
1269 `current_function_outgoing_args_size'. */
1271 #define ACCUMULATE_OUTGOING_ARGS 1
1273 /* A C expression that should indicate the number of bytes of its own arguments
1274 that a function pops on returning, or 0 if the function pops no arguments
1275 and the caller must therefore pop them all after the function returns. */
1277 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
1280 /* Function Arguments in Registers */
1282 #define MAX_ARGUMENT_SLOTS 8
1283 #define MAX_INT_RETURN_SLOTS 4
1284 #define GR_ARG_FIRST IN_REG (0)
1285 #define GR_RET_FIRST GR_REG (8)
1286 #define GR_RET_LAST GR_REG (11)
1287 #define FR_ARG_FIRST FR_REG (8)
1288 #define FR_RET_FIRST FR_REG (8)
1289 #define FR_RET_LAST FR_REG (15)
1290 #define AR_ARG_FIRST OUT_REG (0)
1292 /* A C expression that controls whether a function argument is passed in a
1293 register, and which register. */
1295 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1296 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
1298 /* Define this macro if the target machine has "register windows", so that the
1299 register in which a function sees an arguments is not necessarily the same
1300 as the one in which the caller passed the argument. */
1302 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1303 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
1305 /* A C expression for the number of words, at the beginning of an argument,
1306 must be put in registers. The value must be zero for arguments that are
1307 passed entirely in registers or that are entirely pushed on the stack. */
1309 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1310 ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1312 /* A C expression that indicates when an argument must be passed by reference.
1313 If nonzero for an argument, a copy of that argument is made in memory and a
1314 pointer to the argument is passed instead of the argument itself. The
1315 pointer is passed in whatever way is appropriate for passing a pointer to
1318 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0
1320 /* A C type for declaring a variable that is used as the first argument of
1321 `FUNCTION_ARG' and other related values. For some target machines, the type
1322 `int' suffices and can hold the number of bytes of argument so far. */
1324 typedef struct ia64_args
1326 int words
; /* # words of arguments so far */
1327 int fp_regs
; /* # FR registers used so far */
1328 int prototype
; /* whether function prototyped */
1331 /* A C statement (sans semicolon) for initializing the variable CUM for the
1332 state at the beginning of the argument list. */
1334 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
1337 (CUM).fp_regs = 0; \
1338 (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
1341 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1342 arguments for the function being compiled. If this macro is undefined,
1343 `INIT_CUMULATIVE_ARGS' is used instead. */
1345 /* We set prototype to true so that we never try to return a PARALLEL from
1347 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1350 (CUM).fp_regs = 0; \
1351 (CUM).prototype = 1; \
1354 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1355 advance past an argument in the argument list. The values MODE, TYPE and
1356 NAMED describe that argument. Once this is done, the variable CUM is
1357 suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
1359 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1360 ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1362 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1363 argument with the specified mode and type. */
1365 /* Arguments larger than 64 bits require 128 bit alignment. */
1367 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1368 (((((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1369 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) > 1 ? 128 : PARM_BOUNDARY)
1371 /* A C expression that is nonzero if REGNO is the number of a hard register in
1372 which function arguments are sometimes passed. This does *not* include
1373 implicit arguments such as the static chain and the structure-value address.
1374 On many machines, no registers can be used for this purpose since all
1375 function arguments are pushed on the stack. */
1376 #define FUNCTION_ARG_REGNO_P(REGNO) \
1377 (((REGNO) >= GR_ARG_FIRST && (REGNO) < (GR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
1378 || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
1380 /* Implement `va_start' for varargs and stdarg. */
1381 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1382 ia64_va_start (stdarg, valist, nextarg)
1384 /* Implement `va_arg'. */
1385 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1386 ia64_va_arg (valist, type)
1388 /* How Scalar Function Values are Returned */
1390 /* A C expression to create an RTX representing the place where a function
1391 returns a value of data type VALTYPE. */
1393 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1394 ia64_function_value (VALTYPE, FUNC)
1396 /* A C expression to create an RTX representing the place where a library
1397 function returns a value of mode MODE. */
1399 #define LIBCALL_VALUE(MODE) \
1400 gen_rtx_REG (MODE, \
1401 ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
1402 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
1403 ? FR_RET_FIRST : GR_RET_FIRST))
1405 /* A C expression that is nonzero if REGNO is the number of a hard register in
1406 which the values of called function may come back. */
1408 #define FUNCTION_VALUE_REGNO_P(REGNO) \
1409 (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
1410 || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
1413 /* How Large Values are Returned */
1415 /* A nonzero value says to return the function value in memory, just as large
1416 structures are always returned. */
1418 #define RETURN_IN_MEMORY(TYPE) \
1419 ia64_return_in_memory (TYPE)
1421 /* If you define this macro to be 0, then the conventions used for structure
1422 and union return values are decided by the `RETURN_IN_MEMORY' macro. */
1424 #define DEFAULT_PCC_STRUCT_RETURN 0
1426 /* If the structure value address is passed in a register, then
1427 `STRUCT_VALUE_REGNUM' should be the number of that register. */
1429 #define STRUCT_VALUE_REGNUM GR_REG (8)
1432 /* Caller-Saves Register Allocation */
1434 /* A C expression to determine whether it is worthwhile to consider placing a
1435 pseudo-register in a call-clobbered hard register and saving and restoring
1436 it around each function call. The expression should be 1 when this is worth
1437 doing, and 0 otherwise.
1439 If you don't define this macro, a default is used which is good on most
1440 machines: `4 * CALLS < REFS'. */
1441 /* ??? Investigate. */
1442 /* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
1445 /* Function Entry and Exit */
1447 /* A C compound statement that outputs the assembler code for entry to a
1450 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1451 ia64_function_prologue (FILE, SIZE)
1453 /* This macro notes the end of the prologue. */
1455 #define FUNCTION_END_PROLOGUE(FILE) ia64_output_end_prologue (FILE)
1457 /* Define this macro as a C expression that is nonzero if the return
1458 instruction or the function epilogue ignores the value of the stack pointer;
1459 in other words, if it is safe to delete an instruction to adjust the stack
1460 pointer before a return from the function. */
1462 #define EXIT_IGNORE_STACK 1
1464 /* Define this macro as a C expression that is nonzero for registers
1465 used by the epilogue or the `return' pattern. */
1467 #define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
1469 /* A C compound statement that outputs the assembler code for exit from a
1472 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1473 ia64_function_epilogue (FILE, SIZE)
1475 /* Output at beginning of assembler file. */
1477 #define ASM_FILE_START(FILE) \
1478 ia64_file_start (FILE)
1480 /* A C compound statement that outputs the assembler code for a thunk function,
1481 used to implement C++ virtual function calls with multiple inheritance. */
1483 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1485 if (CONST_OK_FOR_I (DELTA)) \
1486 fprintf (FILE, "\tadds r32 = %d, r32\n", (DELTA)); \
1489 if (CONST_OK_FOR_J (DELTA)) \
1490 fprintf (FILE, "\taddl r2 = %d, r0\n", (DELTA)); \
1492 fprintf (FILE, "\tmovl r2 = %d\n", (DELTA)); \
1493 fprintf (FILE, "\t;;\n"); \
1494 fprintf (FILE, "\tadd r32 = r2, r32\n"); \
1496 fprintf (FILE, "\tbr "); \
1497 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
1498 fprintf (FILE, "\n"); \
1502 /* Generating Code for Profiling. */
1504 /* A C statement or compound statement to output to FILE some assembler code to
1505 call the profiling subroutine `mcount'. */
1507 /* ??? Unclear if this will actually work. No way to test this currently. */
1509 #define FUNCTION_PROFILER(FILE, LABELNO) \
1512 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", LABELNO); \
1513 fputs ("\taddl r16 = @ltoff(", FILE); \
1514 assemble_name (FILE, buf); \
1515 fputs ("), gp\n", FILE); \
1516 fputs ("\tmov r17 = r1;;\n", FILE); \
1517 fputs ("\tld8 out0 = [r16]\n", FILE); \
1518 fputs ("\tmov r18 = b0\n", FILE); \
1519 fputs ("\tbr.call.sptk.many rp = mcount;;\n", FILE); \
1520 fputs ("\tmov b0 = r18\n", FILE); \
1521 fputs ("\tmov r1 = r17;;\n", FILE); \
1524 /* A C statement or compound statement to output to FILE some assembler code to
1525 initialize basic-block profiling for the current object module. */
1527 /* ??? Unclear if this will actually work. No way to test this currently. */
1529 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1531 int labelno = LABELNO; \
1532 switch (profile_block_flag) \
1535 fputs ("\taddl r16 = @ltoff(LPBX0), gp\n", FILE); \
1536 fprintf (FILE, "\tmov out1 = %d;;\n", labelno); \
1537 fputs ("\tld8 out0 = [r16]\n", FILE); \
1538 fputs ("\tmov r17 = r1\n", FILE); \
1539 fputs ("\tmov r18 = b0\n", FILE); \
1540 fputs ("\tbr.call.sptk.many rp = __bb_init_trace_func;;\n", FILE);\
1541 fputs ("\tmov r1 = r17\n", FILE); \
1542 fputs ("\tmov b0 = r18;;\n", FILE); \
1545 fputs ("\taddl r16 = @ltoff(LPBX0), gp;;\n", FILE); \
1546 fputs ("\tld8 out0 = [r16];;\n", FILE); \
1547 fputs ("\tld8 r17 = [out0];;\n", FILE); \
1548 fputs ("\tcmp.eq p6, p0 = r0, r17;;\n", FILE); \
1549 fputs ("(p6)\tmov r16 = r1\n", FILE); \
1550 fputs ("(p6)\tmov r17 = b0\n", FILE); \
1551 fputs ("(p6)\tbr.call.sptk.many rp = __bb_init_func;;\n", FILE); \
1552 fputs ("(p6)\tmov r1 = r16\n", FILE); \
1553 fputs ("(p6)\tmov b0 = r17;;\n", FILE); \
1558 /* A C statement or compound statement to output to FILE some assembler code to
1559 increment the count associated with the basic block number BLOCKNO. */
1561 /* ??? This can't work unless we mark some registers as fixed, so that we
1562 can use them as temporaries in this macro. We need two registers for -a
1563 profiling and 4 registers for -ax profiling. */
1565 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1567 int blockn = BLOCKNO; \
1568 switch (profile_block_flag) \
1571 fputs ("\taddl r2 = @ltoff(__bb), gp\n", FILE); \
1572 fputs ("\taddl r3 = @ltoff(LPBX0), gp;;\n", FILE); \
1573 fprintf (FILE, "\tmov r9 = %d\n", blockn); \
1574 fputs ("\tld8 r2 = [r2]\n", FILE); \
1575 fputs ("\tld8 r3 = [r3];;\n", FILE); \
1576 fputs ("\tadd r8 = 8, r2\n", FILE); \
1577 fputs ("\tst8 [r2] = r9;;\n", FILE); \
1578 fputs ("\tst8 [r8] = r3\n", FILE); \
1579 fputs ("\tbr.call.sptk.many rp = __bb_trace_func\n", FILE); \
1583 fputs ("\taddl r2 = @ltoff(LPBX2), gp;;\n", FILE); \
1584 fputs ("\tld8 r2 = [r2];;\n", FILE); \
1585 fprintf (FILE, "\taddl r2 = %d, r2;;\n", 8 * blockn); \
1586 fputs ("\tld8 r3 = [r2];;\n", FILE); \
1587 fputs ("\tadd r3 = 1, r3;;\n", FILE); \
1588 fputs ("\tst8 [r2] = r3;;\n", FILE); \
1593 /* A C statement or compound statement to output to FILE assembler
1594 code to call function `__bb_trace_ret'. */
1596 /* ??? Unclear if this will actually work. No way to test this currently. */
1598 /* ??? This needs to be emitted into the epilogue. Perhaps rewrite to emit
1599 rtl and call from ia64_expand_epilogue? */
1601 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1602 fputs ("\tbr.call.sptk.many rp = __bb_trace_ret\n", FILE);
1603 #undef FUNCTION_BLOCK_PROFILER_EXIT
1605 /* A C statement or compound statement to save all registers, which may be
1606 clobbered by a function call, including condition codes. */
1608 /* ??? We would have to save 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1609 other things. This is not practical. Perhaps leave this feature (-ax)
1610 unsupported by undefining above macros? */
1612 /* #define MACHINE_STATE_SAVE(ID) */
1614 /* A C statement or compound statement to restore all registers, including
1615 condition codes, saved by `MACHINE_STATE_SAVE'. */
1617 /* ??? We would have to restore 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1618 other things. This is not practical. Perhaps leave this feature (-ax)
1619 unsupported by undefining above macros? */
1621 /* #define MACHINE_STATE_RESTORE(ID) */
1624 /* Implementing the Varargs Macros. */
1626 /* Define this macro to store the anonymous register arguments into the stack
1627 so that all the arguments appear to have been passed consecutively on the
1630 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_ARGS_SIZE, SECOND_TIME) \
1631 ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME)
1633 /* Define this macro if the location where a function argument is passed
1634 depends on whether or not it is a named argument. */
1636 #define STRICT_ARGUMENT_NAMING 1
1639 /* Trampolines for Nested Functions. */
1641 /* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
1642 the function containing a non-local goto target. */
1644 #define STACK_SAVEAREA_MODE(LEVEL) \
1645 ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
1647 /* Output assembler code for a block containing the constant parts of
1648 a trampoline, leaving space for the variable parts.
1650 The trampoline should set the static chain pointer to value placed
1651 into the trampoline and should branch to the specified routine.
1652 To make the normal indirect-subroutine calling convention work,
1653 the trampoline must look like a function descriptor; the first
1654 word being the target address and the second being the target's
1657 We abuse the concept of a global pointer by arranging for it
1658 to point to the data we need to load. The complete trampoline
1659 has the following form:
1661 +-------------------+ \
1662 TRAMP: | __ia64_trampoline | |
1663 +-------------------+ > fake function descriptor
1665 +-------------------+ /
1666 | target descriptor |
1667 +-------------------+
1669 +-------------------+
1672 /* A C expression for the size in bytes of the trampoline, as an integer. */
1674 #define TRAMPOLINE_SIZE 32
1676 /* Alignment required for trampolines, in bits. */
1678 #define TRAMPOLINE_ALIGNMENT 64
1680 /* A C statement to initialize the variable parts of a trampoline. */
1682 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
1683 ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
1685 /* Implicit Calls to Library Routines */
1687 /* ??? The ia64 linux kernel requires that we use the standard names for
1688 divide and modulo routines. However, if we aren't careful, lib1funcs.asm
1689 will be overridden by libgcc2.c. We avoid this by using different names
1690 for lib1funcs.asm modules, e.g. __divdi3 vs _divdi3. Since lib1funcs.asm
1691 goes into libgcc.a first, the linker will find it first. */
1693 /* Define this macro as a C statement that declares additional library routines
1694 renames existing ones. */
1696 /* ??? Disable the SImode divide routines for now. */
1697 #define INIT_TARGET_OPTABS \
1699 sdiv_optab->handlers[(int) SImode].libfunc = 0; \
1700 udiv_optab->handlers[(int) SImode].libfunc = 0; \
1701 smod_optab->handlers[(int) SImode].libfunc = 0; \
1702 umod_optab->handlers[(int) SImode].libfunc = 0; \
1705 /* Define this macro if GNU CC should generate calls to the System V (and ANSI
1706 C) library functions `memcpy' and `memset' rather than the BSD functions
1707 `bcopy' and `bzero'. */
1709 #define TARGET_MEM_FUNCTIONS
1712 /* Addressing Modes */
1714 /* Define this macro if the machine supports post-increment addressing. */
1716 #define HAVE_POST_INCREMENT 1
1717 #define HAVE_POST_DECREMENT 1
1718 #define HAVE_POST_MODIFY_DISP 1
1719 #define HAVE_POST_MODIFY_REG 1
1721 /* A C expression that is 1 if the RTX X is a constant which is a valid
1724 #define CONSTANT_ADDRESS_P(X) 0
1726 /* The max number of registers that can appear in a valid memory address. */
1728 #define MAX_REGS_PER_ADDRESS 2
1730 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
1731 RTX) is a legitimate memory address on the target machine for a memory
1732 operand of mode MODE. */
1734 #define LEGITIMATE_ADDRESS_REG(X) \
1735 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1736 || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
1737 && REG_OK_FOR_BASE_P (XEXP (X, 0))))
1739 #define LEGITIMATE_ADDRESS_DISP(R, X) \
1740 (GET_CODE (X) == PLUS \
1741 && rtx_equal_p (R, XEXP (X, 0)) \
1742 && (GET_CODE (XEXP (X, 1)) == REG \
1743 || (GET_CODE (XEXP (X, 1)) == CONST_INT \
1744 && INTVAL (XEXP (X, 1)) >= -256 \
1745 && INTVAL (XEXP (X, 1)) < 256)))
1747 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
1749 if (LEGITIMATE_ADDRESS_REG (X)) \
1751 else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
1752 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1753 && XEXP (X, 0) != arg_pointer_rtx) \
1755 else if (GET_CODE (X) == POST_MODIFY \
1756 && LEGITIMATE_ADDRESS_REG (XEXP (X, 0)) \
1757 && XEXP (X, 0) != arg_pointer_rtx \
1758 && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
1762 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1763 use as a base register. */
1765 #ifdef REG_OK_STRICT
1766 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1768 #define REG_OK_FOR_BASE_P(X) \
1769 (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1772 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1773 use as an index register. */
1775 #define REG_OK_FOR_INDEX_P(X) 0
1777 /* A C compound statement that attempts to replace X with a valid memory
1778 address for an operand of mode MODE.
1780 This must be present, but there is nothing useful to be done here. */
1782 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1784 /* A C statement or compound statement with a conditional `goto LABEL;'
1785 executed if memory address X (an RTX) can have different meanings depending
1786 on the machine mode of the memory reference it is used for or if the address
1787 is valid for some modes but not others. */
1789 /* ??? Strictly speaking this isn't true, because we can use any increment with
1790 any mode. Unfortunately, the RTL implies that the increment depends on the
1791 mode, so we need this for now. */
1793 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1794 if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
1797 /* A C expression that is nonzero if X is a legitimate constant for an
1798 immediate operand on the target machine. */
1800 #define LEGITIMATE_CONSTANT_P(X) \
1801 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1802 || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X)) \
1805 /* Condition Code Status */
1807 /* One some machines not all possible comparisons are defined, but you can
1808 convert an invalid comparison into a valid one. */
1809 /* ??? Investigate. See the alpha definition. */
1810 /* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
1813 /* Describing Relative Costs of Operations */
1815 /* A part of a C `switch' statement that describes the relative costs of
1816 constant RTL expressions. */
1818 /* ??? This is incomplete. */
1820 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1822 if ((X) == const0_rtx) \
1824 case CONST_DOUBLE: \
1828 return COSTS_N_INSNS (1);
1830 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. */
1832 /* ??? Should define this to get better optimized code. */
1834 /* We make divide expensive, so that divide-by-constant will be optimized to
1837 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1842 return COSTS_N_INSNS (20);
1844 /* An expression giving the cost of an addressing mode that contains ADDRESS.
1845 If not defined, the cost is computed from the ADDRESS expression and the
1846 `CONST_COSTS' values. */
1848 #define ADDRESS_COST(ADDRESS) 0
1850 /* A C expression for the cost of moving data from a register in class FROM to
1853 #define REGISTER_MOVE_COST(FROM, TO) \
1854 ia64_register_move_cost((FROM), (TO))
1856 /* A C expression for the cost of moving data of mode M between a register and
1858 /* ??? Investigate. Might get better code by defining this. */
1859 /* #define MEMORY_MOVE_COST(M,C,I) */
1861 /* A C expression for the cost of a branch instruction. A value of 1 is the
1862 default; other values are interpreted relative to that. Used by the
1863 if-conversion code as max instruction count. */
1864 /* ??? This requires investigation. The primary effect might be how
1865 many additional insn groups we run into, vs how good the dynamic
1866 branch predictor is. */
1868 #define BRANCH_COST 6
1870 /* Define this macro as a C expression which is nonzero if accessing less than
1871 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1874 #define SLOW_BYTE_ACCESS 1
1876 /* Define this macro if it is as good or better to call a constant function
1877 address than to call an address kept in a register.
1879 Indirect function calls are more expensive that direct function calls, so
1880 don't cse function addresses. */
1882 #define NO_FUNCTION_CSE
1884 /* A C statement (sans semicolon) to update the integer variable COST based on
1885 the relationship between INSN that is dependent on DEP_INSN through the
1888 /* ??? Investigate. */
1889 /* #define ADJUST_COST(INSN, LINK, DEP_INSN, COST) */
1891 /* A C statement (sans semicolon) to update the integer scheduling
1892 priority `INSN_PRIORITY(INSN)'. */
1894 /* ??? Investigate. */
1895 /* #define ADJUST_PRIORITY (INSN) */
1898 /* Dividing the output into sections. */
1900 /* A C expression whose value is a string containing the assembler operation
1901 that should precede instructions and read-only data. */
1903 #define TEXT_SECTION_ASM_OP ".text"
1905 /* A C expression whose value is a string containing the assembler operation to
1906 identify the following data as writable initialized data. */
1908 #define DATA_SECTION_ASM_OP ".data"
1910 /* If defined, a C expression whose value is a string containing the assembler
1911 operation to identify the following data as uninitialized global data. */
1913 #define BSS_SECTION_ASM_OP ".bss"
1915 /* Define this macro if jump tables (for `tablejump' insns) should be output in
1916 the text section, along with the assembler instructions. */
1918 /* ??? It is probably better for the jump tables to be in the rodata section,
1919 which is where they go by default. Unfortunately, that currently does not
1920 work, because of some problem with pcrelative relocations not getting
1921 resolved correctly. */
1922 /* ??? FIXME ??? rth says that we should use @gprel to solve this problem. */
1923 /* ??? If jump tables are in the text section, then we can use 4 byte
1924 entries instead of 8 byte entries. */
1926 #define JUMP_TABLES_IN_TEXT_SECTION 1
1928 /* Define this macro if references to a symbol must be treated differently
1929 depending on something about the variable or function named by the symbol
1930 (such as what section it is in). */
1932 #define ENCODE_SECTION_INFO(DECL) ia64_encode_section_info (DECL)
1934 /* If a variable is weakened, made one only or moved into a different
1935 section, it may be necessary to redo the section info to move the
1936 variable out of sdata. */
1938 #define REDO_SECTION_INFO_P(DECL) \
1939 ((TREE_CODE (DECL) == VAR_DECL) \
1940 && (DECL_ONE_ONLY (decl) || DECL_WEAK (decl) || DECL_COMMON (decl) \
1941 || DECL_SECTION_NAME (decl) != 0))
1943 #define SDATA_NAME_FLAG_CHAR '@'
1945 #define IA64_DEFAULT_GVALUE 8
1947 /* Decode SYM_NAME and store the real name part in VAR, sans the characters
1948 that encode section info. */
1950 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
1951 (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == SDATA_NAME_FLAG_CHAR)
1954 /* Position Independent Code. */
1956 /* The register number of the register used to address a table of static data
1957 addresses in memory. */
1959 /* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
1960 gen_rtx_REG (DImode, 1). */
1962 /* ??? Should we set flag_pic? Probably need to define
1963 LEGITIMIZE_PIC_OPERAND_P to make that work. */
1965 #define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
1967 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
1968 clobbered by calls. */
1970 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
1973 /* The Overall Framework of an Assembler File. */
1975 /* A C string constant describing how to begin a comment in the target
1976 assembler language. The compiler assumes that the comment will end at the
1979 #define ASM_COMMENT_START "//"
1981 /* A C string constant for text to be output before each `asm' statement or
1982 group of consecutive ones. */
1984 /* ??? This won't work with the Intel assembler, because it does not accept
1985 # as a comment start character. However, //APP does not work in gas, so we
1986 can't use that either. Same problem for ASM_APP_OFF below. */
1988 #define ASM_APP_ON "#APP\n"
1990 /* A C string constant for text to be output after each `asm' statement or
1991 group of consecutive ones. */
1993 #define ASM_APP_OFF "#NO_APP\n"
1996 /* Output of Data. */
1998 /* A C statement to output to the stdio stream STREAM an assembler instruction
1999 to assemble a floating-point constant of `XFmode', `DFmode', `SFmode',
2000 respectively, whose value is VALUE. */
2002 /* ??? This has not been tested. Long doubles are really 10 bytes not 12
2005 /* ??? Must reverse the word order for big-endian code? */
2007 #define ASM_OUTPUT_LONG_DOUBLE(FILE, VALUE) \
2010 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, t); \
2011 fprintf (FILE, "\tdata8 0x%08lx, 0x%08lx, 0x%08lx\n", \
2012 t[0] & 0xffffffff, t[1] & 0xffffffff, t[2] & 0xffffffff); \
2015 /* ??? Must reverse the word order for big-endian code? */
2017 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2020 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, t); \
2021 fprintf (FILE, "\tdata8 0x%08lx%08lx\n", \
2022 t[1] & 0xffffffff, t[0] & 0xffffffff); \
2025 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2028 REAL_VALUE_TO_TARGET_SINGLE (VALUE, t); \
2029 fprintf (FILE, "\tdata4 0x%lx\n", t & 0xffffffff); \
2032 /* A C statement to output to the stdio stream STREAM an assembler instruction
2033 to assemble an integer of 1, 2, 4, or 8 bytes, respectively, whose value
2036 /* This is how to output an assembler line defining a `char' constant. */
2038 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
2040 fprintf (FILE, "\t%s\t", ASM_BYTE_OP); \
2041 output_addr_const (FILE, (VALUE)); \
2042 fprintf (FILE, "\n"); \
2045 /* This is how to output an assembler line defining a `short' constant. */
2047 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
2049 fprintf (FILE, "\tdata2\t"); \
2050 output_addr_const (FILE, (VALUE)); \
2051 fprintf (FILE, "\n"); \
2054 /* This is how to output an assembler line defining an `int' constant.
2055 We also handle symbol output here. */
2057 /* ??? For ILP32, also need to handle function addresses here. */
2059 #define ASM_OUTPUT_INT(FILE, VALUE) \
2061 fprintf (FILE, "\tdata4\t"); \
2062 output_addr_const (FILE, (VALUE)); \
2063 fprintf (FILE, "\n"); \
2066 /* This is how to output an assembler line defining a `long' constant.
2067 We also handle symbol output here. */
2069 #define ASM_OUTPUT_DOUBLE_INT(FILE, VALUE) \
2071 fprintf (FILE, "\tdata8\t"); \
2072 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2073 fprintf (FILE, "@fptr("); \
2074 output_addr_const (FILE, (VALUE)); \
2075 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2076 fprintf (FILE, ")"); \
2077 fprintf (FILE, "\n"); \
2080 /* This is how to output an assembler line defining a `char' constant
2081 to an xdata segment. */
2083 #define ASM_OUTPUT_XDATA_CHAR(FILE, SECTION, VALUE) \
2085 fprintf (FILE, "\t.xdata1\t\"%s\", ", SECTION); \
2086 output_addr_const (FILE, (VALUE)); \
2087 fprintf (FILE, "\n"); \
2090 /* This is how to output an assembler line defining a `short' constant
2091 to an xdata segment. */
2093 #define ASM_OUTPUT_XDATA_SHORT(FILE, SECTION, VALUE) \
2095 fprintf (FILE, "\t.xdata2\t\"%s\", ", SECTION); \
2096 output_addr_const (FILE, (VALUE)); \
2097 fprintf (FILE, "\n"); \
2100 /* This is how to output an assembler line defining an `int' constant
2101 to an xdata segment. We also handle symbol output here. */
2103 /* ??? For ILP32, also need to handle function addresses here. */
2105 #define ASM_OUTPUT_XDATA_INT(FILE, SECTION, VALUE) \
2107 fprintf (FILE, "\t.xdata4\t\"%s\", ", SECTION); \
2108 output_addr_const (FILE, (VALUE)); \
2109 fprintf (FILE, "\n"); \
2112 /* This is how to output an assembler line defining a `long' constant
2113 to an xdata segment. We also handle symbol output here. */
2115 #define ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, SECTION, VALUE) \
2117 int need_closing_paren = 0; \
2118 fprintf (FILE, "\t.xdata8\t\"%s\", ", SECTION); \
2119 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) \
2120 && GET_CODE (VALUE) == SYMBOL_REF) \
2122 fprintf (FILE, SYMBOL_REF_FLAG (VALUE) ? "@fptr(" : "@segrel("); \
2123 need_closing_paren = 1; \
2125 output_addr_const (FILE, VALUE); \
2126 if (need_closing_paren) \
2127 fprintf (FILE, ")"); \
2128 fprintf (FILE, "\n"); \
2132 /* Output EH data to the unwind segment. */
2133 #define ASM_OUTPUT_EH_CHAR(FILE, VALUE) \
2134 ASM_OUTPUT_XDATA_CHAR(FILE, ".IA_64.unwind_info", VALUE)
2136 #define ASM_OUTPUT_EH_SHORT(FILE, VALUE) \
2137 ASM_OUTPUT_XDATA_SHORT(FILE, ".IA_64.unwind_info", VALUE)
2139 #define ASM_OUTPUT_EH_INT(FILE, VALUE) \
2140 ASM_OUTPUT_XDATA_INT(FILE, ".IA_64.unwind_info", VALUE)
2142 #define ASM_OUTPUT_EH_DOUBLE_INT(FILE, VALUE) \
2143 ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, ".IA_64.unwind_info", VALUE)
2145 /* A C statement to output to the stdio stream STREAM an assembler instruction
2146 to assemble a single byte containing the number VALUE. */
2148 #define ASM_OUTPUT_BYTE(STREAM, VALUE) \
2149 fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (int)(VALUE) & 0xff)
2151 /* These macros are defined as C string constant, describing the syntax in the
2152 assembler for grouping arithmetic expressions. */
2154 #define ASM_OPEN_PAREN "("
2155 #define ASM_CLOSE_PAREN ")"
2158 /* Output of Uninitialized Variables. */
2160 /* This is all handled by svr4.h. */
2163 /* Output and Generation of Labels. */
2165 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2166 assembler definition of a label named NAME. */
2168 /* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
2169 why ia64_asm_output_label exists. */
2171 extern int ia64_asm_output_label
;
2172 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2174 ia64_asm_output_label = 1; \
2175 assemble_name (STREAM, NAME); \
2176 fputs (":\n", STREAM); \
2177 ia64_asm_output_label = 0; \
2180 /* A C statement (sans semicolon) to output to the stdio stream STREAM some
2181 commands that will make the label NAME global; that is, available for
2182 reference from other files. */
2184 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
2186 fputs ("\t.global ", STREAM); \
2187 assemble_name (STREAM, NAME); \
2188 fputs ("\n", STREAM); \
2191 /* A C statement (sans semicolon) to output to the stdio stream STREAM any text
2192 necessary for declaring the name of an external symbol named NAME which is
2193 referenced in this compilation but not defined. */
2195 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2196 ia64_asm_output_external (FILE, DECL, NAME)
2198 /* A C statement to store into the string STRING a label whose name is made
2199 from the string PREFIX and the number NUM. */
2201 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2203 sprintf (LABEL, "*.%s%d", PREFIX, NUM); \
2206 /* A C expression to assign to OUTVAR (which is a variable of type `char *') a
2207 newly allocated string made from the string NAME and the number NUMBER, with
2208 some suitable punctuation added. */
2210 /* ??? Not sure if using a ? in the name for Intel as is safe. */
2212 #define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \
2214 (OUTVAR) = (char *) alloca (strlen (NAME) + 12); \
2215 sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'), \
2219 /* A C statement to output to the stdio stream STREAM assembler code which
2220 defines (equates) the symbol NAME to have the value VALUE. */
2222 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
2224 assemble_name (STREAM, NAME); \
2225 fputs (" = ", STREAM); \
2226 assemble_name (STREAM, VALUE); \
2227 fputc ('\n', STREAM); \
2231 /* Macros Controlling Initialization Routines. */
2233 /* This is handled by svr4.h and sysv4.h. */
2236 /* Output of Assembler Instructions. */
2238 /* A C initializer containing the assembler's names for the machine registers,
2239 each one as a C string constant. */
2241 #define REGISTER_NAMES \
2243 /* General registers. */ \
2244 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
2245 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
2246 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
2248 /* Local registers. */ \
2249 "loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \
2250 "loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \
2251 "loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \
2252 "loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \
2253 "loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \
2254 "loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \
2255 "loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \
2256 "loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \
2257 "loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \
2258 "loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \
2259 /* Input registers. */ \
2260 "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \
2261 /* Output registers. */ \
2262 "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \
2263 /* Floating-point registers. */ \
2264 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
2265 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
2266 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
2267 "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \
2268 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
2269 "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
2270 "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
2271 "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
2272 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
2273 "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
2274 "f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\
2275 "f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\
2276 "f120","f121","f122","f123","f124","f125","f126","f127", \
2277 /* Predicate registers. */ \
2278 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \
2279 "p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \
2280 "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
2281 "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
2282 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
2283 "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
2284 "p60", "p61", "p62", "p63", \
2285 /* Branch registers. */ \
2286 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \
2287 /* Frame pointer. Return address. */ \
2288 "sfp", "retaddr", "ar.ccv", "ar.unat", "ar.pfs", "ar.lc", "ar.ec", \
2291 /* If defined, a C initializer for an array of structures containing a name and
2292 a register number. This macro defines additional names for hard registers,
2293 thus allowing the `asm' option in declarations to refer to registers using
2296 #define ADDITIONAL_REGISTER_NAMES \
2298 { "gp", R_GR (1) }, \
2299 { "sp", R_GR (12) }, \
2300 { "in0", IN_REG (0) }, \
2301 { "in1", IN_REG (1) }, \
2302 { "in2", IN_REG (2) }, \
2303 { "in3", IN_REG (3) }, \
2304 { "in4", IN_REG (4) }, \
2305 { "in5", IN_REG (5) }, \
2306 { "in6", IN_REG (6) }, \
2307 { "in7", IN_REG (7) }, \
2308 { "out0", OUT_REG (0) }, \
2309 { "out1", OUT_REG (1) }, \
2310 { "out2", OUT_REG (2) }, \
2311 { "out3", OUT_REG (3) }, \
2312 { "out4", OUT_REG (4) }, \
2313 { "out5", OUT_REG (5) }, \
2314 { "out6", OUT_REG (6) }, \
2315 { "out7", OUT_REG (7) }, \
2316 { "loc0", LOC_REG (0) }, \
2317 { "loc1", LOC_REG (1) }, \
2318 { "loc2", LOC_REG (2) }, \
2319 { "loc3", LOC_REG (3) }, \
2320 { "loc4", LOC_REG (4) }, \
2321 { "loc5", LOC_REG (5) }, \
2322 { "loc6", LOC_REG (6) }, \
2323 { "loc7", LOC_REG (7) }, \
2324 { "loc8", LOC_REG (8) }, \
2325 { "loc9", LOC_REG (9) }, \
2326 { "loc10", LOC_REG (10) }, \
2327 { "loc11", LOC_REG (11) }, \
2328 { "loc12", LOC_REG (12) }, \
2329 { "loc13", LOC_REG (13) }, \
2330 { "loc14", LOC_REG (14) }, \
2331 { "loc15", LOC_REG (15) }, \
2332 { "loc16", LOC_REG (16) }, \
2333 { "loc17", LOC_REG (17) }, \
2334 { "loc18", LOC_REG (18) }, \
2335 { "loc19", LOC_REG (19) }, \
2336 { "loc20", LOC_REG (20) }, \
2337 { "loc21", LOC_REG (21) }, \
2338 { "loc22", LOC_REG (22) }, \
2339 { "loc23", LOC_REG (23) }, \
2340 { "loc24", LOC_REG (24) }, \
2341 { "loc25", LOC_REG (25) }, \
2342 { "loc26", LOC_REG (26) }, \
2343 { "loc27", LOC_REG (27) }, \
2344 { "loc28", LOC_REG (28) }, \
2345 { "loc29", LOC_REG (29) }, \
2346 { "loc30", LOC_REG (30) }, \
2347 { "loc31", LOC_REG (31) }, \
2348 { "loc32", LOC_REG (32) }, \
2349 { "loc33", LOC_REG (33) }, \
2350 { "loc34", LOC_REG (34) }, \
2351 { "loc35", LOC_REG (35) }, \
2352 { "loc36", LOC_REG (36) }, \
2353 { "loc37", LOC_REG (37) }, \
2354 { "loc38", LOC_REG (38) }, \
2355 { "loc39", LOC_REG (39) }, \
2356 { "loc40", LOC_REG (40) }, \
2357 { "loc41", LOC_REG (41) }, \
2358 { "loc42", LOC_REG (42) }, \
2359 { "loc43", LOC_REG (43) }, \
2360 { "loc44", LOC_REG (44) }, \
2361 { "loc45", LOC_REG (45) }, \
2362 { "loc46", LOC_REG (46) }, \
2363 { "loc47", LOC_REG (47) }, \
2364 { "loc48", LOC_REG (48) }, \
2365 { "loc49", LOC_REG (49) }, \
2366 { "loc50", LOC_REG (50) }, \
2367 { "loc51", LOC_REG (51) }, \
2368 { "loc52", LOC_REG (52) }, \
2369 { "loc53", LOC_REG (53) }, \
2370 { "loc54", LOC_REG (54) }, \
2371 { "loc55", LOC_REG (55) }, \
2372 { "loc56", LOC_REG (56) }, \
2373 { "loc57", LOC_REG (57) }, \
2374 { "loc58", LOC_REG (58) }, \
2375 { "loc59", LOC_REG (59) }, \
2376 { "loc60", LOC_REG (60) }, \
2377 { "loc61", LOC_REG (61) }, \
2378 { "loc62", LOC_REG (62) }, \
2379 { "loc63", LOC_REG (63) }, \
2380 { "loc64", LOC_REG (64) }, \
2381 { "loc65", LOC_REG (65) }, \
2382 { "loc66", LOC_REG (66) }, \
2383 { "loc67", LOC_REG (67) }, \
2384 { "loc68", LOC_REG (68) }, \
2385 { "loc69", LOC_REG (69) }, \
2386 { "loc70", LOC_REG (70) }, \
2387 { "loc71", LOC_REG (71) }, \
2388 { "loc72", LOC_REG (72) }, \
2389 { "loc73", LOC_REG (73) }, \
2390 { "loc74", LOC_REG (74) }, \
2391 { "loc75", LOC_REG (75) }, \
2392 { "loc76", LOC_REG (76) }, \
2393 { "loc77", LOC_REG (77) }, \
2394 { "loc78", LOC_REG (78) }, \
2395 { "loc79", LOC_REG (79) }, \
2398 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2399 for an instruction operand X. X is an RTL expression. */
2401 #define PRINT_OPERAND(STREAM, X, CODE) \
2402 ia64_print_operand (STREAM, X, CODE)
2404 /* A C expression which evaluates to true if CODE is a valid punctuation
2405 character for use in the `PRINT_OPERAND' macro. */
2407 /* ??? Keep this around for now, as we might need it later. */
2409 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2410 ((CODE) == '+' || (CODE) == ',')
2412 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2413 for an instruction operand that is a memory reference whose address is X. X
2414 is an RTL expression. */
2416 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
2417 ia64_print_operand_address (STREAM, X)
2419 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2420 `%I' options of `asm_fprintf' (see `final.c'). */
2422 #define REGISTER_PREFIX ""
2423 #define LOCAL_LABEL_PREFIX "."
2424 #define USER_LABEL_PREFIX ""
2425 #define IMMEDIATE_PREFIX ""
2428 /* Output of dispatch tables. */
2430 /* This macro should be provided on machines where the addresses in a dispatch
2431 table are relative to the table's own address. */
2433 /* ??? Depends on the pointer size. */
2435 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2436 fprintf (STREAM, "\tdata8 .L%d-.L%d\n", VALUE, REL)
2438 /* This is how to output an element of a case-vector that is absolute.
2439 (Ia64 does not use such vectors, but we must define this macro anyway.) */
2441 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) abort ()
2443 /* Define this if something special must be output at the end of a jump-table.
2444 We need to align back to a 16 byte boundary because offsets are smaller than
2447 #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) ASM_OUTPUT_ALIGN (STREAM, 4)
2449 /* Jump tables only need 8 byte alignment. */
2451 #define ADDR_VEC_ALIGN(ADDR_VEC) 3
2454 /* Assembler Commands for Exception Regions. */
2456 /* ??? This entire section of ia64.h needs to be implemented and then cleaned
2459 /* A C expression to output text to mark the start of an exception region.
2461 This macro need not be defined on most platforms. */
2462 /* #define ASM_OUTPUT_EH_REGION_BEG() */
2464 /* A C expression to output text to mark the end of an exception region.
2466 This macro need not be defined on most platforms. */
2467 /* #define ASM_OUTPUT_EH_REGION_END() */
2469 /* A C expression to switch to the section in which the main exception table is
2470 to be placed. The default is a section named `.gcc_except_table' on machines
2471 that support named sections via `ASM_OUTPUT_SECTION_NAME', otherwise if `-fpic'
2472 or `-fPIC' is in effect, the `data_section', otherwise the
2473 `readonly_data_section'. */
2474 /* #define EXCEPTION_SECTION() */
2476 /* If defined, a C string constant for the assembler operation to switch to the
2477 section for exception handling frame unwind information. If not defined,
2478 GNU CC will provide a default definition if the target supports named
2479 sections. `crtstuff.c' uses this macro to switch to the appropriate
2482 You should define this symbol if your target supports DWARF 2 frame unwind
2483 information and the default definition does not work. */
2484 #define EH_FRAME_SECTION_ASM_OP ".section\t.IA_64.unwind,\"aw\""
2486 /* A C expression that is nonzero if the normal exception table output should
2489 This macro need not be defined on most platforms. */
2490 /* #define OMIT_EH_TABLE() */
2492 /* Alternate runtime support for looking up an exception at runtime and finding
2493 the associated handler, if the default method won't work.
2495 This macro need not be defined on most platforms. */
2496 /* #define EH_TABLE_LOOKUP() */
2498 /* A C expression that decides whether or not the current function needs to
2499 have a function unwinder generated for it. See the file `except.c' for
2500 details on when to define this, and how. */
2501 /* #define DOESNT_NEED_UNWINDER */
2503 /* An rtx used to mask the return address found via RETURN_ADDR_RTX, so that it
2504 does not contain any extraneous set bits in it. */
2505 /* #define MASK_RETURN_ADDR */
2507 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
2508 information, but it does not yet work with exception handling. Otherwise,
2509 if your target supports this information (if it defines
2510 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
2511 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
2513 If this macro is defined to 1, the DWARF 2 unwinder will be the default
2514 exception handling mechanism; otherwise, setjmp/longjmp will be used by
2517 If this macro is defined to anything, the DWARF 2 unwinder will be used
2518 instead of inline unwinders and __unwind_function in the non-setjmp case. */
2519 /* #define DWARF2_UNWIND_INFO */
2522 /* Assembler Commands for Alignment. */
2524 /* The alignment (log base 2) to put in front of LABEL, which follows
2527 /* ??? Investigate. */
2529 /* ??? Emitting align directives increases the size of the line number debug
2530 info, because each .align forces use of an extended opcode. Perhaps try
2531 to fix this in the assembler? */
2533 /* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
2535 /* The desired alignment for the location counter at the beginning
2538 /* ??? Investigate. */
2539 /* #define LOOP_ALIGN(LABEL) */
2541 /* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
2542 section because it fails put zeros in the bytes that are skipped. */
2544 #define ASM_NO_SKIP_IN_TEXT 1
2546 /* A C statement to output to the stdio stream STREAM an assembler command to
2547 advance the location counter to a multiple of 2 to the POWER bytes. */
2549 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2550 fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
2553 /* Macros Affecting all Debug Formats. */
2555 /* This is handled in svr4.h and sysv4.h. */
2558 /* Specific Options for DBX Output. */
2560 /* This is handled by dbxelf.h which is included by svr4.h. */
2563 /* Open ended Hooks for DBX Output. */
2568 /* File names in DBX format. */
2573 /* Macros for SDB and Dwarf Output. */
2575 /* Define this macro if GNU CC should produce dwarf version 2 format debugging
2576 output in response to the `-g' option. */
2578 #define DWARF2_DEBUGGING_INFO
2580 /* Section names for DWARF2 debug info. */
2582 #define DEBUG_INFO_SECTION ".debug_info, \"\", \"progbits\""
2583 #define ABBREV_SECTION ".debug_abbrev, \"\", \"progbits\""
2584 #define ARANGES_SECTION ".debug_aranges, \"\", \"progbits\""
2585 #define DEBUG_LINE_SECTION ".debug_line, \"\", \"progbits\""
2586 #define PUBNAMES_SECTION ".debug_pubnames, \"\", \"progbits\""
2588 /* C string constants giving the pseudo-op to use for a sequence of
2589 2, 4, and 8 byte unaligned constants. dwarf2out.c needs these. */
2591 #define UNALIGNED_SHORT_ASM_OP "data2.ua"
2592 #define UNALIGNED_INT_ASM_OP "data4.ua"
2593 #define UNALIGNED_DOUBLE_INT_ASM_OP "data8.ua"
2595 /* We need to override the default definition for this in dwarf2out.c so that
2596 we can emit the necessary # postfix. */
2597 #define ASM_NAME_TO_STRING(STR, NAME) \
2599 if ((NAME)[0] == '*') \
2600 dyn_string_append (STR, NAME + 1); \
2604 STRIP_NAME_ENCODING (newstr, NAME); \
2605 dyn_string_append (STR, user_label_prefix); \
2606 dyn_string_append (STR, newstr); \
2607 dyn_string_append (STR, "#"); \
2612 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
2615 /* Cross Compilation and Floating Point. */
2617 /* Define to enable software floating point emulation. */
2618 #define REAL_ARITHMETIC
2621 /* Register Renaming Parameters. */
2623 /* A C expression that is nonzero if hard register number REGNO2 can be
2624 considered for use as a rename register for REGNO1 */
2626 #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
2627 ((! PR_REGNO_P (REGNO1) && ! PR_REGNO_P (REGNO2)) \
2628 ? (!call_fixed_regs [REGNO1] && !call_fixed_regs [REGNO2]) \
2630 : ((REGNO2) > 256 && ((REGNO2 & 1) == 0)) \
2633 /* Define this macro if the compiler should use extended basic blocks
2634 when renaming registers. Define this macro if the target has predicate
2637 #define RENAME_EXTENDED_BLOCKS
2640 /* Miscellaneous Parameters. */
2642 /* Define this if you have defined special-purpose predicates in the file
2643 `MACHINE.c'. For each predicate, list all rtl codes that can be in
2644 expressions matched by the predicate. */
2646 #define PREDICATE_CODES \
2647 { "call_operand", {SUBREG, REG, SYMBOL_REF}}, \
2648 { "got_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2649 { "sdata_symbolic_operand", {SYMBOL_REF, CONST}}, \
2650 { "symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2651 { "function_operand", {SYMBOL_REF}}, \
2652 { "setjmp_operand", {SYMBOL_REF}}, \
2653 { "destination_operand", {SUBREG, REG, MEM}}, \
2654 { "move_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2655 CONSTANT_P_RTX, SYMBOL_REF, CONST, LABEL_REF}}, \
2656 { "reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2657 { "reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2658 { "reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2659 { "reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \
2661 { "reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \
2663 { "reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2664 { "reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2665 { "shift_count_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2666 { "shift_32bit_count_operand", {SUBREG, REG, CONST_INT, \
2668 { "shladd_operand", {CONST_INT}}, \
2669 { "fetchadd_operand", {CONST_INT}}, \
2670 { "reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE, CONSTANT_P_RTX}}, \
2671 { "normal_comparison_operator", {EQ, NE, GT, LE, GTU, LEU}}, \
2672 { "adjusted_comparison_operator", {LT, GE, LTU, GEU}}, \
2673 { "call_multiple_values_operation", {PARALLEL}}, \
2674 { "predicate_operator", {NE, EQ}}, \
2675 { "ar_lc_reg_operand", {REG}}, \
2676 { "ar_ccv_reg_operand", {REG}},
2678 /* An alias for a machine mode name. This is the machine mode that elements of
2679 a jump-table should have. */
2681 #define CASE_VECTOR_MODE Pmode
2683 /* Define as C expression which evaluates to nonzero if the tablejump
2684 instruction expects the table to contain offsets from the address of the
2687 #define CASE_VECTOR_PC_RELATIVE 1
2689 /* Define this macro if operations between registers with integral mode smaller
2690 than a word are always performed on the entire register. */
2692 #define WORD_REGISTER_OPERATIONS
2694 /* Define this macro to be a C expression indicating when insns that read
2695 memory in MODE, an integral mode narrower than a word, set the bits outside
2696 of MODE to be either the sign-extension or the zero-extension of the data
2699 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2701 /* An alias for a tree code that should be used by default for conversion of
2702 floating point values to fixed point. */
2704 /* ??? Looks like this macro is obsolete and should be deleted everywhere. */
2706 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2708 /* An alias for a tree code that is the easiest kind of division to compile
2709 code for in the general case. */
2711 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2713 /* The maximum number of bytes that a single instruction can move quickly from
2714 memory to memory. */
2717 /* A C expression which is nonzero if on this machine it is safe to "convert"
2718 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2719 than INPREC) by merely operating on it as if it had only OUTPREC bits. */
2721 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2723 /* A C expression describing the value returned by a comparison operator with
2724 an integral mode and stored by a store-flag instruction (`sCOND') when the
2725 condition is true. */
2727 /* ??? Investigate using -1 instead of 1. */
2729 #define STORE_FLAG_VALUE 1
2731 /* An alias for the machine mode for pointers. */
2733 /* ??? This would change if we had ILP32 support. */
2735 #define Pmode DImode
2737 /* An alias for the machine mode used for memory references to functions being
2738 called, in `call' RTL expressions. */
2740 #define FUNCTION_MODE Pmode
2742 /* Define this macro to handle System V style pragmas: #pragma pack and
2743 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2746 #define HANDLE_SYSV_PRAGMA
2748 /* If defined, a C expression whose value is nonzero if IDENTIFIER with
2749 arguments ARGS is a valid machine specific attribute for TYPE. The
2750 attributes in ATTRIBUTES have previously been assigned to TYPE. */
2752 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, IDENTIFIER, ARGS) \
2753 ia64_valid_type_attribute (TYPE, ATTRIBUTES, IDENTIFIER, ARGS)
2755 /* In rare cases, correct code generation requires extra machine dependent
2756 processing between the second jump optimization pass and delayed branch
2757 scheduling. On those machines, define this macro as a C statement to act on
2758 the code starting at INSN. */
2760 #define MACHINE_DEPENDENT_REORG(INSN) ia64_reorg (INSN)
2762 /* A C expression for the maximum number of instructions to execute via
2763 conditional execution instructions instead of a branch. A value of
2764 BRANCH_COST+1 is the default if the machine does not use
2765 cc0, and 1 if it does use cc0. */
2766 /* ??? Investigate. */
2767 /* #define MAX_CONDITIONAL_EXECUTE */
2769 /* Indicate how many instructions can be issued at the same time. */
2771 /* ??? For now, we just schedule to fill bundles. */
2773 #define ISSUE_RATE 3
2775 #define IA64_UNWIND_INFO 1
2776 #define HANDLER_SECTION fprintf (asm_out_file, "\t.personality\t__ia64_personality_v1\n\t.handlerdata\n");
2777 #define IA64_UNWIND_EMIT(f,i) process_for_unwind_directive (f,i)
2779 /* This function contains machine specific function data. */
2780 struct machine_function
2782 /* The new stack pointer when unwinding from EH. */
2783 struct rtx_def
* ia64_eh_epilogue_sp
;
2785 /* The new bsp value when unwinding from EH. */
2786 struct rtx_def
* ia64_eh_epilogue_bsp
;
2788 /* The GP value save register. */
2789 struct rtx_def
* ia64_gp_save
;
2795 IA64_BUILTIN_SYNCHRONIZE
,
2797 IA64_BUILTIN_FETCH_AND_ADD_SI
,
2798 IA64_BUILTIN_FETCH_AND_SUB_SI
,
2799 IA64_BUILTIN_FETCH_AND_OR_SI
,
2800 IA64_BUILTIN_FETCH_AND_AND_SI
,
2801 IA64_BUILTIN_FETCH_AND_XOR_SI
,
2802 IA64_BUILTIN_FETCH_AND_NAND_SI
,
2804 IA64_BUILTIN_ADD_AND_FETCH_SI
,
2805 IA64_BUILTIN_SUB_AND_FETCH_SI
,
2806 IA64_BUILTIN_OR_AND_FETCH_SI
,
2807 IA64_BUILTIN_AND_AND_FETCH_SI
,
2808 IA64_BUILTIN_XOR_AND_FETCH_SI
,
2809 IA64_BUILTIN_NAND_AND_FETCH_SI
,
2811 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI
,
2812 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI
,
2814 IA64_BUILTIN_SYNCHRONIZE_SI
,
2816 IA64_BUILTIN_LOCK_TEST_AND_SET_SI
,
2818 IA64_BUILTIN_LOCK_RELEASE_SI
,
2820 IA64_BUILTIN_FETCH_AND_ADD_DI
,
2821 IA64_BUILTIN_FETCH_AND_SUB_DI
,
2822 IA64_BUILTIN_FETCH_AND_OR_DI
,
2823 IA64_BUILTIN_FETCH_AND_AND_DI
,
2824 IA64_BUILTIN_FETCH_AND_XOR_DI
,
2825 IA64_BUILTIN_FETCH_AND_NAND_DI
,
2827 IA64_BUILTIN_ADD_AND_FETCH_DI
,
2828 IA64_BUILTIN_SUB_AND_FETCH_DI
,
2829 IA64_BUILTIN_OR_AND_FETCH_DI
,
2830 IA64_BUILTIN_AND_AND_FETCH_DI
,
2831 IA64_BUILTIN_XOR_AND_FETCH_DI
,
2832 IA64_BUILTIN_NAND_AND_FETCH_DI
,
2834 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI
,
2835 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI
,
2837 IA64_BUILTIN_SYNCHRONIZE_DI
,
2839 IA64_BUILTIN_LOCK_TEST_AND_SET_DI
,
2841 IA64_BUILTIN_LOCK_RELEASE_DI
,
2844 IA64_BUILTIN_FLUSHRS
2847 /* Codes for expand_compare_and_swap and expand_swap_and_compare. */
2849 IA64_ADD_OP
, IA64_SUB_OP
, IA64_OR_OP
, IA64_AND_OP
, IA64_XOR_OP
, IA64_NAND_OP
2852 #define MD_INIT_BUILTINS do { \
2853 ia64_init_builtins (); \
2856 #define MD_EXPAND_BUILTIN(EXP, TARGET, SUBTARGET, MODE, IGNORE) \
2857 ia64_expand_builtin ((EXP), (TARGET), (SUBTARGET), (MODE), (IGNORE))
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