re PR target/44754 (m32c_pragma_memregs / m32c_pragma_address warnings)
[gcc.git] / gcc / config / m32c / jump.md
1 ;; Machine Descriptions for R8C/M16C/M32C
2 ;; Copyright (C) 2005, 2007, 2008
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by Red Hat.
5 ;;
6 ;; This file is part of GCC.
7 ;;
8 ;; GCC is free software; you can redistribute it and/or modify it
9 ;; under the terms of the GNU General Public License as published
10 ;; by the Free Software Foundation; either version 3, or (at your
11 ;; option) any later version.
12 ;;
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ;; License for more details.
17 ;;
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
21
22 ;; jump, conditionals, calls, etc
23
24 (define_insn "indirect_jump_16"
25 [(set (pc)
26 (match_operand:HI 0 "register_operand" "Rhi"))]
27 "TARGET_A16"
28 ; "jmpi.a\t%0"
29 ; no 16-bit jmpi in r8c
30 "push.b #0 | push.w\t%0 | rts"
31 [(set_attr "flags" "x")]
32 )
33
34 (define_insn "indirect_jump_24"
35 [(set (pc)
36 (match_operand:PSI 0 "register_operand" "Rpi"))]
37 "TARGET_A24"
38 "jmpi.a\t%0"
39 [(set_attr "flags" "n")]
40 )
41
42 (define_expand "indirect_jump"
43 [(match_operand 0 "register_operand" "")]
44 ""
45 "if (TARGET_A16)
46 emit_jump_insn (gen_indirect_jump_16(operands[0]));
47 else
48 emit_jump_insn (gen_indirect_jump_24(operands[0]));
49 DONE;"
50 )
51
52 ; We can replace this with jmp.s when gas supports relaxing. m32c
53 ; opcodes are too complicated to try to compute their sizes here, it's
54 ; far easier (and more reliable) to let gas worry about it.
55 (define_insn "jump"
56 [(set (pc)
57 (label_ref (match_operand 0 "" "")))]
58 ""
59 "jmp.a\t%l0"
60 [(set_attr "flags" "n")]
61 )
62
63 ; No 16-bit indirect calls on r8c/m16c. */
64 (define_insn "call"
65 [(call (match_operand:QI 0 "memory_operand" "Si,SaSb,?Rmm")
66 (match_operand 1 "" ""))
67 (use (match_operand 2 "immediate_operand" ""))]
68 ""
69 "*
70 switch (which_alternative) {
71 case 0:
72 {
73 HOST_WIDE_INT func_vect_num =
74 current_function_special_page_vector(XEXP (operands[0], 0));
75 if (func_vect_num)
76 {
77 operands[3] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
78 return \"jsrs\t%3\";
79 }
80 else
81 return \"jsr.a\t%0\";
82 }
83 case 1: return TARGET_A16 ? \"push.w %a0 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a0\";
84 case 2: return \"jsri.a\t%a0\";
85 default: gcc_unreachable ();
86 }"
87 [(set_attr "flags" "x")]
88 )
89
90 (define_insn "call_value"
91 [(set (match_operand 0 "m32c_return_operand" "=RdiRmmRpa,RdiRmmRpa,RdiRmmRpa")
92 (call (match_operand:QI 1 "memory_operand" "Si,SaSb,?Rmm")
93 (match_operand 2 "" "")))
94 (use (match_operand 3 "immediate_operand" ""))]
95 ""
96 "*
97 switch (which_alternative) {
98 case 0:
99 {
100 HOST_WIDE_INT func_vect_num =
101 current_function_special_page_vector(XEXP (operands[1], 0));
102 if (func_vect_num)
103 {
104 operands[4] = gen_rtx_CONST_INT (VOIDmode, func_vect_num);
105 return \"jsrs\t%4\";
106 }
107 else
108 return \"jsr.a\t%1\";
109 }
110 case 1: return TARGET_A16 ? \"push.w %a1 | jsr.a\tm32c_jsri16\" : \"jsri.a\t%a1\";
111 case 2: return \"jsri.a\t%a1\";
112 default: gcc_unreachable ();
113 }"
114 [(set_attr "flags" "x,x,x")]
115 )
116
117 (define_expand "untyped_call"
118 [(parallel [(call (match_operand 0 "" "")
119 (const_int 0))
120 (match_operand 1 "" "")
121 (match_operand 2 "" "")])]
122 ""
123 "
124 {
125 int i;
126
127 emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));
128
129 for (i = 0; i < XVECLEN (operands[2], 0); i++)
130 {
131 rtx set = XVECEXP (operands[2], 0, i);
132 emit_move_insn (SET_DEST (set), SET_SRC (set));
133 }
134 DONE;
135 }")