gcc/config/mips/mips.opt

   1 ; Options for the MIPS port of the compiler
   2 ;
   3 ; Copyright (C) 2005 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 2, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING.  If not, write to the Free
  19 ; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  20 ; 02111-1307, USA.
  21
  22 mabi=
  23 Target RejectNegative Joined
  24 -mabi=ABI       Generate code that conforms to the given ABI
  25
  26 mabicalls
  27 Target Report Mask(ABICALLS)
  28 Use SVR4-style PIC
  29
  30 mad
  31 Target Report Var(TARGET_MAD)
  32 Use PMC-style 'mad' instructions
  33
  34 march=
  35 Target RejectNegative Joined
  36 -march=ISA      Generate code for the given ISA
  37
  38 mbranch-likely
  39 Target Report Mask(BRANCHLIKELY)
  40 Use Branch Likely instructions, overriding the architecture default
  41
  42 mcheck-zero-division
  43 Target Report Mask(CHECK_ZERO_DIV)
  44 Trap on integer divide by zero
  45
  46 mdivide-breaks
  47 Target Report Mask(DIVIDE_BREAKS)
  48 Use branch-and-break sequences to check for integer divide by zero
  49
  50 mdivide-traps
  51 Target Report InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
  52 Use trap instructions to check for integer divide by zero
  53
  54 mdouble-float
  55 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
  56 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
  57
  58 mdebug
  59 Target Var(TARGET_DEBUG_MODE) Undocumented
  60
  61 mdebugd
  62 Target Var(TARGET_DEBUG_D_MODE) Undocumented
  63
  64 meb
  65 Target Report RejectNegative Mask(BIG_ENDIAN)
  66 Use big-endian byte order
  67
  68 mel
  69 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
  70 Use little-endian byte order
  71
  72 membedded-data
  73 Target Report Var(TARGET_EMBEDDED_DATA)
  74 Use ROM instead of RAM
  75
  76 mexplicit-relocs
  77 Target Report Mask(EXPLICIT_RELOCS)
  78 Use NewABI-style %reloc() assembly operators
  79
  80 mfix-r4000
  81 Target Report Mask(FIX_R4000)
  82 Work around certain R4000 errata
  83
  84 mfix-r4400
  85 Target Report Mask(FIX_R4400)
  86 Work around certain R4400 errata
  87
  88 mfix-sb1
  89 Target Report Var(TARGET_FIX_SB1)
  90 Work around errata for early SB-1 revision 2 cores
  91
  92 mfix-vr4120
  93 Target Report Var(TARGET_FIX_VR4120)
  94 Work around certain VR4120 errata
  95
  96 mfix-vr4130
  97 Target Report Var(TARGET_FIX_VR4130)
  98 Work around VR4130 mflo/mfhi errata
  99
 100 mfix4300
 101 Target Report Var(TARGET_4300_MUL_FIX)
 102 Work around an early 4300 hardware bug
 103
 104 mfp-exceptions
 105 Target Report Mask(FP_EXCEPTIONS)
 106 FP exceptions are enabled
 107
 108 mfp32
 109 Target Report RejectNegative InverseMask(FLOAT64)
 110 Use 32-bit floating-point registers
 111
 112 mfp64
 113 Target Report RejectNegative Mask(FLOAT64)
 114 Use 64-bit floating-point registers
 115
 116 mflush-func=
 117 Target RejectNegative Joined
 118 -mflush-func=FUNC       Use FUNC to flush the cache before calling stack trampolines
 119
 120 mfused-madd
 121 Target Report Mask(FUSED_MADD)
 122 Generate floating-point multiply-add instructions
 123
 124 mgp32
 125 Target Report RejectNegative InverseMask(64BIT)
 126 Use 32-bit general registers
 127
 128 mgp64
 129 Target Report RejectNegative Mask(64BIT)
 130 Use 64-bit general registers
 131
 132 mhard-float
 133 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
 134 Allow the use of hardware floating-point instructions
 135
 136 mint64
 137 Target Report RejectNegative Mask(INT64)
 138 Use a 64-bit int type
 139
 140 mips
 141 Target RejectNegative Joined
 142 -mipsN  Generate code for ISA level N
 143
 144 mips16
 145 Target Report RejectNegative Mask(MIPS16)
 146 Generate mips16 code
 147
 148 mips3d
 149 Target Report RejectNegative Mask(MIPS3D)
 150 Use MIPS-3D instructions
 151
 152 mlong-calls
 153 Target Report Var(TARGET_LONG_CALLS)
 154 Use indirect calls
 155
 156 mlong32
 157 Target Report RejectNegative InverseMask(LONG64, LONG32)
 158 Use a 32-bit long type
 159
 160 mlong64
 161 Target Report RejectNegative Mask(LONG64)
 162 Use a 64-bit long type
 163
 164 mmemcpy
 165 Target Report Var(TARGET_MEMCPY)
 166 Don't optimize block moves
 167
 168 mmips-tfile
 169 Target
 170 Use the mips-tfile postpass
 171
 172 mno-flush-func
 173 Target RejectNegative
 174 Do not use a cache-flushing function before calling stack trampolines
 175
 176 mno-mips16
 177 Target Report RejectNegative InverseMask(MIPS16)
 178 Generate normal-mode code
 179
 180 mno-mips3d
 181 Target Report RejectNegative InverseMask(MIPS3D)
 182 Do not use MIPS-3D instructions
 183
 184 mpaired-single
 185 Target Report Mask(PAIRED_SINGLE_FLOAT)
 186 Use paired-single floating-point instructions
 187
 188 msingle-float
 189 Target Report RejectNegative Mask(SINGLE_FLOAT)
 190 Restrict the use of hardware floating-point instructions to 32-bit operations
 191
 192 msoft-float
 193 Target Report RejectNegative Mask(SOFT_FLOAT)
 194 Prevent the use of all hardware floating-point instructions
 195
 196 msplit-addresses
 197 Target Report Mask(SPLIT_ADDRESSES)
 198 Optimize lui/addiu address loads
 199
 200 msym32
 201 Target Report Var(TARGET_SYM32)
 202 Assume all symbols have 32-bit values
 203
 204 mtune=
 205 Target RejectNegative Joined
 206 -mtune=PROCESSOR        Optimize the output for PROCESSOR
 207
 208 muninit-const-in-rodata
 209 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
 210 Put uninitialized constants in ROM (needs -membedded-data)
 211
 212 mvr4130-align
 213 Target Report Mask(VR4130_ALIGN)
 214 Perform VR4130-specific alignment optimizations
 215
 216 mxgot
 217 Target Report Var(TARGET_XGOT)
 218 Lift restrictions on GOT size