gcc/config/mips/mips.opt

   1 ; Options for the MIPS port of the compiler
   2 ;
   3 ; Copyright (C) 2005, 2007, 2008, 2010, 2011 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 HeaderInclude
  22 config/mips/mips-opts.h
  23
  24 EB
  25 Driver
  26
  27 EL
  28 Driver
  29
  30 mabi=
  31 Target RejectNegative Joined Enum(mips_abi) Var(mips_abi) Init(MIPS_ABI_DEFAULT)
  32 -mabi=ABI       Generate code that conforms to the given ABI
  33
  34 Enum
  35 Name(mips_abi) Type(int)
  36 Known MIPS ABIs (for use with the -mabi= option):
  37
  38 EnumValue
  39 Enum(mips_abi) String(32) Value(ABI_32)
  40
  41 EnumValue
  42 Enum(mips_abi) String(o64) Value(ABI_O64)
  43
  44 EnumValue
  45 Enum(mips_abi) String(n32) Value(ABI_N32)
  46
  47 EnumValue
  48 Enum(mips_abi) String(64) Value(ABI_64)
  49
  50 EnumValue
  51 Enum(mips_abi) String(eabi) Value(ABI_EABI)
  52
  53 mabicalls
  54 Target Report Mask(ABICALLS)
  55 Generate code that can be used in SVR4-style dynamic objects
  56
  57 mad
  58 Target Report Var(TARGET_MAD)
  59 Use PMC-style 'mad' instructions
  60
  61 march=
  62 Target RejectNegative Joined Var(mips_arch_option) ToLower Enum(mips_arch_opt_value)
  63 -march=ISA      Generate code for the given ISA
  64
  65 mbranch-cost=
  66 Target RejectNegative Joined UInteger Var(mips_branch_cost)
  67 -mbranch-cost=COST      Set the cost of branches to roughly COST instructions
  68
  69 mbranch-likely
  70 Target Report Mask(BRANCHLIKELY)
  71 Use Branch Likely instructions, overriding the architecture default
  72
  73 mflip-mips16
  74 Target Report Var(TARGET_FLIP_MIPS16)
  75 Switch on/off MIPS16 ASE on alternating functions for compiler testing
  76
  77 mcheck-zero-division
  78 Target Report Mask(CHECK_ZERO_DIV)
  79 Trap on integer divide by zero
  80
  81 mcode-readable=
  82 Target RejectNegative Joined Enum(mips_code_readable_setting) Var(mips_code_readable) Init(CODE_READABLE_YES)
  83 -mcode-readable=SETTING Specify when instructions are allowed to access code
  84
  85 Enum
  86 Name(mips_code_readable_setting) Type(enum mips_code_readable_setting)
  87 Valid arguments to -mcode-readable=:
  88
  89 EnumValue
  90 Enum(mips_code_readable_setting) String(yes) Value(CODE_READABLE_YES)
  91
  92 EnumValue
  93 Enum(mips_code_readable_setting) String(pcrel) Value(CODE_READABLE_PCREL)
  94
  95 EnumValue
  96 Enum(mips_code_readable_setting) String(no) Value(CODE_READABLE_NO)
  97
  98 mdivide-breaks
  99 Target Report RejectNegative Mask(DIVIDE_BREAKS)
 100 Use branch-and-break sequences to check for integer divide by zero
 101
 102 mdivide-traps
 103 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
 104 Use trap instructions to check for integer divide by zero
 105
 106 mdmx
 107 Target Report RejectNegative Var(TARGET_MDMX)
 108 Allow the use of MDMX instructions
 109
 110 mdouble-float
 111 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
 112 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
 113
 114 mdsp
 115 Target Report Mask(DSP)
 116 Use MIPS-DSP instructions
 117
 118 mdspr2
 119 Target Report Mask(DSPR2)
 120 Use MIPS-DSP REV 2 instructions
 121
 122 mdebug
 123 Target Var(TARGET_DEBUG_MODE) Undocumented
 124
 125 mdebugd
 126 Target Var(TARGET_DEBUG_D_MODE) Undocumented
 127
 128 meb
 129 Target Report RejectNegative Mask(BIG_ENDIAN)
 130 Use big-endian byte order
 131
 132 mel
 133 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
 134 Use little-endian byte order
 135
 136 membedded-data
 137 Target Report Var(TARGET_EMBEDDED_DATA)
 138 Use ROM instead of RAM
 139
 140 mexplicit-relocs
 141 Target Report Mask(EXPLICIT_RELOCS)
 142 Use NewABI-style %reloc() assembly operators
 143
 144 mextern-sdata
 145 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
 146 Use -G for data that is not defined by the current object
 147
 148 mfix-24k
 149 Target Report Var(TARGET_FIX_24K)
 150 Work around certain 24K errata
 151
 152 mfix-r4000
 153 Target Report Mask(FIX_R4000)
 154 Work around certain R4000 errata
 155
 156 mfix-r4400
 157 Target Report Mask(FIX_R4400)
 158 Work around certain R4400 errata
 159
 160 mfix-r10000
 161 Target Report Mask(FIX_R10000)
 162 Work around certain R10000 errata
 163
 164 mfix-sb1
 165 Target Report Var(TARGET_FIX_SB1)
 166 Work around errata for early SB-1 revision 2 cores
 167
 168 mfix-vr4120
 169 Target Report Var(TARGET_FIX_VR4120)
 170 Work around certain VR4120 errata
 171
 172 mfix-vr4130
 173 Target Report Var(TARGET_FIX_VR4130)
 174 Work around VR4130 mflo/mfhi errata
 175
 176 mfix4300
 177 Target Report Var(TARGET_4300_MUL_FIX)
 178 Work around an early 4300 hardware bug
 179
 180 mfp-exceptions
 181 Target Report Mask(FP_EXCEPTIONS)
 182 FP exceptions are enabled
 183
 184 mfp32
 185 Target Report RejectNegative InverseMask(FLOAT64)
 186 Use 32-bit floating-point registers
 187
 188 mfp64
 189 Target Report RejectNegative Mask(FLOAT64)
 190 Use 64-bit floating-point registers
 191
 192 mflush-func=
 193 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
 194 -mflush-func=FUNC       Use FUNC to flush the cache before calling stack trampolines
 195
 196 mfused-madd
 197 Target Report Mask(FUSED_MADD)
 198 Generate floating-point multiply-add instructions
 199
 200 mgp32
 201 Target Report RejectNegative InverseMask(64BIT)
 202 Use 32-bit general registers
 203
 204 mgp64
 205 Target Report RejectNegative Mask(64BIT)
 206 Use 64-bit general registers
 207
 208 mgpopt
 209 Target Report Var(TARGET_GPOPT) Init(1)
 210 Use GP-relative addressing to access small data
 211
 212 mplt
 213 Target Report Var(TARGET_PLT)
 214 When generating -mabicalls code, allow executables to use PLTs and copy relocations
 215
 216 mhard-float
 217 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
 218 Allow the use of hardware floating-point ABI and instructions
 219
 220 minterlink-mips16
 221 Target Report Var(TARGET_INTERLINK_MIPS16) Init(0)
 222 Generate code that can be safely linked with MIPS16 code.
 223
 224 mips
 225 Target RejectNegative Joined ToLower Enum(mips_mips_opt_value) Var(mips_isa_option)
 226 -mipsN  Generate code for ISA level N
 227
 228 mips16
 229 Target Report RejectNegative Mask(MIPS16)
 230 Generate MIPS16 code
 231
 232 mips3d
 233 Target Report RejectNegative Mask(MIPS3D)
 234 Use MIPS-3D instructions
 235
 236 mllsc
 237 Target Report Mask(LLSC)
 238 Use ll, sc and sync instructions
 239
 240 mlocal-sdata
 241 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
 242 Use -G for object-local data
 243
 244 mlong-calls
 245 Target Report Var(TARGET_LONG_CALLS)
 246 Use indirect calls
 247
 248 mlong32
 249 Target Report RejectNegative InverseMask(LONG64, LONG32)
 250 Use a 32-bit long type
 251
 252 mlong64
 253 Target Report RejectNegative Mask(LONG64)
 254 Use a 64-bit long type
 255
 256 mmcount-ra-address
 257 Target Report Var(TARGET_MCOUNT_RA_ADDRESS)
 258 Pass the address of the ra save location to _mcount in $12
 259
 260 mmemcpy
 261 Target Report Mask(MEMCPY)
 262 Don't optimize block moves
 263
 264 mmt
 265 Target Report Var(TARGET_MT)
 266 Allow the use of MT instructions
 267
 268 mno-float
 269 Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
 270 Prevent the use of all floating-point operations
 271
 272 mno-flush-func
 273 Target RejectNegative
 274 Do not use a cache-flushing function before calling stack trampolines
 275
 276 mno-mdmx
 277 Target Report RejectNegative Var(TARGET_MDMX, 0)
 278 Do not use MDMX instructions
 279
 280 mno-mips16
 281 Target Report RejectNegative InverseMask(MIPS16)
 282 Generate normal-mode code
 283
 284 mno-mips3d
 285 Target Report RejectNegative InverseMask(MIPS3D)
 286 Do not use MIPS-3D instructions
 287
 288 mpaired-single
 289 Target Report Mask(PAIRED_SINGLE_FLOAT)
 290 Use paired-single floating-point instructions
 291
 292 mr10k-cache-barrier=
 293 Target Joined RejectNegative Enum(mips_r10k_cache_barrier_setting) Var(mips_r10k_cache_barrier) Init(R10K_CACHE_BARRIER_NONE)
 294 -mr10k-cache-barrier=SETTING    Specify when r10k cache barriers should be inserted
 295
 296 Enum
 297 Name(mips_r10k_cache_barrier_setting) Type(enum mips_r10k_cache_barrier_setting)
 298 Valid arguments to -mr10k-cache-barrier=:
 299
 300 EnumValue
 301 Enum(mips_r10k_cache_barrier_setting) String(load-store) Value(R10K_CACHE_BARRIER_LOAD_STORE)
 302
 303 EnumValue
 304 Enum(mips_r10k_cache_barrier_setting) String(store) Value(R10K_CACHE_BARRIER_STORE)
 305
 306 EnumValue
 307 Enum(mips_r10k_cache_barrier_setting) String(none) Value(R10K_CACHE_BARRIER_NONE)
 308
 309 mrelax-pic-calls
 310 Target Report Mask(RELAX_PIC_CALLS)
 311 Try to allow the linker to turn PIC calls into direct calls
 312
 313 mshared
 314 Target Report Var(TARGET_SHARED) Init(1)
 315 When generating -mabicalls code, make the code suitable for use in shared libraries
 316
 317 msingle-float
 318 Target Report RejectNegative Mask(SINGLE_FLOAT)
 319 Restrict the use of hardware floating-point instructions to 32-bit operations
 320
 321 msmartmips
 322 Target Report Mask(SMARTMIPS)
 323 Use SmartMIPS instructions
 324
 325 msoft-float
 326 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
 327 Prevent the use of all hardware floating-point instructions
 328
 329 msplit-addresses
 330 Target Report Mask(SPLIT_ADDRESSES)
 331 Optimize lui/addiu address loads
 332
 333 msym32
 334 Target Report Var(TARGET_SYM32)
 335 Assume all symbols have 32-bit values
 336
 337 msynci
 338 Target Report Mask(SYNCI)
 339 Use synci instruction to invalidate i-cache
 340
 341 mtune=
 342 Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
 343 -mtune=PROCESSOR        Optimize the output for PROCESSOR
 344
 345 muninit-const-in-rodata
 346 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
 347 Put uninitialized constants in ROM (needs -membedded-data)
 348
 349 mvr4130-align
 350 Target Report Mask(VR4130_ALIGN)
 351 Perform VR4130-specific alignment optimizations
 352
 353 mxgot
 354 Target Report Var(TARGET_XGOT)
 355 Lift restrictions on GOT size
 356
 357 noasmopt
 358 Driver