gcc/config/mips/mips.opt

   1 ; Options for the MIPS port of the compiler
   2 ;
   3 ; Copyright (C) 2005 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 2, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING.  If not, write to the Free
  19 ; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
  20 ; 02110-1301, USA.
  21
  22 mabi=
  23 Target RejectNegative Joined
  24 -mabi=ABI       Generate code that conforms to the given ABI
  25
  26 mabicalls
  27 Target Report Mask(ABICALLS)
  28 Generate code that can be used in SVR4-style dynamic objects
  29
  30 mad
  31 Target Report Var(TARGET_MAD)
  32 Use PMC-style 'mad' instructions
  33
  34 march=
  35 Target RejectNegative Joined Var(mips_arch_string)
  36 -march=ISA      Generate code for the given ISA
  37
  38 mbranch-likely
  39 Target Report Mask(BRANCHLIKELY)
  40 Use Branch Likely instructions, overriding the architecture default
  41
  42 mcheck-zero-division
  43 Target Report Mask(CHECK_ZERO_DIV)
  44 Trap on integer divide by zero
  45
  46 mdivide-breaks
  47 Target Report RejectNegative Mask(DIVIDE_BREAKS)
  48 Use branch-and-break sequences to check for integer divide by zero
  49
  50 mdivide-traps
  51 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
  52 Use trap instructions to check for integer divide by zero
  53
  54 mdmx
  55 Target Report RejectNegative Var(TARGET_MDMX)
  56 Allow the use of MDMX instructions
  57
  58 mdouble-float
  59 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
  60 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
  61
  62 mdsp
  63 Target Report Mask(DSP)
  64 Use MIPS-DSP instructions
  65
  66 mdspr2
  67 Target Report Mask(DSPR2)
  68 Use MIPS-DSP REV 2 instructions
  69
  70 mdebug
  71 Target Var(TARGET_DEBUG_MODE) Undocumented
  72
  73 mdebugd
  74 Target Var(TARGET_DEBUG_D_MODE) Undocumented
  75
  76 meb
  77 Target Report RejectNegative Mask(BIG_ENDIAN)
  78 Use big-endian byte order
  79
  80 mel
  81 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
  82 Use little-endian byte order
  83
  84 membedded-data
  85 Target Report Var(TARGET_EMBEDDED_DATA)
  86 Use ROM instead of RAM
  87
  88 mexplicit-relocs
  89 Target Report Mask(EXPLICIT_RELOCS)
  90 Use NewABI-style %reloc() assembly operators
  91
  92 mfix-r4000
  93 Target Report Mask(FIX_R4000)
  94 Work around certain R4000 errata
  95
  96 mfix-r4400
  97 Target Report Mask(FIX_R4400)
  98 Work around certain R4400 errata
  99
 100 mfix-sb1
 101 Target Report Var(TARGET_FIX_SB1)
 102 Work around errata for early SB-1 revision 2 cores
 103
 104 mfix-vr4120
 105 Target Report Var(TARGET_FIX_VR4120)
 106 Work around certain VR4120 errata
 107
 108 mfix-vr4130
 109 Target Report Var(TARGET_FIX_VR4130)
 110 Work around VR4130 mflo/mfhi errata
 111
 112 mfix4300
 113 Target Report Var(TARGET_4300_MUL_FIX)
 114 Work around an early 4300 hardware bug
 115
 116 mfp-exceptions
 117 Target Report Mask(FP_EXCEPTIONS)
 118 FP exceptions are enabled
 119
 120 mfp32
 121 Target Report RejectNegative InverseMask(FLOAT64)
 122 Use 32-bit floating-point registers
 123
 124 mfp64
 125 Target Report RejectNegative Mask(FLOAT64)
 126 Use 64-bit floating-point registers
 127
 128 mflush-func=
 129 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
 130 -mflush-func=FUNC       Use FUNC to flush the cache before calling stack trampolines
 131
 132 mfused-madd
 133 Target Report Mask(FUSED_MADD)
 134 Generate floating-point multiply-add instructions
 135
 136 mgp32
 137 Target Report RejectNegative InverseMask(64BIT)
 138 Use 32-bit general registers
 139
 140 mgp64
 141 Target Report RejectNegative Mask(64BIT)
 142 Use 64-bit general registers
 143
 144 mhard-float
 145 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
 146 Allow the use of hardware floating-point instructions
 147
 148 mips
 149 Target RejectNegative Joined
 150 -mipsN  Generate code for ISA level N
 151
 152 mips16
 153 Target Report RejectNegative Mask(MIPS16)
 154 Generate MIPS16 code
 155
 156 mips3d
 157 Target Report RejectNegative Mask(MIPS3D)
 158 Use MIPS-3D instructions
 159
 160 mlong-calls
 161 Target Report Var(TARGET_LONG_CALLS)
 162 Use indirect calls
 163
 164 mlong32
 165 Target Report RejectNegative InverseMask(LONG64, LONG32)
 166 Use a 32-bit long type
 167
 168 mlong64
 169 Target Report RejectNegative Mask(LONG64)
 170 Use a 64-bit long type
 171
 172 mmemcpy
 173 Target Report Var(TARGET_MEMCPY)
 174 Don't optimize block moves
 175
 176 mmips-tfile
 177 Target
 178 Use the mips-tfile postpass
 179
 180 mmt
 181 Target Report Var(TARGET_MT)
 182 Allow the use of MT instructions
 183
 184 mno-flush-func
 185 Target RejectNegative
 186 Do not use a cache-flushing function before calling stack trampolines
 187
 188 mno-mdmx
 189 Target Report RejectNegative InverseVar(MDMX)
 190 Do not use MDMX instructions
 191
 192 mno-mips16
 193 Target Report RejectNegative InverseMask(MIPS16)
 194 Generate normal-mode code
 195
 196 mno-mips3d
 197 Target Report RejectNegative InverseMask(MIPS3D)
 198 Do not use MIPS-3D instructions
 199
 200 mpaired-single
 201 Target Report Mask(PAIRED_SINGLE_FLOAT)
 202 Use paired-single floating-point instructions
 203
 204 mshared
 205 Target Report Var(TARGET_SHARED) Init(1)
 206 When generating -mabicalls code, make the code suitable for use in shared libraries
 207
 208 msingle-float
 209 Target Report RejectNegative Mask(SINGLE_FLOAT)
 210 Restrict the use of hardware floating-point instructions to 32-bit operations
 211
 212 msmartmips
 213 Target Report RejectNegative Mask(SMARTMIPS)
 214 Use SmartMIPS instructions
 215
 216 msoft-float
 217 Target Report RejectNegative Mask(SOFT_FLOAT)
 218 Prevent the use of all hardware floating-point instructions
 219
 220 msplit-addresses
 221 Target Report Mask(SPLIT_ADDRESSES)
 222 Optimize lui/addiu address loads
 223
 224 msym32
 225 Target Report Var(TARGET_SYM32)
 226 Assume all symbols have 32-bit values
 227
 228 mtune=
 229 Target RejectNegative Joined Var(mips_tune_string)
 230 -mtune=PROCESSOR        Optimize the output for PROCESSOR
 231
 232 muninit-const-in-rodata
 233 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
 234 Put uninitialized constants in ROM (needs -membedded-data)
 235
 236 mvr4130-align
 237 Target Report Mask(VR4130_ALIGN)
 238 Perform VR4130-specific alignment optimizations
 239
 240 mxgot
 241 Target Report Var(TARGET_XGOT)
 242 Lift restrictions on GOT size