gcc/config/mips/mips.opt

   1 ; Options for the MIPS port of the compiler
   2 ;
   3 ; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
   4 ;
   5 ; This file is part of GCC.
   6 ;
   7 ; GCC is free software; you can redistribute it and/or modify it under
   8 ; the terms of the GNU General Public License as published by the Free
   9 ; Software Foundation; either version 3, or (at your option) any later
  10 ; version.
  11 ;
  12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ; License for more details.
  16 ;
  17 ; You should have received a copy of the GNU General Public License
  18 ; along with GCC; see the file COPYING3.  If not see
  19 ; <http://www.gnu.org/licenses/>.
  20
  21 mabi=
  22 Target RejectNegative Joined
  23 -mabi=ABI       Generate code that conforms to the given ABI
  24
  25 mabicalls
  26 Target Report Mask(ABICALLS)
  27 Generate code that can be used in SVR4-style dynamic objects
  28
  29 mad
  30 Target Report Var(TARGET_MAD)
  31 Use PMC-style 'mad' instructions
  32
  33 march=
  34 Target RejectNegative Joined Var(mips_arch_string)
  35 -march=ISA      Generate code for the given ISA
  36
  37 mbranch-cost=
  38 Target RejectNegative Joined UInteger Var(mips_branch_cost)
  39 -mbranch-cost=COST      Set the cost of branches to roughly COST instructions
  40
  41 mbranch-likely
  42 Target Report Mask(BRANCHLIKELY)
  43 Use Branch Likely instructions, overriding the architecture default
  44
  45 mflip-mips16
  46 Target Report Var(TARGET_FLIP_MIPS16)
  47 Switch on/off MIPS16 ASE on alternating functions for compiler testing
  48
  49 mcheck-zero-division
  50 Target Report Mask(CHECK_ZERO_DIV)
  51 Trap on integer divide by zero
  52
  53 mdivide-breaks
  54 Target Report RejectNegative Mask(DIVIDE_BREAKS)
  55 Use branch-and-break sequences to check for integer divide by zero
  56
  57 mdivide-traps
  58 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
  59 Use trap instructions to check for integer divide by zero
  60
  61 mdmx
  62 Target Report RejectNegative Var(TARGET_MDMX)
  63 Allow the use of MDMX instructions
  64
  65 mdouble-float
  66 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
  67 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
  68
  69 mdsp
  70 Target Report Mask(DSP)
  71 Use MIPS-DSP instructions
  72
  73 mdspr2
  74 Target Report Mask(DSPR2)
  75 Use MIPS-DSP REV 2 instructions
  76
  77 mdebug
  78 Target Var(TARGET_DEBUG_MODE) Undocumented
  79
  80 mdebugd
  81 Target Var(TARGET_DEBUG_D_MODE) Undocumented
  82
  83 meb
  84 Target Report RejectNegative Mask(BIG_ENDIAN)
  85 Use big-endian byte order
  86
  87 mel
  88 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
  89 Use little-endian byte order
  90
  91 membedded-data
  92 Target Report Var(TARGET_EMBEDDED_DATA)
  93 Use ROM instead of RAM
  94
  95 mexplicit-relocs
  96 Target Report Mask(EXPLICIT_RELOCS)
  97 Use NewABI-style %reloc() assembly operators
  98
  99 mfix-r4000
 100 Target Report Mask(FIX_R4000)
 101 Work around certain R4000 errata
 102
 103 mfix-r4400
 104 Target Report Mask(FIX_R4400)
 105 Work around certain R4400 errata
 106
 107 mfix-sb1
 108 Target Report Var(TARGET_FIX_SB1)
 109 Work around errata for early SB-1 revision 2 cores
 110
 111 mfix-vr4120
 112 Target Report Var(TARGET_FIX_VR4120)
 113 Work around certain VR4120 errata
 114
 115 mfix-vr4130
 116 Target Report Var(TARGET_FIX_VR4130)
 117 Work around VR4130 mflo/mfhi errata
 118
 119 mfix4300
 120 Target Report Var(TARGET_4300_MUL_FIX)
 121 Work around an early 4300 hardware bug
 122
 123 mfp-exceptions
 124 Target Report Mask(FP_EXCEPTIONS)
 125 FP exceptions are enabled
 126
 127 mfp32
 128 Target Report RejectNegative InverseMask(FLOAT64)
 129 Use 32-bit floating-point registers
 130
 131 mfp64
 132 Target Report RejectNegative Mask(FLOAT64)
 133 Use 64-bit floating-point registers
 134
 135 mflush-func=
 136 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
 137 -mflush-func=FUNC       Use FUNC to flush the cache before calling stack trampolines
 138
 139 mfused-madd
 140 Target Report Mask(FUSED_MADD)
 141 Generate floating-point multiply-add instructions
 142
 143 mgp32
 144 Target Report RejectNegative InverseMask(64BIT)
 145 Use 32-bit general registers
 146
 147 mgp64
 148 Target Report RejectNegative Mask(64BIT)
 149 Use 64-bit general registers
 150
 151 mhard-float
 152 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
 153 Allow the use of hardware floating-point ABI and instructions
 154
 155 mips
 156 Target RejectNegative Joined
 157 -mipsN  Generate code for ISA level N
 158
 159 mips16
 160 Target Report RejectNegative Mask(MIPS16)
 161 Generate MIPS16 code
 162
 163 mips3d
 164 Target Report RejectNegative Mask(MIPS3D)
 165 Use MIPS-3D instructions
 166
 167 mlong-calls
 168 Target Report Var(TARGET_LONG_CALLS)
 169 Use indirect calls
 170
 171 mlong32
 172 Target Report RejectNegative InverseMask(LONG64, LONG32)
 173 Use a 32-bit long type
 174
 175 mlong64
 176 Target Report RejectNegative Mask(LONG64)
 177 Use a 64-bit long type
 178
 179 mmemcpy
 180 Target Report Mask(MEMCPY)
 181 Don't optimize block moves
 182
 183 mmips-tfile
 184 Target
 185 Use the mips-tfile postpass
 186
 187 mmt
 188 Target Report Var(TARGET_MT)
 189 Allow the use of MT instructions
 190
 191 mno-flush-func
 192 Target RejectNegative
 193 Do not use a cache-flushing function before calling stack trampolines
 194
 195 mno-mdmx
 196 Target Report RejectNegative InverseVar(MDMX)
 197 Do not use MDMX instructions
 198
 199 mno-mips16
 200 Target Report RejectNegative InverseMask(MIPS16)
 201 Generate normal-mode code
 202
 203 mno-mips3d
 204 Target Report RejectNegative InverseMask(MIPS3D)
 205 Do not use MIPS-3D instructions
 206
 207 mpaired-single
 208 Target Report Mask(PAIRED_SINGLE_FLOAT)
 209 Use paired-single floating-point instructions
 210
 211 mshared
 212 Target Report Var(TARGET_SHARED) Init(1)
 213 When generating -mabicalls code, make the code suitable for use in shared libraries
 214
 215 msingle-float
 216 Target Report RejectNegative Mask(SINGLE_FLOAT)
 217 Restrict the use of hardware floating-point instructions to 32-bit operations
 218
 219 msmartmips
 220 Target Report RejectNegative Mask(SMARTMIPS)
 221 Use SmartMIPS instructions
 222
 223 msoft-float
 224 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
 225 Prevent the use of all hardware floating-point instructions
 226
 227 msplit-addresses
 228 Target Report Mask(SPLIT_ADDRESSES)
 229 Optimize lui/addiu address loads
 230
 231 msym32
 232 Target Report Var(TARGET_SYM32)
 233 Assume all symbols have 32-bit values
 234
 235 mcode-readable=
 236 Target RejectNegative Joined
 237 -mcode-readable=SETTING Specify when instructions are allowed to access code
 238
 239 mtune=
 240 Target RejectNegative Joined Var(mips_tune_string)
 241 -mtune=PROCESSOR        Optimize the output for PROCESSOR
 242
 243 muninit-const-in-rodata
 244 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
 245 Put uninitialized constants in ROM (needs -membedded-data)
 246
 247 mvr4130-align
 248 Target Report Mask(VR4130_ALIGN)
 249 Perform VR4130-specific alignment optimizations
 250
 251 mxgot
 252 Target Report Var(TARGET_XGOT)
 253 Lift restrictions on GOT size