949b0c5ebd21088fea716643ac0fa32ca55a97c2
[gcc.git] / gcc / config / mn10300 / mn10300.h
1 /* Definitions of target machine for GNU compiler.
2 Matsushita MN10300 series
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
4 2007 Free Software Foundation, Inc.
5 Contributed by Jeff Law (law@cygnus.com).
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23
24 #undef ASM_SPEC
25 #undef LIB_SPEC
26 #undef ENDFILE_SPEC
27 #undef LINK_SPEC
28 #define LINK_SPEC "%{mrelax:--relax}"
29 #undef STARTFILE_SPEC
30 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}"
31
32 /* Names to predefine in the preprocessor for this target machine. */
33
34 #define TARGET_CPU_CPP_BUILTINS() \
35 do \
36 { \
37 builtin_define ("__mn10300__"); \
38 builtin_define ("__MN10300__"); \
39 builtin_assert ("cpu=mn10300"); \
40 builtin_assert ("machine=mn10300"); \
41 } \
42 while (0)
43
44 #define CPP_SPEC "%{mam33:-D__AM33__} %{mam33-2:-D__AM33__=2 -D__AM33_2__}"
45
46 extern GTY(()) int mn10300_unspec_int_label_counter;
47
48 enum processor_type {
49 PROCESSOR_MN10300,
50 PROCESSOR_AM33,
51 PROCESSOR_AM33_2
52 };
53
54 extern enum processor_type mn10300_processor;
55
56 #define TARGET_AM33 (mn10300_processor >= PROCESSOR_AM33)
57 #define TARGET_AM33_2 (mn10300_processor == PROCESSOR_AM33_2)
58
59 #ifndef PROCESSOR_DEFAULT
60 #define PROCESSOR_DEFAULT PROCESSOR_MN10300
61 #endif
62
63 #define OVERRIDE_OPTIONS mn10300_override_options ()
64
65 /* Print subsidiary information on the compiler version in use. */
66
67 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
68
69 \f
70 /* Target machine storage layout */
71
72 /* Define this if most significant bit is lowest numbered
73 in instructions that operate on numbered bit-fields.
74 This is not true on the Matsushita MN1003. */
75 #define BITS_BIG_ENDIAN 0
76
77 /* Define this if most significant byte of a word is the lowest numbered. */
78 /* This is not true on the Matsushita MN10300. */
79 #define BYTES_BIG_ENDIAN 0
80
81 /* Define this if most significant word of a multiword number is lowest
82 numbered.
83 This is not true on the Matsushita MN10300. */
84 #define WORDS_BIG_ENDIAN 0
85
86 /* Width of a word, in units (bytes). */
87 #define UNITS_PER_WORD 4
88
89 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
90 #define PARM_BOUNDARY 32
91
92 /* The stack goes in 32-bit lumps. */
93 #define STACK_BOUNDARY 32
94
95 /* Allocation boundary (in *bits*) for the code of a function.
96 8 is the minimum boundary; it's unclear if bigger alignments
97 would improve performance. */
98 #define FUNCTION_BOUNDARY 8
99
100 /* No data type wants to be aligned rounder than this. */
101 #define BIGGEST_ALIGNMENT 32
102
103 /* Alignment of field after `int : 0' in a structure. */
104 #define EMPTY_FIELD_BOUNDARY 32
105
106 /* Define this if move instructions will actually fail to work
107 when given unaligned data. */
108 #define STRICT_ALIGNMENT 1
109
110 /* Define this as 1 if `char' should by default be signed; else as 0. */
111 #define DEFAULT_SIGNED_CHAR 0
112 \f
113 /* Standard register usage. */
114
115 /* Number of actual hardware registers.
116 The hardware registers are assigned numbers for the compiler
117 from 0 to just below FIRST_PSEUDO_REGISTER.
118
119 All registers that the compiler knows about must be given numbers,
120 even those that are not normally considered general registers. */
121
122 #define FIRST_PSEUDO_REGISTER 50
123
124 /* Specify machine-specific register numbers. */
125 #define FIRST_DATA_REGNUM 0
126 #define LAST_DATA_REGNUM 3
127 #define FIRST_ADDRESS_REGNUM 4
128 #define LAST_ADDRESS_REGNUM 8
129 #define FIRST_EXTENDED_REGNUM 10
130 #define LAST_EXTENDED_REGNUM 17
131 #define FIRST_FP_REGNUM 18
132 #define LAST_FP_REGNUM 49
133
134 /* Specify the registers used for certain standard purposes.
135 The values of these macros are register numbers. */
136
137 /* Register to use for pushing function arguments. */
138 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM+1)
139
140 /* Base register for access to local variables of the function. */
141 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM-1)
142
143 /* Base register for access to arguments of the function. This
144 is a fake register and will be eliminated into either the frame
145 pointer or stack pointer. */
146 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM
147
148 /* Register in which static-chain is passed to a function. */
149 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM+1)
150
151 /* 1 for registers that have pervasive standard uses
152 and are not available for the register allocator. */
153
154 #define FIXED_REGISTERS \
155 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \
156 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
157 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
158 }
159
160 /* 1 for registers not available across function calls.
161 These must include the FIXED_REGISTERS and also any
162 registers that can be used without being saved.
163 The latter must include the registers where values are returned
164 and the register where structure-value addresses are passed.
165 Aside from that, you can include as many other registers as you
166 like. */
167
168 #define CALL_USED_REGISTERS \
169 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \
170 , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
171 , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
172 }
173
174 #define REG_ALLOC_ORDER \
175 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
176 , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
177 , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33 \
178 }
179
180 #define CONDITIONAL_REGISTER_USAGE \
181 { \
182 unsigned int i; \
183 \
184 if (!TARGET_AM33) \
185 { \
186 for (i = FIRST_EXTENDED_REGNUM; \
187 i <= LAST_EXTENDED_REGNUM; i++) \
188 fixed_regs[i] = call_used_regs[i] = 1; \
189 } \
190 if (!TARGET_AM33_2) \
191 { \
192 for (i = FIRST_FP_REGNUM; \
193 i <= LAST_FP_REGNUM; \
194 i++) \
195 fixed_regs[i] = call_used_regs[i] = 1; \
196 } \
197 if (flag_pic) \
198 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = \
199 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;\
200 }
201
202 /* Return number of consecutive hard regs needed starting at reg REGNO
203 to hold something of mode MODE.
204
205 This is ordinarily the length in words of a value of mode MODE
206 but can be less for certain modes in special long registers. */
207
208 #define HARD_REGNO_NREGS(REGNO, MODE) \
209 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
210
211 /* Value is 1 if hard register REGNO can hold a value of machine-mode
212 MODE. */
213
214 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
215 ((REGNO_REG_CLASS (REGNO) == DATA_REGS \
216 || (TARGET_AM33 && REGNO_REG_CLASS (REGNO) == ADDRESS_REGS) \
217 || REGNO_REG_CLASS (REGNO) == EXTENDED_REGS) \
218 ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
219 : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
220
221 /* Value is 1 if it is a good idea to tie two pseudo registers
222 when one has mode MODE1 and one has mode MODE2.
223 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
224 for any hard reg, then this must be 0 for correct output. */
225 #define MODES_TIEABLE_P(MODE1, MODE2) \
226 (TARGET_AM33 \
227 || MODE1 == MODE2 \
228 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
229
230 /* 4 data, and effectively 3 address registers is small as far as I'm
231 concerned. */
232 #define SMALL_REGISTER_CLASSES 1
233 \f
234 /* Define the classes of registers for register constraints in the
235 machine description. Also define ranges of constants.
236
237 One of the classes must always be named ALL_REGS and include all hard regs.
238 If there is more than one class, another class must be named NO_REGS
239 and contain no registers.
240
241 The name GENERAL_REGS must be the name of a class (or an alias for
242 another name such as ALL_REGS). This is the class of registers
243 that is allowed by "g" or "r" in a register constraint.
244 Also, registers outside this class are allocated only when
245 instructions express preferences for them.
246
247 The classes must be numbered in nondecreasing order; that is,
248 a larger-numbered class must never be contained completely
249 in a smaller-numbered class.
250
251 For any two classes, it is very desirable that there be another
252 class that represents their union. */
253
254 enum reg_class {
255 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
256 DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
257 EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
258 SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
259 FP_REGS, FP_ACC_REGS,
260 GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
261 };
262
263 #define N_REG_CLASSES (int) LIM_REG_CLASSES
264
265 /* Give names of register classes as strings for dump file. */
266
267 #define REG_CLASS_NAMES \
268 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
269 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \
270 "EXTENDED_REGS", \
271 "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \
272 "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \
273 "FP_REGS", "FP_ACC_REGS", \
274 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
275
276 /* Define which registers fit in which classes.
277 This is an initializer for a vector of HARD_REG_SET
278 of length N_REG_CLASSES. */
279
280 #define REG_CLASS_CONTENTS \
281 { { 0, 0 }, /* No regs */ \
282 { 0x0000f, 0 }, /* DATA_REGS */ \
283 { 0x001f0, 0 }, /* ADDRESS_REGS */ \
284 { 0x00200, 0 }, /* SP_REGS */ \
285 { 0x001ff, 0 }, /* DATA_OR_ADDRESS_REGS */\
286 { 0x003f0, 0 }, /* SP_OR_ADDRESS_REGS */\
287 { 0x3fc00, 0 }, /* EXTENDED_REGS */ \
288 { 0x3fc0f, 0 }, /* DATA_OR_EXTENDED_REGS */ \
289 { 0x3fdf0, 0 }, /* ADDRESS_OR_EXTENDED_REGS */ \
290 { 0x3fe00, 0 }, /* SP_OR_EXTENDED_REGS */ \
291 { 0x3fff0, 0 }, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \
292 { 0xfffc0000, 0x3ffff }, /* FP_REGS */ \
293 { 0x03fc0000, 0 }, /* FP_ACC_REGS */ \
294 { 0x3fdff, 0 }, /* GENERAL_REGS */ \
295 { 0xffffffff, 0x3ffff } /* ALL_REGS */ \
296 }
297
298 /* The same information, inverted:
299 Return the class number of the smallest class containing
300 reg number REGNO. This could be a conditional expression
301 or could index an array. */
302
303 #define REGNO_REG_CLASS(REGNO) \
304 ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS : \
305 (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS : \
306 (REGNO) == STACK_POINTER_REGNUM ? SP_REGS : \
307 (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
308 (REGNO) <= LAST_FP_REGNUM ? FP_REGS : \
309 NO_REGS)
310
311 /* The class value for index registers, and the one for base regs. */
312 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
313 #define BASE_REG_CLASS SP_OR_ADDRESS_REGS
314
315 /* Macros to check register numbers against specific register classes. */
316
317 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
318 and check its validity for a certain class.
319 We have two alternate definitions for each of them.
320 The usual definition accepts all pseudo regs; the other rejects
321 them unless they have been allocated suitable hard regs.
322 The symbol REG_OK_STRICT causes the latter definition to be used.
323
324 Most source files want to accept pseudo regs in the hope that
325 they will get allocated to the class that the insn wants them to be in.
326 Source files for reload pass need to be strict.
327 After reload, it makes no difference, since pseudo regs have
328 been eliminated by then. */
329
330 /* These assume that REGNO is a hard or pseudo reg number.
331 They give nonzero only if REGNO is a hard reg of the suitable class
332 or a pseudo reg currently allocated to a suitable hard reg.
333 Since they use reg_renumber, they are safe only once reg_renumber
334 has been allocated, which happens in local-alloc.c. */
335
336 #ifndef REG_OK_STRICT
337 # define REG_STRICT 0
338 #else
339 # define REG_STRICT 1
340 #endif
341
342 # define REGNO_IN_RANGE_P(regno,min,max,strict) \
343 (IN_RANGE ((regno), (min), (max)) \
344 || ((strict) \
345 ? (reg_renumber \
346 && reg_renumber[(regno)] >= (min) \
347 && reg_renumber[(regno)] <= (max)) \
348 : (regno) >= FIRST_PSEUDO_REGISTER))
349
350 #define REGNO_DATA_P(regno, strict) \
351 (REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM, \
352 (strict)))
353 #define REGNO_ADDRESS_P(regno, strict) \
354 (REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM, \
355 (strict)))
356 #define REGNO_SP_P(regno, strict) \
357 (REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM, \
358 (strict)))
359 #define REGNO_EXTENDED_P(regno, strict) \
360 (REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM, \
361 (strict)))
362 #define REGNO_AM33_P(regno, strict) \
363 (REGNO_DATA_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)) \
364 || REGNO_EXTENDED_P ((regno), (strict)))
365 #define REGNO_FP_P(regno, strict) \
366 (REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM, (strict)))
367
368 #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \
369 (REGNO_SP_P ((regno), (strict)) \
370 || REGNO_ADDRESS_P ((regno), (strict)) \
371 || REGNO_EXTENDED_P ((regno), (strict)))
372 #define REGNO_OK_FOR_BASE_P(regno) \
373 (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT))
374 #define REG_OK_FOR_BASE_P(X) \
375 (REGNO_OK_FOR_BASE_P (REGNO (X)))
376
377 #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \
378 (REGNO_SP_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)))
379 #define REGNO_OK_FOR_BIT_BASE_P(regno) \
380 (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT))
381 #define REG_OK_FOR_BIT_BASE_P(X) \
382 (REGNO_OK_FOR_BIT_BASE_P (REGNO (X)))
383
384 #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \
385 (REGNO_DATA_P ((regno), (strict)) || REGNO_EXTENDED_P ((regno), (strict)))
386 #define REGNO_OK_FOR_INDEX_P(regno) \
387 (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT))
388 #define REG_OK_FOR_INDEX_P(X) \
389 (REGNO_OK_FOR_INDEX_P (REGNO (X)))
390
391 /* Given an rtx X being reloaded into a reg required to be
392 in class CLASS, return the class of reg to actually use.
393 In general this is just CLASS; but on some machines
394 in some cases it is preferable to use a more restrictive class. */
395
396 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
397 ((X) == stack_pointer_rtx && (CLASS) != SP_REGS \
398 ? ADDRESS_OR_EXTENDED_REGS \
399 : (GET_CODE (X) == MEM \
400 || (GET_CODE (X) == REG \
401 && REGNO (X) >= FIRST_PSEUDO_REGISTER) \
402 || (GET_CODE (X) == SUBREG \
403 && GET_CODE (SUBREG_REG (X)) == REG \
404 && REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER) \
405 ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS) \
406 : (CLASS)))
407
408 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
409 (X == stack_pointer_rtx && CLASS != SP_REGS \
410 ? ADDRESS_OR_EXTENDED_REGS : CLASS)
411
412 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
413 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
414
415 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
416 mn10300_secondary_reload_class(CLASS,MODE,IN)
417
418 /* Return the maximum number of consecutive registers
419 needed to represent mode MODE in a register of class CLASS. */
420
421 #define CLASS_MAX_NREGS(CLASS, MODE) \
422 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
423
424 /* A class that contains registers which the compiler must always
425 access in a mode that is the same size as the mode in which it
426 loaded the register. */
427 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS
428
429 /* Return 1 if VALUE is in the range specified. */
430
431 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
432 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
433
434 \f
435 /* Stack layout; function entry, exit and calling. */
436
437 /* Define this if pushing a word on the stack
438 makes the stack pointer a smaller address. */
439
440 #define STACK_GROWS_DOWNWARD
441
442 /* Define this to nonzero if the nominal address of the stack frame
443 is at the high-address end of the local variables;
444 that is, each additional local variable allocated
445 goes at a more negative offset in the frame. */
446
447 #define FRAME_GROWS_DOWNWARD 1
448
449 /* Offset within stack frame to start allocating local variables at.
450 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
451 first local allocated. Otherwise, it is the offset to the BEGINNING
452 of the first local allocated. */
453
454 #define STARTING_FRAME_OFFSET 0
455
456 /* Offset of first parameter from the argument pointer register value. */
457 /* Is equal to the size of the saved fp + pc, even if an fp isn't
458 saved since the value is used before we know. */
459
460 #define FIRST_PARM_OFFSET(FNDECL) 4
461
462 #define ELIMINABLE_REGS \
463 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
464 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
465 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
466
467 #define CAN_ELIMINATE(FROM, TO) 1
468
469 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
470 OFFSET = initial_offset (FROM, TO)
471
472 /* We can debug without frame pointers on the mn10300, so eliminate
473 them whenever possible. */
474 #define FRAME_POINTER_REQUIRED 0
475 #define CAN_DEBUG_WITHOUT_FP
476
477 /* Value is the number of bytes of arguments automatically
478 popped when returning from a subroutine call.
479 FUNDECL is the declaration node of the function (as a tree),
480 FUNTYPE is the data type of the function (as a tree),
481 or for a library call it is an identifier node for the subroutine name.
482 SIZE is the number of bytes of arguments passed on the stack. */
483
484 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
485
486 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
487 for a register flushback area. */
488 #define REG_PARM_STACK_SPACE(DECL) 8
489 #define OUTGOING_REG_PARM_STACK_SPACE 1
490 #define ACCUMULATE_OUTGOING_ARGS 1
491
492 /* So we can allocate space for return pointers once for the function
493 instead of around every call. */
494 #define STACK_POINTER_OFFSET 4
495
496 /* 1 if N is a possible register number for function argument passing.
497 On the MN10300, no registers are used in this way. */
498
499 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
500
501 \f
502 /* Define a data type for recording info about an argument list
503 during the scan of that argument list. This data type should
504 hold all necessary information about the function itself
505 and about the args processed so far, enough to enable macros
506 such as FUNCTION_ARG to determine where the next arg should go.
507
508 On the MN10300, this is a single integer, which is a number of bytes
509 of arguments scanned so far. */
510
511 #define CUMULATIVE_ARGS struct cum_arg
512 struct cum_arg {int nbytes; };
513
514 /* Initialize a variable CUM of type CUMULATIVE_ARGS
515 for a call to a function whose data type is FNTYPE.
516 For a library call, FNTYPE is 0.
517
518 On the MN10300, the offset starts at 0. */
519
520 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
521 ((CUM).nbytes = 0)
522
523 /* Update the data in CUM to advance over an argument
524 of mode MODE and data type TYPE.
525 (TYPE is null for libcalls where that information may not be available.) */
526
527 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
528 ((CUM).nbytes += ((MODE) != BLKmode \
529 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
530 : (int_size_in_bytes (TYPE) + 3) & ~3))
531
532 /* Define where to put the arguments to a function.
533 Value is zero to push the argument on the stack,
534 or a hard register in which to store the argument.
535
536 MODE is the argument's machine mode.
537 TYPE is the data type of the argument (as a tree).
538 This is null for libcalls where that information may
539 not be available.
540 CUM is a variable of type CUMULATIVE_ARGS which gives info about
541 the preceding args and about the function being called.
542 NAMED is nonzero if this argument is a named parameter
543 (otherwise it is an extra parameter matching an ellipsis). */
544
545 /* On the MN10300 all args are pushed. */
546
547 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
548 function_arg (&CUM, MODE, TYPE, NAMED)
549
550 /* Define how to find the value returned by a function.
551 VALTYPE is the data type of the value (as a tree).
552 If the precise function being called is known, FUNC is its FUNCTION_DECL;
553 otherwise, FUNC is 0. */
554
555 #define FUNCTION_VALUE(VALTYPE, FUNC) \
556 mn10300_function_value (VALTYPE, FUNC, 0)
557 #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \
558 mn10300_function_value (VALTYPE, FUNC, 1)
559
560 /* Define how to find the value returned by a library function
561 assuming the value has mode MODE. */
562
563 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM)
564
565 /* 1 if N is a possible register number for a function value. */
566
567 #define FUNCTION_VALUE_REGNO_P(N) \
568 ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM)
569
570 #define DEFAULT_PCC_STRUCT_RETURN 0
571
572 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
573 the stack pointer does not matter. The value is tested only in
574 functions that have frame pointers.
575 No definition is equivalent to always zero. */
576
577 #define EXIT_IGNORE_STACK 1
578
579 /* Output assembler code to FILE to increment profiler label # LABELNO
580 for profiling a function entry. */
581
582 #define FUNCTION_PROFILER(FILE, LABELNO) ;
583
584 #define TRAMPOLINE_TEMPLATE(FILE) \
585 do { \
586 fprintf (FILE, "\tadd -4,sp\n"); \
587 fprintf (FILE, "\t.long 0x0004fffa\n"); \
588 fprintf (FILE, "\tmov (0,sp),a0\n"); \
589 fprintf (FILE, "\tadd 4,sp\n"); \
590 fprintf (FILE, "\tmov (13,a0),a1\n"); \
591 fprintf (FILE, "\tmov (17,a0),a0\n"); \
592 fprintf (FILE, "\tjmp (a0)\n"); \
593 fprintf (FILE, "\t.long 0\n"); \
594 fprintf (FILE, "\t.long 0\n"); \
595 } while (0)
596
597 /* Length in units of the trampoline for entering a nested function. */
598
599 #define TRAMPOLINE_SIZE 0x1b
600
601 #define TRAMPOLINE_ALIGNMENT 32
602
603 /* Emit RTL insns to initialize the variable parts of a trampoline.
604 FNADDR is an RTX for the address of the function's pure code.
605 CXT is an RTX for the static chain value for the function. */
606
607 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
608 { \
609 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \
610 (CXT)); \
611 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \
612 (FNADDR)); \
613 }
614 /* A C expression whose value is RTL representing the value of the return
615 address for the frame COUNT steps up from the current frame.
616
617 On the mn10300, the return address is not at a constant location
618 due to the frame layout. Luckily, it is at a constant offset from
619 the argument pointer, so we define RETURN_ADDR_RTX to return a
620 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx
621 with a reference to the stack/frame pointer + an appropriate offset. */
622
623 #define RETURN_ADDR_RTX(COUNT, FRAME) \
624 ((COUNT == 0) \
625 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
626 : (rtx) 0)
627
628 /* Implement `va_start' for varargs and stdarg. */
629 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
630 mn10300_va_start (valist, nextarg)
631 \f
632 /* 1 if X is an rtx for a constant that is a valid address. */
633
634 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
635
636 /* Maximum number of registers that can appear in a valid memory address. */
637
638 #define MAX_REGS_PER_ADDRESS 2
639
640 \f
641 #define HAVE_POST_INCREMENT (TARGET_AM33)
642
643 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
644 that is a valid memory address for an instruction.
645 The MODE argument is the machine mode for the MEM expression
646 that wants to use this address.
647
648 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
649 except for CONSTANT_ADDRESS_P which is actually
650 machine-independent.
651
652 On the mn10300, the value in the address register must be
653 in the same memory space/segment as the effective address.
654
655 This is problematical for reload since it does not understand
656 that base+index != index+base in a memory reference.
657
658 Note it is still possible to use reg+reg addressing modes,
659 it's just much more difficult. For a discussion of a possible
660 workaround and solution, see the comments in pa.c before the
661 function record_unscaled_index_insn_codes. */
662
663 /* Accept either REG or SUBREG where a register is valid. */
664
665 #define RTX_OK_FOR_BASE_P(X, strict) \
666 ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \
667 (strict))) \
668 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
669 && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \
670 (strict))))
671
672 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
673 do \
674 { \
675 if (legitimate_address_p ((MODE), (X), REG_STRICT)) \
676 goto ADDR; \
677 } \
678 while (0)
679
680 \f
681 /* Try machine-dependent ways of modifying an illegitimate address
682 to be legitimate. If we find one, return the new, valid address.
683 This macro is used in only one place: `memory_address' in explow.c.
684
685 OLDX is the address as it was before break_out_memory_refs was called.
686 In some cases it is useful to look at this to decide what needs to be done.
687
688 MODE and WIN are passed so that this macro can use
689 GO_IF_LEGITIMATE_ADDRESS.
690
691 It is always safe for this macro to do nothing. It exists to recognize
692 opportunities to optimize the output. */
693
694 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
695 { rtx orig_x = (X); \
696 (X) = legitimize_address (X, OLDX, MODE); \
697 if ((X) != orig_x && memory_address_p (MODE, X)) \
698 goto WIN; }
699
700 /* Go to LABEL if ADDR (a legitimate address expression)
701 has an effect that depends on the machine mode it is used for. */
702
703 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
704
705 /* Nonzero if the constant value X is a legitimate general operand.
706 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
707
708 #define LEGITIMATE_CONSTANT_P(X) 1
709
710 /* Zero if this needs fixing up to become PIC. */
711
712 #define LEGITIMATE_PIC_OPERAND_P(X) (legitimate_pic_operand_p (X))
713
714 /* Register to hold the addressing base for
715 position independent code access to data items. */
716 #define PIC_OFFSET_TABLE_REGNUM PIC_REG
717
718 /* The name of the pseudo-symbol representing the Global Offset Table. */
719 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
720
721 #define SYMBOLIC_CONST_P(X) \
722 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF) \
723 && ! LEGITIMATE_PIC_OPERAND_P (X))
724
725 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled. */
726 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
727
728 /* Recognize machine-specific patterns that may appear within
729 constants. Used for PIC-specific UNSPECs. */
730 #define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
731 do \
732 if (GET_CODE (X) == UNSPEC && XVECLEN ((X), 0) == 1) \
733 { \
734 switch (XINT ((X), 1)) \
735 { \
736 case UNSPEC_INT_LABEL: \
737 asm_fprintf ((STREAM), ".%LLIL%d", \
738 INTVAL (XVECEXP ((X), 0, 0))); \
739 break; \
740 case UNSPEC_PIC: \
741 /* GLOBAL_OFFSET_TABLE or local symbols, no suffix. */ \
742 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
743 break; \
744 case UNSPEC_GOT: \
745 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
746 fputs ("@GOT", (STREAM)); \
747 break; \
748 case UNSPEC_GOTOFF: \
749 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
750 fputs ("@GOTOFF", (STREAM)); \
751 break; \
752 case UNSPEC_PLT: \
753 output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
754 fputs ("@PLT", (STREAM)); \
755 break; \
756 default: \
757 goto FAIL; \
758 } \
759 break; \
760 } \
761 else \
762 goto FAIL; \
763 while (0)
764 \f
765 /* Tell final.c how to eliminate redundant test instructions. */
766
767 /* Here we define machine-dependent flags and fields in cc_status
768 (see `conditions.h'). No extra ones are needed for the VAX. */
769
770 /* Store in cc_status the expressions
771 that the condition codes will describe
772 after execution of an instruction whose pattern is EXP.
773 Do not alter them if the instruction would not alter the cc's. */
774
775 #define CC_OVERFLOW_UNUSABLE 0x200
776 #define CC_NO_CARRY CC_NO_OVERFLOW
777 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
778
779 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
780 ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
781 ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
782 (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
783 (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
784 (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
785 ! TARGET_AM33 ? 6 : \
786 (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
787 (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
788 (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \
789 (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
790 4)
791
792 /* Nonzero if access to memory by bytes or half words is no faster
793 than accessing full words. */
794 #define SLOW_BYTE_ACCESS 1
795
796 /* Dispatch tables on the mn10300 are extremely expensive in terms of code
797 and readonly data size. So we crank up the case threshold value to
798 encourage a series of if/else comparisons to implement many small switch
799 statements. In theory, this value could be increased much more if we
800 were solely optimizing for space, but we keep it "reasonable" to avoid
801 serious code efficiency lossage. */
802 #define CASE_VALUES_THRESHOLD 6
803
804 #define NO_FUNCTION_CSE
805
806 /* According expr.c, a value of around 6 should minimize code size, and
807 for the MN10300 series, that's our primary concern. */
808 #define MOVE_RATIO 6
809
810 #define TEXT_SECTION_ASM_OP "\t.section .text"
811 #define DATA_SECTION_ASM_OP "\t.section .data"
812 #define BSS_SECTION_ASM_OP "\t.section .bss"
813
814 #define ASM_COMMENT_START "#"
815
816 /* Output to assembler file text saying following lines
817 may contain character constants, extra white space, comments, etc. */
818
819 #define ASM_APP_ON "#APP\n"
820
821 /* Output to assembler file text saying following lines
822 no longer contain unusual constructs. */
823
824 #define ASM_APP_OFF "#NO_APP\n"
825
826 /* This says how to output the assembler to define a global
827 uninitialized but not common symbol.
828 Try to use asm_output_bss to implement this macro. */
829
830 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
831 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
832
833 /* Globalizing directive for a label. */
834 #define GLOBAL_ASM_OP "\t.global "
835
836 /* This is how to output a reference to a user-level label named NAME.
837 `assemble_name' uses this. */
838
839 #undef ASM_OUTPUT_LABELREF
840 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
841 fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME))
842
843 #define ASM_PN_FORMAT "%s___%lu"
844
845 /* This is how we tell the assembler that two symbols have the same value. */
846
847 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
848 do { assemble_name(FILE, NAME1); \
849 fputs(" = ", FILE); \
850 assemble_name(FILE, NAME2); \
851 fputc('\n', FILE); } while (0)
852
853
854 /* How to refer to registers in assembler output.
855 This sequence is indexed by compiler's hard-register-number (see above). */
856
857 #define REGISTER_NAMES \
858 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \
859 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \
860 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7" \
861 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15" \
862 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23" \
863 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" \
864 }
865
866 #define ADDITIONAL_REGISTER_NAMES \
867 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \
868 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \
869 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \
870 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \
871 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24} \
872 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32} \
873 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40} \
874 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48} \
875 }
876
877 /* Print an instruction operand X on file FILE.
878 look in mn10300.c for details */
879
880 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
881
882 /* Print a memory operand whose address is X, on file FILE.
883 This uses a function in output-vax.c. */
884
885 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
886
887 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
888 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
889
890 /* This is how to output an element of a case-vector that is absolute. */
891
892 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
893 fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
894
895 /* This is how to output an element of a case-vector that is relative. */
896
897 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
898 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
899
900 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
901 if ((LOG) != 0) \
902 fprintf (FILE, "\t.align %d\n", (LOG))
903
904 /* We don't have to worry about dbx compatibility for the mn10300. */
905 #define DEFAULT_GDB_EXTENSIONS 1
906
907 /* Use dwarf2 debugging info by default. */
908 #undef PREFERRED_DEBUGGING_TYPE
909 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
910
911 #define DWARF2_ASM_LINE_DEBUG_INFO 1
912
913 /* GDB always assumes the current function's frame begins at the value
914 of the stack pointer upon entry to the current function. Accessing
915 local variables and parameters passed on the stack is done using the
916 base of the frame + an offset provided by GCC.
917
918 For functions which have frame pointers this method works fine;
919 the (frame pointer) == (stack pointer at function entry) and GCC provides
920 an offset relative to the frame pointer.
921
922 This loses for functions without a frame pointer; GCC provides an offset
923 which is relative to the stack pointer after adjusting for the function's
924 frame size. GDB would prefer the offset to be relative to the value of
925 the stack pointer at the function's entry. Yuk! */
926 #define DEBUGGER_AUTO_OFFSET(X) \
927 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
928 + (frame_pointer_needed \
929 ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM)))
930
931 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
932 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
933 + (frame_pointer_needed \
934 ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM)))
935
936 /* Specify the machine mode that this machine uses
937 for the index in the tablejump instruction. */
938 #define CASE_VECTOR_MODE Pmode
939
940 /* Define if operations between registers always perform the operation
941 on the full register even if a narrower mode is specified. */
942 #define WORD_REGISTER_OPERATIONS
943
944 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
945
946 /* This flag, if defined, says the same insns that convert to a signed fixnum
947 also convert validly to an unsigned one. */
948 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
949
950 /* Max number of bytes we can move from memory to memory
951 in one reasonably fast instruction. */
952 #define MOVE_MAX 4
953
954 /* Define if shifts truncate the shift count
955 which implies one can omit a sign-extension or zero-extension
956 of a shift count. */
957 #define SHIFT_COUNT_TRUNCATED 1
958
959 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
960 is done just by pretending it is already truncated. */
961 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
962
963 /* Specify the machine mode that pointers have.
964 After generation of rtl, the compiler makes no further distinction
965 between pointers and any other objects of this machine mode. */
966 #define Pmode SImode
967
968 /* A function address in a call instruction
969 is a byte address (for indexing purposes)
970 so give the MEM rtx a byte's mode. */
971 #define FUNCTION_MODE QImode
972
973 /* The assembler op to get a word. */
974
975 #define FILE_ASM_OP "\t.file\n"
976
977 typedef struct mn10300_cc_status_mdep
978 {
979 int fpCC;
980 }
981 cc_status_mdep;
982
983 #define CC_STATUS_MDEP cc_status_mdep
984
985 #define CC_STATUS_MDEP_INIT (cc_status.mdep.fpCC = 0)