1 /* Definitions of target machine for GNU compiler. Matsushita MN10300 series
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3 Contributed by Jeff Law (law@cygnus.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
31 /* Names to predefine in the preprocessor for this target machine. */
33 #define CPP_PREDEFINES "-D__mn10300__ -D__MN10300__"
35 #define CPP_SPEC "%{mam33:-D__AM33__}"
37 /* Run-time compilation parameters selecting different hardware subsets. */
39 extern int target_flags
;
41 /* Macros used in the machine description to test the flags. */
43 /* Macro to define tables used to set the flags.
44 This is a list in braces of pairs in braces,
45 each pair being { "NAME", VALUE }
46 where VALUE is the bits to set or minus the bits to clear.
47 An empty string NAME is used to identify the default VALUE. */
49 /* Generate code to work around mul/mulq bugs on the mn10300. */
50 #define TARGET_MULT_BUG (target_flags & 0x1)
52 /* Generate code for the AM33 processor. */
53 #define TARGET_AM33 (target_flags & 0x2)
55 #define TARGET_SWITCHES \
56 {{ "mult-bug", 0x1, "Work around hardware multiply bug"}, \
57 { "no-mult-bug", -0x1, "Do not work around hardware multiply bug"},\
61 { "", TARGET_DEFAULT, NULL}}
63 #ifndef TARGET_DEFAULT
64 #define TARGET_DEFAULT 0x1
67 /* Print subsidiary information on the compiler version in use. */
69 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
72 /* Target machine storage layout */
74 /* Define this if most significant bit is lowest numbered
75 in instructions that operate on numbered bit-fields.
76 This is not true on the Matsushita MN1003. */
77 #define BITS_BIG_ENDIAN 0
79 /* Define this if most significant byte of a word is the lowest numbered. */
80 /* This is not true on the Matsushita MN10300. */
81 #define BYTES_BIG_ENDIAN 0
83 /* Define this if most significant word of a multiword number is lowest
85 This is not true on the Matsushita MN10300. */
86 #define WORDS_BIG_ENDIAN 0
88 /* Number of bits in an addressable storage unit */
89 #define BITS_PER_UNIT 8
91 /* Width in bits of a "word", which is the contents of a machine register.
92 Note that this is not necessarily the width of data type `int';
93 if using 16-bit ints on a 68000, this would still be 32.
94 But on a machine with 16-bit registers, this would be 16. */
95 #define BITS_PER_WORD 32
97 /* Width of a word, in units (bytes). */
98 #define UNITS_PER_WORD 4
100 /* Width in bits of a pointer.
101 See also the macro `Pmode' defined below. */
102 #define POINTER_SIZE 32
104 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
105 #define PARM_BOUNDARY 32
107 /* The stack goes in 32 bit lumps. */
108 #define STACK_BOUNDARY 32
110 /* Allocation boundary (in *bits*) for the code of a function.
111 8 is the minimum boundary; it's unclear if bigger alignments
112 would improve performance. */
113 #define FUNCTION_BOUNDARY 8
115 /* No data type wants to be aligned rounder than this. */
116 #define BIGGEST_ALIGNMENT 32
118 /* Alignment of field after `int : 0' in a structure. */
119 #define EMPTY_FIELD_BOUNDARY 32
121 /* Define this if move instructions will actually fail to work
122 when given unaligned data. */
123 #define STRICT_ALIGNMENT 1
125 /* Define this as 1 if `char' should by default be signed; else as 0. */
126 #define DEFAULT_SIGNED_CHAR 0
128 /* Define results of standard character escape sequences. */
129 #define TARGET_BELL 007
130 #define TARGET_BS 010
131 #define TARGET_TAB 011
132 #define TARGET_NEWLINE 012
133 #define TARGET_VT 013
134 #define TARGET_FF 014
135 #define TARGET_CR 015
137 /* Standard register usage. */
139 /* Number of actual hardware registers.
140 The hardware registers are assigned numbers for the compiler
141 from 0 to just below FIRST_PSEUDO_REGISTER.
143 All registers that the compiler knows about must be given numbers,
144 even those that are not normally considered general registers. */
146 #define FIRST_PSEUDO_REGISTER 18
148 /* 1 for registers that have pervasive standard uses
149 and are not available for the register allocator. */
151 #define FIXED_REGISTERS \
152 { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0}
154 /* 1 for registers not available across function calls.
155 These must include the FIXED_REGISTERS and also any
156 registers that can be used without being saved.
157 The latter must include the registers where values are returned
158 and the register where structure-value addresses are passed.
159 Aside from that, you can include as many other registers as you
162 #define CALL_USED_REGISTERS \
163 { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0}
165 #define REG_ALLOC_ORDER \
166 { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9}
168 #define CONDITIONAL_REGISTER_USAGE \
172 for (i = 10; i < 18; i++) \
173 fixed_regs[i] = call_used_regs[i] = 1; \
177 /* Return number of consecutive hard regs needed starting at reg REGNO
178 to hold something of mode MODE.
180 This is ordinarily the length in words of a value of mode MODE
181 but can be less for certain modes in special long registers. */
183 #define HARD_REGNO_NREGS(REGNO, MODE) \
184 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
186 /* Value is 1 if hard register REGNO can hold a value of machine-mode
189 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
190 ((REGNO_REG_CLASS (REGNO) == DATA_REGS \
191 || (TARGET_AM33 && REGNO_REG_CLASS (REGNO) == ADDRESS_REGS) \
192 || REGNO_REG_CLASS (REGNO) == EXTENDED_REGS) \
193 ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
194 : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
196 /* Value is 1 if it is a good idea to tie two pseudo registers
197 when one has mode MODE1 and one has mode MODE2.
198 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
199 for any hard reg, then this must be 0 for correct output. */
200 #define MODES_TIEABLE_P(MODE1, MODE2) \
203 || (GET_MODE_SIZE (MODE1) <= 4 && GET_MODE_SIZE (MODE2) <= 4))
205 /* 4 data, and effectively 3 address registers is small as far as I'm
207 #define SMALL_REGISTER_CLASSES 1
209 /* Define the classes of registers for register constraints in the
210 machine description. Also define ranges of constants.
212 One of the classes must always be named ALL_REGS and include all hard regs.
213 If there is more than one class, another class must be named NO_REGS
214 and contain no registers.
216 The name GENERAL_REGS must be the name of a class (or an alias for
217 another name such as ALL_REGS). This is the class of registers
218 that is allowed by "g" or "r" in a register constraint.
219 Also, registers outside this class are allocated only when
220 instructions express preferences for them.
222 The classes must be numbered in nondecreasing order; that is,
223 a larger-numbered class must never be contained completely
224 in a smaller-numbered class.
226 For any two classes, it is very desirable that there be another
227 class that represents their union. */
230 NO_REGS
, DATA_REGS
, ADDRESS_REGS
, SP_REGS
,
231 DATA_OR_ADDRESS_REGS
, SP_OR_ADDRESS_REGS
,
232 EXTENDED_REGS
, DATA_OR_EXTENDED_REGS
, ADDRESS_OR_EXTENDED_REGS
,
233 SP_OR_EXTENDED_REGS
, SP_OR_ADDRESS_OR_EXTENDED_REGS
,
234 GENERAL_REGS
, ALL_REGS
, LIM_REG_CLASSES
237 #define N_REG_CLASSES (int) LIM_REG_CLASSES
239 /* Give names of register classes as strings for dump file. */
241 #define REG_CLASS_NAMES \
242 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS", \
243 "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS", \
245 "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS", \
246 "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS", \
247 "GENERAL_REGS", "ALL_REGS", "LIM_REGS" }
249 /* Define which registers fit in which classes.
250 This is an initializer for a vector of HARD_REG_SET
251 of length N_REG_CLASSES. */
253 #define REG_CLASS_CONTENTS \
254 { {0}, /* No regs */ \
255 {0x0000f}, /* DATA_REGS */ \
256 {0x001f0}, /* ADDRESS_REGS */ \
257 {0x00200}, /* SP_REGS */ \
258 {0x001ff}, /* DATA_OR_ADDRESS_REGS */\
259 {0x003f0}, /* SP_OR_ADDRESS_REGS */\
260 {0x3fc00}, /* EXTENDED_REGS */ \
261 {0x3fc0f}, /* DATA_OR_EXTENDED_REGS */ \
262 {0x3fdf0}, /* ADDRESS_OR_EXTENDED_REGS */ \
263 {0x3fe00}, /* SP_OR_EXTENDED_REGS */ \
264 {0x3fff0}, /* SP_OR_ADDRESS_OR_EXTENDED_REGS */ \
265 {0x3fdff}, /* GENERAL_REGS */ \
266 {0x3ffff}, /* ALL_REGS */ \
269 /* The same information, inverted:
270 Return the class number of the smallest class containing
271 reg number REGNO. This could be a conditional expression
272 or could index an array. */
274 #define REGNO_REG_CLASS(REGNO) \
275 ((REGNO) < 4 ? DATA_REGS : \
276 (REGNO) < 9 ? ADDRESS_REGS : \
277 (REGNO) == 9 ? SP_REGS : \
278 (REGNO) < 18 ? EXTENDED_REGS : \
281 /* The class value for index registers, and the one for base regs. */
282 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
283 #define BASE_REG_CLASS SP_OR_ADDRESS_REGS
285 /* Get reg_class from a letter such as appears in the machine description. */
287 #define REG_CLASS_FROM_LETTER(C) \
288 ((C) == 'd' ? DATA_REGS : \
289 (C) == 'a' ? ADDRESS_REGS : \
290 (C) == 'y' ? SP_REGS : \
291 ! TARGET_AM33 ? NO_REGS : \
292 (C) == 'x' ? EXTENDED_REGS : \
295 /* Macros to check register numbers against specific register classes. */
297 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
298 and check its validity for a certain class.
299 We have two alternate definitions for each of them.
300 The usual definition accepts all pseudo regs; the other rejects
301 them unless they have been allocated suitable hard regs.
302 The symbol REG_OK_STRICT causes the latter definition to be used.
304 Most source files want to accept pseudo regs in the hope that
305 they will get allocated to the class that the insn wants them to be in.
306 Source files for reload pass need to be strict.
307 After reload, it makes no difference, since pseudo regs have
308 been eliminated by then. */
310 /* These assume that REGNO is a hard or pseudo reg number.
311 They give nonzero only if REGNO is a hard reg of the suitable class
312 or a pseudo reg currently allocated to a suitable hard reg.
313 Since they use reg_renumber, they are safe only once reg_renumber
314 has been allocated, which happens in local-alloc.c. */
316 #ifndef REG_OK_STRICT
317 # define REGNO_IN_RANGE_P(regno,min,max) \
318 (((regno) >= (min) && (regno) <= (max)) || (regno) >= FIRST_PSEUDO_REGISTER)
320 # define REGNO_IN_RANGE_P(regno,min,max) \
321 (((regno) >= (min) && (regno) <= (max)) \
323 && reg_renumber[(regno)] >= (min) && reg_renumber[(regno)] <= (max)))
326 #define REGNO_DATA_P(regno) REGNO_IN_RANGE_P ((regno), 0, 3)
327 #define REGNO_ADDRESS_P(regno) REGNO_IN_RANGE_P ((regno), 4, 8)
328 #define REGNO_SP_P(regno) REGNO_IN_RANGE_P ((regno), 9, 9)
329 #define REGNO_EXTENDED_P(regno) REGNO_IN_RANGE_P ((regno), 10, 17)
330 #define REGNO_AM33_P(regno) \
331 (REGNO_DATA_P ((regno)) || REGNO_ADDRESS_P ((regno)) \
332 || REGNO_EXTENDED_P ((regno)))
334 #define REGNO_OK_FOR_BASE_P(regno) \
335 (REGNO_SP_P ((regno)) \
336 || REGNO_ADDRESS_P ((regno)) || REGNO_EXTENDED_P ((regno)))
337 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
339 #define REGNO_OK_FOR_BIT_BASE_P(regno) \
340 (REGNO_SP_P ((regno)) || REGNO_ADDRESS_P ((regno)))
341 #define REG_OK_FOR_BIT_BASE_P(X) REGNO_OK_FOR_BIT_BASE_P (REGNO (X))
343 #define REGNO_OK_FOR_INDEX_P(regno) \
344 (REGNO_DATA_P ((regno)) || REGNO_EXTENDED_P ((regno)))
345 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
347 /* Given an rtx X being reloaded into a reg required to be
348 in class CLASS, return the class of reg to actually use.
349 In general this is just CLASS; but on some machines
350 in some cases it is preferable to use a more restrictive class. */
352 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
353 (X == stack_pointer_rtx && CLASS != SP_REGS \
354 ? ADDRESS_OR_EXTENDED_REGS : CLASS)
356 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
357 (X == stack_pointer_rtx && CLASS != SP_REGS \
358 ? ADDRESS_OR_EXTENDED_REGS : CLASS)
360 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
361 (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
363 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
364 secondary_reload_class(CLASS,MODE,IN)
366 /* Return the maximum number of consecutive registers
367 needed to represent mode MODE in a register of class CLASS. */
369 #define CLASS_MAX_NREGS(CLASS, MODE) \
370 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
372 /* The letters I, J, K, L, M, N, O, P in a register constraint string
373 can be used to stand for particular ranges of immediate operands.
374 This macro defines what the ranges are.
375 C is the letter, and VALUE is a constant value.
376 Return 1 if VALUE is in the range specified by C. */
378 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
379 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
381 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
382 #define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
383 #define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
384 #define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
385 #define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
386 #define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
388 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
389 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
390 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
391 (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
392 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
393 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
394 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
397 /* Similar, but for floating constants, and defining letters G and H.
398 Here VALUE is the CONST_DOUBLE rtx itself.
400 `G' is a floating-point zero. */
402 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
403 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
404 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
407 /* Stack layout; function entry, exit and calling. */
409 /* Define this if pushing a word on the stack
410 makes the stack pointer a smaller address. */
412 #define STACK_GROWS_DOWNWARD
414 /* Define this if the nominal address of the stack frame
415 is at the high-address end of the local variables;
416 that is, each additional local variable allocated
417 goes at a more negative offset in the frame. */
419 #define FRAME_GROWS_DOWNWARD
421 /* Offset within stack frame to start allocating local variables at.
422 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
423 first local allocated. Otherwise, it is the offset to the BEGINNING
424 of the first local allocated. */
426 #define STARTING_FRAME_OFFSET 0
428 /* Offset of first parameter from the argument pointer register value. */
429 /* Is equal to the size of the saved fp + pc, even if an fp isn't
430 saved since the value is used before we know. */
432 #define FIRST_PARM_OFFSET(FNDECL) 4
434 /* Specify the registers used for certain standard purposes.
435 The values of these macros are register numbers. */
437 /* Register to use for pushing function arguments. */
438 #define STACK_POINTER_REGNUM 9
440 /* Base register for access to local variables of the function. */
441 #define FRAME_POINTER_REGNUM 7
443 /* Base register for access to arguments of the function. This
444 is a fake register and will be eliminated into either the frame
445 pointer or stack pointer. */
446 #define ARG_POINTER_REGNUM 8
448 /* Register in which static-chain is passed to a function. */
449 #define STATIC_CHAIN_REGNUM 5
451 #define ELIMINABLE_REGS \
452 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
453 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
454 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
456 #define CAN_ELIMINATE(FROM, TO) 1
458 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
459 OFFSET = initial_offset (FROM, TO)
461 /* We can debug without frame pointers on the mn10300, so eliminate
462 them whenever possible. */
463 #define FRAME_POINTER_REQUIRED 0
464 #define CAN_DEBUG_WITHOUT_FP
466 /* A guess for the MN10300. */
467 #define PROMOTE_PROTOTYPES 1
469 /* Value is the number of bytes of arguments automatically
470 popped when returning from a subroutine call.
471 FUNDECL is the declaration node of the function (as a tree),
472 FUNTYPE is the data type of the function (as a tree),
473 or for a library call it is an identifier node for the subroutine name.
474 SIZE is the number of bytes of arguments passed on the stack. */
476 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
478 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
479 for a register flushback area. */
480 #define REG_PARM_STACK_SPACE(DECL) 8
481 #define OUTGOING_REG_PARM_STACK_SPACE
482 #define ACCUMULATE_OUTGOING_ARGS 1
484 /* So we can allocate space for return pointers once for the function
485 instead of around every call. */
486 #define STACK_POINTER_OFFSET 4
488 /* 1 if N is a possible register number for function argument passing.
489 On the MN10300, no registers are used in this way. */
491 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
494 /* Define a data type for recording info about an argument list
495 during the scan of that argument list. This data type should
496 hold all necessary information about the function itself
497 and about the args processed so far, enough to enable macros
498 such as FUNCTION_ARG to determine where the next arg should go.
500 On the MN10300, this is a single integer, which is a number of bytes
501 of arguments scanned so far. */
503 #define CUMULATIVE_ARGS struct cum_arg
504 struct cum_arg
{int nbytes
; };
506 /* Initialize a variable CUM of type CUMULATIVE_ARGS
507 for a call to a function whose data type is FNTYPE.
508 For a library call, FNTYPE is 0.
510 On the MN10300, the offset starts at 0. */
512 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
515 /* Update the data in CUM to advance over an argument
516 of mode MODE and data type TYPE.
517 (TYPE is null for libcalls where that information may not be available.) */
519 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
520 ((CUM).nbytes += ((MODE) != BLKmode \
521 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
522 : (int_size_in_bytes (TYPE) + 3) & ~3))
524 /* Define where to put the arguments to a function.
525 Value is zero to push the argument on the stack,
526 or a hard register in which to store the argument.
528 MODE is the argument's machine mode.
529 TYPE is the data type of the argument (as a tree).
530 This is null for libcalls where that information may
532 CUM is a variable of type CUMULATIVE_ARGS which gives info about
533 the preceding args and about the function being called.
534 NAMED is nonzero if this argument is a named parameter
535 (otherwise it is an extra parameter matching an ellipsis). */
537 /* On the MN10300 all args are pushed. */
539 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
540 function_arg (&CUM, MODE, TYPE, NAMED)
542 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
543 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
545 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
546 ((TYPE) && int_size_in_bytes (TYPE) > 8)
548 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
549 ((TYPE) && int_size_in_bytes (TYPE) > 8)
551 /* Define how to find the value returned by a function.
552 VALTYPE is the data type of the value (as a tree).
553 If the precise function being called is known, FUNC is its FUNCTION_DECL;
554 otherwise, FUNC is 0. */
556 #define FUNCTION_VALUE(VALTYPE, FUNC) \
557 gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0)
559 /* Define how to find the value returned by a library function
560 assuming the value has mode MODE. */
562 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
564 /* 1 if N is a possible register number for a function value. */
566 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 4)
568 /* Return values > 8 bytes in length in memory. */
569 #define DEFAULT_PCC_STRUCT_RETURN 0
570 #define RETURN_IN_MEMORY(TYPE) \
571 (int_size_in_bytes (TYPE) > 8 || TYPE_MODE (TYPE) == BLKmode)
573 /* Register in which address to store a structure value
574 is passed to a function. On the MN10300 it's passed as
575 the first parameter. */
577 #define STRUCT_VALUE 0
579 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
580 the stack pointer does not matter. The value is tested only in
581 functions that have frame pointers.
582 No definition is equivalent to always zero. */
584 #define EXIT_IGNORE_STACK 1
586 /* Output assembler code to FILE to increment profiler label # LABELNO
587 for profiling a function entry. */
589 #define FUNCTION_PROFILER(FILE, LABELNO) ;
591 #define TRAMPOLINE_TEMPLATE(FILE) \
593 fprintf (FILE, "\tadd -4,sp\n"); \
594 fprintf (FILE, "\t.long 0x0004fffa\n"); \
595 fprintf (FILE, "\tmov (0,sp),a0\n"); \
596 fprintf (FILE, "\tadd 4,sp\n"); \
597 fprintf (FILE, "\tmov (13,a0),a1\n"); \
598 fprintf (FILE, "\tmov (17,a0),a0\n"); \
599 fprintf (FILE, "\tjmp (a0)\n"); \
600 fprintf (FILE, "\t.long 0\n"); \
601 fprintf (FILE, "\t.long 0\n"); \
604 /* Length in units of the trampoline for entering a nested function. */
606 #define TRAMPOLINE_SIZE 0x1b
608 #define TRAMPOLINE_ALIGNMENT 32
610 /* Emit RTL insns to initialize the variable parts of a trampoline.
611 FNADDR is an RTX for the address of the function's pure code.
612 CXT is an RTX for the static chain value for the function. */
614 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
616 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \
618 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \
621 /* A C expression whose value is RTL representing the value of the return
622 address for the frame COUNT steps up from the current frame.
624 On the mn10300, the return address is not at a constant location
625 due to the frame layout. Luckily, it is at a constant offset from
626 the argument pointer, so we define RETURN_ADDR_RTX to return a
627 MEM using arg_pointer_rtx. Reload will replace arg_pointer_rtx
628 with a reference to the stack/frame pointer + an appropriate offset. */
630 #define RETURN_ADDR_RTX(COUNT, FRAME) \
632 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
635 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
636 reference the 2 integer arg registers.
637 Ordinarily they are not call used registers, but they are for
638 _builtin_saveregs, so we must make this explicit. */
640 #define EXPAND_BUILTIN_SAVEREGS() mn10300_builtin_saveregs ()
642 /* Implement `va_start' for varargs and stdarg. */
643 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
644 mn10300_va_start (stdarg, valist, nextarg)
646 /* Implement `va_arg'. */
647 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
648 mn10300_va_arg (valist, type)
650 /* Addressing modes, and classification of registers for them. */
653 /* 1 if X is an rtx for a constant that is a valid address. */
655 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
657 /* Extra constraints. */
659 #define OK_FOR_R(OP) \
660 (GET_CODE (OP) == MEM \
661 && GET_MODE (OP) == QImode \
662 && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
663 || (GET_CODE (XEXP (OP, 0)) == REG \
664 && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
665 && XEXP (OP, 0) != stack_pointer_rtx) \
666 || (GET_CODE (XEXP (OP, 0)) == PLUS \
667 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
668 && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \
669 && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
670 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
671 && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
673 #define EXTRA_CONSTRAINT(OP, C) \
674 ((C) == 'R' ? OK_FOR_R (OP) : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : 0)
676 /* Maximum number of registers that can appear in a valid memory address. */
678 #define MAX_REGS_PER_ADDRESS 2
681 #define HAVE_POST_INCREMENT (TARGET_AM33)
683 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
684 that is a valid memory address for an instruction.
685 The MODE argument is the machine mode for the MEM expression
686 that wants to use this address.
688 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
689 except for CONSTANT_ADDRESS_P which is actually
692 On the mn10300, the value in the address register must be
693 in the same memory space/segment as the effective address.
695 This is problematical for reload since it does not understand
696 that base+index != index+base in a memory reference.
698 Note it is still possible to use reg+reg addressing modes,
699 it's just much more difficult. For a discussion of a possible
700 workaround and solution, see the comments in pa.c before the
701 function record_unscaled_index_insn_codes. */
703 /* Accept either REG or SUBREG where a register is valid. */
705 #define RTX_OK_FOR_BASE_P(X) \
706 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
707 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \
708 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
710 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
712 if (CONSTANT_ADDRESS_P (X)) \
714 if (RTX_OK_FOR_BASE_P (X)) \
717 && GET_CODE (X) == POST_INC \
718 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
719 && (MODE == SImode || MODE == SFmode || MODE == HImode))\
721 if (GET_CODE (X) == PLUS) \
723 rtx base = 0, index = 0; \
724 if (REG_P (XEXP (X, 0)) \
725 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
726 base = XEXP (X, 0), index = XEXP (X, 1); \
727 if (REG_P (XEXP (X, 1)) \
728 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
729 base = XEXP (X, 1), index = XEXP (X, 0); \
730 if (base != 0 && index != 0) \
732 if (GET_CODE (index) == CONST_INT) \
739 /* Try machine-dependent ways of modifying an illegitimate address
740 to be legitimate. If we find one, return the new, valid address.
741 This macro is used in only one place: `memory_address' in explow.c.
743 OLDX is the address as it was before break_out_memory_refs was called.
744 In some cases it is useful to look at this to decide what needs to be done.
746 MODE and WIN are passed so that this macro can use
747 GO_IF_LEGITIMATE_ADDRESS.
749 It is always safe for this macro to do nothing. It exists to recognize
750 opportunities to optimize the output. */
752 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
753 { rtx orig_x = (X); \
754 (X) = legitimize_address (X, OLDX, MODE); \
755 if ((X) != orig_x && memory_address_p (MODE, X)) \
758 /* Go to LABEL if ADDR (a legitimate address expression)
759 has an effect that depends on the machine mode it is used for. */
761 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
762 if (GET_CODE (ADDR) == POST_INC) \
765 /* Nonzero if the constant value X is a legitimate general operand.
766 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
768 #define LEGITIMATE_CONSTANT_P(X) 1
771 /* Tell final.c how to eliminate redundant test instructions. */
773 /* Here we define machine-dependent flags and fields in cc_status
774 (see `conditions.h'). No extra ones are needed for the vax. */
776 /* Store in cc_status the expressions
777 that the condition codes will describe
778 after execution of an instruction whose pattern is EXP.
779 Do not alter them if the instruction would not alter the cc's. */
781 #define CC_OVERFLOW_UNUSABLE 0x200
782 #define CC_NO_CARRY CC_NO_OVERFLOW
783 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
785 /* Compute the cost of computing a constant rtl expression RTX
786 whose rtx-code is CODE. The body of this macro is a portion
787 of a switch statement. If the code is computed here,
788 return it with a return statement. Otherwise, break from the switch. */
790 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
792 /* Zeros are extremely cheap. */ \
793 if (INTVAL (RTX) == 0 && OUTER_CODE == SET) \
795 /* If it fits in 8 bits, then it's still relatively cheap. */ \
796 if (INT_8_BITS (INTVAL (RTX))) \
798 /* This is the "base" cost, includes constants where either the \
799 upper or lower 16bits are all zeros. */ \
800 if (INT_16_BITS (INTVAL (RTX)) \
801 || (INTVAL (RTX) & 0xffff) == 0 \
802 || (INTVAL (RTX) & 0xffff0000) == 0) \
805 /* These are more costly than a CONST_INT, but we can relax them, \
806 so they're less costly than a CONST_DOUBLE. */ \
811 /* We don't optimize CONST_DOUBLEs well nor do we relax them well, \
812 so their cost is very high. */ \
816 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
817 ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
818 ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
819 (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
820 (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
821 (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
822 ! TARGET_AM33 ? 6 : \
823 (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
824 (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
825 (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
828 #define ADDRESS_COST(X) mn10300_address_cost((X), 0)
830 /* A crude cut at RTX_COSTS for the MN10300. */
832 /* Provide the costs of a rtl expression. This is in the body of a
834 #define RTX_COSTS(RTX,CODE,OUTER_CODE) \
843 /* Nonzero if access to memory by bytes or half words is no faster
844 than accessing full words. */
845 #define SLOW_BYTE_ACCESS 1
847 /* Dispatch tables on the mn10300 are extremely expensive in terms of code
848 and readonly data size. So we crank up the case threshold value to
849 encourage a series of if/else comparisons to implement many small switch
850 statements. In theory, this value could be increased much more if we
851 were solely optimizing for space, but we keep it "reasonable" to avoid
852 serious code efficiency lossage. */
853 #define CASE_VALUES_THRESHOLD 6
855 #define NO_FUNCTION_CSE
857 /* According expr.c, a value of around 6 should minimize code size, and
858 for the MN10300 series, that's our primary concern. */
861 #define TEXT_SECTION_ASM_OP "\t.section .text"
862 #define DATA_SECTION_ASM_OP "\t.section .data"
863 #define BSS_SECTION_ASM_OP "\t.section .bss"
865 /* Output at beginning/end of assembler file. */
866 #undef ASM_FILE_START
867 #define ASM_FILE_START(FILE) asm_file_start(FILE)
869 #define ASM_COMMENT_START "#"
871 /* Output to assembler file text saying following lines
872 may contain character constants, extra white space, comments, etc. */
874 #define ASM_APP_ON "#APP\n"
876 /* Output to assembler file text saying following lines
877 no longer contain unusual constructs. */
879 #define ASM_APP_OFF "#NO_APP\n"
881 /* This is how to output an assembler line defining a `double' constant.
882 It is .dfloat or .gfloat, depending. */
884 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
885 do { char dstr[30]; \
886 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
887 fprintf (FILE, "\t.double %s\n", dstr); \
891 /* This is how to output an assembler line defining a `float' constant. */
892 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
893 do { char dstr[30]; \
894 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", dstr); \
895 fprintf (FILE, "\t.float %s\n", dstr); \
898 /* This is how to output an assembler line defining an `int' constant. */
900 #define ASM_OUTPUT_INT(FILE, VALUE) \
901 ( fprintf (FILE, "\t.long "), \
902 output_addr_const (FILE, (VALUE)), \
903 fprintf (FILE, "\n"))
905 /* Likewise for `char' and `short' constants. */
907 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
908 ( fprintf (FILE, "\t.hword "), \
909 output_addr_const (FILE, (VALUE)), \
910 fprintf (FILE, "\n"))
912 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
913 ( fprintf (FILE, "\t.byte "), \
914 output_addr_const (FILE, (VALUE)), \
915 fprintf (FILE, "\n"))
917 /* This is how to output an assembler line for a numeric constant byte. */
918 #define ASM_OUTPUT_BYTE(FILE, VALUE) \
919 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
921 /* Define the parentheses used to group arithmetic operations
922 in assembler code. */
924 #define ASM_OPEN_PAREN "("
925 #define ASM_CLOSE_PAREN ")"
927 /* This says how to output the assembler to define a global
928 uninitialized but not common symbol.
929 Try to use asm_output_bss to implement this macro. */
931 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
932 asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
934 /* This is how to output the definition of a user-level label named NAME,
935 such as the label on a static function or variable NAME. */
937 #define ASM_OUTPUT_LABEL(FILE, NAME) \
938 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
940 /* This is how to output a command to make the user-level label named NAME
941 defined for reference from other files. */
943 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
944 do { fputs ("\t.global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
946 /* This is how to output a reference to a user-level label named NAME.
947 `assemble_name' uses this. */
949 #undef ASM_OUTPUT_LABELREF
950 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
952 const char* real_name; \
953 STRIP_NAME_ENCODING (real_name, (NAME)); \
954 fprintf (FILE, "_%s", real_name); \
957 /* Store in OUTPUT a string (made with alloca) containing
958 an assembler-name for a local static variable named NAME.
959 LABELNO is an integer which is different for each call. */
961 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
962 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
963 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
965 /* This is how we tell the assembler that two symbols have the same value. */
967 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
968 do { assemble_name(FILE, NAME1); \
969 fputs(" = ", FILE); \
970 assemble_name(FILE, NAME2); \
971 fputc('\n', FILE); } while (0)
974 /* How to refer to registers in assembler output.
975 This sequence is indexed by compiler's hard-register-number (see above). */
977 #define REGISTER_NAMES \
978 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp", \
979 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" \
982 #define ADDITIONAL_REGISTER_NAMES \
983 { {"r8", 4}, {"r9", 5}, {"r10", 6}, {"r11", 7}, \
984 {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3}, \
985 {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13}, \
986 {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17} \
989 /* Print an instruction operand X on file FILE.
990 look in mn10300.c for details */
992 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE,X,CODE)
994 /* Print a memory operand whose address is X, on file FILE.
995 This uses a function in output-vax.c. */
997 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
999 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1000 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1002 /* This is how to output an element of a case-vector that is absolute. */
1004 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1005 asm_fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
1007 /* This is how to output an element of a case-vector that is relative. */
1009 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1010 fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
1012 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1014 fprintf (FILE, "\t.align %d\n", (LOG))
1016 /* We don't have to worry about dbx compatibility for the mn10300. */
1017 #define DEFAULT_GDB_EXTENSIONS 1
1019 /* Use stabs debugging info by default. */
1020 #undef PREFERRED_DEBUGGING_TYPE
1021 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1023 #define DBX_REGISTER_NUMBER(REGNO) REGNO
1025 /* GDB always assumes the current function's frame begins at the value
1026 of the stack pointer upon entry to the current function. Accessing
1027 local variables and parameters passed on the stack is done using the
1028 base of the frame + an offset provided by GCC.
1030 For functions which have frame pointers this method works fine;
1031 the (frame pointer) == (stack pointer at function entry) and GCC provides
1032 an offset relative to the frame pointer.
1034 This loses for functions without a frame pointer; GCC provides an offset
1035 which is relative to the stack pointer after adjusting for the function's
1036 frame size. GDB would prefer the offset to be relative to the value of
1037 the stack pointer at the function's entry. Yuk! */
1038 #define DEBUGGER_AUTO_OFFSET(X) \
1039 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
1040 + (frame_pointer_needed \
1041 ? 0 : -initial_offset (FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM)))
1043 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1044 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
1045 + (frame_pointer_needed \
1046 ? 0 : -initial_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM)))
1048 /* Define to use software floating point emulator for REAL_ARITHMETIC and
1049 decimal <-> binary conversion. */
1050 #define REAL_ARITHMETIC
1052 /* Specify the machine mode that this machine uses
1053 for the index in the tablejump instruction. */
1054 #define CASE_VECTOR_MODE Pmode
1056 /* Define if operations between registers always perform the operation
1057 on the full register even if a narrower mode is specified. */
1058 #define WORD_REGISTER_OPERATIONS
1060 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1062 /* Specify the tree operation to be used to convert reals to integers. */
1063 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1065 /* This flag, if defined, says the same insns that convert to a signed fixnum
1066 also convert validly to an unsigned one. */
1067 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1069 /* This is the kind of divide that is easiest to do in the general case. */
1070 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1072 /* Max number of bytes we can move from memory to memory
1073 in one reasonably fast instruction. */
1076 /* Define if shifts truncate the shift count
1077 which implies one can omit a sign-extension or zero-extension
1078 of a shift count. */
1079 #define SHIFT_COUNT_TRUNCATED 1
1081 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1082 is done just by pretending it is already truncated. */
1083 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1085 /* Specify the machine mode that pointers have.
1086 After generation of rtl, the compiler makes no further distinction
1087 between pointers and any other objects of this machine mode. */
1088 #define Pmode SImode
1090 /* A function address in a call instruction
1091 is a byte address (for indexing purposes)
1092 so give the MEM rtx a byte's mode. */
1093 #define FUNCTION_MODE QImode
1095 /* The assembler op to get a word. */
1097 #define FILE_ASM_OP "\t.file\n"