1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@mcc.com)
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type
/* comparison type */
25 CMP_SI
, /* compare integers */
26 CMP_SF
, /* compare single precision floats */
27 CMP_DF
, /* compare double precision floats */
28 CMP_MAX
/* max comparison type */
31 /* Print subsidiary information on the compiler version in use. */
33 #define TARGET_VERSION fprintf (stderr, " (hppa)");
35 /* Run-time compilation parameters selecting different hardware subsets. */
37 extern int target_flags
;
39 /* compile code for HP-PA 1.1 ("Snake") */
41 #define TARGET_SNAKE (target_flags & 1)
43 /* Disable all FP registers (they all become fixed). This may be necessary
44 for compiling kernels which perform lazy context switching of FP regs.
45 Note if you use this option and try to perform floating point operations
46 the compiler will abort! */
48 #define TARGET_DISABLE_FPREGS (target_flags & 2)
50 /* Allow unconditional jumps in the delay slots of call instructions. */
51 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
53 /* Force all function calls to indirect addressing via a register. This
54 avoids lossage when the function is very far away from the current PC.
56 ??? What about simple jumps, they can suffer from the same problem.
57 Would require significant surgery in pa.md. */
59 #define TARGET_LONG_CALLS (target_flags & 16)
61 /* Disable indexed addressing modes. */
63 #define TARGET_DISABLE_INDEXING (target_flags & 32)
65 /* Emit directives only understood by GAS. This allows parameter
66 relocations to work for static functions. There is no way
67 to make them work the HP assembler at this time.
69 Also forces a colon to be tacked onto the end of local and
72 #define TARGET_GAS (target_flags & 128)
74 /* Macro to define tables used to set the flags.
75 This is a list in braces of pairs in braces,
76 each pair being { "NAME", VALUE }
77 where VALUE is the bits to set or minus the bits to clear.
78 An empty string NAME is used to identify the default VALUE. */
80 #define TARGET_SWITCHES \
83 {"pa-risc-1-0", -1}, \
85 {"disable-fpregs", 2}, \
86 {"no-disable-fpregs", 2}, \
87 {"jump-in-delay", 8}, \
88 {"no-jump-in-delay", -8}, \
90 {"no-long-calls", -16}, \
91 {"disable-indexing", 32}, \
92 {"no-disable-indexing", -32},\
95 { "", TARGET_DEFAULT}}
97 #ifndef TARGET_DEFAULT
98 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
101 #define DBX_DEBUGGING_INFO
102 #define DEFAULT_GDB_EXTENSIONS 1
104 /* This is the way other stabs-in-XXX tools do things. We will be
106 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
108 /* Likewise for linenos. */
109 #undef ASM_OUTPUT_SOURCE_LINE
110 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
111 { static int sym_lineno = 1; \
112 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
114 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
118 /* But, to make this work, we have to output the stabs for the function
120 #define DBX_FUNCTION_FIRST
122 /* Only lables should ever begin in colunm zero. */
123 #define ASM_STABS_OP "\t.stabs"
124 #define ASM_STABN_OP "\t.stabn"
126 #if (TARGET_DEFAULT & 1) == 0
127 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
128 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
130 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
133 /* Defines for a K&R CC */
135 #define CC1_SPEC "%{pg:} %{p:}"
137 #define LINK_SPEC "-u main"
139 /* Allow $ in identifiers. */
140 #define DOLLARS_IN_IDENTIFIERS 2
142 /* Make gcc agree with <machine/ansi.h> */
144 #define SIZE_TYPE "unsigned int"
145 #define PTRDIFF_TYPE "int"
146 #define WCHAR_TYPE "short unsigned int"
147 #define WCHAR_TYPE_SIZE 16
149 /* Sometimes certain combinations of command options do not make sense
150 on a particular target machine. You can define a macro
151 `OVERRIDE_OPTIONS' to take account of this. This macro, if
152 defined, is executed once just after all the command options have
155 On the PA, it is used to explicitly warn the user that -fpic and -fPIC
158 #define OVERRIDE_OPTIONS \
161 warning ("-fpic and -fPIC are not supported on the PA."); \
164 /* Omit frame pointer at high optimization levels. */
166 #define OPTIMIZATION_OPTIONS(OPTIMIZE) \
169 flag_omit_frame_pointer = 1; \
172 /* Names to predefine in the preprocessor for this target machine. */
174 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
176 /* target machine storage layout */
178 /* Define this if most significant bit is lowest numbered
179 in instructions that operate on numbered bit-fields. */
180 #define BITS_BIG_ENDIAN 1
182 /* Define this if most significant byte of a word is the lowest numbered. */
183 /* That is true on the HP-PA. */
184 #define BYTES_BIG_ENDIAN 1
186 /* Define this if most significant word of a multiword number is lowest
188 /* For the HP-PA we can decide arbitrarily
189 since there are no machine instructions for them. */
190 #define WORDS_BIG_ENDIAN 1
192 /* number of bits in an addressable storage unit */
193 #define BITS_PER_UNIT 8
195 /* Width in bits of a "word", which is the contents of a machine register.
196 Note that this is not necessarily the width of data type `int';
197 if using 16-bit ints on a 68000, this would still be 32.
198 But on a machine with 16-bit registers, this would be 16. */
199 #define BITS_PER_WORD 32
201 /* Width of a word, in units (bytes). */
202 #define UNITS_PER_WORD 4
204 /* Width in bits of a pointer.
205 See also the macro `Pmode' defined below. */
206 #define POINTER_SIZE 32
208 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
209 #define PARM_BOUNDARY 32
211 /* Largest alignment required for any stack parameter, in bits.
212 Don't define this if it is equal to PARM_BOUNDARY */
213 #define MAX_PARM_BOUNDARY 64
215 /* Boundary (in *bits*) on which stack pointer should be aligned. */
216 #define STACK_BOUNDARY 512
218 /* Allocation boundary (in *bits*) for the code of a function. */
219 #define FUNCTION_BOUNDARY 32
221 /* Alignment of field after `int : 0' in a structure. */
222 #define EMPTY_FIELD_BOUNDARY 32
224 /* Every structure's size must be a multiple of this. */
225 #define STRUCTURE_SIZE_BOUNDARY 8
227 /* A bitfield declared as `int' forces `int' alignment for the struct. */
228 #define PCC_BITFIELD_TYPE_MATTERS 1
230 /* No data type wants to be aligned rounder than this. */
231 #define BIGGEST_ALIGNMENT 64
233 /* The .align directive in the HP assembler allows up to a 32 alignment. */
234 #define MAX_OFILE_ALIGNMENT 32768
236 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
237 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
238 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
240 /* Make arrays of chars word-aligned for the same reasons. */
241 #define DATA_ALIGNMENT(TYPE, ALIGN) \
242 (TREE_CODE (TYPE) == ARRAY_TYPE \
243 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
244 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
247 /* Set this nonzero if move instructions will actually fail to work
248 when given unaligned data. */
249 #define STRICT_ALIGNMENT 1
251 /* Generate calls to memcpy, memcmp and memset. */
252 #define TARGET_MEM_FUNCTIONS
254 /* Standard register usage. */
256 /* Number of actual hardware registers.
257 The hardware registers are assigned numbers for the compiler
258 from 0 to just below FIRST_PSEUDO_REGISTER.
259 All registers that the compiler knows about must be given numbers,
260 even those that are not normally considered general registers.
262 HP-PA 1.0 has 32 fullword registers and 16 floating point
263 registers. The floating point registers hold either word or double
266 16 additional registers are reserved.
268 HP-PA 1.1 has 32 fullword registers and 32 floating point
269 registers. However, the floating point registers behave
270 differently: the left and right halves of registers are addressable
271 as 32 bit registers. So, we will set things up like the 68k which
272 has different fp units: define separate register sets for the 1.0
275 #define FIRST_PSEUDO_REGISTER 101 /* 32 + 12 1.0 regs + 56 1.1 regs + */
278 /* 1 for registers that have pervasive standard uses
279 and are not available for the register allocator.
281 On the HP-PA, these are:
282 Reg 0 = 0 (hardware). However, 0 is used for condition code,
284 Reg 1 = ADDIL target/Temporary (hardware).
285 Reg 2 = Return Pointer
286 Reg 3 = Frame Pointer
287 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
288 Reg 4-18 = Preserved Registers
289 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
290 Reg 20-22 = Temporary Registers
291 Reg 23-26 = Temporary/Parameter Registers
292 Reg 27 = Global Data Pointer (hp)
293 Reg 28 = Temporary/???/Return Value register
294 Reg 29 = Temporary/Static Chain/Return Value register
295 Reg 30 = stack pointer
296 Reg 31 = Temporary/Millicode Return Pointer (hp)
298 Freg 0-3 = Status Registers -- Not known to the compiler.
299 Freg 4-7 = Arguments/Return Value
300 Freg 8-11 = Temporary Registers
301 Freg 12-15 = Preserved Registers
303 Freg 16-31 = Reserved
305 On the Snake, fp regs are
307 Freg 0-3 = Status Registers -- Not known to the compiler.
308 Freg 4L-7R = Arguments/Return Value
309 Freg 8L-11R = Temporary Registers
310 Freg 12L-21R = Preserved Registers
311 Freg 22L-31R = Temporary Registers
315 #define FIXED_REGISTERS \
316 {0, 0, 0, 0, 0, 0, 0, 0, \
317 0, 0, 0, 0, 0, 0, 0, 0, \
318 0, 0, 0, 0, 0, 0, 0, 0, \
319 0, 0, 0, 1, 0, 0, 1, 0, \
320 /* 1.0 fp registers */ \
322 0, 0, 0, 0, 0, 0, 0, 0, \
323 /* 1.1 fp registers */ \
324 0, 0, 0, 0, 0, 0, 0, 0, \
325 0, 0, 0, 0, 0, 0, 0, 0, \
326 0, 0, 0, 0, 0, 0, 0, 0, \
327 0, 0, 0, 0, 0, 0, 0, 0, \
328 0, 0, 0, 0, 0, 0, 0, 0, \
329 0, 0, 0, 0, 0, 0, 0, 0, \
330 0, 0, 0, 0, 0, 0, 0, 0, \
333 /* 1 for registers not available across function calls.
334 These must include the FIXED_REGISTERS and also any
335 registers that can be used without being saved.
336 The latter must include the registers where values are returned
337 and the register where structure-value addresses are passed.
338 Aside from that, you can include as many other registers as you like. */
339 #define CALL_USED_REGISTERS \
340 {1, 1, 1, 0, 0, 0, 0, 0, \
341 0, 0, 0, 0, 0, 0, 0, 0, \
342 0, 0, 0, 1, 1, 1, 1, 1, \
343 1, 1, 1, 1, 1, 1, 1, 1, \
344 /* 1.0 fp registers */ \
346 1, 1, 1, 1, 0, 0, 0, 0, \
347 /* 1.1 fp registers */ \
348 1, 1, 1, 1, 1, 1, 1, 1, \
349 1, 1, 1, 1, 1, 1, 1, 1, \
350 0, 0, 0, 0, 0, 0, 0, 0, \
351 0, 0, 0, 0, 0, 0, 0, 0, \
352 0, 0, 0, 0, 1, 1, 1, 1, \
353 1, 1, 1, 1, 1, 1, 1, 1, \
354 1, 1, 1, 1, 1, 1, 1, 1, \
357 /* Make sure everything's fine if we *don't* have a given processor.
358 This assumes that putting a register in fixed_regs will keep the
359 compiler's mitts completely off it. We don't bother to zero it out
360 of register classes. */
362 #define CONDITIONAL_REGISTER_USAGE \
368 COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
369 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
370 if (TEST_HARD_REG_BIT (x, i)) \
371 fixed_regs[i] = call_used_regs[i] = 1; \
373 else if (TARGET_DISABLE_FPREGS) \
375 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]);\
376 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
377 if (TEST_HARD_REG_BIT (x, i)) \
378 fixed_regs[i] = call_used_regs[i] = 1; \
379 COPY_HARD_REG_SET (x, reg_class_contents[(int)SNAKE_FP_REGS]);\
380 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
381 if (TEST_HARD_REG_BIT (x, i)) \
382 fixed_regs[i] = call_used_regs[i] = 1; \
386 COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \
387 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
388 if (TEST_HARD_REG_BIT (x, i)) \
389 fixed_regs[i] = call_used_regs[i] = 1; \
391 /* This makes cse think PIC_OFFSET_TABLE_REGNUM is not clobbered
394 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; */ \
397 /* Allocated the call used registers first. This should minimize
398 the number of registers that need to be saved (as call used
399 registers will generally not be allocated across a call).
401 Experimentation has shown slightly better results by allocating
402 FP registers first. */
404 #define REG_ALLOC_ORDER \
405 /* 1.0 caller-saved fp regs. */ \
406 {36, 37, 38, 39, 32, 33, 34, 35, \
407 /* 1.1 caller-saved fp regs. */ \
408 52, 53, 54, 55, 56, 57, 58, 59, \
409 80, 81, 82, 83, 84, 85, 86, 87, \
410 88, 89, 90, 91, 92, 93, 94, 95, \
412 44, 45, 46, 47, 48, 49, 50, 51, \
413 /* caller-saved general regs. */ \
414 19, 20, 21, 22, 23, 24, 25, 26, \
416 /* 1.0 callee-saved fp regs. */ \
418 /* 1.1 callee-saved fp regs. */ \
419 60, 61, 62, 63, 64, 65, 66, 67, \
420 68, 69, 70, 71, 72, 73, 74, 75, \
422 /* callee-saved general regs. */ \
423 3, 4, 5, 6, 7, 8, 9, 10, \
424 11, 12, 13, 14, 15, 16, 17, 18, \
425 /* special registers. */ \
429 /* Return number of consecutive hard regs needed starting at reg REGNO
430 to hold something of mode MODE.
431 This is ordinarily the length in words of a value of mode MODE
432 but can be less for certain modes in special long registers.
434 On the HP-PA, ordinary registers hold 32 bits worth;
435 The floating point registers are 64 bits wide. Snake fp regs are 32
437 #define HARD_REGNO_NREGS(REGNO, MODE) \
438 (((REGNO) < 32 || (REGNO) >= 44) \
439 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) : 1)
441 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
442 On the HP-PA, the cpu registers can hold any mode. We
443 force this to be an even register is it cannot hold the full mode. */
444 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
445 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
446 : (REGNO) < 32 ? ((GET_MODE_SIZE (MODE) <= 4) ? 1 : ((REGNO) & 1) == 0)\
447 : (REGNO) < 44 ? (GET_MODE_SIZE (MODE) <= 4 \
448 || (GET_MODE_SIZE (MODE) > 4 \
449 && GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
450 : (GET_MODE_SIZE (MODE) > 4 ? ((REGNO) & 1) == 0 \
453 /* Value is 1 if it is a good idea to tie two pseudo registers
454 when one has mode MODE1 and one has mode MODE2.
455 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
456 for any hard reg, then this must be 0 for correct output. */
457 #define MODES_TIEABLE_P(MODE1, MODE2) \
458 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
460 /* Specify the registers used for certain standard purposes.
461 The values of these macros are register numbers. */
463 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
464 /* #define PC_REGNUM */
466 /* Register to use for pushing function arguments. */
467 #define STACK_POINTER_REGNUM 30
469 /* Base register for access to local variables of the function. */
470 #define FRAME_POINTER_REGNUM 3
472 /* Value should be nonzero if functions must have frame pointers. */
473 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
476 /* C statement to store the difference between the frame pointer
477 and the stack pointer values immediately after the function prologue.
479 Note, we always pretend that this is a leaf function because if
480 it's not, there's no point in trying to eliminate the
481 frame pointer. If it is a leaf function, we guessed right! */
482 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
483 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
485 /* Base register for access to arguments of the function. */
486 #define ARG_POINTER_REGNUM 3
488 /* Register in which static-chain is passed to a function. */
490 #define STATIC_CHAIN_REGNUM 29
492 /* Register which holds offset table for position-independent
495 #define PIC_OFFSET_TABLE_REGNUM 19
497 #define FINALIZE_PIC finalize_pic ()
499 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
500 #define RETURN_IN_MEMORY(TYPE) \
501 (TYPE_MODE (TYPE) == BLKmode || int_size_in_bytes (TYPE) > 8)
503 /* Register in which address to store a structure value
504 is passed to a function. */
505 #define STRUCT_VALUE_REGNUM 28
507 /* Define the classes of registers for register constraints in the
508 machine description. Also define ranges of constants.
510 One of the classes must always be named ALL_REGS and include all hard regs.
511 If there is more than one class, another class must be named NO_REGS
512 and contain no registers.
514 The name GENERAL_REGS must be the name of a class (or an alias for
515 another name such as ALL_REGS). This is the class of registers
516 that is allowed by "g" or "r" in a register constraint.
517 Also, registers outside this class are allocated only when
518 instructions express preferences for them.
520 The classes must be numbered in nondecreasing order; that is,
521 a larger-numbered class must never be contained completely
522 in a smaller-numbered class.
524 For any two classes, it is very desirable that there be another
525 class that represents their union. */
527 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
528 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
529 fmpyadd and fmpysub are restricted.
531 FP_OR_SNAKE_FP_REGS is for reload_{in,out}di only and isn't used
534 enum reg_class
{ NO_REGS
, R1_REGS
, GENERAL_REGS
, FP_REGS
, GENERAL_OR_FP_REGS
,
535 HI_SNAKE_FP_REGS
, SNAKE_FP_REGS
, GENERAL_OR_SNAKE_FP_REGS
,
536 FP_OR_SNAKE_FP_REGS
, NON_SHIFT_REGS
, SHIFT_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
538 #define N_REG_CLASSES (int) LIM_REG_CLASSES
540 /* Give names of register classes as strings for dump file. */
542 #define REG_CLASS_NAMES \
543 { "NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", "GENERAL_OR_FP_REGS",\
544 "HI_SNAKE_FP_REGS", "SNAKE_FP_REGS", "GENERAL_OR_SNAKE_FP_REGS",\
545 "FP_OR_SNAKE_FP_REGS", "NON_SHIFT_REGS", "SHIFT_REGS", "ALL_REGS"}
547 /* Define which registers fit in which classes.
548 This is an initializer for a vector of HARD_REG_SET
549 of length N_REG_CLASSES. Register 0, the "condition code" register,
552 #define REG_CLASS_CONTENTS \
553 { {0, 0, 0, 0}, /* NO_REGS */ \
554 {0x2, 0, 0, 0}, /* R1_REGS */ \
555 {-2, 0, 0, 0}, /* GENERAL_REGS */ \
556 {0, 0xfff, 0, 0}, /* FP_REGS */ \
557 {-2, 0xfff, 0, 0}, /* GENERAL_OR_FP_REGS */\
558 {0, 0, 0xfffffff0, 0xf}, /* HI_SNAKE_FP_REGS */ \
559 {0, 0xfffff000, ~0, 0xf}, /* SNAKE_FP_REGS */ \
560 {-2, 0xfffff000, ~0, 0xf}, /* GENERAL_OR_SNAKE_FP_REGS */\
561 {0, ~0, ~0, 0xf}, /* FP_OR_SNAKE_FP_REGS */\
562 {-2, ~0, ~0, ~0x10}, /* NON_SHIFT_REGS */ \
563 {0, 0, 0, 0x10}, /* SHIFT_REGS */ \
564 {-2, ~0, ~0, 0x1f}} /* ALL_REGS */
566 /* The same information, inverted:
567 Return the class number of the smallest class containing
568 reg number REGNO. This could be a conditional expression
569 or could index an array. */
571 #define REGNO_REG_CLASS(REGNO) \
572 ((REGNO) == 0 ? NO_REGS \
573 : (REGNO) == 1 ? R1_REGS \
574 : (REGNO) < 32 ? GENERAL_REGS \
575 : (REGNO) < 44 ? FP_REGS \
576 : (REGNO) < 68 ? SNAKE_FP_REGS \
577 : (REGNO) < 100 ? HI_SNAKE_FP_REGS \
580 /* The class value for index registers, and the one for base regs. */
581 #define INDEX_REG_CLASS GENERAL_REGS
582 #define BASE_REG_CLASS GENERAL_REGS
584 #define FP_REG_CLASS_P(CLASS) \
585 (CLASS == FP_REGS || CLASS == SNAKE_FP_REGS || CLASS == HI_SNAKE_FP_REGS)
587 /* Get reg_class from a letter such as appears in the machine description.
588 Note 'Z' is not the same as 'r' since SHIFT_REGS is not part of
591 #define REG_CLASS_FROM_LETTER(C) \
592 ((C) == 'f' ? (!TARGET_SNAKE ? FP_REGS : NO_REGS) : \
593 ((C) == 'x' ? (TARGET_SNAKE ? SNAKE_FP_REGS : NO_REGS) : \
594 ((C) == 'y' ? (TARGET_SNAKE ? HI_SNAKE_FP_REGS : NO_REGS) : \
595 ((C) == 'q' ? SHIFT_REGS : \
596 ((C) == 'a' ? R1_REGS : \
597 ((C) == 'z' ? FP_OR_SNAKE_FP_REGS : \
598 ((C) == 'Z' ? ALL_REGS : NO_REGS)))))))
600 /* The letters I, J, K, L and M in a register constraint string
601 can be used to stand for particular ranges of immediate operands.
602 This macro defines what the ranges are.
603 C is the letter, and VALUE is a constant value.
604 Return 1 if VALUE is in the range specified by C.
606 `I' is used for the 11 bit constants.
607 `J' is used for the 14 bit constants.
608 `K' is used for values that can be moved with a zdepi insn.
609 `L' is used for the 5 bit constants.
611 `N' is used for values with the least significant 11 bits equal to zero.
612 `O' is used for numbers n such that n+1 is a power of 2.
615 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
616 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
617 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
618 : (C) == 'K' ? zdepi_cint_p (VALUE) \
619 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
620 : (C) == 'M' ? (VALUE) == 0 \
621 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
622 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
623 : (C) == 'P' ? and_mask_p (VALUE) \
626 /* Similar, but for floating or large integer constants, and defining letters
627 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
629 For PA, `G' is the floating-point constant zero. `H' is undefined. */
631 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
632 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
633 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
636 /* Given an rtx X being reloaded into a reg required to be
637 in class CLASS, return the class of reg to actually use.
638 In general this is just CLASS; but on some machines
639 in some cases it is preferable to use a more restrictive class. */
640 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
642 /* Return the register class of a scratch register needed to copy IN into
643 or out of a register in CLASS in MODE. If it can be done directly,
644 NO_REGS is returned. */
646 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
647 secondary_reload_class (CLASS, MODE, IN)
649 /* On the PA it is not possible to directly move data between
650 GENERAL_REGS and FP_REGS. */
651 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
652 ((FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2)) \
653 || (! FP_REG_CLASS_P (CLASS1) && FP_REG_CLASS_P (CLASS2)))
655 /* Return the stack location to use for secondary memory needed reloads. */
656 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
657 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
659 /* Return the maximum number of consecutive registers
660 needed to represent mode MODE in a register of class CLASS. */
661 #define CLASS_MAX_NREGS(CLASS, MODE) \
662 ((CLASS) == FP_REGS ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
664 /* Stack layout; function entry, exit and calling. */
666 /* Define this if pushing a word on the stack
667 makes the stack pointer a smaller address. */
668 /* #define STACK_GROWS_DOWNWARD */
670 /* Believe it or not. */
671 #define ARGS_GROW_DOWNWARD
673 /* Define this if the nominal address of the stack frame
674 is at the high-address end of the local variables;
675 that is, each additional local variable allocated
676 goes at a more negative offset in the frame. */
677 /* #define FRAME_GROWS_DOWNWARD */
679 /* Offset within stack frame to start allocating local variables at.
680 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
681 first local allocated. Otherwise, it is the offset to the BEGINNING
682 of the first local allocated. */
683 #define STARTING_FRAME_OFFSET 8
685 /* If we generate an insn to push BYTES bytes,
686 this says how many the stack pointer really advances by.
687 On the HP-PA, don't define this because there are no push insns. */
688 /* #define PUSH_ROUNDING(BYTES) */
690 /* Offset of first parameter from the argument pointer register value.
691 This value will be negated because the arguments grow down.
692 Also note that on STACK_GROWS_UPWARD machines (such as this one)
693 this is the distance from the frame pointer to the end of the first
694 argument, not it's beginning. To get the real offset of the first
695 argument, the size of the argument must be added.
697 ??? Have to check on this.*/
699 #define FIRST_PARM_OFFSET(FNDECL) -32
701 /* Absolute value of offset from top-of-stack address to location to store the
702 function parameter if it can't go in a register.
703 Addresses for following parameters are computed relative to this one. */
704 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
707 /* When a parameter is passed in a register, stack space is still
709 #define REG_PARM_STACK_SPACE(DECL) 16
711 /* Define this if the above stack space is to be considered part of the
712 space allocated by the caller. */
713 #define OUTGOING_REG_PARM_STACK_SPACE
715 /* Keep the stack pointer constant throughout the function.
716 This is both an optimization and a necessity: longjmp
717 doesn't behave itself when the stack pointer moves within
719 #define ACCUMULATE_OUTGOING_ARGS
721 /* The weird HPPA calling conventions require a minimum of 48 bytes on
722 the stack: 16 bytes for register saves, and 32 bytes for magic.
723 This is the difference between the logical top of stack and the
725 #define STACK_POINTER_OFFSET -32
727 #define STACK_DYNAMIC_OFFSET(FNDECL) \
728 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
730 /* Value is 1 if returning from a function call automatically
731 pops the arguments described by the number-of-args field in the call.
732 FUNTYPE is the data type of the function (as a tree),
733 or for a library call it is an identifier node for the subroutine name. */
735 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
737 /* Define how to find the value returned by a function.
738 VALTYPE is the data type of the value (as a tree).
739 If the precise function being called is known, FUNC is its FUNCTION_DECL;
740 otherwise, FUNC is 0. */
742 /* On the HP-PA the value is found in register(s) 28(-29), unless
743 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
746 #define FUNCTION_VALUE(VALTYPE, FUNC) \
747 gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode || \
748 TYPE_MODE (VALTYPE) == DFmode) ? \
749 (TARGET_SNAKE ? 44 : 32) : 28))
751 /* Define how to find the value returned by a library function
752 assuming the value has mode MODE. */
754 #define LIBCALL_VALUE(MODE) \
755 gen_rtx (REG, MODE, (MODE == SFmode || MODE == DFmode ?\
756 (TARGET_SNAKE ? 44 : 32) : 28))
758 /* 1 if N is a possible register number for a function value
759 as seen by the caller. */
761 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 28 || (N) == (TARGET_SNAKE ? 44 : 32))
763 /* 1 if N is a possible register number for function argument passing. */
765 #define FUNCTION_ARG_REGNO_P(N) \
766 (((N) >= 23 && (N) <= 26) \
767 || ((N) >= 32 && (N) <= 35 && ! TARGET_SNAKE) \
768 || ((N) >= 44 && (N) <= 51 && TARGET_SNAKE))
770 /* Define a data type for recording info about an argument list
771 during the scan of that argument list. This data type should
772 hold all necessary information about the function itself
773 and about the args processed so far, enough to enable macros
774 such as FUNCTION_ARG to determine where the next arg should go.
776 On the HP-PA, this is a single integer, which is a number of words
777 of arguments scanned so far (including the invisible argument,
778 if any, which holds the structure-value-address).
779 Thus 4 or more means all following args should go on the stack. */
781 #define CUMULATIVE_ARGS int
783 /* Initialize a variable CUM of type CUMULATIVE_ARGS
784 for a call to a function whose data type is FNTYPE.
785 For a library call, FNTYPE is 0.
788 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) ((CUM) = 0)
790 /* Figure out the size in words of the function argument. */
792 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
793 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
795 /* Update the data in CUM to advance over an argument
796 of mode MODE and data type TYPE.
797 (TYPE is null for libcalls where that information may not be available.) */
799 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
800 (((((CUM) & 01) && (TYPE) != 0 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1)\
801 && (CUM)++), (CUM) += FUNCTION_ARG_SIZE(MODE, TYPE))
803 /* Determine where to put an argument to a function.
804 Value is zero to push the argument on the stack,
805 or a hard register in which to store the argument.
807 MODE is the argument's machine mode.
808 TYPE is the data type of the argument (as a tree).
809 This is null for libcalls where that information may
811 CUM is a variable of type CUMULATIVE_ARGS which gives info about
812 the preceding args and about the function being called.
813 NAMED is nonzero if this argument is a named parameter
814 (otherwise it is an extra parameter matching an ellipsis). */
816 /* On the HP-PA the first four words of args are normally in registers
817 and the rest are pushed. But any arg that won't entirely fit in regs
820 Arguments passed in registers are either 1 or 2 words long.
822 The caller must make a distinction between calls to explicitly named
823 functions and calls through pointers to functions -- the conventions
824 are different! Calls through pointers to functions only use general
825 registers for the first four argument words. */
827 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
829 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
830 (4 >= ((CUM) + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
831 ? gen_rtx (REG, (MODE), \
832 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
833 ? ((! current_call_is_indirect \
834 && (MODE) == DFmode) \
835 ? ((CUM) ? (TARGET_SNAKE ? 50 : 35) \
836 : (TARGET_SNAKE ? 46 : 33)) \
837 : ((CUM) ? 23 : 25)) \
838 : ((! current_call_is_indirect \
839 && (MODE) == SFmode) \
840 ? (TARGET_SNAKE ? 44 + 2 * (CUM) : 32 + (CUM)) \
841 : (27 - (CUM) - FUNCTION_ARG_SIZE ((MODE), (TYPE))))))\
844 /* For an arg passed partly in registers and partly in memory,
845 this is the number of registers used.
846 For args passed entirely in registers or entirely in memory, zero. */
848 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
850 /* If defined, a C expression that gives the alignment boundary, in
851 bits, of an argument with the specified mode and type. If it is
852 not defined, `PARM_BOUNDARY' is used for all arguments. */
854 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
856 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
857 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
859 : GET_MODE_ALIGNMENT(MODE)))
861 /* Arguments larger than eight bytes are passed by invisible reference */
863 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
864 ((TYPE) && int_size_in_bytes (TYPE) > 8)
866 extern struct rtx_def
*hppa_compare_op0
, *hppa_compare_op1
;
867 extern enum cmp_type hppa_branch_type
;
869 /* Output the label for a function definition. */
870 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
871 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
872 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
873 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
875 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
876 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
877 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
880 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
881 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
882 tree tree_type = TREE_TYPE (DECL); \
885 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
886 { extern int current_function_varargs; \
887 if (TREE_PUBLIC (DECL)) \
889 fputs ("\t.EXPORT ", FILE); \
890 assemble_name (FILE, NAME); \
891 fputs (",ENTRY,PRIV_LEV=3", FILE); \
895 fputs ("\t.PARAM ", FILE); \
896 assemble_name (FILE, NAME); \
898 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
899 parm = TREE_CHAIN (parm)) \
901 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
902 fprintf (FILE, ",ARGW%d=FR", i++); \
903 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
908 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
916 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
917 DECL_ARG_TYPE (parm)); \
918 if (arg_size == 2 && i <= 2) \
921 fprintf (FILE, ",ARGW%d=GR", i++); \
922 fprintf (FILE, ",ARGW%d=GR", i++); \
924 else if (arg_size == 1) \
925 fprintf (FILE, ",ARGW%d=GR", i++); \
930 /* anonymous args */ \
931 if ((TYPE_ARG_TYPES (tree_type) != 0 \
932 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
933 != void_type_node)) \
934 || current_function_varargs) \
937 fprintf (FILE, ",ARGW%d=GR", i); \
939 if (TYPE_MODE (fntype) == DFmode) \
940 fprintf (FILE, ",RTNVAL=FR"); \
941 else if (TYPE_MODE (fntype) == SFmode) \
942 fprintf (FILE, ",RTNVAL=FU"); \
943 else if (fntype != void_type_node) \
944 fprintf (FILE, ",RTNVAL=GR"); \
945 fputs ("\n", FILE); \
948 /* This macro generates the assembly code for function entry.
949 FILE is a stdio stream to output the code to.
950 SIZE is an int: how many units of temporary storage to allocate.
951 Refer to the array `regs_ever_live' to determine which registers
952 to save; `regs_ever_live[I]' is nonzero if register number I
953 is ever used in the function. This macro is responsible for
954 knowing which registers should not be saved even if used. */
956 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
957 of memory. If any fpu reg is used in the function, we allocate
958 such a block here, at the bottom of the frame, just in case it's needed.
960 If this function is a leaf procedure, then we may choose not
961 to do a "save" insn. The decision about whether or not
962 to do this is made in regclass.c. */
964 #define FUNCTION_PROLOGUE(FILE, SIZE) \
965 output_function_prologue (FILE, SIZE)
967 /* Output assembler code to FILE to increment profiler label # LABELNO
968 for profiling a function entry.
970 Because HPUX _mcount is so different, we actually emit the
971 profiling code in function_prologue. This just stores LABELNO for
974 #define PROFILE_BEFORE_PROLOGUE
975 #define FUNCTION_PROFILER(FILE, LABELNO) \
976 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
978 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
979 the stack pointer does not matter. The value is tested only in
980 functions that have frame pointers.
981 No definition is equivalent to always zero. */
983 extern int may_call_alloca
;
984 extern int current_function_pretend_args_size
;
986 #define EXIT_IGNORE_STACK \
987 (get_frame_size () != 0 \
988 || current_function_calls_alloca || current_function_outgoing_args_size)
991 /* This macro generates the assembly code for function exit,
992 on machines that need it. If FUNCTION_EPILOGUE is not defined
993 then individual return instructions are generated for each
994 return statement. Args are same as for FUNCTION_PROLOGUE.
996 The function epilogue should not depend on the current stack pointer!
997 It should use the frame pointer only. This is mandatory because
998 of alloca; we also take advantage of it to omit stack adjustments
1001 /* This declaration is needed due to traditional/ANSI
1002 incompatibilities which cannot be #ifdefed away
1003 because they occur inside of macros. Sigh. */
1004 extern union tree_node
*current_function_decl
;
1006 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1007 output_function_epilogue (FILE, SIZE)
1009 /* Output assembler code for a block containing the constant parts
1010 of a trampoline, leaving space for the variable parts.\
1012 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1013 and then branches to the specified routine.
1015 This code template is copied from text segment to stack location
1016 and then patched with INITIALIZE_TRAMPOLINE to contain
1017 valid values, and then entered as a subroutine.
1019 It is best to keep this as small as possible to avoid having to
1020 flush multiple lines in the cache. */
1022 #define TRAMPOLINE_TEMPLATE(FILE) \
1024 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1025 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1026 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1027 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1028 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1029 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1030 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1031 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1032 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1033 fprintf (FILE, "\t.word 0\n"); \
1034 fprintf (FILE, "\t.word 0\n"); \
1037 /* Length in units of the trampoline for entering a nested function.
1039 Flush the cache entries corresponding to the first and last addresses
1040 of the trampoline. This is necessary as the trampoline may cross two
1043 If the code part of the trampoline ever grows to > 32 bytes, then it
1044 will become necessary to hack on the cacheflush pattern in pa.md. */
1046 #define TRAMPOLINE_SIZE (11 * 4)
1048 /* Emit RTL insns to initialize the variable parts of a trampoline.
1049 FNADDR is an RTX for the address of the function's pure code.
1050 CXT is an RTX for the static chain value for the function.
1052 Move the function address to the trampoline template at offset 12.
1053 Move the static chain value to trampoline template at offset 16. */
1055 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1057 rtx start_addr, end_addr, masked_start_addr; \
1059 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1060 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1061 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1062 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1063 /* fdc and fic only use registers for the address to flush, \
1064 they do not accept integer displacements. */ \
1065 start_addr = force_reg (SImode, (TRAMP)); \
1066 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1067 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1068 masked_start_addr = gen_reg_rtx (SImode); \
1069 emit_insn (gen_andsi3 (masked_start_addr, start_addr, \
1070 GEN_INT (0x3fffffff))); \
1071 end_addr = force_reg (SImode, plus_constant (masked_start_addr, 32)); \
1072 emit_insn (gen_icacheflush (masked_start_addr, end_addr, start_addr, \
1073 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1076 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1077 reference the 4 integer arg registers and 4 fp arg registers.
1078 Ordinarily they are not call used registers, but they are for
1079 _builtin_saveregs, so we must make this explicit. */
1081 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1084 /* Addressing modes, and classification of registers for them. */
1086 #define HAVE_POST_INCREMENT
1087 #define HAVE_POST_DECREMENT
1089 #define HAVE_PRE_DECREMENT
1090 #define HAVE_PRE_INCREMENT
1092 /* Macros to check register numbers against specific register classes. */
1094 /* These assume that REGNO is a hard or pseudo reg number.
1095 They give nonzero only if REGNO is a hard reg of the suitable class
1096 or a pseudo reg currently allocated to a suitable hard reg.
1097 Since they use reg_renumber, they are safe only once reg_renumber
1098 has been allocated, which happens in local-alloc.c. */
1100 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1101 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1102 #define REGNO_OK_FOR_BASE_P(REGNO) \
1103 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1104 #define REGNO_OK_FOR_FP_P(REGNO) \
1105 (((REGNO) >= 32 && (REGNO) <= 99)\
1106 || (reg_renumber[REGNO] >= 32 && reg_renumber[REGNO] <= 99))
1108 /* Now macros that check whether X is a register and also,
1109 strictly, whether it is in a specified class.
1111 These macros are specific to the the HP-PA, and may be used only
1112 in code for printing assembler insns and in conditions for
1113 define_optimization. */
1115 /* 1 if X is an fp register. */
1117 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1119 /* Maximum number of registers that can appear in a valid memory address. */
1121 #define MAX_REGS_PER_ADDRESS 2
1123 /* Recognize any constant value that is a valid address except
1124 for symbolic addresses. We get better CSE by rejecting them
1125 here and allowing hppa_legitimize_address to break them up. We
1126 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1128 #define CONSTANT_ADDRESS_P(X) \
1129 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1130 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1131 || GET_CODE (X) == HIGH) \
1132 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1134 /* Include all constant integers and constant doubles, but not
1135 floating-point, except for floating-point zero. */
1137 #define LEGITIMATE_CONSTANT_P(X) \
1138 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1139 || (X) == CONST0_RTX (GET_MODE (X)))
1141 /* Subroutine for EXTRA_CONSTRAINT.
1143 Return 1 iff OP is a pseudo which did not get a hard register and
1144 we are running the reload pass. */
1146 #define IS_RELOADING_PSEUDO_P(OP) \
1147 ((reload_in_progress \
1148 && GET_CODE (OP) == REG \
1149 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1150 && reg_renumber [REGNO (OP)] < 0))
1152 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1154 For the HPPA, `Q' means that this is a memory operand but not a
1155 symbolic memory operand. Note that an unassigned pseudo register
1156 is such a memory operand. Needed because reload will generate
1157 these things in insns and then not re-recognize the insns, causing
1158 constrain_operands to fail.
1160 Also note `Q' accepts any memory operand during the reload pass.
1161 This includes out-of-range displacements in reg+d addressing.
1162 This makes for better code. (??? For 2.5 address this issue).
1168 `T' is for fp loads and stores. */
1169 #define EXTRA_CONSTRAINT(OP, C) \
1171 (IS_RELOADING_PSEUDO_P (OP) \
1172 || (GET_CODE (OP) == MEM \
1173 && reload_in_progress) \
1174 || (GET_CODE (OP) == MEM \
1175 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1176 && ! symbolic_memory_operand (OP, VOIDmode))) \
1178 (GET_CODE (OP) == MEM \
1179 /* Using DFmode forces only short displacements \
1180 to be recognized as valid in reg+d addresses. */\
1181 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1183 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1184 and check its validity for a certain class.
1185 We have two alternate definitions for each of them.
1186 The usual definition accepts all pseudo regs; the other rejects
1187 them unless they have been allocated suitable hard regs.
1188 The symbol REG_OK_STRICT causes the latter definition to be used.
1190 Most source files want to accept pseudo regs in the hope that
1191 they will get allocated to the class that the insn wants them to be in.
1192 Source files for reload pass need to be strict.
1193 After reload, it makes no difference, since pseudo regs have
1194 been eliminated by then. */
1196 #ifndef REG_OK_STRICT
1198 /* Nonzero if X is a hard reg that can be used as an index
1199 or if it is a pseudo reg. */
1200 #define REG_OK_FOR_INDEX_P(X) \
1201 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1202 /* Nonzero if X is a hard reg that can be used as a base reg
1203 or if it is a pseudo reg. */
1204 #define REG_OK_FOR_BASE_P(X) \
1205 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1209 /* Nonzero if X is a hard reg that can be used as an index. */
1210 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1211 /* Nonzero if X is a hard reg that can be used as a base reg. */
1212 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1216 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1217 that is a valid memory address for an instruction.
1218 The MODE argument is the machine mode for the MEM expression
1219 that wants to use this address.
1221 On the HP-PA, the actual legitimate addresses must be
1222 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1223 But we can treat a SYMBOL_REF as legitimate if it is part of this
1224 function's constant-pool, because such addresses can actually
1225 be output as REG+SMALLINT. */
1227 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1228 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1230 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1231 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1233 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1234 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1236 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1237 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1239 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1241 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1242 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1243 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1244 && REG_P (XEXP (X, 0)) \
1245 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1247 else if (GET_CODE (X) == PLUS) \
1249 rtx base = 0, index; \
1250 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1252 if (GET_CODE (XEXP (X, 1)) == REG \
1253 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1255 else if (flag_pic == 1 \
1256 && GET_CODE (XEXP (X, 1)) != REG \
1257 && GET_CODE (XEXP (X, 1)) != LO_SUM \
1258 && GET_CODE (XEXP (X, 1)) != MEM) \
1261 else if (REG_P (XEXP (X, 0)) \
1262 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1263 base = XEXP (X, 0), index = XEXP (X, 1); \
1264 else if (REG_P (XEXP (X, 1)) \
1265 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1266 base = XEXP (X, 1), index = XEXP (X, 0); \
1268 if (GET_CODE (index) == CONST_INT \
1269 && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1270 || INT_5_BITS (index))) \
1273 else if (GET_CODE (X) == LO_SUM \
1274 && GET_CODE (XEXP (X, 0)) == REG \
1275 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1276 && CONSTANT_P (XEXP (X, 1)) \
1277 && (MODE) != SFmode \
1278 && (MODE) != DFmode) \
1280 else if (GET_CODE (X) == LO_SUM \
1281 && GET_CODE (XEXP (X, 0)) == SUBREG \
1282 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1283 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1284 && CONSTANT_P (XEXP (X, 1)) \
1285 && (MODE) != SFmode \
1286 && (MODE) != DFmode) \
1288 else if (GET_CODE (X) == LABEL_REF \
1289 || (GET_CODE (X) == CONST_INT \
1290 && INT_14_BITS (X))) \
1294 /* Try machine-dependent ways of modifying an illegitimate address
1295 to be legitimate. If we find one, return the new, valid address.
1296 This macro is used in only one place: `memory_address' in explow.c.
1298 OLDX is the address as it was before break_out_memory_refs was called.
1299 In some cases it is useful to look at this to decide what needs to be done.
1301 MODE and WIN are passed so that this macro can use
1302 GO_IF_LEGITIMATE_ADDRESS.
1304 It is always safe for this macro to do nothing. It exists to recognize
1305 opportunities to optimize the output. */
1307 extern struct rtx_def
*hppa_legitimize_address ();
1308 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1309 { rtx orig_x = (X); \
1310 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1311 if ((X) != orig_x && memory_address_p (MODE, X)) \
1314 /* Go to LABEL if ADDR (a legitimate address expression)
1315 has an effect that depends on the machine mode it is used for. */
1317 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1318 if (GET_CODE (ADDR) == PRE_DEC \
1319 || GET_CODE (ADDR) == POST_DEC \
1320 || GET_CODE (ADDR) == PRE_INC \
1321 || GET_CODE (ADDR) == POST_INC) \
1324 /* Define this macro if references to a symbol must be treated
1325 differently depending on something about the variable or
1326 function named by the symbol (such as what section it is in).
1328 The macro definition, if any, is executed immediately after the
1329 rtl for DECL or other node is created.
1330 The value of the rtl will be a `mem' whose address is a
1333 The usual thing for this macro to do is to a flag in the
1334 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1335 name string in the `symbol_ref' (if one bit is not enough
1338 On the HP-PA we use this to indicate if a symbol is in text or
1339 data space. Also, function labels need special treatment. */
1341 #define TEXT_SPACE_P(DECL)\
1342 (TREE_CODE (DECL) == FUNCTION_DECL \
1343 || (TREE_CODE (DECL) == VAR_DECL \
1344 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1346 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1347 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1349 #define FUNCTION_NAME_P(NAME) \
1350 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1352 #define ENCODE_SECTION_INFO(DECL)\
1354 { if (TEXT_SPACE_P (DECL)) \
1356 if (TREE_CODE (DECL) == FUNCTION_DECL \
1357 || TREE_CODE (DECL) == VAR_DECL) \
1358 _rtl = DECL_RTL (DECL); \
1360 _rtl = TREE_CST_RTL (DECL); \
1361 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1362 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1363 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1368 /* Store the user-specified part of SYMBOL_NAME in VAR.
1369 This is sort of inverse to ENCODE_SECTION_INFO. */
1371 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1372 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1373 1 + (SYMBOL_NAME)[1] == '@'\
1374 : (SYMBOL_NAME)[0] == '@'))
1376 /* Specify the machine mode that this machine uses
1377 for the index in the tablejump instruction. */
1378 #define CASE_VECTOR_MODE DImode
1380 /* Define this if the tablejump instruction expects the table
1381 to contain offsets from the address of the table.
1382 Do not define this if the table should contain absolute addresses. */
1383 /* #define CASE_VECTOR_PC_RELATIVE */
1385 #define CASE_DROPS_THROUGH
1386 /* Specify the tree operation to be used to convert reals to integers. */
1387 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1389 /* This is the kind of divide that is easiest to do in the general case. */
1390 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1392 /* Define this as 1 if `char' should by default be signed; else as 0. */
1393 #define DEFAULT_SIGNED_CHAR 1
1395 /* Max number of bytes we can move from memory to memory
1396 in one reasonably fast instruction. */
1399 /* Define if operations between registers always perform the operation
1400 on the full register even if a narrower mode is specified. */
1401 #define WORD_REGISTER_OPERATIONS
1403 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1404 will either zero-extend or sign-extend. The value of this macro should
1405 be the code that says which one of the two operations is implicitly
1406 done, NIL if none. */
1407 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1409 /* Nonzero if access to memory by bytes is slow and undesirable. */
1410 #define SLOW_BYTE_ACCESS 1
1412 /* Do not break .stabs pseudos into continuations. */
1413 #define DBX_CONTIN_LENGTH 0
1415 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1416 is done just by pretending it is already truncated. */
1417 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1419 /* We assume that the store-condition-codes instructions store 0 for false
1420 and some other value for true. This is the value stored for true. */
1422 #define STORE_FLAG_VALUE 1
1424 /* When a prototype says `char' or `short', really pass an `int'. */
1425 #define PROMOTE_PROTOTYPES
1427 /* Specify the machine mode that pointers have.
1428 After generation of rtl, the compiler makes no further distinction
1429 between pointers and any other objects of this machine mode. */
1430 #define Pmode SImode
1432 /* Add any extra modes needed to represent the condition code.
1434 HPPA floating comparisons produce condition codes. */
1435 #define EXTRA_CC_MODES CCFPmode
1437 /* Define the names for the modes specified above. */
1438 #define EXTRA_CC_NAMES "CCFP"
1440 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1441 return the mode to be used for the comparison. For floating-point, CCFPmode
1442 should be used. CC_NOOVmode should be used when the first operand is a
1443 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1445 #define SELECT_CC_MODE(OP,X,Y) \
1446 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1448 /* A function address in a call instruction
1449 is a byte address (for indexing purposes)
1450 so give the MEM rtx a byte's mode. */
1451 #define FUNCTION_MODE SImode
1453 /* Define this if addresses of constant functions
1454 shouldn't be put through pseudo regs where they can be cse'd.
1455 Desirable on machines where ordinary constants are expensive
1456 but a CALL with constant address is cheap. */
1457 #define NO_FUNCTION_CSE
1459 /* Define this to be nonzero if shift instructions ignore all but the low-order
1461 #define SHIFT_COUNT_TRUNCATED 1
1463 /* Use atexit for static constructors/destructors, instead of defining
1464 our own exit function. */
1467 /* Compute the cost of computing a constant rtl expression RTX
1468 whose rtx-code is CODE. The body of this macro is a portion
1469 of a switch statement. If the code is computed here,
1470 return it with a return statement. Otherwise, break from the switch. */
1472 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1474 if (INTVAL (RTX) == 0) return 0; \
1475 if (INT_14_BITS (RTX)) return 1; \
1482 case CONST_DOUBLE: \
1483 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1484 && OUTER_CODE != SET) \
1489 #define ADDRESS_COST(RTX) \
1490 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1492 /* Compute extra cost of moving data between one register class
1495 Make moves from SAR so expensive they should never happen. We used to
1496 have 0xffff here, but that generates overflow in rare cases.
1498 Copies involving a FP register and a non-FP register are relatively
1499 expensive because they must go through memory.
1501 Other copies are reasonably cheap. */
1502 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1503 (CLASS1 == SHIFT_REGS ? 0x100 \
1504 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1505 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1509 /* Provide the costs of a rtl expression. This is in the body of a
1510 switch on CODE. The purpose for the cost of MULT is to encourage
1511 `synth_mult' to find a synthetic multiply when reasonable. */
1513 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1515 return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1516 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1521 return COSTS_N_INSNS (60); \
1523 if (GET_CODE (XEXP (X, 0)) == MULT \
1524 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1525 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1526 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1529 /* Adjust the cost of dependencies. */
1531 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1532 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1534 /* Handling the special cases is going to get too complicated for a macro,
1535 just call `pa_adjust_insn_length' to do the real work. */
1536 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1537 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1539 /* Enable a bug fix. (This is for extra caution.) */
1540 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1542 /* Millicode insns are actually function calls with some special
1543 constraints on arguments and register usage.
1545 Millicode calls always expect their arguments in the integer argument
1546 registers, and always return their result in %r29 (ret1). They
1547 are expected to clobber their arguments, %r1, %r29, and %r31 and
1550 These macros tell reorg that the references to arguments and
1551 register clobbers for millicode calls do not appear to happen
1552 until after the millicode call. This allows reorg to put insns
1553 which set the argument registers into the delay slot of the millicode
1554 call -- thus they act more like traditional CALL_INSNs.
1556 get_attr_type will try to recognize the given insn, so make sure to
1557 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1559 #define INSN_SETS_ARE_DELAYED(X) \
1560 ((GET_CODE (X) == INSN \
1561 && GET_CODE (PATTERN (X)) != SEQUENCE \
1562 && GET_CODE (PATTERN (X)) != USE \
1563 && GET_CODE (PATTERN (X)) != CLOBBER \
1564 && get_attr_type (X) == TYPE_MILLI))
1566 #define INSN_REFERENCES_ARE_DELAYED(X) \
1567 ((GET_CODE (X) == INSN \
1568 && GET_CODE (PATTERN (X)) != SEQUENCE \
1569 && GET_CODE (PATTERN (X)) != USE \
1570 && GET_CODE (PATTERN (X)) != CLOBBER \
1571 && get_attr_type (X) == TYPE_MILLI))
1574 /* Control the assembler format that we output. */
1576 /* Output at beginning of assembler file. */
1578 #define ASM_FILE_START(FILE) \
1579 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1580 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1581 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1583 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1584 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1585 \t.IMPORT $global$,DATA\n\
1586 \t.IMPORT $$dyncall,MILLICODE\n");\
1588 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1589 if (write_symbols != NO_DEBUG) \
1590 output_file_directive ((FILE), main_input_filename); \
1593 /* Output to assembler file text saying following lines
1594 may contain character constants, extra white space, comments, etc. */
1596 #define ASM_APP_ON ""
1598 /* Output to assembler file text saying following lines
1599 no longer contain unusual constructs. */
1601 #define ASM_APP_OFF ""
1603 /* We don't yet know how to identify GCC to HP-PA machines. */
1604 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1606 /* Output before code. */
1608 /* Supposedly the assembler rejects the command if there is no tab! */
1609 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1611 /* Output before read-only data. */
1613 /* Supposedly the assembler rejects the command if there is no tab! */
1614 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1616 #define READONLY_DATA_SECTION readonly_data
1618 /* Output before writable data. */
1620 /* Supposedly the assembler rejects the command if there is no tab! */
1621 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1623 /* Output before uninitialized data. */
1625 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1627 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1629 #define EXTRA_SECTIONS in_bss, in_readonly_data
1631 #define EXTRA_SECTION_FUNCTIONS \
1635 if (in_section != in_bss) \
1637 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1638 in_section = in_bss; \
1644 if (in_section != in_readonly_data) \
1646 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1647 in_section = in_readonly_data; \
1652 /* How to refer to registers in assembler output.
1653 This sequence is indexed by compiler's hard-register-number (see above). */
1655 #define REGISTER_NAMES \
1656 {"0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1657 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1658 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1659 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1660 "%fr4", "%fr5", "%fr6", "%fr7", \
1661 "%fr8", "%fr9", "%fr10", "%fr11", "%fr12", "%fr13", "%fr14", "%fr15", \
1662 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1663 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R",\
1664 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R",\
1665 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R",\
1666 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R",\
1667 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R",\
1668 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R",\
1671 /* How to renumber registers for dbx and gdb. */
1673 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1675 /* This is how to output the definition of a user-level label named NAME,
1676 such as the label on a static function or variable NAME. */
1678 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1679 do { assemble_name (FILE, NAME); \
1681 fputc (':', FILE); \
1682 fputc ('\n', FILE); } while (0)
1684 /* This is how to output a command to make the user-level label named NAME
1685 defined for reference from other files. */
1687 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1688 do { fputs ("\t.IMPORT ", FILE); \
1689 assemble_name (FILE, NAME); \
1690 if (FUNCTION_NAME_P (NAME)) \
1691 fputs (",CODE\n", FILE); \
1693 fputs (",DATA\n", FILE); \
1696 /* hpux ld doesn't output the object file name, or anything useful at
1697 all, to indicate the start of an object file's symbols. This screws
1698 up gdb, so we'll output this magic cookie at the end of an object
1699 file with debugging symbols */
1701 #define ASM_FILE_END(FILE) \
1702 do { if (write_symbols == DBX_DEBUG)\
1703 { fputs (TEXT_SECTION_ASM_OP, FILE);\
1704 fputs ("\t.stabs \"end_file.\",4,0,0,Ltext_end\nLtext_end:\n",\
1709 /* The bogus HP assembler requires ALL external references to be
1710 "imported", even library calls. They look a bit different, so
1711 here's this macro. */
1713 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1714 do { fputs ("\t.IMPORT ", FILE); \
1715 assemble_name (FILE, XSTR ((RTL), 0)); \
1716 fputs (",CODE\n", FILE); \
1719 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1720 do { fputs ("\t.EXPORT ", FILE); assemble_name (FILE, NAME); \
1721 if (FUNCTION_NAME_P (NAME)) \
1722 fputs (",CODE\n", FILE); \
1724 fputs (",DATA\n", FILE);} while (0)
1726 /* This is how to output a reference to a user-level label named NAME.
1727 `assemble_name' uses this. */
1729 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1730 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1732 /* This is how to output an internal numbered label where
1733 PREFIX is the class of label and NUM is the number within the class. */
1735 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1736 {fprintf (FILE, "%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM);\
1738 fputs (":\n", FILE); \
1740 fputs ("\n", FILE);}
1742 /* This is how to store into the string LABEL
1743 the symbol_ref name of an internal numbered label where
1744 PREFIX is the class of label and NUM is the number within the class.
1745 This is suitable for output with `assemble_name'. */
1747 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1748 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1750 /* This is how to output an assembler line defining a `double' constant. */
1752 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1753 do { union { double d; int i[2];} __u; \
1755 fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1756 __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1759 /* This is how to output an assembler line defining a `float' constant. */
1761 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1762 do { union { float f; int i;} __u; \
1764 fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1767 /* This is how to output an assembler line defining an `int' constant. */
1769 #define ASM_OUTPUT_INT(FILE,VALUE) \
1770 { fprintf (FILE, "\t.word "); \
1771 if (function_label_operand (VALUE, VOIDmode)) \
1772 fprintf (FILE, "P%%"); \
1773 output_addr_const (FILE, (VALUE)); \
1774 fprintf (FILE, "\n");}
1776 /* Likewise for `short' and `char' constants. */
1778 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1779 ( fprintf (FILE, "\t.half "), \
1780 output_addr_const (FILE, (VALUE)), \
1781 fprintf (FILE, "\n"))
1783 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1784 ( fprintf (FILE, "\t.byte "), \
1785 output_addr_const (FILE, (VALUE)), \
1786 fprintf (FILE, "\n"))
1788 /* This is how to output an assembler line for a numeric constant byte. */
1790 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1791 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1793 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1794 output_ascii ((FILE), (P), (SIZE))
1796 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1797 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1798 /* This is how to output an element of a case-vector that is absolute.
1799 Note that this method makes filling these branch delay slots
1802 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1803 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1805 /* Jump tables are executable code and live in the TEXT section on the PA. */
1806 #define JUMP_TABLES_IN_TEXT_SECTION
1808 /* This is how to output an element of a case-vector that is relative.
1809 (The HP-PA does not use such vectors,
1810 but we must define this macro anyway.) */
1812 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1813 fprintf (FILE, "\tword L%d-L%d\n", VALUE, REL)
1815 /* This is how to output an assembler line
1816 that says to advance the location counter
1817 to a multiple of 2**LOG bytes. */
1819 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1820 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1822 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1823 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1825 /* This says how to output an assembler line
1826 to define a global common symbol. */
1828 /* Supposedly the assembler rejects the command if there is no tab! */
1831 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1833 assemble_name ((FILE), (NAME)); \
1835 fputc (':', (FILE)); \
1836 fputs ("\t.comm ", (FILE)); \
1837 fprintf ((FILE), "%d\n", (ROUNDED));}
1839 /* This says how to output an assembler line
1840 to define a local common symbol. */
1842 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1844 fprintf ((FILE), "\t.align %d\n", (SIZE) <= 4 ? 4 : 8); \
1845 assemble_name ((FILE), (NAME)); \
1847 fputc (':', (FILE)); \
1848 fprintf ((FILE), "\n\t.block %d\n", (ROUNDED));}
1850 /* Store in OUTPUT a string (made with alloca) containing
1851 an assembler-name for a local static variable named NAME.
1852 LABELNO is an integer which is different for each call. */
1854 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1855 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1856 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1858 /* Define the parentheses used to group arithmetic operations
1859 in assembler code. */
1861 #define ASM_OPEN_PAREN "("
1862 #define ASM_CLOSE_PAREN ")"
1864 /* Define results of standard character escape sequences. */
1865 #define TARGET_BELL 007
1866 #define TARGET_BS 010
1867 #define TARGET_TAB 011
1868 #define TARGET_NEWLINE 012
1869 #define TARGET_VT 013
1870 #define TARGET_FF 014
1871 #define TARGET_CR 015
1873 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1874 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1876 /* Print operand X (an rtx) in assembler syntax to file FILE.
1877 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1878 For `%' followed by punctuation, CODE is the punctuation and X is null.
1880 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1881 and an immediate zero should be represented as `r0'.
1883 Several % codes are defined:
1885 C compare conditions
1886 N extract conditions
1887 M modifier to handle preincrement addressing for memory refs.
1888 F modifier to handle preincrement addressing for fp memory refs */
1890 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1893 /* Print a memory address as an operand to reference that memory location. */
1895 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1896 { register rtx addr = ADDR; \
1897 register rtx base; \
1899 switch (GET_CODE (addr)) \
1902 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
1905 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1906 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1907 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1908 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1911 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
1914 fputs ("R'", FILE); \
1915 output_global_address (FILE, XEXP (addr, 1)); \
1916 fputs ("(", FILE); \
1917 output_operand (XEXP (addr, 0), 0); \
1918 fputs (")", FILE); \
1921 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
1924 output_addr_const (FILE, addr); \
1928 /* Define functions in pa.c and used in insn-output.c. */
1930 extern char *output_and ();
1931 extern char *output_ior ();
1932 extern char *output_move_double ();
1933 extern char *output_fp_move_double ();
1934 extern char *output_block_move ();
1935 extern char *output_cbranch ();
1936 extern char *output_bb ();
1937 extern char *output_dbra ();
1938 extern char *output_movb ();
1939 extern char *output_return ();
1940 extern char *output_call ();
1941 extern char *output_mul_insn ();
1942 extern char *output_div_insn ();
1943 extern char *output_mod_insn ();
1944 extern char *singlemove_string ();
1945 extern void output_arg_descriptor ();
1946 extern void output_global_address ();
1947 extern struct rtx_def
*legitimize_pic_address ();
1948 extern struct rtx_def
*gen_cmp_fp ();
1949 extern void hppa_encode_label ();
1951 extern struct rtx_def
*hppa_save_pic_table_rtx
;
1954 #define PREDICATE_CODES \
1955 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1956 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
1957 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1958 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1959 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
1960 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1961 {"pre_cint_operand", {CONST_INT}}, \
1962 {"post_cint_operand", {CONST_INT}}, \
1963 {"int5_operand", {CONST_INT}}, \
1964 {"uint5_operand", {CONST_INT}}, \
1965 {"uint32_operand", {CONST_INT}}, \
1966 {"int11_operand", {CONST_INT}}, \
1967 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1968 {"ior_operand", {CONST_INT}}, \
1969 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
1970 {"lhs_lshift_cint_operand", {CONST_INT}}, \
1971 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
1972 {"shadd_operand", {CONST_INT}}, \
1973 {"eq_neq_comparison_operator", {EQ, NE}}, \
1974 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
1975 {"pc_or_label_operand", {LABEL_REF, PC}}, \
1976 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1977 {"reg_or_nonsymb_mem_operand", {REG, SUBREG, MEM}}, \
1978 {"move_operand", {REG, SUBREG, CONST_INT, MEM}}, \
1979 {"pic_operand", {REG, SUBREG, CONST_INT, SYMBOL_REF, LABEL_REF, \
1980 CONST, HIGH, PC}}, /* No clue */ \
1981 {"function_label_operand", {SYMBOL_REF}}, \
1982 {"reg_or_0_or_nonsymb_mem_operand", {REG, SUBREG, CONST_INT, MEM}}, \
1983 {"div_operand", {REG, CONST_INT}}, \
1984 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \