1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 enum cmp_type
/* comparison type */
26 CMP_SI
, /* compare integers */
27 CMP_SF
, /* compare single precision floats */
28 CMP_DF
, /* compare double precision floats */
29 CMP_MAX
/* max comparison type */
32 /* For long call handling. */
33 extern unsigned int total_code_bytes
;
35 /* Which processor to schedule for. */
44 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
46 /* For -mschedule= option. */
47 extern char *pa_cpu_string
;
48 extern enum processor_type pa_cpu
;
50 /* Print subsidiary information on the compiler version in use. */
52 #define TARGET_VERSION fputs (" (hppa)", stderr);
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags
;
58 /* compile code for HP-PA 1.1 ("Snake") */
60 #define TARGET_SNAKE (target_flags & 1)
62 /* Disable all FP registers (they all become fixed). This may be necessary
63 for compiling kernels which perform lazy context switching of FP regs.
64 Note if you use this option and try to perform floating point operations
65 the compiler will abort! */
67 #define TARGET_DISABLE_FPREGS (target_flags & 2)
69 /* Generate code which assumes that calls through function pointers will
70 never cross a space boundary. Such assumptions are generally safe for
71 building kernels and statically linked executables. Code compiled with
72 this option will fail miserably if the executable is dynamically linked
73 or uses nested functions!
75 This is also used to trigger agressive unscaled index addressing. */
76 #define TARGET_NO_SPACE_REGS (target_flags & 4)
78 /* Allow unconditional jumps in the delay slots of call instructions. */
79 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
81 /* Optimize for space. Currently this only turns on out of line
82 prologues and epilogues. */
83 #define TARGET_SPACE (target_flags & 16)
85 /* Disable indexed addressing modes. */
87 #define TARGET_DISABLE_INDEXING (target_flags & 32)
89 /* Emit code which follows the new portable runtime calling conventions
90 HP wants everyone to use for ELF objects. If at all possible you want
91 to avoid this since it's a performance loss for non-prototyped code.
93 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
94 long-call stubs which is quite expensive. */
96 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
98 /* Emit directives only understood by GAS. This allows parameter
99 relocations to work for static functions. There is no way
100 to make them work the HP assembler at this time. */
102 #define TARGET_GAS (target_flags & 128)
104 /* Emit code for processors which do not have an FPU. */
106 #define TARGET_SOFT_FLOAT (target_flags & 256)
108 /* Use 3-insn load/store sequences for access to large data segments
109 in shared libraries on hpux10. */
110 #define TARGET_LONG_LOAD_STORE (target_flags & 512)
112 /* Use a faster sequence for indirect calls. */
113 #define TARGET_FAST_INDIRECT_CALLS (target_flags & 1024)
115 /* Macro to define tables used to set the flags.
116 This is a list in braces of pairs in braces,
117 each pair being { "NAME", VALUE }
118 where VALUE is the bits to set or minus the bits to clear.
119 An empty string NAME is used to identify the default VALUE. */
121 #define TARGET_SWITCHES \
124 {"pa-risc-1-0", -1}, \
125 {"pa-risc-1-1", 1}, \
126 {"disable-fpregs", 2}, \
127 {"no-disable-fpregs", -2}, \
128 {"no-space-regs", 4}, \
129 {"space-regs", -4}, \
130 {"jump-in-delay", 8}, \
131 {"no-jump-in-delay", -8}, \
134 {"disable-indexing", 32}, \
135 {"no-disable-indexing", -32},\
136 {"portable-runtime", 64}, \
137 {"no-portable-runtime", -64},\
140 {"soft-float", 256}, \
141 {"no-soft-float", -256}, \
142 {"long-load-store", 512}, \
143 {"no-long-load-store", -512},\
144 {"fast-indirect-calls", 1024},\
145 {"no-fast-indirect-calls", -1024},\
147 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
149 #ifndef TARGET_DEFAULT
150 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
153 #ifndef TARGET_CPU_DEFAULT
154 #define TARGET_CPU_DEFAULT 0
157 #define TARGET_OPTIONS \
159 { "schedule=", &pa_cpu_string }\
162 #define OVERRIDE_OPTIONS override_options ()
164 #define DBX_DEBUGGING_INFO
165 #define DEFAULT_GDB_EXTENSIONS 1
167 /* This is the way other stabs-in-XXX tools do things. We will be
169 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
171 /* Likewise for linenos.
173 We make the first line stab special to avoid adding several
174 gross hacks to GAS. */
175 #undef ASM_OUTPUT_SOURCE_LINE
176 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
177 { static int sym_lineno = 1; \
178 static tree last_function_decl = NULL; \
179 if (current_function_decl == last_function_decl) \
180 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
182 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
185 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
186 last_function_decl = current_function_decl; \
189 /* But, to make this work, we have to output the stabs for the function
191 #define DBX_FUNCTION_FIRST
193 /* Only labels should ever begin in column zero. */
194 #define ASM_STABS_OP "\t.stabs"
195 #define ASM_STABN_OP "\t.stabn"
197 /* GDB always assumes the current function's frame begins at the value
198 of the stack pointer upon entry to the current function. Accessing
199 local variables and parameters passed on the stack is done using the
200 base of the frame + an offset provided by GCC.
202 For functions which have frame pointers this method works fine;
203 the (frame pointer) == (stack pointer at function entry) and GCC provides
204 an offset relative to the frame pointer.
206 This loses for functions without a frame pointer; GCC provides an offset
207 which is relative to the stack pointer after adjusting for the function's
208 frame size. GDB would prefer the offset to be relative to the value of
209 the stack pointer at the function's entry. Yuk! */
210 #define DEBUGGER_AUTO_OFFSET(X) \
211 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
212 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
214 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
215 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
216 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
218 /* gdb needs a null N_SO at the end of each file for scattered loading. */
220 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
221 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
223 if (!TARGET_PORTABLE_RUNTIME) \
224 fputs ("\t.SPACE $TEXT$\n\t.NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n", FILE); \
226 fprintf (FILE, "%s\n", TEXT_SECTION_ASM_OP); \
228 "\t.stabs \"\",%d,0,0,L$text_end0000\nL$text_end0000:\n", N_SO)
230 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & 1) == 0
231 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
232 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}\
233 %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}"
235 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}} %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE}"
238 /* Defines for a K&R CC */
240 #define CC1_SPEC "%{pg:} %{p:}"
242 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
244 /* We don't want -lg. */
246 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
249 /* Make gcc agree with <machine/ansi.h> */
251 #define SIZE_TYPE "unsigned int"
252 #define PTRDIFF_TYPE "int"
253 #define WCHAR_TYPE "unsigned int"
254 #define WCHAR_TYPE_SIZE 32
256 /* Show we can debug even without a frame pointer. */
257 #define CAN_DEBUG_WITHOUT_FP
259 /* Machine dependent reorg pass. */
260 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
262 /* Names to predefine in the preprocessor for this target machine. */
264 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
266 /* HPUX has a program 'chatr' to list the dependencies of dynamically
267 linked executables and shared libraries. */
268 #define LDD_SUFFIX "chatr"
269 /* Look for lines like "dynamic /usr/lib/X11R5/libX11.sl"
270 or "static /usr/lib/X11R5/libX11.sl".
272 HPUX 10.20 also has lines like "static branch prediction ..."
273 so we filter that out explcitly.
275 We also try to bound our search for libraries with marker
276 lines. What a pain. */
277 #define PARSE_LDD_OUTPUT(PTR) \
279 static int in_shlib_list = 0; \
280 while (*PTR == ' ') PTR++; \
281 if (strncmp (PTR, "shared library list:", \
282 sizeof ("shared library list:") - 1) == 0) \
287 else if (strncmp (PTR, "shared library binding:", \
288 sizeof ("shared library binding:") - 1) == 0)\
293 else if (strncmp (PTR, "static branch prediction disabled", \
294 sizeof ("static branch prediction disabled") - 1) == 0)\
299 else if (in_shlib_list \
300 && strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
302 PTR += sizeof ("dynamic") - 1; \
303 while (*p == ' ') PTR++; \
305 else if (in_shlib_list \
306 && strncmp (PTR, "static", sizeof ("static") - 1) == 0) \
308 PTR += sizeof ("static") - 1; \
309 while (*p == ' ') PTR++; \
315 /* target machine storage layout */
317 /* Define for cross-compilation from a host with a different float format
318 or endianness (e.g. VAX, x86). */
319 #define REAL_ARITHMETIC
321 /* Define this macro if it is advisable to hold scalars in registers
322 in a wider mode than that declared by the program. In such cases,
323 the value is constrained to be within the bounds of the declared
324 type, but kept valid in the wider mode. The signedness of the
325 extension may differ from that of the type. */
327 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
328 if (GET_MODE_CLASS (MODE) == MODE_INT \
329 && GET_MODE_SIZE (MODE) < 4) \
332 /* Define this if most significant bit is lowest numbered
333 in instructions that operate on numbered bit-fields. */
334 #define BITS_BIG_ENDIAN 1
336 /* Define this if most significant byte of a word is the lowest numbered. */
337 /* That is true on the HP-PA. */
338 #define BYTES_BIG_ENDIAN 1
340 /* Define this if most significant word of a multiword number is lowest
342 #define WORDS_BIG_ENDIAN 1
344 /* number of bits in an addressable storage unit */
345 #define BITS_PER_UNIT 8
347 /* Width in bits of a "word", which is the contents of a machine register.
348 Note that this is not necessarily the width of data type `int';
349 if using 16-bit ints on a 68000, this would still be 32.
350 But on a machine with 16-bit registers, this would be 16. */
351 #define BITS_PER_WORD 32
353 /* Width of a word, in units (bytes). */
354 #define UNITS_PER_WORD 4
356 /* Width in bits of a pointer.
357 See also the macro `Pmode' defined below. */
358 #define POINTER_SIZE 32
360 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
361 #define PARM_BOUNDARY 32
363 /* Largest alignment required for any stack parameter, in bits.
364 Don't define this if it is equal to PARM_BOUNDARY */
365 #define MAX_PARM_BOUNDARY 64
367 /* Boundary (in *bits*) on which stack pointer is always aligned;
368 certain optimizations in combine depend on this.
370 GCC for the PA always rounds its stacks to a 512bit boundary,
371 but that happens late in the compilation process. */
372 #define STACK_BOUNDARY 64
374 /* Allocation boundary (in *bits*) for the code of a function. */
375 #define FUNCTION_BOUNDARY 32
377 /* Alignment of field after `int : 0' in a structure. */
378 #define EMPTY_FIELD_BOUNDARY 32
380 /* Every structure's size must be a multiple of this. */
381 #define STRUCTURE_SIZE_BOUNDARY 8
383 /* A bitfield declared as `int' forces `int' alignment for the struct. */
384 #define PCC_BITFIELD_TYPE_MATTERS 1
386 /* No data type wants to be aligned rounder than this. */
387 #define BIGGEST_ALIGNMENT 64
389 /* The .align directive in the HP assembler allows up to a 32 alignment. */
390 #define MAX_OFILE_ALIGNMENT 32768
392 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
393 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
394 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
396 /* Make arrays of chars word-aligned for the same reasons. */
397 #define DATA_ALIGNMENT(TYPE, ALIGN) \
398 (TREE_CODE (TYPE) == ARRAY_TYPE \
399 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
400 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
403 /* Set this nonzero if move instructions will actually fail to work
404 when given unaligned data. */
405 #define STRICT_ALIGNMENT 1
407 /* Generate calls to memcpy, memcmp and memset. */
408 #define TARGET_MEM_FUNCTIONS
410 /* Standard register usage. */
412 /* Number of actual hardware registers.
413 The hardware registers are assigned numbers for the compiler
414 from 0 to just below FIRST_PSEUDO_REGISTER.
415 All registers that the compiler knows about must be given numbers,
416 even those that are not normally considered general registers.
418 HP-PA 1.0 has 32 fullword registers and 16 floating point
419 registers. The floating point registers hold either word or double
422 16 additional registers are reserved.
424 HP-PA 1.1 has 32 fullword registers and 32 floating point
425 registers. However, the floating point registers behave
426 differently: the left and right halves of registers are addressable
427 as 32 bit registers. So, we will set things up like the 68k which
428 has different fp units: define separate register sets for the 1.0
431 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
434 /* 1 for registers that have pervasive standard uses
435 and are not available for the register allocator.
437 On the HP-PA, these are:
438 Reg 0 = 0 (hardware). However, 0 is used for condition code,
440 Reg 1 = ADDIL target/Temporary (hardware).
441 Reg 2 = Return Pointer
442 Reg 3 = Frame Pointer
443 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
444 Reg 4-18 = Preserved Registers
445 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
446 Reg 20-22 = Temporary Registers
447 Reg 23-26 = Temporary/Parameter Registers
448 Reg 27 = Global Data Pointer (hp)
449 Reg 28 = Temporary/???/Return Value register
450 Reg 29 = Temporary/Static Chain/Return Value register #2
451 Reg 30 = stack pointer
452 Reg 31 = Temporary/Millicode Return Pointer (hp)
454 Freg 0-3 = Status Registers -- Not known to the compiler.
455 Freg 4-7 = Arguments/Return Value
456 Freg 8-11 = Temporary Registers
457 Freg 12-15 = Preserved Registers
459 Freg 16-31 = Reserved
461 On the Snake, fp regs are
463 Freg 0-3 = Status Registers -- Not known to the compiler.
464 Freg 4L-7R = Arguments/Return Value
465 Freg 8L-11R = Temporary Registers
466 Freg 12L-21R = Preserved Registers
467 Freg 22L-31R = Temporary Registers
471 #define FIXED_REGISTERS \
472 {0, 0, 0, 0, 0, 0, 0, 0, \
473 0, 0, 0, 0, 0, 0, 0, 0, \
474 0, 0, 0, 0, 0, 0, 0, 0, \
475 0, 0, 0, 1, 0, 0, 1, 0, \
477 0, 0, 0, 0, 0, 0, 0, 0, \
478 0, 0, 0, 0, 0, 0, 0, 0, \
479 0, 0, 0, 0, 0, 0, 0, 0, \
480 0, 0, 0, 0, 0, 0, 0, 0, \
481 0, 0, 0, 0, 0, 0, 0, 0, \
482 0, 0, 0, 0, 0, 0, 0, 0, \
483 0, 0, 0, 0, 0, 0, 0, 0, \
486 /* 1 for registers not available across function calls.
487 These must include the FIXED_REGISTERS and also any
488 registers that can be used without being saved.
489 The latter must include the registers where values are returned
490 and the register where structure-value addresses are passed.
491 Aside from that, you can include as many other registers as you like. */
492 #define CALL_USED_REGISTERS \
493 {1, 1, 1, 0, 0, 0, 0, 0, \
494 0, 0, 0, 0, 0, 0, 0, 0, \
495 0, 0, 0, 1, 1, 1, 1, 1, \
496 1, 1, 1, 1, 1, 1, 1, 1, \
498 1, 1, 1, 1, 1, 1, 1, 1, \
499 1, 1, 1, 1, 1, 1, 1, 1, \
500 0, 0, 0, 0, 0, 0, 0, 0, \
501 0, 0, 0, 0, 0, 0, 0, 0, \
502 0, 0, 0, 0, 1, 1, 1, 1, \
503 1, 1, 1, 1, 1, 1, 1, 1, \
504 1, 1, 1, 1, 1, 1, 1, 1, \
507 #define CONDITIONAL_REGISTER_USAGE \
511 for (i = 56; i < 88; i++) \
512 fixed_regs[i] = call_used_regs[i] = 1; \
513 for (i = 33; i < 88; i += 2) \
514 fixed_regs[i] = call_used_regs[i] = 1; \
516 if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
518 for (i = 32; i < 88; i++) \
519 fixed_regs[i] = call_used_regs[i] = 1; \
523 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
524 fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
528 /* Allocate the call used registers first. This should minimize
529 the number of registers that need to be saved (as call used
530 registers will generally not be allocated across a call).
532 Experimentation has shown slightly better results by allocating
533 FP registers first. */
535 #define REG_ALLOC_ORDER \
537 /* caller-saved fp regs. */ \
538 68, 69, 70, 71, 72, 73, 74, 75, \
539 76, 77, 78, 79, 80, 81, 82, 83, \
541 40, 41, 42, 43, 44, 45, 46, 47, \
542 32, 33, 34, 35, 36, 37, 38, 39, \
543 /* caller-saved general regs. */ \
544 19, 20, 21, 22, 23, 24, 25, 26, \
546 /* callee-saved fp regs. */ \
547 48, 49, 50, 51, 52, 53, 54, 55, \
548 56, 57, 58, 59, 60, 61, 62, 63, \
550 /* callee-saved general regs. */ \
551 3, 4, 5, 6, 7, 8, 9, 10, \
552 11, 12, 13, 14, 15, 16, 17, 18, \
553 /* special registers. */ \
557 /* True if register is floating-point. */
558 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
560 /* Return number of consecutive hard regs needed starting at reg REGNO
561 to hold something of mode MODE.
562 This is ordinarily the length in words of a value of mode MODE
563 but can be less for certain modes in special long registers.
565 On the HP-PA, ordinary registers hold 32 bits worth;
566 The floating point registers are 64 bits wide. Snake fp regs are 32
568 #define HARD_REGNO_NREGS(REGNO, MODE) \
569 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
570 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
572 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
573 On the HP-PA, the cpu registers can hold any mode. We
574 force this to be an even register is it cannot hold the full mode. */
575 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
576 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
577 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
578 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
579 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
580 /* Make wide modes be in aligned registers. */ \
581 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
583 /* Value is 1 if it is a good idea to tie two pseudo registers
584 when one has mode MODE1 and one has mode MODE2.
585 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
586 for any hard reg, then this must be 0 for correct output. */
587 #define MODES_TIEABLE_P(MODE1, MODE2) \
588 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
590 /* Specify the registers used for certain standard purposes.
591 The values of these macros are register numbers. */
593 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
594 /* #define PC_REGNUM */
596 /* Register to use for pushing function arguments. */
597 #define STACK_POINTER_REGNUM 30
599 /* Base register for access to local variables of the function. */
600 #define FRAME_POINTER_REGNUM 3
602 /* Value should be nonzero if functions must have frame pointers. */
603 #define FRAME_POINTER_REQUIRED \
604 (current_function_calls_alloca)
606 /* C statement to store the difference between the frame pointer
607 and the stack pointer values immediately after the function prologue.
609 Note, we always pretend that this is a leaf function because if
610 it's not, there's no point in trying to eliminate the
611 frame pointer. If it is a leaf function, we guessed right! */
612 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
613 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
615 /* Base register for access to arguments of the function. */
616 #define ARG_POINTER_REGNUM 3
618 /* Register in which static-chain is passed to a function. */
620 #define STATIC_CHAIN_REGNUM 29
622 /* Register which holds offset table for position-independent
625 #define PIC_OFFSET_TABLE_REGNUM 19
626 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
628 /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it
629 can be restore across function calls. */
630 #define PIC_OFFSET_TABLE_REGNUM_SAVED 4
632 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
633 #define DEFAULT_PCC_STRUCT_RETURN 0
634 #define RETURN_IN_MEMORY(TYPE) \
635 (int_size_in_bytes (TYPE) > 8)
637 /* Register in which address to store a structure value
638 is passed to a function. */
639 #define STRUCT_VALUE_REGNUM 28
641 /* Define the classes of registers for register constraints in the
642 machine description. Also define ranges of constants.
644 One of the classes must always be named ALL_REGS and include all hard regs.
645 If there is more than one class, another class must be named NO_REGS
646 and contain no registers.
648 The name GENERAL_REGS must be the name of a class (or an alias for
649 another name such as ALL_REGS). This is the class of registers
650 that is allowed by "g" or "r" in a register constraint.
651 Also, registers outside this class are allocated only when
652 instructions express preferences for them.
654 The classes must be numbered in nondecreasing order; that is,
655 a larger-numbered class must never be contained completely
656 in a smaller-numbered class.
658 For any two classes, it is very desirable that there be another
659 class that represents their union. */
661 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
662 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
663 fmpyadd and fmpysub are restricted. */
665 enum reg_class
{ NO_REGS
, R1_REGS
, GENERAL_REGS
, FP_REGS
, GENERAL_OR_FP_REGS
,
666 SHIFT_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
668 #define N_REG_CLASSES (int) LIM_REG_CLASSES
670 /* Give names of register classes as strings for dump file. */
672 #define REG_CLASS_NAMES \
673 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
674 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
676 /* Define which registers fit in which classes.
677 This is an initializer for a vector of HARD_REG_SET
678 of length N_REG_CLASSES. Register 0, the "condition code" register,
681 #define REG_CLASS_CONTENTS \
682 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
683 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
684 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
685 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
686 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
687 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
688 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
690 /* The same information, inverted:
691 Return the class number of the smallest class containing
692 reg number REGNO. This could be a conditional expression
693 or could index an array. */
695 #define REGNO_REG_CLASS(REGNO) \
696 ((REGNO) == 0 ? NO_REGS \
697 : (REGNO) == 1 ? R1_REGS \
698 : (REGNO) < 32 ? GENERAL_REGS \
699 : (REGNO) < 88 ? FP_REGS \
702 /* The class value for index registers, and the one for base regs. */
703 #define INDEX_REG_CLASS GENERAL_REGS
704 #define BASE_REG_CLASS GENERAL_REGS
706 #define FP_REG_CLASS_P(CLASS) \
709 /* Get reg_class from a letter such as appears in the machine description. */
710 /* Keep 'x' for backward compatibility with user asm. */
711 #define REG_CLASS_FROM_LETTER(C) \
712 ((C) == 'f' ? FP_REGS : \
713 (C) == 'x' ? FP_REGS : \
714 (C) == 'q' ? SHIFT_REGS : \
715 (C) == 'a' ? R1_REGS : \
716 (C) == 'Z' ? ALL_REGS : NO_REGS)
718 /* The letters I, J, K, L and M in a register constraint string
719 can be used to stand for particular ranges of immediate operands.
720 This macro defines what the ranges are.
721 C is the letter, and VALUE is a constant value.
722 Return 1 if VALUE is in the range specified by C.
724 `I' is used for the 11 bit constants.
725 `J' is used for the 14 bit constants.
726 `K' is used for values that can be moved with a zdepi insn.
727 `L' is used for the 5 bit constants.
729 `N' is used for values with the least significant 11 bits equal to zero.
730 `O' is used for numbers n such that n+1 is a power of 2.
733 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
734 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
735 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
736 : (C) == 'K' ? zdepi_cint_p (VALUE) \
737 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
738 : (C) == 'M' ? (VALUE) == 0 \
739 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
740 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
741 : (C) == 'P' ? and_mask_p (VALUE) \
744 /* Similar, but for floating or large integer constants, and defining letters
745 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
747 For PA, `G' is the floating-point constant zero. `H' is undefined. */
749 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
750 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
751 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
754 /* Given an rtx X being reloaded into a reg required to be
755 in class CLASS, return the class of reg to actually use.
756 In general this is just CLASS; but on some machines
757 in some cases it is preferable to use a more restrictive class. */
758 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
760 /* Return the register class of a scratch register needed to copy IN into
761 or out of a register in CLASS in MODE. If it can be done directly
764 Avoid doing any work for the common case calls. */
766 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
767 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
768 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
769 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
771 /* On the PA it is not possible to directly move data between
772 GENERAL_REGS and FP_REGS. */
773 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
774 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
776 /* Return the stack location to use for secondary memory needed reloads. */
777 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
778 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
780 /* Return the maximum number of consecutive registers
781 needed to represent mode MODE in a register of class CLASS. */
782 #define CLASS_MAX_NREGS(CLASS, MODE) \
783 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
784 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
786 /* Stack layout; function entry, exit and calling. */
788 /* Define this if pushing a word on the stack
789 makes the stack pointer a smaller address. */
790 /* #define STACK_GROWS_DOWNWARD */
792 /* Believe it or not. */
793 #define ARGS_GROW_DOWNWARD
795 /* Define this if the nominal address of the stack frame
796 is at the high-address end of the local variables;
797 that is, each additional local variable allocated
798 goes at a more negative offset in the frame. */
799 /* #define FRAME_GROWS_DOWNWARD */
801 /* Offset within stack frame to start allocating local variables at.
802 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
803 first local allocated. Otherwise, it is the offset to the BEGINNING
804 of the first local allocated. */
805 #define STARTING_FRAME_OFFSET 8
807 /* If we generate an insn to push BYTES bytes,
808 this says how many the stack pointer really advances by.
809 On the HP-PA, don't define this because there are no push insns. */
810 /* #define PUSH_ROUNDING(BYTES) */
812 /* Offset of first parameter from the argument pointer register value.
813 This value will be negated because the arguments grow down.
814 Also note that on STACK_GROWS_UPWARD machines (such as this one)
815 this is the distance from the frame pointer to the end of the first
816 argument, not it's beginning. To get the real offset of the first
817 argument, the size of the argument must be added.
819 ??? Have to check on this.*/
821 #define FIRST_PARM_OFFSET(FNDECL) -32
823 /* Absolute value of offset from top-of-stack address to location to store the
824 function parameter if it can't go in a register.
825 Addresses for following parameters are computed relative to this one. */
826 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
829 /* When a parameter is passed in a register, stack space is still
831 #define REG_PARM_STACK_SPACE(DECL) 16
833 /* Define this if the above stack space is to be considered part of the
834 space allocated by the caller. */
835 #define OUTGOING_REG_PARM_STACK_SPACE
837 /* Keep the stack pointer constant throughout the function.
838 This is both an optimization and a necessity: longjmp
839 doesn't behave itself when the stack pointer moves within
841 #define ACCUMULATE_OUTGOING_ARGS
843 /* The weird HPPA calling conventions require a minimum of 48 bytes on
844 the stack: 16 bytes for register saves, and 32 bytes for magic.
845 This is the difference between the logical top of stack and the
847 #define STACK_POINTER_OFFSET -32
849 #define STACK_DYNAMIC_OFFSET(FNDECL) \
850 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
852 /* Value is 1 if returning from a function call automatically
853 pops the arguments described by the number-of-args field in the call.
854 FUNDECL is the declaration node of the function (as a tree),
855 FUNTYPE is the data type of the function (as a tree),
856 or for a library call it is an identifier node for the subroutine name. */
858 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
860 /* Define how to find the value returned by a function.
861 VALTYPE is the data type of the value (as a tree).
862 If the precise function being called is known, FUNC is its FUNCTION_DECL;
863 otherwise, FUNC is 0. */
865 /* On the HP-PA the value is found in register(s) 28(-29), unless
866 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
869 #define FUNCTION_VALUE(VALTYPE, FUNC) \
870 gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
871 && (TYPE_MODE (VALTYPE) == SFmode || \
872 TYPE_MODE (VALTYPE) == DFmode)) ? \
875 /* Define how to find the value returned by a library function
876 assuming the value has mode MODE. */
878 #define LIBCALL_VALUE(MODE) \
879 gen_rtx (REG, MODE, \
880 (! TARGET_SOFT_FLOAT \
881 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
883 /* 1 if N is a possible register number for a function value
884 as seen by the caller. */
886 #define FUNCTION_VALUE_REGNO_P(N) \
887 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
889 /* 1 if N is a possible register number for function argument passing. */
891 #define FUNCTION_ARG_REGNO_P(N) \
892 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
894 /* Define a data type for recording info about an argument list
895 during the scan of that argument list. This data type should
896 hold all necessary information about the function itself
897 and about the args processed so far, enough to enable macros
898 such as FUNCTION_ARG to determine where the next arg should go.
900 On the HP-PA, this is a single integer, which is a number of words
901 of arguments scanned so far (including the invisible argument,
902 if any, which holds the structure-value-address).
903 Thus 4 or more means all following args should go on the stack. */
905 struct hppa_args
{int words
, nargs_prototype
, indirect
; };
907 #define CUMULATIVE_ARGS struct hppa_args
909 /* Initialize a variable CUM of type CUMULATIVE_ARGS
910 for a call to a function whose data type is FNTYPE.
911 For a library call, FNTYPE is 0. */
913 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
915 (CUM).indirect = INDIRECT, \
916 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
917 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
918 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
919 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
924 /* Similar, but when scanning the definition of a procedure. We always
925 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
927 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
929 (CUM).indirect = 0, \
930 (CUM).nargs_prototype = 1000
932 /* Figure out the size in words of the function argument. */
934 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
935 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
937 /* Update the data in CUM to advance over an argument
938 of mode MODE and data type TYPE.
939 (TYPE is null for libcalls where that information may not be available.) */
941 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
942 { (CUM).nargs_prototype--; \
943 ((((CUM).words & 01) && (TYPE) != 0 \
944 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
946 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
949 /* Determine where to put an argument to a function.
950 Value is zero to push the argument on the stack,
951 or a hard register in which to store the argument.
953 MODE is the argument's machine mode.
954 TYPE is the data type of the argument (as a tree).
955 This is null for libcalls where that information may
957 CUM is a variable of type CUMULATIVE_ARGS which gives info about
958 the preceding args and about the function being called.
959 NAMED is nonzero if this argument is a named parameter
960 (otherwise it is an extra parameter matching an ellipsis).
962 On the HP-PA the first four words of args are normally in registers
963 and the rest are pushed. But any arg that won't entirely fit in regs
966 Arguments passed in registers are either 1 or 2 words long.
968 The caller must make a distinction between calls to explicitly named
969 functions and calls through pointers to functions -- the conventions
970 are different! Calls through pointers to functions only use general
971 registers for the first four argument words.
973 Of course all this is different for the portable runtime model
974 HP wants everyone to use for ELF. Ugh. Here's a quick description
975 of how it's supposed to work.
977 1) callee side remains unchanged. It expects integer args to be
978 in the integer registers, float args in the float registers and
979 unnamed args in integer registers.
981 2) caller side now depends on if the function being called has
982 a prototype in scope (rather than if it's being called indirectly).
984 2a) If there is a prototype in scope, then arguments are passed
985 according to their type (ints in integer registers, floats in float
986 registers, unnamed args in integer registers.
988 2b) If there is no prototype in scope, then floating point arguments
989 are passed in both integer and float registers. egad.
991 FYI: The portable parameter passing conventions are almost exactly like
992 the standard parameter passing conventions on the RS6000. That's why
993 you'll see lots of similar code in rs6000.h. */
995 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
997 /* Do not expect to understand this without reading it several times. I'm
998 tempted to try and simply it, but I worry about breaking something. */
1000 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1001 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
1002 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
1003 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
1004 || (CUM).nargs_prototype > 0) \
1005 ? gen_rtx (REG, (MODE), \
1006 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1007 ? (((!(CUM).indirect \
1008 || TARGET_PORTABLE_RUNTIME) \
1009 && (MODE) == DFmode \
1010 && ! TARGET_SOFT_FLOAT) \
1011 ? ((CUM).words ? 38 : 34) \
1012 : ((CUM).words ? 23 : 25)) \
1013 : (((!(CUM).indirect \
1014 || TARGET_PORTABLE_RUNTIME) \
1015 && (MODE) == SFmode \
1016 && ! TARGET_SOFT_FLOAT) \
1017 ? (32 + 2 * (CUM).words) \
1018 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
1020 /* We are calling a non-prototyped function with floating point \
1021 arguments using the portable conventions. */ \
1022 : gen_rtx (PARALLEL, (MODE), \
1025 gen_rtx (EXPR_LIST, VOIDmode, \
1026 gen_rtx (REG, (MODE), \
1027 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1028 ? ((CUM).words ? 38 : 34) \
1029 : (32 + 2 * (CUM).words))), \
1031 gen_rtx (EXPR_LIST, VOIDmode, \
1032 gen_rtx (REG, (MODE), \
1033 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1034 ? ((CUM).words ? 23 : 25) \
1035 : (27 - (CUM).words - \
1036 FUNCTION_ARG_SIZE ((MODE), \
1039 /* Pass this parameter in the stack. */ \
1042 /* For an arg passed partly in registers and partly in memory,
1043 this is the number of registers used.
1044 For args passed entirely in registers or entirely in memory, zero. */
1046 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
1048 /* If defined, a C expression that gives the alignment boundary, in
1049 bits, of an argument with the specified mode and type. If it is
1050 not defined, `PARM_BOUNDARY' is used for all arguments. */
1052 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1054 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
1055 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1057 : GET_MODE_ALIGNMENT(MODE)))
1059 /* Arguments larger than eight bytes are passed by invisible reference */
1061 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1062 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1064 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
1065 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1068 extern struct rtx_def
*hppa_compare_op0
, *hppa_compare_op1
;
1069 extern enum cmp_type hppa_branch_type
;
1071 /* Output the label for a function definition. */
1072 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1073 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1074 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
1075 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
1077 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1078 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
1079 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
1082 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1083 { char *my_name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (THUNK_FNDECL)); \
1084 char *target_name = IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (FUNCTION)); \
1085 output_function_prologue (FILE, 0); \
1086 if (VAL_14_BITS_P (DELTA)) \
1087 fprintf (FILE, "\tb %s\n\tldo %d(%%r26),%%r26\n", target_name, DELTA); \
1089 fprintf (FILE, "\taddil L%%%d,%r26\n\tb %s\n\tldo R%%%d(%%r1),%%r26\n", \
1090 DELTA, target_name, DELTA); \
1091 fprintf (FILE, "\n\t.EXIT\n\t.PROCEND\n"); \
1094 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, NAME) \
1097 STRIP_NAME_ENCODING (name, NAME); \
1098 if (!TARGET_PORTABLE_RUNTIME && TARGET_GAS && in_section == in_text) \
1099 fputs ("\t.NSUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n", FILE); \
1100 else if (! TARGET_PORTABLE_RUNTIME && TARGET_GAS) \
1102 "\t.SUBSPA %s\n", name); \
1105 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1106 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1107 tree tree_type = TREE_TYPE (DECL); \
1110 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1111 { extern int current_function_varargs; \
1112 if (TREE_PUBLIC (DECL)) \
1114 fputs ("\t.EXPORT ", FILE); \
1115 assemble_name (FILE, NAME); \
1116 fputs (",ENTRY,PRIV_LEV=3", FILE); \
1120 fputs ("\t.PARAM ", FILE); \
1121 assemble_name (FILE, NAME); \
1123 if (TARGET_PORTABLE_RUNTIME) \
1125 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1126 fputs ("RTNVAL=NO\n", FILE); \
1129 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1130 parm = TREE_CHAIN (parm)) \
1132 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1133 && ! TARGET_SOFT_FLOAT) \
1134 fprintf (FILE, ",ARGW%d=FR", i++); \
1135 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1136 && ! TARGET_SOFT_FLOAT) \
1141 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1149 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1150 DECL_ARG_TYPE (parm)); \
1151 /* Passing structs by invisible reference uses \
1152 one general register. */ \
1154 || TREE_ADDRESSABLE (DECL_ARG_TYPE (parm))) \
1156 if (arg_size == 2 && i <= 2) \
1159 fprintf (FILE, ",ARGW%d=GR", i++); \
1160 fprintf (FILE, ",ARGW%d=GR", i++); \
1162 else if (arg_size == 1) \
1163 fprintf (FILE, ",ARGW%d=GR", i++); \
1168 /* anonymous args */ \
1169 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1170 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1171 != void_type_node)) \
1172 || current_function_varargs) \
1174 for (; i < 4; i++) \
1175 fprintf (FILE, ",ARGW%d=GR", i); \
1177 if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1178 fputs (",RTNVAL=FR", FILE); \
1179 else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1180 fputs (",RTNVAL=FU", FILE); \
1181 else if (fntype != void_type_node) \
1182 fputs (",RTNVAL=GR", FILE); \
1183 fputs ("\n", FILE); \
1186 /* This macro generates the assembly code for function entry.
1187 FILE is a stdio stream to output the code to.
1188 SIZE is an int: how many units of temporary storage to allocate.
1189 Refer to the array `regs_ever_live' to determine which registers
1190 to save; `regs_ever_live[I]' is nonzero if register number I
1191 is ever used in the function. This macro is responsible for
1192 knowing which registers should not be saved even if used. */
1194 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1195 of memory. If any fpu reg is used in the function, we allocate
1196 such a block here, at the bottom of the frame, just in case it's needed.
1198 If this function is a leaf procedure, then we may choose not
1199 to do a "save" insn. The decision about whether or not
1200 to do this is made in regclass.c. */
1202 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1203 output_function_prologue (FILE, SIZE)
1205 /* Output assembler code to FILE to increment profiler label # LABELNO
1206 for profiling a function entry.
1208 Because HPUX _mcount is so different, we actually emit the
1209 profiling code in function_prologue. This just stores LABELNO for
1212 #define PROFILE_BEFORE_PROLOGUE
1213 #define FUNCTION_PROFILER(FILE, LABELNO) \
1214 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1216 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1217 the stack pointer does not matter. The value is tested only in
1218 functions that have frame pointers.
1219 No definition is equivalent to always zero. */
1221 extern int may_call_alloca
;
1222 extern int current_function_pretend_args_size
;
1224 #define EXIT_IGNORE_STACK \
1225 (get_frame_size () != 0 \
1226 || current_function_calls_alloca || current_function_outgoing_args_size)
1229 /* This macro generates the assembly code for function exit,
1230 on machines that need it. If FUNCTION_EPILOGUE is not defined
1231 then individual return instructions are generated for each
1232 return statement. Args are same as for FUNCTION_PROLOGUE.
1234 The function epilogue should not depend on the current stack pointer!
1235 It should use the frame pointer only. This is mandatory because
1236 of alloca; we also take advantage of it to omit stack adjustments
1237 before returning. */
1239 /* This declaration is needed due to traditional/ANSI
1240 incompatibilities which cannot be #ifdefed away
1241 because they occur inside of macros. Sigh. */
1242 extern union tree_node
*current_function_decl
;
1244 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1245 output_function_epilogue (FILE, SIZE)
1247 /* Output assembler code for a block containing the constant parts
1248 of a trampoline, leaving space for the variable parts.\
1250 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1251 and then branches to the specified routine.
1253 This code template is copied from text segment to stack location
1254 and then patched with INITIALIZE_TRAMPOLINE to contain
1255 valid values, and then entered as a subroutine.
1257 It is best to keep this as small as possible to avoid having to
1258 flush multiple lines in the cache. */
1260 #define TRAMPOLINE_TEMPLATE(FILE) \
1262 fputs ("\tldw 36(0,%r22),%r21\n", FILE); \
1263 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
1264 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
1265 fputs ("\tldw 4(0,%r21),%r19\n", FILE); \
1266 fputs ("\tldw 0(0,%r21),%r21\n", FILE); \
1267 fputs ("\tldsid (0,%r21),%r1\n", FILE); \
1268 fputs ("\tmtsp %r1,%sr0\n", FILE); \
1269 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
1270 fputs ("\tldw 40(0,%r22),%r29\n", FILE); \
1271 fputs ("\t.word 0\n", FILE); \
1272 fputs ("\t.word 0\n", FILE); \
1275 /* Length in units of the trampoline for entering a nested function.
1277 Flush the cache entries corresponding to the first and last addresses
1278 of the trampoline. This is necessary as the trampoline may cross two
1281 If the code part of the trampoline ever grows to > 32 bytes, then it
1282 will become necessary to hack on the cacheflush pattern in pa.md. */
1284 #define TRAMPOLINE_SIZE (11 * 4)
1286 /* Emit RTL insns to initialize the variable parts of a trampoline.
1287 FNADDR is an RTX for the address of the function's pure code.
1288 CXT is an RTX for the static chain value for the function.
1290 Move the function address to the trampoline template at offset 12.
1291 Move the static chain value to trampoline template at offset 16. */
1293 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1295 rtx start_addr, end_addr; \
1297 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1298 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1299 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1300 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1301 /* fdc and fic only use registers for the address to flush, \
1302 they do not accept integer displacements. */ \
1303 start_addr = force_reg (SImode, (TRAMP)); \
1304 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1305 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1306 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1307 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1308 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1311 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1312 reference the 4 integer arg registers and 4 fp arg registers.
1313 Ordinarily they are not call used registers, but they are for
1314 _builtin_saveregs, so we must make this explicit. */
1316 extern struct rtx_def
*hppa_builtin_saveregs ();
1317 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) hppa_builtin_saveregs (ARGLIST)
1320 /* Addressing modes, and classification of registers for them. */
1322 #define HAVE_POST_INCREMENT
1323 #define HAVE_POST_DECREMENT
1325 #define HAVE_PRE_DECREMENT
1326 #define HAVE_PRE_INCREMENT
1328 /* Macros to check register numbers against specific register classes. */
1330 /* These assume that REGNO is a hard or pseudo reg number.
1331 They give nonzero only if REGNO is a hard reg of the suitable class
1332 or a pseudo reg currently allocated to a suitable hard reg.
1333 Since they use reg_renumber, they are safe only once reg_renumber
1334 has been allocated, which happens in local-alloc.c. */
1336 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1337 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1338 #define REGNO_OK_FOR_BASE_P(REGNO) \
1339 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1340 #define REGNO_OK_FOR_FP_P(REGNO) \
1341 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1343 /* Now macros that check whether X is a register and also,
1344 strictly, whether it is in a specified class.
1346 These macros are specific to the the HP-PA, and may be used only
1347 in code for printing assembler insns and in conditions for
1348 define_optimization. */
1350 /* 1 if X is an fp register. */
1352 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1354 /* Maximum number of registers that can appear in a valid memory address. */
1356 #define MAX_REGS_PER_ADDRESS 2
1358 /* Recognize any constant value that is a valid address except
1359 for symbolic addresses. We get better CSE by rejecting them
1360 here and allowing hppa_legitimize_address to break them up. We
1361 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1363 #define CONSTANT_ADDRESS_P(X) \
1364 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1365 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1366 || GET_CODE (X) == HIGH) \
1367 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1369 /* Include all constant integers and constant doubles, but not
1370 floating-point, except for floating-point zero. */
1372 #define LEGITIMATE_CONSTANT_P(X) \
1373 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1374 || (X) == CONST0_RTX (GET_MODE (X))) \
1375 && !(flag_pic && function_label_operand (X, VOIDmode)))
1377 /* Subroutine for EXTRA_CONSTRAINT.
1379 Return 1 iff OP is a pseudo which did not get a hard register and
1380 we are running the reload pass. */
1382 #define IS_RELOADING_PSEUDO_P(OP) \
1383 ((reload_in_progress \
1384 && GET_CODE (OP) == REG \
1385 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1386 && reg_renumber [REGNO (OP)] < 0))
1388 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1390 For the HPPA, `Q' means that this is a memory operand but not a
1391 symbolic memory operand. Note that an unassigned pseudo register
1392 is such a memory operand. Needed because reload will generate
1393 these things in insns and then not re-recognize the insns, causing
1394 constrain_operands to fail.
1400 `T' is for fp loads and stores. */
1401 #define EXTRA_CONSTRAINT(OP, C) \
1403 (IS_RELOADING_PSEUDO_P (OP) \
1404 || (GET_CODE (OP) == MEM \
1405 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1406 || reload_in_progress) \
1407 && ! symbolic_memory_operand (OP, VOIDmode) \
1408 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1409 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1410 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1412 (GET_CODE (OP) == MEM \
1413 && GET_CODE (XEXP (OP, 0)) == PLUS \
1414 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1415 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1416 && (move_operand (OP, GET_MODE (OP)) \
1417 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1418 || reload_in_progress)) \
1420 (GET_CODE (OP) == MEM \
1421 /* Using DFmode forces only short displacements \
1422 to be recognized as valid in reg+d addresses. */\
1423 && memory_address_p (DFmode, XEXP (OP, 0)) \
1424 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1425 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1426 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))) : 0)))
1428 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1429 and check its validity for a certain class.
1430 We have two alternate definitions for each of them.
1431 The usual definition accepts all pseudo regs; the other rejects
1432 them unless they have been allocated suitable hard regs.
1433 The symbol REG_OK_STRICT causes the latter definition to be used.
1435 Most source files want to accept pseudo regs in the hope that
1436 they will get allocated to the class that the insn wants them to be in.
1437 Source files for reload pass need to be strict.
1438 After reload, it makes no difference, since pseudo regs have
1439 been eliminated by then. */
1441 #ifndef REG_OK_STRICT
1443 /* Nonzero if X is a hard reg that can be used as an index
1444 or if it is a pseudo reg. */
1445 #define REG_OK_FOR_INDEX_P(X) \
1446 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1447 /* Nonzero if X is a hard reg that can be used as a base reg
1448 or if it is a pseudo reg. */
1449 #define REG_OK_FOR_BASE_P(X) \
1450 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1454 /* Nonzero if X is a hard reg that can be used as an index. */
1455 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1456 /* Nonzero if X is a hard reg that can be used as a base reg. */
1457 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1461 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1462 that is a valid memory address for an instruction.
1463 The MODE argument is the machine mode for the MEM expression
1464 that wants to use this address.
1466 On the HP-PA, the actual legitimate addresses must be
1467 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1468 But we can treat a SYMBOL_REF as legitimate if it is part of this
1469 function's constant-pool, because such addresses can actually
1470 be output as REG+SMALLINT.
1472 Note we only allow 5 bit immediates for access to a constant address;
1473 doing so avoids losing for loading/storing a FP register at an address
1474 which will not fit in 5 bits. */
1476 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1477 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1479 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1480 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1482 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1483 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1485 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1486 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1488 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1490 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1491 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1492 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1493 && REG_P (XEXP (X, 0)) \
1494 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1496 else if (GET_CODE (X) == PLUS) \
1498 rtx base = 0, index; \
1499 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1501 if (GET_CODE (XEXP (X, 1)) == REG \
1502 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1504 else if (flag_pic == 1 \
1505 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1508 else if (REG_P (XEXP (X, 0)) \
1509 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1510 base = XEXP (X, 0), index = XEXP (X, 1); \
1511 else if (REG_P (XEXP (X, 1)) \
1512 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1513 base = XEXP (X, 1), index = XEXP (X, 0); \
1515 if (GET_CODE (index) == CONST_INT \
1516 && ((INT_14_BITS (index) \
1517 && (TARGET_SOFT_FLOAT \
1518 || ((MODE) != SFmode && (MODE) != DFmode))) \
1519 || INT_5_BITS (index))) \
1521 if (! TARGET_SOFT_FLOAT \
1523 && (mode == SFmode || mode == DFmode) \
1524 && GET_CODE (index) == MULT \
1525 && GET_CODE (XEXP (index, 0)) == REG \
1526 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1527 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1528 && INTVAL (XEXP (index, 1)) == (mode == SFmode ? 4 : 8))\
1531 else if (GET_CODE (X) == LO_SUM \
1532 && GET_CODE (XEXP (X, 0)) == REG \
1533 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1534 && CONSTANT_P (XEXP (X, 1)) \
1535 && (TARGET_SOFT_FLOAT \
1536 || ((MODE) != SFmode \
1537 && (MODE) != DFmode))) \
1539 else if (GET_CODE (X) == LO_SUM \
1540 && GET_CODE (XEXP (X, 0)) == SUBREG \
1541 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1542 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1543 && CONSTANT_P (XEXP (X, 1)) \
1544 && (TARGET_SOFT_FLOAT \
1545 || ((MODE) != SFmode \
1546 && (MODE) != DFmode))) \
1548 else if (GET_CODE (X) == LABEL_REF \
1549 || (GET_CODE (X) == CONST_INT \
1550 && INT_5_BITS (X))) \
1552 /* Needed for -fPIC */ \
1553 else if (GET_CODE (X) == LO_SUM \
1554 && GET_CODE (XEXP (X, 0)) == REG \
1555 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1556 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1560 /* Try machine-dependent ways of modifying an illegitimate address
1561 to be legitimate. If we find one, return the new, valid address.
1562 This macro is used in only one place: `memory_address' in explow.c.
1564 OLDX is the address as it was before break_out_memory_refs was called.
1565 In some cases it is useful to look at this to decide what needs to be done.
1567 MODE and WIN are passed so that this macro can use
1568 GO_IF_LEGITIMATE_ADDRESS.
1570 It is always safe for this macro to do nothing. It exists to recognize
1571 opportunities to optimize the output. */
1573 extern struct rtx_def
*hppa_legitimize_address ();
1574 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1575 { rtx orig_x = (X); \
1576 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1577 if ((X) != orig_x && memory_address_p (MODE, X)) \
1580 /* Go to LABEL if ADDR (a legitimate address expression)
1581 has an effect that depends on the machine mode it is used for. */
1583 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1584 if (GET_CODE (ADDR) == PRE_DEC \
1585 || GET_CODE (ADDR) == POST_DEC \
1586 || GET_CODE (ADDR) == PRE_INC \
1587 || GET_CODE (ADDR) == POST_INC) \
1590 /* Define this macro if references to a symbol must be treated
1591 differently depending on something about the variable or
1592 function named by the symbol (such as what section it is in).
1594 The macro definition, if any, is executed immediately after the
1595 rtl for DECL or other node is created.
1596 The value of the rtl will be a `mem' whose address is a
1599 The usual thing for this macro to do is to a flag in the
1600 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1601 name string in the `symbol_ref' (if one bit is not enough
1604 On the HP-PA we use this to indicate if a symbol is in text or
1605 data space. Also, function labels need special treatment. */
1607 #define TEXT_SPACE_P(DECL)\
1608 (TREE_CODE (DECL) == FUNCTION_DECL \
1609 || (TREE_CODE (DECL) == VAR_DECL \
1610 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1611 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1613 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1614 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1616 #define FUNCTION_NAME_P(NAME) \
1617 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1619 #define ENCODE_SECTION_INFO(DECL)\
1621 { if (TEXT_SPACE_P (DECL)) \
1623 if (TREE_CODE (DECL) == FUNCTION_DECL \
1624 || TREE_CODE (DECL) == VAR_DECL) \
1625 _rtl = DECL_RTL (DECL); \
1627 _rtl = TREE_CST_RTL (DECL); \
1628 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1629 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1630 hppa_encode_label (XEXP (DECL_RTL (DECL), 0), 0);\
1635 /* Store the user-specified part of SYMBOL_NAME in VAR.
1636 This is sort of inverse to ENCODE_SECTION_INFO. */
1638 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1639 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1640 1 + (SYMBOL_NAME)[1] == '@'\
1641 : (SYMBOL_NAME)[0] == '@'))
1643 /* On hpux10, the linker will give an error if we have a reference
1644 in the read-only data section to a symbol defined in a shared
1645 library. Therefore, expressions that might require a reloc can
1646 not be placed in the read-only data section. */
1647 #define SELECT_SECTION(EXP,RELOC) \
1648 if (TREE_CODE (EXP) == VAR_DECL \
1649 && TREE_READONLY (EXP) \
1650 && !TREE_THIS_VOLATILE (EXP) \
1651 && DECL_INITIAL (EXP) \
1652 && (DECL_INITIAL (EXP) == error_mark_node \
1653 || TREE_CONSTANT (DECL_INITIAL (EXP))) \
1655 readonly_data_section (); \
1656 else if (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'c' \
1657 && !(TREE_CODE (EXP) == STRING_CST && flag_writable_strings) \
1659 readonly_data_section (); \
1663 /* Arghh. This is used for stuff in the constant pool; this may include
1664 function addresses on the PA, which during PIC code generation must
1665 reside in the data space. Unfortunately, there's no way to determine
1666 if a particular label in the constant pool refers to a function address.
1667 So just force everything into the data space during PIC generation. */
1668 #define SELECT_RTX_SECTION(RTX,MODE) \
1672 readonly_data_section ();
1674 /* Specify the machine mode that this machine uses
1675 for the index in the tablejump instruction. */
1676 #define CASE_VECTOR_MODE DImode
1678 /* Define this if the tablejump instruction expects the table
1679 to contain offsets from the address of the table.
1680 Do not define this if the table should contain absolute addresses. */
1681 /* #define CASE_VECTOR_PC_RELATIVE */
1683 #define CASE_DROPS_THROUGH
1684 /* Specify the tree operation to be used to convert reals to integers. */
1685 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1687 /* This is the kind of divide that is easiest to do in the general case. */
1688 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1690 /* Define this as 1 if `char' should by default be signed; else as 0. */
1691 #define DEFAULT_SIGNED_CHAR 1
1693 /* Max number of bytes we can move from memory to memory
1694 in one reasonably fast instruction. */
1697 /* Higher than the default as we prefer to use simple move insns
1698 (better scheduling and delay slot filling) and because our
1699 built-in block move is really a 2X unrolled loop. */
1700 #define MOVE_RATIO 4
1702 /* Define if operations between registers always perform the operation
1703 on the full register even if a narrower mode is specified. */
1704 #define WORD_REGISTER_OPERATIONS
1706 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1707 will either zero-extend or sign-extend. The value of this macro should
1708 be the code that says which one of the two operations is implicitly
1709 done, NIL if none. */
1710 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1712 /* Nonzero if access to memory by bytes is slow and undesirable. */
1713 #define SLOW_BYTE_ACCESS 1
1715 /* Do not break .stabs pseudos into continuations. */
1716 #define DBX_CONTIN_LENGTH 4000
1718 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1719 is done just by pretending it is already truncated. */
1720 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1722 /* We assume that the store-condition-codes instructions store 0 for false
1723 and some other value for true. This is the value stored for true. */
1725 #define STORE_FLAG_VALUE 1
1727 /* When a prototype says `char' or `short', really pass an `int'. */
1728 #define PROMOTE_PROTOTYPES
1730 /* Specify the machine mode that pointers have.
1731 After generation of rtl, the compiler makes no further distinction
1732 between pointers and any other objects of this machine mode. */
1733 #define Pmode SImode
1735 /* Add any extra modes needed to represent the condition code.
1737 HPPA floating comparisons produce condition codes. */
1738 #define EXTRA_CC_MODES CCFPmode
1740 /* Define the names for the modes specified above. */
1741 #define EXTRA_CC_NAMES "CCFP"
1743 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1744 return the mode to be used for the comparison. For floating-point, CCFPmode
1745 should be used. CC_NOOVmode should be used when the first operand is a
1746 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1748 #define SELECT_CC_MODE(OP,X,Y) \
1749 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1751 /* A function address in a call instruction
1752 is a byte address (for indexing purposes)
1753 so give the MEM rtx a byte's mode. */
1754 #define FUNCTION_MODE SImode
1756 /* Define this if addresses of constant functions
1757 shouldn't be put through pseudo regs where they can be cse'd.
1758 Desirable on machines where ordinary constants are expensive
1759 but a CALL with constant address is cheap. */
1760 #define NO_FUNCTION_CSE
1762 /* Define this to be nonzero if shift instructions ignore all but the low-order
1764 #define SHIFT_COUNT_TRUNCATED 1
1766 /* Use atexit for static constructors/destructors, instead of defining
1767 our own exit function. */
1770 /* Compute the cost of computing a constant rtl expression RTX
1771 whose rtx-code is CODE. The body of this macro is a portion
1772 of a switch statement. If the code is computed here,
1773 return it with a return statement. Otherwise, break from the switch. */
1775 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1777 if (INTVAL (RTX) == 0) return 0; \
1778 if (INT_14_BITS (RTX)) return 1; \
1785 case CONST_DOUBLE: \
1786 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1787 && OUTER_CODE != SET) \
1792 #define ADDRESS_COST(RTX) \
1793 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1795 /* Compute extra cost of moving data between one register class
1798 Make moves from SAR so expensive they should never happen. We used to
1799 have 0xffff here, but that generates overflow in rare cases.
1801 Copies involving a FP register and a non-FP register are relatively
1802 expensive because they must go through memory.
1804 Other copies are reasonably cheap. */
1805 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1806 (CLASS1 == SHIFT_REGS ? 0x100 \
1807 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1808 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1812 /* Provide the costs of a rtl expression. This is in the body of a
1813 switch on CODE. The purpose for the cost of MULT is to encourage
1814 `synth_mult' to find a synthetic multiply when reasonable. */
1816 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1818 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1819 return COSTS_N_INSNS (3); \
1820 return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1821 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1823 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1824 return COSTS_N_INSNS (14); \
1828 return COSTS_N_INSNS (60); \
1829 case PLUS: /* this includes shNadd insns */ \
1831 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1832 return COSTS_N_INSNS (3); \
1833 return COSTS_N_INSNS (1); \
1837 return COSTS_N_INSNS (1);
1839 /* Adjust the cost of dependencies. */
1841 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1842 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1844 /* Adjust scheduling priorities. We use this to try and keep addil
1845 and the next use of %r1 close together. */
1846 #define ADJUST_PRIORITY(PREV) \
1848 rtx set = single_set (PREV); \
1852 src = SET_SRC (set); \
1853 dest = SET_DEST (set); \
1854 if (GET_CODE (src) == LO_SUM \
1855 && symbolic_operand (XEXP (src, 1), VOIDmode) \
1856 && ! read_only_operand (XEXP (src, 1), VOIDmode)) \
1857 INSN_PRIORITY (PREV) >>= 3; \
1858 else if (GET_CODE (src) == MEM \
1859 && GET_CODE (XEXP (src, 0)) == LO_SUM \
1860 && symbolic_operand (XEXP (XEXP (src, 0), 1), VOIDmode)\
1861 && ! read_only_operand (XEXP (XEXP (src, 0), 1), VOIDmode))\
1862 INSN_PRIORITY (PREV) >>= 1; \
1863 else if (GET_CODE (dest) == MEM \
1864 && GET_CODE (XEXP (dest, 0)) == LO_SUM \
1865 && symbolic_operand (XEXP (XEXP (dest, 0), 1), VOIDmode)\
1866 && ! read_only_operand (XEXP (XEXP (dest, 0), 1), VOIDmode))\
1867 INSN_PRIORITY (PREV) >>= 3; \
1871 /* Handling the special cases is going to get too complicated for a macro,
1872 just call `pa_adjust_insn_length' to do the real work. */
1873 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1874 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1876 /* Enable a bug fix. (This is for extra caution.) */
1877 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1879 /* Millicode insns are actually function calls with some special
1880 constraints on arguments and register usage.
1882 Millicode calls always expect their arguments in the integer argument
1883 registers, and always return their result in %r29 (ret1). They
1884 are expected to clobber their arguments, %r1, %r29, and %r31 and
1887 These macros tell reorg that the references to arguments and
1888 register clobbers for millicode calls do not appear to happen
1889 until after the millicode call. This allows reorg to put insns
1890 which set the argument registers into the delay slot of the millicode
1891 call -- thus they act more like traditional CALL_INSNs.
1893 get_attr_type will try to recognize the given insn, so make sure to
1894 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1896 #define INSN_SETS_ARE_DELAYED(X) \
1897 ((GET_CODE (X) == INSN \
1898 && GET_CODE (PATTERN (X)) != SEQUENCE \
1899 && GET_CODE (PATTERN (X)) != USE \
1900 && GET_CODE (PATTERN (X)) != CLOBBER \
1901 && get_attr_type (X) == TYPE_MILLI))
1903 #define INSN_REFERENCES_ARE_DELAYED(X) \
1904 ((GET_CODE (X) == INSN \
1905 && GET_CODE (PATTERN (X)) != SEQUENCE \
1906 && GET_CODE (PATTERN (X)) != USE \
1907 && GET_CODE (PATTERN (X)) != CLOBBER \
1908 && get_attr_type (X) == TYPE_MILLI))
1911 /* Control the assembler format that we output. */
1913 /* Output at beginning of assembler file. */
1915 #define ASM_FILE_START(FILE) \
1916 do { fputs ("\t.SPACE $PRIVATE$\n\
1917 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1918 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1920 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1921 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1922 \t.IMPORT $global$,DATA\n\
1923 \t.IMPORT $$dyncall,MILLICODE\n", FILE);\
1925 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1926 if (write_symbols != NO_DEBUG) \
1927 output_file_directive ((FILE), main_input_filename); \
1930 /* Output to assembler file text saying following lines
1931 may contain character constants, extra white space, comments, etc. */
1933 #define ASM_APP_ON ""
1935 /* Output to assembler file text saying following lines
1936 no longer contain unusual constructs. */
1938 #define ASM_APP_OFF ""
1940 /* We don't yet know how to identify GCC to HP-PA machines. */
1941 #define ASM_IDENTIFY_GCC(FILE) fputs ("; gcc_compiled.:\n", FILE)
1943 /* Output before code. */
1945 /* Supposedly the assembler rejects the command if there is no tab! */
1946 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1948 /* Output before read-only data. */
1950 /* Supposedly the assembler rejects the command if there is no tab! */
1951 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1953 #define READONLY_DATA_SECTION readonly_data
1955 /* Output before writable data. */
1957 /* Supposedly the assembler rejects the command if there is no tab! */
1958 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1960 /* Output before uninitialized data. */
1962 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1964 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1966 #ifndef CTORS_SECTION_FUNCTION
1967 #define EXTRA_SECTIONS in_readonly_data
1968 #define CTORS_SECTION_FUNCTION
1969 #define DTORS_SECTION_FUNCTION
1971 #define EXTRA_SECTIONS in_readonly_data, in_ctors, in_dtors
1974 /* Switch into a generic section.
1975 This is currently only used to support section attributes.
1977 We make the section read-only and executable for a function decl,
1978 read-only for a const data decl, and writable for a non-const data decl. */
1979 #define ASM_OUTPUT_SECTION_NAME(FILE, DECL, NAME) \
1980 if (DECL && TREE_CODE (DECL) == FUNCTION_DECL) \
1982 fputs ("\t.SPACE $TEXT$\n", FILE); \
1984 "\t.SUBSPA %s,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY,SORT=24\n", \
1987 else if (DECL && TREE_READONLY (DECL)) \
1989 fputs ("\t.SPACE $TEXT$\n", FILE); \
1991 "\t.SUBSPA %s,QUAD=0,ALIGN=8,ACCESS=44,SORT=16\n", \
1996 fputs ("\t.SPACE $PRIVATE$\n", FILE); \
1998 "\t.SUBSPA %s,QUAD=1,ALIGN=8,ACCESS=31,SORT=16\n", \
2002 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
2003 which reference data within the $TEXT$ space (for example constant
2004 strings in the $LIT$ subspace).
2006 The assemblers (GAS and HP as) both have problems with handling
2007 the difference of two symbols which is the other correct way to
2008 reference constant data during PIC code generation.
2010 So, there's no way to reference constant data which is in the
2011 $TEXT$ space during PIC generation. Instead place all constant
2012 data into the $PRIVATE$ subspace (this reduces sharing, but it
2013 works correctly). */
2015 #define EXTRA_SECTION_FUNCTIONS \
2019 if (in_section != in_readonly_data) \
2022 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
2024 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
2025 in_section = in_readonly_data; \
2028 CTORS_SECTION_FUNCTION \
2029 DTORS_SECTION_FUNCTION
2032 /* How to refer to registers in assembler output.
2033 This sequence is indexed by compiler's hard-register-number (see above). */
2035 #define REGISTER_NAMES \
2036 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
2037 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
2038 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
2039 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
2040 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
2041 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
2042 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
2043 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
2044 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
2045 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
2046 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
2049 #define ADDITIONAL_REGISTER_NAMES \
2050 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
2051 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
2052 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
2053 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
2054 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
2055 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
2056 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
2059 /* How to renumber registers for dbx and gdb.
2061 Registers 0 - 31 remain unchanged.
2063 Registers 32 - 87 are mapped to 72 - 127
2065 Register 88 is mapped to 32. */
2067 #define DBX_REGISTER_NUMBER(REGNO) \
2068 ((REGNO) <= 31 ? (REGNO) : \
2069 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
2071 /* This is how to output the definition of a user-level label named NAME,
2072 such as the label on a static function or variable NAME. */
2074 #define ASM_OUTPUT_LABEL(FILE, NAME) \
2075 do { assemble_name (FILE, NAME); \
2076 fputc ('\n', FILE); } while (0)
2078 /* This is how to output a command to make the user-level label named NAME
2079 defined for reference from other files.
2081 We call assemble_name, which in turn sets TREE_SYMBOL_REFERENCED. This
2082 macro will restore the original value of TREE_SYMBOL_REFERENCED to avoid
2083 placing useless function definitions in the output file. */
2085 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2086 do { int save_referenced; \
2087 save_referenced = TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (DECL)); \
2088 fputs ("\t.IMPORT ", FILE); \
2089 assemble_name (FILE, NAME); \
2090 if (FUNCTION_NAME_P (NAME)) \
2091 fputs (",CODE\n", FILE); \
2093 fputs (",DATA\n", FILE); \
2094 TREE_SYMBOL_REFERENCED (DECL_ASSEMBLER_NAME (DECL)) = save_referenced; \
2097 /* The bogus HP assembler requires ALL external references to be
2098 "imported", even library calls. They look a bit different, so
2101 Also note not all libcall names are passed to ENCODE_SECTION_INFO
2102 (__main for example). To make sure all libcall names have section
2103 info recorded in them, we do it here. */
2105 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
2106 do { fputs ("\t.IMPORT ", FILE); \
2107 if (!function_label_operand (RTL, VOIDmode)) \
2108 hppa_encode_label (RTL, 1); \
2109 assemble_name (FILE, XSTR ((RTL), 0)); \
2110 fputs (",CODE\n", FILE); \
2113 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
2115 /* We only handle DATA objects here, functions are globalized in \
2116 ASM_DECLARE_FUNCTION_NAME. */ \
2117 if (! FUNCTION_NAME_P (NAME)) \
2119 fputs ("\t.EXPORT ", FILE); \
2120 assemble_name (FILE, NAME); \
2121 fputs (",DATA\n", FILE); \
2125 /* This is how to output a reference to a user-level label named NAME.
2126 `assemble_name' uses this. */
2128 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
2129 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
2131 /* This is how to output an internal numbered label where
2132 PREFIX is the class of label and NUM is the number within the class. */
2134 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
2135 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
2137 /* This is how to store into the string LABEL
2138 the symbol_ref name of an internal numbered label where
2139 PREFIX is the class of label and NUM is the number within the class.
2140 This is suitable for output with `assemble_name'. */
2142 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
2143 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
2145 /* This is how to output an assembler line defining a `double' constant. */
2147 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2149 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2150 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
2153 /* This is how to output an assembler line defining a `float' constant. */
2155 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2157 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2158 fprintf (FILE, "\t.word 0x%lx\n", l); \
2161 /* This is how to output an assembler line defining an `int' constant.
2163 This is made more complicated by the fact that functions must be
2164 prefixed by a P% as well as code label references for the exception
2165 table -- otherwise the linker chokes. */
2167 #define ASM_OUTPUT_INT(FILE,VALUE) \
2168 { fputs ("\t.word ", FILE); \
2169 if (function_label_operand (VALUE, VOIDmode) \
2170 && !TARGET_PORTABLE_RUNTIME) \
2171 fputs ("P%", FILE); \
2172 output_addr_const (FILE, (VALUE)); \
2173 fputs ("\n", FILE);}
2175 /* Likewise for `short' and `char' constants. */
2177 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2178 ( fputs ("\t.half ", FILE), \
2179 output_addr_const (FILE, (VALUE)), \
2182 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2183 ( fputs ("\t.byte ", FILE), \
2184 output_addr_const (FILE, (VALUE)), \
2187 /* This is how to output an assembler line for a numeric constant byte. */
2189 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2190 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
2192 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
2193 output_ascii ((FILE), (P), (SIZE))
2195 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
2196 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
2197 /* This is how to output an element of a case-vector that is absolute.
2198 Note that this method makes filling these branch delay slots
2201 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2202 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2204 /* Jump tables are executable code and live in the TEXT section on the PA. */
2205 #define JUMP_TABLES_IN_TEXT_SECTION
2207 /* This is how to output an element of a case-vector that is relative.
2208 This must be defined correctly as it is used when generating PIC code.
2210 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
2211 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
2212 rather than a table of absolute addresses. */
2214 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2215 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2217 /* This is how to output an assembler line
2218 that says to advance the location counter
2219 to a multiple of 2**LOG bytes. */
2221 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2222 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
2224 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2225 fprintf (FILE, "\t.blockz %d\n", (SIZE))
2227 /* This says how to output an assembler line to define a global common symbol
2228 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2230 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
2232 assemble_name ((FILE), (NAME)); \
2233 fputs ("\t.comm ", (FILE)); \
2234 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2236 /* This says how to output an assembler line to define a local common symbol
2237 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2239 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2241 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
2242 assemble_name ((FILE), (NAME)); \
2243 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2245 /* Store in OUTPUT a string (made with alloca) containing
2246 an assembler-name for a local static variable named NAME.
2247 LABELNO is an integer which is different for each call. */
2249 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2250 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2251 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2253 /* Define the parentheses used to group arithmetic operations
2254 in assembler code. */
2256 #define ASM_OPEN_PAREN "("
2257 #define ASM_CLOSE_PAREN ")"
2259 /* All HP assemblers use "!" to separate logical lines. */
2260 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2262 /* Define results of standard character escape sequences. */
2263 #define TARGET_BELL 007
2264 #define TARGET_BS 010
2265 #define TARGET_TAB 011
2266 #define TARGET_NEWLINE 012
2267 #define TARGET_VT 013
2268 #define TARGET_FF 014
2269 #define TARGET_CR 015
2271 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2272 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2274 /* Print operand X (an rtx) in assembler syntax to file FILE.
2275 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2276 For `%' followed by punctuation, CODE is the punctuation and X is null.
2278 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2279 and an immediate zero should be represented as `r0'.
2281 Several % codes are defined:
2283 C compare conditions
2284 N extract conditions
2285 M modifier to handle preincrement addressing for memory refs.
2286 F modifier to handle preincrement addressing for fp memory refs */
2288 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2291 /* Print a memory address as an operand to reference that memory location. */
2293 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2294 { register rtx addr = ADDR; \
2295 register rtx base; \
2297 switch (GET_CODE (addr)) \
2300 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2303 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2304 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2305 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2306 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2309 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2312 if (!symbolic_operand (XEXP (addr, 1))) \
2313 fputs ("R'", FILE); \
2314 else if (flag_pic == 0) \
2315 fputs ("RR'", FILE); \
2316 else if (flag_pic == 1) \
2318 else if (flag_pic == 2) \
2319 fputs ("RT'", FILE); \
2320 output_global_address (FILE, XEXP (addr, 1), 0); \
2321 fputs ("(", FILE); \
2322 output_operand (XEXP (addr, 0), 0); \
2323 fputs (")", FILE); \
2326 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2329 output_addr_const (FILE, addr); \
2333 /* Define functions in pa.c and used in insn-output.c. */
2335 extern char *output_and ();
2336 extern char *output_ior ();
2337 extern char *output_move_double ();
2338 extern char *output_fp_move_double ();
2339 extern char *output_block_move ();
2340 extern char *output_cbranch ();
2341 extern char *output_bb ();
2342 extern char *output_bvb ();
2343 extern char *output_dbra ();
2344 extern char *output_movb ();
2345 extern char *output_parallel_movb ();
2346 extern char *output_parallel_addb ();
2347 extern char *output_return ();
2348 extern char *output_call ();
2349 extern char *output_millicode_call ();
2350 extern char *output_mul_insn ();
2351 extern char *output_div_insn ();
2352 extern char *output_mod_insn ();
2353 extern char *singlemove_string ();
2354 extern void output_arg_descriptor ();
2355 extern void output_global_address ();
2356 extern struct rtx_def
*legitimize_pic_address ();
2357 extern struct rtx_def
*gen_cmp_fp ();
2358 extern void hppa_encode_label ();
2360 /* Declare functions defined in pa.c and used in templates. */
2362 extern struct rtx_def
*return_addr_rtx ();
2364 /* We want __gcc_plt_call to appear in every program built by
2365 gcc, so we make a reference to it out of __main.
2366 We use the asm statement to fool the optimizer into not
2367 removing the dead (but important) initialization of
2370 #define DO_GLOBAL_DTORS_BODY \
2372 extern void __gcc_plt_call (); \
2373 void (*reference)() = &__gcc_plt_call; \
2375 __asm__ ("" : : "r" (reference)); \
2376 for (p = __DTOR_LIST__ + 1; *p; ) \
2380 /* Find the return address associated with the frame given by
2382 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
2383 (return_addr_rtx (COUNT, FRAMEADDR))
2385 /* Used to mask out junk bits from the return address, such as
2386 processor state, interrupt status, condition codes and the like. */
2387 #define MASK_RETURN_ADDR \
2388 /* The privilege level is in the two low order bits, mask em out \
2389 of the return address. */ \
2390 (GEN_INT (0xfffffffc))