4f820781d08f627e73b385ad849061493eb02334
1 /* Definitions of target machine for GNU compiler, for ROMP chip.
2 Copyright (C) 1989, 1991, 1993, 1995, 1996, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 /* Names to predefine in the preprocessor for this target machine. */
26 #define CPP_PREDEFINES "-Dibm032 -Dunix -Asystem=unix -Asystem=bsd -Acpu=ibm032 -Amachine=ibm032"
28 /* Print subsidiary information on the compiler version in use. */
29 #define TARGET_VERSION ;
31 /* Add -lfp_p when running with -p or -pg. */
32 #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
34 /* Run-time compilation parameters selecting different hardware subsets. */
36 /* Flag to generate all multiplies as an in-line sequence of multiply-step
37 insns instead of calling a library routine. */
38 #define TARGET_IN_LINE_MUL (target_flags & 1)
40 /* Flag to generate padded floating-point data blocks. Otherwise, we generate
41 them the minimum size. This trades off execution speed against size. */
42 #define TARGET_FULL_FP_BLOCKS (target_flags & 2)
44 /* Flag to pass and return floating point values in floating point registers.
45 Since this violates the linkage convention, we feel free to destroy fr2
46 and fr3 on function calls.
47 fr1-fr3 are used to pass the arguments. */
48 #define TARGET_FP_REGS (target_flags & 4)
50 /* Flag to return structures of more than one word in memory. This is for
51 compatibility with the MetaWare HighC (hc) compiler. */
52 #define TARGET_HC_STRUCT_RETURN (target_flags & 010)
54 extern int target_flags
;
56 /* Macro to define tables used to set the flags.
57 This is a list in braces of pairs in braces,
58 each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
62 #define TARGET_SWITCHES \
63 { {"in-line-mul", 1}, \
64 {"call-lib-mul", -1}, \
65 {"full-fp-blocks", 2}, \
66 {"minimum-fp-blocks", -2}, \
67 {"fp-arg-in-fpregs", 4}, \
68 {"fp-arg-in-gregs", -4}, \
69 {"hc-struct-return", 010}, \
70 {"nohc-struct-return", - 010}, \
71 { "", TARGET_DEFAULT}}
73 #define TARGET_DEFAULT 3
75 /* target machine storage layout */
77 /* Define this if most significant bit is lowest numbered
78 in instructions that operate on numbered bit-fields. */
79 /* That is true on ROMP. */
80 #define BITS_BIG_ENDIAN 1
82 /* Define this if most significant byte of a word is the lowest numbered. */
83 /* That is true on ROMP. */
84 #define BYTES_BIG_ENDIAN 1
86 /* Define this if most significant word of a multiword number is lowest
89 For ROMP we can decide arbitrarily since there are no machine instructions
90 for them. Might as well be consistent with bits and bytes. */
91 #define WORDS_BIG_ENDIAN 1
93 /* number of bits in an addressable storage unit */
94 #define BITS_PER_UNIT 8
96 /* Width in bits of a "word", which is the contents of a machine register.
97 Note that this is not necessarily the width of data type `int';
98 if using 16-bit ints on a 68000, this would still be 32.
99 But on a machine with 16-bit registers, this would be 16. */
100 #define BITS_PER_WORD 32
102 /* Width of a word, in units (bytes). */
103 #define UNITS_PER_WORD 4
105 /* Width in bits of a pointer.
106 See also the macro `Pmode' defined below. */
107 #define POINTER_SIZE 32
109 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
110 #define PARM_BOUNDARY 32
112 /* Boundary (in *bits*) on which stack pointer should be aligned. */
113 #define STACK_BOUNDARY 32
115 /* Allocation boundary (in *bits*) for the code of a function. */
116 #define FUNCTION_BOUNDARY 16
118 /* No data type wants to be aligned rounder than this. */
119 #define BIGGEST_ALIGNMENT 32
121 /* Alignment of field after `int : 0' in a structure. */
122 #define EMPTY_FIELD_BOUNDARY 32
124 /* Every structure's size must be a multiple of this. */
125 #define STRUCTURE_SIZE_BOUNDARY 8
127 /* A bitfield declared as `int' forces `int' alignment for the struct. */
128 #define PCC_BITFIELD_TYPE_MATTERS 1
130 /* Make strings word-aligned so strcpy from constants will be faster. */
131 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
132 (TREE_CODE (EXP) == STRING_CST \
133 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
135 /* Make arrays of chars word-aligned for the same reasons. */
136 #define DATA_ALIGNMENT(TYPE, ALIGN) \
137 (TREE_CODE (TYPE) == ARRAY_TYPE \
138 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
139 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
141 /* Set this nonzero if move instructions will actually fail to work
142 when given unaligned data. */
143 #define STRICT_ALIGNMENT 1
145 /* Standard register usage. */
147 /* Number of actual hardware registers.
148 The hardware registers are assigned numbers for the compiler
149 from 0 to just below FIRST_PSEUDO_REGISTER.
150 All registers that the compiler knows about must be given numbers,
151 even those that are not normally considered general registers.
153 ROMP has 16 fullword registers and 8 floating point registers.
155 In addition, the difference between the frame and argument pointers is
156 a function of the number of registers saved, so we need to have a register
157 to use for AP that will later be eliminated in favor of sp or fp. This is
158 a normal register, but it is fixed. */
160 #define FIRST_PSEUDO_REGISTER 25
162 /* 1 for registers that have pervasive standard uses
163 and are not available for the register allocator.
165 On ROMP, r1 is used for the stack and r14 is used for a
168 HACK WARNING: On the RT, there is a bug in code generation for
169 the MC68881 when the first and third operands are the same floating-point
170 register. See the definition of the FINAL_PRESCAN_INSN macro for details.
171 Here we need to reserve fr0 for this purpose. */
172 #define FIXED_REGISTERS \
173 {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
175 1, 0, 0, 0, 0, 0, 0, 0}
177 /* 1 for registers not available across function calls.
178 These must include the FIXED_REGISTERS and also any
179 registers that can be used without being saved.
180 The latter must include the registers where values are returned
181 and the register where structure-value addresses are passed.
182 Aside from that, you can include as many other registers as you like. */
183 #define CALL_USED_REGISTERS \
184 {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
186 1, 1, 0, 0, 0, 0, 0, 0}
188 /* List the order in which to allocate registers. Each register must be
189 listed once, even those in FIXED_REGISTERS.
191 We allocate in the following order:
194 fr7 (more expensive for some FPA's)
195 r0 (not saved and won't conflict with parameter register)
196 r4, r3, r2 (not saved, highest used first to make less conflict)
197 r5 (not saved, but forces r6 to be saved if DI/DFmode)
198 r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save)
201 #define REG_ALLOC_ORDER \
203 19, 20, 21, 22, 23, \
208 15, 14, 13, 12, 11, 10, \
212 /* True if register is floating-point. */
213 #define FP_REGNO_P(N) ((N) >= 17)
215 /* Return number of consecutive hard regs needed starting at reg REGNO
216 to hold something of mode MODE.
217 This is ordinarily the length in words of a value of mode MODE
218 but can be less for certain modes in special long registers.
220 On ROMP, ordinary registers hold 32 bits worth;
221 a single floating point register is always enough for
222 anything that can be stored in them at all. */
223 #define HARD_REGNO_NREGS(REGNO, MODE) \
224 (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \
225 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
227 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
228 On ROMP, the cpu registers can hold any mode but the float registers
229 can hold only floating point. */
230 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
231 (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \
232 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
234 /* Value is 1 if it is a good idea to tie two pseudo registers
235 when one has mode MODE1 and one has mode MODE2.
236 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
237 for any hard reg, then this must be 0 for correct output. */
238 #define MODES_TIEABLE_P(MODE1, MODE2) \
239 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
240 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
241 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
242 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
244 /* A C expression returning the cost of moving data from a register of class
245 CLASS1 to one of CLASS2.
247 On the ROMP, access to floating-point registers is expensive (even between
249 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
250 (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS))
252 /* Specify the registers used for certain standard purposes.
253 The values of these macros are register numbers. */
255 /* ROMP pc isn't overloaded on a register that the compiler knows about. */
256 /* #define PC_REGNUM */
258 /* Register to use for pushing function arguments. */
259 #define STACK_POINTER_REGNUM 1
261 /* Base register for access to local variables of the function. */
262 #define FRAME_POINTER_REGNUM 13
264 /* Value should be nonzero if functions must have frame pointers.
265 Zero means the frame pointer need not be set up (and parms
266 may be accessed via the stack pointer) in functions that seem suitable.
267 This is computed in `reload', in reload1.c. */
268 #define FRAME_POINTER_REQUIRED 0
270 /* Base register for access to arguments of the function. */
271 #define ARG_POINTER_REGNUM 16
273 /* Place to put static chain when calling a function that requires it. */
274 #define STATIC_CHAIN \
275 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, -36))
277 /* Place where static chain is found upon entry to routine. */
278 #define STATIC_CHAIN_INCOMING \
279 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -20))
281 /* Place that structure value return address is placed.
283 On the ROMP, it is passed as an extra parameter. */
284 #define STRUCT_VALUE 0
286 /* Define the classes of registers for register constraints in the
287 machine description. Also define ranges of constants.
289 One of the classes must always be named ALL_REGS and include all hard regs.
290 If there is more than one class, another class must be named NO_REGS
291 and contain no registers.
293 The name GENERAL_REGS must be the name of a class (or an alias for
294 another name such as ALL_REGS). This is the class of registers
295 that is allowed by "g" or "r" in a register constraint.
296 Also, registers outside this class are allocated only when
297 instructions express preferences for them.
299 The classes must be numbered in nondecreasing order; that is,
300 a larger-numbered class must never be contained completely
301 in a smaller-numbered class.
303 For any two classes, it is very desirable that there be another
304 class that represents their union. */
306 /* The ROMP has two types of registers, general and floating-point.
308 However, r0 is special in that it cannot be used as a base register.
309 So make a class for registers valid as base registers.
311 For floating-point support, add classes that just consist of r0 and
312 r15, respectively. */
314 enum reg_class
{ NO_REGS
, R0_REGS
, R15_REGS
, BASE_REGS
, GENERAL_REGS
,
315 FP_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
317 #define N_REG_CLASSES (int) LIM_REG_CLASSES
319 /* Give names of register classes as strings for dump file. */
321 #define REG_CLASS_NAMES \
322 {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \
323 "FP_REGS", "ALL_REGS" }
325 /* Define which registers fit in which classes.
326 This is an initializer for a vector of HARD_REG_SET
327 of length N_REG_CLASSES. */
329 #define REG_CLASS_CONTENTS {{0}, {0x00001}, {0x08000}, {0x1fffe}, {0x1ffff}, \
330 {0x1fe0000}, {0x1ffffff} }
332 /* The same information, inverted:
333 Return the class number of the smallest class containing
334 reg number REGNO. This could be a conditional expression
335 or could index an array. */
337 #define REGNO_REG_CLASS(REGNO) \
338 ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS)
340 /* The class value for index registers, and the one for base regs. */
341 #define INDEX_REG_CLASS BASE_REGS
342 #define BASE_REG_CLASS BASE_REGS
344 /* Get reg_class from a letter such as appears in the machine description. */
346 #define REG_CLASS_FROM_LETTER(C) \
347 ((C) == 'f' ? FP_REGS \
348 : (C) == 'b' ? BASE_REGS \
349 : (C) == 'z' ? R0_REGS \
350 : (C) == 't' ? R15_REGS \
353 /* The letters I, J, K, L, M, N, and P in a register constraint string
354 can be used to stand for particular ranges of immediate operands.
355 This macro defines what the ranges are.
356 C is the letter, and VALUE is a constant value.
357 Return 1 if VALUE is in the range specified by C.
359 `I' is constants less than 16
360 `J' is negative constants greater than -16
361 `K' is the range for a normal D insn.
362 `L' is a constant with only the low-order 16 bits set
363 `M' is a constant with only the high-order 16 bits set
364 `N' is a single-bit constant
365 `O' is a constant with either the high-order or low-order 16 bits all ones
366 `P' is the complement of a single-bit constant
369 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
370 ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \
371 : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \
372 : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
373 : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \
374 : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \
375 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
376 : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \
377 || ((VALUE) & 0xffff0000) == 0xffff0000 \
378 : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \
381 /* Similar, but for floating constants, and defining letters G and H.
382 Here VALUE is the CONST_DOUBLE rtx itself.
383 No floating-point constants on ROMP. */
385 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
387 /* Optional extra constraints for this machine.
389 For the ROMP, `Q' means that this is a memory operand but not a symbolic
390 memory operand. Note that an unassigned pseudo register is such a
391 memory operand. If register allocation has not been done, we reject
392 pseudos, since we assume (hope) that they will get hard registers.
394 `R' means that this is a constant pool reference to the current function.
395 This is just r14 and so can be treated as a register. We bother with this
396 just in move insns as that is the only place it is likely to occur.
398 `S' means that this is the address of a constant pool location. This is
399 equal to r14 plus a constant. We also only check for this in move insns. */
401 #define EXTRA_CONSTRAINT(OP, C) \
403 ((GET_CODE (OP) == REG \
404 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
405 && reg_renumber != 0 \
406 && reg_renumber[REGNO (OP)] < 0) \
407 || (GET_CODE (OP) == MEM \
408 && ! symbolic_memory_operand (OP, VOIDmode))) \
409 : (C) == 'R' ? current_function_operand (OP, VOIDmode) \
410 : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \
413 /* Given an rtx X being reloaded into a reg required to be
414 in class CLASS, return the class of reg to actually use.
415 In general this is just CLASS; but on some machines
416 in some cases it is preferable to use a more restrictive class.
418 For the ROMP, if X is a memory reference that involves a symbol,
419 we must use a BASE_REGS register instead of GENERAL_REGS
420 to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF
421 to be valid, so we assume that this is the case.
423 Also, if X is an integer class, ensure that floating-point registers
426 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
427 ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
429 (CLASS) != GENERAL_REGS ? (CLASS) : \
430 GET_CODE (X) != MEM ? GENERAL_REGS : \
431 GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \
432 GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \
433 GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \
434 GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \
435 GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \
436 GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \
437 GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \
438 GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS)
440 /* Return the register class of a scratch register needed to store into
441 OUT from a register of class CLASS in MODE.
443 On the ROMP, we cannot store into a symbolic memory address from an
444 integer register; we need a BASE_REGS register as a scratch to do it. */
446 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
447 (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \
448 ? BASE_REGS : NO_REGS)
450 /* Return the maximum number of consecutive registers
451 needed to represent mode MODE in a register of class CLASS.
453 On ROMP, this is the size of MODE in words,
454 except in the FP regs, where a single reg is always enough. */
455 #define CLASS_MAX_NREGS(CLASS, MODE) \
456 ((CLASS) == FP_REGS ? 1 \
457 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
459 /* Stack layout; function entry, exit and calling. */
461 /* Define this if pushing a word on the stack
462 makes the stack pointer a smaller address. */
463 #define STACK_GROWS_DOWNWARD
465 /* Define this if the nominal address of the stack frame
466 is at the high-address end of the local variables;
467 that is, each additional local variable allocated
468 goes at a more negative offset in the frame. */
469 #define FRAME_GROWS_DOWNWARD
471 /* Offset within stack frame to start allocating local variables at.
472 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
473 first local allocated. Otherwise, it is the offset to the BEGINNING
474 of the first local allocated.
475 On the ROMP, if we set the frame pointer to 15 words below the highest
476 address of the highest local variable, the first 16 words will be
477 addressable via D-short insns. */
478 #define STARTING_FRAME_OFFSET 64
480 /* If we generate an insn to push BYTES bytes,
481 this says how many the stack pointer really advances by.
482 On ROMP, don't define this because there are no push insns. */
483 /* #define PUSH_ROUNDING(BYTES) */
485 /* Offset of first parameter from the argument pointer register value.
486 On the ROMP, we define the argument pointer to the start of the argument
488 #define FIRST_PARM_OFFSET(FNDECL) 0
490 /* Define this if stack space is still allocated for a parameter passed
491 in a register. The value is the number of bytes. */
492 #define REG_PARM_STACK_SPACE(FNDECL) 16
494 /* This is the difference between the logical top of stack and the actual sp.
496 For the ROMP, sp points past the words allocated for the first four outgoing
497 arguments (they are part of the callee's frame). */
498 #define STACK_POINTER_OFFSET -16
500 /* Define this if the maximum size of all the outgoing args is to be
501 accumulated and pushed during the prologue. The amount can be
502 found in the variable current_function_outgoing_args_size. */
503 #define ACCUMULATE_OUTGOING_ARGS 1
505 /* Value is the number of bytes of arguments automatically
506 popped when returning from a subroutine call.
507 FUNDECL is the declaration node of the function (as a tree),
508 FUNTYPE is the data type of the function (as a tree),
509 or for a library call it is an identifier node for the subroutine name.
510 SIZE is the number of bytes of arguments passed on the stack. */
512 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
514 /* Define how to find the value returned by a function.
515 VALTYPE is the data type of the value (as a tree).
516 If the precise function being called is known, FUNC is its FUNCTION_DECL;
517 otherwise, FUNC is 0.
519 On ROMP the value is found in r2, unless the machine specific option
520 fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */
522 #define FUNCTION_VALUE(VALTYPE, FUNC) \
523 gen_rtx_REG (TYPE_MODE (VALTYPE), \
525 && GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) \
528 /* Define how to find the value returned by a library function
529 assuming the value has mode MODE. */
531 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
533 /* The definition of this macro implies that there are cases where
534 a scalar value cannot be returned in registers.
536 For the ROMP, if compatibility with HC is required, anything of
537 type DImode is returned in memory. */
539 #define RETURN_IN_MEMORY(type) \
540 (TYPE_MODE (type) == BLKmode \
541 || (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode))
543 /* 1 if N is a possible register number for a function value
544 as seen by the caller.
546 On ROMP, r2 is the only register thus used unless fp values are to be
547 returned in fp regs, in which case fr1 is also used. */
549 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS))
551 /* 1 if N is a possible register number for function argument passing.
552 On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */
554 #define FUNCTION_ARG_REGNO_P(N) \
555 (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21))
557 /* Define a data type for recording info about an argument list
558 during the scan of that argument list. This data type should
559 hold all necessary information about the function itself
560 and about the args processed so far, enough to enable macros
561 such as FUNCTION_ARG to determine where the next arg should go.
563 On the ROMP, this is a structure. The first word is the number of
564 words of (integer only if -mfp-arg-in-fpregs is specified) arguments
565 scanned so far (including the invisible argument, if any, which holds
566 the structure-value-address). The second word hold the corresponding
567 value for floating-point arguments, except that both single and double
568 count as one register. */
570 struct rt_cargs
{int gregs
, fregs
; };
571 #define CUMULATIVE_ARGS struct rt_cargs
573 #define USE_FP_REG(MODE,CUM) \
574 (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \
577 /* Define intermediate macro to compute the size (in registers) of an argument
580 #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \
582 : (MODE) != BLKmode \
583 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
584 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
586 /* Initialize a variable CUM of type CUMULATIVE_ARGS
587 for a call to a function whose data type is FNTYPE.
588 For a library call, FNTYPE is 0.
590 On ROMP, the offset normally starts at 0, but starts at 4 bytes
591 when the function gets a structure-value-address as an
592 invisible first argument. */
594 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
598 /* Update the data in CUM to advance over an argument
599 of mode MODE and data type TYPE.
600 (TYPE is null for libcalls where that information may not be available.) */
602 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
605 if (USE_FP_REG(MODE, CUM)) \
608 (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \
612 /* Determine where to put an argument to a function.
613 Value is zero to push the argument on the stack,
614 or a hard register in which to store the argument.
616 MODE is the argument's machine mode.
617 TYPE is the data type of the argument (as a tree).
618 This is null for libcalls where that information may
620 CUM is a variable of type CUMULATIVE_ARGS which gives info about
621 the preceding args and about the function being called.
622 NAMED is nonzero if this argument is a named parameter
623 (otherwise it is an extra parameter matching an ellipsis).
625 On ROMP the first four words of args are normally in registers
626 and the rest are pushed. */
628 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
630 : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
631 : USE_FP_REG(MODE,CUM) ? gen_rtx_REG ((MODE), (CUM).fregs + 17) \
632 : (CUM).gregs < 4 ? gen_rtx_REG ((MODE), 2 + (CUM).gregs) : 0)
634 /* For an arg passed partly in registers and partly in memory,
635 this is the number of registers used.
636 For args passed entirely in registers or entirely in memory, zero. */
638 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
640 : USE_FP_REG(MODE,CUM) ? 0 \
641 : (((CUM).gregs < 4 \
642 && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \
643 ? 4 - (CUM).gregs : 0))
645 /* Perform any needed actions needed for a function that is receiving a
646 variable number of arguments.
650 MODE and TYPE are the mode and type of the current parameter.
652 PRETEND_SIZE is a variable that should be set to the amount of stack
653 that must be pushed by the prolog to pretend that our caller pushed
656 Normally, this macro will push all remaining incoming registers on the
657 stack and set PRETEND_SIZE to the length of the registers pushed. */
659 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
660 { if (TARGET_FP_REGS) \
661 error ("can't have varargs with -mfp-arg-in-fp-regs"); \
662 else if ((CUM).gregs < 4) \
664 int first_reg_offset = (CUM).gregs; \
666 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
667 first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
669 if (first_reg_offset > 4) \
670 first_reg_offset = 4; \
672 if (! NO_RTL && first_reg_offset != 4) \
673 move_block_from_reg \
674 (2 + first_reg_offset, \
675 gen_rtx_MEM (BLKmode, \
676 plus_constant (virtual_incoming_args_rtx, \
677 first_reg_offset * 4)), \
678 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \
679 PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \
683 /* This macro produces the initial definition of a function name.
684 On the ROMP, we need to place an extra '.' in the function name. */
686 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
687 { if (TREE_PUBLIC(DECL)) \
688 fprintf (FILE, "\t.globl _.%s\n", NAME); \
689 fprintf (FILE, "_.%s:\n", NAME); \
692 /* This macro is used to output the start of the data area.
694 On the ROMP, the _name is a pointer to the data area. At that
695 location is the address of _.name, which is really the name of
696 the function. We need to set all this up here.
698 The global declaration of the data area, if needed, is done in
699 `assemble_function', where it thinks it is globalizing the function
702 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \
703 { extern int data_offset; \
705 fprintf (FILE, "\t.align 2\n"); \
706 ASM_OUTPUT_LABEL (FILE, NAME); \
707 fprintf (FILE, "\t.long _.%s, 0, ", NAME); \
708 if (current_function_calls_alloca) \
709 fprintf (FILE, "0x%x\n", \
710 0xf6900000 + current_function_outgoing_args_size); \
712 fprintf (FILE, "0\n"); \
713 data_offset = ((SIZE) + 12 + 3) / 4; \
716 /* Select section for constant in constant pool.
718 On ROMP, all constants are in the data area. */
720 #define SELECT_RTX_SECTION(MODE, X, ALIGN) data_section ()
722 /* Output assembler code to FILE to increment profiler label # LABELNO
723 for profiling a function entry. */
725 #define FUNCTION_PROFILER(FILE, LABELNO) \
726 fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n");
728 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
729 the stack pointer does not matter. The value is tested only in
730 functions that have frame pointers.
731 No definition is equivalent to always zero. */
732 /* #define EXIT_IGNORE_STACK 1 */
734 /* Output assembler code for a block containing the constant parts
735 of a trampoline, leaving space for the variable parts.
737 The trampoline should set the static chain pointer to value placed
738 into the trampoline and should branch to the specified routine.
740 On the ROMP, we have a problem. There are no free registers to use
741 to construct the static chain and function addresses. Hence we use
742 the following kludge: r15 (the return address) is first saved in mq.
743 Then we use r15 to form the function address. We then branch to the
744 function and restore r15 in the delay slot. This makes it appear that
745 the function was called directly from the caller.
747 (Note that the function address built is actually that of the data block.
748 This is passed in r0 and the actual routine address is loaded into r15.)
750 In addition, note that the address of the "called function", in this case
751 the trampoline, is actually the address of the data area. So we need to
752 make a fake data area that will contain the address of the trampoline.
753 Note that this must be defined as two half-words, since the trampoline
754 template (as opposed to the trampoline on the stack) is only half-word
757 #define TRAMPOLINE_TEMPLATE(FILE) \
759 fprintf (FILE, "\t.short 0,0\n"); \
760 fprintf (FILE, "\tcau r0,0(r0)\n"); \
761 fprintf (FILE, "\toil r0,r0,0\n"); \
762 fprintf (FILE, "\tmts r10,r15\n"); \
763 fprintf (FILE, "\tst r0,-36(r1)\n"); \
764 fprintf (FILE, "\tcau r15,0(r0)\n"); \
765 fprintf (FILE, "\toil r15,r15,0\n"); \
766 fprintf (FILE, "\tcas r0,r15,r0\n"); \
767 fprintf (FILE, "\tls r15,0(r15)\n"); \
768 fprintf (FILE, "\tbrx r15\n"); \
769 fprintf (FILE, "\tmfs r10,r15\n"); \
772 /* Length in units of the trampoline for entering a nested function. */
774 #define TRAMPOLINE_SIZE 36
776 /* Emit RTL insns to initialize the variable parts of a trampoline.
777 FNADDR is an RTX for the address of the function's pure code.
778 CXT is an RTX for the static chain value for the function.
780 On the RT, the static chain and function addresses are written in
783 We also need to write the address of the first instruction in
784 the trampoline into the first word of the trampoline to simulate a
787 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
788 romp_initialize_trampoline (ADDR, FNADDR, CXT)
790 /* Definitions for register eliminations.
792 We have two registers that can be eliminated on the ROMP. First, the
793 frame pointer register can often be eliminated in favor of the stack
794 pointer register. Secondly, the argument pointer register can always be
795 eliminated; it is replaced with either the stack or frame pointer.
797 In addition, we use the elimination mechanism to see if r14 is needed.
798 Initially we assume that it isn't. If it is, we spill it. This is done
799 by making it an eliminable register. It doesn't matter what we replace
800 it with, since it will never occur in the rtl at this point. */
802 /* This is an array of structures. Each structure initializes one pair
803 of eliminable registers. The "from" register number is given first,
804 followed by "to". Eliminations of the same "from" register are listed
805 in order of preference. */
806 #define ELIMINABLE_REGS \
807 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
808 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
809 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
812 /* Given FROM and TO register numbers, say whether this elimination is allowed.
813 Frame pointer elimination is automatically handled.
815 For the ROMP, if frame pointer elimination is being done, we would like to
816 convert ap into fp, not sp.
818 We need r14 if various conditions (tested in romp_using_r14) are true.
820 All other eliminations are valid. */
821 #define CAN_ELIMINATE(FROM, TO) \
822 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
823 ? ! frame_pointer_needed \
824 : (FROM) == 14 ? ! romp_using_r14 () \
827 /* Define the offset between two registers, one to be eliminated, and the other
828 its replacement, at the start of a routine. */
829 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
830 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
832 if (romp_pushes_stack ()) \
833 (OFFSET) = ((get_frame_size () - 64) \
834 + current_function_outgoing_args_size); \
836 (OFFSET) = - (romp_sa_size () + 64); \
838 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
839 (OFFSET) = romp_sa_size () - 16 + 64; \
840 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
842 if (romp_pushes_stack ()) \
843 (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \
844 + current_function_outgoing_args_size); \
848 else if ((FROM) == 14) \
854 /* Addressing modes, and classification of registers for them. */
856 /* #define HAVE_POST_INCREMENT 0 */
857 /* #define HAVE_POST_DECREMENT 0 */
859 /* #define HAVE_PRE_DECREMENT 0 */
860 /* #define HAVE_PRE_INCREMENT 0 */
862 /* Macros to check register numbers against specific register classes. */
864 /* These assume that REGNO is a hard or pseudo reg number.
865 They give nonzero only if REGNO is a hard reg of the suitable class
866 or a pseudo reg currently allocated to a suitable hard reg.
867 Since they use reg_renumber, they are safe only once reg_renumber
868 has been allocated, which happens in local-alloc.c. */
870 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
871 #define REGNO_OK_FOR_BASE_P(REGNO) \
872 ((REGNO) < FIRST_PSEUDO_REGISTER \
873 ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \
874 : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \
875 && reg_renumber[REGNO] != 16))
877 /* Maximum number of registers that can appear in a valid memory address. */
879 #define MAX_REGS_PER_ADDRESS 1
881 /* Recognize any constant value that is a valid address. */
883 #define CONSTANT_ADDRESS_P(X) \
884 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
885 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
886 || GET_CODE (X) == HIGH)
888 /* Nonzero if the constant value X is a legitimate general operand.
889 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
891 On the ROMP, there is a bit of a hack here. Basically, we wish to
892 only issue instructions that are not `as' macros. However, in the
893 case of `get', `load', and `store', if the operand is a relocatable
894 symbol (possibly +/- an integer), there is no way to express the
895 resulting split-relocation except with the macro. Therefore, allow
896 either a constant valid in a normal (sign-extended) D-format insn or
897 a relocatable expression.
899 Also, for DFmode and DImode, we must ensure that both words are
902 We define two macros: The first is given an offset (0 or 4) and indicates
903 that the operand is a CONST_INT that is valid for that offset. The second
904 indicates a valid non-CONST_INT constant. */
906 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
907 (GET_CODE (X) == CONST_INT \
908 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
910 #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \
911 (GET_CODE (X) == SYMBOL_REF \
912 || GET_CODE (X) == LABEL_REF \
913 || (GET_CODE (X) == CONST \
914 && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
915 || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
916 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT))
918 /* Include all constant integers and constant double, but exclude
919 SYMBOL_REFs that are to be obtained from the data area (see below). */
920 #define LEGITIMATE_CONSTANT_P(X) \
921 ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \
922 || GET_CODE (X) == CONST_INT \
923 || GET_CODE (X) == CONST_DOUBLE) \
924 && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
926 /* For no good reason, we do the same as the other RT compilers and load
927 the addresses of data areas for a function from our data area. That means
928 that we need to mark such SYMBOL_REFs. We do so here. */
929 #define ENCODE_SECTION_INFO(DECL) \
930 if (TREE_CODE (TREE_TYPE (DECL)) == FUNCTION_TYPE) \
931 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
933 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
934 and check its validity for a certain class.
935 We have two alternate definitions for each of them.
936 The usual definition accepts all pseudo regs; the other rejects
937 them unless they have been allocated suitable hard regs.
938 The symbol REG_OK_STRICT causes the latter definition to be used.
940 Most source files want to accept pseudo regs in the hope that
941 they will get allocated to the class that the insn wants them to be in.
942 Source files for reload pass need to be strict.
943 After reload, it makes no difference, since pseudo regs have
944 been eliminated by then. */
946 #ifndef REG_OK_STRICT
948 /* Nonzero if X is a hard reg that can be used as an index
949 or if it is a pseudo reg. */
950 #define REG_OK_FOR_INDEX_P(X) 0
951 /* Nonzero if X is a hard reg that can be used as a base reg
952 or if it is a pseudo reg. */
953 #define REG_OK_FOR_BASE_P(X) \
954 (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
958 /* Nonzero if X is a hard reg that can be used as an index. */
959 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
960 /* Nonzero if X is a hard reg that can be used as a base reg. */
961 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
965 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
966 that is a valid memory address for an instruction.
967 The MODE argument is the machine mode for the MEM expression
968 that wants to use this address.
970 On the ROMP, a legitimate address is either a legitimate constant,
971 a register plus a legitimate constant, or a register. See the
972 discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */
973 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
974 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
976 if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \
978 if (GET_CODE (X) == PLUS \
979 && GET_CODE (XEXP (X, 0)) == REG \
980 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
981 && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \
983 if (GET_CODE (X) == PLUS \
984 && GET_CODE (XEXP (X, 0)) == REG \
985 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
986 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
987 && (((MODE) != DFmode && (MODE) != DImode) \
988 || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \
992 /* Try machine-dependent ways of modifying an illegitimate address
993 to be legitimate. If we find one, return the new, valid address.
994 This macro is used in only one place: `memory_address' in explow.c.
996 OLDX is the address as it was before break_out_memory_refs was called.
997 In some cases it is useful to look at this to decide what needs to be done.
999 MODE and WIN are passed so that this macro can use
1000 GO_IF_LEGITIMATE_ADDRESS.
1002 It is always safe for this macro to do nothing. It exists to recognize
1003 opportunities to optimize the output.
1005 On ROMP, check for the sum of a register with a constant
1006 integer that is out of range. If so, generate code to add the
1007 constant with the low-order 16 bits masked to the register and force
1008 this result into another register (this can be done with `cau').
1009 Then generate an address of REG+(CONST&0xffff), allowing for the
1010 possibility of bit 16 being a one.
1012 If the register is not OK for a base register, abort. */
1014 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1015 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1016 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1017 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1018 { int high_int, low_int; \
1019 if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1021 high_int = INTVAL (XEXP (X, 1)) >> 16; \
1022 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1023 if (low_int & 0x8000) \
1024 high_int += 1, low_int |= 0xffff0000; \
1025 (X) = gen_rtx_PLUS (SImode, \
1026 force_operand (plus_constant (XEXP (X, 0), \
1027 high_int << 16), 0), \
1028 GEN_INT (low_int)); \
1032 /* Go to LABEL if ADDR (a legitimate address expression)
1033 has an effect that depends on the machine mode it is used for.
1035 On the ROMP this is true only if the address is valid with a zero offset
1036 but not with an offset of four (this means it cannot be used as an
1037 address for DImode or DFmode). Since we know it is valid, we just check
1038 for an address that is not valid with an offset of four. */
1040 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1041 { if (GET_CODE (ADDR) == PLUS \
1042 && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \
1043 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1047 /* Define this if some processing needs to be done immediately before
1048 emitting code for an insn.
1050 This is used on the ROMP, to compensate for a bug in the floating-point
1051 code. When a floating-point operation is done with the first and third
1052 operands both the same floating-point register, it will generate bad code
1053 for the MC68881. So we must detect this. If it occurs, we patch the
1054 first operand to be fr0 and insert a move insn to move it to the desired
1056 #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \
1057 { rtx op0, op1, op2, operation, tem; \
1058 if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \
1060 op0 = OPERANDS[0]; \
1061 operation = OPERANDS[1]; \
1062 if (float_conversion (operation, VOIDmode)) \
1063 operation = XEXP (operation, 0); \
1064 if (float_binary (operation, VOIDmode)) \
1066 op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \
1067 if (float_conversion (op1, VOIDmode)) \
1068 op1 = XEXP (op1, 0); \
1069 if (float_conversion (op2, VOIDmode)) \
1070 op2 = XEXP (op2, 0); \
1071 if (rtx_equal_p (op0, op2) \
1072 && (GET_CODE (operation) == PLUS \
1073 || GET_CODE (operation) == MULT)) \
1074 tem = op1, op1 = op2, op2 = tem; \
1075 if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \
1076 && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \
1077 && REGNO (op0) == REGNO (op2)) \
1079 tem = gen_rtx_REG (GET_MODE (op0), 17); \
1080 emit_insn_after (gen_move_insn (op0, tem), INSN); \
1081 SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \
1082 OPERANDS[0] = tem; \
1088 /* Specify the machine mode that this machine uses
1089 for the index in the tablejump instruction. */
1090 #define CASE_VECTOR_MODE SImode
1092 /* Define as C expression which evaluates to nonzero if the tablejump
1093 instruction expects the table to contain offsets from the address of the
1095 Do not define this if the table should contain absolute addresses. */
1096 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1098 /* Specify the tree operation to be used to convert reals to integers. */
1099 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1101 /* This is the kind of divide that is easiest to do in the general case. */
1102 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1104 /* Define this as 1 if `char' should by default be signed; else as 0. */
1105 #define DEFAULT_SIGNED_CHAR 0
1107 /* This flag, if defined, says the same insns that convert to a signed fixnum
1108 also convert validly to an unsigned one.
1110 We actually lie a bit here as overflow conditions are different. But
1111 they aren't being checked anyway. */
1113 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1115 /* Max number of bytes we can move from memory to memory
1116 in one reasonably fast instruction. */
1119 /* Nonzero if access to memory by bytes is no faster than for words.
1120 Also non-zero if doing byte operations (specifically shifts) in registers
1122 #define SLOW_BYTE_ACCESS 1
1124 /* Define if operations between registers always perform the operation
1125 on the full register even if a narrower mode is specified. */
1126 #define WORD_REGISTER_OPERATIONS
1128 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1129 will either zero-extend or sign-extend. The value of this macro should
1130 be the code that says which one of the two operations is implicitly
1131 done, NIL if none. */
1132 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1134 /* This is BSD, so it wants DBX format. */
1135 #define DBX_DEBUGGING_INFO
1137 /* Define the letter code used in a stabs entry for parameters passed
1138 with the register attribute.
1140 GCC's default value, 'P', is used by dbx to refers to an external
1141 procedure. The section 5 manual page for dbx implies that 'R' would be the
1142 right letter, but dbx 1.5 has a bug in it that precludes its use.
1143 Probably that is why neither hc or pcc use this. pcc puts in two
1144 stabs entries: one for the parameter location and one for the register
1145 location. The letter `r' (register)
1146 would be okay, but it loses parameter attribute of the stabs entry. */
1147 #define DBX_REGPARM_STABS_LETTER 'R'
1149 /* A C expression for the integer offset value of an automatic variable
1150 (N_LSYM) having address X (an RTX). This gets used in .stabs entries
1151 for the local variables. Compare with the default definition. */
1152 #define DEBUGGER_AUTO_OFFSET(X) \
1153 (GET_CODE (X) == PLUS \
1154 ? romp_debugger_auto_correction (INTVAL (XEXP (X, 1)) ) \
1157 /* A C expression for the integer offset value of an argument (N_PSYM)
1158 having address X (an RTX). The nominal offset is OFFSET. */
1159 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1160 romp_debugger_arg_correction (OFFSET);
1162 /* We don't have GAS for the RT yet, so don't write out special
1163 .stabs in cc1plus. */
1165 #define FASCIST_ASSEMBLER
1167 /* Do not break .stabs pseudos into continuations. */
1168 #define DBX_CONTIN_LENGTH 0
1170 /* Don't try to use the `x' type-cross-reference character in DBX data.
1171 Also has the consequence of putting each struct, union or enum
1172 into a separate .stabs, containing only cross-refs to the others. */
1173 #define DBX_NO_XREFS
1175 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1176 is done just by pretending it is already truncated. */
1177 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1179 /* Specify the machine mode that pointers have.
1180 After generation of rtl, the compiler makes no further distinction
1181 between pointers and any other objects of this machine mode. */
1182 #define Pmode SImode
1184 /* Mode of a function address in a call instruction (for indexing purposes).
1186 Doesn't matter on ROMP. */
1187 #define FUNCTION_MODE SImode
1189 /* Define this if addresses of constant functions
1190 shouldn't be put through pseudo regs where they can be cse'd.
1191 Desirable on machines where ordinary constants are expensive
1192 but a CALL with constant address is cheap. */
1193 #define NO_FUNCTION_CSE
1195 /* Define this if shift instructions ignore all but the low-order
1198 This is not true on the RT since it uses the low-order 6, not 5, bits.
1199 At some point, this should be extended to see how to express that. */
1201 /* #define SHIFT_COUNT_TRUNCATED */
1203 /* Compute the cost of computing a constant rtl expression RTX whose
1204 rtx-code is CODE, contained within an expression of code OUTER_CODE.
1205 The body of this macro is a portion of a switch statement. If the
1206 code is computed here, return it with a return statement. Otherwise,
1207 break from the switch. */
1209 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1211 if (((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0) \
1212 || ((OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0) \
1213 || (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS) \
1214 && (unsigned int) (INTVAL (RTX) + 15) < 31) \
1215 || ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\
1217 return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000 \
1218 || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\
1222 if (current_function_operand (RTX, Pmode)) return 0; \
1223 return COSTS_N_INSNS (2); \
1224 case CONST_DOUBLE: \
1225 if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2; \
1226 return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \
1227 ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4));
1229 /* Provide the costs of a rtl expression. This is in the body of a
1232 References to our own data area are really references to r14, so they
1233 are very cheap. Multiples and divides are very expensive. */
1235 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1237 return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2); \
1239 return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\
1240 ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \
1245 return COSTS_N_INSNS (45);
1247 /* Compute the cost of an address. This is meant to approximate the size
1248 and/or execution delay of an insn using that address. If the cost is
1249 approximated by the RTL complexity, including CONST_COSTS above, as
1250 is usually the case for CISC machines, this macro should not be defined.
1251 For aggressively RISCy machines, only one insn format is allowed, so
1252 this macro should be a constant. The value of this macro only matters
1253 for valid addresses.
1255 For the ROMP, everything is cost 0 except for addresses involving
1256 symbolic constants, which are cost 1. */
1258 #define ADDRESS_COST(RTX) \
1259 ((GET_CODE (RTX) == SYMBOL_REF \
1260 && ! CONSTANT_POOL_ADDRESS_P (RTX)) \
1261 || GET_CODE (RTX) == LABEL_REF \
1262 || (GET_CODE (RTX) == CONST \
1263 && ! constant_pool_address_operand (RTX, Pmode)) \
1264 || (GET_CODE (RTX) == PLUS \
1265 && ((GET_CODE (XEXP (RTX, 1)) == SYMBOL_REF \
1266 && ! CONSTANT_POOL_ADDRESS_P (XEXP (RTX, 0))) \
1267 || GET_CODE (XEXP (RTX, 1)) == LABEL_REF \
1268 || GET_CODE (XEXP (RTX, 1)) == CONST)))
1270 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1271 should be adjusted to reflect any required changes. This macro is used when
1272 there is some systematic length adjustment required that would be difficult
1273 to express in the length attribute.
1275 On the ROMP, there are two adjustments: First, a 2-byte insn in the delay
1276 slot of a CALL (including floating-point operations) actually takes four
1277 bytes. Second, we have to make the worst-case alignment assumption for
1280 #define ADJUST_INSN_LENGTH(X,LENGTH) \
1281 if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \
1282 && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \
1283 && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \
1285 else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \
1288 /* Tell final.c how to eliminate redundant test instructions. */
1290 /* Here we define machine-dependent flags and fields in cc_status
1291 (see `conditions.h'). */
1293 /* Set if condition code (really not-Z) is stored in `test bit'. */
1294 #define CC_IN_TB 01000
1296 /* Set if condition code is set by an unsigned compare. */
1297 #define CC_UNSIGNED 02000
1299 /* Store in cc_status the expressions
1300 that the condition codes will describe
1301 after execution of an instruction whose pattern is EXP.
1302 Do not alter them if the instruction would not alter the cc's. */
1304 #define NOTICE_UPDATE_CC(BODY,INSN) \
1305 update_cc (BODY, INSN)
1307 /* Control the assembler format that we output. */
1309 /* Output at beginning of assembler file. */
1311 #define ASM_FILE_START(FILE) \
1314 fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \
1315 fprintf (FILE, "\t.globl .oVgcc"); \
1316 for (p = version_string; *p != ' ' && *p != 0; p++) \
1317 fprintf (FILE, "%c", *p); \
1318 fprintf (FILE, "\n\t.set .oVgcc"); \
1319 for (p = version_string; *p != ' ' && *p != 0; p++) \
1320 fprintf (FILE, "%c", *p); \
1321 fprintf (FILE, ",0\n"); \
1324 /* Output to assembler file text saying following lines
1325 may contain character constants, extra white space, comments, etc. */
1327 #define ASM_APP_ON ""
1329 /* Output to assembler file text saying following lines
1330 no longer contain unusual constructs. */
1332 #define ASM_APP_OFF ""
1334 /* Output before instructions and read-only data. */
1336 #define TEXT_SECTION_ASM_OP "\t.text"
1338 /* Output before writable data. */
1340 #define DATA_SECTION_ASM_OP "\t.data"
1342 /* How to refer to registers in assembler output.
1343 This sequence is indexed by compiler's hard-register-number (see above). */
1345 #define REGISTER_NAMES \
1346 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
1347 "r10", "r11", "r12", "r13", "r14", "r15", "ap", \
1348 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" }
1350 /* This is how to output the definition of a user-level label named NAME,
1351 such as the label on a static function or variable NAME. */
1353 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1354 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1356 /* This is how to output a command to make the user-level label named NAME
1357 defined for reference from other files. */
1359 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1360 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1362 /* The prefix to add to user-visible assembler symbols. */
1364 #define USER_LABEL_PREFIX "_"
1366 /* This is how to output an internal numbered label where
1367 PREFIX is the class of label and NUM is the number within the class. */
1369 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1370 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1372 /* This is how to output a label for a jump table. Arguments are the same as
1373 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1376 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1377 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1379 /* This is how to store into the string LABEL
1380 the symbol_ref name of an internal numbered label where
1381 PREFIX is the class of label and NUM is the number within the class.
1382 This is suitable for output with `assemble_name'. */
1384 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1385 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1387 /* This is how to output code to push a register on the stack.
1388 It need not be very fast code. */
1390 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1391 fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO])
1393 /* This is how to output an insn to pop a register from the stack.
1394 It need not be very fast code. */
1396 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1397 fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO])
1399 /* This is how to output an element of a case-vector that is absolute. */
1401 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1402 fprintf (FILE, "\t.long L%d\n", VALUE)
1404 /* This is how to output an element of a case-vector that is relative.
1405 Don't define this if it is not supported. */
1407 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
1409 /* This is how to output an assembler line
1410 that says to advance the location counter
1411 to a multiple of 2**LOG bytes. */
1413 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1415 fprintf (FILE, "\t.align %d\n", (LOG))
1417 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1418 fprintf (FILE, "\t.space %d\n", (SIZE))
1420 /* This says how to output an assembler line
1421 to define a global common symbol. */
1423 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1424 ( fputs (".comm ", (FILE)), \
1425 assemble_name ((FILE), (NAME)), \
1426 fprintf ((FILE), ",%d\n", (SIZE)))
1428 /* This says how to output an assembler line
1429 to define a local common symbol. */
1431 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1432 ( fputs (".lcomm ", (FILE)), \
1433 assemble_name ((FILE), (NAME)), \
1434 fprintf ((FILE), ",%d\n", (SIZE)))
1436 /* Store in OUTPUT a string (made with alloca) containing
1437 an assembler-name for a local static variable named NAME.
1438 LABELNO is an integer which is different for each call. */
1440 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1441 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1442 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1444 /* Print operand X (an rtx) in assembler syntax to file FILE.
1445 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1446 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1448 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1450 /* Define which CODE values are valid. */
1452 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1453 ((CODE) == '.' || (CODE) == '#')
1455 /* Print a memory address as an operand to reference that memory location. */
1457 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1458 { register rtx addr = ADDR; \
1459 register rtx base = 0, offset = addr; \
1460 if (GET_CODE (addr) == REG) \
1461 base = addr, offset = const0_rtx; \
1462 else if (GET_CODE (addr) == PLUS \
1463 && GET_CODE (XEXP (addr, 0)) == REG) \
1464 base = XEXP (addr, 0), offset = XEXP (addr, 1); \
1465 else if (GET_CODE (addr) == SYMBOL_REF \
1466 && CONSTANT_POOL_ADDRESS_P (addr)) \
1468 offset = GEN_INT (get_pool_offset (addr) + 12); \
1469 base = gen_rtx_REG (SImode, 14); \
1471 else if (GET_CODE (addr) == CONST \
1472 && GET_CODE (XEXP (addr, 0)) == PLUS \
1473 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \
1474 && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \
1475 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \
1477 offset = plus_constant (XEXP (XEXP (addr, 0), 1), \
1478 (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \
1480 base = gen_rtx_REG (SImode, 14); \
1482 output_addr_const (FILE, offset); \
1484 fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \
1487 /* Define the codes that are matched by predicates in aux-output.c. */
1489 #define PREDICATE_CODES \
1490 {"zero_memory_operand", {SUBREG, MEM}}, \
1491 {"short_memory_operand", {SUBREG, MEM}}, \
1492 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1493 {"current_function_operand", {MEM}}, \
1494 {"constant_pool_address_operand", {SUBREG, CONST}}, \
1495 {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \
1496 {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \
1497 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1498 {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \
1499 {"short_cint_operand", {CONST_INT}}, \
1500 {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \
1501 {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \
1502 PLUS, CONST, CONST_INT}}, \
1503 {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \
1504 {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \
1505 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1506 {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \
1507 SYMBOL_REF, CONST_DOUBLE}}, \
1508 {"reg_0_operand", {REG}}, \
1509 {"reg_15_operand", {REG}}, \
1510 {"float_binary", {PLUS, MINUS, MULT, DIV}}, \
1511 {"float_unary", {NEG, ABS}}, \
1512 {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}},