504efa404aabecd26f6cc3dd043f00af4707a47f
1 /* Definitions of target machine for GNU compiler, for ROMP chip.
2 Copyright (C) 1989, 1991, 1993 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "-Dibm032 -Dunix -Asystem(unix) -Asystem(bsd) -Acpu(ibm032) -Amachine(ibm032)"
26 /* Print subsidiary information on the compiler version in use. */
27 #define TARGET_VERSION ;
29 /* Add -lfp_p when running with -p or -pg. */
30 #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
32 /* Run-time compilation parameters selecting different hardware subsets. */
34 /* Flag to generate all multiplies as an in-line sequence of multiply-step
35 insns instead of calling a library routine. */
36 #define TARGET_IN_LINE_MUL (target_flags & 1)
38 /* Flag to generate padded floating-point data blocks. Otherwise, we generate
39 them the minimum size. This trades off execution speed against size. */
40 #define TARGET_FULL_FP_BLOCKS (target_flags & 2)
42 /* Flag to pass and return floating point values in floating point registers.
43 Since this violates the linkage convention, we feel free to destroy fr2
44 and fr3 on function calls.
45 fr1-fr3 are used to pass the arguments. */
46 #define TARGET_FP_REGS (target_flags & 4)
48 /* Flag to return structures of more than one word in memory. This is for
49 compatibility with the MetaWare HighC (hc) compiler. */
50 #define TARGET_HC_STRUCT_RETURN (target_flags & 010)
52 extern int target_flags
;
54 /* Macro to define tables used to set the flags.
55 This is a list in braces of pairs in braces,
56 each pair being { "NAME", VALUE }
57 where VALUE is the bits to set or minus the bits to clear.
58 An empty string NAME is used to identify the default VALUE. */
60 #define TARGET_SWITCHES \
61 { {"in-line-mul", 1}, \
62 {"call-lib-mul", -1}, \
63 {"full-fp-blocks", 2}, \
64 {"minimum-fp-blocks", -2}, \
65 {"fp-arg-in-fpregs", 4}, \
66 {"fp-arg-in-gregs", -4}, \
67 {"hc-struct-return", 010}, \
68 {"nohc-struct-return", - 010}, \
69 { "", TARGET_DEFAULT}}
71 #define TARGET_DEFAULT 3
73 /* Define this to change the optimizations performed by default.
75 This used to depend on the value of write_symbols,
76 but that is contrary to the general plan for GCC options. */
78 #define OPTIMIZATION_OPTIONS(LEVEL) \
82 flag_force_addr = 1; \
87 /* target machine storage layout */
89 /* Define this if most significant bit is lowest numbered
90 in instructions that operate on numbered bit-fields. */
91 /* That is true on ROMP. */
92 #define BITS_BIG_ENDIAN 1
94 /* Define this if most significant byte of a word is the lowest numbered. */
95 /* That is true on ROMP. */
96 #define BYTES_BIG_ENDIAN 1
98 /* Define this if most significant word of a multiword number is lowest
101 For ROMP we can decide arbitrarily since there are no machine instructions
102 for them. Might as well be consistent with bits and bytes. */
103 #define WORDS_BIG_ENDIAN 1
105 /* number of bits in an addressable storage unit */
106 #define BITS_PER_UNIT 8
108 /* Width in bits of a "word", which is the contents of a machine register.
109 Note that this is not necessarily the width of data type `int';
110 if using 16-bit ints on a 68000, this would still be 32.
111 But on a machine with 16-bit registers, this would be 16. */
112 #define BITS_PER_WORD 32
114 /* Width of a word, in units (bytes). */
115 #define UNITS_PER_WORD 4
117 /* Width in bits of a pointer.
118 See also the macro `Pmode' defined below. */
119 #define POINTER_SIZE 32
121 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
122 #define PARM_BOUNDARY 32
124 /* Boundary (in *bits*) on which stack pointer should be aligned. */
125 #define STACK_BOUNDARY 32
127 /* Allocation boundary (in *bits*) for the code of a function. */
128 #define FUNCTION_BOUNDARY 16
130 /* No data type wants to be aligned rounder than this. */
131 #define BIGGEST_ALIGNMENT 32
133 /* Alignment of field after `int : 0' in a structure. */
134 #define EMPTY_FIELD_BOUNDARY 32
136 /* Every structure's size must be a multiple of this. */
137 #define STRUCTURE_SIZE_BOUNDARY 8
139 /* A bitfield declared as `int' forces `int' alignment for the struct. */
140 #define PCC_BITFIELD_TYPE_MATTERS 1
142 /* Make strings word-aligned so strcpy from constants will be faster. */
143 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
144 (TREE_CODE (EXP) == STRING_CST \
145 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
147 /* Make arrays of chars word-aligned for the same reasons. */
148 #define DATA_ALIGNMENT(TYPE, ALIGN) \
149 (TREE_CODE (TYPE) == ARRAY_TYPE \
150 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
151 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
153 /* Set this nonzero if move instructions will actually fail to work
154 when given unaligned data. */
155 #define STRICT_ALIGNMENT 1
157 /* Standard register usage. */
159 /* Number of actual hardware registers.
160 The hardware registers are assigned numbers for the compiler
161 from 0 to just below FIRST_PSEUDO_REGISTER.
162 All registers that the compiler knows about must be given numbers,
163 even those that are not normally considered general registers.
165 ROMP has 16 fullword registers and 8 floating point registers.
167 In addition, the difference between the frame and argument pointers is
168 a function of the number of registers saved, so we need to have a register
169 to use for AP that will later be eliminated in favor of sp or fp. This is
170 a normal register, but it is fixed. */
172 #define FIRST_PSEUDO_REGISTER 25
174 /* 1 for registers that have pervasive standard uses
175 and are not available for the register allocator.
177 On ROMP, r1 is used for the stack and r14 is used for a
180 HACK WARNING: On the RT, there is a bug in code generation for
181 the MC68881 when the first and third operands are the same floating-point
182 register. See the definition of the FINAL_PRESCAN_INSN macro for details.
183 Here we need to reserve fr0 for this purpose. */
184 #define FIXED_REGISTERS \
185 {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
187 1, 0, 0, 0, 0, 0, 0, 0}
189 /* 1 for registers not available across function calls.
190 These must include the FIXED_REGISTERS and also any
191 registers that can be used without being saved.
192 The latter must include the registers where values are returned
193 and the register where structure-value addresses are passed.
194 Aside from that, you can include as many other registers as you like. */
195 #define CALL_USED_REGISTERS \
196 {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
198 1, 1, 0, 0, 0, 0, 0, 0}
200 /* List the order in which to allocate registers. Each register must be
201 listed once, even those in FIXED_REGISTERS.
203 We allocate in the following order:
206 fr7 (more expensive for some FPA's)
207 r0 (not saved and won't conflict with parameter register)
208 r4, r3, r2 (not saved, highest used first to make less conflict)
209 r5 (not saved, but forces r6 to be saved if DI/DFmode)
210 r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save)
213 #define REG_ALLOC_ORDER \
215 19, 20, 21, 22, 23, \
220 15, 14, 13, 12, 11, 10, \
224 /* True if register is floating-point. */
225 #define FP_REGNO_P(N) ((N) >= 17)
227 /* Return number of consecutive hard regs needed starting at reg REGNO
228 to hold something of mode MODE.
229 This is ordinarily the length in words of a value of mode MODE
230 but can be less for certain modes in special long registers.
232 On ROMP, ordinary registers hold 32 bits worth;
233 a single floating point register is always enough for
234 anything that can be stored in them at all. */
235 #define HARD_REGNO_NREGS(REGNO, MODE) \
236 (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \
237 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
239 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
240 On ROMP, the cpu registers can hold any mode but the float registers
241 can hold only floating point. */
242 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
243 (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \
244 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
246 /* Value is 1 if it is a good idea to tie two pseudo registers
247 when one has mode MODE1 and one has mode MODE2.
248 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
249 for any hard reg, then this must be 0 for correct output. */
250 #define MODES_TIEABLE_P(MODE1, MODE2) \
251 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
252 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
253 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
254 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
256 /* A C expression returning the cost of moving data from a register of class
257 CLASS1 to one of CLASS2.
259 On the ROMP, access to floating-point registers is expensive (even between
261 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
262 (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS))
264 /* Specify the registers used for certain standard purposes.
265 The values of these macros are register numbers. */
267 /* ROMP pc isn't overloaded on a register that the compiler knows about. */
268 /* #define PC_REGNUM */
270 /* Register to use for pushing function arguments. */
271 #define STACK_POINTER_REGNUM 1
273 /* Base register for access to local variables of the function. */
274 #define FRAME_POINTER_REGNUM 13
276 /* Value should be nonzero if functions must have frame pointers.
277 Zero means the frame pointer need not be set up (and parms
278 may be accessed via the stack pointer) in functions that seem suitable.
279 This is computed in `reload', in reload1.c. */
280 #define FRAME_POINTER_REQUIRED 0
282 /* Base register for access to arguments of the function. */
283 #define ARG_POINTER_REGNUM 16
285 /* Place to put static chain when calling a function that requires it. */
286 #define STATIC_CHAIN \
287 gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \
288 gen_rtx (CONST_INT, VOIDmode, -36)))
290 /* Place where static chain is found upon entry to routine. */
291 #define STATIC_CHAIN_INCOMING \
292 gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \
293 gen_rtx (CONST_INT, VOIDmode, -20)))
295 /* Place that structure value return address is placed.
297 On the ROMP, it is passed as an extra parameter. */
298 #define STRUCT_VALUE 0
300 /* Define the classes of registers for register constraints in the
301 machine description. Also define ranges of constants.
303 One of the classes must always be named ALL_REGS and include all hard regs.
304 If there is more than one class, another class must be named NO_REGS
305 and contain no registers.
307 The name GENERAL_REGS must be the name of a class (or an alias for
308 another name such as ALL_REGS). This is the class of registers
309 that is allowed by "g" or "r" in a register constraint.
310 Also, registers outside this class are allocated only when
311 instructions express preferences for them.
313 The classes must be numbered in nondecreasing order; that is,
314 a larger-numbered class must never be contained completely
315 in a smaller-numbered class.
317 For any two classes, it is very desirable that there be another
318 class that represents their union. */
320 /* The ROMP has two types of registers, general and floating-point.
322 However, r0 is special in that it cannot be used as a base register.
323 So make a class for registers valid as base registers.
325 For floating-point support, add classes that just consist of r0 and
326 r15, respectively. */
328 enum reg_class
{ NO_REGS
, R0_REGS
, R15_REGS
, BASE_REGS
, GENERAL_REGS
,
329 FP_REGS
, ALL_REGS
, LIM_REG_CLASSES
};
331 #define N_REG_CLASSES (int) LIM_REG_CLASSES
333 /* Give names of register classes as strings for dump file. */
335 #define REG_CLASS_NAMES \
336 {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \
337 "FP_REGS", "ALL_REGS" }
339 /* Define which registers fit in which classes.
340 This is an initializer for a vector of HARD_REG_SET
341 of length N_REG_CLASSES. */
343 #define REG_CLASS_CONTENTS {0, 0x00001, 0x08000, 0x1fffe, 0x1ffff, \
344 0x1fe0000, 0x1ffffff }
346 /* The same information, inverted:
347 Return the class number of the smallest class containing
348 reg number REGNO. This could be a conditional expression
349 or could index an array. */
351 #define REGNO_REG_CLASS(REGNO) \
352 ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS)
354 /* The class value for index registers, and the one for base regs. */
355 #define INDEX_REG_CLASS BASE_REGS
356 #define BASE_REG_CLASS BASE_REGS
358 /* Get reg_class from a letter such as appears in the machine description. */
360 #define REG_CLASS_FROM_LETTER(C) \
361 ((C) == 'f' ? FP_REGS \
362 : (C) == 'b' ? BASE_REGS \
363 : (C) == 'z' ? R0_REGS \
364 : (C) == 't' ? R15_REGS \
367 /* The letters I, J, K, L, M, N, and P in a register constraint string
368 can be used to stand for particular ranges of immediate operands.
369 This macro defines what the ranges are.
370 C is the letter, and VALUE is a constant value.
371 Return 1 if VALUE is in the range specified by C.
373 `I' is constants less than 16
374 `J' is negative constants greater than -16
375 `K' is the range for a normal D insn.
376 `L' is a constant with only the low-order 16 bits set
377 `M' is a constant with only the high-order 16 bits set
378 `N' is a single-bit constant
379 `O' is a constant with either the high-order or low-order 16 bits all ones
380 `P' is the complement of a single-bit constant
383 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
384 ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \
385 : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \
386 : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
387 : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \
388 : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \
389 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
390 : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \
391 || ((VALUE) & 0xffff0000) == 0xffff0000 \
392 : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \
395 /* Similar, but for floating constants, and defining letters G and H.
396 Here VALUE is the CONST_DOUBLE rtx itself.
397 No floating-point constants on ROMP. */
399 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
401 /* Optional extra constraints for this machine.
403 For the ROMP, `Q' means that this is a memory operand but not a symbolic
404 memory operand. Note that an unassigned pseudo register is such a
405 memory operand. If register allocation has not been done, we reject
406 pseudos, since we assume (hope) that they will get hard registers.
408 `R' means that this is a constant pool reference to the current function.
409 This is just r14 and so can be treated as a register. We bother with this
410 just in move insns as that is the only place it is likely to occur.
412 `S' means that this is the address of a constant pool location. This is
413 equal to r14 plus a constant. We also only check for this in move insns. */
415 #define EXTRA_CONSTRAINT(OP, C) \
417 ((GET_CODE (OP) == REG \
418 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
419 && reg_renumber != 0 \
420 && reg_renumber[REGNO (OP)] < 0) \
421 || (GET_CODE (OP) == MEM \
422 && ! symbolic_memory_operand (OP, VOIDmode))) \
423 : (C) == 'R' ? current_function_operand (OP, VOIDmode) \
424 : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \
427 /* Given an rtx X being reloaded into a reg required to be
428 in class CLASS, return the class of reg to actually use.
429 In general this is just CLASS; but on some machines
430 in some cases it is preferable to use a more restrictive class.
432 For the ROMP, if X is a memory reference that involves a symbol,
433 we must use a BASE_REGS register instead of GENERAL_REGS
434 to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF
435 to be valid, so we assume that this is the case.
437 Also, if X is an integer class, ensure that floating-point registers
440 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
441 ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
443 (CLASS) != GENERAL_REGS ? (CLASS) : \
444 GET_CODE (X) != MEM ? GENERAL_REGS : \
445 GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \
446 GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \
447 GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \
448 GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \
449 GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \
450 GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \
451 GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \
452 GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS)
454 /* Return the register class of a scratch register needed to store into
455 OUT from a register of class CLASS in MODE.
457 On the ROMP, we cannot store into a symbolic memory address from an
458 integer register; we need a BASE_REGS register as a scratch to do it. */
460 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
461 (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \
462 ? BASE_REGS : NO_REGS)
464 /* Return the maximum number of consecutive registers
465 needed to represent mode MODE in a register of class CLASS.
467 On ROMP, this is the size of MODE in words,
468 except in the FP regs, where a single reg is always enough. */
469 #define CLASS_MAX_NREGS(CLASS, MODE) \
470 ((CLASS) == FP_REGS ? 1 \
471 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
473 /* Stack layout; function entry, exit and calling. */
475 /* Define this if pushing a word on the stack
476 makes the stack pointer a smaller address. */
477 #define STACK_GROWS_DOWNWARD
479 /* Define this if the nominal address of the stack frame
480 is at the high-address end of the local variables;
481 that is, each additional local variable allocated
482 goes at a more negative offset in the frame. */
483 #define FRAME_GROWS_DOWNWARD
485 /* Offset within stack frame to start allocating local variables at.
486 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
487 first local allocated. Otherwise, it is the offset to the BEGINNING
488 of the first local allocated.
489 On the ROMP, if we set the frame pointer to 15 words below the highest
490 address of the highest local variable, the first 16 words will be
491 addressable via D-short insns. */
492 #define STARTING_FRAME_OFFSET 64
494 /* If we generate an insn to push BYTES bytes,
495 this says how many the stack pointer really advances by.
496 On ROMP, don't define this because there are no push insns. */
497 /* #define PUSH_ROUNDING(BYTES) */
499 /* Offset of first parameter from the argument pointer register value.
500 On the ROMP, we define the argument pointer to the start of the argument
502 #define FIRST_PARM_OFFSET(FNDECL) 0
504 /* Define this if stack space is still allocated for a parameter passed
505 in a register. The value is the number of bytes. */
506 #define REG_PARM_STACK_SPACE(FNDECL) 16
508 /* This is the difference between the logical top of stack and the actual sp.
510 For the ROMP, sp points past the words allocated for the first four outgoing
511 arguments (they are part of the callee's frame). */
512 #define STACK_POINTER_OFFSET -16
514 /* Define this if the maximum size of all the outgoing args is to be
515 accumulated and pushed during the prologue. The amount can be
516 found in the variable current_function_outgoing_args_size. */
517 #define ACCUMULATE_OUTGOING_ARGS
519 /* Value is the number of bytes of arguments automatically
520 popped when returning from a subroutine call.
521 FUNTYPE is the data type of the function (as a tree),
522 or for a library call it is an identifier node for the subroutine name.
523 SIZE is the number of bytes of arguments passed on the stack. */
525 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
527 /* Define how to find the value returned by a function.
528 VALTYPE is the data type of the value (as a tree).
529 If the precise function being called is known, FUNC is its FUNCTION_DECL;
530 otherwise, FUNC is 0.
532 On ROMP the value is found in r2, unless the machine specific option
533 fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */
535 #define FUNCTION_VALUE(VALTYPE, FUNC) \
536 gen_rtx (REG, TYPE_MODE (VALTYPE), \
538 GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) ? 18 : 2)
540 /* Define how to find the value returned by a library function
541 assuming the value has mode MODE. */
543 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
545 /* The definition of this macro implies that there are cases where
546 a scalar value cannot be returned in registers.
548 For the ROMP, if compatibility with HC is required, anything of
549 type DImode is returned in memory. */
551 #define RETURN_IN_MEMORY(type) \
552 (TYPE_MODE (type) == BLKmode \
553 || (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode))
555 /* 1 if N is a possible register number for a function value
556 as seen by the caller.
558 On ROMP, r2 is the only register thus used unless fp values are to be
559 returned in fp regs, in which case fr1 is also used. */
561 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS))
563 /* 1 if N is a possible register number for function argument passing.
564 On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */
566 #define FUNCTION_ARG_REGNO_P(N) \
567 (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21))
569 /* Define a data type for recording info about an argument list
570 during the scan of that argument list. This data type should
571 hold all necessary information about the function itself
572 and about the args processed so far, enough to enable macros
573 such as FUNCTION_ARG to determine where the next arg should go.
575 On the ROMP, this is a structure. The first word is the number of
576 words of (integer only if -mfp-arg-in-fpregs is specified) arguments
577 scanned so far (including the invisible argument, if any, which holds
578 the structure-value-address). The second word hold the corresponding
579 value for floating-point arguments, except that both single and double
580 count as one register. */
582 struct rt_cargs
{int gregs
, fregs
; };
583 #define CUMULATIVE_ARGS struct rt_cargs
585 #define USE_FP_REG(MODE,CUM) \
586 (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \
589 /* Define intermediate macro to compute the size (in registers) of an argument
592 #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \
594 : (MODE) != BLKmode \
595 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
596 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
598 /* Initialize a variable CUM of type CUMULATIVE_ARGS
599 for a call to a function whose data type is FNTYPE.
600 For a library call, FNTYPE is 0.
602 On ROMP, the offset normally starts at 0, but starts at 4 bytes
603 when the function gets a structure-value-address as an
604 invisible first argument. */
606 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
610 /* Update the data in CUM to advance over an argument
611 of mode MODE and data type TYPE.
612 (TYPE is null for libcalls where that information may not be available.) */
614 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
617 if (USE_FP_REG(MODE, CUM)) \
620 (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \
624 /* Determine where to put an argument to a function.
625 Value is zero to push the argument on the stack,
626 or a hard register in which to store the argument.
628 MODE is the argument's machine mode.
629 TYPE is the data type of the argument (as a tree).
630 This is null for libcalls where that information may
632 CUM is a variable of type CUMULATIVE_ARGS which gives info about
633 the preceding args and about the function being called.
634 NAMED is nonzero if this argument is a named parameter
635 (otherwise it is an extra parameter matching an ellipsis).
637 On ROMP the first four words of args are normally in registers
638 and the rest are pushed. */
640 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
642 : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
643 : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17) \
644 : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0)
646 /* For an arg passed partly in registers and partly in memory,
647 this is the number of registers used.
648 For args passed entirely in registers or entirely in memory, zero. */
650 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
652 : USE_FP_REG(MODE,CUM) ? 0 \
653 : (((CUM).gregs < 4 \
654 && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \
655 ? 4 - (CUM).gregs : 0))
657 /* Perform any needed actions needed for a function that is receiving a
658 variable number of arguments.
662 MODE and TYPE are the mode and type of the current parameter.
664 PRETEND_SIZE is a variable that should be set to the amount of stack
665 that must be pushed by the prolog to pretend that our caller pushed
668 Normally, this macro will push all remaining incoming registers on the
669 stack and set PRETEND_SIZE to the length of the registers pushed. */
671 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
672 { if (TARGET_FP_REGS) \
673 error ("can't have varargs with -mfp-arg-in-fp-regs"); \
674 else if ((CUM).gregs < 4) \
676 int first_reg_offset = (CUM).gregs; \
678 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
679 first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
681 if (first_reg_offset > 4) \
682 first_reg_offset = 4; \
684 if (! NO_RTL && first_reg_offset != 4) \
685 move_block_from_reg \
686 (2 + first_reg_offset, \
687 gen_rtx (MEM, BLKmode, \
688 plus_constant (virtual_incoming_args_rtx, \
689 first_reg_offset * 4)), \
690 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \
691 PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \
695 /* This macro produces the initial definition of a function name.
696 On the ROMP, we need to place an extra '.' in the function name. */
698 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
699 { if (TREE_PUBLIC(DECL)) \
700 fprintf (FILE, "\t.globl _.%s\n", NAME); \
701 fprintf (FILE, "_.%s:\n", NAME); \
704 /* This macro is used to output the start of the data area.
706 On the ROMP, the _name is a pointer to the data area. At that
707 location is the address of _.name, which is really the name of
708 the function. We need to set all this up here.
710 The global declaration of the data area, if needed, is done in
711 `assemble_function', where it thinks it is globalizing the function
714 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \
715 { extern int data_offset; \
717 fprintf (FILE, "\t.align 2\n"); \
718 ASM_OUTPUT_LABEL (FILE, NAME); \
719 fprintf (FILE, "\t.long _.%s, 0, ", NAME); \
720 if (current_function_calls_alloca) \
721 fprintf (FILE, "0x%x\n", \
722 0xf6900000 + current_function_outgoing_args_size); \
724 fprintf (FILE, "0\n"); \
725 data_offset = ((SIZE) + 12 + 3) / 4; \
728 /* Select section for constant in constant pool.
730 On ROMP, all constants are in the data area. */
732 #define SELECT_RTX_SECTION(MODE, X) data_section ()
734 /* This macro generates the assembly code for function entry.
735 FILE is a stdio stream to output the code to.
736 SIZE is an int: how many units of temporary storage to allocate.
737 Refer to the array `regs_ever_live' to determine which registers
738 to save; `regs_ever_live[I]' is nonzero if register number I
739 is ever used in the function. This macro is responsible for
740 knowing which registers should not be saved even if used. */
742 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
744 /* Output assembler code to FILE to increment profiler label # LABELNO
745 for profiling a function entry. */
747 #define FUNCTION_PROFILER(FILE, LABELNO) \
748 fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n");
750 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
751 the stack pointer does not matter. The value is tested only in
752 functions that have frame pointers.
753 No definition is equivalent to always zero. */
754 /* #define EXIT_IGNORE_STACK 1 */
756 /* This macro generates the assembly code for function exit,
757 on machines that need it. If FUNCTION_EPILOGUE is not defined
758 then individual return instructions are generated for each
759 return statement. Args are same as for FUNCTION_PROLOGUE.
761 The function epilogue should not depend on the current stack pointer!
762 It should use the frame pointer only. This is mandatory because
763 of alloca; we also take advantage of it to omit stack adjustments
766 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
768 /* Output assembler code for a block containing the constant parts
769 of a trampoline, leaving space for the variable parts.
771 The trampoline should set the static chain pointer to value placed
772 into the trampoline and should branch to the specified routine.
774 On the ROMP, we have a problem. There are no free registers to use
775 to construct the static chain and function addresses. Hence we use
776 the following kludge: r15 (the return address) is first saved in mq.
777 Then we use r15 to form the function address. We then branch to the
778 function and restore r15 in the delay slot. This makes it appear that
779 the function was called directly from the caller.
781 (Note that the function address built is actually that of the data block.
782 This is passed in r0 and the actual routine address is loaded into r15.)
784 In addition, note that the address of the "called function", in this case
785 the trampoline, is actually the address of the data area. So we need to
786 make a fake data area that will contain the address of the trampoline.
787 Note that this must be defined as two half-words, since the trampoline
788 template (as opposed to the trampoline on the stack) is only half-word
791 #define TRAMPOLINE_TEMPLATE(FILE) \
793 fprintf (FILE, "\t.short 0,0\n"); \
794 fprintf (FILE, "\tcau r0,0(r0)\n"); \
795 fprintf (FILE, "\toil r0,r0,0\n"); \
796 fprintf (FILE, "\tmts r10,r15\n"); \
797 fprintf (FILE, "\tst r0,-36(r1)\n"); \
798 fprintf (FILE, "\tcau r15,0(r0)\n"); \
799 fprintf (FILE, "\toil r15,r15,0\n"); \
800 fprintf (FILE, "\tcas r0,r15,r0\n"); \
801 fprintf (FILE, "\tls r15,0(r15)\n"); \
802 fprintf (FILE, "\tbrx r15\n"); \
803 fprintf (FILE, "\tmfs r10,r15\n"); \
806 /* Length in units of the trampoline for entering a nested function. */
808 #define TRAMPOLINE_SIZE 36
810 /* Emit RTL insns to initialize the variable parts of a trampoline.
811 FNADDR is an RTX for the address of the function's pure code.
812 CXT is an RTX for the static chain value for the function.
814 On the RT, the static chain and function addresses are written in
817 We also need to write the address of the first instruction in
818 the trampoline into the first word of the trampoline to simulate a
821 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
826 _temp = expand_binop (SImode, add_optab, ADDR, \
827 gen_rtx (CONST_INT, VOIDmode, 4), \
828 0, 1, OPTAB_LIB_WIDEN); \
829 emit_move_insn (gen_rtx (MEM, SImode, \
830 memory_address (SImode, ADDR)), _temp); \
832 _val = force_reg (SImode, CXT); \
833 _addr = memory_address (HImode, plus_constant (ADDR, 10)); \
834 emit_move_insn (gen_rtx (MEM, HImode, _addr), \
835 gen_lowpart (HImode, _val)); \
836 _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
837 build_int_2 (16, 0), 0, 1); \
838 _addr = memory_address (HImode, plus_constant (ADDR, 6)); \
839 emit_move_insn (gen_rtx (MEM, HImode, _addr), \
840 gen_lowpart (HImode, _temp)); \
842 _val = force_reg (SImode, FNADDR); \
843 _addr = memory_address (HImode, plus_constant (ADDR, 24)); \
844 emit_move_insn (gen_rtx (MEM, HImode, _addr), \
845 gen_lowpart (HImode, _val)); \
846 _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
847 build_int_2 (16, 0), 0, 1); \
848 _addr = memory_address (HImode, plus_constant (ADDR, 20)); \
849 emit_move_insn (gen_rtx (MEM, HImode, _addr), \
850 gen_lowpart (HImode, _temp)); \
854 /* Definitions for register eliminations.
856 We have two registers that can be eliminated on the ROMP. First, the
857 frame pointer register can often be eliminated in favor of the stack
858 pointer register. Secondly, the argument pointer register can always be
859 eliminated; it is replaced with either the stack or frame pointer.
861 In addition, we use the elimination mechanism to see if r14 is needed.
862 Initially we assume that it isn't. If it is, we spill it. This is done
863 by making it an eliminable register. It doesn't matter what we replace
864 it with, since it will never occur in the rtl at this point. */
866 /* This is an array of structures. Each structure initializes one pair
867 of eliminable registers. The "from" register number is given first,
868 followed by "to". Eliminations of the same "from" register are listed
869 in order of preference. */
870 #define ELIMINABLE_REGS \
871 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
872 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
873 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
876 /* Given FROM and TO register numbers, say whether this elimination is allowed.
877 Frame pointer elimination is automatically handled.
879 For the ROMP, if frame pointer elimination is being done, we would like to
880 convert ap into fp, not sp.
882 We need r14 if various conditions (tested in romp_using_r14) are true.
884 All other eliminations are valid. */
885 #define CAN_ELIMINATE(FROM, TO) \
886 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
887 ? ! frame_pointer_needed \
888 : (FROM) == 14 ? ! romp_using_r14 () \
891 /* Define the offset between two registers, one to be eliminated, and the other
892 its replacement, at the start of a routine. */
893 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
894 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
896 if (romp_pushes_stack ()) \
897 (OFFSET) = ((get_frame_size () - 64) \
898 + current_function_outgoing_args_size); \
900 (OFFSET) = - (romp_sa_size () + 64); \
902 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
903 (OFFSET) = romp_sa_size () - 16 + 64; \
904 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
906 if (romp_pushes_stack ()) \
907 (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \
908 + current_function_outgoing_args_size); \
912 else if ((FROM) == 14) \
918 /* Addressing modes, and classification of registers for them. */
920 /* #define HAVE_POST_INCREMENT */
921 /* #define HAVE_POST_DECREMENT */
923 /* #define HAVE_PRE_DECREMENT */
924 /* #define HAVE_PRE_INCREMENT */
926 /* Macros to check register numbers against specific register classes. */
928 /* These assume that REGNO is a hard or pseudo reg number.
929 They give nonzero only if REGNO is a hard reg of the suitable class
930 or a pseudo reg currently allocated to a suitable hard reg.
931 Since they use reg_renumber, they are safe only once reg_renumber
932 has been allocated, which happens in local-alloc.c. */
934 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
935 #define REGNO_OK_FOR_BASE_P(REGNO) \
936 ((REGNO) < FIRST_PSEUDO_REGISTER \
937 ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \
938 : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \
939 && reg_renumber[REGNO] != 16))
941 /* Maximum number of registers that can appear in a valid memory address. */
943 #define MAX_REGS_PER_ADDRESS 1
945 /* Recognize any constant value that is a valid address. */
947 #define CONSTANT_ADDRESS_P(X) \
948 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
949 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
950 || GET_CODE (X) == HIGH)
952 /* Nonzero if the constant value X is a legitimate general operand.
953 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
955 On the ROMP, there is a bit of a hack here. Basically, we wish to
956 only issue instructions that are not `as' macros. However, in the
957 case of `get', `load', and `store', if the operand is a relocatable
958 symbol (possibly +/- an integer), there is no way to express the
959 resulting split-relocation except with the macro. Therefore, allow
960 either a constant valid in a normal (sign-extended) D-format insn or
961 a relocatable expression.
963 Also, for DFmode and DImode, we must ensure that both words are
966 We define two macros: The first is given an offset (0 or 4) and indicates
967 that the operand is a CONST_INT that is valid for that offset. The second
968 indicates a valid non-CONST_INT constant. */
970 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
971 (GET_CODE (X) == CONST_INT \
972 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
974 #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \
975 (GET_CODE (X) == SYMBOL_REF \
976 || GET_CODE (X) == LABEL_REF \
977 || (GET_CODE (X) == CONST \
978 && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
979 || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
980 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT))
982 /* Include all constant integers and constant double, but exclude
983 SYMBOL_REFs that are to be obtained from the data area (see below). */
984 #define LEGITIMATE_CONSTANT_P(X) \
985 ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \
986 || GET_CODE (X) == CONST_INT \
987 || GET_CODE (X) == CONST_DOUBLE) \
988 && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
990 /* For no good reason, we do the same as the other RT compilers and load
991 the addresses of data areas for a function from our data area. That means
992 that we need to mark such SYMBOL_REFs. We do so here. */
993 #define ENCODE_SECTION_INFO(DECL) \
994 if (TREE_CODE (TREE_TYPE (DECL)) == FUNCTION_TYPE) \
995 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
997 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
998 and check its validity for a certain class.
999 We have two alternate definitions for each of them.
1000 The usual definition accepts all pseudo regs; the other rejects
1001 them unless they have been allocated suitable hard regs.
1002 The symbol REG_OK_STRICT causes the latter definition to be used.
1004 Most source files want to accept pseudo regs in the hope that
1005 they will get allocated to the class that the insn wants them to be in.
1006 Source files for reload pass need to be strict.
1007 After reload, it makes no difference, since pseudo regs have
1008 been eliminated by then. */
1010 #ifndef REG_OK_STRICT
1012 /* Nonzero if X is a hard reg that can be used as an index
1013 or if it is a pseudo reg. */
1014 #define REG_OK_FOR_INDEX_P(X) 0
1015 /* Nonzero if X is a hard reg that can be used as a base reg
1016 or if it is a pseudo reg. */
1017 #define REG_OK_FOR_BASE_P(X) \
1018 (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1022 /* Nonzero if X is a hard reg that can be used as an index. */
1023 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1024 /* Nonzero if X is a hard reg that can be used as a base reg. */
1025 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1029 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1030 that is a valid memory address for an instruction.
1031 The MODE argument is the machine mode for the MEM expression
1032 that wants to use this address.
1034 On the ROMP, a legitimate address is either a legitimate constant,
1035 a register plus a legitimate constant, or a register. See the
1036 discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */
1037 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1038 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1040 if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \
1042 if (GET_CODE (X) == PLUS \
1043 && GET_CODE (XEXP (X, 0)) == REG \
1044 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1045 && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \
1047 if (GET_CODE (X) == PLUS \
1048 && GET_CODE (XEXP (X, 0)) == REG \
1049 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1050 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1051 && (((MODE) != DFmode && (MODE) != DImode) \
1052 || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \
1056 /* Try machine-dependent ways of modifying an illegitimate address
1057 to be legitimate. If we find one, return the new, valid address.
1058 This macro is used in only one place: `memory_address' in explow.c.
1060 OLDX is the address as it was before break_out_memory_refs was called.
1061 In some cases it is useful to look at this to decide what needs to be done.
1063 MODE and WIN are passed so that this macro can use
1064 GO_IF_LEGITIMATE_ADDRESS.
1066 It is always safe for this macro to do nothing. It exists to recognize
1067 opportunities to optimize the output.
1069 On ROMP, check for the sum of a register with a constant
1070 integer that is out of range. If so, generate code to add the
1071 constant with the low-order 16 bits masked to the register and force
1072 this result into another register (this can be done with `cau').
1073 Then generate an address of REG+(CONST&0xffff), allowing for the
1074 possibility of bit 16 being a one.
1076 If the register is not OK for a base register, abort. */
1078 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1079 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1080 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1081 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
1082 { int high_int, low_int; \
1083 if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1085 high_int = INTVAL (XEXP (X, 1)) >> 16; \
1086 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
1087 if (low_int & 0x8000) \
1088 high_int += 1, low_int |= 0xffff0000; \
1089 (X) = gen_rtx (PLUS, SImode, \
1091 (gen_rtx (PLUS, SImode, XEXP (X, 0), \
1092 gen_rtx (CONST_INT, VOIDmode, \
1093 high_int << 16)), 0),\
1094 gen_rtx (CONST_INT, VOIDmode, low_int)); \
1098 /* Go to LABEL if ADDR (a legitimate address expression)
1099 has an effect that depends on the machine mode it is used for.
1101 On the ROMP this is true only if the address is valid with a zero offset
1102 but not with an offset of four (this means it cannot be used as an
1103 address for DImode or DFmode). Since we know it is valid, we just check
1104 for an address that is not valid with an offset of four. */
1106 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1107 { if (GET_CODE (ADDR) == PLUS \
1108 && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \
1109 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1113 /* Define this if some processing needs to be done immediately before
1114 emitting code for an insn.
1116 This is used on the ROMP, to compensate for a bug in the floating-point
1117 code. When a floating-point operation is done with the first and third
1118 operands both the same floating-point register, it will generate bad code
1119 for the MC68881. So we must detect this. If it occurs, we patch the
1120 first operand to be fr0 and insert a move insn to move it to the desired
1122 #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \
1123 { rtx op0, op1, op2, operation, tem; \
1124 if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \
1126 op0 = OPERANDS[0]; \
1127 operation = OPERANDS[1]; \
1128 if (float_conversion (operation, VOIDmode)) \
1129 operation = XEXP (operation, 0); \
1130 if (float_binary (operation, VOIDmode)) \
1132 op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \
1133 if (float_conversion (op1, VOIDmode)) \
1134 op1 = XEXP (op1, 0); \
1135 if (float_conversion (op2, VOIDmode)) \
1136 op2 = XEXP (op2, 0); \
1137 if (rtx_equal_p (op0, op2) \
1138 && (GET_CODE (operation) == PLUS \
1139 || GET_CODE (operation) == MULT)) \
1140 tem = op1, op1 = op2, op2 = tem; \
1141 if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \
1142 && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \
1143 && REGNO (op0) == REGNO (op2)) \
1145 tem = gen_rtx (REG, GET_MODE (op0), 17); \
1146 emit_insn_after (gen_move_insn (op0, tem), INSN); \
1147 SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \
1148 OPERANDS[0] = tem; \
1154 /* Specify the machine mode that this machine uses
1155 for the index in the tablejump instruction. */
1156 #define CASE_VECTOR_MODE SImode
1158 /* Define this if the tablejump instruction expects the table
1159 to contain offsets from the address of the table.
1160 Do not define this if the table should contain absolute addresses. */
1161 /* #define CASE_VECTOR_PC_RELATIVE */
1163 /* Specify the tree operation to be used to convert reals to integers. */
1164 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1166 /* This is the kind of divide that is easiest to do in the general case. */
1167 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1169 /* Define this as 1 if `char' should by default be signed; else as 0. */
1170 #define DEFAULT_SIGNED_CHAR 0
1172 /* This flag, if defined, says the same insns that convert to a signed fixnum
1173 also convert validly to an unsigned one.
1175 We actually lie a bit here as overflow conditions are different. But
1176 they aren't being checked anyway. */
1178 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1180 /* Max number of bytes we can move from memory to memory
1181 in one reasonably fast instruction. */
1184 /* Nonzero if access to memory by bytes is no faster than for words.
1185 Also non-zero if doing byte operations (specifically shifts) in registers
1187 #define SLOW_BYTE_ACCESS 1
1189 /* Define if operations between registers always perform the operation
1190 on the full register even if a narrower mode is specified. */
1191 #define WORD_REGISTER_OPERATIONS
1193 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1194 will either zero-extend or sign-extend. The value of this macro should
1195 be the code that says which one of the two operations is implicitly
1196 done, NIL if none. */
1197 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1199 /* This is BSD, so it wants DBX format. */
1200 #define DBX_DEBUGGING_INFO
1202 /* Define the letter code used in a stabs entry for parameters passed
1203 with the register attribute.
1205 GCC's default value, 'P', is used by dbx to refers to an external
1206 procedure. The section 5 manual page for dbx implies that 'R' would be the
1207 right letter, but dbx 1.5 has a bug in it that precludes its use.
1208 Probably that is why neither hc or pcc use this. pcc puts in two
1209 stabs entries: one for the parameter location and one for the register
1210 location. The letter `r' (register)
1211 would be okay, but it loses parameter attribute of the stabs entry. */
1212 #define DBX_REGPARM_STABS_LETTER 'R'
1214 /* A C expression for the integer offset value of an automatic variable
1215 (N_LSYM) having address X (an RTX). This gets used in .stabs entries
1216 for the local variables. Compare with the default definition. */
1217 extern int romp_debugger_auto_correction();
1218 #define DEBUGGER_AUTO_OFFSET(X) \
1219 (GET_CODE (X) == PLUS \
1220 ? romp_debugger_auto_correction (INTVAL (XEXP (X, 1)) ) \
1223 /* A C expression for the integer offset value of an argument (N_PSYM)
1224 having address X (an RTX). The nominal offset is OFFSET. */
1225 extern int romp_debugger_arg_correction();
1226 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1227 romp_debugger_arg_correction (OFFSET);
1229 /* We don't have GAS for the RT yet, so don't write out special
1230 .stabs in cc1plus. */
1232 #define FASCIST_ASSEMBLER
1234 /* Do not break .stabs pseudos into continuations. */
1235 #define DBX_CONTIN_LENGTH 0
1237 /* Don't try to use the `x' type-cross-reference character in DBX data.
1238 Also has the consequence of putting each struct, union or enum
1239 into a separate .stabs, containing only cross-refs to the others. */
1240 #define DBX_NO_XREFS
1242 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1243 is done just by pretending it is already truncated. */
1244 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1246 /* Specify the machine mode that pointers have.
1247 After generation of rtl, the compiler makes no further distinction
1248 between pointers and any other objects of this machine mode. */
1249 #define Pmode SImode
1251 /* Mode of a function address in a call instruction (for indexing purposes).
1253 Doesn't matter on ROMP. */
1254 #define FUNCTION_MODE SImode
1256 /* Define this if addresses of constant functions
1257 shouldn't be put through pseudo regs where they can be cse'd.
1258 Desirable on machines where ordinary constants are expensive
1259 but a CALL with constant address is cheap. */
1260 #define NO_FUNCTION_CSE
1262 /* Define this if shift instructions ignore all but the low-order
1265 This is not true on the RT since it uses the low-order 6, not 5, bits.
1266 At some point, this should be extended to see how to express that. */
1268 /* #define SHIFT_COUNT_TRUNCATED */
1270 /* Compute the cost of computing a constant rtl expression RTX whose
1271 rtx-code is CODE, contained within an expression of code OUTER_CODE.
1272 The body of this macro is a portion of a switch statement. If the
1273 code is computed here, return it with a return statement. Otherwise,
1274 break from the switch. */
1276 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1278 if ((OUTER_CODE) == IOR && exact_log2 (INTVAL (RTX)) >= 0 \
1279 || (OUTER_CODE) == AND && exact_log2 (~INTVAL (RTX)) >= 0 \
1280 || (((OUTER_CODE) == PLUS || (OUTER_CODE) == MINUS) \
1281 && (unsigned int) (INTVAL (RTX) + 15) < 31) \
1282 || ((OUTER_CODE) == SET && (unsigned int) INTVAL (RTX) < 16))\
1284 return ((unsigned int) (INTVAL(RTX) + 0x8000) < 0x10000 \
1285 || (INTVAL (RTX) & 0xffff0000) == 0) ? 0 : COSTS_N_INSNS (2);\
1289 if (current_function_operand (RTX, Pmode)) return 0; \
1290 return COSTS_N_INSNS (2); \
1291 case CONST_DOUBLE: \
1292 if ((RTX) == CONST0_RTX (GET_MODE (RTX))) return 2; \
1293 return ((GET_MODE_CLASS (GET_MODE (RTX)) == MODE_FLOAT) \
1294 ? COSTS_N_INSNS (5) : COSTS_N_INSNS (4));
1296 /* Provide the costs of a rtl expression. This is in the body of a
1299 References to our own data area are really references to r14, so they
1300 are very cheap. Multiples and divides are very expensive. */
1302 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1304 return current_function_operand (X, Pmode) ? 0 : COSTS_N_INSNS (2); \
1306 return (TARGET_IN_LINE_MUL && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT)\
1307 ? COSTS_N_INSNS (19) : COSTS_N_INSNS (25); \
1312 return COSTS_N_INSNS (45);
1314 /* Compute the cost of an address. This is meant to approximate the size
1315 and/or execution delay of an insn using that address. If the cost is
1316 approximated by the RTL complexity, including CONST_COSTS above, as
1317 is usually the case for CISC machines, this macro should not be defined.
1318 For aggressively RISCy machines, only one insn format is allowed, so
1319 this macro should be a constant. The value of this macro only matters
1320 for valid addresses.
1322 For the ROMP, everything is cost 0 except for addresses involving
1323 symbolic constants, which are cost 1. */
1325 #define ADDRESS_COST(RTX) \
1326 ((GET_CODE (RTX) == SYMBOL_REF \
1327 && ! CONSTANT_POOL_ADDRESS_P (RTX)) \
1328 || GET_CODE (RTX) == LABEL_REF \
1329 || (GET_CODE (RTX) == CONST \
1330 && ! constant_pool_address_operand (RTX, Pmode)) \
1331 || (GET_CODE (RTX) == PLUS \
1332 && ((GET_CODE (XEXP (RTX, 1)) == SYMBOL_REF \
1333 && ! CONSTANT_POOL_ADDRESS_P (XEXP (RTX, 0))) \
1334 || GET_CODE (XEXP (RTX, 1)) == LABEL_REF \
1335 || GET_CODE (XEXP (RTX, 1)) == CONST)))
1337 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1338 should be adjusted to reflect any required changes. This macro is used when
1339 there is some systematic length adjustment required that would be difficult
1340 to express in the length attribute.
1342 On the ROMP, there are two adjustments: First, a 2-byte insn in the delay
1343 slot of a CALL (including floating-point operations) actually takes four
1344 bytes. Second, we have to make the worst-case alignment assumption for
1347 #define ADJUST_INSN_LENGTH(X,LENGTH) \
1348 if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \
1349 && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \
1350 && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \
1352 else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \
1355 /* Tell final.c how to eliminate redundant test instructions. */
1357 /* Here we define machine-dependent flags and fields in cc_status
1358 (see `conditions.h'). */
1360 /* Set if condition code (really not-Z) is stored in `test bit'. */
1361 #define CC_IN_TB 01000
1363 /* Set if condition code is set by an unsigned compare. */
1364 #define CC_UNSIGNED 02000
1366 /* Store in cc_status the expressions
1367 that the condition codes will describe
1368 after execution of an instruction whose pattern is EXP.
1369 Do not alter them if the instruction would not alter the cc's. */
1371 #define NOTICE_UPDATE_CC(BODY,INSN) \
1372 update_cc (BODY, INSN)
1374 /* Control the assembler format that we output. */
1376 /* Output at beginning of assembler file. */
1378 #define ASM_FILE_START(FILE) \
1379 { extern char *version_string; \
1382 fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \
1383 fprintf (FILE, "\t.globl .oVgcc"); \
1384 for (p = version_string; *p != ' ' && *p != 0; p++) \
1385 fprintf (FILE, "%c", *p); \
1386 fprintf (FILE, "\n\t.set .oVgcc"); \
1387 for (p = version_string; *p != ' ' && *p != 0; p++) \
1388 fprintf (FILE, "%c", *p); \
1389 fprintf (FILE, ",0\n"); \
1392 /* Output to assembler file text saying following lines
1393 may contain character constants, extra white space, comments, etc. */
1395 #define ASM_APP_ON ""
1397 /* Output to assembler file text saying following lines
1398 no longer contain unusual constructs. */
1400 #define ASM_APP_OFF ""
1402 /* Output before instructions and read-only data. */
1404 #define TEXT_SECTION_ASM_OP ".text"
1406 /* Output before writable data. */
1408 #define DATA_SECTION_ASM_OP ".data"
1410 /* How to refer to registers in assembler output.
1411 This sequence is indexed by compiler's hard-register-number (see above). */
1413 #define REGISTER_NAMES \
1414 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
1415 "r10", "r11", "r12", "r13", "r14", "r15", "ap", \
1416 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" }
1418 /* How to renumber registers for dbx and gdb. */
1420 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1422 /* This is how to output the definition of a user-level label named NAME,
1423 such as the label on a static function or variable NAME. */
1425 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1426 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1428 /* This is how to output a command to make the user-level label named NAME
1429 defined for reference from other files. */
1431 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1432 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1434 /* This is how to output a reference to a user-level label named NAME.
1435 `assemble_name' uses this. */
1437 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1438 fprintf (FILE, "_%s", NAME)
1440 /* This is how to output an internal numbered label where
1441 PREFIX is the class of label and NUM is the number within the class. */
1443 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1444 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1446 /* This is how to output a label for a jump table. Arguments are the same as
1447 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1450 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1451 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1453 /* This is how to store into the string LABEL
1454 the symbol_ref name of an internal numbered label where
1455 PREFIX is the class of label and NUM is the number within the class.
1456 This is suitable for output with `assemble_name'. */
1458 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1459 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1461 /* This is how to output an assembler line defining a `double' constant. */
1463 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1464 fprintf (FILE, "\t.double 0d%.20e\n", (VALUE))
1466 /* This is how to output an assembler line defining a `float' constant.
1468 WARNING: Believe it or not, the ROMP assembler has a bug in its
1469 handling of single-precision floating-point values making it impossible
1470 to output such values in the expected way. Therefore, it must be output
1471 in hex. THIS WILL NOT WORK IF CROSS-COMPILING FROM A MACHINE THAT DOES
1472 NOT USE IEEE-FORMAT FLOATING-POINT, but there is nothing that can be done
1473 about it short of fixing the assembler. */
1475 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1476 do { union { int i; float f; } u_i_f; \
1477 u_i_f.f = (VALUE); \
1478 fprintf (FILE, "\t.long 0x%x\n", u_i_f.i);\
1481 /* This is how to output an assembler line defining an `int' constant. */
1483 #define ASM_OUTPUT_INT(FILE,VALUE) \
1484 ( fprintf (FILE, "\t.long "), \
1485 output_addr_const (FILE, (VALUE)), \
1486 fprintf (FILE, "\n"))
1488 /* Likewise for `char' and `short' constants. */
1490 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1491 ( fprintf (FILE, "\t.short "), \
1492 output_addr_const (FILE, (VALUE)), \
1493 fprintf (FILE, "\n"))
1495 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1496 ( fprintf (FILE, "\t.byte "), \
1497 output_addr_const (FILE, (VALUE)), \
1498 fprintf (FILE, "\n"))
1500 /* This is how to output an assembler line for a numeric constant byte. */
1502 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1503 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1505 /* This is how to output code to push a register on the stack.
1506 It need not be very fast code. */
1508 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1509 fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO])
1511 /* This is how to output an insn to pop a register from the stack.
1512 It need not be very fast code. */
1514 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1515 fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO])
1517 /* This is how to output an element of a case-vector that is absolute. */
1519 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1520 fprintf (FILE, "\t.long L%d\n", VALUE)
1522 /* This is how to output an element of a case-vector that is relative.
1523 (ROMP does not use such vectors,
1524 but we must define this macro anyway.) */
1526 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1528 /* This is how to output an assembler line
1529 that says to advance the location counter
1530 to a multiple of 2**LOG bytes. */
1532 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1534 fprintf (FILE, "\t.align %d\n", (LOG))
1536 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1537 fprintf (FILE, "\t.space %d\n", (SIZE))
1539 /* This says how to output an assembler line
1540 to define a global common symbol. */
1542 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1543 ( fputs (".comm ", (FILE)), \
1544 assemble_name ((FILE), (NAME)), \
1545 fprintf ((FILE), ",%d\n", (SIZE)))
1547 /* This says how to output an assembler line
1548 to define a local common symbol. */
1550 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1551 ( fputs (".lcomm ", (FILE)), \
1552 assemble_name ((FILE), (NAME)), \
1553 fprintf ((FILE), ",%d\n", (SIZE)))
1555 /* Store in OUTPUT a string (made with alloca) containing
1556 an assembler-name for a local static variable named NAME.
1557 LABELNO is an integer which is different for each call. */
1559 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1560 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1561 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1563 /* Define the parentheses used to group arithmetic operations
1564 in assembler code. */
1566 #define ASM_OPEN_PAREN "("
1567 #define ASM_CLOSE_PAREN ")"
1569 /* Define results of standard character escape sequences. */
1570 #define TARGET_BELL 007
1571 #define TARGET_BS 010
1572 #define TARGET_TAB 011
1573 #define TARGET_NEWLINE 012
1574 #define TARGET_VT 013
1575 #define TARGET_FF 014
1576 #define TARGET_CR 015
1578 /* Print operand X (an rtx) in assembler syntax to file FILE.
1579 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1580 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1582 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1584 /* Define which CODE values are valid. */
1586 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1587 ((CODE) == '.' || (CODE) == '#')
1589 /* Print a memory address as an operand to reference that memory location. */
1591 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1592 { register rtx addr = ADDR; \
1593 register rtx base = 0, offset = addr; \
1594 if (GET_CODE (addr) == REG) \
1595 base = addr, offset = const0_rtx; \
1596 else if (GET_CODE (addr) == PLUS \
1597 && GET_CODE (XEXP (addr, 0)) == REG) \
1598 base = XEXP (addr, 0), offset = XEXP (addr, 1); \
1599 else if (GET_CODE (addr) == SYMBOL_REF \
1600 && CONSTANT_POOL_ADDRESS_P (addr)) \
1602 offset = gen_rtx (CONST_INT, VOIDmode, get_pool_offset (addr) + 12); \
1603 base = gen_rtx (REG, SImode, 14); \
1605 else if (GET_CODE (addr) == CONST \
1606 && GET_CODE (XEXP (addr, 0)) == PLUS \
1607 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \
1608 && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \
1609 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \
1611 offset = plus_constant (XEXP (XEXP (addr, 0), 1), \
1612 (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \
1614 base = gen_rtx (REG, SImode, 14); \
1616 output_addr_const (FILE, offset); \
1618 fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \
1621 /* Define the codes that are matched by predicates in aux-output.c. */
1623 #define PREDICATE_CODES \
1624 {"zero_memory_operand", {SUBREG, MEM}}, \
1625 {"short_memory_operand", {SUBREG, MEM}}, \
1626 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1627 {"current_function_operand", {MEM}}, \
1628 {"constant_pool_address_operand", {SUBREG, CONST}}, \
1629 {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \
1630 {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \
1631 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1632 {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \
1633 {"short_cint_operand", {CONST_INT}}, \
1634 {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \
1635 {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \
1636 PLUS, CONST, CONST_INT}}, \
1637 {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \
1638 {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \
1639 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1640 {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \
1641 SYMBOL_REF, CONST_DOUBLE}}, \
1642 {"reg_0_operand", {REG}}, \
1643 {"reg_15_operand", {REG}}, \
1644 {"float_binary", {PLUS, MINUS, MULT, DIV}}, \
1645 {"float_unary", {NEG, ABS}}, \
1646 {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}},
1648 /* Define functions defined in aux-output.c and used in templates. */
1650 extern char *output_in_line_mul ();
1651 extern char *output_fpop ();