1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
42 #ifndef TARGET_NO_PROTOTYPE
43 #define TARGET_NO_PROTOTYPE 0
46 extern char *language_string
;
47 extern int profile_block_flag
;
49 #define min(A,B) ((A) < (B) ? (A) : (B))
50 #define max(A,B) ((A) > (B) ? (A) : (B))
54 enum processor_type rs6000_cpu
;
55 struct rs6000_cpu_select rs6000_select
[3] =
57 /* switch name, tune arch */
58 { (char *)0, "--with-cpu=", 1, 1 },
59 { (char *)0, "-mcpu=", 1, 1 },
60 { (char *)0, "-mtune=", 1, 0 },
63 /* Set to non-zero by "fix" operation to indicate that itrunc and
64 uitrunc must be defined. */
66 int rs6000_trunc_used
;
68 /* Set to non-zero once they have been defined. */
70 static int trunc_defined
;
72 /* Set to non-zero once AIX common-mode calls have been defined. */
73 static int common_mode_defined
;
75 /* Save information from a "cmpxx" operation until the branch or scc is
77 rtx rs6000_compare_op0
, rs6000_compare_op1
;
78 int rs6000_compare_fp_p
;
81 /* Label number of label created for -mrelocatable, to call to so we can
82 get the address of the GOT section */
83 int rs6000_pic_labelno
;
84 int rs6000_pic_func_labelno
;
86 /* Which abi to adhere to */
87 char *rs6000_abi_name
= RS6000_ABI_NAME
;
89 /* Semantics of the small data area */
90 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
92 /* Which small data model to use */
93 char *rs6000_sdata_name
= (char *)0;
96 /* Whether a System V.4 varargs area was created. */
97 int rs6000_sysv_varargs_p
;
99 /* ABI enumeration available for subtarget to use. */
100 enum rs6000_abi rs6000_current_abi
;
102 /* Offset & size for fpmem stack locations used for converting between
103 float and integral types. */
104 int rs6000_fpmem_offset
;
105 int rs6000_fpmem_size
;
108 char *rs6000_debug_name
;
109 int rs6000_debug_stack
; /* debug stack applications */
110 int rs6000_debug_arg
; /* debug argument handling */
112 /* Flag to say the TOC is initialized */
116 /* Default register names. */
117 char rs6000_reg_names
[][8] =
119 "0", "1", "2", "3", "4", "5", "6", "7",
120 "8", "9", "10", "11", "12", "13", "14", "15",
121 "16", "17", "18", "19", "20", "21", "22", "23",
122 "24", "25", "26", "27", "28", "29", "30", "31",
123 "0", "1", "2", "3", "4", "5", "6", "7",
124 "8", "9", "10", "11", "12", "13", "14", "15",
125 "16", "17", "18", "19", "20", "21", "22", "23",
126 "24", "25", "26", "27", "28", "29", "30", "31",
127 "mq", "lr", "ctr","ap",
128 "0", "1", "2", "3", "4", "5", "6", "7",
132 #ifdef TARGET_REGNAMES
133 static char alt_reg_names
[][8] =
135 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
136 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
137 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
138 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
139 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
140 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
141 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
142 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
143 "mq", "lr", "ctr", "ap",
144 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
149 #ifndef MASK_STRICT_ALIGN
150 #define MASK_STRICT_ALIGN 0
153 /* Override command line options. Mostly we process the processor
154 type and sometimes adjust other TARGET_ options. */
157 rs6000_override_options (default_cpu
)
161 struct rs6000_cpu_select
*ptr
;
163 /* Simplify the entries below by making a mask for any POWER
164 variant and any PowerPC variant. */
166 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
167 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
168 | MASK_PPC_GFXOPT | MASK_POWERPC64)
169 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
173 char *name
; /* Canonical processor name. */
174 enum processor_type processor
; /* Processor type enum value. */
175 int target_enable
; /* Target flags to enable. */
176 int target_disable
; /* Target flags to disable. */
177 } processor_target_table
[]
178 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
179 POWER_MASKS
| POWERPC_MASKS
},
180 {"power", PROCESSOR_POWER
,
181 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
182 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
183 {"power2", PROCESSOR_POWER
,
184 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
185 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
186 {"powerpc", PROCESSOR_POWERPC
,
187 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
188 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
189 {"rios", PROCESSOR_RIOS1
,
190 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
191 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
192 {"rios1", PROCESSOR_RIOS1
,
193 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
194 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
195 {"rsc", PROCESSOR_PPC601
,
196 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
197 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
198 {"rsc1", PROCESSOR_PPC601
,
199 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
200 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
201 {"rios2", PROCESSOR_RIOS2
,
202 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
203 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
204 {"403", PROCESSOR_PPC403
,
205 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
206 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
207 {"505", PROCESSOR_MPCCORE
,
208 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
209 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
210 {"601", PROCESSOR_PPC601
,
211 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
212 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
213 {"602", PROCESSOR_PPC603
,
214 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
215 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
216 {"603", PROCESSOR_PPC603
,
217 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
218 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
219 {"603e", PROCESSOR_PPC603
,
220 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
221 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
222 {"604", PROCESSOR_PPC604
,
223 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
224 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
225 {"604e", PROCESSOR_PPC604
,
226 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
227 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
228 {"620", PROCESSOR_PPC620
,
229 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
230 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
231 {"801", PROCESSOR_MPCCORE
,
232 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
233 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
234 {"821", PROCESSOR_MPCCORE
,
235 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
236 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
237 {"823", PROCESSOR_MPCCORE
,
238 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
239 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
240 {"860", PROCESSOR_MPCCORE
,
241 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
242 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
244 int ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
246 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
247 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
249 profile_block_flag
= 0;
251 /* Identify the processor type */
252 rs6000_select
[0].string
= default_cpu
;
253 rs6000_cpu
= PROCESSOR_DEFAULT
;
255 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
257 ptr
= &rs6000_select
[i
];
258 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
260 for (j
= 0; j
< ptt_size
; j
++)
261 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
264 rs6000_cpu
= processor_target_table
[j
].processor
;
268 target_flags
|= processor_target_table
[j
].target_enable
;
269 target_flags
&= ~processor_target_table
[j
].target_disable
;
275 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
279 /* If -mmultiple or -mno-multiple was explicitly used, don't
280 override with the processor default */
281 if (TARGET_MULTIPLE_SET
)
282 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
284 /* If -mstring or -mno-string was explicitly used, don't
285 override with the processor default */
286 if (TARGET_STRING_SET
)
287 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
289 /* Don't allow -mmultiple or -mstring on little endian systems, because the
290 hardware doesn't support the instructions used in little endian mode */
291 if (!BYTES_BIG_ENDIAN
)
295 target_flags
&= ~MASK_MULTIPLE
;
296 if (TARGET_MULTIPLE_SET
)
297 warning ("-mmultiple is not supported on little endian systems");
302 target_flags
&= ~MASK_STRING
;
303 if (TARGET_STRING_SET
)
304 warning ("-mstring is not supported on little endian systems");
308 /* Set debug flags */
309 if (rs6000_debug_name
)
311 if (!strcmp (rs6000_debug_name
, "all"))
312 rs6000_debug_stack
= rs6000_debug_arg
= 1;
313 else if (!strcmp (rs6000_debug_name
, "stack"))
314 rs6000_debug_stack
= 1;
315 else if (!strcmp (rs6000_debug_name
, "arg"))
316 rs6000_debug_arg
= 1;
318 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
321 #ifdef TARGET_REGNAMES
322 /* If the user desires alternate register names, copy in the alternate names
325 bcopy ((char *)alt_reg_names
, (char *)rs6000_reg_names
, sizeof (rs6000_reg_names
));
328 #ifdef SUBTARGET_OVERRIDE_OPTIONS
329 SUBTARGET_OVERRIDE_OPTIONS
;
333 /* Do anything needed at the start of the asm file. */
336 rs6000_file_start (file
, default_cpu
)
342 char *start
= buffer
;
343 struct rs6000_cpu_select
*ptr
;
345 if (flag_verbose_asm
)
347 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
348 rs6000_select
[0].string
= default_cpu
;
350 for (i
= 0; i
< sizeof (rs6000_select
) / sizeof (rs6000_select
[0]); i
++)
352 ptr
= &rs6000_select
[i
];
353 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
355 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
361 switch (rs6000_sdata
)
363 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
364 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
365 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
366 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
369 if (rs6000_sdata
&& g_switch_value
)
371 fprintf (file
, "%s -G %d", start
, g_switch_value
);
382 /* Create a CONST_DOUBLE from a string. */
385 rs6000_float_const (string
, mode
)
387 enum machine_mode mode
;
389 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
390 return immed_real_const_1 (value
, mode
);
394 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
395 two parts of the constant if the target is little endian. */
398 rs6000_immed_double_const (i0
, i1
, mode
)
399 HOST_WIDE_INT i0
, i1
;
400 enum machine_mode mode
;
402 if (! WORDS_BIG_ENDIAN
)
403 return immed_double_const (i1
, i0
, mode
);
405 return immed_double_const (i0
, i1
, mode
);
409 /* Return non-zero if this function is known to have a null epilogue. */
414 if (reload_completed
)
416 rs6000_stack_t
*info
= rs6000_stack_info ();
418 if (info
->first_gp_reg_save
== 32
419 && info
->first_fp_reg_save
== 64
429 /* Returns 1 always. */
432 any_operand (op
, mode
)
434 enum machine_mode mode
;
439 /* Returns 1 if op is the count register */
441 count_register_operand(op
, mode
)
443 enum machine_mode mode
;
445 if (GET_CODE (op
) != REG
)
448 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
451 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
457 /* Returns 1 if op is memory location for float/int conversions that masquerades
460 fpmem_operand(op
, mode
)
462 enum machine_mode mode
;
464 if (GET_CODE (op
) != REG
)
467 if (FPMEM_REGNO_P (REGNO (op
)))
471 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
478 /* Return 1 if OP is a constant that can fit in a D field. */
481 short_cint_operand (op
, mode
)
483 enum machine_mode mode
;
485 return (GET_CODE (op
) == CONST_INT
486 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) < 0x10000);
489 /* Similar for a unsigned D field. */
492 u_short_cint_operand (op
, mode
)
494 enum machine_mode mode
;
496 return (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff0000) == 0);
499 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
502 non_short_cint_operand (op
, mode
)
504 enum machine_mode mode
;
506 return (GET_CODE (op
) == CONST_INT
507 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
510 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
514 gpc_reg_operand (op
, mode
)
516 enum machine_mode mode
;
518 return (register_operand (op
, mode
)
519 && (GET_CODE (op
) != REG
520 || (REGNO (op
) >= 67 && !FPMEM_REGNO_P (REGNO (op
)))
521 || REGNO (op
) < 64));
524 /* Returns 1 if OP is either a pseudo-register or a register denoting a
528 cc_reg_operand (op
, mode
)
530 enum machine_mode mode
;
532 return (register_operand (op
, mode
)
533 && (GET_CODE (op
) != REG
534 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
535 || CR_REGNO_P (REGNO (op
))));
538 /* Returns 1 if OP is either a constant integer valid for a D-field or a
539 non-special register. If a register, it must be in the proper mode unless
543 reg_or_short_operand (op
, mode
)
545 enum machine_mode mode
;
547 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
550 /* Similar, except check if the negation of the constant would be valid for
554 reg_or_neg_short_operand (op
, mode
)
556 enum machine_mode mode
;
558 if (GET_CODE (op
) == CONST_INT
)
559 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
561 return gpc_reg_operand (op
, mode
);
564 /* Return 1 if the operand is either a register or an integer whose high-order
568 reg_or_u_short_operand (op
, mode
)
570 enum machine_mode mode
;
572 if (GET_CODE (op
) == CONST_INT
573 && (INTVAL (op
) & 0xffff0000) == 0)
576 return gpc_reg_operand (op
, mode
);
579 /* Return 1 is the operand is either a non-special register or ANY
583 reg_or_cint_operand (op
, mode
)
585 enum machine_mode mode
;
587 return GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
);
590 /* Return 1 if the operand is an operand that can be loaded via the GOT */
593 got_operand (op
, mode
)
595 enum machine_mode mode
;
597 return (GET_CODE (op
) == SYMBOL_REF
598 || GET_CODE (op
) == CONST
599 || GET_CODE (op
) == LABEL_REF
);
602 /* Return 1 if the operand is a simple references that can be loaded via
603 the GOT (labels involving addition aren't allowed). */
606 got_no_const_operand (op
, mode
)
608 enum machine_mode mode
;
610 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
613 /* Return the number of instructions it takes to form a constant in an
617 num_insns_constant_wide (value
)
620 /* signed constant loadable with {cal|addi} */
621 if (((unsigned HOST_WIDE_INT
)value
+ 0x8000) < 0x10000)
624 #if HOST_BITS_PER_WIDE_INT == 32
625 /* constant loadable with {cau|addis} */
626 else if ((value
& 0xffff) == 0)
630 /* constant loadable with {cau|addis} */
631 else if ((value
& 0xffff) == 0 && (value
& ~0xffffffff) == 0)
634 else if (TARGET_64BIT
)
636 HOST_WIDE_INT low
= value
& 0xffffffff;
637 HOST_WIDE_INT high
= value
>> 32;
639 if (high
== 0 && (low
& 0x80000000) == 0)
642 else if (high
== 0xffffffff && (low
& 0x80000000) != 0)
646 return num_insns_constant_wide (high
) + 1;
649 return (num_insns_constant_wide (high
)
650 + num_insns_constant_wide (low
) + 1);
659 num_insns_constant (op
, mode
)
661 enum machine_mode mode
;
663 if (GET_CODE (op
) == CONST_INT
)
664 return num_insns_constant_wide (INTVAL (op
));
666 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
671 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
672 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
673 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
676 else if (GET_CODE (op
) == CONST_DOUBLE
)
682 int endian
= (WORDS_BIG_ENDIAN
== 0);
684 if (mode
== VOIDmode
|| mode
== DImode
)
686 high
= CONST_DOUBLE_HIGH (op
);
687 low
= CONST_DOUBLE_LOW (op
);
691 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
692 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
698 return (num_insns_constant_wide (low
)
699 + num_insns_constant_wide (high
));
703 if (high
== 0 && (low
& 0x80000000) == 0)
704 return num_insns_constant_wide (low
);
706 else if (((high
& 0xffffffff) == 0xffffffff)
707 && ((low
& 0x80000000) != 0))
708 return num_insns_constant_wide (low
);
711 return num_insns_constant_wide (high
) + 1;
714 return (num_insns_constant_wide (high
)
715 + num_insns_constant_wide (low
) + 1);
723 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
724 with one instruction per word. We only do this if we can safely read
725 CONST_DOUBLE_{LOW,HIGH}. */
728 easy_fp_constant (op
, mode
)
730 register enum machine_mode mode
;
732 if (GET_CODE (op
) != CONST_DOUBLE
733 || GET_MODE (op
) != mode
734 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
737 /* Consider all constants with -msoft-float to be easy */
738 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
741 /* If we are using V.4 style PIC, consider all constants to be hard */
742 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
745 #ifdef TARGET_RELOCATABLE
746 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
747 if (TARGET_RELOCATABLE
)
756 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
757 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
759 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
760 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
763 else if (mode
== SFmode
)
768 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
769 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
771 return num_insns_constant_wide (l
) == 1;
774 else if (mode
== DImode
&& TARGET_32BIT
)
775 return num_insns_constant (op
, DImode
) == 2;
781 /* Return 1 if the operand is in volatile memory. Note that during the
782 RTL generation phase, memory_operand does not return TRUE for
783 volatile memory references. So this function allows us to
784 recognize volatile references where its safe. */
787 volatile_mem_operand (op
, mode
)
789 enum machine_mode mode
;
791 if (GET_CODE (op
) != MEM
)
794 if (!MEM_VOLATILE_P (op
))
797 if (mode
!= GET_MODE (op
))
800 if (reload_completed
)
801 return memory_operand (op
, mode
);
803 if (reload_in_progress
)
804 return strict_memory_address_p (mode
, XEXP (op
, 0));
806 return memory_address_p (mode
, XEXP (op
, 0));
809 /* Return 1 if the operand is an offsettable memory address. */
812 offsettable_addr_operand (op
, mode
)
814 enum machine_mode mode
;
816 return offsettable_address_p (reload_completed
| reload_in_progress
,
820 /* Return 1 if the operand is either an easy FP constant (see above) or
824 mem_or_easy_const_operand (op
, mode
)
826 enum machine_mode mode
;
828 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
831 /* Return 1 if the operand is either a non-special register or an item
832 that can be used as the operand of an SI add insn. */
835 add_operand (op
, mode
)
837 enum machine_mode mode
;
839 return (reg_or_short_operand (op
, mode
)
840 || (GET_CODE (op
) == CONST_INT
&& (INTVAL (op
) & 0xffff) == 0));
843 /* Return 1 if OP is a constant but not a valid add_operand. */
846 non_add_cint_operand (op
, mode
)
848 enum machine_mode mode
;
850 return (GET_CODE (op
) == CONST_INT
851 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
852 && (INTVAL (op
) & 0xffff) != 0);
855 /* Return 1 if the operand is a non-special register or a constant that
856 can be used as the operand of an OR or XOR insn on the RS/6000. */
859 logical_operand (op
, mode
)
861 enum machine_mode mode
;
863 return (gpc_reg_operand (op
, mode
)
864 || (GET_CODE (op
) == CONST_INT
865 && ((INTVAL (op
) & 0xffff0000) == 0
866 || (INTVAL (op
) & 0xffff) == 0)));
869 /* Return 1 if C is a constant that is not a logical operand (as
873 non_logical_cint_operand (op
, mode
)
875 enum machine_mode mode
;
877 return (GET_CODE (op
) == CONST_INT
878 && (INTVAL (op
) & 0xffff0000) != 0
879 && (INTVAL (op
) & 0xffff) != 0);
882 /* Return 1 if C is a constant that can be encoded in a mask on the
883 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
884 Reject all ones and all zeros, since these should have been optimized
885 away and confuse the making of MB and ME. */
895 if (c
== 0 || c
== ~0)
898 last_bit_value
= c
& 1;
900 for (i
= 1; i
< 32; i
++)
901 if (((c
>>= 1) & 1) != last_bit_value
)
902 last_bit_value
^= 1, transitions
++;
904 return transitions
<= 2;
907 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
910 mask_operand (op
, mode
)
912 enum machine_mode mode
;
914 return GET_CODE (op
) == CONST_INT
&& mask_constant (INTVAL (op
));
917 /* Return 1 if the operand is either a non-special register or a
918 constant that can be used as the operand of an RS/6000 logical AND insn. */
921 and_operand (op
, mode
)
923 enum machine_mode mode
;
925 return (logical_operand (op
, mode
)
926 || mask_operand (op
, mode
));
929 /* Return 1 if the operand is a constant but not a valid operand for an AND
933 non_and_cint_operand (op
, mode
)
935 enum machine_mode mode
;
937 return GET_CODE (op
) == CONST_INT
&& ! and_operand (op
, mode
);
940 /* Return 1 if the operand is a general register or memory operand. */
943 reg_or_mem_operand (op
, mode
)
945 register enum machine_mode mode
;
947 return (gpc_reg_operand (op
, mode
)
948 || memory_operand (op
, mode
)
949 || volatile_mem_operand (op
, mode
));
952 /* Return 1 if the operand is a general register or memory operand without
953 pre-inc or pre_dec which produces invalid form of PowerPC lwa
957 lwa_operand (op
, mode
)
959 register enum machine_mode mode
;
963 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
964 inner
= SUBREG_REG (inner
);
966 return gpc_reg_operand (inner
, mode
)
967 || (memory_operand (inner
, mode
)
968 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
969 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
972 /* Return 1 if the operand, used inside a MEM, is a valid first argument
973 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
977 call_operand (op
, mode
)
979 enum machine_mode mode
;
981 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
984 return (GET_CODE (op
) == SYMBOL_REF
985 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
989 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
993 current_file_function_operand (op
, mode
)
995 enum machine_mode mode
;
997 return (GET_CODE (op
) == SYMBOL_REF
998 && (SYMBOL_REF_FLAG (op
)
999 || op
== XEXP (DECL_RTL (current_function_decl
), 0)));
1003 /* Return 1 if this operand is a valid input for a move insn. */
1006 input_operand (op
, mode
)
1008 enum machine_mode mode
;
1010 /* Memory is always valid. */
1011 if (memory_operand (op
, mode
))
1014 /* For floating-point, easy constants are valid. */
1015 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1017 && easy_fp_constant (op
, mode
))
1020 /* Allow any integer constant. */
1021 if (GET_MODE_CLASS (mode
) == MODE_INT
1022 && (GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
))
1025 /* For floating-point or multi-word mode, the only remaining valid type
1027 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1028 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1029 return register_operand (op
, mode
);
1031 /* The only cases left are integral modes one word or smaller (we
1032 do not get called for MODE_CC values). These can be in any
1034 if (register_operand (op
, mode
))
1037 /* A SYMBOL_REF referring to the TOC is valid. */
1038 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1041 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
1042 directly in the instruction stream */
1043 if (DEFAULT_ABI
== ABI_NT
1044 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
))
1047 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1049 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1050 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1051 && small_data_operand (op
, Pmode
))
1057 /* Return 1 for an operand in small memory on V.4/eabi */
1060 small_data_operand (op
, mode
)
1062 enum machine_mode mode
;
1065 rtx sym_ref
, const_part
;
1067 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1070 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1073 if (GET_CODE (op
) == SYMBOL_REF
)
1076 else if (GET_CODE (op
) != CONST
1077 || GET_CODE (XEXP (op
, 0)) != PLUS
1078 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1079 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1083 sym_ref
= XEXP (XEXP (op
, 0), 0);
1085 if (*XSTR (sym_ref
, 0) != '@')
1096 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1097 for a call to a function whose data type is FNTYPE.
1098 For a library call, FNTYPE is 0.
1100 For incoming args we set the number of arguments in the prototype large
1101 so we never return a PARALLEL. */
1104 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1105 CUMULATIVE_ARGS
*cum
;
1110 static CUMULATIVE_ARGS zero_cumulative
;
1111 enum rs6000_abi abi
= DEFAULT_ABI
;
1113 *cum
= zero_cumulative
;
1115 cum
->fregno
= FP_ARG_MIN_REG
;
1116 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1117 cum
->call_cookie
= CALL_NORMAL
;
1121 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1122 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1123 cum
->varargs_offset
= RS6000_VARARGS_OFFSET
;
1126 else if (cum
->prototype
)
1127 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1128 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1129 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1132 cum
->nargs_prototype
= 0;
1134 cum
->orig_nargs
= cum
->nargs_prototype
;
1136 /* Check for DLL import functions */
1139 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype
)))
1140 cum
->call_cookie
= CALL_NT_DLLIMPORT
;
1142 /* Also check for longcall's */
1143 else if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1144 cum
->call_cookie
= CALL_LONG
;
1146 if (TARGET_DEBUG_ARG
)
1148 fprintf (stderr
, "\ninit_cumulative_args:");
1151 tree ret_type
= TREE_TYPE (fntype
);
1152 fprintf (stderr
, " ret code = %s,",
1153 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1156 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
) && incoming
)
1157 fprintf (stderr
, " varargs = %d, ", cum
->varargs_offset
);
1159 if (cum
->call_cookie
& CALL_NT_DLLIMPORT
)
1160 fprintf (stderr
, " dllimport,");
1162 if (cum
->call_cookie
& CALL_LONG
)
1163 fprintf (stderr
, " longcall,");
1165 fprintf (stderr
, " proto = %d, nargs = %d\n",
1166 cum
->prototype
, cum
->nargs_prototype
);
1170 /* If defined, a C expression that gives the alignment boundary, in bits,
1171 of an argument with the specified mode and type. If it is not defined,
1172 PARM_BOUNDARY is used for all arguments.
1174 Windows NT wants anything >= 8 bytes to be double word aligned.
1176 V.4 wants long longs to be double word aligned. */
1179 function_arg_boundary (mode
, type
)
1180 enum machine_mode mode
;
1183 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && mode
== DImode
)
1186 if (DEFAULT_ABI
!= ABI_NT
|| TARGET_64BIT
)
1187 return PARM_BOUNDARY
;
1189 if (mode
!= BLKmode
)
1190 return (GET_MODE_SIZE (mode
)) >= 8 ? 64 : 32;
1192 return (int_size_in_bytes (type
) >= 8) ? 64 : 32;
1195 /* Update the data in CUM to advance over an argument
1196 of mode MODE and data type TYPE.
1197 (TYPE is null for libcalls where that information may not be available.) */
1200 function_arg_advance (cum
, mode
, type
, named
)
1201 CUMULATIVE_ARGS
*cum
;
1202 enum machine_mode mode
;
1206 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1207 cum
->words
+= align
;
1208 cum
->nargs_prototype
--;
1210 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1212 /* Long longs must not be split between registers and stack */
1213 if ((GET_MODE_CLASS (mode
) != MODE_FLOAT
|| TARGET_SOFT_FLOAT
)
1214 && type
&& !AGGREGATE_TYPE_P (type
)
1215 && cum
->words
< GP_ARG_NUM_REG
1216 && cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
)
1218 cum
->words
= GP_ARG_NUM_REG
;
1221 /* Aggregates get passed as pointers */
1222 if (type
&& AGGREGATE_TYPE_P (type
))
1225 /* Floats go in registers, & don't occupy space in the GP registers
1226 like they do for AIX unless software floating point. */
1227 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1228 && TARGET_HARD_FLOAT
1229 && cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1233 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1238 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1239 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1243 if (TARGET_DEBUG_ARG
)
1245 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1246 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1249 /* Determine where to put an argument to a function.
1250 Value is zero to push the argument on the stack,
1251 or a hard register in which to store the argument.
1253 MODE is the argument's machine mode.
1254 TYPE is the data type of the argument (as a tree).
1255 This is null for libcalls where that information may
1257 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1258 the preceding args and about the function being called.
1259 NAMED is nonzero if this argument is a named parameter
1260 (otherwise it is an extra parameter matching an ellipsis).
1262 On RS/6000 the first eight words of non-FP are normally in registers
1263 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1264 Under V.4, the first 8 FP args are in registers.
1266 If this is floating-point and no prototype is specified, we use
1267 both an FP and integer register (or possibly FP reg and stack). Library
1268 functions (when TYPE is zero) always have the proper types for args,
1269 so we can pass the FP value just in one register. emit_library_function
1270 doesn't support PARALLEL anyway. */
1273 function_arg (cum
, mode
, type
, named
)
1274 CUMULATIVE_ARGS
*cum
;
1275 enum machine_mode mode
;
1279 int align
= ((cum
->words
& 1) != 0 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1280 int align_words
= cum
->words
+ align
;
1282 if (TARGET_DEBUG_ARG
)
1284 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1285 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), named
, align
);
1287 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1288 uses to say fp args were passed in registers. Assume that we don't need the
1289 marker for software floating point, or compiler generated library calls. */
1290 if (mode
== VOIDmode
)
1292 enum rs6000_abi abi
= DEFAULT_ABI
;
1294 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
1295 && TARGET_HARD_FLOAT
1296 && cum
->nargs_prototype
< 0
1297 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
1299 return GEN_INT (cum
->call_cookie
1300 | ((cum
->fregno
== FP_ARG_MIN_REG
)
1301 ? CALL_V4_SET_FP_ARGS
1302 : CALL_V4_CLEAR_FP_ARGS
));
1305 return GEN_INT (cum
->call_cookie
);
1310 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1314 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
1317 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1319 if (DEFAULT_ABI
== ABI_V4
/* V.4 never passes FP values in GP registers */
1320 || DEFAULT_ABI
== ABI_SOLARIS
1322 || ((cum
->nargs_prototype
> 0)
1323 /* IBM AIX extended its linkage convention definition always to
1324 require FP args after register save area hole on the stack. */
1325 && (DEFAULT_ABI
!= ABI_AIX
1327 || (align_words
< GP_ARG_NUM_REG
))))
1328 return gen_rtx (REG
, mode
, cum
->fregno
);
1330 return gen_rtx (PARALLEL
, mode
,
1333 gen_rtx (EXPR_LIST
, VOIDmode
,
1334 ((align_words
>= GP_ARG_NUM_REG
)
1337 + RS6000_ARG_SIZE (mode
, type
, named
)
1339 /* If this is partially on the stack, then
1340 we only include the portion actually
1341 in registers here. */
1342 ? gen_rtx (REG
, SImode
,
1343 GP_ARG_MIN_REG
+ align_words
)
1344 : gen_rtx (REG
, mode
,
1345 GP_ARG_MIN_REG
+ align_words
))),
1347 gen_rtx (EXPR_LIST
, VOIDmode
,
1348 gen_rtx (REG
, mode
, cum
->fregno
),
1352 /* Long longs won't be split between register and stack;
1353 FP arguments get passed on the stack if they didn't get a register. */
1354 else if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) &&
1355 (align_words
+ RS6000_ARG_SIZE (mode
, type
, named
) > GP_ARG_NUM_REG
1356 || (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)))
1361 else if (align_words
< GP_ARG_NUM_REG
)
1362 return gen_rtx (REG
, mode
, GP_ARG_MIN_REG
+ align_words
);
1367 /* For an arg passed partly in registers and partly in memory,
1368 this is the number of registers used.
1369 For args passed entirely in registers or entirely in memory, zero. */
1372 function_arg_partial_nregs (cum
, mode
, type
, named
)
1373 CUMULATIVE_ARGS
*cum
;
1374 enum machine_mode mode
;
1381 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1384 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
1386 if (cum
->nargs_prototype
>= 0)
1390 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1393 if (cum
->words
< GP_ARG_NUM_REG
1394 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
1396 int ret
= GP_ARG_NUM_REG
- cum
->words
;
1397 if (ret
&& TARGET_DEBUG_ARG
)
1398 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
1406 /* A C expression that indicates when an argument must be passed by
1407 reference. If nonzero for an argument, a copy of that argument is
1408 made in memory and a pointer to the argument is passed instead of
1409 the argument itself. The pointer is passed in whatever way is
1410 appropriate for passing a pointer to that type.
1412 Under V.4, structures and unions are passed by reference. */
1415 function_arg_pass_by_reference (cum
, mode
, type
, named
)
1416 CUMULATIVE_ARGS
*cum
;
1417 enum machine_mode mode
;
1421 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1422 && type
&& AGGREGATE_TYPE_P (type
))
1424 if (TARGET_DEBUG_ARG
)
1425 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
1434 /* Perform any needed actions needed for a function that is receiving a
1435 variable number of arguments.
1439 MODE and TYPE are the mode and type of the current parameter.
1441 PRETEND_SIZE is a variable that should be set to the amount of stack
1442 that must be pushed by the prolog to pretend that our caller pushed
1445 Normally, this macro will push all remaining incoming registers on the
1446 stack and set PRETEND_SIZE to the length of the registers pushed. */
1449 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
1450 CUMULATIVE_ARGS
*cum
;
1451 enum machine_mode mode
;
1457 rtx save_area
= virtual_incoming_args_rtx
;
1458 int reg_size
= (TARGET_64BIT
) ? 8 : 4;
1460 if (TARGET_DEBUG_ARG
)
1462 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1463 cum
->words
, cum
->fregno
, cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
), no_rtl
);
1465 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && !no_rtl
)
1467 rs6000_sysv_varargs_p
= 1;
1468 save_area
= plus_constant (frame_pointer_rtx
, RS6000_VARARGS_OFFSET
);
1473 int first_reg_offset
= cum
->words
;
1475 if (MUST_PASS_IN_STACK (mode
, type
))
1476 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
1478 if (first_reg_offset
> GP_ARG_NUM_REG
)
1479 first_reg_offset
= GP_ARG_NUM_REG
;
1481 if (!no_rtl
&& first_reg_offset
!= GP_ARG_NUM_REG
)
1483 (GP_ARG_MIN_REG
+ first_reg_offset
,
1484 gen_rtx (MEM
, BLKmode
,
1485 plus_constant (save_area
, first_reg_offset
* reg_size
)),
1486 GP_ARG_NUM_REG
- first_reg_offset
,
1487 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
1489 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
1492 /* Save FP registers if needed. */
1493 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
) && TARGET_HARD_FLOAT
&& !no_rtl
)
1495 int fregno
= cum
->fregno
;
1496 int num_fp_reg
= FP_ARG_V4_MAX_REG
+ 1 - fregno
;
1498 if (num_fp_reg
>= 0)
1500 rtx cr1
= gen_rtx (REG
, CCmode
, 69);
1501 rtx lab
= gen_label_rtx ();
1502 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
1504 emit_jump_insn (gen_rtx (SET
, VOIDmode
,
1506 gen_rtx (IF_THEN_ELSE
, VOIDmode
,
1507 gen_rtx (NE
, VOIDmode
, cr1
, const0_rtx
),
1508 gen_rtx (LABEL_REF
, VOIDmode
, lab
),
1511 while ( num_fp_reg
-- >= 0)
1513 emit_move_insn (gen_rtx (MEM
, DFmode
, plus_constant (save_area
, off
)),
1514 gen_rtx (REG
, DFmode
, fregno
++));
1523 /* If defined, is a C expression that produces the machine-specific
1524 code for a call to `__builtin_saveregs'. This code will be moved
1525 to the very beginning of the function, before any parameter access
1526 are made. The return value of this function should be an RTX that
1527 contains the value to use as the return of `__builtin_saveregs'.
1529 The argument ARGS is a `tree_list' containing the arguments that
1530 were passed to `__builtin_saveregs'.
1532 If this macro is not defined, the compiler will output an ordinary
1533 call to the library function `__builtin_saveregs'.
1535 On the Power/PowerPC return the address of the area on the stack
1536 used to hold arguments. Under AIX, this includes the 8 word register
1537 save area. Under V.4 this does not. */
1540 expand_builtin_saveregs (args
)
1543 return virtual_incoming_args_rtx
;
1547 /* Generate a memory reference for expand_block_move, copying volatile,
1548 and other bits from an original memory reference. */
1551 expand_block_move_mem (mode
, addr
, orig_mem
)
1552 enum machine_mode mode
;
1556 rtx mem
= gen_rtx (MEM
, mode
, addr
);
1558 RTX_UNCHANGING_P (mem
) = RTX_UNCHANGING_P (orig_mem
);
1559 MEM_VOLATILE_P (mem
) = MEM_VOLATILE_P (orig_mem
);
1560 MEM_IN_STRUCT_P (mem
) = MEM_IN_STRUCT_P (orig_mem
);
1561 #ifdef MEM_UNALIGNED_P
1562 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
1567 /* Expand a block move operation, and return 1 if successful. Return 0
1568 if we should let the compiler generate normal code.
1570 operands[0] is the destination
1571 operands[1] is the source
1572 operands[2] is the length
1573 operands[3] is the alignment */
1575 #define MAX_MOVE_REG 4
1578 expand_block_move (operands
)
1581 rtx orig_dest
= operands
[0];
1582 rtx orig_src
= operands
[1];
1583 rtx bytes_rtx
= operands
[2];
1584 rtx align_rtx
= operands
[3];
1585 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
1586 int align
= XINT (align_rtx
, 0);
1596 rtx stores
[MAX_MOVE_REG
];
1599 /* If this is not a fixed size move, just call memcpy */
1603 /* Anything to move? */
1604 bytes
= INTVAL (bytes_rtx
);
1608 /* Don't support real large moves. If string instructions are not used,
1609 then don't generate more than 8 loads. */
1615 else if (!STRICT_ALIGNMENT
)
1620 else if (bytes
> 8*align
)
1623 /* Move the address into scratch registers. */
1624 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
1625 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
1627 if (TARGET_STRING
) /* string instructions are available */
1629 for ( ; bytes
> 0; bytes
-= move_bytes
)
1631 if (bytes
> 24 /* move up to 32 bytes at a time */
1641 move_bytes
= (bytes
> 32) ? 32 : bytes
;
1642 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1643 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1644 GEN_INT ((move_bytes
== 32) ? 0 : move_bytes
),
1647 else if (bytes
> 16 /* move up to 24 bytes at a time */
1655 move_bytes
= (bytes
> 24) ? 24 : bytes
;
1656 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1657 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1658 GEN_INT (move_bytes
),
1661 else if (bytes
> 8 /* move up to 16 bytes at a time */
1667 move_bytes
= (bytes
> 16) ? 16 : bytes
;
1668 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1669 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1670 GEN_INT (move_bytes
),
1673 else if (bytes
> 4 && !TARGET_64BIT
)
1674 { /* move up to 8 bytes at a time */
1675 move_bytes
= (bytes
> 8) ? 8 : bytes
;
1676 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1677 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1678 GEN_INT (move_bytes
),
1681 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1682 { /* move 4 bytes */
1684 tmp_reg
= gen_reg_rtx (SImode
);
1685 emit_move_insn (tmp_reg
, expand_block_move_mem (SImode
, src_reg
, orig_src
));
1686 emit_move_insn (expand_block_move_mem (SImode
, dest_reg
, orig_dest
), tmp_reg
);
1688 else if (bytes
== 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1689 { /* move 2 bytes */
1691 tmp_reg
= gen_reg_rtx (HImode
);
1692 emit_move_insn (tmp_reg
, expand_block_move_mem (HImode
, src_reg
, orig_src
));
1693 emit_move_insn (expand_block_move_mem (HImode
, dest_reg
, orig_dest
), tmp_reg
);
1695 else if (bytes
== 1) /* move 1 byte */
1698 tmp_reg
= gen_reg_rtx (QImode
);
1699 emit_move_insn (tmp_reg
, expand_block_move_mem (QImode
, src_reg
, orig_src
));
1700 emit_move_insn (expand_block_move_mem (QImode
, dest_reg
, orig_dest
), tmp_reg
);
1703 { /* move up to 4 bytes at a time */
1704 move_bytes
= (bytes
> 4) ? 4 : bytes
;
1705 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
, dest_reg
, orig_dest
),
1706 expand_block_move_mem (BLKmode
, src_reg
, orig_src
),
1707 GEN_INT (move_bytes
),
1711 if (bytes
> move_bytes
)
1713 emit_insn (gen_addsi3 (src_reg
, src_reg
, GEN_INT (move_bytes
)));
1714 emit_insn (gen_addsi3 (dest_reg
, dest_reg
, GEN_INT (move_bytes
)));
1719 else /* string instructions not available */
1721 num_reg
= offset
= 0;
1722 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
1724 /* Calculate the correct offset for src/dest */
1728 dest_addr
= dest_reg
;
1732 src_addr
= gen_rtx (PLUS
, Pmode
, src_reg
, GEN_INT (offset
));
1733 dest_addr
= gen_rtx (PLUS
, Pmode
, dest_reg
, GEN_INT (offset
));
1736 /* Generate the appropriate load and store, saving the stores for later */
1737 if (bytes
>= 8 && TARGET_64BIT
&& (align
>= 8 || !STRICT_ALIGNMENT
))
1740 tmp_reg
= gen_reg_rtx (DImode
);
1741 emit_insn (gen_movdi (tmp_reg
, expand_block_move_mem (DImode
, src_addr
, orig_src
)));
1742 stores
[ num_reg
++ ] = gen_movdi (expand_block_move_mem (DImode
, dest_addr
, orig_dest
), tmp_reg
);
1744 else if (bytes
>= 4 && (align
>= 4 || !STRICT_ALIGNMENT
))
1747 tmp_reg
= gen_reg_rtx (SImode
);
1748 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (SImode
, src_addr
, orig_src
)));
1749 stores
[ num_reg
++ ] = gen_movsi (expand_block_move_mem (SImode
, dest_addr
, orig_dest
), tmp_reg
);
1751 else if (bytes
>= 2 && (align
>= 2 || !STRICT_ALIGNMENT
))
1754 tmp_reg
= gen_reg_rtx (HImode
);
1755 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (HImode
, src_addr
, orig_src
)));
1756 stores
[ num_reg
++ ] = gen_movhi (expand_block_move_mem (HImode
, dest_addr
, orig_dest
), tmp_reg
);
1761 tmp_reg
= gen_reg_rtx (QImode
);
1762 emit_insn (gen_movsi (tmp_reg
, expand_block_move_mem (QImode
, src_addr
, orig_src
)));
1763 stores
[ num_reg
++ ] = gen_movqi (expand_block_move_mem (QImode
, dest_addr
, orig_dest
), tmp_reg
);
1766 if (num_reg
>= MAX_MOVE_REG
)
1768 for (i
= 0; i
< num_reg
; i
++)
1769 emit_insn (stores
[i
]);
1774 for (i
= 0; i
< num_reg
; i
++)
1775 emit_insn (stores
[i
]);
1782 /* Return 1 if OP is a load multiple operation. It is known to be a
1783 PARALLEL and the first section will be tested. */
1786 load_multiple_operation (op
, mode
)
1788 enum machine_mode mode
;
1790 int count
= XVECLEN (op
, 0);
1795 /* Perform a quick check so we don't blow up below. */
1797 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1798 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
1799 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
1802 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
1803 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
1805 for (i
= 1; i
< count
; i
++)
1807 rtx elt
= XVECEXP (op
, 0, i
);
1809 if (GET_CODE (elt
) != SET
1810 || GET_CODE (SET_DEST (elt
)) != REG
1811 || GET_MODE (SET_DEST (elt
)) != SImode
1812 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
1813 || GET_CODE (SET_SRC (elt
)) != MEM
1814 || GET_MODE (SET_SRC (elt
)) != SImode
1815 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
1816 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
1817 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
1818 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
1825 /* Similar, but tests for store multiple. Here, the second vector element
1826 is a CLOBBER. It will be tested later. */
1829 store_multiple_operation (op
, mode
)
1831 enum machine_mode mode
;
1833 int count
= XVECLEN (op
, 0) - 1;
1838 /* Perform a quick check so we don't blow up below. */
1840 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
1841 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
1842 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
1845 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
1846 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
1848 for (i
= 1; i
< count
; i
++)
1850 rtx elt
= XVECEXP (op
, 0, i
+ 1);
1852 if (GET_CODE (elt
) != SET
1853 || GET_CODE (SET_SRC (elt
)) != REG
1854 || GET_MODE (SET_SRC (elt
)) != SImode
1855 || REGNO (SET_SRC (elt
)) != src_regno
+ i
1856 || GET_CODE (SET_DEST (elt
)) != MEM
1857 || GET_MODE (SET_DEST (elt
)) != SImode
1858 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
1859 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
1860 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
1861 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
1868 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1869 We only check the opcode against the mode of the CC value here. */
1872 branch_comparison_operator (op
, mode
)
1874 enum machine_mode mode
;
1876 enum rtx_code code
= GET_CODE (op
);
1877 enum machine_mode cc_mode
;
1879 if (GET_RTX_CLASS (code
) != '<')
1882 cc_mode
= GET_MODE (XEXP (op
, 0));
1883 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1886 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1887 && cc_mode
== CCUNSmode
)
1890 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1891 && (cc_mode
!= CCUNSmode
))
1897 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1898 We check the opcode against the mode of the CC value and disallow EQ or
1899 NE comparisons for integers. */
1902 scc_comparison_operator (op
, mode
)
1904 enum machine_mode mode
;
1906 enum rtx_code code
= GET_CODE (op
);
1907 enum machine_mode cc_mode
;
1909 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
1912 if (GET_RTX_CLASS (code
) != '<')
1915 cc_mode
= GET_MODE (XEXP (op
, 0));
1916 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
1919 if (code
== NE
&& cc_mode
!= CCFPmode
)
1922 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
1923 && cc_mode
== CCUNSmode
)
1926 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
1927 && (cc_mode
!= CCUNSmode
))
1930 if (cc_mode
== CCEQmode
&& code
!= EQ
&& code
!= NE
)
1936 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1937 mask required to convert the result of a rotate insn into a shift
1938 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1941 includes_lshift_p (shiftop
, andop
)
1942 register rtx shiftop
;
1945 int shift_mask
= (~0 << INTVAL (shiftop
));
1947 return (INTVAL (andop
) & ~shift_mask
) == 0;
1950 /* Similar, but for right shift. */
1953 includes_rshift_p (shiftop
, andop
)
1954 register rtx shiftop
;
1957 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
1959 shift_mask
>>= INTVAL (shiftop
);
1961 return (INTVAL (andop
) & ~ shift_mask
) == 0;
1964 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1965 for lfq and stfq insns.
1967 Note reg1 and reg2 *must* be hard registers. To be sure we will
1968 abort if we are passed pseudo registers. */
1971 registers_ok_for_quad_peep (reg1
, reg2
)
1974 /* We might have been passed a SUBREG. */
1975 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
1978 return (REGNO (reg1
) == REGNO (reg2
) - 1);
1981 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1982 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1985 addrs_ok_for_quad_peep (addr1
, addr2
)
1992 /* Extract an offset (if used) from the first addr. */
1993 if (GET_CODE (addr1
) == PLUS
)
1995 /* If not a REG, return zero. */
1996 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
2000 reg1
= REGNO (XEXP (addr1
, 0));
2001 /* The offset must be constant! */
2002 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
2004 offset1
= INTVAL (XEXP (addr1
, 1));
2007 else if (GET_CODE (addr1
) != REG
)
2011 reg1
= REGNO (addr1
);
2012 /* This was a simple (mem (reg)) expression. Offset is 0. */
2016 /* Make sure the second address is a (mem (plus (reg) (const_int). */
2017 if (GET_CODE (addr2
) != PLUS
)
2020 if (GET_CODE (XEXP (addr2
, 0)) != REG
2021 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
2024 if (reg1
!= REGNO (XEXP (addr2
, 0)))
2027 /* The offset for the second addr must be 8 more than the first addr. */
2028 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
2031 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
2036 /* Return the register class of a scratch register needed to copy IN into
2037 or out of a register in CLASS in MODE. If it can be done directly,
2038 NO_REGS is returned. */
2041 secondary_reload_class (class, mode
, in
)
2042 enum reg_class
class;
2043 enum machine_mode mode
;
2046 int regno
= true_regnum (in
);
2048 if (regno
>= FIRST_PSEUDO_REGISTER
)
2051 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
2053 if (class == GENERAL_REGS
|| class == BASE_REGS
2054 || (regno
>= 0 && INT_REGNO_P (regno
)))
2057 /* Constants, memory, and FP registers can go into FP registers. */
2058 if ((regno
== -1 || FP_REGNO_P (regno
))
2059 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
2062 /* We can copy among the CR registers. */
2063 if ((class == CR_REGS
|| class == CR0_REGS
)
2064 && regno
>= 0 && CR_REGNO_P (regno
))
2067 /* Otherwise, we need GENERAL_REGS. */
2068 return GENERAL_REGS
;
2071 /* Given a comparison operation, return the bit number in CCR to test. We
2072 know this is a valid comparison.
2074 SCC_P is 1 if this is for an scc. That means that %D will have been
2075 used instead of %C, so the bits will be in different places.
2077 Return -1 if OP isn't a valid comparison for some reason. */
2084 enum rtx_code code
= GET_CODE (op
);
2085 enum machine_mode cc_mode
;
2089 if (GET_RTX_CLASS (code
) != '<')
2092 cc_mode
= GET_MODE (XEXP (op
, 0));
2093 cc_regnum
= REGNO (XEXP (op
, 0));
2094 base_bit
= 4 * (cc_regnum
- 68);
2096 /* In CCEQmode cases we have made sure that the result is always in the
2097 third bit of the CR field. */
2099 if (cc_mode
== CCEQmode
)
2100 return base_bit
+ 3;
2105 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
2107 return base_bit
+ 2;
2109 return base_bit
+ 1;
2114 /* If floating-point, we will have done a cror to put the bit in the
2115 unordered position. So test that bit. For integer, this is ! LT
2116 unless this is an scc insn. */
2117 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
;
2120 return cc_mode
== CCFPmode
|| scc_p
? base_bit
+ 3 : base_bit
+ 1;
2127 /* Return the GOT register, creating it if needed. */
2130 rs6000_got_register (value
)
2133 if (!current_function_uses_pic_offset_table
|| !pic_offset_table_rtx
)
2135 if (reload_in_progress
|| reload_completed
)
2136 fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value
);
2138 current_function_uses_pic_offset_table
= 1;
2139 pic_offset_table_rtx
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2142 return pic_offset_table_rtx
;
2146 /* Replace all occurances of register FROM with an new pseduo register in an insn X.
2147 Store the pseudo register used in REG.
2148 This is only safe during FINALIZE_PIC, since the registers haven't been setup
2152 rs6000_replace_regno (x
, from
, reg
)
2160 /* Allow this function to make replacements in EXPR_LISTs. */
2164 switch (GET_CODE (x
))
2177 if (REGNO (x
) == from
)
2180 *reg
= pic_offset_table_rtx
= gen_reg_rtx (Pmode
);
2188 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2189 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2192 XEXP (x
, i
) = rs6000_replace_regno (XEXP (x
, i
), from
, reg
);
2193 else if (fmt
[i
] == 'E')
2194 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2195 XVECEXP (x
, i
, j
) = rs6000_replace_regno (XVECEXP (x
, i
, j
), from
, reg
);
2202 /* By generating position-independent code, when two different
2203 programs (A and B) share a common library (libC.a), the text of
2204 the library can be shared whether or not the library is linked at
2205 the same address for both programs. In some of these
2206 environments, position-independent code requires not only the use
2207 of different addressing modes, but also special code to enable the
2208 use of these addressing modes.
2210 The `FINALIZE_PIC' macro serves as a hook to emit these special
2211 codes once the function is being compiled into assembly code, but
2212 not before. (It is not done before, because in the case of
2213 compiling an inline function, it would lead to multiple PIC
2214 prologues being included in functions which used inline functions
2215 and were compiled to assembly language.) */
2218 rs6000_finalize_pic ()
2220 /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM
2221 with an appropriate pseduo register. If we find we need GOT/TOC,
2222 add the appropriate init code. */
2223 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2225 rtx insn
= get_insns ();
2228 rtx last_insn
= NULL_RTX
;
2230 if (GET_CODE (insn
) == NOTE
)
2231 insn
= next_nonnote_insn (insn
);
2234 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2236 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2238 PATTERN (insn
) = rs6000_replace_regno (PATTERN (insn
),
2242 if (REG_NOTES (insn
))
2243 REG_NOTES (insn
) = rs6000_replace_regno (REG_NOTES (insn
),
2248 if (GET_CODE (insn
) != NOTE
)
2254 rtx init
= gen_init_v4_pic (reg
);
2255 emit_insn_before (init
, first_insn
);
2256 if (!optimize
&& last_insn
)
2257 emit_insn_after (gen_rtx (USE
, VOIDmode
, reg
), last_insn
);
2263 /* Search for any occurrance of the GOT_TOC register marker that should
2264 have been eliminated, but may have crept back in. */
2270 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
2272 rtx got_reg
= gen_rtx (REG
, Pmode
, GOT_TOC_REGNUM
);
2273 for ( ; insn
!= NULL_RTX
; insn
= NEXT_INSN (insn
))
2274 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i'
2275 && reg_mentioned_p (got_reg
, PATTERN (insn
)))
2276 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn
));
2281 /* Define the structure for the machine field in struct function. */
2282 struct machine_function
2288 rtx pic_offset_table_rtx
;
2291 /* Functions to save and restore rs6000_fpmem_size.
2292 These will be called, via pointer variables,
2293 from push_function_context and pop_function_context. */
2296 rs6000_save_machine_status (p
)
2299 struct machine_function
*machine
=
2300 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
2302 p
->machine
= machine
;
2303 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
2304 machine
->fpmem_size
= rs6000_fpmem_size
;
2305 machine
->fpmem_offset
= rs6000_fpmem_offset
;
2306 machine
->pic_offset_table_rtx
= pic_offset_table_rtx
;
2310 rs6000_restore_machine_status (p
)
2313 struct machine_function
*machine
= p
->machine
;
2315 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
2316 rs6000_fpmem_size
= machine
->fpmem_size
;
2317 rs6000_fpmem_offset
= machine
->fpmem_offset
;
2318 pic_offset_table_rtx
= machine
->pic_offset_table_rtx
;
2321 p
->machine
= (struct machine_function
*)0;
2324 /* Do anything needed before RTL is emitted for each function. */
2327 rs6000_init_expanders ()
2329 /* Reset varargs and save TOC indicator */
2330 rs6000_sysv_varargs_p
= 0;
2331 rs6000_fpmem_size
= 0;
2332 rs6000_fpmem_offset
= 0;
2333 pic_offset_table_rtx
= (rtx
)0;
2335 /* Arrange to save and restore machine status around nested functions. */
2336 save_machine_status
= rs6000_save_machine_status
;
2337 restore_machine_status
= rs6000_restore_machine_status
;
2341 /* Print an operand. Recognize special options, documented below. */
2344 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2346 #define SMALL_DATA_RELOC "sda21"
2350 print_operand (file
, x
, code
)
2358 /* These macros test for integers and extract the low-order bits. */
2360 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2361 && GET_MODE (X) == VOIDmode)
2363 #define INT_LOWPART(X) \
2364 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2369 /* Write out an instruction after the call which may be replaced
2370 with glue code by the loader. This depends on the AIX version. */
2371 asm_fprintf (file
, RS6000_CALL_GLUE
);
2375 /* Write the register number of the TOC register. */
2376 fputs (TARGET_MINIMAL_TOC
? reg_names
[30] : reg_names
[2], file
);
2380 /* Write out either a '.' or '$' for the current location, depending
2381 on whether this is Solaris or not. */
2382 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
2386 /* If X is a constant integer whose low-order 5 bits are zero,
2387 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2388 in the AIX assembler where "sri" with a zero shift count
2389 write a trash instruction. */
2390 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
2397 /* Low-order 16 bits of constant, unsigned. */
2399 output_operand_lossage ("invalid %%b value");
2401 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2405 /* This is an optional cror needed for LE or GE floating-point
2406 comparisons. Otherwise write nothing. */
2407 if ((GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
)
2408 && GET_MODE (XEXP (x
, 0)) == CCFPmode
)
2410 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2412 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2413 base_bit
+ 2, base_bit
+ (GET_CODE (x
) == GE
));
2418 /* Similar, except that this is for an scc, so we must be able to
2419 encode the test in a single bit that is one. We do the above
2420 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2421 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
2422 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
2424 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2426 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
2428 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
2431 else if (GET_CODE (x
) == NE
)
2433 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - 68);
2435 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
2436 base_bit
+ 2, base_bit
+ 2);
2441 /* X is a CR register. Print the number of the third bit of the CR */
2442 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2443 output_operand_lossage ("invalid %%E value");
2445 fprintf(file
, "%d", 4 * (REGNO (x
) - 68) + 3);
2449 /* X is a CR register. Print the shift count needed to move it
2450 to the high-order four bits. */
2451 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2452 output_operand_lossage ("invalid %%f value");
2454 fprintf (file
, "%d", 4 * (REGNO (x
) - 68));
2458 /* Similar, but print the count for the rotate in the opposite
2460 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2461 output_operand_lossage ("invalid %%F value");
2463 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - 68));
2467 /* X is a constant integer. If it is negative, print "m",
2468 otherwise print "z". This is to make a aze or ame insn. */
2469 if (GET_CODE (x
) != CONST_INT
)
2470 output_operand_lossage ("invalid %%G value");
2471 else if (INTVAL (x
) >= 0)
2478 /* If constant, output low-order five bits. Otherwise,
2481 fprintf (file
, "%d", INT_LOWPART (x
) & 31);
2483 print_operand (file
, x
, 0);
2487 /* If constant, output low-order six bits. Otherwise,
2490 fprintf (file
, "%d", INT_LOWPART (x
) & 63);
2492 print_operand (file
, x
, 0);
2496 /* Print `i' if this is a constant, else nothing. */
2502 /* Write the bit number in CCR for jump. */
2505 output_operand_lossage ("invalid %%j code");
2507 fprintf (file
, "%d", i
);
2511 /* Similar, but add one for shift count in rlinm for scc and pass
2512 scc flag to `ccr_bit'. */
2515 output_operand_lossage ("invalid %%J code");
2517 /* If we want bit 31, write a shift count of zero, not 32. */
2518 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
2522 /* X must be a constant. Write the 1's complement of the
2525 output_operand_lossage ("invalid %%k value");
2527 fprintf (file
, "%d", ~ INT_LOWPART (x
));
2531 /* Write second word of DImode or DFmode reference. Works on register
2532 or non-indexed memory only. */
2533 if (GET_CODE (x
) == REG
)
2534 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
2535 else if (GET_CODE (x
) == MEM
)
2537 /* Handle possible auto-increment. Since it is pre-increment and
2538 we have already done it, we can just use an offset of four. */
2539 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2540 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2541 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 4));
2543 output_address (plus_constant (XEXP (x
, 0), 4));
2544 if (small_data_operand (x
, GET_MODE (x
)))
2545 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2550 /* MB value for a mask operand. */
2551 if (! mask_operand (x
, VOIDmode
))
2552 output_operand_lossage ("invalid %%m value");
2554 val
= INT_LOWPART (x
);
2556 /* If the high bit is set and the low bit is not, the value is zero.
2557 If the high bit is zero, the value is the first 1 bit we find from
2559 if (val
< 0 && (val
& 1) == 0)
2566 for (i
= 1; i
< 32; i
++)
2567 if ((val
<<= 1) < 0)
2569 fprintf (file
, "%d", i
);
2573 /* Otherwise, look for the first 0 bit from the right. The result is its
2574 number plus 1. We know the low-order bit is one. */
2575 for (i
= 0; i
< 32; i
++)
2576 if (((val
>>= 1) & 1) == 0)
2579 /* If we ended in ...01, I would be 0. The correct value is 31, so
2581 fprintf (file
, "%d", 31 - i
);
2585 /* ME value for a mask operand. */
2586 if (! mask_operand (x
, VOIDmode
))
2587 output_operand_lossage ("invalid %%m value");
2589 val
= INT_LOWPART (x
);
2591 /* If the low bit is set and the high bit is not, the value is 31.
2592 If the low bit is zero, the value is the first 1 bit we find from
2594 if ((val
& 1) && val
>= 0)
2599 else if ((val
& 1) == 0)
2601 for (i
= 0; i
< 32; i
++)
2602 if ((val
>>= 1) & 1)
2605 /* If we had ....10, I would be 0. The result should be
2606 30, so we need 30 - i. */
2607 fprintf (file
, "%d", 30 - i
);
2611 /* Otherwise, look for the first 0 bit from the left. The result is its
2612 number minus 1. We know the high-order bit is one. */
2613 for (i
= 0; i
< 32; i
++)
2614 if ((val
<<= 1) >= 0)
2617 fprintf (file
, "%d", i
);
2621 /* Write the number of elements in the vector times 4. */
2622 if (GET_CODE (x
) != PARALLEL
)
2623 output_operand_lossage ("invalid %%N value");
2625 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
2629 /* Similar, but subtract 1 first. */
2630 if (GET_CODE (x
) != PARALLEL
)
2631 output_operand_lossage ("invalid %%N value");
2633 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
2637 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2639 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
2640 output_operand_lossage ("invalid %%p value");
2642 fprintf (file
, "%d", i
);
2646 /* The operand must be an indirect memory reference. The result
2647 is the register number. */
2648 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
2649 || REGNO (XEXP (x
, 0)) >= 32)
2650 output_operand_lossage ("invalid %%P value");
2652 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
2656 /* X is a CR register. Print the mask for `mtcrf'. */
2657 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
2658 output_operand_lossage ("invalid %%R value");
2660 fprintf (file
, "%d", 128 >> (REGNO (x
) - 68));
2664 /* Low 5 bits of 32 - value */
2666 output_operand_lossage ("invalid %%s value");
2668 fprintf (file
, "%d", (32 - INT_LOWPART (x
)) & 31);
2672 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2673 All floating-point operations except NE branch true and integer
2674 EQ, LT, GT, LTU and GTU also branch true. */
2675 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2676 output_operand_lossage ("invalid %%t value");
2678 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2679 && GET_CODE (x
) != NE
)
2680 || GET_CODE (x
) == EQ
2681 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2682 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2689 /* Opposite of 't': write 4 if this jump operation will branch if true,
2691 if (GET_RTX_CLASS (GET_CODE (x
)) != '<')
2692 output_operand_lossage ("invalid %%t value");
2694 else if ((GET_MODE (XEXP (x
, 0)) == CCFPmode
2695 && GET_CODE (x
) != NE
)
2696 || GET_CODE (x
) == EQ
2697 || GET_CODE (x
) == LT
|| GET_CODE (x
) == GT
2698 || GET_CODE (x
) == LTU
|| GET_CODE (x
) == GTU
)
2705 /* High-order 16 bits of constant for use in unsigned operand. */
2707 output_operand_lossage ("invalid %%u value");
2709 fprintf (file
, "0x%x", (INT_LOWPART (x
) >> 16) & 0xffff);
2713 /* High-order 16 bits of constant for use in signed operand. */
2715 output_operand_lossage ("invalid %%v value");
2718 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
2720 /* Solaris assembler doesn't like lis 0,0x80000 */
2721 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
2722 fprintf (file
, "%d", value
| (~0 << 16));
2724 fprintf (file
, "0x%x", value
);
2729 /* Print `u' if this has an auto-increment or auto-decrement. */
2730 if (GET_CODE (x
) == MEM
2731 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
2732 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
2737 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2740 fprintf (file
, "%d",
2741 (INT_LOWPART (x
) & 0xffff) - 2 * (INT_LOWPART (x
) & 0x8000));
2743 print_operand (file
, x
, 0);
2747 /* If constant, low-order 16 bits of constant, unsigned.
2748 Otherwise, write normally. */
2750 fprintf (file
, "%d", INT_LOWPART (x
) & 0xffff);
2752 print_operand (file
, x
, 0);
2756 if (GET_CODE (x
) == MEM
2757 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
2762 /* Like 'L', for third word of TImode */
2763 if (GET_CODE (x
) == REG
)
2764 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
2765 else if (GET_CODE (x
) == MEM
)
2767 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2768 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2769 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
2771 output_address (plus_constant (XEXP (x
, 0), 8));
2772 if (small_data_operand (x
, GET_MODE (x
)))
2773 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2778 /* X is a SYMBOL_REF. Write out the name preceded by a
2779 period and without any trailing data in brackets. Used for function
2780 names. If we are configured for System V (or the embedded ABI) on
2781 the PowerPC, do not emit the period, since those systems do not use
2782 TOCs and the like. */
2783 if (GET_CODE (x
) != SYMBOL_REF
)
2786 if (XSTR (x
, 0)[0] != '.')
2788 switch (DEFAULT_ABI
)
2798 case ABI_AIX_NODESC
:
2807 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
2811 /* Like 'L', for last word of TImode. */
2812 if (GET_CODE (x
) == REG
)
2813 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
2814 else if (GET_CODE (x
) == MEM
)
2816 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
2817 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2818 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
2820 output_address (plus_constant (XEXP (x
, 0), 12));
2821 if (small_data_operand (x
, GET_MODE (x
)))
2822 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2827 if (GET_CODE (x
) == REG
)
2828 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
2829 else if (GET_CODE (x
) == MEM
)
2831 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2832 know the width from the mode. */
2833 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
2834 fprintf (file
, "%d(%d)", GET_MODE_SIZE (GET_MODE (x
)),
2835 REGNO (XEXP (XEXP (x
, 0), 0)));
2836 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
2837 fprintf (file
, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x
)),
2838 REGNO (XEXP (XEXP (x
, 0), 0)));
2840 output_address (XEXP (x
, 0));
2843 output_addr_const (file
, x
);
2847 output_operand_lossage ("invalid %%xn code");
2851 /* Print the address of an operand. */
2854 print_operand_address (file
, x
)
2858 if (GET_CODE (x
) == REG
)
2859 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
2860 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
|| GET_CODE (x
) == LABEL_REF
)
2862 output_addr_const (file
, x
);
2863 if (small_data_operand (x
, GET_MODE (x
)))
2864 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
, reg_names
[0]);
2866 #ifdef TARGET_NO_TOC
2867 else if (TARGET_NO_TOC
)
2871 fprintf (file
, "(%s)", reg_names
[ TARGET_MINIMAL_TOC
? 30 : 2 ]);
2873 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
2875 if (REGNO (XEXP (x
, 0)) == 0)
2876 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
2877 reg_names
[ REGNO (XEXP (x
, 0)) ]);
2879 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
2880 reg_names
[ REGNO (XEXP (x
, 1)) ]);
2882 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2883 fprintf (file
, "%d(%s)", INTVAL (XEXP (x
, 1)), reg_names
[ REGNO (XEXP (x
, 0)) ]);
2884 else if (TARGET_ELF
&& !TARGET_64BIT
&& GET_CODE (x
) == LO_SUM
2885 && GET_CODE (XEXP (x
, 0)) == REG
&& CONSTANT_P (XEXP (x
, 1)))
2887 output_addr_const (file
, XEXP (x
, 1));
2888 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
2894 /* This page contains routines that are used to determine what the function
2895 prologue and epilogue code will do and write them out. */
2897 /* Return the first fixed-point register that is required to be saved. 32 if
2901 first_reg_to_save ()
2905 /* Find lowest numbered live register. */
2906 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
2907 if (regs_ever_live
[first_reg
])
2910 /* If profiling, then we must save/restore every register that contains
2911 a parameter before/after the .__mcount call. Use registers from 30 down
2912 to 23 to do this. Don't use the frame pointer in reg 31.
2914 For now, save enough room for all of the parameter registers. */
2915 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2922 /* Similar, for FP regs. */
2925 first_fp_reg_to_save ()
2929 /* Find lowest numbered live register. */
2930 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
2931 if (regs_ever_live
[first_reg
])
2937 /* Return non-zero if this function makes calls. */
2940 rs6000_makes_calls ()
2944 /* If we are profiling, we will be making a call to __mcount.
2945 Under the System V ABI's, we store the LR directly, so
2946 we don't need to do it here. */
2947 if (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
2950 for (insn
= get_insns (); insn
; insn
= next_insn (insn
))
2951 if (GET_CODE (insn
) == CALL_INSN
)
2958 /* Calculate the stack information for the current function. This is
2959 complicated by having two separate calling sequences, the AIX calling
2960 sequence and the V.4 calling sequence.
2962 AIX stack frames look like:
2964 SP----> +---------------------------------------+
2965 | back chain to caller | 0
2966 +---------------------------------------+
2968 +---------------------------------------+
2970 +---------------------------------------+
2971 | reserved for compilers | 12
2972 +---------------------------------------+
2973 | reserved for binders | 16
2974 +---------------------------------------+
2975 | saved TOC pointer | 20
2976 +---------------------------------------+
2977 | Parameter save area (P) | 24
2978 +---------------------------------------+
2979 | Alloca space (A) | 24+P
2980 +---------------------------------------+
2981 | Local variable space (L) | 24+P+A
2982 +---------------------------------------+
2983 | Float/int conversion temporary (X) | 24+P+A+L
2984 +---------------------------------------+
2985 | Save area for GP registers (G) | 24+P+A+X+L
2986 +---------------------------------------+
2987 | Save area for FP registers (F) | 24+P+A+X+L+G
2988 +---------------------------------------+
2989 old SP->| back chain to caller's caller |
2990 +---------------------------------------+
2992 V.4 stack frames look like:
2994 SP----> +---------------------------------------+
2995 | back chain to caller | 0
2996 +---------------------------------------+
2997 | caller's saved LR | 4
2998 +---------------------------------------+
2999 | Parameter save area (P) | 8
3000 +---------------------------------------+
3001 | Alloca space (A) | 8+P
3002 +---------------------------------------+
3003 | Varargs save area (V) | 8+P+A
3004 +---------------------------------------+
3005 | Local variable space (L) | 8+P+A+V
3006 +---------------------------------------+
3007 | Float/int conversion temporary (X) | 8+P+A+V+L
3008 +---------------------------------------+
3009 | saved CR (C) | 8+P+A+V+L+X
3010 +---------------------------------------+
3011 | Save area for GP registers (G) | 8+P+A+V+L+X+C
3012 +---------------------------------------+
3013 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
3014 +---------------------------------------+
3015 old SP->| back chain to caller's caller |
3016 +---------------------------------------+
3019 A PowerPC Windows/NT frame looks like:
3021 SP----> +---------------------------------------+
3022 | back chain to caller | 0
3023 +---------------------------------------+
3025 +---------------------------------------+
3027 +---------------------------------------+
3029 +---------------------------------------+
3031 +---------------------------------------+
3033 +---------------------------------------+
3034 | Parameter save area (P) | 24
3035 +---------------------------------------+
3036 | Alloca space (A) | 24+P
3037 +---------------------------------------+
3038 | Local variable space (L) | 24+P+A
3039 +---------------------------------------+
3040 | Float/int conversion temporary (X) | 24+P+A+L
3041 +---------------------------------------+
3042 | Save area for FP registers (F) | 24+P+A+L+X
3043 +---------------------------------------+
3044 | Possible alignment area (Y) | 24+P+A+L+X+F
3045 +---------------------------------------+
3046 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
3047 +---------------------------------------+
3048 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
3049 +---------------------------------------+
3050 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
3051 +---------------------------------------+
3052 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
3053 +---------------------------------------+
3054 old SP->| back chain to caller's caller |
3055 +---------------------------------------+
3057 For NT, there is no specific order to save the registers, but in
3058 order to support __builtin_return_address, the save area for the
3059 link register needs to be in a known place, so we use -4 off of the
3060 old SP. To support calls through pointers, we also allocate a
3061 fixed slot to store the TOC, -8 off the old SP. */
3063 #ifndef ABI_STACK_BOUNDARY
3064 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
3068 rs6000_stack_info ()
3070 static rs6000_stack_t info
, zero_info
;
3071 rs6000_stack_t
*info_ptr
= &info
;
3072 int reg_size
= TARGET_64BIT
? 8 : 4;
3073 enum rs6000_abi abi
;
3076 /* Zero all fields portably */
3079 /* Select which calling sequence */
3080 info_ptr
->abi
= abi
= DEFAULT_ABI
;
3082 /* Calculate which registers need to be saved & save area size */
3083 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
3084 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
3086 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
3087 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
3089 /* Does this function call anything? */
3090 info_ptr
->calls_p
= rs6000_makes_calls ();
3092 /* Allocate space to save the toc. */
3093 if (abi
== ABI_NT
&& info_ptr
->calls_p
)
3095 info_ptr
->toc_save_p
= 1;
3096 info_ptr
->toc_size
= reg_size
;
3099 /* Does this machine need the float/int conversion area? */
3100 info_ptr
->fpmem_p
= regs_ever_live
[FPMEM_REGNUM
];
3102 /* If this is main and we need to call a function to set things up,
3103 save main's arguments around the call. */
3108 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl
)), "main") == 0
3109 && DECL_CONTEXT (current_function_decl
) == NULL_TREE
)
3111 info_ptr
->main_p
= 1;
3114 info_ptr
->calls_p
= 1;
3116 if (DECL_ARGUMENTS (current_function_decl
))
3121 info_ptr
->main_save_p
= 1;
3122 info_ptr
->main_size
= 0;
3124 for ((i
= 0), (arg
= DECL_ARGUMENTS (current_function_decl
));
3125 arg
!= NULL_TREE
&& i
< 8;
3126 (arg
= TREE_CHAIN (arg
)), i
++)
3128 info_ptr
->main_size
+= reg_size
;
3136 /* Determine if we need to save the link register */
3137 if (regs_ever_live
[65]
3138 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
3139 #ifdef TARGET_RELOCATABLE
3140 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
3142 || (info_ptr
->first_fp_reg_save
!= 64
3143 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
3144 || (abi
== ABI_V4
&& current_function_calls_alloca
)
3145 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
3146 || info_ptr
->calls_p
)
3148 info_ptr
->lr_save_p
= 1;
3149 regs_ever_live
[65] = 1;
3151 info_ptr
->lr_size
= reg_size
;
3154 /* Determine if we need to save the condition code registers */
3155 if (regs_ever_live
[70] || regs_ever_live
[71] || regs_ever_live
[72])
3157 info_ptr
->cr_save_p
= 1;
3158 if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3159 info_ptr
->cr_size
= reg_size
;
3162 /* Determine various sizes */
3163 info_ptr
->reg_size
= reg_size
;
3164 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
3165 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
3166 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
3167 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
3168 info_ptr
->fpmem_size
= (info_ptr
->fpmem_p
) ? 8 : 0;
3169 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
3173 + info_ptr
->toc_size
3174 + info_ptr
->main_size
, 8);
3176 total_raw_size
= (info_ptr
->vars_size
3177 + info_ptr
->parm_size
3178 + info_ptr
->fpmem_size
3179 + info_ptr
->save_size
3180 + info_ptr
->varargs_size
3181 + info_ptr
->fixed_size
);
3183 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
3185 /* Determine if we need to allocate any stack frame.
3186 For AIX We need to push the stack if a frame pointer is needed (because
3187 the stack might be dynamically adjusted), if we are debugging, if the
3188 total stack size is more than 220 bytes, or if we make calls.
3190 For V.4 we don't have the stack cushion that AIX uses, but assume that
3191 the debugger can handle stackless frames. */
3193 if (info_ptr
->calls_p
)
3194 info_ptr
->push_p
= 1;
3196 else if (abi
== ABI_V4
|| abi
== ABI_NT
|| abi
== ABI_SOLARIS
)
3197 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
3198 || (abi
== ABI_NT
? info_ptr
->lr_save_p
3199 : info_ptr
->calls_p
));
3202 info_ptr
->push_p
= (frame_pointer_needed
3203 || write_symbols
!= NO_DEBUG
3204 || info_ptr
->total_size
> 220);
3206 /* Calculate the offsets */
3214 case ABI_AIX_NODESC
:
3215 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3216 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3217 info_ptr
->main_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->main_size
;
3218 info_ptr
->cr_save_offset
= 4;
3219 info_ptr
->lr_save_offset
= 8;
3224 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
3225 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
3226 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
3227 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
3228 info_ptr
->main_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->main_size
;
3229 info_ptr
->lr_save_offset
= reg_size
;
3233 info_ptr
->lr_save_offset
= -4;
3234 info_ptr
->toc_save_offset
= info_ptr
->lr_save_offset
- info_ptr
->lr_size
;
3235 info_ptr
->cr_save_offset
= info_ptr
->toc_save_offset
- info_ptr
->toc_size
;
3236 info_ptr
->gp_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->cr_size
- info_ptr
->gp_size
+ reg_size
;
3237 info_ptr
->fp_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->fp_size
;
3238 if (info_ptr
->fp_size
&& ((- info_ptr
->fp_save_offset
) % 8) != 0)
3239 info_ptr
->fp_save_offset
-= 4;
3241 info_ptr
->main_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->main_size
;
3245 if (info_ptr
->fpmem_p
)
3246 info_ptr
->fpmem_offset
= STARTING_FRAME_OFFSET
- info_ptr
->total_size
+ info_ptr
->vars_size
;
3248 /* Zero offsets if we're not saving those registers */
3249 if (!info_ptr
->fp_size
)
3250 info_ptr
->fp_save_offset
= 0;
3252 if (!info_ptr
->gp_size
)
3253 info_ptr
->gp_save_offset
= 0;
3255 if (!info_ptr
->lr_save_p
)
3256 info_ptr
->lr_save_offset
= 0;
3258 if (!info_ptr
->cr_save_p
)
3259 info_ptr
->cr_save_offset
= 0;
3261 if (!info_ptr
->toc_save_p
)
3262 info_ptr
->toc_save_offset
= 0;
3264 if (!info_ptr
->main_save_p
)
3265 info_ptr
->main_save_offset
= 0;
3267 if (!info_ptr
->fpmem_p
)
3268 info_ptr
->fpmem_offset
= 0;
3271 rs6000_fpmem_size
= info_ptr
->fpmem_size
;
3272 rs6000_fpmem_offset
= info_ptr
->total_size
+ info_ptr
->fpmem_offset
;
3279 debug_stack_info (info
)
3280 rs6000_stack_t
*info
;
3285 info
= rs6000_stack_info ();
3287 fprintf (stderr
, "\nStack information for function %s:\n",
3288 ((current_function_decl
&& DECL_NAME (current_function_decl
))
3289 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
3294 default: abi_string
= "Unknown"; break;
3295 case ABI_NONE
: abi_string
= "NONE"; break;
3296 case ABI_AIX
: abi_string
= "AIX"; break;
3297 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
3298 case ABI_V4
: abi_string
= "V.4"; break;
3299 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
3300 case ABI_NT
: abi_string
= "NT"; break;
3303 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
3305 if (info
->first_gp_reg_save
!= 32)
3306 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
3308 if (info
->first_fp_reg_save
!= 64)
3309 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
3311 if (info
->lr_save_p
)
3312 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
3314 if (info
->cr_save_p
)
3315 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
3317 if (info
->toc_save_p
)
3318 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
3321 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
3324 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
3327 fprintf (stderr
, "\tmain_p = %5d\n", info
->main_p
);
3329 if (info
->main_save_p
)
3330 fprintf (stderr
, "\tmain_save_p = %5d\n", info
->main_save_p
);
3333 fprintf (stderr
, "\tfpmem_p = %5d\n", info
->fpmem_p
);
3335 if (info
->gp_save_offset
)
3336 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
3338 if (info
->fp_save_offset
)
3339 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
3341 if (info
->lr_save_offset
)
3342 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
3344 if (info
->cr_save_offset
)
3345 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
3347 if (info
->toc_save_offset
)
3348 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
3350 if (info
->varargs_save_offset
)
3351 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
3353 if (info
->main_save_offset
)
3354 fprintf (stderr
, "\tmain_save_offset = %5d\n", info
->main_save_offset
);
3356 if (info
->fpmem_offset
)
3357 fprintf (stderr
, "\tfpmem_offset = %5d\n", info
->fpmem_offset
);
3359 if (info
->total_size
)
3360 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
3362 if (info
->varargs_size
)
3363 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
3365 if (info
->vars_size
)
3366 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
3368 if (info
->parm_size
)
3369 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
3371 if (info
->fpmem_size
)
3372 fprintf (stderr
, "\tfpmem_size = %5d\n", info
->fpmem_size
);
3374 if (info
->fixed_size
)
3375 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
3378 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
3381 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
3384 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
3387 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
3390 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
3392 if (info
->main_size
)
3393 fprintf (stderr
, "\tmain_size = %5d\n", info
->main_size
);
3395 if (info
->save_size
)
3396 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
3398 if (info
->reg_size
!= 4)
3399 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
3401 fprintf (stderr
, "\n");
3404 /* Write out an instruction to load the TOC_TABLE address into register 30.
3405 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
3409 rs6000_output_load_toc_table (file
, reg
)
3416 if (TARGET_RELOCATABLE
)
3418 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3419 fprintf (file
, "\tbl ");
3420 assemble_name (file
, buf
);
3421 fprintf (file
, "\n");
3423 /* possibly create the toc section */
3424 if (!toc_initialized
)
3427 function_section (current_function_decl
);
3430 /* If not first call in this function, we need to put the
3431 different between .LCTOC1 and the address we get to right
3432 after the bl. It will mess up disassembling the instructions
3433 but that can't be helped. We will later need to bias the
3434 address before loading. */
3435 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
3437 char *init_ptr
= (TARGET_64BIT
) ? ".quad" : ".long";
3440 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCL", rs6000_pic_labelno
);
3442 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3443 STRIP_NAME_ENCODING (buf_ptr
, buf
);
3444 fprintf (file
, "\t%s %s-", init_ptr
, buf_ptr
);
3446 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3447 fprintf (file
, "%s\n", buf_ptr
);
3450 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCF", rs6000_pic_labelno
);
3451 fprintf (file
, "\tmflr %s\n", reg_names
[reg
]);
3453 if (rs6000_pic_func_labelno
!= rs6000_pic_labelno
)
3455 if (TARGET_POWERPC64
)
3456 fprintf (file
, "\taddi %s,%s,8\n", reg_names
[reg
], reg_names
[reg
]);
3457 else if (TARGET_NEW_MNEMONICS
)
3458 fprintf (file
, "\taddi %s,%s,4\n", reg_names
[reg
], reg_names
[reg
]);
3460 fprintf (file
, "\tcal %s,4(%s)\n", reg_names
[reg
], reg_names
[reg
]);
3463 if (TARGET_POWERPC64
)
3464 fprintf (file
, "\tld");
3465 else if (TARGET_NEW_MNEMONICS
)
3466 fprintf (file
, "\tlwz");
3468 fprintf (file
, "\tl");
3470 fprintf (file
, " %s,(", reg_names
[0]);
3471 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
3472 assemble_name (file
, buf
);
3473 fprintf (file
, "-");
3474 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
3475 assemble_name (file
, buf
);
3476 fprintf (file
, ")(%s)\n", reg_names
[reg
]);
3477 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
3478 reg_names
[reg
], reg_names
[0], reg_names
[reg
]);
3479 rs6000_pic_labelno
++;
3481 else if (!TARGET_64BIT
)
3483 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
3484 asm_fprintf (file
, "\t{cau|addis} %s,%s,", reg_names
[reg
], reg_names
[0]);
3485 assemble_name (file
, buf
);
3486 asm_fprintf (file
, "@ha\n");
3487 if (TARGET_NEW_MNEMONICS
)
3489 asm_fprintf (file
, "\taddi %s,%s,", reg_names
[reg
], reg_names
[reg
]);
3490 assemble_name (file
, buf
);
3491 asm_fprintf (file
, "@l\n");
3495 asm_fprintf (file
, "\tcal %s,", reg_names
[reg
]);
3496 assemble_name (file
, buf
);
3497 asm_fprintf (file
, "@l(%s)\n", reg_names
[reg
]);
3503 #else /* !USING_SVR4_H */
3504 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 0);
3505 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[reg
]);
3506 assemble_name (file
, buf
);
3507 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
3508 #endif /* USING_SVR4_H */
3512 /* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy
3513 of the old frame is left in r12. */
3516 rs6000_allocate_stack_space (file
, size
, copy_r12
)
3521 int neg_size
= -size
;
3526 (TARGET_32BIT
) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3527 reg_names
[1], neg_size
, reg_names
[1]);
3531 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3533 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3534 reg_names
[0], (neg_size
>> 16) & 0xffff,
3535 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3537 (TARGET_32BIT
) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3538 reg_names
[1], reg_names
[1], reg_names
[0]);
3543 fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3546 if (TARGET_NEW_MNEMONICS
)
3547 fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], neg_size
);
3549 fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], neg_size
, reg_names
[1]);
3553 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3554 reg_names
[0], (neg_size
>> 16) & 0xffff,
3555 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3556 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n", reg_names
[1],
3557 reg_names
[0], reg_names
[1]);
3561 (TARGET_32BIT
) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n",
3562 reg_names
[12], reg_names
[1]);
3567 /* Write function prologue. */
3569 output_prolog (file
, size
)
3573 rs6000_stack_t
*info
= rs6000_stack_info ();
3574 int reg_size
= info
->reg_size
;
3582 store_reg
= "\t{st|stw} %s,%d(%s)\n";
3583 load_reg
= "\t{l|lwz} %s,%d(%s)\n";
3587 store_reg
= "\tstd %s,%d(%s)\n";
3588 load_reg
= "\tlld %s,%d(%s)\n";
3591 if (TARGET_DEBUG_STACK
)
3592 debug_stack_info (info
);
3594 /* Write .extern for any function we will call to save and restore fp
3596 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3597 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3598 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
3599 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3601 /* Write .extern for truncation routines, if needed. */
3602 if (rs6000_trunc_used
&& ! trunc_defined
)
3604 fprintf (file
, "\t.extern .%s\n\t.extern .%s\n",
3605 RS6000_ITRUNC
, RS6000_UITRUNC
);
3609 /* Write .extern for AIX common mode routines, if needed. */
3610 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
3612 fputs ("\t.extern __mulh\n", file
);
3613 fputs ("\t.extern __mull\n", file
);
3614 fputs ("\t.extern __divss\n", file
);
3615 fputs ("\t.extern __divus\n", file
);
3616 fputs ("\t.extern __quoss\n", file
);
3617 fputs ("\t.extern __quous\n", file
);
3618 common_mode_defined
= 1;
3621 /* For V.4, update stack before we do any saving and set back pointer. */
3622 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
3624 if (info
->total_size
< 32767)
3625 sp_offset
= info
->total_size
;
3628 rs6000_allocate_stack_space (file
, info
->total_size
, sp_reg
== 12);
3631 /* If we use the link register, get it into r0. */
3632 if (info
->lr_save_p
)
3633 asm_fprintf (file
, "\tmflr %s\n", reg_names
[0]);
3635 /* If we need to save CR, put it into r12. */
3636 if (info
->cr_save_p
&& sp_reg
!= 12)
3637 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[12]);
3639 /* Do any required saving of fpr's. If only one or two to save, do it
3640 ourself. Otherwise, call function. Note that since they are statically
3641 linked, we do not need a nop following them. */
3642 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3644 int regno
= info
->first_fp_reg_save
;
3645 int loc
= info
->fp_save_offset
+ sp_offset
;
3647 for ( ; regno
< 64; regno
++, loc
+= 8)
3648 asm_fprintf (file
, "\tstfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3650 else if (info
->first_fp_reg_save
!= 64)
3651 asm_fprintf (file
, "\tbl %s%d%s\n", SAVE_FP_PREFIX
,
3652 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
3654 /* Now save gpr's. */
3655 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3657 int regno
= info
->first_gp_reg_save
;
3658 int loc
= info
->gp_save_offset
+ sp_offset
;
3660 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3661 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3664 else if (info
->first_gp_reg_save
!= 32)
3665 asm_fprintf (file
, "\t{stm|stmw} %s,%d(%s)\n",
3666 reg_names
[info
->first_gp_reg_save
],
3667 info
->gp_save_offset
+ sp_offset
,
3670 /* Save main's arguments if we need to call a function */
3672 if (info
->main_save_p
)
3675 int loc
= info
->main_save_offset
+ sp_offset
;
3676 int size
= info
->main_size
;
3678 for (regno
= 3; size
> 0; regno
++, loc
-= reg_size
, size
-= reg_size
)
3679 asm_fprintf (file
, store_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3683 /* Save lr if we used it. */
3684 if (info
->lr_save_p
)
3685 asm_fprintf (file
, store_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
,
3688 /* Save CR if we use any that must be preserved. */
3689 if (info
->cr_save_p
)
3691 if (sp_reg
== 12) /* If r12 is used to hold the original sp, copy cr now */
3693 asm_fprintf (file
, "\tmfcr %s\n", reg_names
[0]);
3694 asm_fprintf (file
, store_reg
, reg_names
[0],
3695 info
->cr_save_offset
+ sp_offset
,
3699 asm_fprintf (file
, store_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
,
3703 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3705 if (DEFAULT_ABI
== ABI_NT
&& info
->total_size
> 4096)
3707 if (info
->total_size
< 32768)
3709 int probe_offset
= 4096;
3710 while (probe_offset
< info
->total_size
)
3712 asm_fprintf (file
, "\t{l|lwz} %s,%d(%s)\n", reg_names
[0], -probe_offset
, reg_names
[1]);
3713 probe_offset
+= 4096;
3718 int probe_iterations
= info
->total_size
/ 4096;
3719 static int probe_labelno
= 0;
3722 if (probe_iterations
< 32768)
3723 asm_fprintf (file
, "\tli %s,%d\n", reg_names
[12], probe_iterations
);
3726 asm_fprintf (file
, "\tlis %s,%d\n", reg_names
[12], probe_iterations
>> 16);
3727 if (probe_iterations
& 0xffff)
3728 asm_fprintf (file
, "\tori %s,%s,%d\n", reg_names
[12], reg_names
[12],
3729 probe_iterations
& 0xffff);
3731 asm_fprintf (file
, "\tmtctr %s\n", reg_names
[12]);
3732 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[12], reg_names
[1]);
3733 ASM_OUTPUT_INTERNAL_LABEL (file
, "LCprobe", probe_labelno
);
3734 asm_fprintf (file
, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names
[0], reg_names
[12]);
3735 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCprobe", probe_labelno
++);
3736 fputs ("\tbdnz ", file
);
3737 assemble_name (file
, buf
);
3742 /* Update stack and set back pointer unless this is V.4, which was done previously */
3743 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
3744 rs6000_allocate_stack_space (file
, info
->total_size
, FALSE
);
3746 /* Set frame pointer, if needed. */
3747 if (frame_pointer_needed
)
3748 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[31], reg_names
[1]);
3751 /* If we need to call a function to set things up for main, do so now
3752 before dealing with the TOC. */
3757 switch (DEFAULT_ABI
)
3759 case ABI_AIX
: prefix
= "."; break;
3760 case ABI_NT
: prefix
= ".."; break;
3763 fprintf (file
, "\tbl %s%s\n", prefix
, NAME__MAIN
);
3764 #ifdef RS6000_CALL_GLUE2
3765 fprintf (file
, "\t%s%s%s\n", RS6000_CALL_GLUE2
, prefix
, NAME_MAIN
);
3767 #ifdef RS6000_CALL_GLUE
3768 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
3769 fprintf (file
, "\t%s\n", RS6000_CALL_GLUE
);
3773 if (info
->main_save_p
)
3777 int size
= info
->main_size
;
3779 if (info
->total_size
< 32767)
3781 loc
= info
->total_size
+ info
->main_save_offset
;
3782 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3783 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[1]);
3787 int neg_size
= info
->main_save_offset
- info
->total_size
;
3789 asm_fprintf (file
, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3790 reg_names
[0], (neg_size
>> 16) & 0xffff,
3791 reg_names
[0], reg_names
[0], neg_size
& 0xffff);
3793 asm_fprintf (file
, "\t{sf|subf} %s,%s,%s\n", reg_names
[0], reg_names
[0],
3796 for (regno
= 3; size
> 0; regno
++, size
-= reg_size
, loc
-= reg_size
)
3797 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[0]);
3804 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3805 TOC_TABLE address into register 30. */
3806 if (TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
3810 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
3812 rs6000_output_load_toc_table (file
, 30);
3815 if (DEFAULT_ABI
== ABI_NT
)
3817 assemble_name (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
3818 fputs (".b:\n", file
);
3822 /* Write function epilogue. */
3825 output_epilog (file
, size
)
3829 rs6000_stack_t
*info
= rs6000_stack_info ();
3830 char *load_reg
= (TARGET_32BIT
) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3831 rtx insn
= get_last_insn ();
3836 /* If the last insn was a BARRIER, we don't have to write anything except
3838 if (GET_CODE (insn
) == NOTE
)
3839 insn
= prev_nonnote_insn (insn
);
3840 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
3842 /* If we have a frame pointer, a call to alloca, or a large stack
3843 frame, restore the old stack pointer using the backchain. Otherwise,
3844 we know what size to update it with. */
3845 if (frame_pointer_needed
|| current_function_calls_alloca
3846 || info
->total_size
> 32767)
3848 /* Under V.4, don't reset the stack pointer until after we're done
3849 loading the saved registers. */
3850 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3853 asm_fprintf (file
, load_reg
, reg_names
[sp_reg
], 0, reg_names
[1]);
3855 else if (info
->push_p
)
3857 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
3858 sp_offset
= info
->total_size
;
3859 else if (TARGET_NEW_MNEMONICS
)
3860 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], info
->total_size
);
3862 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], info
->total_size
, reg_names
[1]);
3865 /* Get the old lr if we saved it. */
3866 if (info
->lr_save_p
)
3867 asm_fprintf (file
, load_reg
, reg_names
[0], info
->lr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3869 /* Get the old cr if we saved it. */
3870 if (info
->cr_save_p
)
3871 asm_fprintf (file
, load_reg
, reg_names
[12], info
->cr_save_offset
+ sp_offset
, reg_names
[sp_reg
]);
3873 /* Set LR here to try to overlap restores below. */
3874 if (info
->lr_save_p
)
3875 asm_fprintf (file
, "\tmtlr %s\n", reg_names
[0]);
3877 /* Restore gpr's. */
3878 if (! TARGET_MULTIPLE
|| info
->first_gp_reg_save
== 31 || TARGET_64BIT
)
3880 int regno
= info
->first_gp_reg_save
;
3881 int loc
= info
->gp_save_offset
+ sp_offset
;
3882 int reg_size
= (TARGET_32BIT
) ? 4 : 8;
3884 for ( ; regno
< 32; regno
++, loc
+= reg_size
)
3885 asm_fprintf (file
, load_reg
, reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3888 else if (info
->first_gp_reg_save
!= 32)
3889 asm_fprintf (file
, "\t{lm|lmw} %s,%d(%s)\n",
3890 reg_names
[info
->first_gp_reg_save
],
3891 info
->gp_save_offset
+ sp_offset
,
3894 /* Restore fpr's if we can do it without calling a function. */
3895 if (FP_SAVE_INLINE (info
->first_fp_reg_save
))
3897 int regno
= info
->first_fp_reg_save
;
3898 int loc
= info
->fp_save_offset
+ sp_offset
;
3900 for ( ; regno
< 64; regno
++, loc
+= 8)
3901 asm_fprintf (file
, "\tlfd %s,%d(%s)\n", reg_names
[regno
], loc
, reg_names
[sp_reg
]);
3904 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3906 if (info
->cr_save_p
)
3907 asm_fprintf (file
, "\tmtcrf %d,%s\n",
3908 (regs_ever_live
[70] != 0) * 0x20
3909 + (regs_ever_live
[71] != 0) * 0x10
3910 + (regs_ever_live
[72] != 0) * 0x8, reg_names
[12]);
3912 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3915 if (TARGET_NEW_MNEMONICS
)
3916 asm_fprintf (file
, "\taddi %s,%s,%d\n", reg_names
[1], reg_names
[1], sp_offset
);
3918 asm_fprintf (file
, "\tcal %s,%d(%s)\n", reg_names
[1], sp_offset
, reg_names
[1]);
3920 else if (sp_reg
!= 1)
3921 asm_fprintf (file
, "\tmr %s,%s\n", reg_names
[1], reg_names
[sp_reg
]);
3923 /* If we have to restore more than two FP registers, branch to the
3924 restore function. It will return to our caller. */
3925 if (info
->first_fp_reg_save
!= 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
3926 asm_fprintf (file
, "\tb %s%d%s\n", RESTORE_FP_PREFIX
,
3927 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
3929 asm_fprintf (file
, "\t{br|blr}\n");
3932 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3935 We don't output a traceback table if -finhibit-size-directive was
3936 used. The documentation for -finhibit-size-directive reads
3937 ``don't output a @code{.size} assembler directive, or anything
3938 else that would cause trouble if the function is split in the
3939 middle, and the two halves are placed at locations far apart in
3940 memory.'' The traceback table has this property, since it
3941 includes the offset from the start of the function to the
3942 traceback table itself.
3944 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3945 different traceback table. */
3946 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
3948 char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
3949 int fixed_parms
, float_parms
, parm_info
;
3952 while (*fname
== '.') /* V.4 encodes . in the name */
3955 /* Need label immediately before tbtab, so we can compute its offset
3956 from the function start. */
3959 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
3960 ASM_OUTPUT_LABEL (file
, fname
);
3962 /* The .tbtab pseudo-op can only be used for the first eight
3963 expressions, since it can't handle the possibly variable
3964 length fields that follow. However, if you omit the optional
3965 fields, the assembler outputs zeros for all optional fields
3966 anyways, giving each variable length field is minimum length
3967 (as defined in sys/debug.h). Thus we can not use the .tbtab
3968 pseudo-op at all. */
3970 /* An all-zero word flags the start of the tbtab, for debuggers
3971 that have to find it by searching forward from the entry
3972 point or from the current pc. */
3973 fputs ("\t.long 0\n", file
);
3975 /* Tbtab format type. Use format type 0. */
3976 fputs ("\t.byte 0,", file
);
3978 /* Language type. Unfortunately, there doesn't seem to be any
3979 official way to get this info, so we use language_string. C
3980 is 0. C++ is 9. No number defined for Obj-C, so use the
3981 value for C for now. */
3982 if (! strcmp (language_string
, "GNU C")
3983 || ! strcmp (language_string
, "GNU Obj-C"))
3985 else if (! strcmp (language_string
, "GNU F77"))
3987 else if (! strcmp (language_string
, "GNU Ada"))
3989 else if (! strcmp (language_string
, "GNU Pascal"))
3991 else if (! strcmp (language_string
, "GNU C++"))
3995 fprintf (file
, "%d,", i
);
3997 /* 8 single bit fields: global linkage (not set for C extern linkage,
3998 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3999 from start of procedure stored in tbtab, internal function, function
4000 has controlled storage, function has no toc, function uses fp,
4001 function logs/aborts fp operations. */
4002 /* Assume that fp operations are used if any fp reg must be saved. */
4003 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
4005 /* 6 bitfields: function is interrupt handler, name present in
4006 proc table, function calls alloca, on condition directives
4007 (controls stack walks, 3 bits), saves condition reg, saves
4009 /* The `function calls alloca' bit seems to be set whenever reg 31 is
4010 set up as a frame pointer, even when there is no alloca call. */
4011 fprintf (file
, "%d,",
4012 ((1 << 6) | (frame_pointer_needed
<< 5)
4013 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
4015 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
4017 fprintf (file
, "%d,",
4018 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
4020 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
4021 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
4024 /* Compute the parameter info from the function decl argument
4027 int next_parm_info_bit
;
4029 next_parm_info_bit
= 31;
4034 for (decl
= DECL_ARGUMENTS (current_function_decl
);
4035 decl
; decl
= TREE_CHAIN (decl
))
4037 rtx parameter
= DECL_INCOMING_RTL (decl
);
4038 enum machine_mode mode
= GET_MODE (parameter
);
4040 if (GET_CODE (parameter
) == REG
)
4042 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4050 else if (mode
== DFmode
)
4055 /* If only one bit will fit, don't or in this entry. */
4056 if (next_parm_info_bit
> 0)
4057 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
4058 next_parm_info_bit
-= 2;
4062 fixed_parms
+= ((GET_MODE_SIZE (mode
)
4063 + (UNITS_PER_WORD
- 1))
4065 next_parm_info_bit
-= 1;
4071 /* Number of fixed point parameters. */
4072 /* This is actually the number of words of fixed point parameters; thus
4073 an 8 byte struct counts as 2; and thus the maximum value is 8. */
4074 fprintf (file
, "%d,", fixed_parms
);
4076 /* 2 bitfields: number of floating point parameters (7 bits), parameters
4078 /* This is actually the number of fp registers that hold parameters;
4079 and thus the maximum value is 13. */
4080 /* Set parameters on stack bit if parameters are not in their original
4081 registers, regardless of whether they are on the stack? Xlc
4082 seems to set the bit when not optimizing. */
4083 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
4085 /* Optional fields follow. Some are variable length. */
4087 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
4089 /* There is an entry for each parameter in a register, in the order that
4090 they occur in the parameter list. Any intervening arguments on the
4091 stack are ignored. If the list overflows a long (max possible length
4092 34 bits) then completely leave off all elements that don't fit. */
4093 /* Only emit this long if there was at least one parameter. */
4094 if (fixed_parms
|| float_parms
)
4095 fprintf (file
, "\t.long %d\n", parm_info
);
4097 /* Offset from start of code to tb table. */
4098 fputs ("\t.long ", file
);
4099 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
4100 RS6000_OUTPUT_BASENAME (file
, fname
);
4102 RS6000_OUTPUT_BASENAME (file
, fname
);
4105 /* Interrupt handler mask. */
4106 /* Omit this long, since we never set the interrupt handler bit
4109 /* Number of CTL (controlled storage) anchors. */
4110 /* Omit this long, since the has_ctl bit is never set above. */
4112 /* Displacement into stack of each CTL anchor. */
4113 /* Omit this list of longs, because there are no CTL anchors. */
4115 /* Length of function name. */
4116 fprintf (file
, "\t.short %d\n", strlen (fname
));
4118 /* Function name. */
4119 assemble_string (fname
, strlen (fname
));
4121 /* Register for alloca automatic storage; this is always reg 31.
4122 Only emit this if the alloca bit was set above. */
4123 if (frame_pointer_needed
)
4124 fputs ("\t.byte 31\n", file
);
4127 if (DEFAULT_ABI
== ABI_NT
)
4129 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4130 fputs (".e:\nFE_MOT_RESVD..", file
);
4131 RS6000_OUTPUT_BASENAME (file
, XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0));
4132 fputs (":\n", file
);
4136 /* Output a TOC entry. We derive the entry name from what is
4140 output_toc (file
, x
, labelno
)
4154 /* if we're going to put a double constant in the TOC, make sure it's
4155 aligned properly when strict alignment is on. */
4156 if (GET_CODE (x
) == CONST_DOUBLE
4158 && GET_MODE (x
) == DFmode
4159 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
4160 ASM_OUTPUT_ALIGN (file
, 3);
4164 if (TARGET_ELF
&& TARGET_MINIMAL_TOC
)
4166 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
4167 fprintf (file
, "%d = .-", labelno
);
4168 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LCTOC");
4169 fputs ("1\n", file
);
4172 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
4174 /* Handle FP constants specially. Note that if we have a minimal
4175 TOC, things we put here aren't actually in the TOC, so we can allow
4177 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
4178 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4183 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4184 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
4185 if (TARGET_MINIMAL_TOC
)
4186 fprintf (file
, "\t.long %ld\n\t.long %ld\n", k
[0], k
[1]);
4188 fprintf (file
, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
4189 k
[0], k
[1], k
[0], k
[1]);
4192 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
4193 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4198 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
4199 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
4201 if (TARGET_MINIMAL_TOC
)
4202 fprintf (file
, "\t.long %ld\n", l
);
4204 fprintf (file
, "\t.tc FS_%lx[TC],%ld\n", l
, l
);
4207 else if (GET_MODE (x
) == DImode
4208 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
4209 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
))
4214 if (GET_CODE (x
) == CONST_DOUBLE
)
4216 low
= CONST_DOUBLE_LOW (x
);
4217 high
= CONST_DOUBLE_HIGH (x
);
4220 #if HOST_BITS_PER_WIDE_INT == 32
4223 high
= (low
< 0) ? ~0 : 0;
4227 low
= INTVAL (x
) & 0xffffffff;
4228 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
4232 if (TARGET_MINIMAL_TOC
)
4233 fprintf (file
, "\t.long %ld\n\t.long %ld\n", (long)high
, (long)low
);
4235 fprintf (file
, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
4236 (long)high
, (long)low
, (long)high
, (long)low
);
4240 if (GET_CODE (x
) == CONST
)
4242 base
= XEXP (XEXP (x
, 0), 0);
4243 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
4246 if (GET_CODE (base
) == SYMBOL_REF
)
4247 name
= XSTR (base
, 0);
4248 else if (GET_CODE (base
) == LABEL_REF
)
4249 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
4250 else if (GET_CODE (base
) == CODE_LABEL
)
4251 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
4255 STRIP_NAME_ENCODING (real_name
, name
);
4256 if (TARGET_MINIMAL_TOC
)
4257 fputs ("\t.long ", file
);
4260 fprintf (file
, "\t.tc %s", real_name
);
4263 fprintf (file
, ".N%d", - offset
);
4265 fprintf (file
, ".P%d", offset
);
4267 fputs ("[TC],", file
);
4270 /* Currently C++ toc references to vtables can be emitted before it
4271 is decided whether the vtable is public or private. If this is
4272 the case, then the linker will eventually complain that there is
4273 a TOC reference to an unknown section. Thus, for vtables only,
4274 we emit the TOC reference to reference the symbol and not the
4276 if (!strncmp ("_vt.", name
, 4))
4278 RS6000_OUTPUT_BASENAME (file
, name
);
4280 fprintf (file
, "%d", offset
);
4281 else if (offset
> 0)
4282 fprintf (file
, "+%d", offset
);
4285 output_addr_const (file
, x
);
4289 /* Output an assembler pseudo-op to write an ASCII string of N characters
4290 starting at P to FILE.
4292 On the RS/6000, we have to do this using the .byte operation and
4293 write out special characters outside the quoted string.
4294 Also, the assembler is broken; very long strings are truncated,
4295 so we must artificially break them up early. */
4298 output_ascii (file
, p
, n
)
4304 int i
, count_string
;
4305 char *for_string
= "\t.byte \"";
4306 char *for_decimal
= "\t.byte ";
4307 char *to_close
= NULL
;
4310 for (i
= 0; i
< n
; i
++)
4313 if (c
>= ' ' && c
< 0177)
4316 fputs (for_string
, file
);
4319 /* Write two quotes to get one. */
4327 for_decimal
= "\"\n\t.byte ";
4331 if (count_string
>= 512)
4333 fputs (to_close
, file
);
4335 for_string
= "\t.byte \"";
4336 for_decimal
= "\t.byte ";
4344 fputs (for_decimal
, file
);
4345 fprintf (file
, "%d", c
);
4347 for_string
= "\n\t.byte \"";
4354 /* Now close the string if we have written one. Then end the line. */
4356 fprintf (file
, to_close
);
4359 /* Generate a unique section name for FILENAME for a section type
4360 represented by SECTION_DESC. Output goes into BUF.
4362 SECTION_DESC can be any string, as long as it is different for each
4363 possible section type.
4365 We name the section in the same manner as xlc. The name begins with an
4366 underscore followed by the filename (after stripping any leading directory
4367 names) with the last period replaced by the string SECTION_DESC. If
4368 FILENAME does not contain a period, SECTION_DESC is appended to the end of
4372 rs6000_gen_section_name (buf
, filename
, section_desc
)
4377 char *q
, *after_last_slash
, *last_period
;
4381 after_last_slash
= filename
;
4382 for (q
= filename
; *q
; q
++)
4385 after_last_slash
= q
+ 1;
4390 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
4391 *buf
= (char *) permalloc (len
);
4396 for (q
= after_last_slash
; *q
; q
++)
4398 if (q
== last_period
)
4400 strcpy (p
, section_desc
);
4401 p
+= strlen (section_desc
);
4404 else if (isalnum (*q
))
4408 if (last_period
== 0)
4409 strcpy (p
, section_desc
);
4414 /* Write function profiler code. */
4417 output_function_profiler (file
, labelno
)
4421 /* The last used parameter register. */
4426 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
4427 switch (DEFAULT_ABI
)
4434 case ABI_AIX_NODESC
:
4435 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
4438 fprintf (file
, "\tbl _GLOBAL_OFFSET_TABLE_@local-4\n");
4439 fprintf (file
, "\tmflr %s\n", reg_names
[11]);
4440 fprintf (file
, "\t%s %s,", (TARGET_NEW_MNEMONICS
) ? "lwz" : "l",
4442 assemble_name (file
, buf
);
4443 fprintf (file
, "@got(%s)\n", reg_names
[11]);
4446 else if (flag_pic
> 1 || TARGET_RELOCATABLE
)
4448 fprintf (file
, "\tstw %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4449 fprintf (file
, "%s\n", MINIMAL_TOC_SECTION_ASM_OP
);
4450 assemble_name (file
, buf
);
4451 fprintf (file
, "X = .-.LCTOC1\n");
4452 fprintf (file
, "\t.long ");
4453 assemble_name (file
, buf
);
4454 fputs ("\n\t.previous\n", file
);
4455 rs6000_pic_func_labelno
= rs6000_pic_labelno
;
4456 rs6000_output_load_toc_table (file
, 11);
4457 fprintf (file
, "\t%s %s,", (TARGET_NEW_MNEMONICS
) ? "lwz" : "l",
4459 assemble_name (file
, buf
);
4460 fprintf (file
, "X(%s)\n", reg_names
[11]);
4463 else if (TARGET_NEW_MNEMONICS
)
4465 fprintf (file
, "\taddis %s,%s,", reg_names
[11], reg_names
[11]);
4466 assemble_name (file
, buf
);
4467 fprintf (file
, "@ha\n");
4468 fprintf (file
, "\tstw %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4469 fprintf (file
, "\taddi %s,%s,", reg_names
[11], reg_names
[11]);
4470 assemble_name (file
, buf
);
4471 fputs ("@l\n", file
);
4475 fprintf (file
, "\tcau %s,%s,", reg_names
[11], reg_names
[11]);
4476 assemble_name (file
, buf
);
4477 fprintf (file
, "@ha\n");
4478 fprintf (file
, "\tst %s,4(%s)\n", reg_names
[0], reg_names
[1]);
4479 fprintf (file
, "\tcal %s,", reg_names
[11]);
4480 assemble_name (file
, buf
);
4481 fprintf (file
, "@l(%s)\n", reg_names
[11]);
4484 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
4488 /* Set up a TOC entry for the profiler label. */
4490 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
4491 if (TARGET_MINIMAL_TOC
)
4493 fputs ("\t.long ", file
);
4494 assemble_name (file
, buf
);
4499 fputs ("\t.tc\t", file
);
4500 assemble_name (file
, buf
);
4501 fputs ("[TC],", file
);
4502 assemble_name (file
, buf
);
4507 /* Figure out last used parameter register. The proper thing to do is
4508 to walk incoming args of the function. A function might have live
4509 parameter registers even if it has no incoming args. */
4511 for (last_parm_reg
= 10;
4512 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4516 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4517 it might be set up as the frame pointer. */
4519 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4520 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
4522 /* Load location address into r3, and call mcount. */
4524 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
4525 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[3]);
4526 assemble_name (file
, buf
);
4527 asm_fprintf (file
, "(%s)\n\tbl %s\n", reg_names
[2], RS6000_MCOUNT
);
4529 /* Restore parameter registers. */
4531 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
4532 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
4537 /* Adjust the cost of a scheduling dependency. Return the new cost of
4538 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4541 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
4547 if (! recog_memoized (insn
))
4550 if (REG_NOTE_KIND (link
) != 0)
4553 if (REG_NOTE_KIND (link
) == 0)
4555 /* Data dependency; DEP_INSN writes a register that INSN reads some
4558 /* Tell the first scheduling pass about the latency between a mtctr
4559 and bctr (and mtlr and br/blr). The first scheduling pass will not
4560 know about this latency since the mtctr instruction, which has the
4561 latency associated to it, will be generated by reload. */
4562 if (get_attr_type (insn
) == TYPE_JMPREG
)
4563 return TARGET_POWER
? 5 : 4;
4565 /* Fall out to return default cost. */
4571 /* Return how many instructions the machine can issue per cycle */
4572 int get_issue_rate()
4574 switch (rs6000_cpu_attr
) {
4594 /* Output assembler code for a block containing the constant parts
4595 of a trampoline, leaving space for the variable parts.
4597 The trampoline should set the static chain pointer to value placed
4598 into the trampoline and should branch to the specified routine. */
4601 rs6000_trampoline_template (file
)
4604 char *sc
= reg_names
[STATIC_CHAIN_REGNUM
];
4605 char *r0
= reg_names
[0];
4606 char *r2
= reg_names
[2];
4608 switch (DEFAULT_ABI
)
4613 /* Under AIX, this is not code at all, but merely a data area,
4614 since that is the way all functions are called. The first word is
4615 the address of the function, the second word is the TOC pointer (r2),
4616 and the third word is the static chain value. */
4621 /* V.4/eabi function pointers are just a single pointer, so we need to
4622 do the full gory code to load up the static chain. */
4625 case ABI_AIX_NODESC
:
4628 /* NT function pointers point to a two word area (real address, TOC)
4629 which unfortunately does not include a static chain field. So we
4630 use the function field to point to ..LTRAMP1 and the toc field
4631 to point to the whole table. */
4633 if (STATIC_CHAIN_REGNUM
== 0
4634 || STATIC_CHAIN_REGNUM
== 2
4636 || !TARGET_NEW_MNEMONICS
)
4639 fprintf (file
, "\t.ualong 0\n"); /* offset 0 */
4640 fprintf (file
, "\t.ualong 0\n"); /* offset 4 */
4641 fprintf (file
, "\t.ualong 0\n"); /* offset 8 */
4642 fprintf (file
, "\t.ualong 0\n"); /* offset 12 */
4643 fprintf (file
, "\t.ualong 0\n"); /* offset 16 */
4644 fprintf (file
, "..LTRAMP1..0:\n"); /* offset 20 */
4645 fprintf (file
, "\tlwz %s,8(%s)\n", r0
, r2
); /* offset 24 */
4646 fprintf (file
, "\tlwz %s,12(%s)\n", sc
, r2
); /* offset 28 */
4647 fprintf (file
, "\tmtctr %s\n", r0
); /* offset 32 */
4648 fprintf (file
, "\tlwz %s,16(%s)\n", r2
, r2
); /* offset 36 */
4649 fprintf (file
, "\tbctr\n"); /* offset 40 */
4656 /* Length in units of the trampoline for entering a nested function. */
4659 rs6000_trampoline_size ()
4663 switch (DEFAULT_ABI
)
4669 ret
= (TARGET_32BIT
) ? 12 : 24;
4674 case ABI_AIX_NODESC
:
4675 ret
= (TARGET_32BIT
) ? 40 : 48;
4686 /* Emit RTL insns to initialize the variable parts of a trampoline.
4687 FNADDR is an RTX for the address of the function's pure code.
4688 CXT is an RTX for the static chain value for the function. */
4691 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
4696 enum machine_mode pmode
= Pmode
;
4697 int regsize
= (TARGET_32BIT
) ? 4 : 8;
4698 rtx ctx_reg
= force_reg (pmode
, cxt
);
4700 switch (DEFAULT_ABI
)
4705 /* Macros to shorten the code expansions below. */
4706 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4707 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4709 /* Under AIX, just build the 3 word function descriptor */
4712 rtx fn_reg
= gen_reg_rtx (pmode
);
4713 rtx toc_reg
= gen_reg_rtx (pmode
);
4714 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4715 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
4716 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
4717 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
4718 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
4722 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
4725 case ABI_AIX_NODESC
:
4726 emit_library_call (gen_rtx (SYMBOL_REF
, SImode
, "__trampoline_setup"),
4729 GEN_INT (rs6000_trampoline_size ()), SImode
,
4734 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4735 the second word will point to the whole trampoline, third-fifth words
4736 will then have the real address, static chain, and toc value. */
4739 rtx tramp_reg
= gen_reg_rtx (pmode
);
4740 rtx fn_reg
= gen_reg_rtx (pmode
);
4741 rtx toc_reg
= gen_reg_rtx (pmode
);
4743 emit_move_insn (tramp_reg
, gen_rtx (SYMBOL_REF
, pmode
, "..LTRAMP1..0"));
4744 addr
= force_reg (pmode
, addr
);
4745 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
4746 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, regsize
));
4747 emit_move_insn (MEM_DEREF (addr
), tramp_reg
);
4748 emit_move_insn (MEM_PLUS (addr
, regsize
), addr
);
4749 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), fn_reg
);
4750 emit_move_insn (MEM_PLUS (addr
, 3*regsize
), ctx_reg
);
4751 emit_move_insn (MEM_PLUS (addr
, 4*regsize
), gen_rtx (REG
, pmode
, 2));
4760 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4761 with arguments ARGS is a valid machine specific attribute for DECL.
4762 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4765 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
4774 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4775 with arguments ARGS is a valid machine specific attribute for TYPE.
4776 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4779 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
4785 if (TREE_CODE (type
) != FUNCTION_TYPE
4786 && TREE_CODE (type
) != FIELD_DECL
4787 && TREE_CODE (type
) != TYPE_DECL
)
4790 /* Longcall attribute says that the function is not within 2**26 bytes
4791 of the current function, and to do an indirect call. */
4792 if (is_attribute_p ("longcall", identifier
))
4793 return (args
== NULL_TREE
);
4795 if (DEFAULT_ABI
== ABI_NT
)
4797 /* Stdcall attribute says callee is responsible for popping arguments
4798 if they are not variable. */
4799 if (is_attribute_p ("stdcall", identifier
))
4800 return (args
== NULL_TREE
);
4802 /* Cdecl attribute says the callee is a normal C declaration */
4803 if (is_attribute_p ("cdecl", identifier
))
4804 return (args
== NULL_TREE
);
4806 /* Dllimport attribute says says the caller is to call the function
4807 indirectly through a __imp_<name> pointer. */
4808 if (is_attribute_p ("dllimport", identifier
))
4809 return (args
== NULL_TREE
);
4811 /* Dllexport attribute says says the callee is to create a __imp_<name>
4813 if (is_attribute_p ("dllexport", identifier
))
4814 return (args
== NULL_TREE
);
4816 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4817 that will fill in the 3rd and 4th fields of the structured exception
4819 if (is_attribute_p ("exception", identifier
))
4823 if (args
== NULL_TREE
)
4826 for (i
= 0; i
< 2 && args
!= NULL_TREE
; i
++)
4828 tree this_arg
= TREE_VALUE (args
);
4829 args
= TREE_PURPOSE (args
);
4831 if (TREE_CODE (this_arg
) != STRING_CST
4832 && TREE_CODE (this_arg
) != IDENTIFIER_NODE
)
4836 return (args
== NULL_TREE
);
4843 /* If defined, a C expression whose value is zero if the attributes on
4844 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4845 two if they are nearly compatible (which causes a warning to be
4849 rs6000_comp_type_attributes (type1
, type2
)
4856 /* If defined, a C statement that assigns default attributes to newly
4860 rs6000_set_default_type_attributes (type
)
4865 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4867 rs6000_dll_import_ref (call_ref
)
4876 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4879 call_name
= XSTR (call_ref
, 0);
4880 len
= sizeof ("__imp_") + strlen (call_name
);
4882 reg2
= gen_reg_rtx (Pmode
);
4884 strcpy (p
, "__imp_");
4885 strcat (p
, call_name
);
4886 node
= get_identifier (p
);
4888 reg1
= force_reg (Pmode
, gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
)));
4889 emit_move_insn (reg2
, gen_rtx (MEM
, Pmode
, reg1
));
4894 /* Return a reference suitable for calling a function with the longcall attribute. */
4896 rs6000_longcall_ref (call_ref
)
4905 if (GET_CODE (call_ref
) != SYMBOL_REF
)
4908 /* System V adds '.' to the internal name, so skip them. */
4909 call_name
= XSTR (call_ref
, 0);
4910 if (*call_name
== '.')
4912 while (*call_name
== '.')
4915 node
= get_identifier (call_name
);
4916 call_ref
= gen_rtx (SYMBOL_REF
, VOIDmode
, IDENTIFIER_POINTER (node
));
4919 return force_reg (Pmode
, call_ref
);
4923 /* A C statement or statements to switch to the appropriate section
4924 for output of RTX in mode MODE. You can assume that RTX is some
4925 kind of constant in RTL. The argument MODE is redundant except in
4926 the case of a `const_int' rtx. Select the section by calling
4927 `text_section' or one of the alternatives for other sections.
4929 Do not define this macro if you put all constants in the read-only
4935 rs6000_select_rtx_section (mode
, x
)
4936 enum machine_mode mode
;
4939 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
))
4945 /* A C statement or statements to switch to the appropriate
4946 section for output of DECL. DECL is either a `VAR_DECL' node
4947 or a constant of some sort. RELOC indicates whether forming
4948 the initial value of DECL requires link-time relocations. */
4951 rs6000_select_section (decl
, reloc
)
4955 int size
= int_size_in_bytes (TREE_TYPE (decl
));
4957 if (TREE_CODE (decl
) == STRING_CST
)
4959 if (! flag_writable_strings
)
4964 else if (TREE_CODE (decl
) == VAR_DECL
)
4966 if ((flag_pic
&& reloc
)
4967 || !TREE_READONLY (decl
)
4968 || TREE_SIDE_EFFECTS (decl
)
4969 || !DECL_INITIAL (decl
)
4970 || (DECL_INITIAL (decl
) != error_mark_node
4971 && !TREE_CONSTANT (DECL_INITIAL (decl
))))
4973 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
4980 if (rs6000_sdata
!= SDATA_NONE
&& (size
> 0) && (size
<= g_switch_value
))
4982 if (rs6000_sdata
== SDATA_EABI
)
4985 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
4997 /* If we are referencing a function that is static or is known to be
4998 in this file, make the SYMBOL_REF special. We can use this to indicate
4999 that we can branch to this function without emitting a no-op after the
5000 call. For real AIX and NT calling sequences, we also replace the
5001 function name with the real name (1 or 2 leading .'s), rather than
5002 the function descriptor name. This saves a lot of overriding code
5003 to readd the prefixes. */
5006 rs6000_encode_section_info (decl
)
5009 if (TREE_CODE (decl
) == FUNCTION_DECL
)
5011 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5012 if (TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
5013 SYMBOL_REF_FLAG (sym_ref
) = 1;
5015 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_NT
)
5017 char *prefix
= (DEFAULT_ABI
== ABI_AIX
) ? "." : "..";
5018 char *str
= permalloc (strlen (prefix
) + 1
5019 + strlen (XSTR (sym_ref
, 0)));
5020 strcpy (str
, prefix
);
5021 strcat (str
, XSTR (sym_ref
, 0));
5022 XSTR (sym_ref
, 0) = str
;
5025 else if (rs6000_sdata
!= SDATA_NONE
5026 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5027 && TREE_CODE (decl
) == VAR_DECL
)
5029 int size
= int_size_in_bytes (TREE_TYPE (decl
));
5030 tree section_name
= DECL_SECTION_NAME (decl
);
5031 char *name
= (char *)0;
5036 if (TREE_CODE (section_name
) == STRING_CST
)
5038 name
= TREE_STRING_POINTER (section_name
);
5039 len
= TREE_STRING_LENGTH (section_name
);
5045 if ((size
> 0 && size
<= g_switch_value
)
5047 && ((len
== sizeof (".sdata")-1 && strcmp (name
, ".sdata") == 0)
5048 || (len
== sizeof (".sdata2")-1 && strcmp (name
, ".sdata2") == 0)
5049 || (len
== sizeof (".sbss")-1 && strcmp (name
, ".sbss") == 0)
5050 || (len
== sizeof (".sbss2")-1 && strcmp (name
, ".sbss2") == 0)
5051 || (len
== sizeof (".PPC.EMB.sdata0")-1 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
5052 || (len
== sizeof (".PPC.EMB.sbss0")-1 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
5054 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
5055 char *str
= permalloc (2 + strlen (XSTR (sym_ref
, 0)));
5057 strcat (str
, XSTR (sym_ref
, 0));
5058 XSTR (sym_ref
, 0) = str
;
5063 #endif /* USING_SVR4_H */