1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-attr.h"
40 #include "basic-block.h"
46 #ifndef TARGET_NO_PROTOTYPE
47 #define TARGET_NO_PROTOTYPE 0
50 extern int profile_block_flag
;
52 #define min(A,B) ((A) < (B) ? (A) : (B))
53 #define max(A,B) ((A) > (B) ? (A) : (B))
57 enum processor_type rs6000_cpu
;
58 struct rs6000_cpu_select rs6000_select
[3] =
60 /* switch name, tune arch */
61 { (const char *)0, "--with-cpu=", 1, 1 },
62 { (const char *)0, "-mcpu=", 1, 1 },
63 { (const char *)0, "-mtune=", 1, 0 },
66 /* Set to non-zero once AIX common-mode calls have been defined. */
67 static int common_mode_defined
;
69 /* Save information from a "cmpxx" operation until the branch or scc is
71 rtx rs6000_compare_op0
, rs6000_compare_op1
;
72 int rs6000_compare_fp_p
;
74 /* Label number of label created for -mrelocatable, to call to so we can
75 get the address of the GOT section */
76 int rs6000_pic_labelno
;
79 /* Which abi to adhere to */
80 const char *rs6000_abi_name
= RS6000_ABI_NAME
;
82 /* Semantics of the small data area */
83 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
85 /* Which small data model to use */
86 const char *rs6000_sdata_name
= (char *)0;
88 /* Counter for labels which are to be placed in .fixup. */
92 /* ABI enumeration available for subtarget to use. */
93 enum rs6000_abi rs6000_current_abi
;
96 const char *rs6000_debug_name
;
97 int rs6000_debug_stack
; /* debug stack applications */
98 int rs6000_debug_arg
; /* debug argument handling */
100 /* Flag to say the TOC is initialized */
102 char toc_label_name
[10];
104 /* Alias set for saves and restores from the rs6000 stack. */
105 static int rs6000_sr_alias_set
;
107 static void rs6000_add_gc_roots
PARAMS ((void));
108 static int num_insns_constant_wide
PARAMS ((HOST_WIDE_INT
));
109 static rtx expand_block_move_mem
PARAMS ((enum machine_mode
, rtx
, rtx
));
110 static void validate_condition_mode
111 PARAMS ((enum rtx_code
, enum machine_mode
));
112 static rtx rs6000_generate_compare
PARAMS ((enum rtx_code
));
113 static void rs6000_maybe_dead
PARAMS ((rtx
));
114 static void rs6000_emit_stack_tie
PARAMS ((void));
115 static void rs6000_frame_related
PARAMS ((rtx
, rtx
, HOST_WIDE_INT
, rtx
, rtx
));
116 static void rs6000_emit_allocate_stack
PARAMS ((HOST_WIDE_INT
, int));
117 static unsigned rs6000_hash_constant
PARAMS ((rtx
));
118 static unsigned toc_hash_function
PARAMS ((const void *));
119 static int toc_hash_eq
PARAMS ((const void *, const void *));
120 static int toc_hash_mark_entry
PARAMS ((void **, void *));
121 static void toc_hash_mark_table
PARAMS ((void *));
122 static int constant_pool_expr_1
PARAMS ((rtx
, int *, int *));
123 static void rs6000_free_machine_status
PARAMS ((struct function
*));
124 static void rs6000_init_machine_status
PARAMS ((struct function
*));
125 static void rs6000_mark_machine_status
PARAMS ((struct function
*));
126 static int rs6000_ra_ever_killed
PARAMS ((void));
128 /* Default register names. */
129 char rs6000_reg_names
[][8] =
131 "0", "1", "2", "3", "4", "5", "6", "7",
132 "8", "9", "10", "11", "12", "13", "14", "15",
133 "16", "17", "18", "19", "20", "21", "22", "23",
134 "24", "25", "26", "27", "28", "29", "30", "31",
135 "0", "1", "2", "3", "4", "5", "6", "7",
136 "8", "9", "10", "11", "12", "13", "14", "15",
137 "16", "17", "18", "19", "20", "21", "22", "23",
138 "24", "25", "26", "27", "28", "29", "30", "31",
139 "mq", "lr", "ctr","ap",
140 "0", "1", "2", "3", "4", "5", "6", "7",
144 #ifdef TARGET_REGNAMES
145 static char alt_reg_names
[][8] =
147 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
148 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
149 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
150 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
151 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
152 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
153 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
154 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
155 "mq", "lr", "ctr", "ap",
156 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
161 #ifndef MASK_STRICT_ALIGN
162 #define MASK_STRICT_ALIGN 0
165 /* Override command line options. Mostly we process the processor
166 type and sometimes adjust other TARGET_ options. */
169 rs6000_override_options (default_cpu
)
170 const char *default_cpu
;
173 struct rs6000_cpu_select
*ptr
;
175 /* Simplify the entries below by making a mask for any POWER
176 variant and any PowerPC variant. */
178 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
179 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
180 | MASK_PPC_GFXOPT | MASK_POWERPC64)
181 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
185 const char *name
; /* Canonical processor name. */
186 enum processor_type processor
; /* Processor type enum value. */
187 int target_enable
; /* Target flags to enable. */
188 int target_disable
; /* Target flags to disable. */
189 } processor_target_table
[]
190 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
191 POWER_MASKS
| POWERPC_MASKS
},
192 {"power", PROCESSOR_POWER
,
193 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
194 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
195 {"power2", PROCESSOR_POWER
,
196 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
197 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
198 {"power3", PROCESSOR_PPC630
,
199 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
200 POWER_MASKS
| MASK_PPC_GPOPT
},
201 {"powerpc", PROCESSOR_POWERPC
,
202 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
203 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
204 {"powerpc64", PROCESSOR_POWERPC64
,
205 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
,
206 POWER_MASKS
| POWERPC_OPT_MASKS
},
207 {"rios", PROCESSOR_RIOS1
,
208 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
209 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
210 {"rios1", PROCESSOR_RIOS1
,
211 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
212 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
213 {"rsc", PROCESSOR_PPC601
,
214 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
215 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
216 {"rsc1", PROCESSOR_PPC601
,
217 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
218 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
219 {"rios2", PROCESSOR_RIOS2
,
220 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
221 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
222 {"rs64a", PROCESSOR_RS64A
,
223 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
224 POWER_MASKS
| POWERPC_OPT_MASKS
},
225 {"401", PROCESSOR_PPC403
,
226 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
227 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
228 {"403", PROCESSOR_PPC403
,
229 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
230 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
231 {"505", PROCESSOR_MPCCORE
,
232 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
233 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
234 {"601", PROCESSOR_PPC601
,
235 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
236 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
237 {"602", PROCESSOR_PPC603
,
238 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
239 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
240 {"603", PROCESSOR_PPC603
,
241 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
242 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
243 {"603e", PROCESSOR_PPC603
,
244 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
245 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
246 {"ec603e", PROCESSOR_PPC603
,
247 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
248 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
249 {"604", PROCESSOR_PPC604
,
250 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
251 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
252 {"604e", PROCESSOR_PPC604e
,
253 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
254 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
255 {"620", PROCESSOR_PPC620
,
256 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
257 POWER_MASKS
| MASK_PPC_GPOPT
},
258 {"630", PROCESSOR_PPC630
,
259 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
260 POWER_MASKS
| MASK_PPC_GPOPT
},
261 {"740", PROCESSOR_PPC750
,
262 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
263 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
264 {"750", PROCESSOR_PPC750
,
265 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
266 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
267 {"801", PROCESSOR_MPCCORE
,
268 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
269 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
270 {"821", PROCESSOR_MPCCORE
,
271 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
272 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
273 {"823", PROCESSOR_MPCCORE
,
274 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
275 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
276 {"860", PROCESSOR_MPCCORE
,
277 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
278 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
280 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
282 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
283 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
285 profile_block_flag
= 0;
287 /* Identify the processor type */
288 rs6000_select
[0].string
= default_cpu
;
289 rs6000_cpu
= TARGET_POWERPC64
? PROCESSOR_DEFAULT64
: PROCESSOR_DEFAULT
;
291 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
293 ptr
= &rs6000_select
[i
];
294 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
296 for (j
= 0; j
< ptt_size
; j
++)
297 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
300 rs6000_cpu
= processor_target_table
[j
].processor
;
304 target_flags
|= processor_target_table
[j
].target_enable
;
305 target_flags
&= ~processor_target_table
[j
].target_disable
;
311 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
315 /* If we are optimizing big endian systems for space, use the
316 store multiple instructions. */
317 if (BYTES_BIG_ENDIAN
&& optimize_size
)
318 target_flags
|= MASK_MULTIPLE
;
320 /* If -mmultiple or -mno-multiple was explicitly used, don't
321 override with the processor default */
322 if (TARGET_MULTIPLE_SET
)
323 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
325 /* If -mstring or -mno-string was explicitly used, don't
326 override with the processor default */
327 if (TARGET_STRING_SET
)
328 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
330 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
331 is a 750, because the hardware doesn't support the instructions used in
332 little endian mode, and causes an alignment trap. The 750 does not cause
333 an alignment trap (except when the target is unaligned). */
335 if (! BYTES_BIG_ENDIAN
&& rs6000_cpu
!= PROCESSOR_PPC750
)
339 target_flags
&= ~MASK_MULTIPLE
;
340 if (TARGET_MULTIPLE_SET
)
341 warning ("-mmultiple is not supported on little endian systems");
346 target_flags
&= ~MASK_STRING
;
347 if (TARGET_STRING_SET
)
348 warning ("-mstring is not supported on little endian systems");
352 if (flag_pic
&& (DEFAULT_ABI
== ABI_AIX
))
354 warning ("-f%s ignored for AIX (all code is position independent)",
355 (flag_pic
> 1) ? "PIC" : "pic");
359 if (flag_function_sections
&& (write_symbols
!= NO_DEBUG
)
360 && (DEFAULT_ABI
== ABI_AIX
))
362 warning ("-ffunction-sections disabled on AIX when debugging");
363 flag_function_sections
= 0;
366 if (flag_data_sections
&& (DEFAULT_ABI
== ABI_AIX
))
368 warning ("-fdata-sections not supported on AIX");
369 flag_data_sections
= 0;
372 /* Set debug flags */
373 if (rs6000_debug_name
)
375 if (! strcmp (rs6000_debug_name
, "all"))
376 rs6000_debug_stack
= rs6000_debug_arg
= 1;
377 else if (! strcmp (rs6000_debug_name
, "stack"))
378 rs6000_debug_stack
= 1;
379 else if (! strcmp (rs6000_debug_name
, "arg"))
380 rs6000_debug_arg
= 1;
382 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
385 #ifdef TARGET_REGNAMES
386 /* If the user desires alternate register names, copy in the alternate names
389 memcpy (rs6000_reg_names
, alt_reg_names
, sizeof (rs6000_reg_names
));
392 #ifdef SUBTARGET_OVERRIDE_OPTIONS
393 SUBTARGET_OVERRIDE_OPTIONS
;
396 /* Register global variables with the garbage collector. */
397 rs6000_add_gc_roots ();
399 /* Allocate an alias set for register saves & restores from stack. */
400 rs6000_sr_alias_set
= new_alias_set ();
403 ASM_GENERATE_INTERNAL_LABEL (toc_label_name
, "LCTOC", 1);
405 /* Arrange to save and restore machine status around nested functions. */
406 init_machine_status
= rs6000_init_machine_status
;
407 mark_machine_status
= rs6000_mark_machine_status
;
408 free_machine_status
= rs6000_free_machine_status
;
412 optimization_options (level
, size
)
413 int level ATTRIBUTE_UNUSED
;
414 int size ATTRIBUTE_UNUSED
;
418 /* Do anything needed at the start of the asm file. */
421 rs6000_file_start (file
, default_cpu
)
423 const char *default_cpu
;
427 const char *start
= buffer
;
428 struct rs6000_cpu_select
*ptr
;
430 if (flag_verbose_asm
)
432 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
433 rs6000_select
[0].string
= default_cpu
;
435 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
437 ptr
= &rs6000_select
[i
];
438 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
440 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
446 switch (rs6000_sdata
)
448 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
449 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
450 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
451 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
454 if (rs6000_sdata
&& g_switch_value
)
456 fprintf (file
, "%s -G %d", start
, g_switch_value
);
467 /* Create a CONST_DOUBLE from a string. */
470 rs6000_float_const (string
, mode
)
472 enum machine_mode mode
;
474 REAL_VALUE_TYPE value
;
475 value
= REAL_VALUE_ATOF (string
, mode
);
476 return immed_real_const_1 (value
, mode
);
479 /* Return non-zero if this function is known to have a null epilogue. */
484 if (reload_completed
)
486 rs6000_stack_t
*info
= rs6000_stack_info ();
488 if (info
->first_gp_reg_save
== 32
489 && info
->first_fp_reg_save
== 64
499 /* Returns 1 always. */
502 any_operand (op
, mode
)
503 register rtx op ATTRIBUTE_UNUSED
;
504 enum machine_mode mode ATTRIBUTE_UNUSED
;
509 /* Returns 1 if op is the count register */
511 count_register_operand(op
, mode
)
513 enum machine_mode mode ATTRIBUTE_UNUSED
;
515 if (GET_CODE (op
) != REG
)
518 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
521 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
528 xer_operand(op
, mode
)
530 enum machine_mode mode ATTRIBUTE_UNUSED
;
532 if (GET_CODE (op
) != REG
)
535 if (XER_REGNO_P (REGNO (op
)))
541 /* Return 1 if OP is a constant that can fit in a D field. */
544 short_cint_operand (op
, mode
)
546 enum machine_mode mode ATTRIBUTE_UNUSED
;
548 return (GET_CODE (op
) == CONST_INT
549 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'));
552 /* Similar for a unsigned D field. */
555 u_short_cint_operand (op
, mode
)
557 enum machine_mode mode ATTRIBUTE_UNUSED
;
559 return (GET_CODE (op
) == CONST_INT
560 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'));
563 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
566 non_short_cint_operand (op
, mode
)
568 enum machine_mode mode ATTRIBUTE_UNUSED
;
570 return (GET_CODE (op
) == CONST_INT
571 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
574 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
578 gpc_reg_operand (op
, mode
)
580 enum machine_mode mode
;
582 return (register_operand (op
, mode
)
583 && (GET_CODE (op
) != REG
584 || (REGNO (op
) >= ARG_POINTER_REGNUM
585 && !XER_REGNO_P (REGNO (op
)))
586 || REGNO (op
) < MQ_REGNO
));
589 /* Returns 1 if OP is either a pseudo-register or a register denoting a
593 cc_reg_operand (op
, mode
)
595 enum machine_mode mode
;
597 return (register_operand (op
, mode
)
598 && (GET_CODE (op
) != REG
599 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
600 || CR_REGNO_P (REGNO (op
))));
603 /* Returns 1 if OP is either a pseudo-register or a register denoting a
604 CR field that isn't CR0. */
607 cc_reg_not_cr0_operand (op
, mode
)
609 enum machine_mode mode
;
611 return (register_operand (op
, mode
)
612 && (GET_CODE (op
) != REG
613 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
614 || CR_REGNO_NOT_CR0_P (REGNO (op
))));
617 /* Returns 1 if OP is either a constant integer valid for a D-field or a
618 non-special register. If a register, it must be in the proper mode unless
622 reg_or_short_operand (op
, mode
)
624 enum machine_mode mode
;
626 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
629 /* Similar, except check if the negation of the constant would be valid for
633 reg_or_neg_short_operand (op
, mode
)
635 enum machine_mode mode
;
637 if (GET_CODE (op
) == CONST_INT
)
638 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
640 return gpc_reg_operand (op
, mode
);
643 /* Return 1 if the operand is either a register or an integer whose high-order
647 reg_or_u_short_operand (op
, mode
)
649 enum machine_mode mode
;
651 return u_short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
654 /* Return 1 is the operand is either a non-special register or ANY
658 reg_or_cint_operand (op
, mode
)
660 enum machine_mode mode
;
662 return (GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
));
665 /* Return 1 is the operand is either a non-special register or ANY
666 32-bit signed constant integer. */
669 reg_or_arith_cint_operand (op
, mode
)
671 enum machine_mode mode
;
673 return (gpc_reg_operand (op
, mode
)
674 || (GET_CODE (op
) == CONST_INT
675 #if HOST_BITS_PER_WIDE_INT != 32
676 && ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x80000000)
677 < (unsigned HOST_WIDE_INT
) 0x100000000ll
)
682 /* Return 1 is the operand is either a non-special register or ANY
683 32-bit unsigned constant integer. */
686 reg_or_logical_cint_operand (op
, mode
)
688 enum machine_mode mode
;
690 if (GET_CODE (op
) == CONST_INT
)
692 if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
694 if (GET_MODE_BITSIZE (mode
) <= 32)
701 return ((INTVAL (op
) & GET_MODE_MASK (mode
)
702 & (~ (unsigned HOST_WIDE_INT
) 0xffffffff)) == 0);
704 else if (GET_CODE (op
) == CONST_DOUBLE
)
706 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
710 return CONST_DOUBLE_HIGH (op
) == 0;
713 return gpc_reg_operand (op
, mode
);
716 /* Return 1 if the operand is an operand that can be loaded via the GOT */
719 got_operand (op
, mode
)
721 enum machine_mode mode ATTRIBUTE_UNUSED
;
723 return (GET_CODE (op
) == SYMBOL_REF
724 || GET_CODE (op
) == CONST
725 || GET_CODE (op
) == LABEL_REF
);
728 /* Return 1 if the operand is a simple references that can be loaded via
729 the GOT (labels involving addition aren't allowed). */
732 got_no_const_operand (op
, mode
)
734 enum machine_mode mode ATTRIBUTE_UNUSED
;
736 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
739 /* Return the number of instructions it takes to form a constant in an
743 num_insns_constant_wide (value
)
746 /* signed constant loadable with {cal|addi} */
747 if (CONST_OK_FOR_LETTER_P (value
, 'I'))
750 /* constant loadable with {cau|addis} */
751 else if (CONST_OK_FOR_LETTER_P (value
, 'L'))
754 #if HOST_BITS_PER_WIDE_INT == 64
755 else if (TARGET_POWERPC64
)
757 HOST_WIDE_INT low
= value
& 0xffffffff;
758 HOST_WIDE_INT high
= value
>> 32;
760 low
= (low
^ 0x80000000) - 0x80000000; /* sign extend */
762 if (high
== 0 && (low
& 0x80000000) == 0)
765 else if (high
== -1 && (low
& 0x80000000) != 0)
769 return num_insns_constant_wide (high
) + 1;
772 return (num_insns_constant_wide (high
)
773 + num_insns_constant_wide (low
) + 1);
782 num_insns_constant (op
, mode
)
784 enum machine_mode mode
;
786 if (GET_CODE (op
) == CONST_INT
)
788 #if HOST_BITS_PER_WIDE_INT == 64
789 if (mask64_operand (op
, mode
))
793 return num_insns_constant_wide (INTVAL (op
));
796 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
801 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
802 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
803 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
806 else if (GET_CODE (op
) == CONST_DOUBLE
)
812 int endian
= (WORDS_BIG_ENDIAN
== 0);
814 if (mode
== VOIDmode
|| mode
== DImode
)
816 high
= CONST_DOUBLE_HIGH (op
);
817 low
= CONST_DOUBLE_LOW (op
);
821 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
822 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
828 return (num_insns_constant_wide (low
)
829 + num_insns_constant_wide (high
));
833 if (high
== 0 && (low
& 0x80000000) == 0)
834 return num_insns_constant_wide (low
);
836 else if (high
== -1 && (low
& 0x80000000) != 0)
837 return num_insns_constant_wide (low
);
839 else if (mask64_operand (op
, mode
))
843 return num_insns_constant_wide (high
) + 1;
846 return (num_insns_constant_wide (high
)
847 + num_insns_constant_wide (low
) + 1);
855 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
856 with one instruction per word. We only do this if we can safely read
857 CONST_DOUBLE_{LOW,HIGH}. */
860 easy_fp_constant (op
, mode
)
862 register enum machine_mode mode
;
864 if (GET_CODE (op
) != CONST_DOUBLE
865 || GET_MODE (op
) != mode
866 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
869 /* Consider all constants with -msoft-float to be easy */
870 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
873 /* If we are using V.4 style PIC, consider all constants to be hard */
874 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
877 #ifdef TARGET_RELOCATABLE
878 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
879 if (TARGET_RELOCATABLE
)
888 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
889 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
891 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
892 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
895 else if (mode
== SFmode
)
900 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
901 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
903 return num_insns_constant_wide (l
) == 1;
906 else if (mode
== DImode
)
907 return ((TARGET_POWERPC64
908 && GET_CODE (op
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (op
) == 0)
909 || (num_insns_constant (op
, DImode
) <= 2));
911 else if (mode
== SImode
)
917 /* Return 1 if the operand is in volatile memory. Note that during the
918 RTL generation phase, memory_operand does not return TRUE for
919 volatile memory references. So this function allows us to
920 recognize volatile references where its safe. */
923 volatile_mem_operand (op
, mode
)
925 enum machine_mode mode
;
927 if (GET_CODE (op
) != MEM
)
930 if (!MEM_VOLATILE_P (op
))
933 if (mode
!= GET_MODE (op
))
936 if (reload_completed
)
937 return memory_operand (op
, mode
);
939 if (reload_in_progress
)
940 return strict_memory_address_p (mode
, XEXP (op
, 0));
942 return memory_address_p (mode
, XEXP (op
, 0));
945 /* Return 1 if the operand is an offsettable memory operand. */
948 offsettable_mem_operand (op
, mode
)
950 enum machine_mode mode
;
952 return ((GET_CODE (op
) == MEM
)
953 && offsettable_address_p (reload_completed
|| reload_in_progress
,
954 mode
, XEXP (op
, 0)));
957 /* Return 1 if the operand is either an easy FP constant (see above) or
961 mem_or_easy_const_operand (op
, mode
)
963 enum machine_mode mode
;
965 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
968 /* Return 1 if the operand is either a non-special register or an item
969 that can be used as the operand of a `mode' add insn. */
972 add_operand (op
, mode
)
974 enum machine_mode mode
;
976 return (reg_or_short_operand (op
, mode
)
977 || (GET_CODE (op
) == CONST_INT
978 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L')));
981 /* Return 1 if OP is a constant but not a valid add_operand. */
984 non_add_cint_operand (op
, mode
)
986 enum machine_mode mode ATTRIBUTE_UNUSED
;
988 return (GET_CODE (op
) == CONST_INT
989 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
990 && ! CONST_OK_FOR_LETTER_P (INTVAL (op
), 'L'));
993 /* Return 1 if the operand is a non-special register or a constant that
994 can be used as the operand of an OR or XOR insn on the RS/6000. */
997 logical_operand (op
, mode
)
999 enum machine_mode mode
;
1001 /* an unsigned representation of 'op'. */
1002 unsigned HOST_WIDE_INT opl
, oph
;
1004 if (gpc_reg_operand (op
, mode
))
1007 if (GET_CODE (op
) == CONST_INT
)
1009 else if (GET_CODE (op
) == CONST_DOUBLE
)
1011 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1014 opl
= CONST_DOUBLE_LOW (op
);
1015 oph
= CONST_DOUBLE_HIGH (op
);
1017 if (oph
!= ((unsigned HOST_WIDE_INT
)0
1018 - ((opl
& ((unsigned HOST_WIDE_INT
)1
1019 << (HOST_BITS_PER_WIDE_INT
- 1))) != 0)))
1025 /* This must really be SImode, not MODE. */
1026 if (opl
!= (unsigned HOST_WIDE_INT
) trunc_int_for_mode (opl
, SImode
))
1029 return ((opl
& 0xffff) == 0
1030 || (opl
& ~ (unsigned HOST_WIDE_INT
) 0xffff) == 0);
1033 /* Return 1 if C is a constant that is not a logical operand (as
1034 above), but could be split into one. */
1037 non_logical_cint_operand (op
, mode
)
1039 enum machine_mode mode
;
1041 return ((GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
)
1042 && ! logical_operand (op
, mode
)
1043 && reg_or_logical_cint_operand (op
, mode
));
1046 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
1047 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
1048 Reject all ones and all zeros, since these should have been optimized
1049 away and confuse the making of MB and ME. */
1052 mask_operand (op
, mode
)
1054 enum machine_mode mode ATTRIBUTE_UNUSED
;
1059 int transitions
= 0;
1061 if (GET_CODE (op
) != CONST_INT
)
1066 if (c
== 0 || c
== ~0)
1069 last_bit_value
= c
& 1;
1071 for (i
= 1; i
< 32; i
++)
1072 if (((c
>>= 1) & 1) != last_bit_value
)
1073 last_bit_value
^= 1, transitions
++;
1075 return transitions
<= 2;
1078 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1079 It is if there are no more than one 1->0 or 0->1 transitions.
1080 Reject all ones and all zeros, since these should have been optimized
1081 away and confuse the making of MB and ME. */
1084 mask64_operand (op
, mode
)
1086 enum machine_mode mode
;
1088 if (GET_CODE (op
) == CONST_INT
)
1090 HOST_WIDE_INT c
= INTVAL (op
);
1093 int transitions
= 0;
1095 if (c
== 0 || c
== ~0)
1098 last_bit_value
= c
& 1;
1100 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1101 if (((c
>>= 1) & 1) != last_bit_value
)
1102 last_bit_value
^= 1, transitions
++;
1104 return transitions
<= 1;
1106 else if (GET_CODE (op
) == CONST_DOUBLE
1107 && (mode
== VOIDmode
|| mode
== DImode
))
1109 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1110 #if HOST_BITS_PER_WIDE_INT == 32
1111 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1115 int transitions
= 0;
1118 #if HOST_BITS_PER_WIDE_INT == 32
1123 #if HOST_BITS_PER_WIDE_INT == 32
1129 last_bit_value
= low
& 1;
1131 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1132 if (((low
>>= 1) & 1) != last_bit_value
)
1133 last_bit_value
^= 1, transitions
++;
1135 #if HOST_BITS_PER_WIDE_INT == 32
1136 if ((high
& 1) != last_bit_value
)
1137 last_bit_value
^= 1, transitions
++;
1139 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1140 if (((high
>>= 1) & 1) != last_bit_value
)
1141 last_bit_value
^= 1, transitions
++;
1144 return transitions
<= 1;
1150 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1151 It is if there are no more than two 1->0 or 0->1 transitions.
1152 Reject all ones and all zeros, since these should have been optimized
1153 away and confuse the making of MB and ME. */
1156 rldic_operand (op
, mode
)
1158 enum machine_mode mode
;
1160 if (GET_CODE (op
) == CONST_INT
)
1162 HOST_WIDE_INT c
= INTVAL (op
);
1165 int transitions
= 0;
1167 if (c
== 0 || c
== ~0)
1170 last_bit_value
= c
& 1;
1172 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1173 if (((c
>>= 1) & 1) != last_bit_value
)
1174 last_bit_value
^= 1, transitions
++;
1176 return transitions
<= 2;
1178 else if (GET_CODE (op
) == CONST_DOUBLE
1179 && (mode
== VOIDmode
|| mode
== DImode
))
1181 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1182 #if HOST_BITS_PER_WIDE_INT == 32
1183 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1187 int transitions
= 0;
1190 #if HOST_BITS_PER_WIDE_INT == 32
1195 #if HOST_BITS_PER_WIDE_INT == 32
1201 last_bit_value
= low
& 1;
1203 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1204 if (((low
>>= 1) & 1) != last_bit_value
)
1205 last_bit_value
^= 1, transitions
++;
1207 #if HOST_BITS_PER_WIDE_INT == 32
1208 if ((high
& 1) != last_bit_value
)
1209 last_bit_value
^= 1, transitions
++;
1211 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1212 if (((high
>>= 1) & 1) != last_bit_value
)
1213 last_bit_value
^= 1, transitions
++;
1216 return transitions
<= 2;
1222 /* Return 1 if the operand is either a non-special register or a constant
1223 that can be used as the operand of a PowerPC64 logical AND insn. */
1226 and64_operand (op
, mode
)
1228 enum machine_mode mode
;
1230 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1231 return (gpc_reg_operand (op
, mode
) || mask64_operand (op
, mode
));
1233 return (logical_operand (op
, mode
) || mask64_operand (op
, mode
));
1236 /* Return 1 if the operand is either a non-special register or a
1237 constant that can be used as the operand of an RS/6000 logical AND insn. */
1240 and_operand (op
, mode
)
1242 enum machine_mode mode
;
1244 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1245 return (gpc_reg_operand (op
, mode
) || mask_operand (op
, mode
));
1247 return (logical_operand (op
, mode
) || mask_operand (op
, mode
));
1250 /* Return 1 if the operand is a general register or memory operand. */
1253 reg_or_mem_operand (op
, mode
)
1255 register enum machine_mode mode
;
1257 return (gpc_reg_operand (op
, mode
)
1258 || memory_operand (op
, mode
)
1259 || volatile_mem_operand (op
, mode
));
1262 /* Return 1 if the operand is a general register or memory operand without
1263 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1267 lwa_operand (op
, mode
)
1269 register enum machine_mode mode
;
1273 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
1274 inner
= SUBREG_REG (inner
);
1276 return gpc_reg_operand (inner
, mode
)
1277 || (memory_operand (inner
, mode
)
1278 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
1279 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
1282 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1283 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1287 call_operand (op
, mode
)
1289 enum machine_mode mode
;
1291 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1294 return (GET_CODE (op
) == SYMBOL_REF
1295 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
1299 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1300 this file and the function is not weakly defined. */
1303 current_file_function_operand (op
, mode
)
1305 enum machine_mode mode ATTRIBUTE_UNUSED
;
1307 return (GET_CODE (op
) == SYMBOL_REF
1308 && (SYMBOL_REF_FLAG (op
)
1309 || (op
== XEXP (DECL_RTL (current_function_decl
), 0)
1310 && ! DECL_WEAK (current_function_decl
))));
1314 /* Return 1 if this operand is a valid input for a move insn. */
1317 input_operand (op
, mode
)
1319 enum machine_mode mode
;
1321 /* Memory is always valid. */
1322 if (memory_operand (op
, mode
))
1325 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1326 if (GET_CODE (op
) == CONSTANT_P_RTX
)
1329 /* For floating-point, easy constants are valid. */
1330 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1332 && easy_fp_constant (op
, mode
))
1335 /* Allow any integer constant. */
1336 if (GET_MODE_CLASS (mode
) == MODE_INT
1337 && (GET_CODE (op
) == CONST_INT
1338 || GET_CODE (op
) == CONST_DOUBLE
))
1341 /* For floating-point or multi-word mode, the only remaining valid type
1343 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1344 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1345 return register_operand (op
, mode
);
1347 /* The only cases left are integral modes one word or smaller (we
1348 do not get called for MODE_CC values). These can be in any
1350 if (register_operand (op
, mode
))
1353 /* A SYMBOL_REF referring to the TOC is valid. */
1354 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1357 /* A constant pool expression (relative to the TOC) is valid */
1358 if (TOC_RELATIVE_EXPR_P (op
))
1361 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1363 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1364 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1365 && small_data_operand (op
, Pmode
))
1371 /* Return 1 for an operand in small memory on V.4/eabi */
1374 small_data_operand (op
, mode
)
1375 rtx op ATTRIBUTE_UNUSED
;
1376 enum machine_mode mode ATTRIBUTE_UNUSED
;
1381 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1384 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1387 if (GET_CODE (op
) == SYMBOL_REF
)
1390 else if (GET_CODE (op
) != CONST
1391 || GET_CODE (XEXP (op
, 0)) != PLUS
1392 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1393 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1398 rtx sum
= XEXP (op
, 0);
1399 HOST_WIDE_INT summand
;
1401 /* We have to be careful here, because it is the referenced address
1402 that must be 32k from _SDA_BASE_, not just the symbol. */
1403 summand
= INTVAL (XEXP (sum
, 1));
1404 if (summand
< 0 || summand
> g_switch_value
)
1407 sym_ref
= XEXP (sum
, 0);
1410 if (*XSTR (sym_ref
, 0) != '@')
1421 constant_pool_expr_1 (op
, have_sym
, have_toc
)
1426 switch (GET_CODE(op
))
1429 if (CONSTANT_POOL_ADDRESS_P (op
))
1431 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (op
), Pmode
))
1439 else if (! strcmp (XSTR (op
, 0), toc_label_name
))
1448 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
) &&
1449 constant_pool_expr_1 (XEXP (op
, 1), have_sym
, have_toc
);
1451 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
);
1460 constant_pool_expr_p (op
)
1465 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_sym
;
1469 toc_relative_expr_p (op
)
1474 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_toc
;
1477 /* Try machine-dependent ways of modifying an illegitimate address
1478 to be legitimate. If we find one, return the new, valid address.
1479 This is used from only one place: `memory_address' in explow.c.
1481 OLDX is the address as it was before break_out_memory_refs was called.
1482 In some cases it is useful to look at this to decide what needs to be done.
1484 MODE is passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS.
1486 It is always safe for this macro to do nothing. It exists to recognize
1487 opportunities to optimize the output.
1489 On RS/6000, first check for the sum of a register with a constant
1490 integer that is out of range. If so, generate code to add the
1491 constant with the low-order 16 bits masked to the register and force
1492 this result into another register (this can be done with `cau').
1493 Then generate an address of REG+(CONST&0xffff), allowing for the
1494 possibility of bit 16 being a one.
1496 Then check for the sum of a register and something not constant, try to
1497 load the other things into a register and return the sum. */
1499 rs6000_legitimize_address (x
, oldx
, mode
)
1501 rtx oldx ATTRIBUTE_UNUSED
;
1502 enum machine_mode mode
;
1504 if (GET_CODE (x
) == PLUS
1505 && GET_CODE (XEXP (x
, 0)) == REG
1506 && GET_CODE (XEXP (x
, 1)) == CONST_INT
1507 && (unsigned HOST_WIDE_INT
) (INTVAL (XEXP (x
, 1)) + 0x8000) >= 0x10000)
1509 HOST_WIDE_INT high_int
, low_int
;
1511 high_int
= INTVAL (XEXP (x
, 1)) & (~ (HOST_WIDE_INT
) 0xffff);
1512 low_int
= INTVAL (XEXP (x
, 1)) & 0xffff;
1513 if (low_int
& 0x8000)
1514 high_int
+= 0x10000, low_int
|= ((HOST_WIDE_INT
) -1) << 16;
1515 sum
= force_operand (gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1516 GEN_INT (high_int
)), 0);
1517 return gen_rtx_PLUS (Pmode
, sum
, GEN_INT (low_int
));
1519 else if (GET_CODE (x
) == PLUS
1520 && GET_CODE (XEXP (x
, 0)) == REG
1521 && GET_CODE (XEXP (x
, 1)) != CONST_INT
1522 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1523 && (TARGET_POWERPC64
|| mode
!= DImode
)
1526 return gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1527 force_reg (Pmode
, force_operand (XEXP (x
, 1), 0)));
1529 else if (TARGET_ELF
&& TARGET_32BIT
&& TARGET_NO_TOC
&& ! flag_pic
1530 && GET_CODE (x
) != CONST_INT
1531 && GET_CODE (x
) != CONST_DOUBLE
1533 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1537 rtx reg
= gen_reg_rtx (Pmode
);
1538 emit_insn (gen_elf_high (reg
, (x
)));
1539 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1541 else if (TARGET_MACHO
&& TARGET_32BIT
&& TARGET_NO_TOC
1543 && GET_CODE (x
) != CONST_INT
1544 && GET_CODE (x
) != CONST_DOUBLE
1546 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1550 rtx reg
= gen_reg_rtx (Pmode
);
1551 emit_insn (gen_macho_high (reg
, (x
)));
1552 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1555 && CONSTANT_POOL_EXPR_P (x
)
1556 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (x
), Pmode
))
1558 return create_TOC_reference (x
);
1564 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1565 that is a valid memory address for an instruction.
1566 The MODE argument is the machine mode for the MEM expression
1567 that wants to use this address.
1569 On the RS/6000, there are four valid address: a SYMBOL_REF that
1570 refers to a constant pool entry of an address (or the sum of it
1571 plus a constant), a short (16-bit signed) constant plus a register,
1572 the sum of two registers, or a register indirect, possibly with an
1573 auto-increment. For DFmode and DImode with an constant plus register,
1574 we must ensure that both words are addressable or PowerPC64 with offset
1577 For modes spanning multiple registers (DFmode in 32-bit GPRs,
1578 32-bit DImode, TImode), indexed addressing cannot be used because
1579 adjacent memory cells are accessed by adding word-sized offsets
1580 during assembly output. */
1582 rs6000_legitimate_address (mode
, x
, reg_ok_strict
)
1583 enum machine_mode mode
;
1587 if (LEGITIMATE_INDIRECT_ADDRESS_P (x
, reg_ok_strict
))
1589 if ((GET_CODE (x
) == PRE_INC
|| GET_CODE (x
) == PRE_DEC
)
1591 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (x
, 0), reg_ok_strict
))
1593 if (LEGITIMATE_SMALL_DATA_P (mode
, x
))
1595 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
1597 /* If not REG_OK_STRICT (before reload) let pass any stack offset. */
1599 && GET_CODE (x
) == PLUS
1600 && GET_CODE (XEXP (x
, 0)) == REG
1601 && XEXP (x
, 0) == virtual_stack_vars_rtx
1602 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
1604 if (LEGITIMATE_OFFSET_ADDRESS_P (mode
, x
, reg_ok_strict
))
1607 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1608 && (TARGET_POWERPC64
|| mode
!= DImode
)
1609 && LEGITIMATE_INDEXED_ADDRESS_P (x
, reg_ok_strict
))
1611 if (LEGITIMATE_LO_SUM_ADDRESS_P (mode
, x
, reg_ok_strict
))
1616 /* Emit a move from SOURCE to DEST in mode MODE. */
1618 rs6000_emit_move (dest
, source
, mode
)
1621 enum machine_mode mode
;
1625 operands
[1] = source
;
1627 /* Sanity checks. Check that we get CONST_DOUBLE only when we should. */
1628 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1629 && ! FLOAT_MODE_P (mode
)
1630 && GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1632 /* FIXME. This should never happen. */
1633 /* Since it seems that it does, do the safe thing and convert
1636 GEN_INT (trunc_int_for_mode (CONST_DOUBLE_LOW (operands
[1]), mode
));
1638 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1639 && ! FLOAT_MODE_P (mode
)
1640 && ((CONST_DOUBLE_HIGH (operands
[1]) == 0
1641 && CONST_DOUBLE_LOW (operands
[1]) >= 0)
1642 || (CONST_DOUBLE_HIGH (operands
[1]) == -1
1643 && CONST_DOUBLE_LOW (operands
[1]) < 0)))
1646 if (! no_new_pseudos
&& GET_CODE (operands
[0]) != REG
)
1647 operands
[1] = force_reg (mode
, operands
[1]);
1649 if (mode
== SFmode
&& ! TARGET_POWERPC
&& TARGET_HARD_FLOAT
1650 && GET_CODE (operands
[0]) == MEM
)
1654 if (reload_in_progress
|| reload_completed
)
1655 regnum
= true_regnum (operands
[1]);
1656 else if (GET_CODE (operands
[1]) == REG
)
1657 regnum
= REGNO (operands
[1]);
1661 /* If operands[1] is a register, on POWER it may have
1662 double-precision data in it, so truncate it to single
1664 if (FP_REGNO_P (regnum
) || regnum
>= FIRST_PSEUDO_REGISTER
)
1667 newreg
= (no_new_pseudos
? operands
[1] : gen_reg_rtx (mode
));
1668 emit_insn (gen_aux_truncdfsf2 (newreg
, operands
[1]));
1669 operands
[1] = newreg
;
1673 /* Handle the case where reload calls us with an invalid address;
1674 and the case of CONSTANT_P_RTX. */
1675 if (! general_operand (operands
[1], mode
)
1676 || ! nonimmediate_operand (operands
[0], mode
)
1677 || GET_CODE (operands
[1]) == CONSTANT_P_RTX
)
1679 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1683 /* FIXME: In the long term, this switch statement should go away
1684 and be replaced by a sequence of tests based on things like
1690 if (CONSTANT_P (operands
[1])
1691 && GET_CODE (operands
[1]) != CONST_INT
)
1692 operands
[1] = force_const_mem (mode
, operands
[1]);
1697 if (CONSTANT_P (operands
[1])
1698 && ! easy_fp_constant (operands
[1], mode
))
1699 operands
[1] = force_const_mem (mode
, operands
[1]);
1704 /* Use default pattern for address of ELF small data */
1707 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1708 && (GET_CODE (operands
[1]) == SYMBOL_REF
1709 || GET_CODE (operands
[1]) == CONST
)
1710 && small_data_operand (operands
[1], mode
))
1712 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1716 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1717 && mode
== Pmode
&& mode
== SImode
1718 && flag_pic
== 1 && got_operand (operands
[1], mode
))
1720 emit_insn (gen_movsi_got (operands
[0], operands
[1]));
1724 if ((TARGET_ELF
|| DEFAULT_ABI
== ABI_DARWIN
)
1725 && TARGET_NO_TOC
&& ! flag_pic
1727 && CONSTANT_P (operands
[1])
1728 && GET_CODE (operands
[1]) != HIGH
1729 && GET_CODE (operands
[1]) != CONST_INT
)
1731 rtx target
= (no_new_pseudos
? operands
[0] : gen_reg_rtx (mode
));
1733 /* If this is a function address on -mcall-aixdesc,
1734 convert it to the address of the descriptor. */
1735 if (DEFAULT_ABI
== ABI_AIX
1736 && GET_CODE (operands
[1]) == SYMBOL_REF
1737 && XSTR (operands
[1], 0)[0] == '.')
1739 const char *name
= XSTR (operands
[1], 0);
1741 while (*name
== '.')
1743 new_ref
= gen_rtx_SYMBOL_REF (Pmode
, name
);
1744 CONSTANT_POOL_ADDRESS_P (new_ref
)
1745 = CONSTANT_POOL_ADDRESS_P (operands
[1]);
1746 SYMBOL_REF_FLAG (new_ref
) = SYMBOL_REF_FLAG (operands
[1]);
1747 SYMBOL_REF_USED (new_ref
) = SYMBOL_REF_USED (operands
[1]);
1748 operands
[1] = new_ref
;
1751 if (DEFAULT_ABI
== ABI_DARWIN
)
1753 emit_insn (gen_macho_high (target
, operands
[1]));
1754 emit_insn (gen_macho_low (operands
[0], target
, operands
[1]));
1758 emit_insn (gen_elf_high (target
, operands
[1]));
1759 emit_insn (gen_elf_low (operands
[0], target
, operands
[1]));
1763 /* If this is a SYMBOL_REF that refers to a constant pool entry,
1764 and we have put it in the TOC, we just need to make a TOC-relative
1767 && GET_CODE (operands
[1]) == SYMBOL_REF
1768 && CONSTANT_POOL_EXPR_P (operands
[1])
1769 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands
[1]),
1770 get_pool_mode (operands
[1])))
1772 operands
[1] = create_TOC_reference (operands
[1]);
1774 else if (mode
== Pmode
1775 && CONSTANT_P (operands
[1])
1776 && ((GET_CODE (operands
[1]) != CONST_INT
1777 && ! easy_fp_constant (operands
[1], mode
))
1778 || (GET_CODE (operands
[1]) == CONST_INT
1779 && num_insns_constant (operands
[1], mode
) > 2)
1780 || (GET_CODE (operands
[0]) == REG
1781 && FP_REGNO_P (REGNO (operands
[0]))))
1782 && GET_CODE (operands
[1]) != HIGH
1783 && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands
[1])
1784 && ! TOC_RELATIVE_EXPR_P (operands
[1]))
1786 /* Emit a USE operation so that the constant isn't deleted if
1787 expensive optimizations are turned on because nobody
1788 references it. This should only be done for operands that
1789 contain SYMBOL_REFs with CONSTANT_POOL_ADDRESS_P set.
1790 This should not be done for operands that contain LABEL_REFs.
1791 For now, we just handle the obvious case. */
1792 if (GET_CODE (operands
[1]) != LABEL_REF
)
1793 emit_insn (gen_rtx_USE (VOIDmode
, operands
[1]));
1795 /* Darwin uses a special PIC legitimizer. */
1796 if (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
)
1799 rtx temp_reg
= ((reload_in_progress
|| reload_completed
)
1800 ? operands
[0] : NULL
);
1803 rs6000_machopic_legitimize_pic_address (operands
[1], mode
,
1806 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1810 /* If we are to limit the number of things we put in the TOC and
1811 this is a symbol plus a constant we can add in one insn,
1812 just put the symbol in the TOC and add the constant. Don't do
1813 this if reload is in progress. */
1814 if (GET_CODE (operands
[1]) == CONST
1815 && TARGET_NO_SUM_IN_TOC
&& ! reload_in_progress
1816 && GET_CODE (XEXP (operands
[1], 0)) == PLUS
1817 && add_operand (XEXP (XEXP (operands
[1], 0), 1), mode
)
1818 && (GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == LABEL_REF
1819 || GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == SYMBOL_REF
)
1820 && ! side_effects_p (operands
[0]))
1822 rtx sym
= force_const_mem (mode
, XEXP (XEXP (operands
[1], 0), 0));
1823 rtx other
= XEXP (XEXP (operands
[1], 0), 1);
1825 sym
= force_reg (mode
, sym
);
1827 emit_insn (gen_addsi3 (operands
[0], sym
, other
));
1829 emit_insn (gen_adddi3 (operands
[0], sym
, other
));
1833 operands
[1] = force_const_mem (mode
, operands
[1]);
1836 && CONSTANT_POOL_EXPR_P (XEXP (operands
[1], 0))
1837 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (
1838 get_pool_constant (XEXP (operands
[1], 0)),
1839 get_pool_mode (XEXP (operands
[1], 0))))
1841 operands
[1] = gen_rtx_MEM (mode
,
1842 create_TOC_reference (XEXP (operands
[1], 0)));
1843 MEM_ALIAS_SET (operands
[1]) = get_TOC_alias_set ();
1844 RTX_UNCHANGING_P (operands
[1]) = 1;
1850 if (GET_CODE (operands
[0]) == MEM
1851 && GET_CODE (XEXP (operands
[0], 0)) != REG
1852 && ! reload_in_progress
)
1853 operands
[0] = change_address (operands
[0], TImode
,
1854 copy_addr_to_reg (XEXP (operands
[0], 0)));
1856 if (GET_CODE (operands
[1]) == MEM
1857 && GET_CODE (XEXP (operands
[1], 0)) != REG
1858 && ! reload_in_progress
)
1859 operands
[1] = change_address (operands
[1], TImode
,
1860 copy_addr_to_reg (XEXP (operands
[1], 0)));
1867 /* Above, we may have called force_const_mem which may have returned
1868 an invalid address. If we can, fix this up; otherwise, reload will
1869 have to deal with it. */
1870 if (GET_CODE (operands
[1]) == MEM
1871 && ! memory_address_p (mode
, XEXP (operands
[1], 0))
1872 && ! reload_in_progress
)
1873 operands
[1] = change_address (operands
[1], mode
,
1874 XEXP (operands
[1], 0));
1876 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1880 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1881 for a call to a function whose data type is FNTYPE.
1882 For a library call, FNTYPE is 0.
1884 For incoming args we set the number of arguments in the prototype large
1885 so we never return a PARALLEL. */
1888 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1889 CUMULATIVE_ARGS
*cum
;
1891 rtx libname ATTRIBUTE_UNUSED
;
1894 static CUMULATIVE_ARGS zero_cumulative
;
1896 *cum
= zero_cumulative
;
1898 cum
->fregno
= FP_ARG_MIN_REG
;
1899 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1900 cum
->call_cookie
= CALL_NORMAL
;
1901 cum
->sysv_gregno
= GP_ARG_MIN_REG
;
1904 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1906 else if (cum
->prototype
)
1907 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1908 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1909 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1912 cum
->nargs_prototype
= 0;
1914 cum
->orig_nargs
= cum
->nargs_prototype
;
1916 /* Check for longcall's */
1917 if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1918 cum
->call_cookie
= CALL_LONG
;
1920 if (TARGET_DEBUG_ARG
)
1922 fprintf (stderr
, "\ninit_cumulative_args:");
1925 tree ret_type
= TREE_TYPE (fntype
);
1926 fprintf (stderr
, " ret code = %s,",
1927 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1930 if (cum
->call_cookie
& CALL_LONG
)
1931 fprintf (stderr
, " longcall,");
1933 fprintf (stderr
, " proto = %d, nargs = %d\n",
1934 cum
->prototype
, cum
->nargs_prototype
);
1938 /* If defined, a C expression which determines whether, and in which
1939 direction, to pad out an argument with extra space. The value
1940 should be of type `enum direction': either `upward' to pad above
1941 the argument, `downward' to pad below, or `none' to inhibit
1944 For the AIX ABI structs are always stored left shifted in their
1948 function_arg_padding (mode
, type
)
1949 enum machine_mode mode
;
1952 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1955 /* This is the default definition. */
1956 return (! BYTES_BIG_ENDIAN
1959 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1960 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1961 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1962 ? downward
: upward
));
1965 /* If defined, a C expression that gives the alignment boundary, in bits,
1966 of an argument with the specified mode and type. If it is not defined,
1967 PARM_BOUNDARY is used for all arguments.
1969 V.4 wants long longs to be double word aligned. */
1972 function_arg_boundary (mode
, type
)
1973 enum machine_mode mode
;
1974 tree type ATTRIBUTE_UNUSED
;
1976 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1977 && (mode
== DImode
|| mode
== DFmode
))
1980 return PARM_BOUNDARY
;
1983 /* Update the data in CUM to advance over an argument
1984 of mode MODE and data type TYPE.
1985 (TYPE is null for libcalls where that information may not be available.) */
1988 function_arg_advance (cum
, mode
, type
, named
)
1989 CUMULATIVE_ARGS
*cum
;
1990 enum machine_mode mode
;
1994 cum
->nargs_prototype
--;
1996 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1998 if (TARGET_HARD_FLOAT
1999 && (mode
== SFmode
|| mode
== DFmode
))
2001 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2006 cum
->words
+= cum
->words
& 1;
2007 cum
->words
+= RS6000_ARG_SIZE (mode
, type
);
2013 int gregno
= cum
->sysv_gregno
;
2015 /* Aggregates and IEEE quad get passed by reference. */
2016 if ((type
&& AGGREGATE_TYPE_P (type
))
2020 n_words
= RS6000_ARG_SIZE (mode
, type
);
2022 /* Long long is put in odd registers. */
2023 if (n_words
== 2 && (gregno
& 1) == 0)
2026 /* Long long is not split between registers and stack. */
2027 if (gregno
+ n_words
- 1 > GP_ARG_MAX_REG
)
2029 /* Long long is aligned on the stack. */
2031 cum
->words
+= cum
->words
& 1;
2032 cum
->words
+= n_words
;
2035 /* Note: continuing to accumulate gregno past when we've started
2036 spilling to the stack indicates the fact that we've started
2037 spilling to the stack to expand_builtin_saveregs. */
2038 cum
->sysv_gregno
= gregno
+ n_words
;
2041 if (TARGET_DEBUG_ARG
)
2043 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
2044 cum
->words
, cum
->fregno
);
2045 fprintf (stderr
, "gregno = %2d, nargs = %4d, proto = %d, ",
2046 cum
->sysv_gregno
, cum
->nargs_prototype
, cum
->prototype
);
2047 fprintf (stderr
, "mode = %4s, named = %d\n",
2048 GET_MODE_NAME (mode
), named
);
2053 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2054 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2055 cum
->words
+= align
+ RS6000_ARG_SIZE (mode
, type
);
2057 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
2060 if (TARGET_DEBUG_ARG
)
2062 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
2063 cum
->words
, cum
->fregno
);
2064 fprintf (stderr
, "nargs = %4d, proto = %d, mode = %4s, ",
2065 cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
));
2066 fprintf (stderr
, "named = %d, align = %d\n", named
, align
);
2071 /* Determine where to put an argument to a function.
2072 Value is zero to push the argument on the stack,
2073 or a hard register in which to store the argument.
2075 MODE is the argument's machine mode.
2076 TYPE is the data type of the argument (as a tree).
2077 This is null for libcalls where that information may
2079 CUM is a variable of type CUMULATIVE_ARGS which gives info about
2080 the preceding args and about the function being called.
2081 NAMED is nonzero if this argument is a named parameter
2082 (otherwise it is an extra parameter matching an ellipsis).
2084 On RS/6000 the first eight words of non-FP are normally in registers
2085 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
2086 Under V.4, the first 8 FP args are in registers.
2088 If this is floating-point and no prototype is specified, we use
2089 both an FP and integer register (or possibly FP reg and stack). Library
2090 functions (when TYPE is zero) always have the proper types for args,
2091 so we can pass the FP value just in one register. emit_library_function
2092 doesn't support PARALLEL anyway. */
2095 function_arg (cum
, mode
, type
, named
)
2096 CUMULATIVE_ARGS
*cum
;
2097 enum machine_mode mode
;
2099 int named ATTRIBUTE_UNUSED
;
2101 enum rs6000_abi abi
= DEFAULT_ABI
;
2103 /* Return a marker to indicate whether CR1 needs to set or clear the bit
2104 that V.4 uses to say fp args were passed in registers. Assume that we
2105 don't need the marker for software floating point, or compiler generated
2107 if (mode
== VOIDmode
)
2109 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2110 && TARGET_HARD_FLOAT
2111 && cum
->nargs_prototype
< 0
2112 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
2114 return GEN_INT (cum
->call_cookie
2115 | ((cum
->fregno
== FP_ARG_MIN_REG
)
2116 ? CALL_V4_SET_FP_ARGS
2117 : CALL_V4_CLEAR_FP_ARGS
));
2120 return GEN_INT (cum
->call_cookie
);
2123 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2125 if (TARGET_HARD_FLOAT
2126 && (mode
== SFmode
|| mode
== DFmode
))
2128 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2129 return gen_rtx_REG (mode
, cum
->fregno
);
2136 int gregno
= cum
->sysv_gregno
;
2138 /* Aggregates and IEEE quad get passed by reference. */
2139 if ((type
&& AGGREGATE_TYPE_P (type
))
2143 n_words
= RS6000_ARG_SIZE (mode
, type
);
2145 /* Long long is put in odd registers. */
2146 if (n_words
== 2 && (gregno
& 1) == 0)
2149 /* Long long is not split between registers and stack. */
2150 if (gregno
+ n_words
- 1 <= GP_ARG_MAX_REG
)
2151 return gen_rtx_REG (mode
, gregno
);
2158 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2159 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2160 int align_words
= cum
->words
+ align
;
2162 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
2165 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2168 || ((cum
->nargs_prototype
> 0)
2169 /* IBM AIX extended its linkage convention definition always
2170 to require FP args after register save area hole on the
2172 && (DEFAULT_ABI
!= ABI_AIX
2174 || (align_words
< GP_ARG_NUM_REG
))))
2175 return gen_rtx_REG (mode
, cum
->fregno
);
2177 return gen_rtx_PARALLEL (mode
,
2179 gen_rtx_EXPR_LIST (VOIDmode
,
2180 ((align_words
>= GP_ARG_NUM_REG
)
2183 + RS6000_ARG_SIZE (mode
, type
)
2185 /* If this is partially on the stack, then
2186 we only include the portion actually
2187 in registers here. */
2188 ? gen_rtx_REG (SImode
,
2189 GP_ARG_MIN_REG
+ align_words
)
2190 : gen_rtx_REG (mode
,
2191 GP_ARG_MIN_REG
+ align_words
))),
2193 gen_rtx_EXPR_LIST (VOIDmode
,
2194 gen_rtx_REG (mode
, cum
->fregno
),
2197 else if (align_words
< GP_ARG_NUM_REG
)
2198 return gen_rtx_REG (mode
, GP_ARG_MIN_REG
+ align_words
);
2204 /* For an arg passed partly in registers and partly in memory,
2205 this is the number of registers used.
2206 For args passed entirely in registers or entirely in memory, zero. */
2209 function_arg_partial_nregs (cum
, mode
, type
, named
)
2210 CUMULATIVE_ARGS
*cum
;
2211 enum machine_mode mode
;
2213 int named ATTRIBUTE_UNUSED
;
2215 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2218 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2220 if (cum
->nargs_prototype
>= 0)
2224 if (cum
->words
< GP_ARG_NUM_REG
2225 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
)))
2227 int ret
= GP_ARG_NUM_REG
- cum
->words
;
2228 if (ret
&& TARGET_DEBUG_ARG
)
2229 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
2237 /* A C expression that indicates when an argument must be passed by
2238 reference. If nonzero for an argument, a copy of that argument is
2239 made in memory and a pointer to the argument is passed instead of
2240 the argument itself. The pointer is passed in whatever way is
2241 appropriate for passing a pointer to that type.
2243 Under V.4, structures and unions are passed by reference. */
2246 function_arg_pass_by_reference (cum
, mode
, type
, named
)
2247 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
2248 enum machine_mode mode ATTRIBUTE_UNUSED
;
2250 int named ATTRIBUTE_UNUSED
;
2252 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2253 && ((type
&& AGGREGATE_TYPE_P (type
))
2256 if (TARGET_DEBUG_ARG
)
2257 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
2265 /* Perform any needed actions needed for a function that is receiving a
2266 variable number of arguments.
2270 MODE and TYPE are the mode and type of the current parameter.
2272 PRETEND_SIZE is a variable that should be set to the amount of stack
2273 that must be pushed by the prolog to pretend that our caller pushed
2276 Normally, this macro will push all remaining incoming registers on the
2277 stack and set PRETEND_SIZE to the length of the registers pushed. */
2280 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
2281 CUMULATIVE_ARGS
*cum
;
2282 enum machine_mode mode
;
2288 CUMULATIVE_ARGS next_cum
;
2289 int reg_size
= TARGET_32BIT
? 4 : 8;
2290 rtx save_area
= NULL_RTX
, mem
;
2291 int first_reg_offset
, set
;
2295 fntype
= TREE_TYPE (current_function_decl
);
2296 stdarg_p
= (TYPE_ARG_TYPES (fntype
) != 0
2297 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
2298 != void_type_node
));
2300 /* For varargs, we do not want to skip the dummy va_dcl argument.
2301 For stdargs, we do want to skip the last named argument. */
2304 function_arg_advance (&next_cum
, mode
, type
, 1);
2306 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2308 /* Indicate to allocate space on the stack for varargs save area. */
2309 /* ??? Does this really have to be located at a magic spot on the
2310 stack, or can we allocate this with assign_stack_local instead. */
2311 cfun
->machine
->sysv_varargs_p
= 1;
2313 save_area
= plus_constant (virtual_stack_vars_rtx
,
2314 - RS6000_VARARGS_SIZE
);
2316 first_reg_offset
= next_cum
.sysv_gregno
- GP_ARG_MIN_REG
;
2320 first_reg_offset
= next_cum
.words
;
2321 save_area
= virtual_incoming_args_rtx
;
2322 cfun
->machine
->sysv_varargs_p
= 0;
2324 if (MUST_PASS_IN_STACK (mode
, type
))
2325 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
);
2328 set
= get_varargs_alias_set ();
2329 if (! no_rtl
&& first_reg_offset
< GP_ARG_NUM_REG
)
2331 mem
= gen_rtx_MEM (BLKmode
,
2332 plus_constant (save_area
,
2333 first_reg_offset
* reg_size
)),
2334 MEM_ALIAS_SET (mem
) = set
;
2337 (GP_ARG_MIN_REG
+ first_reg_offset
, mem
,
2338 GP_ARG_NUM_REG
- first_reg_offset
,
2339 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
2341 /* ??? Does ABI_V4 need this at all? */
2342 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
2345 /* Save FP registers if needed. */
2346 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2347 && TARGET_HARD_FLOAT
&& ! no_rtl
2348 && next_cum
.fregno
<= FP_ARG_V4_MAX_REG
)
2350 int fregno
= next_cum
.fregno
;
2351 rtx cr1
= gen_rtx_REG (CCmode
, CR1_REGNO
);
2352 rtx lab
= gen_label_rtx ();
2353 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
2355 emit_jump_insn (gen_rtx_SET (VOIDmode
,
2357 gen_rtx_IF_THEN_ELSE (VOIDmode
,
2358 gen_rtx_NE (VOIDmode
, cr1
,
2360 gen_rtx_LABEL_REF (VOIDmode
, lab
),
2363 while (fregno
<= FP_ARG_V4_MAX_REG
)
2365 mem
= gen_rtx_MEM (DFmode
, plus_constant (save_area
, off
));
2366 MEM_ALIAS_SET (mem
) = set
;
2367 emit_move_insn (mem
, gen_rtx_REG (DFmode
, fregno
));
2376 /* Create the va_list data type. */
2379 rs6000_build_va_list ()
2381 tree f_gpr
, f_fpr
, f_ovf
, f_sav
, record
, type_decl
;
2383 /* For AIX, prefer 'char *' because that's what the system
2384 header files like. */
2385 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2386 return build_pointer_type (char_type_node
);
2388 record
= make_lang_type (RECORD_TYPE
);
2389 type_decl
= build_decl (TYPE_DECL
, get_identifier ("__va_list_tag"), record
);
2391 f_gpr
= build_decl (FIELD_DECL
, get_identifier ("gpr"),
2392 unsigned_char_type_node
);
2393 f_fpr
= build_decl (FIELD_DECL
, get_identifier ("fpr"),
2394 unsigned_char_type_node
);
2395 f_ovf
= build_decl (FIELD_DECL
, get_identifier ("overflow_arg_area"),
2397 f_sav
= build_decl (FIELD_DECL
, get_identifier ("reg_save_area"),
2400 DECL_FIELD_CONTEXT (f_gpr
) = record
;
2401 DECL_FIELD_CONTEXT (f_fpr
) = record
;
2402 DECL_FIELD_CONTEXT (f_ovf
) = record
;
2403 DECL_FIELD_CONTEXT (f_sav
) = record
;
2405 TREE_CHAIN (record
) = type_decl
;
2406 TYPE_NAME (record
) = type_decl
;
2407 TYPE_FIELDS (record
) = f_gpr
;
2408 TREE_CHAIN (f_gpr
) = f_fpr
;
2409 TREE_CHAIN (f_fpr
) = f_ovf
;
2410 TREE_CHAIN (f_ovf
) = f_sav
;
2412 layout_type (record
);
2414 /* The correct type is an array type of one element. */
2415 return build_array_type (record
, build_index_type (size_zero_node
));
2418 /* Implement va_start. */
2421 rs6000_va_start (stdarg_p
, valist
, nextarg
)
2426 HOST_WIDE_INT words
, n_gpr
, n_fpr
;
2427 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2428 tree gpr
, fpr
, ovf
, sav
, t
;
2430 /* Only SVR4 needs something special. */
2431 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2433 std_expand_builtin_va_start (stdarg_p
, valist
, nextarg
);
2437 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2438 f_fpr
= TREE_CHAIN (f_gpr
);
2439 f_ovf
= TREE_CHAIN (f_fpr
);
2440 f_sav
= TREE_CHAIN (f_ovf
);
2442 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2443 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2444 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2445 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2446 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2448 /* Count number of gp and fp argument registers used. */
2449 words
= current_function_args_info
.words
;
2450 n_gpr
= current_function_args_info
.sysv_gregno
- GP_ARG_MIN_REG
;
2451 n_fpr
= current_function_args_info
.fregno
- FP_ARG_MIN_REG
;
2453 if (TARGET_DEBUG_ARG
)
2455 fputs ("va_start: words = ", stderr
);
2456 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, words
);
2457 fputs (", n_gpr = ", stderr
);
2458 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, n_gpr
);
2459 fputs (", n_fpr = ", stderr
);
2460 fprintf (stderr
, HOST_WIDE_INT_PRINT_DEC
, n_fpr
);
2461 putc ('\n', stderr
);
2464 t
= build (MODIFY_EXPR
, TREE_TYPE (gpr
), gpr
, build_int_2 (n_gpr
, 0));
2465 TREE_SIDE_EFFECTS (t
) = 1;
2466 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2468 t
= build (MODIFY_EXPR
, TREE_TYPE (fpr
), fpr
, build_int_2 (n_fpr
, 0));
2469 TREE_SIDE_EFFECTS (t
) = 1;
2470 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2472 /* Find the overflow area. */
2473 t
= make_tree (TREE_TYPE (ovf
), virtual_incoming_args_rtx
);
2475 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), t
,
2476 build_int_2 (words
* UNITS_PER_WORD
, 0));
2477 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2478 TREE_SIDE_EFFECTS (t
) = 1;
2479 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2481 /* Find the register save area. */
2482 t
= make_tree (TREE_TYPE (sav
), virtual_stack_vars_rtx
);
2483 t
= build (PLUS_EXPR
, TREE_TYPE (sav
), t
,
2484 build_int_2 (-RS6000_VARARGS_SIZE
, -1));
2485 t
= build (MODIFY_EXPR
, TREE_TYPE (sav
), sav
, t
);
2486 TREE_SIDE_EFFECTS (t
) = 1;
2487 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2490 /* Implement va_arg. */
2493 rs6000_va_arg (valist
, type
)
2496 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2497 tree gpr
, fpr
, ovf
, sav
, reg
, t
, u
;
2498 int indirect_p
, size
, rsize
, n_reg
, sav_ofs
, sav_scale
;
2499 rtx lab_false
, lab_over
, addr_rtx
, r
;
2501 /* For AIX, the rule is that structures are passed left-aligned in
2502 their stack slot. However, GCC does not presently do this:
2503 structures which are the same size as integer types are passed
2504 right-aligned, as if they were in fact integers. This only
2505 matters for structures of size 1 or 2, or 4 when TARGET_64BIT. */
2506 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2508 HOST_WIDE_INT align
, rounded_size
;
2509 enum machine_mode mode
;
2512 /* Compute the rounded size of the type. */
2513 align
= PARM_BOUNDARY
/ BITS_PER_UNIT
;
2514 rounded_size
= (((int_size_in_bytes (type
) + align
- 1) / align
)
2519 mode
= TYPE_MODE (type
);
2520 if (mode
!= BLKmode
)
2523 adj
= TREE_INT_CST_LOW (TYPE_SIZE (type
)) / BITS_PER_UNIT
;
2524 if (rounded_size
> align
)
2527 addr_tree
= build (PLUS_EXPR
, TREE_TYPE (addr_tree
), addr_tree
,
2528 build_int_2 (rounded_size
- adj
, 0));
2531 addr_rtx
= expand_expr (addr_tree
, NULL_RTX
, Pmode
, EXPAND_NORMAL
);
2532 addr_rtx
= copy_to_reg (addr_rtx
);
2534 /* Compute new value for AP. */
2535 t
= build (MODIFY_EXPR
, TREE_TYPE (valist
), valist
,
2536 build (PLUS_EXPR
, TREE_TYPE (valist
), valist
,
2537 build_int_2 (rounded_size
, 0)));
2538 TREE_SIDE_EFFECTS (t
) = 1;
2539 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2544 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2545 f_fpr
= TREE_CHAIN (f_gpr
);
2546 f_ovf
= TREE_CHAIN (f_fpr
);
2547 f_sav
= TREE_CHAIN (f_ovf
);
2549 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2550 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2551 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2552 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2553 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2555 size
= int_size_in_bytes (type
);
2556 rsize
= (size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2558 if (AGGREGATE_TYPE_P (type
) || TYPE_MODE (type
) == TFmode
)
2560 /* Aggregates and long doubles are passed by reference. */
2566 size
= rsize
= UNITS_PER_WORD
;
2568 else if (FLOAT_TYPE_P (type
) && ! TARGET_SOFT_FLOAT
)
2570 /* FP args go in FP registers, if present. */
2579 /* Otherwise into GP registers. */
2588 * Pull the value out of the saved registers ...
2591 lab_false
= gen_label_rtx ();
2592 lab_over
= gen_label_rtx ();
2593 addr_rtx
= gen_reg_rtx (Pmode
);
2595 emit_cmp_and_jump_insns (expand_expr (reg
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
2596 GEN_INT (8 - n_reg
+ 1),
2597 GE
, const1_rtx
, QImode
, 1, 1, lab_false
);
2599 /* Long long is aligned in the registers. */
2602 u
= build (BIT_AND_EXPR
, TREE_TYPE (reg
), reg
,
2603 build_int_2 (n_reg
- 1, 0));
2604 u
= build (PLUS_EXPR
, TREE_TYPE (reg
), reg
, u
);
2605 u
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, u
);
2606 TREE_SIDE_EFFECTS (u
) = 1;
2607 expand_expr (u
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2611 t
= build (PLUS_EXPR
, ptr_type_node
, sav
, build_int_2 (sav_ofs
, 0));
2615 u
= build (POSTINCREMENT_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (n_reg
, 0));
2616 TREE_SIDE_EFFECTS (u
) = 1;
2618 u
= build1 (CONVERT_EXPR
, integer_type_node
, u
);
2619 TREE_SIDE_EFFECTS (u
) = 1;
2621 u
= build (MULT_EXPR
, integer_type_node
, u
, build_int_2 (sav_scale
, 0));
2622 TREE_SIDE_EFFECTS (u
) = 1;
2624 t
= build (PLUS_EXPR
, ptr_type_node
, t
, u
);
2625 TREE_SIDE_EFFECTS (t
) = 1;
2627 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2629 emit_move_insn (addr_rtx
, r
);
2631 emit_jump_insn (gen_jump (lab_over
));
2633 emit_label (lab_false
);
2636 * ... otherwise out of the overflow area.
2639 /* Make sure we don't find reg 7 for the next int arg. */
2642 t
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (8, 0));
2643 TREE_SIDE_EFFECTS (t
) = 1;
2644 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2647 /* Care for on-stack alignment if needed. */
2652 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), ovf
, build_int_2 (7, 0));
2653 t
= build (BIT_AND_EXPR
, TREE_TYPE (t
), t
, build_int_2 (-8, -1));
2657 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2659 emit_move_insn (addr_rtx
, r
);
2661 t
= build (PLUS_EXPR
, TREE_TYPE (t
), t
, build_int_2 (size
, 0));
2662 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2663 TREE_SIDE_EFFECTS (t
) = 1;
2664 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2666 emit_label (lab_over
);
2670 r
= gen_rtx_MEM (Pmode
, addr_rtx
);
2671 MEM_ALIAS_SET (r
) = get_varargs_alias_set ();
2672 emit_move_insn (addr_rtx
, r
);
2678 /* Generate a memory reference for expand_block_move, copying volatile,
2679 and other bits from an original memory reference. */
2682 expand_block_move_mem (mode
, addr
, orig_mem
)
2683 enum machine_mode mode
;
2687 rtx mem
= gen_rtx_MEM (mode
, addr
);
2689 MEM_COPY_ATTRIBUTES (mem
, orig_mem
);
2690 #ifdef MEM_UNALIGNED_P
2691 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
2696 /* Expand a block move operation, and return 1 if successful. Return 0
2697 if we should let the compiler generate normal code.
2699 operands[0] is the destination
2700 operands[1] is the source
2701 operands[2] is the length
2702 operands[3] is the alignment */
2704 #define MAX_MOVE_REG 4
2707 expand_block_move (operands
)
2710 rtx orig_dest
= operands
[0];
2711 rtx orig_src
= operands
[1];
2712 rtx bytes_rtx
= operands
[2];
2713 rtx align_rtx
= operands
[3];
2714 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
2725 rtx stores
[MAX_MOVE_REG
];
2728 /* If this is not a fixed size move, just call memcpy */
2732 /* If this is not a fixed size alignment, abort */
2733 if (GET_CODE (align_rtx
) != CONST_INT
)
2735 align
= INTVAL (align_rtx
);
2737 /* Anything to move? */
2738 bytes
= INTVAL (bytes_rtx
);
2742 /* Don't support real large moves. If string instructions are not used,
2743 then don't generate more than 8 loads. */
2749 else if (! STRICT_ALIGNMENT
)
2751 if (TARGET_POWERPC64
&& align
>= 4)
2760 else if (bytes
> 8*align
)
2763 /* Move the address into scratch registers. */
2764 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
2765 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
2767 if (TARGET_STRING
) /* string instructions are available */
2769 for ( ; bytes
> 0; bytes
-= move_bytes
)
2771 if (bytes
> 24 /* move up to 32 bytes at a time */
2779 && ! fixed_regs
[12])
2781 move_bytes
= (bytes
> 32) ? 32 : bytes
;
2782 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
,
2785 expand_block_move_mem (BLKmode
,
2788 GEN_INT ((move_bytes
== 32)
2792 else if (bytes
> 16 /* move up to 24 bytes at a time */
2798 && ! fixed_regs
[10])
2800 move_bytes
= (bytes
> 24) ? 24 : bytes
;
2801 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
,
2804 expand_block_move_mem (BLKmode
,
2807 GEN_INT (move_bytes
),
2810 else if (bytes
> 8 /* move up to 16 bytes at a time */
2816 move_bytes
= (bytes
> 16) ? 16 : bytes
;
2817 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
,
2820 expand_block_move_mem (BLKmode
,
2823 GEN_INT (move_bytes
),
2826 else if (bytes
>= 8 && TARGET_POWERPC64
2827 /* 64-bit loads and stores require word-aligned displacements. */
2828 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2831 tmp_reg
= gen_reg_rtx (DImode
);
2832 emit_move_insn (tmp_reg
,
2833 expand_block_move_mem (DImode
,
2834 src_reg
, orig_src
));
2835 emit_move_insn (expand_block_move_mem (DImode
,
2836 dest_reg
, orig_dest
),
2840 { /* move up to 8 bytes at a time */
2841 move_bytes
= (bytes
> 8) ? 8 : bytes
;
2842 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
,
2845 expand_block_move_mem (BLKmode
,
2848 GEN_INT (move_bytes
),
2851 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2852 { /* move 4 bytes */
2854 tmp_reg
= gen_reg_rtx (SImode
);
2855 emit_move_insn (tmp_reg
,
2856 expand_block_move_mem (SImode
,
2857 src_reg
, orig_src
));
2858 emit_move_insn (expand_block_move_mem (SImode
,
2859 dest_reg
, orig_dest
),
2862 else if (bytes
== 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2863 { /* move 2 bytes */
2865 tmp_reg
= gen_reg_rtx (HImode
);
2866 emit_move_insn (tmp_reg
,
2867 expand_block_move_mem (HImode
,
2868 src_reg
, orig_src
));
2869 emit_move_insn (expand_block_move_mem (HImode
,
2870 dest_reg
, orig_dest
),
2873 else if (bytes
== 1) /* move 1 byte */
2876 tmp_reg
= gen_reg_rtx (QImode
);
2877 emit_move_insn (tmp_reg
,
2878 expand_block_move_mem (QImode
,
2879 src_reg
, orig_src
));
2880 emit_move_insn (expand_block_move_mem (QImode
,
2881 dest_reg
, orig_dest
),
2885 { /* move up to 4 bytes at a time */
2886 move_bytes
= (bytes
> 4) ? 4 : bytes
;
2887 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
,
2890 expand_block_move_mem (BLKmode
,
2893 GEN_INT (move_bytes
),
2897 if (bytes
> move_bytes
)
2899 if (! TARGET_POWERPC64
)
2901 emit_insn (gen_addsi3 (src_reg
, src_reg
,
2902 GEN_INT (move_bytes
)));
2903 emit_insn (gen_addsi3 (dest_reg
, dest_reg
,
2904 GEN_INT (move_bytes
)));
2908 emit_insn (gen_adddi3 (src_reg
, src_reg
,
2909 GEN_INT (move_bytes
)));
2910 emit_insn (gen_adddi3 (dest_reg
, dest_reg
,
2911 GEN_INT (move_bytes
)));
2917 else /* string instructions not available */
2919 num_reg
= offset
= 0;
2920 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
2922 /* Calculate the correct offset for src/dest */
2926 dest_addr
= dest_reg
;
2930 src_addr
= plus_constant (src_reg
, offset
);
2931 dest_addr
= plus_constant (dest_reg
, offset
);
2934 /* Generate the appropriate load and store, saving the stores
2936 if (bytes
>= 8 && TARGET_POWERPC64
2937 /* 64-bit loads and stores require word-aligned displacements. */
2938 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2941 tmp_reg
= gen_reg_rtx (DImode
);
2942 emit_insn (gen_movdi (tmp_reg
,
2943 expand_block_move_mem (DImode
,
2946 stores
[num_reg
++] = gen_movdi (expand_block_move_mem (DImode
,
2951 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2954 tmp_reg
= gen_reg_rtx (SImode
);
2955 emit_insn (gen_movsi (tmp_reg
,
2956 expand_block_move_mem (SImode
,
2959 stores
[num_reg
++] = gen_movsi (expand_block_move_mem (SImode
,
2964 else if (bytes
>= 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2967 tmp_reg
= gen_reg_rtx (HImode
);
2968 emit_insn (gen_movhi (tmp_reg
,
2969 expand_block_move_mem (HImode
,
2972 stores
[num_reg
++] = gen_movhi (expand_block_move_mem (HImode
,
2980 tmp_reg
= gen_reg_rtx (QImode
);
2981 emit_insn (gen_movqi (tmp_reg
,
2982 expand_block_move_mem (QImode
,
2985 stores
[num_reg
++] = gen_movqi (expand_block_move_mem (QImode
,
2991 if (num_reg
>= MAX_MOVE_REG
)
2993 for (i
= 0; i
< num_reg
; i
++)
2994 emit_insn (stores
[i
]);
2999 for (i
= 0; i
< num_reg
; i
++)
3000 emit_insn (stores
[i
]);
3007 /* Return 1 if OP is a load multiple operation. It is known to be a
3008 PARALLEL and the first section will be tested. */
3011 load_multiple_operation (op
, mode
)
3013 enum machine_mode mode ATTRIBUTE_UNUSED
;
3015 int count
= XVECLEN (op
, 0);
3016 unsigned int dest_regno
;
3020 /* Perform a quick check so we don't blow up below. */
3022 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3023 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3024 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3027 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3028 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3030 for (i
= 1; i
< count
; i
++)
3032 rtx elt
= XVECEXP (op
, 0, i
);
3034 if (GET_CODE (elt
) != SET
3035 || GET_CODE (SET_DEST (elt
)) != REG
3036 || GET_MODE (SET_DEST (elt
)) != SImode
3037 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3038 || GET_CODE (SET_SRC (elt
)) != MEM
3039 || GET_MODE (SET_SRC (elt
)) != SImode
3040 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
3041 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
3042 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
3043 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
3050 /* Similar, but tests for store multiple. Here, the second vector element
3051 is a CLOBBER. It will be tested later. */
3054 store_multiple_operation (op
, mode
)
3056 enum machine_mode mode ATTRIBUTE_UNUSED
;
3058 int count
= XVECLEN (op
, 0) - 1;
3059 unsigned int src_regno
;
3063 /* Perform a quick check so we don't blow up below. */
3065 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3066 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3067 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3070 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3071 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3073 for (i
= 1; i
< count
; i
++)
3075 rtx elt
= XVECEXP (op
, 0, i
+ 1);
3077 if (GET_CODE (elt
) != SET
3078 || GET_CODE (SET_SRC (elt
)) != REG
3079 || GET_MODE (SET_SRC (elt
)) != SImode
3080 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3081 || GET_CODE (SET_DEST (elt
)) != MEM
3082 || GET_MODE (SET_DEST (elt
)) != SImode
3083 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
3084 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
3085 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
3086 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
3093 /* Return 1 for an PARALLEL suitable for mtcrf. */
3096 mtcrf_operation (op
, mode
)
3098 enum machine_mode mode ATTRIBUTE_UNUSED
;
3100 int count
= XVECLEN (op
, 0);
3104 /* Perform a quick check so we don't blow up below. */
3106 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3107 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != UNSPEC
3108 || XVECLEN (SET_SRC (XVECEXP (op
, 0, 0)), 0) != 2)
3110 src_reg
= XVECEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0, 0);
3112 if (GET_CODE (src_reg
) != REG
3113 || GET_MODE (src_reg
) != SImode
3114 || ! INT_REGNO_P (REGNO (src_reg
)))
3117 for (i
= 0; i
< count
; i
++)
3119 rtx exp
= XVECEXP (op
, 0, i
);
3123 if (GET_CODE (exp
) != SET
3124 || GET_CODE (SET_DEST (exp
)) != REG
3125 || GET_MODE (SET_DEST (exp
)) != CCmode
3126 || ! CR_REGNO_P (REGNO (SET_DEST (exp
))))
3128 unspec
= SET_SRC (exp
);
3129 maskval
= 1 << (MAX_CR_REGNO
- REGNO (SET_DEST (exp
)));
3131 if (GET_CODE (unspec
) != UNSPEC
3132 || XINT (unspec
, 1) != 20
3133 || XVECLEN (unspec
, 0) != 2
3134 || XVECEXP (unspec
, 0, 0) != src_reg
3135 || GET_CODE (XVECEXP (unspec
, 0, 1)) != CONST_INT
3136 || INTVAL (XVECEXP (unspec
, 0, 1)) != maskval
)
3142 /* Return 1 for an PARALLEL suitable for lmw. */
3145 lmw_operation (op
, mode
)
3147 enum machine_mode mode ATTRIBUTE_UNUSED
;
3149 int count
= XVECLEN (op
, 0);
3150 unsigned int dest_regno
;
3152 unsigned int base_regno
;
3153 HOST_WIDE_INT offset
;
3156 /* Perform a quick check so we don't blow up below. */
3158 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3159 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3160 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3163 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3164 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3167 || count
!= 32 - (int) dest_regno
)
3170 if (LEGITIMATE_INDIRECT_ADDRESS_P (src_addr
, 0))
3173 base_regno
= REGNO (src_addr
);
3174 if (base_regno
== 0)
3177 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, src_addr
, 0))
3179 offset
= INTVAL (XEXP (src_addr
, 1));
3180 base_regno
= REGNO (XEXP (src_addr
, 0));
3185 for (i
= 0; i
< count
; i
++)
3187 rtx elt
= XVECEXP (op
, 0, i
);
3190 HOST_WIDE_INT newoffset
;
3192 if (GET_CODE (elt
) != SET
3193 || GET_CODE (SET_DEST (elt
)) != REG
3194 || GET_MODE (SET_DEST (elt
)) != SImode
3195 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3196 || GET_CODE (SET_SRC (elt
)) != MEM
3197 || GET_MODE (SET_SRC (elt
)) != SImode
)
3199 newaddr
= XEXP (SET_SRC (elt
), 0);
3200 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
, 0))
3205 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
, 0))
3207 addr_reg
= XEXP (newaddr
, 0);
3208 newoffset
= INTVAL (XEXP (newaddr
, 1));
3212 if (REGNO (addr_reg
) != base_regno
3213 || newoffset
!= offset
+ 4 * i
)
3220 /* Return 1 for an PARALLEL suitable for stmw. */
3223 stmw_operation (op
, mode
)
3225 enum machine_mode mode ATTRIBUTE_UNUSED
;
3227 int count
= XVECLEN (op
, 0);
3228 unsigned int src_regno
;
3230 unsigned int base_regno
;
3231 HOST_WIDE_INT offset
;
3234 /* Perform a quick check so we don't blow up below. */
3236 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3237 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3238 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3241 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3242 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3245 || count
!= 32 - (int) src_regno
)
3248 if (LEGITIMATE_INDIRECT_ADDRESS_P (dest_addr
, 0))
3251 base_regno
= REGNO (dest_addr
);
3252 if (base_regno
== 0)
3255 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, dest_addr
, 0))
3257 offset
= INTVAL (XEXP (dest_addr
, 1));
3258 base_regno
= REGNO (XEXP (dest_addr
, 0));
3263 for (i
= 0; i
< count
; i
++)
3265 rtx elt
= XVECEXP (op
, 0, i
);
3268 HOST_WIDE_INT newoffset
;
3270 if (GET_CODE (elt
) != SET
3271 || GET_CODE (SET_SRC (elt
)) != REG
3272 || GET_MODE (SET_SRC (elt
)) != SImode
3273 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3274 || GET_CODE (SET_DEST (elt
)) != MEM
3275 || GET_MODE (SET_DEST (elt
)) != SImode
)
3277 newaddr
= XEXP (SET_DEST (elt
), 0);
3278 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
, 0))
3283 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
, 0))
3285 addr_reg
= XEXP (newaddr
, 0);
3286 newoffset
= INTVAL (XEXP (newaddr
, 1));
3290 if (REGNO (addr_reg
) != base_regno
3291 || newoffset
!= offset
+ 4 * i
)
3299 /* A validation routine: say whether CODE, a condition code,
3300 and MODE match. The other alternatives either don't make
3301 sense or should never be generated. */
3303 validate_condition_mode (code
, mode
)
3305 enum machine_mode mode
;
3307 if (GET_RTX_CLASS (code
) != '<'
3308 || GET_MODE_CLASS (mode
) != MODE_CC
)
3311 /* These don't make sense. */
3312 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
3313 && mode
== CCUNSmode
)
3316 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
3317 && mode
!= CCUNSmode
)
3320 if (mode
!= CCFPmode
3321 && (code
== ORDERED
|| code
== UNORDERED
3322 || code
== UNEQ
|| code
== LTGT
3323 || code
== UNGT
|| code
== UNLT
3324 || code
== UNGE
|| code
== UNLE
))
3327 /* These should never be generated except for
3328 flag_unsafe_math_optimizations. */
3329 if (mode
== CCFPmode
3330 && ! flag_unsafe_math_optimizations
3331 && (code
== LE
|| code
== GE
3332 || code
== UNEQ
|| code
== LTGT
3333 || code
== UNGT
|| code
== UNLT
))
3336 /* These are invalid; the information is not there. */
3337 if (mode
== CCEQmode
3338 && code
!= EQ
&& code
!= NE
)
3342 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
3343 We only check the opcode against the mode of the CC value here. */
3346 branch_comparison_operator (op
, mode
)
3348 enum machine_mode mode ATTRIBUTE_UNUSED
;
3350 enum rtx_code code
= GET_CODE (op
);
3351 enum machine_mode cc_mode
;
3353 if (GET_RTX_CLASS (code
) != '<')
3356 cc_mode
= GET_MODE (XEXP (op
, 0));
3357 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3360 validate_condition_mode (code
, cc_mode
);
3365 /* Return 1 if OP is a comparison operation that is valid for a branch
3366 insn and which is true if the corresponding bit in the CC register
3370 branch_positive_comparison_operator (op
, mode
)
3372 enum machine_mode mode
;
3376 if (! branch_comparison_operator (op
, mode
))
3379 code
= GET_CODE (op
);
3380 return (code
== EQ
|| code
== LT
|| code
== GT
3381 || code
== LTU
|| code
== GTU
3382 || code
== UNORDERED
);
3386 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
3387 We check the opcode against the mode of the CC value and disallow EQ or
3388 NE comparisons for integers. */
3391 scc_comparison_operator (op
, mode
)
3393 enum machine_mode mode
;
3395 enum rtx_code code
= GET_CODE (op
);
3396 enum machine_mode cc_mode
;
3398 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
3401 if (GET_RTX_CLASS (code
) != '<')
3404 cc_mode
= GET_MODE (XEXP (op
, 0));
3405 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3408 validate_condition_mode (code
, cc_mode
);
3410 if (code
== NE
&& cc_mode
!= CCFPmode
)
3417 trap_comparison_operator (op
, mode
)
3419 enum machine_mode mode
;
3421 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
3423 return GET_RTX_CLASS (GET_CODE (op
)) == '<';
3427 boolean_operator (op
, mode
)
3429 enum machine_mode mode ATTRIBUTE_UNUSED
;
3431 enum rtx_code code
= GET_CODE (op
);
3432 return (code
== AND
|| code
== IOR
|| code
== XOR
);
3436 boolean_or_operator (op
, mode
)
3438 enum machine_mode mode ATTRIBUTE_UNUSED
;
3440 enum rtx_code code
= GET_CODE (op
);
3441 return (code
== IOR
|| code
== XOR
);
3444 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3445 mask required to convert the result of a rotate insn into a shift
3446 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
3449 includes_lshift_p (shiftop
, andop
)
3450 register rtx shiftop
;
3453 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3455 shift_mask
<<= INTVAL (shiftop
);
3457 return (INTVAL (andop
) & ~shift_mask
) == 0;
3460 /* Similar, but for right shift. */
3463 includes_rshift_p (shiftop
, andop
)
3464 register rtx shiftop
;
3467 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3469 shift_mask
>>= INTVAL (shiftop
);
3471 return (INTVAL (andop
) & ~shift_mask
) == 0;
3474 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3475 mask required to convert the result of a rotate insn into a shift
3476 left insn of SHIFTOP bits. */
3479 includes_lshift64_p (shiftop
, andop
)
3480 register rtx shiftop
;
3483 #if HOST_BITS_PER_WIDE_INT == 64
3484 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3486 shift_mask
<<= INTVAL (shiftop
);
3488 return (INTVAL (andop
) & ~shift_mask
) == 0;
3490 unsigned HOST_WIDE_INT shift_mask_low
= ~(unsigned HOST_WIDE_INT
) 0;
3491 unsigned HOST_WIDE_INT shift_mask_high
= ~(unsigned HOST_WIDE_INT
) 0;
3493 shift_mask_low
<<= INTVAL (shiftop
);
3495 if (INTVAL (shiftop
) > 32)
3496 shift_mask_high
<<= (INTVAL (shiftop
) - 32);
3498 if (GET_CODE (andop
) == CONST_INT
)
3499 return (INTVAL (andop
) & ~shift_mask_low
) == 0;
3501 return ((CONST_DOUBLE_HIGH (andop
) & ~shift_mask_high
) == 0
3502 && (CONST_DOUBLE_LOW (andop
) & ~shift_mask_low
) == 0);
3506 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
3507 for lfq and stfq insns.
3509 Note reg1 and reg2 *must* be hard registers. To be sure we will
3510 abort if we are passed pseudo registers. */
3513 registers_ok_for_quad_peep (reg1
, reg2
)
3516 /* We might have been passed a SUBREG. */
3517 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
3520 return (REGNO (reg1
) == REGNO (reg2
) - 1);
3523 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
3524 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
3527 addrs_ok_for_quad_peep (addr1
, addr2
)
3534 /* Extract an offset (if used) from the first addr. */
3535 if (GET_CODE (addr1
) == PLUS
)
3537 /* If not a REG, return zero. */
3538 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
3542 reg1
= REGNO (XEXP (addr1
, 0));
3543 /* The offset must be constant! */
3544 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
3546 offset1
= INTVAL (XEXP (addr1
, 1));
3549 else if (GET_CODE (addr1
) != REG
)
3553 reg1
= REGNO (addr1
);
3554 /* This was a simple (mem (reg)) expression. Offset is 0. */
3558 /* Make sure the second address is a (mem (plus (reg) (const_int))). */
3559 if (GET_CODE (addr2
) != PLUS
)
3562 if (GET_CODE (XEXP (addr2
, 0)) != REG
3563 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
3566 if (reg1
!= REGNO (XEXP (addr2
, 0)))
3569 /* The offset for the second addr must be 8 more than the first addr. */
3570 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
3573 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
3578 /* Return the register class of a scratch register needed to copy IN into
3579 or out of a register in CLASS in MODE. If it can be done directly,
3580 NO_REGS is returned. */
3583 secondary_reload_class (class, mode
, in
)
3584 enum reg_class
class;
3585 enum machine_mode mode ATTRIBUTE_UNUSED
;
3590 if (TARGET_ELF
|| (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
))
3592 /* We cannot copy a symbolic operand directly into anything
3593 other than BASE_REGS for TARGET_ELF. So indicate that a
3594 register from BASE_REGS is needed as an intermediate
3597 On Darwin, pic addresses require a load from memory, which
3598 needs a base register. */
3599 if (class != BASE_REGS
3600 && (GET_CODE (in
) == SYMBOL_REF
3601 || GET_CODE (in
) == HIGH
3602 || GET_CODE (in
) == LABEL_REF
3603 || GET_CODE (in
) == CONST
))
3607 if (GET_CODE (in
) == REG
)
3610 if (regno
>= FIRST_PSEUDO_REGISTER
)
3612 regno
= true_regnum (in
);
3613 if (regno
>= FIRST_PSEUDO_REGISTER
)
3617 else if (GET_CODE (in
) == SUBREG
)
3619 regno
= true_regnum (in
);
3620 if (regno
>= FIRST_PSEUDO_REGISTER
)
3626 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
3628 if (class == GENERAL_REGS
|| class == BASE_REGS
3629 || (regno
>= 0 && INT_REGNO_P (regno
)))
3632 /* Constants, memory, and FP registers can go into FP registers. */
3633 if ((regno
== -1 || FP_REGNO_P (regno
))
3634 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
3637 /* We can copy among the CR registers. */
3638 if ((class == CR_REGS
|| class == CR0_REGS
)
3639 && regno
>= 0 && CR_REGNO_P (regno
))
3642 /* Otherwise, we need GENERAL_REGS. */
3643 return GENERAL_REGS
;
3646 /* Given a comparison operation, return the bit number in CCR to test. We
3647 know this is a valid comparison.
3649 SCC_P is 1 if this is for an scc. That means that %D will have been
3650 used instead of %C, so the bits will be in different places.
3652 Return -1 if OP isn't a valid comparison for some reason. */
3659 enum rtx_code code
= GET_CODE (op
);
3660 enum machine_mode cc_mode
;
3665 if (GET_RTX_CLASS (code
) != '<')
3670 if (GET_CODE (reg
) != REG
3671 || ! CR_REGNO_P (REGNO (reg
)))
3674 cc_mode
= GET_MODE (reg
);
3675 cc_regnum
= REGNO (reg
);
3676 base_bit
= 4 * (cc_regnum
- CR0_REGNO
);
3678 validate_condition_mode (code
, cc_mode
);
3683 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
3685 return base_bit
+ 2;
3686 case GT
: case GTU
: case UNLE
:
3687 return base_bit
+ 1;
3688 case LT
: case LTU
: case UNGE
:
3690 case ORDERED
: case UNORDERED
:
3691 return base_bit
+ 3;
3694 /* If scc, we will have done a cror to put the bit in the
3695 unordered position. So test that bit. For integer, this is ! LT
3696 unless this is an scc insn. */
3697 return scc_p
? base_bit
+ 3 : base_bit
;
3700 return scc_p
? base_bit
+ 3 : base_bit
+ 1;
3707 /* Return the GOT register. */
3710 rs6000_got_register (value
)
3711 rtx value ATTRIBUTE_UNUSED
;
3713 /* The second flow pass currently (June 1999) can't update regs_ever_live
3714 without disturbing other parts of the compiler, so update it here to
3715 make the prolog/epilogue code happy. */
3716 if (no_new_pseudos
&& ! regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
3717 regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
] = 1;
3719 current_function_uses_pic_offset_table
= 1;
3721 return pic_offset_table_rtx
;
3724 /* Functions to init, mark and free struct machine_function.
3725 These will be called, via pointer variables,
3726 from push_function_context and pop_function_context. */
3729 rs6000_init_machine_status (p
)
3732 p
->machine
= (machine_function
*) xcalloc (1, sizeof (machine_function
));
3736 rs6000_mark_machine_status (p
)
3740 ggc_mark_rtx (p
->machine
->ra_rtx
);
3744 rs6000_free_machine_status (p
)
3747 if (p
->machine
== NULL
)
3755 /* Print an operand. Recognize special options, documented below. */
3758 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
3759 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
3761 #define SMALL_DATA_RELOC "sda21"
3762 #define SMALL_DATA_REG 0
3766 print_operand (file
, x
, code
)
3774 /* These macros test for integers and extract the low-order bits. */
3776 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
3777 && GET_MODE (X) == VOIDmode)
3779 #define INT_LOWPART(X) \
3780 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
3785 /* Write out an instruction after the call which may be replaced
3786 with glue code by the loader. This depends on the AIX version. */
3787 asm_fprintf (file
, RS6000_CALL_GLUE
);
3791 /* Write out either a '.' or '$' for the current location, depending
3792 on whether this is Solaris or not. */
3793 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
3796 /* %a is output_address. */
3799 /* If X is a constant integer whose low-order 5 bits are zero,
3800 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
3801 in the AIX assembler where "sri" with a zero shift count
3802 write a trash instruction. */
3803 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
3810 /* If constant, low-order 16 bits of constant, unsigned.
3811 Otherwise, write normally. */
3813 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
3815 print_operand (file
, x
, 0);
3819 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
3820 for 64-bit mask direction. */
3821 putc (((INT_LOWPART(x
) & 1) == 0 ? 'r' : 'l'), file
);
3824 /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise
3828 /* There used to be a comment for 'C' reading "This is an
3829 optional cror needed for certain floating-point
3830 comparisons. Otherwise write nothing." */
3832 /* Similar, except that this is for an scc, so we must be able to
3833 encode the test in a single bit that is one. We do the above
3834 for any LE, GE, GEU, or LEU and invert the bit for NE. */
3835 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
3836 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
3838 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3840 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
3842 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
3845 else if (GET_CODE (x
) == NE
)
3847 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3849 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
3850 base_bit
+ 2, base_bit
+ 2);
3855 /* X is a CR register. Print the number of the EQ bit of the CR */
3856 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3857 output_operand_lossage ("invalid %%E value");
3859 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
) + 2);
3863 /* X is a CR register. Print the shift count needed to move it
3864 to the high-order four bits. */
3865 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3866 output_operand_lossage ("invalid %%f value");
3868 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
));
3872 /* Similar, but print the count for the rotate in the opposite
3874 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3875 output_operand_lossage ("invalid %%F value");
3877 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - CR0_REGNO
));
3881 /* X is a constant integer. If it is negative, print "m",
3882 otherwise print "z". This is to make a aze or ame insn. */
3883 if (GET_CODE (x
) != CONST_INT
)
3884 output_operand_lossage ("invalid %%G value");
3885 else if (INTVAL (x
) >= 0)
3892 /* If constant, output low-order five bits. Otherwise,
3895 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 31);
3897 print_operand (file
, x
, 0);
3901 /* If constant, output low-order six bits. Otherwise,
3904 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 63);
3906 print_operand (file
, x
, 0);
3910 /* Print `i' if this is a constant, else nothing. */
3916 /* Write the bit number in CCR for jump. */
3919 output_operand_lossage ("invalid %%j code");
3921 fprintf (file
, "%d", i
);
3925 /* Similar, but add one for shift count in rlinm for scc and pass
3926 scc flag to `ccr_bit'. */
3929 output_operand_lossage ("invalid %%J code");
3931 /* If we want bit 31, write a shift count of zero, not 32. */
3932 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
3936 /* X must be a constant. Write the 1's complement of the
3939 output_operand_lossage ("invalid %%k value");
3941 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, ~ INT_LOWPART (x
));
3945 /* X must be a symbolic constant on ELF. Write an
3946 expression suitable for an 'addi' that adds in the low 16
3948 if (GET_CODE (x
) != CONST
)
3950 print_operand_address (file
, x
);
3955 if (GET_CODE (XEXP (x
, 0)) != PLUS
3956 || (GET_CODE (XEXP (XEXP (x
, 0), 0)) != SYMBOL_REF
3957 && GET_CODE (XEXP (XEXP (x
, 0), 0)) != LABEL_REF
)
3958 || GET_CODE (XEXP (XEXP (x
, 0), 1)) != CONST_INT
)
3959 output_operand_lossage ("invalid %%K value");
3960 print_operand_address (file
, XEXP (XEXP (x
, 0), 0));
3962 print_operand (file
, XEXP (XEXP (x
, 0), 1), 0);
3966 /* %l is output_asm_label. */
3969 /* Write second word of DImode or DFmode reference. Works on register
3970 or non-indexed memory only. */
3971 if (GET_CODE (x
) == REG
)
3972 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
3973 else if (GET_CODE (x
) == MEM
)
3975 /* Handle possible auto-increment. Since it is pre-increment and
3976 we have already done it, we can just use an offset of word. */
3977 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3978 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3979 output_address (plus_constant_for_output (XEXP (XEXP (x
, 0), 0),
3982 output_address (plus_constant_for_output (XEXP (x
, 0),
3984 if (small_data_operand (x
, GET_MODE (x
)))
3985 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3986 reg_names
[SMALL_DATA_REG
]);
3991 /* MB value for a mask operand. */
3992 if (! mask_operand (x
, VOIDmode
))
3993 output_operand_lossage ("invalid %%m value");
3995 val
= INT_LOWPART (x
);
3997 /* If the high bit is set and the low bit is not, the value is zero.
3998 If the high bit is zero, the value is the first 1 bit we find from
4000 if ((val
& 0x80000000) && ((val
& 1) == 0))
4005 else if ((val
& 0x80000000) == 0)
4007 for (i
= 1; i
< 32; i
++)
4008 if ((val
<<= 1) & 0x80000000)
4010 fprintf (file
, "%d", i
);
4014 /* Otherwise, look for the first 0 bit from the right. The result is its
4015 number plus 1. We know the low-order bit is one. */
4016 for (i
= 0; i
< 32; i
++)
4017 if (((val
>>= 1) & 1) == 0)
4020 /* If we ended in ...01, i would be 0. The correct value is 31, so
4022 fprintf (file
, "%d", 31 - i
);
4026 /* ME value for a mask operand. */
4027 if (! mask_operand (x
, VOIDmode
))
4028 output_operand_lossage ("invalid %%M value");
4030 val
= INT_LOWPART (x
);
4032 /* If the low bit is set and the high bit is not, the value is 31.
4033 If the low bit is zero, the value is the first 1 bit we find from
4035 if ((val
& 1) && ((val
& 0x80000000) == 0))
4040 else if ((val
& 1) == 0)
4042 for (i
= 0; i
< 32; i
++)
4043 if ((val
>>= 1) & 1)
4046 /* If we had ....10, i would be 0. The result should be
4047 30, so we need 30 - i. */
4048 fprintf (file
, "%d", 30 - i
);
4052 /* Otherwise, look for the first 0 bit from the left. The result is its
4053 number minus 1. We know the high-order bit is one. */
4054 for (i
= 0; i
< 32; i
++)
4055 if (((val
<<= 1) & 0x80000000) == 0)
4058 fprintf (file
, "%d", i
);
4061 /* %n outputs the negative of its operand. */
4064 /* Write the number of elements in the vector times 4. */
4065 if (GET_CODE (x
) != PARALLEL
)
4066 output_operand_lossage ("invalid %%N value");
4068 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
4072 /* Similar, but subtract 1 first. */
4073 if (GET_CODE (x
) != PARALLEL
)
4074 output_operand_lossage ("invalid %%O value");
4076 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
4080 /* X is a CONST_INT that is a power of two. Output the logarithm. */
4082 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
4083 output_operand_lossage ("invalid %%p value");
4085 fprintf (file
, "%d", i
);
4089 /* The operand must be an indirect memory reference. The result
4090 is the register number. */
4091 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
4092 || REGNO (XEXP (x
, 0)) >= 32)
4093 output_operand_lossage ("invalid %%P value");
4095 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
4099 /* This outputs the logical code corresponding to a boolean
4100 expression. The expression may have one or both operands
4101 negated (if one, only the first one). For condition register
4102 logical operations, it will also treat the negated
4103 CR codes as NOTs, but not handle NOTs of them. */
4105 const char *const *t
= 0;
4107 enum rtx_code code
= GET_CODE (x
);
4108 static const char * const tbl
[3][3] = {
4109 { "and", "andc", "nor" },
4110 { "or", "orc", "nand" },
4111 { "xor", "eqv", "xor" } };
4115 else if (code
== IOR
)
4117 else if (code
== XOR
)
4120 output_operand_lossage ("invalid %%q value");
4122 if (GET_CODE (XEXP (x
, 0)) != NOT
)
4126 if (GET_CODE (XEXP (x
, 1)) == NOT
)
4137 /* X is a CR register. Print the mask for `mtcrf'. */
4138 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
4139 output_operand_lossage ("invalid %%R value");
4141 fprintf (file
, "%d", 128 >> (REGNO (x
) - CR0_REGNO
));
4145 /* Low 5 bits of 32 - value */
4147 output_operand_lossage ("invalid %%s value");
4149 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (32 - INT_LOWPART (x
)) & 31);
4153 /* PowerPC64 mask position. All 0's and all 1's are excluded.
4154 CONST_INT 32-bit mask is considered sign-extended so any
4155 transition must occur within the CONST_INT, not on the boundary. */
4156 if (! mask64_operand (x
, VOIDmode
))
4157 output_operand_lossage ("invalid %%S value");
4159 val
= INT_LOWPART (x
);
4161 if (val
& 1) /* Clear Left */
4163 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4164 if (!((val
>>= 1) & 1))
4167 #if HOST_BITS_PER_WIDE_INT == 32
4168 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4170 val
= CONST_DOUBLE_HIGH (x
);
4175 for (i
= 32; i
< 64; i
++)
4176 if (!((val
>>= 1) & 1))
4180 /* i = index of last set bit from right
4181 mask begins at 63 - i from left */
4183 output_operand_lossage ("%%S computed all 1's mask");
4185 fprintf (file
, "%d", 63 - i
);
4188 else /* Clear Right */
4190 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4191 if ((val
>>= 1) & 1)
4194 #if HOST_BITS_PER_WIDE_INT == 32
4195 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4197 val
= CONST_DOUBLE_HIGH (x
);
4199 if (val
== (HOST_WIDE_INT
) -1)
4202 for (i
= 32; i
< 64; i
++)
4203 if ((val
>>= 1) & 1)
4207 /* i = index of last clear bit from right
4208 mask ends at 62 - i from left */
4210 output_operand_lossage ("%%S computed all 0's mask");
4212 fprintf (file
, "%d", 62 - i
);
4217 /* Print the symbolic name of a branch target register. */
4218 if (GET_CODE (x
) != REG
|| (REGNO (x
) != LINK_REGISTER_REGNUM
4219 && REGNO (x
) != COUNT_REGISTER_REGNUM
))
4220 output_operand_lossage ("invalid %%T value");
4221 else if (REGNO (x
) == LINK_REGISTER_REGNUM
)
4222 fputs (TARGET_NEW_MNEMONICS
? "lr" : "r", file
);
4224 fputs ("ctr", file
);
4228 /* High-order 16 bits of constant for use in unsigned operand. */
4230 output_operand_lossage ("invalid %%u value");
4232 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
4233 (INT_LOWPART (x
) >> 16) & 0xffff);
4237 /* High-order 16 bits of constant for use in signed operand. */
4239 output_operand_lossage ("invalid %%v value");
4242 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
4244 /* Solaris assembler doesn't like lis 0,0x8000 */
4245 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
4246 fprintf (file
, "%d", value
| (~0 << 16));
4248 fprintf (file
, "0x%x", value
);
4253 /* Print `u' if this has an auto-increment or auto-decrement. */
4254 if (GET_CODE (x
) == MEM
4255 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
4256 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
4261 /* Print the trap code for this operand. */
4262 switch (GET_CODE (x
))
4265 fputs ("eq", file
); /* 4 */
4268 fputs ("ne", file
); /* 24 */
4271 fputs ("lt", file
); /* 16 */
4274 fputs ("le", file
); /* 20 */
4277 fputs ("gt", file
); /* 8 */
4280 fputs ("ge", file
); /* 12 */
4283 fputs ("llt", file
); /* 2 */
4286 fputs ("lle", file
); /* 6 */
4289 fputs ("lgt", file
); /* 1 */
4292 fputs ("lge", file
); /* 5 */
4300 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
4303 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
4304 ((INT_LOWPART (x
) & 0xffff) ^ 0x8000) - 0x8000);
4306 print_operand (file
, x
, 0);
4310 /* MB value for a PowerPC64 rldic operand. */
4311 if (! rldic_operand (x
, VOIDmode
))
4312 output_operand_lossage ("invalid %%W value");
4314 val
= (GET_CODE (x
) == CONST_INT
4315 ? INTVAL (x
) : CONST_DOUBLE_HIGH (x
));
4320 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4321 if ((val
<<= 1) < 0)
4324 #if HOST_BITS_PER_WIDE_INT == 32
4325 if (GET_CODE (x
) == CONST_INT
&& i
>= 0)
4326 i
+= 32; /* zero-extend high-part was all 0's */
4327 else if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4329 val
= CONST_DOUBLE_LOW (x
);
4336 for ( ; i
< 64; i
++)
4337 if ((val
<<= 1) < 0)
4342 fprintf (file
, "%d", i
+ 1);
4346 if (GET_CODE (x
) == MEM
4347 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0), 0))
4352 /* Like 'L', for third word of TImode */
4353 if (GET_CODE (x
) == REG
)
4354 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
4355 else if (GET_CODE (x
) == MEM
)
4357 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4358 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4359 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
4361 output_address (plus_constant (XEXP (x
, 0), 8));
4362 if (small_data_operand (x
, GET_MODE (x
)))
4363 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4364 reg_names
[SMALL_DATA_REG
]);
4369 /* X is a SYMBOL_REF. Write out the name preceded by a
4370 period and without any trailing data in brackets. Used for function
4371 names. If we are configured for System V (or the embedded ABI) on
4372 the PowerPC, do not emit the period, since those systems do not use
4373 TOCs and the like. */
4374 if (GET_CODE (x
) != SYMBOL_REF
)
4377 if (XSTR (x
, 0)[0] != '.')
4379 switch (DEFAULT_ABI
)
4389 case ABI_AIX_NODESC
:
4396 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
4398 assemble_name (file
, XSTR (x
, 0));
4403 /* Like 'L', for last word of TImode. */
4404 if (GET_CODE (x
) == REG
)
4405 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
4406 else if (GET_CODE (x
) == MEM
)
4408 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4409 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4410 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
4412 output_address (plus_constant (XEXP (x
, 0), 12));
4413 if (small_data_operand (x
, GET_MODE (x
)))
4414 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4415 reg_names
[SMALL_DATA_REG
]);
4420 if (GET_CODE (x
) == REG
)
4421 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
4422 else if (GET_CODE (x
) == MEM
)
4424 /* We need to handle PRE_INC and PRE_DEC here, since we need to
4425 know the width from the mode. */
4426 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
4427 fprintf (file
, "%d(%s)", GET_MODE_SIZE (GET_MODE (x
)),
4428 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4429 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4430 fprintf (file
, "%d(%s)", - GET_MODE_SIZE (GET_MODE (x
)),
4431 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4433 output_address (XEXP (x
, 0));
4436 output_addr_const (file
, x
);
4440 output_operand_lossage ("invalid %%xn code");
4444 /* Print the address of an operand. */
4447 print_operand_address (file
, x
)
4451 if (GET_CODE (x
) == REG
)
4452 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
4453 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
4454 || GET_CODE (x
) == LABEL_REF
)
4456 output_addr_const (file
, x
);
4457 if (small_data_operand (x
, GET_MODE (x
)))
4458 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4459 reg_names
[SMALL_DATA_REG
]);
4460 else if (TARGET_TOC
)
4463 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
4465 if (REGNO (XEXP (x
, 0)) == 0)
4466 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
4467 reg_names
[ REGNO (XEXP (x
, 0)) ]);
4469 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
4470 reg_names
[ REGNO (XEXP (x
, 1)) ]);
4472 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4474 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (XEXP (x
, 1)));
4475 fprintf (file
, "(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4478 else if (GET_CODE (x
) == LO_SUM
&& GET_CODE (XEXP (x
, 0)) == REG
4479 && CONSTANT_P (XEXP (x
, 1)))
4481 output_addr_const (file
, XEXP (x
, 1));
4482 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4485 else if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
4489 rtx contains_minus
= XEXP (x
, 1);
4492 /* Find the (minus (sym) (toc)) buried in X, and temporarily
4493 turn it into (sym) for output_addr_const. */
4494 while (GET_CODE (XEXP (contains_minus
, 0)) != MINUS
)
4495 contains_minus
= XEXP (contains_minus
, 0);
4497 minus
= XEXP (contains_minus
, 0);
4498 XEXP (contains_minus
, 0) = XEXP (minus
, 0);
4499 output_addr_const (file
, XEXP (x
, 1));
4500 XEXP (contains_minus
, 0) = minus
;
4503 output_addr_const (file
, XEXP (x
, 1));
4505 fprintf (file
, "(%s)", reg_names
[REGNO (XEXP (x
, 0))]);
4512 rs6000_reverse_condition (mode
, code
)
4513 enum machine_mode mode
;
4516 /* Reversal of FP compares takes care -- an ordered compare
4517 becomes an unordered compare and vice versa. */
4518 if (mode
== CCFPmode
)
4519 return reverse_condition_maybe_unordered (code
);
4521 return reverse_condition (code
);
4525 /* Generate a compare for CODE. Return a brand-new rtx that
4526 represents the result of the compare. */
4528 rs6000_generate_compare (code
)
4531 enum machine_mode comp_mode
;
4534 if (rs6000_compare_fp_p
)
4535 comp_mode
= CCFPmode
;
4536 else if (code
== GTU
|| code
== LTU
4537 || code
== GEU
|| code
== LEU
)
4538 comp_mode
= CCUNSmode
;
4542 /* First, the compare. */
4543 compare_result
= gen_reg_rtx (comp_mode
);
4544 emit_insn (gen_rtx_SET (VOIDmode
, compare_result
,
4545 gen_rtx_COMPARE (comp_mode
,
4547 rs6000_compare_op1
)));
4549 /* Some kinds of FP comparisons need an OR operation;
4550 except for flag_unsafe_math_optimizations we don't bother. */
4551 if (rs6000_compare_fp_p
4552 && ! flag_unsafe_math_optimizations
4553 && (code
== LE
|| code
== GE
4554 || code
== UNEQ
|| code
== LTGT
4555 || code
== UNGT
|| code
== UNLT
))
4557 enum rtx_code or1
, or2
;
4558 rtx or1_rtx
, or2_rtx
, compare2_rtx
;
4559 rtx or_result
= gen_reg_rtx (CCEQmode
);
4563 case LE
: or1
= LT
; or2
= EQ
; break;
4564 case GE
: or1
= GT
; or2
= EQ
; break;
4565 case UNEQ
: or1
= UNORDERED
; or2
= EQ
; break;
4566 case LTGT
: or1
= LT
; or2
= GT
; break;
4567 case UNGT
: or1
= UNORDERED
; or2
= GT
; break;
4568 case UNLT
: or1
= UNORDERED
; or2
= LT
; break;
4571 validate_condition_mode (or1
, comp_mode
);
4572 validate_condition_mode (or2
, comp_mode
);
4573 or1_rtx
= gen_rtx (or1
, SImode
, compare_result
, const0_rtx
);
4574 or2_rtx
= gen_rtx (or2
, SImode
, compare_result
, const0_rtx
);
4575 compare2_rtx
= gen_rtx_COMPARE (CCEQmode
,
4576 gen_rtx_IOR (SImode
, or1_rtx
, or2_rtx
),
4578 emit_insn (gen_rtx_SET (VOIDmode
, or_result
, compare2_rtx
));
4580 compare_result
= or_result
;
4584 validate_condition_mode (code
, GET_MODE (compare_result
));
4586 return gen_rtx (code
, VOIDmode
, compare_result
, const0_rtx
);
4590 /* Emit the RTL for an sCOND pattern. */
4593 rs6000_emit_sCOND (code
, result
)
4598 enum machine_mode op_mode
;
4600 condition_rtx
= rs6000_generate_compare (code
);
4602 op_mode
= GET_MODE (rs6000_compare_op0
);
4603 if (op_mode
== VOIDmode
)
4604 op_mode
= GET_MODE (rs6000_compare_op1
);
4606 if (TARGET_POWERPC64
&& (op_mode
== DImode
|| rs6000_compare_fp_p
))
4608 PUT_MODE (condition_rtx
, DImode
);
4609 convert_move (result
, condition_rtx
, 0);
4613 PUT_MODE (condition_rtx
, SImode
);
4614 emit_insn (gen_rtx_SET (VOIDmode
, result
, condition_rtx
));
4619 /* Emit a branch of kind CODE to location LOC. */
4622 rs6000_emit_cbranch (code
, loc
)
4626 rtx condition_rtx
, loc_ref
;
4628 condition_rtx
= rs6000_generate_compare (code
);
4629 loc_ref
= gen_rtx_LABEL_REF (VOIDmode
, loc
);
4630 emit_jump_insn (gen_rtx_SET (VOIDmode
, pc_rtx
,
4631 gen_rtx_IF_THEN_ELSE (VOIDmode
, condition_rtx
,
4636 /* Return the string to output a conditional branch to LABEL, which is
4637 the operand number of the label, or -1 if the branch is really a
4640 OP is the conditional expression. XEXP (OP, 0) is assumed to be a
4641 condition code register and its mode specifies what kind of
4644 REVERSED is non-zero if we should reverse the sense of the comparison.
4646 INSN is the insn. */
4649 output_cbranch (op
, label
, reversed
, insn
)
4655 static char string
[64];
4656 enum rtx_code code
= GET_CODE (op
);
4657 rtx cc_reg
= XEXP (op
, 0);
4658 enum machine_mode mode
= GET_MODE (cc_reg
);
4659 int cc_regno
= REGNO (cc_reg
) - CR0_REGNO
;
4660 int need_longbranch
= label
!= NULL
&& get_attr_length (insn
) == 8;
4661 int really_reversed
= reversed
^ need_longbranch
;
4667 validate_condition_mode (code
, mode
);
4669 /* Work out which way this really branches. We could use
4670 reverse_condition_maybe_unordered here always but this
4671 makes the resulting assembler clearer. */
4672 if (really_reversed
)
4673 code
= rs6000_reverse_condition (mode
, code
);
4677 /* Not all of these are actually distinct opcodes, but
4678 we distinguish them for clarity of the resulting assembler. */
4679 case NE
: ccode
= "ne"; break;
4680 case EQ
: ccode
= "eq"; break;
4681 case GE
: case GEU
: ccode
= "ge"; break;
4682 case GT
: case GTU
: ccode
= "gt"; break;
4683 case LE
: case LEU
: ccode
= "le"; break;
4684 case LT
: case LTU
: ccode
= "lt"; break;
4685 case UNORDERED
: ccode
= "un"; break;
4686 case ORDERED
: ccode
= "nu"; break;
4687 case UNGE
: ccode
= "nl"; break;
4688 case UNLE
: ccode
= "ng"; break;
4693 /* Maybe we have a guess as to how likely the branch is.
4694 The old mnemonics don't have a way to specify this information. */
4695 note
= find_reg_note (insn
, REG_BR_PROB
, NULL_RTX
);
4696 if (note
!= NULL_RTX
)
4698 /* PROB is the difference from 50%. */
4699 int prob
= INTVAL (XEXP (note
, 0)) - REG_BR_PROB_BASE
/ 2;
4701 /* For branches that are very close to 50%, assume not-taken. */
4702 if (abs (prob
) > REG_BR_PROB_BASE
/ 20
4703 && ((prob
> 0) ^ need_longbranch
))
4712 s
+= sprintf (s
, "{b%sr|b%slr%s} ", ccode
, ccode
, pred
);
4714 s
+= sprintf (s
, "{b%s|b%s%s} ", ccode
, ccode
, pred
);
4716 /* We need to escape any '%' characters in the reg_names string.
4717 Assume they'd only be the first character... */
4718 if (reg_names
[cc_regno
+ CR0_REGNO
][0] == '%')
4720 s
+= sprintf (s
, "%s", reg_names
[cc_regno
+ CR0_REGNO
]);
4724 /* If the branch distance was too far, we may have to use an
4725 unconditional branch to go the distance. */
4726 if (need_longbranch
)
4727 s
+= sprintf (s
, ",%c$+8\n\tb %s", '%', label
);
4729 s
+= sprintf (s
, ",%s", label
);
4735 /* This page contains routines that are used to determine what the function
4736 prologue and epilogue code will do and write them out. */
4738 /* Return the first fixed-point register that is required to be saved. 32 if
4742 first_reg_to_save ()
4746 /* Find lowest numbered live register. */
4747 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
4748 if (regs_ever_live
[first_reg
]
4749 && (! call_used_regs
[first_reg
]
4750 || (first_reg
== PIC_OFFSET_TABLE_REGNUM
4751 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4753 || (DEFAULT_ABI
== ABI_DARWIN
4759 /* AIX must save/restore every register that contains a parameter
4760 before/after the .__mcount call plus an additional register
4761 for the static chain, if needed; use registers from 30 down to 22
4763 if (DEFAULT_ABI
== ABI_AIX
|| DEFAULT_ABI
== ABI_DARWIN
)
4765 int last_parm_reg
, profile_first_reg
;
4767 /* Figure out last used parameter register. The proper thing
4768 to do is to walk incoming args of the function. A function
4769 might have live parameter registers even if it has no
4771 for (last_parm_reg
= 10;
4772 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4776 /* Calculate first reg for saving parameter registers
4778 Skip reg 31 which may contain the frame pointer. */
4779 profile_first_reg
= (33 - last_parm_reg
4780 - (current_function_needs_context
? 1 : 0));
4782 /* Need to skip another reg to account for R31 being PICBASE
4783 (when flag_pic is set) or R30 being used as the frame
4784 pointer (when flag_pic is not set). */
4785 --profile_first_reg
;
4787 /* Do not save frame pointer if no parameters needs to be saved. */
4788 if (profile_first_reg
== 31)
4789 profile_first_reg
= 32;
4791 if (first_reg
> profile_first_reg
)
4792 first_reg
= profile_first_reg
;
4795 /* SVR4 may need one register to preserve the static chain. */
4796 else if (current_function_needs_context
)
4798 /* Skip reg 31 which may contain the frame pointer. */
4805 if (flag_pic
&& current_function_uses_pic_offset_table
&&
4806 (first_reg
> PIC_OFFSET_TABLE_REGNUM
))
4807 return PIC_OFFSET_TABLE_REGNUM
;
4813 /* Similar, for FP regs. */
4816 first_fp_reg_to_save ()
4820 /* Find lowest numbered live register. */
4821 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
4822 if (regs_ever_live
[first_reg
])
4828 /* Calculate the stack information for the current function. This is
4829 complicated by having two separate calling sequences, the AIX calling
4830 sequence and the V.4 calling sequence.
4832 AIX (and Darwin/Mac OS) stack frames look like:
4834 SP----> +---------------------------------------+
4835 | back chain to caller | 0 0
4836 +---------------------------------------+
4837 | saved CR | 4 8 (8-11)
4838 +---------------------------------------+
4840 +---------------------------------------+
4841 | reserved for compilers | 12 24
4842 +---------------------------------------+
4843 | reserved for binders | 16 32
4844 +---------------------------------------+
4845 | saved TOC pointer | 20 40
4846 +---------------------------------------+
4847 | Parameter save area (P) | 24 48
4848 +---------------------------------------+
4849 | Alloca space (A) | 24+P etc.
4850 +---------------------------------------+
4851 | Local variable space (L) | 24+P+A
4852 +---------------------------------------+
4853 | Float/int conversion temporary (X) | 24+P+A+L
4854 +---------------------------------------+
4855 | Save area for GP registers (G) | 24+P+A+X+L
4856 +---------------------------------------+
4857 | Save area for FP registers (F) | 24+P+A+X+L+G
4858 +---------------------------------------+
4859 old SP->| back chain to caller's caller |
4860 +---------------------------------------+
4862 The required alignment for AIX configurations is two words (i.e., 8
4866 V.4 stack frames look like:
4868 SP----> +---------------------------------------+
4869 | back chain to caller | 0
4870 +---------------------------------------+
4871 | caller's saved LR | 4
4872 +---------------------------------------+
4873 | Parameter save area (P) | 8
4874 +---------------------------------------+
4875 | Alloca space (A) | 8+P
4876 +---------------------------------------+
4877 | Varargs save area (V) | 8+P+A
4878 +---------------------------------------+
4879 | Local variable space (L) | 8+P+A+V
4880 +---------------------------------------+
4881 | Float/int conversion temporary (X) | 8+P+A+V+L
4882 +---------------------------------------+
4883 | saved CR (C) | 8+P+A+V+L+X
4884 +---------------------------------------+
4885 | Save area for GP registers (G) | 8+P+A+V+L+X+C
4886 +---------------------------------------+
4887 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
4888 +---------------------------------------+
4889 old SP->| back chain to caller's caller |
4890 +---------------------------------------+
4892 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
4893 given. (But note below and in sysv4.h that we require only 8 and
4894 may round up the size of our stack frame anyways. The historical
4895 reason is early versions of powerpc-linux which didn't properly
4896 align the stack at program startup. A happy side-effect is that
4897 -mno-eabi libraries can be used with -meabi programs.)
4900 The EABI configuration defaults to the V.4 layout, unless
4901 -mcall-aix is used, in which case the AIX layout is used. However,
4902 the stack alignment requirements may differ. If -mno-eabi is not
4903 given, the required stack alignment is 8 bytes; if -mno-eabi is
4904 given, the required alignment is 16 bytes. (But see V.4 comment
4907 #ifndef ABI_STACK_BOUNDARY
4908 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
4912 rs6000_stack_info ()
4914 static rs6000_stack_t info
, zero_info
;
4915 rs6000_stack_t
*info_ptr
= &info
;
4916 int reg_size
= TARGET_POWERPC64
? 8 : 4;
4917 enum rs6000_abi abi
;
4921 /* Zero all fields portably */
4924 /* Select which calling sequence */
4925 info_ptr
->abi
= abi
= DEFAULT_ABI
;
4927 /* Calculate which registers need to be saved & save area size */
4928 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
4929 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
4930 even if it currently looks like we won't. */
4932 && (abi
== ABI_V4
|| abi
== ABI_SOLARIS
))
4935 && info_ptr
->first_gp_reg_save
> PIC_OFFSET_TABLE_REGNUM
)
4936 info_ptr
->gp_size
= reg_size
* (32 - PIC_OFFSET_TABLE_REGNUM
);
4938 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
4940 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
4941 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
4943 /* Does this function call anything? */
4944 info_ptr
->calls_p
= (! current_function_is_leaf
4945 || cfun
->machine
->ra_needs_full_frame
);
4947 /* Determine if we need to save the link register */
4948 if (rs6000_ra_ever_killed ()
4949 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
4950 #ifdef TARGET_RELOCATABLE
4951 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
4953 || (info_ptr
->first_fp_reg_save
!= 64
4954 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
4955 || (abi
== ABI_V4
&& current_function_calls_alloca
)
4956 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
4957 || (DEFAULT_ABI
== ABI_DARWIN
&& flag_pic
&& current_function_uses_pic_offset_table
)
4958 || info_ptr
->calls_p
)
4960 info_ptr
->lr_save_p
= 1;
4961 regs_ever_live
[LINK_REGISTER_REGNUM
] = 1;
4964 /* Determine if we need to save the condition code registers. */
4965 if (regs_ever_live
[CR2_REGNO
]
4966 || regs_ever_live
[CR3_REGNO
]
4967 || regs_ever_live
[CR4_REGNO
])
4969 info_ptr
->cr_save_p
= 1;
4970 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
4971 info_ptr
->cr_size
= reg_size
;
4974 /* If the current function calls __builtin_eh_return, then we need
4975 to allocate stack space for registers that will hold data for
4976 the exception handler. */
4977 if (current_function_calls_eh_return
)
4980 for (i
= 0; EH_RETURN_DATA_REGNO (i
) != INVALID_REGNUM
; ++i
)
4982 ehrd_size
= i
* UNITS_PER_WORD
;
4987 /* Determine various sizes */
4988 info_ptr
->reg_size
= reg_size
;
4989 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
4990 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
4991 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
4992 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
4993 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
4998 + info_ptr
->toc_size
, 8);
4999 if (DEFAULT_ABI
== ABI_DARWIN
)
5000 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->save_size
, 16);
5002 /* Calculate the offsets */
5010 case ABI_AIX_NODESC
:
5012 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
5013 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
5014 info_ptr
->ehrd_offset
= info_ptr
->gp_save_offset
- ehrd_size
;
5015 info_ptr
->cr_save_offset
= reg_size
; /* first word when 64-bit. */
5016 info_ptr
->lr_save_offset
= 2*reg_size
;
5021 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
5022 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
5023 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
5024 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
5025 info_ptr
->ehrd_offset
= info_ptr
->toc_save_offset
- ehrd_size
;
5026 info_ptr
->lr_save_offset
= reg_size
;
5030 total_raw_size
= (info_ptr
->vars_size
5031 + info_ptr
->parm_size
5032 + info_ptr
->save_size
5033 + info_ptr
->varargs_size
5034 + info_ptr
->fixed_size
);
5036 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
5038 /* Determine if we need to allocate any stack frame:
5040 For AIX we need to push the stack if a frame pointer is needed (because
5041 the stack might be dynamically adjusted), if we are debugging, if we
5042 make calls, or if the sum of fp_save, gp_save, and local variables
5043 are more than the space needed to save all non-volatile registers:
5044 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
5046 For V.4 we don't have the stack cushion that AIX uses, but assume that
5047 the debugger can handle stackless frames. */
5049 if (info_ptr
->calls_p
)
5050 info_ptr
->push_p
= 1;
5052 else if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
5053 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
5054 || info_ptr
->calls_p
);
5057 info_ptr
->push_p
= (frame_pointer_needed
5058 || (abi
!= ABI_DARWIN
&& write_symbols
!= NO_DEBUG
)
5059 || ((total_raw_size
- info_ptr
->fixed_size
)
5060 > (TARGET_32BIT
? 220 : 288)));
5062 /* Zero offsets if we're not saving those registers */
5063 if (info_ptr
->fp_size
== 0)
5064 info_ptr
->fp_save_offset
= 0;
5066 if (info_ptr
->gp_size
== 0)
5067 info_ptr
->gp_save_offset
= 0;
5069 if (! info_ptr
->lr_save_p
)
5070 info_ptr
->lr_save_offset
= 0;
5072 if (! info_ptr
->cr_save_p
)
5073 info_ptr
->cr_save_offset
= 0;
5075 if (! info_ptr
->toc_save_p
)
5076 info_ptr
->toc_save_offset
= 0;
5082 debug_stack_info (info
)
5083 rs6000_stack_t
*info
;
5085 const char *abi_string
;
5088 info
= rs6000_stack_info ();
5090 fprintf (stderr
, "\nStack information for function %s:\n",
5091 ((current_function_decl
&& DECL_NAME (current_function_decl
))
5092 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
5097 default: abi_string
= "Unknown"; break;
5098 case ABI_NONE
: abi_string
= "NONE"; break;
5099 case ABI_AIX
: abi_string
= "AIX"; break;
5100 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
5101 case ABI_DARWIN
: abi_string
= "Darwin"; break;
5102 case ABI_V4
: abi_string
= "V.4"; break;
5103 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
5106 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
5108 if (info
->first_gp_reg_save
!= 32)
5109 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
5111 if (info
->first_fp_reg_save
!= 64)
5112 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
5114 if (info
->lr_save_p
)
5115 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
5117 if (info
->cr_save_p
)
5118 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
5120 if (info
->toc_save_p
)
5121 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
5124 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
5127 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
5129 if (info
->gp_save_offset
)
5130 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
5132 if (info
->fp_save_offset
)
5133 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
5135 if (info
->lr_save_offset
)
5136 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
5138 if (info
->cr_save_offset
)
5139 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
5141 if (info
->toc_save_offset
)
5142 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
5144 if (info
->varargs_save_offset
)
5145 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
5147 if (info
->total_size
)
5148 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
5150 if (info
->varargs_size
)
5151 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
5153 if (info
->vars_size
)
5154 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
5156 if (info
->parm_size
)
5157 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
5159 if (info
->fixed_size
)
5160 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
5163 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
5166 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
5169 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
5172 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
5175 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
5177 if (info
->save_size
)
5178 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
5180 if (info
->reg_size
!= 4)
5181 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
5183 fprintf (stderr
, "\n");
5187 rs6000_return_addr (count
, frame
)
5193 /* Currently we don't optimize very well between prolog and body code and
5194 for PIC code the code can be actually quite bad, so don't try to be
5198 || DEFAULT_ABI
== ABI_AIX
5199 || DEFAULT_ABI
== ABI_AIX_NODESC
)
5201 cfun
->machine
->ra_needs_full_frame
= 1;
5204 memory_address (Pmode
,
5205 plus_constant (copy_to_reg (gen_rtx_MEM (Pmode
,
5206 memory_address (Pmode
, frame
))),
5207 RETURN_ADDRESS_OFFSET
)));
5210 reg
= cfun
->machine
->ra_rtx
;
5213 /* No rtx yet. Invent one, and initialize it from LR in
5215 reg
= gen_reg_rtx (Pmode
);
5216 cfun
->machine
->ra_rtx
= reg
;
5217 init
= gen_rtx_SET (VOIDmode
, reg
,
5218 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5220 /* Emit the insn to the prologue with the other argument copies. */
5221 push_topmost_sequence ();
5222 emit_insn_after (init
, get_insns ());
5223 pop_topmost_sequence ();
5230 rs6000_ra_ever_killed ()
5234 #ifdef ASM_OUTPUT_MI_THUNK
5235 if (current_function_is_thunk
)
5238 if (!cfun
->machine
->ra_rtx
|| cfun
->machine
->ra_needs_full_frame
)
5239 return regs_ever_live
[LINK_REGISTER_REGNUM
];
5241 push_topmost_sequence ();
5243 pop_topmost_sequence ();
5245 return reg_set_between_p (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
5249 /* Add a REG_MAYBE_DEAD note to the insn. */
5251 rs6000_maybe_dead (insn
)
5254 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD
,
5259 /* Emit instructions needed to load the TOC register.
5260 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
5261 a constant pool; or for SVR4 -fpic. */
5264 rs6000_emit_load_toc_table (fromprolog
)
5268 dest
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5272 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5275 rtx temp
= (fromprolog
5276 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5277 : gen_reg_rtx (Pmode
));
5279 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_si (temp
)));
5281 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_di (temp
)));
5282 rs6000_maybe_dead (emit_move_insn (dest
, temp
));
5284 else if (flag_pic
== 2)
5287 rtx tempLR
= (fromprolog
5288 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5289 : gen_reg_rtx (Pmode
));
5290 rtx temp0
= (fromprolog
5291 ? gen_rtx_REG (Pmode
, 0)
5292 : gen_reg_rtx (Pmode
));
5295 /* possibly create the toc section */
5296 if (! toc_initialized
)
5299 function_section (current_function_decl
);
5306 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
5307 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5309 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
5310 symL
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5312 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR
,
5314 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5315 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0
, dest
,
5322 static int reload_toc_labelno
= 0;
5324 tocsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
));
5326 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCG", reload_toc_labelno
++);
5327 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5329 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1b (tempLR
,
5332 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5333 rs6000_maybe_dead (emit_move_insn (temp0
,
5334 gen_rtx_MEM (Pmode
, dest
)));
5336 rs6000_maybe_dead (emit_insn (gen_addsi3 (dest
, temp0
, dest
)));
5338 else if (flag_pic
== 0 && TARGET_MINIMAL_TOC
)
5340 /* This is for AIX code running in non-PIC ELF. */
5343 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
5344 realsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5346 rs6000_maybe_dead (emit_insn (gen_elf_high (dest
, realsym
)));
5347 rs6000_maybe_dead (emit_insn (gen_elf_low (dest
, dest
, realsym
)));
5355 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_si (dest
)));
5357 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_di (dest
)));
5362 get_TOC_alias_set ()
5364 static int set
= -1;
5366 set
= new_alias_set ();
5370 /* This retuns nonzero if the current function uses the TOC. This is
5371 determined by the presence of (unspec ... 7), which is generated by
5372 the various load_toc_* patterns. */
5378 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
5381 rtx pat
= PATTERN (insn
);
5384 if (GET_CODE (pat
) == PARALLEL
)
5385 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
5386 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == UNSPEC
5387 && XINT (XVECEXP (PATTERN (insn
), 0, i
), 1) == 7)
5394 create_TOC_reference(symbol
)
5397 return gen_rtx_PLUS (Pmode
,
5398 gen_rtx_REG (Pmode
, TOC_REGISTER
),
5399 gen_rtx_CONST (Pmode
,
5400 gen_rtx_MINUS (Pmode
, symbol
,
5401 gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
)))));
5405 /* __throw will restore its own return address to be the same as the
5406 return address of the function that the throw is being made to.
5407 This is unfortunate, because we want to check the original
5408 return address to see if we need to restore the TOC.
5409 So we have to squirrel it away here.
5410 This is used only in compiling __throw and __rethrow.
5412 Most of this code should be removed by CSE. */
5413 static rtx insn_after_throw
;
5415 /* This does the saving... */
5417 rs6000_aix_emit_builtin_unwind_init ()
5420 rtx stack_top
= gen_reg_rtx (Pmode
);
5421 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5423 insn_after_throw
= gen_reg_rtx (SImode
);
5425 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5426 emit_move_insn (stack_top
, mem
);
5428 mem
= gen_rtx_MEM (Pmode
,
5429 gen_rtx_PLUS (Pmode
, stack_top
,
5430 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5431 emit_move_insn (opcode_addr
, mem
);
5432 emit_move_insn (insn_after_throw
, gen_rtx_MEM (SImode
, opcode_addr
));
5435 /* Emit insns to _restore_ the TOC register, at runtime (specifically in _eh.o).
5438 The idea is that on AIX, function calls look like this:
5439 bl somefunction-trampoline
5443 somefunction-trampoline:
5445 ... load function address in the count register ...
5447 or like this, if the linker determines that this is not a cross-module call
5448 and so the TOC need not be restored:
5451 or like this, if the compiler could determine that this is not a
5454 now, the tricky bit here is that register 2 is saved and restored
5455 by the _linker_, so we can't readily generate debugging information
5456 for it. So we need to go back up the call chain looking at the
5457 insns at return addresses to see which calls saved the TOC register
5458 and so see where it gets restored from.
5460 Oh, and all this gets done in RTL inside the eh_epilogue pattern,
5461 just before the actual epilogue.
5463 On the bright side, this incurs no space or time overhead unless an
5464 exception is thrown, except for the extra code in libgcc.a.
5466 The parameter STACKSIZE is a register containing (at runtime)
5467 the amount to be popped off the stack in addition to the stack frame
5468 of this routine (which will be __throw or __rethrow, and so is
5469 guaranteed to have a stack frame). */
5471 rs6000_emit_eh_toc_restore (stacksize
)
5475 rtx bottom_of_stack
= gen_reg_rtx (Pmode
);
5476 rtx tocompare
= gen_reg_rtx (SImode
);
5477 rtx opcode
= gen_reg_rtx (SImode
);
5478 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5480 rtx loop_start
= gen_label_rtx ();
5481 rtx no_toc_restore_needed
= gen_label_rtx ();
5482 rtx loop_exit
= gen_label_rtx ();
5484 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5485 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5486 emit_move_insn (bottom_of_stack
, mem
);
5488 top_of_stack
= expand_binop (Pmode
, add_optab
,
5489 bottom_of_stack
, stacksize
,
5490 NULL_RTX
, 1, OPTAB_WIDEN
);
5492 emit_move_insn (tocompare
,
5493 GEN_INT (trunc_int_for_mode (TARGET_32BIT
5495 : 0xE8410028, SImode
)));
5497 if (insn_after_throw
== NULL_RTX
)
5499 emit_move_insn (opcode
, insn_after_throw
);
5501 emit_note (NULL
, NOTE_INSN_LOOP_BEG
);
5502 emit_label (loop_start
);
5504 do_compare_rtx_and_jump (opcode
, tocompare
, NE
, 1,
5505 SImode
, NULL_RTX
, 0, NULL_RTX
,
5506 no_toc_restore_needed
);
5508 mem
= gen_rtx_MEM (Pmode
,
5509 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5510 GEN_INT (5 * GET_MODE_SIZE (Pmode
))));
5511 emit_move_insn (gen_rtx_REG (Pmode
, 2), mem
);
5513 emit_label (no_toc_restore_needed
);
5514 do_compare_rtx_and_jump (top_of_stack
, bottom_of_stack
, EQ
, 1,
5515 Pmode
, NULL_RTX
, 0, NULL_RTX
,
5518 mem
= gen_rtx_MEM (Pmode
, bottom_of_stack
);
5519 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5520 emit_move_insn (bottom_of_stack
, mem
);
5522 mem
= gen_rtx_MEM (Pmode
,
5523 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5524 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5525 emit_move_insn (opcode_addr
, mem
);
5526 emit_move_insn (opcode
, gen_rtx_MEM (SImode
, opcode_addr
));
5528 emit_note (NULL
, NOTE_INSN_LOOP_CONT
);
5529 emit_jump (loop_start
);
5530 emit_note (NULL
, NOTE_INSN_LOOP_END
);
5531 emit_label (loop_exit
);
5533 #endif /* TARGET_AIX */
5535 /* This ties together stack memory
5536 (MEM with an alias set of rs6000_sr_alias_set)
5537 and the change to the stack pointer. */
5539 rs6000_emit_stack_tie ()
5542 mem
= gen_rtx_MEM (BLKmode
, gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
));
5543 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5544 emit_insn (gen_stack_tie (mem
));
5547 /* Emit the correct code for allocating stack space, as insns.
5548 If COPY_R12, make sure a copy of the old frame is left in r12.
5549 The generated code may use hard register 0 as a temporary. */
5552 rs6000_emit_allocate_stack (size
, copy_r12
)
5557 rtx stack_reg
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5558 rtx tmp_reg
= gen_rtx_REG (Pmode
, 0);
5559 rtx todec
= GEN_INT (-size
);
5561 if (current_function_limit_stack
)
5563 if (REG_P (stack_limit_rtx
)
5564 && REGNO (stack_limit_rtx
) > 1
5565 && REGNO (stack_limit_rtx
) <= 31)
5567 emit_insn (Pmode
== SImode
5568 ? gen_addsi3 (tmp_reg
,
5571 : gen_adddi3 (tmp_reg
,
5575 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5578 else if (GET_CODE (stack_limit_rtx
) == SYMBOL_REF
5580 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5582 rtx toload
= gen_rtx_CONST (VOIDmode
,
5583 gen_rtx_PLUS (Pmode
,
5587 emit_insn (gen_elf_high (tmp_reg
, toload
));
5588 emit_insn (gen_elf_low (tmp_reg
, tmp_reg
, toload
));
5589 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5593 warning ("stack limit expression is not supported");
5596 if (copy_r12
|| ! TARGET_UPDATE
)
5597 emit_move_insn (gen_rtx_REG (Pmode
, 12), stack_reg
);
5603 /* Need a note here so that try_split doesn't get confused. */
5604 if (get_last_insn() == NULL_RTX
)
5605 emit_note (0, NOTE_INSN_DELETED
);
5606 insn
= emit_move_insn (tmp_reg
, todec
);
5607 try_split (PATTERN (insn
), insn
, 0);
5611 if (Pmode
== SImode
)
5612 insn
= emit_insn (gen_movsi_update (stack_reg
, stack_reg
,
5615 insn
= emit_insn (gen_movdi_update (stack_reg
, stack_reg
,
5620 if (Pmode
== SImode
)
5621 insn
= emit_insn (gen_addsi3 (stack_reg
, stack_reg
, todec
));
5623 insn
= emit_insn (gen_adddi3 (stack_reg
, stack_reg
, todec
));
5624 emit_move_insn (gen_rtx_MEM (Pmode
, stack_reg
),
5625 gen_rtx_REG (Pmode
, 12));
5628 RTX_FRAME_RELATED_P (insn
) = 1;
5630 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5631 gen_rtx_SET (VOIDmode
, stack_reg
,
5632 gen_rtx_PLUS (Pmode
, stack_reg
,
5637 /* Add to 'insn' a note which is PATTERN (INSN) but with REG replaced with
5638 (plus:P (reg 1) VAL), and with REG2 replaced with RREG if REG2 is not
5640 It would be nice if dwarf2out_frame_debug_expr could deduce these
5641 equivalences by itself so it wasn't necessary to hold its hand so much. */
5644 rs6000_frame_related (insn
, reg
, val
, reg2
, rreg
)
5653 real
= copy_rtx (PATTERN (insn
));
5655 real
= replace_rtx (real
, reg
,
5656 gen_rtx_PLUS (Pmode
, gen_rtx_REG (Pmode
,
5657 STACK_POINTER_REGNUM
),
5660 /* We expect that 'real' is either a SET or a PARALLEL containing
5661 SETs (and possibly other stuff). In a PARALLEL, all the SETs
5662 are important so they all have to be marked RTX_FRAME_RELATED_P. */
5664 if (GET_CODE (real
) == SET
)
5668 temp
= simplify_rtx (SET_SRC (set
));
5670 SET_SRC (set
) = temp
;
5671 temp
= simplify_rtx (SET_DEST (set
));
5673 SET_DEST (set
) = temp
;
5674 if (GET_CODE (SET_DEST (set
)) == MEM
)
5676 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5678 XEXP (SET_DEST (set
), 0) = temp
;
5681 else if (GET_CODE (real
) == PARALLEL
)
5684 for (i
= 0; i
< XVECLEN (real
, 0); i
++)
5685 if (GET_CODE (XVECEXP (real
, 0, i
)) == SET
)
5687 rtx set
= XVECEXP (real
, 0, i
);
5689 temp
= simplify_rtx (SET_SRC (set
));
5691 SET_SRC (set
) = temp
;
5692 temp
= simplify_rtx (SET_DEST (set
));
5694 SET_DEST (set
) = temp
;
5695 if (GET_CODE (SET_DEST (set
)) == MEM
)
5697 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5699 XEXP (SET_DEST (set
), 0) = temp
;
5701 RTX_FRAME_RELATED_P (set
) = 1;
5707 if (reg2
!= NULL_RTX
)
5708 real
= replace_rtx (real
, reg2
, rreg
);
5710 RTX_FRAME_RELATED_P (insn
) = 1;
5711 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5716 /* Emit function prologue as insns. */
5719 rs6000_emit_prologue ()
5721 rs6000_stack_t
*info
= rs6000_stack_info ();
5722 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
5723 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5724 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5725 rtx frame_ptr_rtx
= gen_rtx_REG (Pmode
, 12);
5726 rtx frame_reg_rtx
= sp_reg_rtx
;
5727 rtx cr_save_rtx
= NULL
;
5729 int saving_FPRs_inline
;
5730 int using_store_multiple
;
5731 HOST_WIDE_INT sp_offset
= 0;
5733 using_store_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
5734 && info
->first_gp_reg_save
< 31);
5735 saving_FPRs_inline
= (info
->first_fp_reg_save
== 64
5736 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
5738 /* For V.4, update stack before we do any saving and set back pointer. */
5739 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5741 if (info
->total_size
< 32767)
5742 sp_offset
= info
->total_size
;
5744 frame_reg_rtx
= frame_ptr_rtx
;
5745 rs6000_emit_allocate_stack (info
->total_size
,
5746 (frame_reg_rtx
!= sp_reg_rtx
5749 || info
->first_fp_reg_save
< 64
5750 || info
->first_gp_reg_save
< 32
5752 if (frame_reg_rtx
!= sp_reg_rtx
)
5753 rs6000_emit_stack_tie ();
5756 /* If we use the link register, get it into r0. */
5757 if (info
->lr_save_p
)
5758 emit_move_insn (gen_rtx_REG (Pmode
, 0),
5759 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5761 /* If we need to save CR, put it into r12. */
5762 if (info
->cr_save_p
&& frame_reg_rtx
!= frame_ptr_rtx
)
5764 cr_save_rtx
= gen_rtx_REG (SImode
, 12);
5765 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
5768 /* Do any required saving of fpr's. If only one or two to save, do it
5769 ourself. Otherwise, call function. */
5770 if (saving_FPRs_inline
)
5773 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5774 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
5775 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
5778 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5779 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5780 GEN_INT (info
->fp_save_offset
5783 mem
= gen_rtx_MEM (DFmode
, addr
);
5784 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5786 insn
= emit_move_insn (mem
, reg
);
5787 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5788 NULL_RTX
, NULL_RTX
);
5791 else if (info
->first_fp_reg_save
!= 64)
5795 const char *alloc_rname
;
5797 p
= rtvec_alloc (2 + 64 - info
->first_fp_reg_save
);
5799 RTVEC_ELT (p
, 0) = gen_rtx_CLOBBER (VOIDmode
,
5801 LINK_REGISTER_REGNUM
));
5802 sprintf (rname
, "%s%d%s", SAVE_FP_PREFIX
,
5803 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
5804 alloc_rname
= ggc_strdup (rname
);
5805 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
5806 gen_rtx_SYMBOL_REF (Pmode
,
5808 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5811 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5812 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5813 GEN_INT (info
->fp_save_offset
5814 + sp_offset
+ 8*i
));
5815 mem
= gen_rtx_MEM (DFmode
, addr
);
5816 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5818 RTVEC_ELT (p
, i
+ 2) = gen_rtx_SET (VOIDmode
, mem
, reg
);
5820 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
5821 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5822 NULL_RTX
, NULL_RTX
);
5825 /* Save GPRs. This is done as a PARALLEL if we are using
5826 the store-multiple instructions. */
5827 if (using_store_multiple
)
5831 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
5832 dwarfp
= rtvec_alloc (32 - info
->first_gp_reg_save
);
5833 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
5836 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
5837 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5838 GEN_INT (info
->gp_save_offset
5841 mem
= gen_rtx_MEM (reg_mode
, addr
);
5842 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5844 RTVEC_ELT (p
, i
) = gen_rtx_SET (VOIDmode
, mem
, reg
);
5846 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
5847 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5848 NULL_RTX
, NULL_RTX
);
5853 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
5854 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
5855 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
5856 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
5857 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5859 || (DEFAULT_ABI
== ABI_DARWIN
5863 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
5864 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5865 GEN_INT (info
->gp_save_offset
5868 mem
= gen_rtx_MEM (reg_mode
, addr
);
5869 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5871 insn
= emit_move_insn (mem
, reg
);
5872 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5873 NULL_RTX
, NULL_RTX
);
5877 /* ??? There's no need to emit actual instructions here, but it's the
5878 easiest way to get the frame unwind information emitted. */
5879 if (current_function_calls_eh_return
)
5881 unsigned int i
, regno
;
5887 regno
= EH_RETURN_DATA_REGNO (i
);
5888 if (regno
== INVALID_REGNUM
)
5891 reg
= gen_rtx_REG (reg_mode
, regno
);
5892 addr
= plus_constant (frame_reg_rtx
,
5893 info
->ehrd_offset
+ sp_offset
5894 + reg_size
* (int) i
);
5895 mem
= gen_rtx_MEM (reg_mode
, addr
);
5896 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5898 insn
= emit_move_insn (mem
, reg
);
5899 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5900 NULL_RTX
, NULL_RTX
);
5904 /* Save lr if we used it. */
5905 if (info
->lr_save_p
)
5907 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5908 GEN_INT (info
->lr_save_offset
+ sp_offset
));
5909 rtx reg
= gen_rtx_REG (Pmode
, 0);
5910 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
5911 /* This should not be of rs6000_sr_alias_set, because of
5912 __builtin_return_address. */
5914 insn
= emit_move_insn (mem
, reg
);
5915 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5916 reg
, gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5919 /* Save CR if we use any that must be preserved. */
5920 if (info
->cr_save_p
)
5922 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5923 GEN_INT (info
->cr_save_offset
+ sp_offset
));
5924 rtx mem
= gen_rtx_MEM (SImode
, addr
);
5925 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5927 /* If r12 was used to hold the original sp, copy cr into r0 now
5929 if (REGNO (frame_reg_rtx
) == 12)
5931 cr_save_rtx
= gen_rtx_REG (SImode
, 0);
5932 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
5934 insn
= emit_move_insn (mem
, cr_save_rtx
);
5936 /* Now, there's no way that dwarf2out_frame_debug_expr is going
5937 to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's
5938 OK. All we have to do is specify that _one_ condition code
5939 register is saved in this stack slot. The thrower's epilogue
5940 will then restore all the call-saved registers. */
5941 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5942 cr_save_rtx
, gen_rtx_REG (SImode
, CR0_REGNO
));
5945 /* Update stack and set back pointer unless this is V.4,
5946 for which it was done previously. */
5947 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
5948 rs6000_emit_allocate_stack (info
->total_size
, FALSE
);
5950 /* Set frame pointer, if needed. */
5951 if (frame_pointer_needed
)
5953 insn
= emit_move_insn (gen_rtx_REG (reg_mode
, FRAME_POINTER_REGNUM
),
5955 RTX_FRAME_RELATED_P (insn
) = 1;
5958 /* If we are using PIC_OFFSET_TABLE_REGNUM, we need to set it up. */
5959 if ((TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
5960 || ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5961 && flag_pic
== 1 && regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
]))
5963 /* If emit_load_toc_table will use the link register, we need to save
5964 it. We use R11 for this purpose because emit_load_toc_table
5965 can use register 0. This allows us to use a plain 'blr' to return
5966 from the procedure more often. */
5967 int save_LR_around_toc_setup
= (TARGET_ELF
&& flag_pic
!= 0
5968 && ! info
->lr_save_p
5969 && EXIT_BLOCK_PTR
->pred
!= NULL
);
5970 if (save_LR_around_toc_setup
)
5971 emit_move_insn (gen_rtx_REG (Pmode
, 11),
5972 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5974 rs6000_emit_load_toc_table (TRUE
);
5976 if (save_LR_around_toc_setup
)
5977 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
5978 gen_rtx_REG (Pmode
, 11));
5981 if (DEFAULT_ABI
== ABI_DARWIN
5982 && flag_pic
&& current_function_uses_pic_offset_table
)
5984 rtx dest
= gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
);
5986 rs6000_maybe_dead (emit_insn (gen_load_macho_picbase (dest
)));
5989 emit_move_insn (gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
),
5990 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)));
5995 /* Write function prologue. */
5997 output_prolog (file
, size
)
5999 int size ATTRIBUTE_UNUSED
;
6001 rs6000_stack_t
*info
= rs6000_stack_info ();
6003 if (TARGET_DEBUG_STACK
)
6004 debug_stack_info (info
);
6006 /* Write .extern for any function we will call to save and restore fp
6008 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
6009 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
6010 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
6011 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6013 /* Write .extern for AIX common mode routines, if needed. */
6014 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
6016 fputs ("\t.extern __mulh\n", file
);
6017 fputs ("\t.extern __mull\n", file
);
6018 fputs ("\t.extern __divss\n", file
);
6019 fputs ("\t.extern __divus\n", file
);
6020 fputs ("\t.extern __quoss\n", file
);
6021 fputs ("\t.extern __quous\n", file
);
6022 common_mode_defined
= 1;
6025 if (! HAVE_prologue
)
6029 /* A NOTE_INSN_DELETED is supposed to be at the start
6030 and end of the "toplevel" insn chain. */
6031 emit_note (0, NOTE_INSN_DELETED
);
6032 rs6000_emit_prologue ();
6033 emit_note (0, NOTE_INSN_DELETED
);
6035 if (TARGET_DEBUG_STACK
)
6036 debug_rtx_list (get_insns(), 100);
6037 final (get_insns(), file
, FALSE
, FALSE
);
6041 rs6000_pic_labelno
++;
6044 /* Emit function epilogue as insns.
6046 At present, dwarf2out_frame_debug_expr doesn't understand
6047 register restores, so we don't bother setting RTX_FRAME_RELATED_P
6048 anywhere in the epilogue. Most of the insns below would in any case
6049 need special notes to explain where r11 is in relation to the stack. */
6052 rs6000_emit_epilogue (sibcall
)
6055 rs6000_stack_t
*info
;
6056 int restoring_FPRs_inline
;
6057 int using_load_multiple
;
6058 int using_mfcr_multiple
;
6059 int use_backchain_to_restore_sp
;
6061 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, 1);
6062 rtx frame_reg_rtx
= sp_reg_rtx
;
6063 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
6064 int reg_size
= TARGET_POWERPC64
? 8 : 4;
6067 info
= rs6000_stack_info ();
6068 using_load_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
6069 && info
->first_gp_reg_save
< 31);
6070 restoring_FPRs_inline
= (sibcall
6071 || current_function_calls_eh_return
6072 || info
->first_fp_reg_save
== 64
6073 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
6074 use_backchain_to_restore_sp
= (frame_pointer_needed
6075 || current_function_calls_alloca
6076 || info
->total_size
> 32767);
6077 using_mfcr_multiple
= (rs6000_cpu
== PROCESSOR_PPC601
6078 || rs6000_cpu
== PROCESSOR_PPC603
6079 || rs6000_cpu
== PROCESSOR_PPC750
6082 /* If we have a frame pointer, a call to alloca, or a large stack
6083 frame, restore the old stack pointer using the backchain. Otherwise,
6084 we know what size to update it with. */
6085 if (use_backchain_to_restore_sp
)
6087 /* Under V.4, don't reset the stack pointer until after we're done
6088 loading the saved registers. */
6089 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6090 frame_reg_rtx
= gen_rtx_REG (Pmode
, 11);
6092 emit_move_insn (frame_reg_rtx
,
6093 gen_rtx_MEM (Pmode
, sp_reg_rtx
));
6096 else if (info
->push_p
)
6098 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6099 sp_offset
= info
->total_size
;
6102 emit_insn (TARGET_32BIT
6103 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6104 GEN_INT (info
->total_size
))
6105 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6106 GEN_INT (info
->total_size
)));
6110 /* Get the old lr if we saved it. */
6111 if (info
->lr_save_p
)
6113 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6114 GEN_INT (info
->lr_save_offset
+ sp_offset
));
6115 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
6116 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6118 emit_move_insn (gen_rtx_REG (Pmode
, 0), mem
);
6121 /* Get the old cr if we saved it. */
6122 if (info
->cr_save_p
)
6124 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6125 GEN_INT (info
->cr_save_offset
+ sp_offset
));
6126 rtx mem
= gen_rtx_MEM (SImode
, addr
);
6127 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6129 emit_move_insn (gen_rtx_REG (SImode
, 12), mem
);
6132 /* Set LR here to try to overlap restores below. */
6133 if (info
->lr_save_p
)
6134 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
6135 gen_rtx_REG (Pmode
, 0));
6137 /* Load exception handler data registers, if needed. */
6138 if (current_function_calls_eh_return
)
6140 unsigned int i
, regno
;
6146 regno
= EH_RETURN_DATA_REGNO (i
);
6147 if (regno
== INVALID_REGNUM
)
6150 addr
= plus_constant (frame_reg_rtx
,
6151 info
->ehrd_offset
+ sp_offset
6152 + reg_size
* (int) i
);
6153 mem
= gen_rtx_MEM (reg_mode
, addr
);
6154 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6156 emit_move_insn (gen_rtx_REG (reg_mode
, regno
), mem
);
6160 /* Restore GPRs. This is done as a PARALLEL if we are using
6161 the load-multiple instructions. */
6162 if (using_load_multiple
)
6165 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
6166 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6168 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6169 GEN_INT (info
->gp_save_offset
6172 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
6173 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6176 gen_rtx_SET (VOIDmode
,
6177 gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
),
6180 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6183 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
6184 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
6185 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
6186 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
6187 && (((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6189 || (DEFAULT_ABI
== ABI_DARWIN
6192 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6193 GEN_INT (info
->gp_save_offset
6196 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
6197 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6199 emit_move_insn (gen_rtx_REG (reg_mode
,
6200 info
->first_gp_reg_save
+ i
),
6204 /* Restore fpr's if we need to do it without calling a function. */
6205 if (restoring_FPRs_inline
)
6206 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6207 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
6208 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
6211 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
6212 GEN_INT (info
->fp_save_offset
6215 mem
= gen_rtx_MEM (DFmode
, addr
);
6216 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6218 emit_move_insn (gen_rtx_REG (DFmode
,
6219 info
->first_fp_reg_save
+ i
),
6223 /* If we saved cr, restore it here. Just those that were used. */
6224 if (info
->cr_save_p
)
6226 rtx r12_rtx
= gen_rtx_REG (SImode
, 12);
6229 if (using_mfcr_multiple
)
6231 for (i
= 0; i
< 8; i
++)
6232 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6238 if (using_mfcr_multiple
&& count
> 1)
6243 p
= rtvec_alloc (count
);
6246 for (i
= 0; i
< 8; i
++)
6247 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6249 rtvec r
= rtvec_alloc (2);
6250 RTVEC_ELT (r
, 0) = r12_rtx
;
6251 RTVEC_ELT (r
, 1) = GEN_INT (1 << (7-i
));
6252 RTVEC_ELT (p
, ndx
) =
6253 gen_rtx_SET (VOIDmode
, gen_rtx_REG (CCmode
, CR0_REGNO
+i
),
6254 gen_rtx_UNSPEC (CCmode
, r
, 20));
6257 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6262 for (i
= 0; i
< 8; i
++)
6263 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6265 emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode
,
6271 /* If this is V.4, unwind the stack pointer after all of the loads
6272 have been done. We need to emit a block here so that sched
6273 doesn't decide to move the sp change before the register restores
6274 (which may not have any obvious dependency on the stack). This
6275 doesn't hurt performance, because there is no scheduling that can
6276 be done after this point. */
6277 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6279 if (frame_reg_rtx
!= sp_reg_rtx
)
6280 rs6000_emit_stack_tie ();
6282 if (use_backchain_to_restore_sp
)
6284 emit_move_insn (sp_reg_rtx
, frame_reg_rtx
);
6286 else if (sp_offset
!= 0)
6288 emit_insn (Pmode
== SImode
6289 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6290 GEN_INT (sp_offset
))
6291 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6292 GEN_INT (sp_offset
)));
6296 if (current_function_calls_eh_return
)
6298 rtx sa
= EH_RETURN_STACKADJ_RTX
;
6299 emit_insn (Pmode
== SImode
6300 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
, sa
)
6301 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
, sa
));
6307 if (! restoring_FPRs_inline
)
6308 p
= rtvec_alloc (3 + 64 - info
->first_fp_reg_save
);
6310 p
= rtvec_alloc (2);
6312 RTVEC_ELT (p
, 0) = gen_rtx_RETURN (VOIDmode
);
6313 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
6315 LINK_REGISTER_REGNUM
));
6317 /* If we have to restore more than two FP registers, branch to the
6318 restore function. It will return to our caller. */
6319 if (! restoring_FPRs_inline
)
6323 const char *alloc_rname
;
6325 sprintf (rname
, "%s%d%s", RESTORE_FP_PREFIX
,
6326 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6327 alloc_rname
= ggc_strdup (rname
);
6328 RTVEC_ELT (p
, 2) = gen_rtx_USE (VOIDmode
,
6329 gen_rtx_SYMBOL_REF (Pmode
,
6332 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6335 addr
= gen_rtx_PLUS (Pmode
, sp_reg_rtx
,
6336 GEN_INT (info
->fp_save_offset
+ 8*i
));
6337 mem
= gen_rtx_MEM (DFmode
, addr
);
6338 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6340 RTVEC_ELT (p
, i
+3) =
6341 gen_rtx_SET (VOIDmode
,
6342 gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
),
6347 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6351 /* Write function epilogue. */
6354 output_epilog (file
, size
)
6356 int size ATTRIBUTE_UNUSED
;
6358 rs6000_stack_t
*info
= rs6000_stack_info ();
6360 if (! HAVE_epilogue
)
6362 rtx insn
= get_last_insn ();
6363 /* If the last insn was a BARRIER, we don't have to write anything except
6365 if (GET_CODE (insn
) == NOTE
)
6366 insn
= prev_nonnote_insn (insn
);
6367 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
6369 /* This is slightly ugly, but at least we don't have two
6370 copies of the epilogue-emitting code. */
6373 /* A NOTE_INSN_DELETED is supposed to be at the start
6374 and end of the "toplevel" insn chain. */
6375 emit_note (0, NOTE_INSN_DELETED
);
6376 rs6000_emit_epilogue (FALSE
);
6377 emit_note (0, NOTE_INSN_DELETED
);
6379 if (TARGET_DEBUG_STACK
)
6380 debug_rtx_list (get_insns(), 100);
6381 final (get_insns(), file
, FALSE
, FALSE
);
6386 /* Output a traceback table here. See /usr/include/sys/debug.h for info
6389 We don't output a traceback table if -finhibit-size-directive was
6390 used. The documentation for -finhibit-size-directive reads
6391 ``don't output a @code{.size} assembler directive, or anything
6392 else that would cause trouble if the function is split in the
6393 middle, and the two halves are placed at locations far apart in
6394 memory.'' The traceback table has this property, since it
6395 includes the offset from the start of the function to the
6396 traceback table itself.
6398 System V.4 Powerpc's (and the embedded ABI derived from it) use a
6399 different traceback table. */
6400 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
6402 const char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
6403 int fixed_parms
, float_parms
, parm_info
;
6406 while (*fname
== '.') /* V.4 encodes . in the name */
6409 /* Need label immediately before tbtab, so we can compute its offset
6410 from the function start. */
6413 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6414 ASM_OUTPUT_LABEL (file
, fname
);
6416 /* The .tbtab pseudo-op can only be used for the first eight
6417 expressions, since it can't handle the possibly variable
6418 length fields that follow. However, if you omit the optional
6419 fields, the assembler outputs zeros for all optional fields
6420 anyways, giving each variable length field is minimum length
6421 (as defined in sys/debug.h). Thus we can not use the .tbtab
6422 pseudo-op at all. */
6424 /* An all-zero word flags the start of the tbtab, for debuggers
6425 that have to find it by searching forward from the entry
6426 point or from the current pc. */
6427 fputs ("\t.long 0\n", file
);
6429 /* Tbtab format type. Use format type 0. */
6430 fputs ("\t.byte 0,", file
);
6432 /* Language type. Unfortunately, there doesn't seem to be any
6433 official way to get this info, so we use language_string. C
6434 is 0. C++ is 9. No number defined for Obj-C, so use the
6435 value for C for now. There is no official value for Java,
6436 although IBM appears to be using 13. There is no official value
6437 for Chill, so we've choosen 44 pseudo-randomly. */
6438 if (! strcmp (language_string
, "GNU C")
6439 || ! strcmp (language_string
, "GNU Objective-C"))
6441 else if (! strcmp (language_string
, "GNU F77"))
6443 else if (! strcmp (language_string
, "GNU Ada"))
6445 else if (! strcmp (language_string
, "GNU Pascal"))
6447 else if (! strcmp (language_string
, "GNU C++"))
6449 else if (! strcmp (language_string
, "GNU Java"))
6451 else if (! strcmp (language_string
, "GNU CHILL"))
6455 fprintf (file
, "%d,", i
);
6457 /* 8 single bit fields: global linkage (not set for C extern linkage,
6458 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
6459 from start of procedure stored in tbtab, internal function, function
6460 has controlled storage, function has no toc, function uses fp,
6461 function logs/aborts fp operations. */
6462 /* Assume that fp operations are used if any fp reg must be saved. */
6463 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
6465 /* 6 bitfields: function is interrupt handler, name present in
6466 proc table, function calls alloca, on condition directives
6467 (controls stack walks, 3 bits), saves condition reg, saves
6469 /* The `function calls alloca' bit seems to be set whenever reg 31 is
6470 set up as a frame pointer, even when there is no alloca call. */
6471 fprintf (file
, "%d,",
6472 ((1 << 6) | (frame_pointer_needed
<< 5)
6473 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
6475 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
6477 fprintf (file
, "%d,",
6478 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
6480 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
6481 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
6484 /* Compute the parameter info from the function decl argument
6487 int next_parm_info_bit
;
6489 next_parm_info_bit
= 31;
6494 for (decl
= DECL_ARGUMENTS (current_function_decl
);
6495 decl
; decl
= TREE_CHAIN (decl
))
6497 rtx parameter
= DECL_INCOMING_RTL (decl
);
6498 enum machine_mode mode
= GET_MODE (parameter
);
6500 if (GET_CODE (parameter
) == REG
)
6502 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6510 else if (mode
== DFmode
)
6515 /* If only one bit will fit, don't or in this entry. */
6516 if (next_parm_info_bit
> 0)
6517 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
6518 next_parm_info_bit
-= 2;
6522 fixed_parms
+= ((GET_MODE_SIZE (mode
)
6523 + (UNITS_PER_WORD
- 1))
6525 next_parm_info_bit
-= 1;
6531 /* Number of fixed point parameters. */
6532 /* This is actually the number of words of fixed point parameters; thus
6533 an 8 byte struct counts as 2; and thus the maximum value is 8. */
6534 fprintf (file
, "%d,", fixed_parms
);
6536 /* 2 bitfields: number of floating point parameters (7 bits), parameters
6538 /* This is actually the number of fp registers that hold parameters;
6539 and thus the maximum value is 13. */
6540 /* Set parameters on stack bit if parameters are not in their original
6541 registers, regardless of whether they are on the stack? Xlc
6542 seems to set the bit when not optimizing. */
6543 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
6545 /* Optional fields follow. Some are variable length. */
6547 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
6549 /* There is an entry for each parameter in a register, in the order that
6550 they occur in the parameter list. Any intervening arguments on the
6551 stack are ignored. If the list overflows a long (max possible length
6552 34 bits) then completely leave off all elements that don't fit. */
6553 /* Only emit this long if there was at least one parameter. */
6554 if (fixed_parms
|| float_parms
)
6555 fprintf (file
, "\t.long %d\n", parm_info
);
6557 /* Offset from start of code to tb table. */
6558 fputs ("\t.long ", file
);
6559 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6561 RS6000_OUTPUT_BASENAME (file
, fname
);
6563 assemble_name (file
, fname
);
6567 RS6000_OUTPUT_BASENAME (file
, fname
);
6569 assemble_name (file
, fname
);
6573 /* Interrupt handler mask. */
6574 /* Omit this long, since we never set the interrupt handler bit
6577 /* Number of CTL (controlled storage) anchors. */
6578 /* Omit this long, since the has_ctl bit is never set above. */
6580 /* Displacement into stack of each CTL anchor. */
6581 /* Omit this list of longs, because there are no CTL anchors. */
6583 /* Length of function name. */
6584 fprintf (file
, "\t.short %d\n", (int) strlen (fname
));
6586 /* Function name. */
6587 assemble_string (fname
, strlen (fname
));
6589 /* Register for alloca automatic storage; this is always reg 31.
6590 Only emit this if the alloca bit was set above. */
6591 if (frame_pointer_needed
)
6592 fputs ("\t.byte 31\n", file
);
6596 /* A C compound statement that outputs the assembler code for a thunk function,
6597 used to implement C++ virtual function calls with multiple inheritance. The
6598 thunk acts as a wrapper around a virtual function, adjusting the implicit
6599 object parameter before handing control off to the real function.
6601 First, emit code to add the integer DELTA to the location that contains the
6602 incoming first argument. Assume that this argument contains a pointer, and
6603 is the one used to pass the `this' pointer in C++. This is the incoming
6604 argument *before* the function prologue, e.g. `%o0' on a sparc. The
6605 addition must preserve the values of all other incoming arguments.
6607 After the addition, emit code to jump to FUNCTION, which is a
6608 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
6609 the return address. Hence returning from FUNCTION will return to whoever
6610 called the current `thunk'.
6612 The effect must be as if FUNCTION had been called directly with the adjusted
6613 first argument. This macro is responsible for emitting all of the code for
6614 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
6617 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
6618 extracted from it.) It might possibly be useful on some targets, but
6621 If you do not define this macro, the target-independent code in the C++
6622 frontend will generate a less efficient heavyweight thunk that calls
6623 FUNCTION instead of jumping to it. The generic approach does not support
6627 output_mi_thunk (file
, thunk_fndecl
, delta
, function
)
6629 tree thunk_fndecl ATTRIBUTE_UNUSED
;
6633 const char *this_reg
= reg_names
[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function
))) ? 4 : 3 ];
6636 const char *r0
= reg_names
[0];
6637 const char *toc
= reg_names
[2];
6638 const char *schain
= reg_names
[11];
6639 const char *r12
= reg_names
[12];
6641 static int labelno
= 0;
6643 /* Small constants that can be done by one add instruction */
6644 if (delta
>= -32768 && delta
<= 32767)
6646 if (! TARGET_NEW_MNEMONICS
)
6647 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta
, this_reg
);
6649 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta
);
6652 /* Large constants that can be done by one addis instruction */
6653 else if ((delta
& 0xffff) == 0 && num_insns_constant_wide (delta
) == 1)
6654 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6657 /* 32-bit constants that can be done by an add and addis instruction. */
6658 else if (TARGET_32BIT
|| num_insns_constant_wide (delta
) == 1)
6660 /* Break into two pieces, propagating the sign bit from the low word to
6662 int delta_high
= delta
>> 16;
6663 int delta_low
= delta
& 0xffff;
6664 if ((delta_low
& 0x8000) != 0)
6667 delta_low
= (delta_low
^ 0x8000) - 0x8000; /* sign extend */
6670 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6673 if (! TARGET_NEW_MNEMONICS
)
6674 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta_low
, this_reg
);
6676 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta_low
);
6679 /* 64-bit constants, fixme */
6683 /* Get the prefix in front of the names. */
6684 switch (DEFAULT_ABI
)
6694 case ABI_AIX_NODESC
:
6700 /* If the function is compiled in this module, jump to it directly.
6701 Otherwise, load up its address and jump to it. */
6703 fname
= XSTR (XEXP (DECL_RTL (function
), 0), 0);
6705 if (current_file_function_operand (XEXP (DECL_RTL (function
), 0), VOIDmode
)
6706 && ! lookup_attribute ("longcall",
6707 TYPE_ATTRIBUTES (TREE_TYPE (function
))))
6709 fprintf (file
, "\tb %s", prefix
);
6710 assemble_name (file
, fname
);
6711 if (DEFAULT_ABI
== ABI_V4
&& flag_pic
) fputs ("@local", file
);
6717 switch (DEFAULT_ABI
)
6723 /* Set up a TOC entry for the function. */
6724 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
6726 ASM_OUTPUT_INTERNAL_LABEL (file
, "Lthunk", labelno
);
6729 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
6730 there will be only one TOC entry for this function. */
6731 fputs ("\t.tc\t", file
);
6732 assemble_name (file
, buf
);
6733 fputs ("[TC],", file
);
6734 assemble_name (file
, buf
);
6737 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s," : "\tld %s", r12
);
6738 assemble_name (file
, buf
);
6739 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
6741 (TARGET_32BIT
) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
6745 (TARGET_32BIT
) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
6748 asm_fprintf (file
, "\tmtctr %s\n", r0
);
6750 (TARGET_32BIT
) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
6753 asm_fprintf (file
, "\tbctr\n");
6756 case ABI_AIX_NODESC
:
6759 fprintf (file
, "\tb %s", prefix
);
6760 assemble_name (file
, fname
);
6761 if (flag_pic
) fputs ("@plt", file
);
6767 fprintf (file
, "\tb %s", prefix
);
6768 if (flag_pic
&& !machopic_name_defined_p (fname
))
6769 assemble_name (file
, machopic_stub_name (fname
));
6771 assemble_name (file
, fname
);
6780 /* A quick summary of the various types of 'constant-pool tables'
6783 Target Flags Name One table per
6784 AIX (none) AIX TOC object file
6785 AIX -mfull-toc AIX TOC object file
6786 AIX -mminimal-toc AIX minimal TOC translation unit
6787 SVR4/EABI (none) SVR4 SDATA object file
6788 SVR4/EABI -fpic SVR4 pic object file
6789 SVR4/EABI -fPIC SVR4 PIC translation unit
6790 SVR4/EABI -mrelocatable EABI TOC function
6791 SVR4/EABI -maix AIX TOC object file
6792 SVR4/EABI -maix -mminimal-toc
6793 AIX minimal TOC translation unit
6795 Name Reg. Set by entries contains:
6796 made by addrs? fp? sum?
6798 AIX TOC 2 crt0 as Y option option
6799 AIX minimal TOC 30 prolog gcc Y Y option
6800 SVR4 SDATA 13 crt0 gcc N Y N
6801 SVR4 pic 30 prolog ld Y not yet N
6802 SVR4 PIC 30 prolog gcc Y option option
6803 EABI TOC 30 prolog gcc Y option option
6807 /* Hash table stuff for keeping track of TOC entries. */
6809 struct toc_hash_struct
6811 /* `key' will satisfy CONSTANT_P; in fact, it will satisfy
6812 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P. */
6814 enum machine_mode key_mode
;
6818 static htab_t toc_hash_table
;
6820 /* Hash functions for the hash table. */
6823 rs6000_hash_constant (k
)
6826 unsigned result
= (GET_CODE (k
) << 3) ^ GET_MODE (k
);
6827 const char *format
= GET_RTX_FORMAT (GET_CODE (k
));
6828 int flen
= strlen (format
);
6831 if (GET_CODE (k
) == LABEL_REF
)
6832 return result
* 1231 + X0INT (XEXP (k
, 0), 3);
6834 if (GET_CODE (k
) == CONST_DOUBLE
)
6836 else if (GET_CODE (k
) == CODE_LABEL
)
6841 for (; fidx
< flen
; fidx
++)
6842 switch (format
[fidx
])
6847 const char *str
= XSTR (k
, fidx
);
6849 result
= result
* 613 + len
;
6850 for (i
= 0; i
< len
; i
++)
6851 result
= result
* 613 + (unsigned) str
[i
];
6856 result
= result
* 1231 + rs6000_hash_constant (XEXP (k
, fidx
));
6860 result
= result
* 613 + (unsigned) XINT (k
, fidx
);
6863 if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT
))
6864 result
= result
* 613 + (unsigned) XWINT (k
, fidx
);
6868 for (i
= 0; i
< sizeof(HOST_WIDE_INT
)/sizeof(unsigned); i
++)
6869 result
= result
* 613 + (unsigned) (XWINT (k
, fidx
)
6880 toc_hash_function (hash_entry
)
6881 const void * hash_entry
;
6883 const struct toc_hash_struct
*thc
=
6884 (const struct toc_hash_struct
*) hash_entry
;
6885 return rs6000_hash_constant (thc
->key
) ^ thc
->key_mode
;
6888 /* Compare H1 and H2 for equivalence. */
6891 toc_hash_eq (h1
, h2
)
6895 rtx r1
= ((const struct toc_hash_struct
*) h1
)->key
;
6896 rtx r2
= ((const struct toc_hash_struct
*) h2
)->key
;
6898 if (((const struct toc_hash_struct
*) h1
)->key_mode
6899 != ((const struct toc_hash_struct
*) h2
)->key_mode
)
6902 /* Gotcha: One of these const_doubles will be in memory.
6903 The other may be on the constant-pool chain.
6904 So rtx_equal_p will think they are different... */
6907 if (GET_CODE (r1
) != GET_CODE (r2
)
6908 || GET_MODE (r1
) != GET_MODE (r2
))
6910 if (GET_CODE (r1
) == CONST_DOUBLE
)
6912 int format_len
= strlen (GET_RTX_FORMAT (CONST_DOUBLE
));
6914 for (i
= 2; i
< format_len
; i
++)
6915 if (XWINT (r1
, i
) != XWINT (r2
, i
))
6920 else if (GET_CODE (r1
) == LABEL_REF
)
6921 return (CODE_LABEL_NUMBER (XEXP (r1
, 0))
6922 == CODE_LABEL_NUMBER (XEXP (r2
, 0)));
6924 return rtx_equal_p (r1
, r2
);
6927 /* Mark the hash table-entry HASH_ENTRY. */
6930 toc_hash_mark_entry (hash_slot
, unused
)
6932 void * unused ATTRIBUTE_UNUSED
;
6934 const struct toc_hash_struct
* hash_entry
=
6935 *(const struct toc_hash_struct
**) hash_slot
;
6936 rtx r
= hash_entry
->key
;
6937 ggc_set_mark (hash_entry
);
6938 /* For CODE_LABELS, we don't want to drag in the whole insn chain... */
6939 if (GET_CODE (r
) == LABEL_REF
)
6942 ggc_set_mark (XEXP (r
, 0));
6949 /* Mark all the elements of the TOC hash-table *HT. */
6952 toc_hash_mark_table (vht
)
6957 htab_traverse (*ht
, toc_hash_mark_entry
, (void *)0);
6960 /* These are the names given by the C++ front-end to vtables, and
6961 vtable-like objects. Ideally, this logic should not be here;
6962 instead, there should be some programmatic way of inquiring as
6963 to whether or not an object is a vtable. */
6965 #define VTABLE_NAME_P(NAME) \
6966 (strncmp ("_vt.", name, strlen("_vt.")) == 0 \
6967 || strncmp ("_ZTV", name, strlen ("_ZTV")) == 0 \
6968 || strncmp ("_ZTT", name, strlen ("_ZTT")) == 0 \
6969 || strncmp ("_ZTC", name, strlen ("_ZTC")) == 0)
6972 rs6000_output_symbol_ref (file
, x
)
6976 /* Currently C++ toc references to vtables can be emitted before it
6977 is decided whether the vtable is public or private. If this is
6978 the case, then the linker will eventually complain that there is
6979 a reference to an unknown section. Thus, for vtables only,
6980 we emit the TOC reference to reference the symbol and not the
6982 const char *name
= XSTR (x
, 0);
6984 if (VTABLE_NAME_P (name
))
6986 RS6000_OUTPUT_BASENAME (file
, name
);
6989 assemble_name (file
, name
);
6992 /* Output a TOC entry. We derive the entry name from what is
6996 output_toc (file
, x
, labelno
, mode
)
7000 enum machine_mode mode
;
7003 const char *name
= buf
;
7004 const char *real_name
;
7011 /* When the linker won't eliminate them, don't output duplicate
7012 TOC entries (this happens on AIX if there is any kind of TOC,
7013 and on SVR4 under -fPIC or -mrelocatable). */
7016 struct toc_hash_struct
*h
;
7019 h
= ggc_alloc (sizeof (*h
));
7022 h
->labelno
= labelno
;
7024 found
= htab_find_slot (toc_hash_table
, h
, 1);
7027 else /* This is indeed a duplicate.
7028 Set this label equal to that label. */
7030 fputs ("\t.set ", file
);
7031 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
7032 fprintf (file
, "%d,", labelno
);
7033 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
7034 fprintf (file
, "%d\n", ((*(const struct toc_hash_struct
**)
7040 /* If we're going to put a double constant in the TOC, make sure it's
7041 aligned properly when strict alignment is on. */
7042 if (GET_CODE (x
) == CONST_DOUBLE
7044 && GET_MODE_BITSIZE (mode
) >= 64
7045 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
7046 ASM_OUTPUT_ALIGN (file
, 3);
7049 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
7051 /* Handle FP constants specially. Note that if we have a minimal
7052 TOC, things we put here aren't actually in the TOC, so we can allow
7054 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
7059 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
7060 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
7064 if (TARGET_MINIMAL_TOC
)
7065 fprintf (file
, "\t.llong 0x%lx%08lx\n", k
[0], k
[1]);
7067 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
7068 k
[0], k
[1], k
[0] & 0xffffffff, k
[1] & 0xffffffff);
7073 if (TARGET_MINIMAL_TOC
)
7074 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n", k
[0], k
[1]);
7076 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
7077 k
[0], k
[1], k
[0], k
[1]);
7081 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
)
7086 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
7087 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
7091 if (TARGET_MINIMAL_TOC
)
7092 fprintf (file
, "\t.llong 0x%lx00000000\n", l
);
7094 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx00000000\n", l
, l
);
7099 if (TARGET_MINIMAL_TOC
)
7100 fprintf (file
, "\t.long 0x%lx\n", l
);
7102 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx\n", l
, l
);
7106 else if (GET_MODE (x
) == VOIDmode
7107 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
7109 unsigned HOST_WIDE_INT low
;
7112 if (GET_CODE (x
) == CONST_DOUBLE
)
7114 low
= CONST_DOUBLE_LOW (x
);
7115 high
= CONST_DOUBLE_HIGH (x
);
7118 #if HOST_BITS_PER_WIDE_INT == 32
7121 high
= (low
& 0x80000000) ? ~0 : 0;
7125 low
= INTVAL (x
) & 0xffffffff;
7126 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
7130 /* TOC entries are always Pmode-sized, but since this
7131 is a bigendian machine then if we're putting smaller
7132 integer constants in the TOC we have to pad them.
7133 (This is still a win over putting the constants in
7134 a separate constant pool, because then we'd have
7135 to have both a TOC entry _and_ the actual constant.)
7137 For a 32-bit target, CONST_INT values are loaded and shifted
7138 entirely within `low' and can be stored in one TOC entry. */
7140 if (TARGET_64BIT
&& POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
7141 abort ();/* It would be easy to make this work, but it doesn't now. */
7143 if (POINTER_SIZE
> GET_MODE_BITSIZE (mode
))
7144 lshift_double (low
, high
, POINTER_SIZE
- GET_MODE_BITSIZE (mode
),
7145 POINTER_SIZE
, &low
, &high
, 0);
7149 if (TARGET_MINIMAL_TOC
)
7150 fprintf (file
, "\t.llong 0x%lx%08lx\n", (long)high
, (long)low
);
7152 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
7153 (long)high
, (long)low
, (long)high
, (long)low
);
7158 if (POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
7160 if (TARGET_MINIMAL_TOC
)
7161 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n",
7162 (long)high
, (long)low
);
7164 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
7165 (long)high
, (long)low
, (long)high
, (long)low
);
7169 if (TARGET_MINIMAL_TOC
)
7170 fprintf (file
, "\t.long 0x%lx\n",
7173 fprintf (file
, "\t.tc IS_%lx[TC],0x%lx\n",
7174 (long)low
, (long)low
);
7180 if (GET_CODE (x
) == CONST
)
7182 base
= XEXP (XEXP (x
, 0), 0);
7183 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
7186 if (GET_CODE (base
) == SYMBOL_REF
)
7187 name
= XSTR (base
, 0);
7188 else if (GET_CODE (base
) == LABEL_REF
)
7189 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
7190 else if (GET_CODE (base
) == CODE_LABEL
)
7191 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
7195 STRIP_NAME_ENCODING (real_name
, name
);
7196 if (TARGET_MINIMAL_TOC
)
7197 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
7200 fprintf (file
, "\t.tc %s", real_name
);
7203 fprintf (file
, ".N%d", - offset
);
7205 fprintf (file
, ".P%d", offset
);
7207 fputs ("[TC],", file
);
7210 /* Currently C++ toc references to vtables can be emitted before it
7211 is decided whether the vtable is public or private. If this is
7212 the case, then the linker will eventually complain that there is
7213 a TOC reference to an unknown section. Thus, for vtables only,
7214 we emit the TOC reference to reference the symbol and not the
7216 if (VTABLE_NAME_P (name
))
7218 RS6000_OUTPUT_BASENAME (file
, name
);
7220 fprintf (file
, "%d", offset
);
7221 else if (offset
> 0)
7222 fprintf (file
, "+%d", offset
);
7225 output_addr_const (file
, x
);
7229 /* Output an assembler pseudo-op to write an ASCII string of N characters
7230 starting at P to FILE.
7232 On the RS/6000, we have to do this using the .byte operation and
7233 write out special characters outside the quoted string.
7234 Also, the assembler is broken; very long strings are truncated,
7235 so we must artificially break them up early. */
7238 output_ascii (file
, p
, n
)
7244 int i
, count_string
;
7245 const char *for_string
= "\t.byte \"";
7246 const char *for_decimal
= "\t.byte ";
7247 const char *to_close
= NULL
;
7250 for (i
= 0; i
< n
; i
++)
7253 if (c
>= ' ' && c
< 0177)
7256 fputs (for_string
, file
);
7259 /* Write two quotes to get one. */
7267 for_decimal
= "\"\n\t.byte ";
7271 if (count_string
>= 512)
7273 fputs (to_close
, file
);
7275 for_string
= "\t.byte \"";
7276 for_decimal
= "\t.byte ";
7284 fputs (for_decimal
, file
);
7285 fprintf (file
, "%d", c
);
7287 for_string
= "\n\t.byte \"";
7294 /* Now close the string if we have written one. Then end the line. */
7296 fputs (to_close
, file
);
7299 /* Generate a unique section name for FILENAME for a section type
7300 represented by SECTION_DESC. Output goes into BUF.
7302 SECTION_DESC can be any string, as long as it is different for each
7303 possible section type.
7305 We name the section in the same manner as xlc. The name begins with an
7306 underscore followed by the filename (after stripping any leading directory
7307 names) with the last period replaced by the string SECTION_DESC. If
7308 FILENAME does not contain a period, SECTION_DESC is appended to the end of
7312 rs6000_gen_section_name (buf
, filename
, section_desc
)
7314 const char *filename
;
7315 const char *section_desc
;
7317 const char *q
, *after_last_slash
, *last_period
= 0;
7321 after_last_slash
= filename
;
7322 for (q
= filename
; *q
; q
++)
7325 after_last_slash
= q
+ 1;
7330 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
7331 *buf
= (char *) permalloc (len
);
7336 for (q
= after_last_slash
; *q
; q
++)
7338 if (q
== last_period
)
7340 strcpy (p
, section_desc
);
7341 p
+= strlen (section_desc
);
7344 else if (ISALNUM (*q
))
7348 if (last_period
== 0)
7349 strcpy (p
, section_desc
);
7355 /* Emit profile function. */
7357 output_profile_hook (labelno
)
7360 if (DEFAULT_ABI
== ABI_AIX
)
7368 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7369 STRIP_NAME_ENCODING (label_name
, ggc_strdup (buf
));
7370 fun
= gen_rtx_SYMBOL_REF (Pmode
, label_name
);
7372 emit_library_call (init_one_libfunc (RS6000_MCOUNT
), 0, VOIDmode
, 1,
7375 else if (DEFAULT_ABI
== ABI_DARWIN
)
7377 const char *mcount_name
= RS6000_MCOUNT
;
7378 int caller_addr_regno
= LINK_REGISTER_REGNUM
;
7380 /* Be conservative and always set this, at least for now. */
7381 current_function_uses_pic_offset_table
= 1;
7384 /* For PIC code, set up a stub and collect the caller's address
7385 from r0, which is where the prologue puts it. */
7388 mcount_name
= machopic_stub_name (mcount_name
);
7389 if (current_function_uses_pic_offset_table
)
7390 caller_addr_regno
= 0;
7393 emit_library_call (gen_rtx_SYMBOL_REF (Pmode
, mcount_name
),
7395 gen_rtx_REG (Pmode
, caller_addr_regno
), Pmode
);
7399 /* Write function profiler code. */
7402 output_function_profiler (file
, labelno
)
7408 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7409 switch (DEFAULT_ABI
)
7416 case ABI_AIX_NODESC
:
7417 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
7420 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
7421 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7422 reg_names
[0], reg_names
[1]);
7423 asm_fprintf (file
, "\tmflr %s\n", reg_names
[12]);
7424 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[0]);
7425 assemble_name (file
, buf
);
7426 asm_fprintf (file
, "@got(%s)\n", reg_names
[12]);
7428 else if (flag_pic
> 1)
7430 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7431 reg_names
[0], reg_names
[1]);
7432 /* Now, we need to get the address of the label. */
7433 fputs ("\tbl 1f\n\t.long ", file
);
7434 assemble_name (file
, buf
);
7435 fputs ("-.\n1:", file
);
7436 asm_fprintf (file
, "\tmflr %s\n", reg_names
[11]);
7437 asm_fprintf (file
, "\t{l|lwz} %s,0(%s)\n",
7438 reg_names
[0], reg_names
[11]);
7439 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
7440 reg_names
[0], reg_names
[0], reg_names
[11]);
7444 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[12]);
7445 assemble_name (file
, buf
);
7446 fputs ("@ha\n", file
);
7447 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7448 reg_names
[0], reg_names
[1]);
7449 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[0]);
7450 assemble_name (file
, buf
);
7451 asm_fprintf (file
, "@l(%s)\n", reg_names
[12]);
7454 if (current_function_needs_context
)
7455 asm_fprintf (file
, "\tmr %s,%s\n",
7456 reg_names
[30], reg_names
[STATIC_CHAIN_REGNUM
]);
7457 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
7458 if (current_function_needs_context
)
7459 asm_fprintf (file
, "\tmr %s,%s\n",
7460 reg_names
[STATIC_CHAIN_REGNUM
], reg_names
[30]);
7465 /* Don't do anything, done in output_profile_hook (). */
7471 /* Adjust the cost of a scheduling dependency. Return the new cost of
7472 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
7475 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
7478 rtx dep_insn ATTRIBUTE_UNUSED
;
7481 if (! recog_memoized (insn
))
7484 if (REG_NOTE_KIND (link
) != 0)
7487 if (REG_NOTE_KIND (link
) == 0)
7489 /* Data dependency; DEP_INSN writes a register that INSN reads some
7492 /* Tell the first scheduling pass about the latency between a mtctr
7493 and bctr (and mtlr and br/blr). The first scheduling pass will not
7494 know about this latency since the mtctr instruction, which has the
7495 latency associated to it, will be generated by reload. */
7496 if (get_attr_type (insn
) == TYPE_JMPREG
)
7497 return TARGET_POWER
? 5 : 4;
7499 /* Fall out to return default cost. */
7505 /* A C statement (sans semicolon) to update the integer scheduling priority
7506 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
7507 increase the priority to execute INSN later. Do not define this macro if
7508 you do not need to adjust the scheduling priorities of insns. */
7511 rs6000_adjust_priority (insn
, priority
)
7512 rtx insn ATTRIBUTE_UNUSED
;
7515 /* On machines (like the 750) which have asymetric integer units, where one
7516 integer unit can do multiply and divides and the other can't, reduce the
7517 priority of multiply/divide so it is scheduled before other integer
7521 if (! INSN_P (insn
))
7524 if (GET_CODE (PATTERN (insn
)) == USE
)
7527 switch (rs6000_cpu_attr
) {
7529 switch (get_attr_type (insn
))
7536 fprintf (stderr
, "priority was %#x (%d) before adjustment\n",
7537 priority
, priority
);
7538 if (priority
>= 0 && priority
< 0x01000000)
7548 /* Return how many instructions the machine can issue per cycle */
7549 int get_issue_rate()
7551 switch (rs6000_cpu_attr
) {
7552 case CPU_RIOS1
: /* ? */
7554 case CPU_PPC601
: /* ? */
7571 /* Length in units of the trampoline for entering a nested function. */
7574 rs6000_trampoline_size ()
7578 switch (DEFAULT_ABI
)
7584 ret
= (TARGET_32BIT
) ? 12 : 24;
7589 case ABI_AIX_NODESC
:
7590 ret
= (TARGET_32BIT
) ? 40 : 48;
7597 /* Emit RTL insns to initialize the variable parts of a trampoline.
7598 FNADDR is an RTX for the address of the function's pure code.
7599 CXT is an RTX for the static chain value for the function. */
7602 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
7607 enum machine_mode pmode
= Pmode
;
7608 int regsize
= (TARGET_32BIT
) ? 4 : 8;
7609 rtx ctx_reg
= force_reg (pmode
, cxt
);
7611 switch (DEFAULT_ABI
)
7616 /* Macros to shorten the code expansions below. */
7617 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
7618 #define MEM_PLUS(addr,offset) \
7619 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
7621 /* Under AIX, just build the 3 word function descriptor */
7624 rtx fn_reg
= gen_reg_rtx (pmode
);
7625 rtx toc_reg
= gen_reg_rtx (pmode
);
7626 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
7627 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
7628 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
7629 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
7630 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
7634 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
7637 case ABI_AIX_NODESC
:
7638 emit_library_call (gen_rtx_SYMBOL_REF (SImode
, "__trampoline_setup"),
7641 GEN_INT (rs6000_trampoline_size ()), SImode
,
7651 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7652 with arguments ARGS is a valid machine specific attribute for DECL.
7653 The attributes in ATTRIBUTES have previously been assigned to DECL. */
7656 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
7657 tree decl ATTRIBUTE_UNUSED
;
7658 tree attributes ATTRIBUTE_UNUSED
;
7659 tree identifier ATTRIBUTE_UNUSED
;
7660 tree args ATTRIBUTE_UNUSED
;
7665 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7666 with arguments ARGS is a valid machine specific attribute for TYPE.
7667 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
7670 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
7672 tree attributes ATTRIBUTE_UNUSED
;
7676 if (TREE_CODE (type
) != FUNCTION_TYPE
7677 && TREE_CODE (type
) != FIELD_DECL
7678 && TREE_CODE (type
) != TYPE_DECL
)
7681 /* Longcall attribute says that the function is not within 2**26 bytes
7682 of the current function, and to do an indirect call. */
7683 if (is_attribute_p ("longcall", identifier
))
7684 return (args
== NULL_TREE
);
7689 /* If defined, a C expression whose value is zero if the attributes on
7690 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
7691 two if they are nearly compatible (which causes a warning to be
7695 rs6000_comp_type_attributes (type1
, type2
)
7696 tree type1 ATTRIBUTE_UNUSED
;
7697 tree type2 ATTRIBUTE_UNUSED
;
7702 /* If defined, a C statement that assigns default attributes to newly
7706 rs6000_set_default_type_attributes (type
)
7707 tree type ATTRIBUTE_UNUSED
;
7712 /* Return a reference suitable for calling a function with the
7713 longcall attribute. */
7715 rs6000_longcall_ref (call_ref
)
7718 const char *call_name
;
7721 if (GET_CODE (call_ref
) != SYMBOL_REF
)
7724 /* System V adds '.' to the internal name, so skip them. */
7725 call_name
= XSTR (call_ref
, 0);
7726 if (*call_name
== '.')
7728 while (*call_name
== '.')
7731 node
= get_identifier (call_name
);
7732 call_ref
= gen_rtx_SYMBOL_REF (VOIDmode
, IDENTIFIER_POINTER (node
));
7735 return force_reg (Pmode
, call_ref
);
7739 /* A C statement or statements to switch to the appropriate section
7740 for output of RTX in mode MODE. You can assume that RTX is some
7741 kind of constant in RTL. The argument MODE is redundant except in
7742 the case of a `const_int' rtx. Select the section by calling
7743 `text_section' or one of the alternatives for other sections.
7745 Do not define this macro if you put all constants in the read-only
7751 rs6000_select_rtx_section (mode
, x
)
7752 enum machine_mode mode
;
7755 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
, mode
))
7761 /* A C statement or statements to switch to the appropriate
7762 section for output of DECL. DECL is either a `VAR_DECL' node
7763 or a constant of some sort. RELOC indicates whether forming
7764 the initial value of DECL requires link-time relocations. */
7767 rs6000_select_section (decl
, reloc
)
7771 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7774 static void (* const sec_funcs
[4]) PARAMS ((void)) = {
7781 needs_sdata
= (size
> 0
7782 && size
<= g_switch_value
7783 && rs6000_sdata
!= SDATA_NONE
7784 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7786 if (TREE_CODE (decl
) == STRING_CST
)
7787 readonly
= ! flag_writable_strings
;
7788 else if (TREE_CODE (decl
) == VAR_DECL
)
7789 readonly
= (! (flag_pic
&& reloc
)
7790 && TREE_READONLY (decl
)
7791 && ! TREE_SIDE_EFFECTS (decl
)
7792 && DECL_INITIAL (decl
)
7793 && DECL_INITIAL (decl
) != error_mark_node
7794 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7797 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7800 (*sec_funcs
[(readonly
? 0 : 2) + (needs_sdata
? 1 : 0)])();
7803 /* A C statement to build up a unique section name, expressed as a
7804 STRING_CST node, and assign it to DECL_SECTION_NAME (decl).
7805 RELOC indicates whether the initial value of EXP requires
7806 link-time relocations. If you do not define this macro, GCC will use
7807 the symbol name prefixed by `.' as the section name. Note - this
7808 macro can now be called for unitialised data items as well as
7809 initialised data and functions. */
7812 rs6000_unique_section (decl
, reloc
)
7816 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7825 static const char *const prefixes
[7][2] =
7827 { ".text.", ".gnu.linkonce.t." },
7828 { ".rodata.", ".gnu.linkonce.r." },
7829 { ".sdata2.", ".gnu.linkonce.s2." },
7830 { ".data.", ".gnu.linkonce.d." },
7831 { ".sdata.", ".gnu.linkonce.s." },
7832 { ".bss.", ".gnu.linkonce.b." },
7833 { ".sbss.", ".gnu.linkonce.sb." }
7836 needs_sdata
= (TREE_CODE (decl
) != FUNCTION_DECL
7838 && size
<= g_switch_value
7839 && rs6000_sdata
!= SDATA_NONE
7840 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7842 if (TREE_CODE (decl
) == STRING_CST
)
7843 readonly
= ! flag_writable_strings
;
7844 else if (TREE_CODE (decl
) == VAR_DECL
)
7845 readonly
= (! (flag_pic
&& reloc
)
7846 && TREE_READONLY (decl
)
7847 && ! TREE_SIDE_EFFECTS (decl
)
7848 && DECL_INITIAL (decl
)
7849 && DECL_INITIAL (decl
) != error_mark_node
7850 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7853 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7856 sec
= ((TREE_CODE (decl
) == FUNCTION_DECL
? 0 : 1)
7857 + (readonly
? 0 : 2)
7858 + (needs_sdata
? 1 : 0)
7859 + (DECL_INITIAL (decl
) == 0
7860 || DECL_INITIAL (decl
) == error_mark_node
) ? 4 : 0);
7862 STRIP_NAME_ENCODING (name
, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl
)));
7863 prefix
= prefixes
[sec
][DECL_ONE_ONLY (decl
)];
7864 len
= strlen (name
) + strlen (prefix
);
7865 string
= alloca (len
+ 1);
7867 sprintf (string
, "%s%s", prefix
, name
);
7869 DECL_SECTION_NAME (decl
) = build_string (len
, string
);
7873 /* If we are referencing a function that is static or is known to be
7874 in this file, make the SYMBOL_REF special. We can use this to indicate
7875 that we can branch to this function without emitting a no-op after the
7876 call. For real AIX calling sequences, we also replace the
7877 function name with the real name (1 or 2 leading .'s), rather than
7878 the function descriptor name. This saves a lot of overriding code
7879 to read the prefixes. */
7882 rs6000_encode_section_info (decl
)
7885 if (TREE_CODE (decl
) == FUNCTION_DECL
)
7887 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
7888 if ((TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
7889 && ! DECL_WEAK (decl
))
7890 SYMBOL_REF_FLAG (sym_ref
) = 1;
7892 if (DEFAULT_ABI
== ABI_AIX
)
7894 size_t len1
= (DEFAULT_ABI
== ABI_AIX
) ? 1 : 2;
7895 size_t len2
= strlen (XSTR (sym_ref
, 0));
7896 char *str
= alloca (len1
+ len2
+ 1);
7899 memcpy (str
+ len1
, XSTR (sym_ref
, 0), len2
+ 1);
7901 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len1
+ len2
);
7904 else if (rs6000_sdata
!= SDATA_NONE
7905 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
7906 && TREE_CODE (decl
) == VAR_DECL
)
7908 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7909 tree section_name
= DECL_SECTION_NAME (decl
);
7910 const char *name
= (char *)0;
7915 if (TREE_CODE (section_name
) == STRING_CST
)
7917 name
= TREE_STRING_POINTER (section_name
);
7918 len
= TREE_STRING_LENGTH (section_name
);
7924 if ((size
> 0 && size
<= g_switch_value
)
7926 && ((len
== sizeof (".sdata") - 1
7927 && strcmp (name
, ".sdata") == 0)
7928 || (len
== sizeof (".sdata2") - 1
7929 && strcmp (name
, ".sdata2") == 0)
7930 || (len
== sizeof (".sbss") - 1
7931 && strcmp (name
, ".sbss") == 0)
7932 || (len
== sizeof (".sbss2") - 1
7933 && strcmp (name
, ".sbss2") == 0)
7934 || (len
== sizeof (".PPC.EMB.sdata0") - 1
7935 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
7936 || (len
== sizeof (".PPC.EMB.sbss0") - 1
7937 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
7939 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
7940 size_t len
= strlen (XSTR (sym_ref
, 0));
7941 char *str
= alloca (len
+ 2);
7944 memcpy (str
+ 1, XSTR (sym_ref
, 0), len
+ 1);
7945 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len
+ 1);
7950 #endif /* USING_SVR4_H */
7953 /* Return a REG that occurs in ADDR with coefficient 1.
7954 ADDR can be effectively incremented by incrementing REG.
7956 r0 is special and we must not select it as an address
7957 register by this routine since our caller will try to
7958 increment the returned register via an "la" instruction. */
7961 find_addr_reg (addr
)
7964 while (GET_CODE (addr
) == PLUS
)
7966 if (GET_CODE (XEXP (addr
, 0)) == REG
7967 && REGNO (XEXP (addr
, 0)) != 0)
7968 addr
= XEXP (addr
, 0);
7969 else if (GET_CODE (XEXP (addr
, 1)) == REG
7970 && REGNO (XEXP (addr
, 1)) != 0)
7971 addr
= XEXP (addr
, 1);
7972 else if (CONSTANT_P (XEXP (addr
, 0)))
7973 addr
= XEXP (addr
, 1);
7974 else if (CONSTANT_P (XEXP (addr
, 1)))
7975 addr
= XEXP (addr
, 0);
7979 if (GET_CODE (addr
) == REG
&& REGNO (addr
) != 0)
7985 rs6000_fatal_bad_address (op
)
7988 fatal_insn ("bad address", op
);
7991 /* Called to register all of our global variables with the garbage
7995 rs6000_add_gc_roots ()
7997 ggc_add_rtx_root (&rs6000_compare_op0
, 1);
7998 ggc_add_rtx_root (&rs6000_compare_op1
, 1);
8000 toc_hash_table
= htab_create (1021, toc_hash_function
, toc_hash_eq
, NULL
);
8001 ggc_add_root (&toc_hash_table
, 1, sizeof (toc_hash_table
),
8002 toc_hash_mark_table
);
8005 machopic_add_gc_roots ();
8012 /* Returns 1 if OP is either a symbol reference or a sum of a symbol
8013 reference and a constant. */
8016 symbolic_operand (op
)
8019 switch (GET_CODE (op
))
8026 return (GET_CODE (op
) == SYMBOL_REF
||
8027 (GET_CODE (XEXP (op
, 0)) == SYMBOL_REF
8028 || GET_CODE (XEXP (op
, 0)) == LABEL_REF
)
8029 && GET_CODE (XEXP (op
, 1)) == CONST_INT
);
8036 #ifdef RS6000_LONG_BRANCH
8038 static tree stub_list
= 0;
8040 /* ADD_COMPILER_STUB adds the compiler generated stub for handling
8041 procedure calls to the linked list. */
8044 add_compiler_stub (label_name
, function_name
, line_number
)
8049 tree stub
= build_tree_list (function_name
, label_name
);
8050 TREE_TYPE (stub
) = build_int_2 (line_number
, 0);
8051 TREE_CHAIN (stub
) = stub_list
;
8055 #define STUB_LABEL_NAME(STUB) TREE_VALUE (STUB)
8056 #define STUB_FUNCTION_NAME(STUB) TREE_PURPOSE (STUB)
8057 #define STUB_LINE_NUMBER(STUB) TREE_INT_CST_LOW (TREE_TYPE (STUB))
8059 /* OUTPUT_COMPILER_STUB outputs the compiler generated stub for handling
8060 procedure calls from the linked list and initializes the linked list. */
8062 void output_compiler_stub ()
8065 char label_buf
[256];
8067 tree tmp_stub
, stub
;
8070 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8072 fprintf (asm_out_file
,
8073 "%s:\n", IDENTIFIER_POINTER(STUB_LABEL_NAME(stub
)));
8075 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
8076 if (write_symbols
== DBX_DEBUG
|| write_symbols
== XCOFF_DEBUG
)
8077 fprintf (asm_out_file
, "\t.stabd 68,0,%d\n", STUB_LINE_NUMBER(stub
));
8078 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
8080 if (IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
))[0] == '*')
8082 IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
))+1);
8086 strcpy (label_buf
+1,
8087 IDENTIFIER_POINTER (STUB_FUNCTION_NAME (stub
)));
8090 strcpy (tmp_buf
, "lis r12,hi16(");
8091 strcat (tmp_buf
, label_buf
);
8092 strcat (tmp_buf
, ")\n\tori r12,r12,lo16(");
8093 strcat (tmp_buf
, label_buf
);
8094 strcat (tmp_buf
, ")\n\tmtctr r12\n\tbctr");
8095 output_asm_insn (tmp_buf
, 0);
8097 #if defined (DBX_DEBUGGING_INFO) || defined (XCOFF_DEBUGGING_INFO)
8098 if (write_symbols
== DBX_DEBUG
|| write_symbols
== XCOFF_DEBUG
)
8099 fprintf(asm_out_file
, "\t.stabd 68,0,%d\n", STUB_LINE_NUMBER (stub
));
8100 #endif /* DBX_DEBUGGING_INFO || XCOFF_DEBUGGING_INFO */
8106 /* NO_PREVIOUS_DEF checks in the link list whether the function name is
8107 already there or not. */
8109 int no_previous_def (function_name
)
8113 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8114 if (function_name
== STUB_FUNCTION_NAME (stub
))
8119 /* GET_PREV_LABEL gets the label name from the previous definition of
8122 tree
get_prev_label (function_name
)
8126 for (stub
= stub_list
; stub
; stub
= TREE_CHAIN (stub
))
8127 if (function_name
== STUB_FUNCTION_NAME (stub
))
8128 return STUB_LABEL_NAME (stub
);
8132 /* INSN is either a function call or a millicode call. It may have an
8133 unconditional jump in its delay slot.
8135 CALL_DEST is the routine we are calling. */
8138 output_call (insn
, call_dest
, operand_number
)
8143 static char buf
[256];
8144 if (GET_CODE (call_dest
) == SYMBOL_REF
&& TARGET_LONG_BRANCH
&& !flag_pic
)
8147 tree funname
= get_identifier (XSTR (call_dest
, 0));
8149 if (no_previous_def (funname
))
8152 rtx label_rtx
= gen_label_rtx ();
8153 char *label_buf
, temp_buf
[256];
8154 ASM_GENERATE_INTERNAL_LABEL (temp_buf
, "L",
8155 CODE_LABEL_NUMBER (label_rtx
));
8156 label_buf
= temp_buf
[0] == '*' ? temp_buf
+ 1 : temp_buf
;
8157 labelname
= get_identifier (label_buf
);
8158 for (; insn
&& GET_CODE (insn
) != NOTE
; insn
= PREV_INSN (insn
));
8160 line_number
= NOTE_LINE_NUMBER (insn
);
8161 add_compiler_stub (labelname
, funname
, line_number
);
8164 labelname
= get_prev_label (funname
);
8166 sprintf (buf
, "jbsr %%z%d,%.246s",
8167 operand_number
, IDENTIFIER_POINTER (labelname
));
8172 sprintf (buf
, "bl %%z%d", operand_number
);
8177 #endif /* RS6000_LONG_BRANCH */
8179 #define GEN_LOCAL_LABEL_FOR_SYMBOL(BUF,SYMBOL,LENGTH,N) \
8181 const char *symbol_ = (SYMBOL); \
8182 char *buffer_ = (BUF); \
8183 if (symbol_[0] == '"') \
8185 sprintf(buffer_, "\"L%d$%s", (N), symbol_+1); \
8187 else if (name_needs_quotes(symbol_)) \
8189 sprintf(buffer_, "\"L%d$%s\"", (N), symbol_); \
8193 sprintf(buffer_, "L%d$%s", (N), symbol_); \
8198 /* Generate PIC and indirect symbol stubs. */
8201 machopic_output_stub (file
, symb
, stub
)
8203 const char *symb
, *stub
;
8205 unsigned int length
;
8206 char *binder_name
, *symbol_name
, *lazy_ptr_name
;
8207 char *local_label_0
, *local_label_1
, *local_label_2
;
8208 static int label
= 0;
8212 length
= strlen (stub
);
8213 binder_name
= alloca (length
+ 32);
8214 GEN_BINDER_NAME_FOR_STUB (binder_name
, stub
, length
);
8216 length
= strlen (symb
);
8217 symbol_name
= alloca (length
+ 32);
8218 GEN_SYMBOL_NAME_FOR_SYMBOL (symbol_name
, symb
, length
);
8220 lazy_ptr_name
= alloca (length
+ 32);
8221 GEN_LAZY_PTR_NAME_FOR_SYMBOL (lazy_ptr_name
, symb
, length
);
8223 local_label_0
= alloca (length
+ 32);
8224 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_0
, symb
, length
, 0);
8226 local_label_1
= alloca (length
+ 32);
8227 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_1
, symb
, length
, 1);
8229 local_label_2
= alloca (length
+ 32);
8230 GEN_LOCAL_LABEL_FOR_SYMBOL (local_label_2
, symb
, length
, 2);
8233 machopic_picsymbol_stub_section ();
8235 machopic_symbol_stub_section ();
8237 fprintf (file
, "%s:\n", stub
);
8238 fprintf (file
, "\t.indirect_symbol %s\n", symbol_name
);
8242 fprintf (file
, "\tmflr r0\n");
8243 fprintf (file
, "\tbcl 20,31,%s\n", local_label_0
);
8244 fprintf (file
, "%s:\n\tmflr r11\n", local_label_0
);
8245 fprintf (file
, "\taddis r11,r11,ha16(%s-%s)\n",
8246 lazy_ptr_name
, local_label_0
);
8247 fprintf (file
, "\tmtlr r0\n");
8248 fprintf (file
, "\tlwz r12,lo16(%s-%s)(r11)\n",
8249 lazy_ptr_name
, local_label_0
);
8250 fprintf (file
, "\tmtctr r12\n");
8251 fprintf (file
, "\taddi r11,r11,lo16(%s-%s)\n",
8252 lazy_ptr_name
, local_label_0
);
8253 fprintf (file
, "\tbctr\n");
8256 fprintf (file
, "non-pure not supported\n");
8258 machopic_lazy_symbol_ptr_section ();
8259 fprintf (file
, "%s:\n", lazy_ptr_name
);
8260 fprintf (file
, "\t.indirect_symbol %s\n", symbol_name
);
8261 fprintf (file
, "\t.long dyld_stub_binding_helper\n");
8264 /* Legitimize PIC addresses. If the address is already
8265 position-independent, we return ORIG. Newly generated
8266 position-independent addresses go into a reg. This is REG if non
8267 zero, otherwise we allocate register(s) as necessary. */
8269 #define SMALL_INT(X) ((unsigned) (INTVAL(X) + 0x4000) < 0x8000)
8272 rs6000_machopic_legitimize_pic_address (orig
, mode
, reg
)
8274 enum machine_mode mode
;
8279 if (reg
== NULL
&& ! reload_in_progress
&& ! reload_completed
)
8280 reg
= gen_reg_rtx (Pmode
);
8282 if (GET_CODE (orig
) == CONST
)
8284 if (GET_CODE (XEXP (orig
, 0)) == PLUS
8285 && XEXP (XEXP (orig
, 0), 0) == pic_offset_table_rtx
)
8288 if (GET_CODE (XEXP (orig
, 0)) == PLUS
)
8290 base
= rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig
, 0), 0),
8292 offset
= rs6000_machopic_legitimize_pic_address (XEXP (XEXP (orig
, 0), 1),
8298 if (GET_CODE (offset
) == CONST_INT
)
8300 if (SMALL_INT (offset
))
8301 return plus_constant_for_output (base
, INTVAL (offset
));
8302 else if (! reload_in_progress
&& ! reload_completed
)
8303 offset
= force_reg (Pmode
, offset
);
8307 return gen_rtx (PLUS
, Pmode
, base
, offset
);
8310 /* Fall back on generic machopic code. */
8311 return machopic_legitimize_pic_address (orig
, mode
, reg
);
8314 /* This is just a placeholder to make linking work without having to
8315 add this to the generic Darwin EXTRA_SECTIONS. If -mcall-aix is
8316 ever needed for Darwin (not too likely!) this would have to get a
8324 #endif /* TARGET_MACHO */