1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
32 #include "insn-attr.h"
46 #ifndef TARGET_NO_PROTOTYPE
47 #define TARGET_NO_PROTOTYPE 0
50 extern int profile_block_flag
;
52 #define min(A,B) ((A) < (B) ? (A) : (B))
53 #define max(A,B) ((A) > (B) ? (A) : (B))
57 enum processor_type rs6000_cpu
;
58 struct rs6000_cpu_select rs6000_select
[3] =
60 /* switch name, tune arch */
61 { (const char *)0, "--with-cpu=", 1, 1 },
62 { (const char *)0, "-mcpu=", 1, 1 },
63 { (const char *)0, "-mtune=", 1, 0 },
66 /* Set to non-zero once AIX common-mode calls have been defined. */
67 static int common_mode_defined
;
69 /* Save information from a "cmpxx" operation until the branch or scc is
71 rtx rs6000_compare_op0
, rs6000_compare_op1
;
72 int rs6000_compare_fp_p
;
74 /* Label number of label created for -mrelocatable, to call to so we can
75 get the address of the GOT section */
76 int rs6000_pic_labelno
;
79 /* Which abi to adhere to */
80 const char *rs6000_abi_name
= RS6000_ABI_NAME
;
82 /* Semantics of the small data area */
83 enum rs6000_sdata_type rs6000_sdata
= SDATA_DATA
;
85 /* Which small data model to use */
86 const char *rs6000_sdata_name
= (char *)0;
88 /* Counter for labels which are to be placed in .fixup. */
92 /* Whether a System V.4 varargs area was created. */
93 int rs6000_sysv_varargs_p
;
95 /* ABI enumeration available for subtarget to use. */
96 enum rs6000_abi rs6000_current_abi
;
99 const char *rs6000_debug_name
;
100 int rs6000_debug_stack
; /* debug stack applications */
101 int rs6000_debug_arg
; /* debug argument handling */
103 /* Flag to say the TOC is initialized */
105 char toc_label_name
[10];
107 /* Alias set for saves and restores from the rs6000 stack. */
108 static int rs6000_sr_alias_set
;
110 static void rs6000_add_gc_roots
PARAMS ((void));
111 static int num_insns_constant_wide
PARAMS ((HOST_WIDE_INT
));
112 static rtx expand_block_move_mem
PARAMS ((enum machine_mode
, rtx
, rtx
));
113 static void validate_condition_mode
114 PARAMS ((enum rtx_code
, enum machine_mode
));
115 static rtx rs6000_generate_compare
PARAMS ((enum rtx_code
));
116 static void rs6000_maybe_dead
PARAMS ((rtx
));
117 static void rs6000_emit_stack_tie
PARAMS ((void));
118 static void rs6000_frame_related
PARAMS ((rtx
, rtx
, HOST_WIDE_INT
, rtx
, rtx
));
119 static void rs6000_emit_allocate_stack
PARAMS ((HOST_WIDE_INT
, int));
120 static unsigned rs6000_hash_constant
PARAMS ((rtx
));
121 static unsigned toc_hash_function
PARAMS ((const void *));
122 static int toc_hash_eq
PARAMS ((const void *, const void *));
123 static int toc_hash_mark_entry
PARAMS ((void **, void *));
124 static void toc_hash_mark_table
PARAMS ((void *));
125 static int constant_pool_expr_1
PARAMS ((rtx
, int *, int *));
127 /* Default register names. */
128 char rs6000_reg_names
[][8] =
130 "0", "1", "2", "3", "4", "5", "6", "7",
131 "8", "9", "10", "11", "12", "13", "14", "15",
132 "16", "17", "18", "19", "20", "21", "22", "23",
133 "24", "25", "26", "27", "28", "29", "30", "31",
134 "0", "1", "2", "3", "4", "5", "6", "7",
135 "8", "9", "10", "11", "12", "13", "14", "15",
136 "16", "17", "18", "19", "20", "21", "22", "23",
137 "24", "25", "26", "27", "28", "29", "30", "31",
138 "mq", "lr", "ctr","ap",
139 "0", "1", "2", "3", "4", "5", "6", "7",
143 #ifdef TARGET_REGNAMES
144 static char alt_reg_names
[][8] =
146 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
147 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
148 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
149 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
150 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
151 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
152 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
153 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
154 "mq", "lr", "ctr", "ap",
155 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
160 #ifndef MASK_STRICT_ALIGN
161 #define MASK_STRICT_ALIGN 0
164 /* Override command line options. Mostly we process the processor
165 type and sometimes adjust other TARGET_ options. */
168 rs6000_override_options (default_cpu
)
169 const char *default_cpu
;
172 struct rs6000_cpu_select
*ptr
;
174 /* Simplify the entries below by making a mask for any POWER
175 variant and any PowerPC variant. */
177 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
178 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
179 | MASK_PPC_GFXOPT | MASK_POWERPC64)
180 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
184 const char *name
; /* Canonical processor name. */
185 enum processor_type processor
; /* Processor type enum value. */
186 int target_enable
; /* Target flags to enable. */
187 int target_disable
; /* Target flags to disable. */
188 } processor_target_table
[]
189 = {{"common", PROCESSOR_COMMON
, MASK_NEW_MNEMONICS
,
190 POWER_MASKS
| POWERPC_MASKS
},
191 {"power", PROCESSOR_POWER
,
192 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
193 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
194 {"power2", PROCESSOR_POWER
,
195 MASK_POWER
| MASK_POWER2
| MASK_MULTIPLE
| MASK_STRING
,
196 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
197 {"power3", PROCESSOR_PPC630
,
198 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
199 POWER_MASKS
| MASK_PPC_GPOPT
},
200 {"powerpc", PROCESSOR_POWERPC
,
201 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
202 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
203 {"powerpc64", PROCESSOR_POWERPC64
,
204 MASK_POWERPC
| MASK_POWERPC64
| MASK_NEW_MNEMONICS
,
205 POWER_MASKS
| POWERPC_OPT_MASKS
},
206 {"rios", PROCESSOR_RIOS1
,
207 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
208 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
209 {"rios1", PROCESSOR_RIOS1
,
210 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
211 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
212 {"rsc", PROCESSOR_PPC601
,
213 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
214 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
215 {"rsc1", PROCESSOR_PPC601
,
216 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
,
217 MASK_POWER2
| POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
218 {"rios2", PROCESSOR_RIOS2
,
219 MASK_POWER
| MASK_MULTIPLE
| MASK_STRING
| MASK_POWER2
,
220 POWERPC_MASKS
| MASK_NEW_MNEMONICS
},
221 {"rs64a", PROCESSOR_RS64A
,
222 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
223 POWER_MASKS
| POWERPC_OPT_MASKS
},
224 {"401", PROCESSOR_PPC403
,
225 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
226 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
227 {"403", PROCESSOR_PPC403
,
228 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
| MASK_STRICT_ALIGN
,
229 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
230 {"505", PROCESSOR_MPCCORE
,
231 MASK_POWERPC
| MASK_NEW_MNEMONICS
,
232 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
233 {"601", PROCESSOR_PPC601
,
234 MASK_POWER
| MASK_POWERPC
| MASK_NEW_MNEMONICS
| MASK_MULTIPLE
| MASK_STRING
,
235 MASK_POWER2
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
236 {"602", PROCESSOR_PPC603
,
237 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
238 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
239 {"603", PROCESSOR_PPC603
,
240 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
241 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
242 {"603e", PROCESSOR_PPC603
,
243 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
244 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
245 {"ec603e", PROCESSOR_PPC603
,
246 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
247 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
248 {"604", PROCESSOR_PPC604
,
249 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
250 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
251 {"604e", PROCESSOR_PPC604e
,
252 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
253 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
254 {"620", PROCESSOR_PPC620
,
255 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
256 POWER_MASKS
| MASK_PPC_GPOPT
},
257 {"630", PROCESSOR_PPC630
,
258 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
259 POWER_MASKS
| MASK_PPC_GPOPT
},
260 {"740", PROCESSOR_PPC750
,
261 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
262 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
263 {"750", PROCESSOR_PPC750
,
264 MASK_POWERPC
| MASK_PPC_GFXOPT
| MASK_NEW_MNEMONICS
,
265 POWER_MASKS
| MASK_PPC_GPOPT
| MASK_POWERPC64
},
266 {"801", PROCESSOR_MPCCORE
,
267 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
268 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
269 {"821", PROCESSOR_MPCCORE
,
270 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
271 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
272 {"823", PROCESSOR_MPCCORE
,
273 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
274 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
},
275 {"860", PROCESSOR_MPCCORE
,
276 MASK_POWERPC
| MASK_SOFT_FLOAT
| MASK_NEW_MNEMONICS
,
277 POWER_MASKS
| POWERPC_OPT_MASKS
| MASK_POWERPC64
}};
279 size_t ptt_size
= sizeof (processor_target_table
) / sizeof (struct ptt
);
281 int multiple
= TARGET_MULTIPLE
; /* save current -mmultiple/-mno-multiple status */
282 int string
= TARGET_STRING
; /* save current -mstring/-mno-string status */
284 profile_block_flag
= 0;
286 /* Identify the processor type */
287 rs6000_select
[0].string
= default_cpu
;
288 rs6000_cpu
= TARGET_POWERPC64
? PROCESSOR_DEFAULT64
: PROCESSOR_DEFAULT
;
290 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
292 ptr
= &rs6000_select
[i
];
293 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
295 for (j
= 0; j
< ptt_size
; j
++)
296 if (! strcmp (ptr
->string
, processor_target_table
[j
].name
))
299 rs6000_cpu
= processor_target_table
[j
].processor
;
303 target_flags
|= processor_target_table
[j
].target_enable
;
304 target_flags
&= ~processor_target_table
[j
].target_disable
;
310 error ("bad value (%s) for %s switch", ptr
->string
, ptr
->name
);
314 /* If we are optimizing big endian systems for space, use the
315 store multiple instructions. */
316 if (BYTES_BIG_ENDIAN
&& optimize_size
)
317 target_flags
|= MASK_MULTIPLE
;
319 /* If -mmultiple or -mno-multiple was explicitly used, don't
320 override with the processor default */
321 if (TARGET_MULTIPLE_SET
)
322 target_flags
= (target_flags
& ~MASK_MULTIPLE
) | multiple
;
324 /* If -mstring or -mno-string was explicitly used, don't
325 override with the processor default */
326 if (TARGET_STRING_SET
)
327 target_flags
= (target_flags
& ~MASK_STRING
) | string
;
329 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu
330 is a 750, because the hardware doesn't support the instructions used in
331 little endian mode, and causes an alignment trap. The 750 does not cause
332 an alignment trap (except when the target is unaligned). */
334 if (! BYTES_BIG_ENDIAN
&& rs6000_cpu
!= PROCESSOR_PPC750
)
338 target_flags
&= ~MASK_MULTIPLE
;
339 if (TARGET_MULTIPLE_SET
)
340 warning ("-mmultiple is not supported on little endian systems");
345 target_flags
&= ~MASK_STRING
;
346 if (TARGET_STRING_SET
)
347 warning ("-mstring is not supported on little endian systems");
351 if (flag_pic
&& (DEFAULT_ABI
== ABI_AIX
))
353 warning ("-f%s ignored for AIX (all code is position independent)",
354 (flag_pic
> 1) ? "PIC" : "pic");
358 if (flag_function_sections
&& (write_symbols
!= NO_DEBUG
)
359 && (DEFAULT_ABI
== ABI_AIX
))
361 warning ("-ffunction-sections disabled on AIX when debugging");
362 flag_function_sections
= 0;
365 if (flag_data_sections
&& (DEFAULT_ABI
== ABI_AIX
))
367 warning ("-fdata-sections not supported on AIX");
368 flag_data_sections
= 0;
371 /* Set debug flags */
372 if (rs6000_debug_name
)
374 if (! strcmp (rs6000_debug_name
, "all"))
375 rs6000_debug_stack
= rs6000_debug_arg
= 1;
376 else if (! strcmp (rs6000_debug_name
, "stack"))
377 rs6000_debug_stack
= 1;
378 else if (! strcmp (rs6000_debug_name
, "arg"))
379 rs6000_debug_arg
= 1;
381 error ("Unknown -mdebug-%s switch", rs6000_debug_name
);
384 #ifdef TARGET_REGNAMES
385 /* If the user desires alternate register names, copy in the alternate names
388 memcpy (rs6000_reg_names
, alt_reg_names
, sizeof (rs6000_reg_names
));
391 #ifdef SUBTARGET_OVERRIDE_OPTIONS
392 SUBTARGET_OVERRIDE_OPTIONS
;
395 /* Register global variables with the garbage collector. */
396 rs6000_add_gc_roots ();
398 /* Allocate an alias set for register saves & restores from stack. */
399 rs6000_sr_alias_set
= new_alias_set ();
402 ASM_GENERATE_INTERNAL_LABEL (toc_label_name
, "LCTOC", 1);
406 optimization_options (level
, size
)
407 int level ATTRIBUTE_UNUSED
;
408 int size ATTRIBUTE_UNUSED
;
412 /* Do anything needed at the start of the asm file. */
415 rs6000_file_start (file
, default_cpu
)
417 const char *default_cpu
;
421 const char *start
= buffer
;
422 struct rs6000_cpu_select
*ptr
;
424 if (flag_verbose_asm
)
426 sprintf (buffer
, "\n%s rs6000/powerpc options:", ASM_COMMENT_START
);
427 rs6000_select
[0].string
= default_cpu
;
429 for (i
= 0; i
< ARRAY_SIZE (rs6000_select
); i
++)
431 ptr
= &rs6000_select
[i
];
432 if (ptr
->string
!= (char *)0 && ptr
->string
[0] != '\0')
434 fprintf (file
, "%s %s%s", start
, ptr
->name
, ptr
->string
);
440 switch (rs6000_sdata
)
442 case SDATA_NONE
: fprintf (file
, "%s -msdata=none", start
); start
= ""; break;
443 case SDATA_DATA
: fprintf (file
, "%s -msdata=data", start
); start
= ""; break;
444 case SDATA_SYSV
: fprintf (file
, "%s -msdata=sysv", start
); start
= ""; break;
445 case SDATA_EABI
: fprintf (file
, "%s -msdata=eabi", start
); start
= ""; break;
448 if (rs6000_sdata
&& g_switch_value
)
450 fprintf (file
, "%s -G %d", start
, g_switch_value
);
461 /* Create a CONST_DOUBLE from a string. */
464 rs6000_float_const (string
, mode
)
466 enum machine_mode mode
;
468 REAL_VALUE_TYPE value
= REAL_VALUE_ATOF (string
, mode
);
469 return immed_real_const_1 (value
, mode
);
472 /* Return non-zero if this function is known to have a null epilogue. */
477 if (reload_completed
)
479 rs6000_stack_t
*info
= rs6000_stack_info ();
481 if (info
->first_gp_reg_save
== 32
482 && info
->first_fp_reg_save
== 64
492 /* Returns 1 always. */
495 any_operand (op
, mode
)
496 register rtx op ATTRIBUTE_UNUSED
;
497 enum machine_mode mode ATTRIBUTE_UNUSED
;
502 /* Returns 1 if op is the count register */
504 count_register_operand(op
, mode
)
506 enum machine_mode mode ATTRIBUTE_UNUSED
;
508 if (GET_CODE (op
) != REG
)
511 if (REGNO (op
) == COUNT_REGISTER_REGNUM
)
514 if (REGNO (op
) > FIRST_PSEUDO_REGISTER
)
521 xer_operand(op
, mode
)
523 enum machine_mode mode ATTRIBUTE_UNUSED
;
525 if (GET_CODE (op
) != REG
)
528 if (XER_REGNO_P (REGNO (op
)))
534 /* Return 1 if OP is a constant that can fit in a D field. */
537 short_cint_operand (op
, mode
)
539 enum machine_mode mode ATTRIBUTE_UNUSED
;
541 return (GET_CODE (op
) == CONST_INT
542 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'I'));
545 /* Similar for a unsigned D field. */
548 u_short_cint_operand (op
, mode
)
550 enum machine_mode mode ATTRIBUTE_UNUSED
;
552 return (GET_CODE (op
) == CONST_INT
553 && CONST_OK_FOR_LETTER_P (INTVAL (op
), 'K'));
556 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
559 non_short_cint_operand (op
, mode
)
561 enum machine_mode mode ATTRIBUTE_UNUSED
;
563 return (GET_CODE (op
) == CONST_INT
564 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000);
567 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
571 gpc_reg_operand (op
, mode
)
573 enum machine_mode mode
;
575 return (register_operand (op
, mode
)
576 && (GET_CODE (op
) != REG
577 || (REGNO (op
) >= ARG_POINTER_REGNUM
578 && !XER_REGNO_P (REGNO (op
)))
579 || REGNO (op
) < MQ_REGNO
));
582 /* Returns 1 if OP is either a pseudo-register or a register denoting a
586 cc_reg_operand (op
, mode
)
588 enum machine_mode mode
;
590 return (register_operand (op
, mode
)
591 && (GET_CODE (op
) != REG
592 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
593 || CR_REGNO_P (REGNO (op
))));
596 /* Returns 1 if OP is either a pseudo-register or a register denoting a
597 CR field that isn't CR0. */
600 cc_reg_not_cr0_operand (op
, mode
)
602 enum machine_mode mode
;
604 return (register_operand (op
, mode
)
605 && (GET_CODE (op
) != REG
606 || REGNO (op
) >= FIRST_PSEUDO_REGISTER
607 || CR_REGNO_NOT_CR0_P (REGNO (op
))));
610 /* Returns 1 if OP is either a constant integer valid for a D-field or a
611 non-special register. If a register, it must be in the proper mode unless
615 reg_or_short_operand (op
, mode
)
617 enum machine_mode mode
;
619 return short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
622 /* Similar, except check if the negation of the constant would be valid for
626 reg_or_neg_short_operand (op
, mode
)
628 enum machine_mode mode
;
630 if (GET_CODE (op
) == CONST_INT
)
631 return CONST_OK_FOR_LETTER_P (INTVAL (op
), 'P');
633 return gpc_reg_operand (op
, mode
);
636 /* Return 1 if the operand is either a register or an integer whose high-order
640 reg_or_u_short_operand (op
, mode
)
642 enum machine_mode mode
;
644 return u_short_cint_operand (op
, mode
) || gpc_reg_operand (op
, mode
);
647 /* Return 1 is the operand is either a non-special register or ANY
651 reg_or_cint_operand (op
, mode
)
653 enum machine_mode mode
;
655 return (GET_CODE (op
) == CONST_INT
|| gpc_reg_operand (op
, mode
));
658 /* Return 1 is the operand is either a non-special register or ANY
659 32-bit signed constant integer. */
662 reg_or_arith_cint_operand (op
, mode
)
664 enum machine_mode mode
;
666 return (gpc_reg_operand (op
, mode
)
667 || (GET_CODE (op
) == CONST_INT
668 #if HOST_BITS_PER_WIDE_INT != 32
669 && ((unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x80000000)
675 /* Return 1 is the operand is either a non-special register or ANY
676 32-bit unsigned constant integer. */
679 reg_or_logical_cint_operand (op
, mode
)
681 enum machine_mode mode
;
683 if (GET_CODE (op
) == CONST_INT
)
685 if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
687 if (GET_MODE_BITSIZE (mode
) <= 32)
694 return ((INTVAL (op
) & GET_MODE_MASK (mode
)
695 & (~ (unsigned HOST_WIDE_INT
) 0xffffffff)) == 0);
697 else if (GET_CODE (op
) == CONST_DOUBLE
)
699 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
703 return CONST_DOUBLE_HIGH (op
) == 0;
706 return gpc_reg_operand (op
, mode
);
709 /* Return 1 if the operand is an operand that can be loaded via the GOT */
712 got_operand (op
, mode
)
714 enum machine_mode mode ATTRIBUTE_UNUSED
;
716 return (GET_CODE (op
) == SYMBOL_REF
717 || GET_CODE (op
) == CONST
718 || GET_CODE (op
) == LABEL_REF
);
721 /* Return 1 if the operand is a simple references that can be loaded via
722 the GOT (labels involving addition aren't allowed). */
725 got_no_const_operand (op
, mode
)
727 enum machine_mode mode ATTRIBUTE_UNUSED
;
729 return (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
);
732 /* Return the number of instructions it takes to form a constant in an
736 num_insns_constant_wide (value
)
739 /* signed constant loadable with {cal|addi} */
740 if (CONST_OK_FOR_LETTER_P (value
, 'I'))
743 /* constant loadable with {cau|addis} */
744 else if (CONST_OK_FOR_LETTER_P (value
, 'L'))
747 #if HOST_BITS_PER_WIDE_INT == 64
748 else if (TARGET_POWERPC64
)
750 unsigned HOST_WIDE_INT low
= value
& 0xffffffff;
751 HOST_WIDE_INT high
= value
>> 32;
753 if (high
== 0 && (low
& 0x80000000) == 0)
756 else if (high
== -1 && (low
& 0x80000000) != 0)
760 return num_insns_constant_wide (high
) + 1;
763 return (num_insns_constant_wide (high
)
764 + num_insns_constant_wide (low
) + 1);
773 num_insns_constant (op
, mode
)
775 enum machine_mode mode
;
777 if (GET_CODE (op
) == CONST_INT
)
778 return num_insns_constant_wide (INTVAL (op
));
780 else if (GET_CODE (op
) == CONST_DOUBLE
&& mode
== SFmode
)
785 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
786 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
787 return num_insns_constant_wide ((HOST_WIDE_INT
)l
);
790 else if (GET_CODE (op
) == CONST_DOUBLE
)
796 int endian
= (WORDS_BIG_ENDIAN
== 0);
798 if (mode
== VOIDmode
|| mode
== DImode
)
800 high
= CONST_DOUBLE_HIGH (op
);
801 low
= CONST_DOUBLE_LOW (op
);
805 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
806 REAL_VALUE_TO_TARGET_DOUBLE (rv
, l
);
812 return (num_insns_constant_wide (low
)
813 + num_insns_constant_wide (high
));
817 if (high
== 0 && (low
& 0x80000000) == 0)
818 return num_insns_constant_wide (low
);
820 else if (high
== -1 && (low
& 0x80000000) != 0)
821 return num_insns_constant_wide (low
);
823 else if (mask64_operand (op
, mode
))
827 return num_insns_constant_wide (high
) + 1;
830 return (num_insns_constant_wide (high
)
831 + num_insns_constant_wide (low
) + 1);
839 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
840 with one instruction per word. We only do this if we can safely read
841 CONST_DOUBLE_{LOW,HIGH}. */
844 easy_fp_constant (op
, mode
)
846 register enum machine_mode mode
;
848 if (GET_CODE (op
) != CONST_DOUBLE
849 || GET_MODE (op
) != mode
850 || (GET_MODE_CLASS (mode
) != MODE_FLOAT
&& mode
!= DImode
))
853 /* Consider all constants with -msoft-float to be easy */
854 if (TARGET_SOFT_FLOAT
&& mode
!= DImode
)
857 /* If we are using V.4 style PIC, consider all constants to be hard */
858 if (flag_pic
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
861 #ifdef TARGET_RELOCATABLE
862 /* Similarly if we are using -mrelocatable, consider all constants to be hard */
863 if (TARGET_RELOCATABLE
)
872 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
873 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
875 return (num_insns_constant_wide ((HOST_WIDE_INT
)k
[0]) == 1
876 && num_insns_constant_wide ((HOST_WIDE_INT
)k
[1]) == 1);
879 else if (mode
== SFmode
)
884 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
885 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
887 return num_insns_constant_wide (l
) == 1;
890 else if (mode
== DImode
)
891 return ((TARGET_POWERPC64
892 && GET_CODE (op
) == CONST_DOUBLE
&& CONST_DOUBLE_LOW (op
) == 0)
893 || (num_insns_constant (op
, DImode
) <= 2));
895 else if (mode
== SImode
)
901 /* Return 1 if the operand is in volatile memory. Note that during the
902 RTL generation phase, memory_operand does not return TRUE for
903 volatile memory references. So this function allows us to
904 recognize volatile references where its safe. */
907 volatile_mem_operand (op
, mode
)
909 enum machine_mode mode
;
911 if (GET_CODE (op
) != MEM
)
914 if (!MEM_VOLATILE_P (op
))
917 if (mode
!= GET_MODE (op
))
920 if (reload_completed
)
921 return memory_operand (op
, mode
);
923 if (reload_in_progress
)
924 return strict_memory_address_p (mode
, XEXP (op
, 0));
926 return memory_address_p (mode
, XEXP (op
, 0));
929 /* Return 1 if the operand is an offsettable memory operand. */
932 offsettable_mem_operand (op
, mode
)
934 enum machine_mode mode
;
936 return ((GET_CODE (op
) == MEM
)
937 && offsettable_address_p (reload_completed
|| reload_in_progress
,
938 mode
, XEXP (op
, 0)));
941 /* Return 1 if the operand is either an easy FP constant (see above) or
945 mem_or_easy_const_operand (op
, mode
)
947 enum machine_mode mode
;
949 return memory_operand (op
, mode
) || easy_fp_constant (op
, mode
);
952 /* Return 1 if the operand is either a non-special register or an item
953 that can be used as the operand of a `mode' add insn. */
956 add_operand (op
, mode
)
958 enum machine_mode mode
;
960 return (reg_or_short_operand (op
, mode
)
961 || (GET_CODE (op
) == CONST_INT
962 && CONST_OK_FOR_LETTER_P (INTVAL(op
), 'L')));
965 /* Return 1 if OP is a constant but not a valid add_operand. */
968 non_add_cint_operand (op
, mode
)
970 enum machine_mode mode ATTRIBUTE_UNUSED
;
972 return (GET_CODE (op
) == CONST_INT
973 && (unsigned HOST_WIDE_INT
) (INTVAL (op
) + 0x8000) >= 0x10000
974 && ! CONST_OK_FOR_LETTER_P (INTVAL(op
), 'L'));
977 /* Return 1 if the operand is a non-special register or a constant that
978 can be used as the operand of an OR or XOR insn on the RS/6000. */
981 logical_operand (op
, mode
)
983 enum machine_mode mode
;
985 /* an unsigned representation of 'op'. */
986 unsigned HOST_WIDE_INT opl
, oph
;
988 if (gpc_reg_operand (op
, mode
))
991 if (GET_CODE (op
) == CONST_INT
)
993 opl
= INTVAL (op
) & GET_MODE_MASK (mode
);
994 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
997 oph
= INTVAL (op
) >> (HOST_BITS_PER_WIDE_INT
- 1);
999 else if (GET_CODE (op
) == CONST_DOUBLE
)
1001 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1004 opl
= CONST_DOUBLE_LOW (op
);
1005 oph
= CONST_DOUBLE_HIGH (op
);
1011 && ((opl
& ~ (unsigned HOST_WIDE_INT
) 0xffff) == 0
1012 || (opl
& ~ (unsigned HOST_WIDE_INT
) 0xffff0000) == 0));
1015 /* Return 1 if C is a constant that is not a logical operand (as
1016 above), but could be split into one. */
1019 non_logical_cint_operand (op
, mode
)
1021 enum machine_mode mode
;
1023 return ((GET_CODE (op
) == CONST_INT
|| GET_CODE (op
) == CONST_DOUBLE
)
1024 && ! logical_operand (op
, mode
)
1025 && reg_or_logical_cint_operand (op
, mode
));
1028 /* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
1029 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
1030 Reject all ones and all zeros, since these should have been optimized
1031 away and confuse the making of MB and ME. */
1034 mask_operand (op
, mode
)
1036 enum machine_mode mode ATTRIBUTE_UNUSED
;
1041 int transitions
= 0;
1043 if (GET_CODE (op
) != CONST_INT
)
1048 if (c
== 0 || c
== ~0)
1051 last_bit_value
= c
& 1;
1053 for (i
= 1; i
< 32; i
++)
1054 if (((c
>>= 1) & 1) != last_bit_value
)
1055 last_bit_value
^= 1, transitions
++;
1057 return transitions
<= 2;
1060 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1061 It is if there are no more than one 1->0 or 0->1 transitions.
1062 Reject all ones and all zeros, since these should have been optimized
1063 away and confuse the making of MB and ME. */
1066 mask64_operand (op
, mode
)
1068 enum machine_mode mode
;
1070 if (GET_CODE (op
) == CONST_INT
)
1072 HOST_WIDE_INT c
= INTVAL (op
);
1075 int transitions
= 0;
1077 if (c
== 0 || c
== ~0)
1080 last_bit_value
= c
& 1;
1082 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1083 if (((c
>>= 1) & 1) != last_bit_value
)
1084 last_bit_value
^= 1, transitions
++;
1086 return transitions
<= 1;
1088 else if (GET_CODE (op
) == CONST_DOUBLE
1089 && (mode
== VOIDmode
|| mode
== DImode
))
1091 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1092 #if HOST_BITS_PER_WIDE_INT == 32
1093 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1097 int transitions
= 0;
1100 #if HOST_BITS_PER_WIDE_INT == 32
1105 #if HOST_BITS_PER_WIDE_INT == 32
1111 last_bit_value
= low
& 1;
1113 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1114 if (((low
>>= 1) & 1) != last_bit_value
)
1115 last_bit_value
^= 1, transitions
++;
1117 #if HOST_BITS_PER_WIDE_INT == 32
1118 if ((high
& 1) != last_bit_value
)
1119 last_bit_value
^= 1, transitions
++;
1121 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1122 if (((high
>>= 1) & 1) != last_bit_value
)
1123 last_bit_value
^= 1, transitions
++;
1126 return transitions
<= 1;
1132 /* Return 1 if the operand is a constant that is a PowerPC64 mask.
1133 It is if there are no more than two 1->0 or 0->1 transitions.
1134 Reject all ones and all zeros, since these should have been optimized
1135 away and confuse the making of MB and ME. */
1138 rldic_operand (op
, mode
)
1140 enum machine_mode mode
;
1142 if (GET_CODE (op
) == CONST_INT
)
1144 HOST_WIDE_INT c
= INTVAL (op
);
1147 int transitions
= 0;
1149 if (c
== 0 || c
== ~0)
1152 last_bit_value
= c
& 1;
1154 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1155 if (((c
>>= 1) & 1) != last_bit_value
)
1156 last_bit_value
^= 1, transitions
++;
1158 return transitions
<= 2;
1160 else if (GET_CODE (op
) == CONST_DOUBLE
1161 && (mode
== VOIDmode
|| mode
== DImode
))
1163 HOST_WIDE_INT low
= CONST_DOUBLE_LOW (op
);
1164 #if HOST_BITS_PER_WIDE_INT == 32
1165 HOST_WIDE_INT high
= CONST_DOUBLE_HIGH (op
);
1169 int transitions
= 0;
1172 #if HOST_BITS_PER_WIDE_INT == 32
1177 #if HOST_BITS_PER_WIDE_INT == 32
1183 last_bit_value
= low
& 1;
1185 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1186 if (((low
>>= 1) & 1) != last_bit_value
)
1187 last_bit_value
^= 1, transitions
++;
1189 #if HOST_BITS_PER_WIDE_INT == 32
1190 if ((high
& 1) != last_bit_value
)
1191 last_bit_value
^= 1, transitions
++;
1193 for (i
= 1; i
< HOST_BITS_PER_WIDE_INT
; i
++)
1194 if (((high
>>= 1) & 1) != last_bit_value
)
1195 last_bit_value
^= 1, transitions
++;
1198 return transitions
<= 2;
1204 /* Return 1 if the operand is either a non-special register or a constant
1205 that can be used as the operand of a PowerPC64 logical AND insn. */
1208 and64_operand (op
, mode
)
1210 enum machine_mode mode
;
1212 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1213 return (gpc_reg_operand (op
, mode
) || mask64_operand (op
, mode
));
1215 return (logical_operand (op
, mode
) || mask64_operand (op
, mode
));
1218 /* Return 1 if the operand is either a non-special register or a
1219 constant that can be used as the operand of an RS/6000 logical AND insn. */
1222 and_operand (op
, mode
)
1224 enum machine_mode mode
;
1226 if (fixed_regs
[CR0_REGNO
]) /* CR0 not available, don't do andi./andis. */
1227 return (gpc_reg_operand (op
, mode
) || mask_operand (op
, mode
));
1229 return (logical_operand (op
, mode
) || mask_operand (op
, mode
));
1232 /* Return 1 if the operand is a general register or memory operand. */
1235 reg_or_mem_operand (op
, mode
)
1237 register enum machine_mode mode
;
1239 return (gpc_reg_operand (op
, mode
)
1240 || memory_operand (op
, mode
)
1241 || volatile_mem_operand (op
, mode
));
1244 /* Return 1 if the operand is a general register or memory operand without
1245 pre_inc or pre_dec which produces invalid form of PowerPC lwa
1249 lwa_operand (op
, mode
)
1251 register enum machine_mode mode
;
1255 if (reload_completed
&& GET_CODE (inner
) == SUBREG
)
1256 inner
= SUBREG_REG (inner
);
1258 return gpc_reg_operand (inner
, mode
)
1259 || (memory_operand (inner
, mode
)
1260 && GET_CODE (XEXP (inner
, 0)) != PRE_INC
1261 && GET_CODE (XEXP (inner
, 0)) != PRE_DEC
);
1264 /* Return 1 if the operand, used inside a MEM, is a valid first argument
1265 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
1269 call_operand (op
, mode
)
1271 enum machine_mode mode
;
1273 if (mode
!= VOIDmode
&& GET_MODE (op
) != mode
)
1276 return (GET_CODE (op
) == SYMBOL_REF
1277 || (GET_CODE (op
) == REG
&& REGNO (op
) >= FIRST_PSEUDO_REGISTER
));
1281 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
1282 this file and the function is not weakly defined. */
1285 current_file_function_operand (op
, mode
)
1287 enum machine_mode mode ATTRIBUTE_UNUSED
;
1289 return (GET_CODE (op
) == SYMBOL_REF
1290 && (SYMBOL_REF_FLAG (op
)
1291 || (op
== XEXP (DECL_RTL (current_function_decl
), 0)
1292 && ! DECL_WEAK (current_function_decl
))));
1296 /* Return 1 if this operand is a valid input for a move insn. */
1299 input_operand (op
, mode
)
1301 enum machine_mode mode
;
1303 /* Memory is always valid. */
1304 if (memory_operand (op
, mode
))
1307 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */
1308 if (GET_CODE (op
) == CONSTANT_P_RTX
)
1311 /* For floating-point, easy constants are valid. */
1312 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1314 && easy_fp_constant (op
, mode
))
1317 /* Allow any integer constant. */
1318 if (GET_MODE_CLASS (mode
) == MODE_INT
1319 && (GET_CODE (op
) == CONST_INT
1320 || GET_CODE (op
) == CONST_DOUBLE
))
1323 /* For floating-point or multi-word mode, the only remaining valid type
1325 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1326 || GET_MODE_SIZE (mode
) > UNITS_PER_WORD
)
1327 return register_operand (op
, mode
);
1329 /* The only cases left are integral modes one word or smaller (we
1330 do not get called for MODE_CC values). These can be in any
1332 if (register_operand (op
, mode
))
1335 /* A SYMBOL_REF referring to the TOC is valid. */
1336 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op
))
1339 /* A constant pool expression (relative to the TOC) is valid */
1340 if (TOC_RELATIVE_EXPR_P (op
))
1343 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
1345 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1346 && (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == CONST
)
1347 && small_data_operand (op
, Pmode
))
1353 /* Return 1 for an operand in small memory on V.4/eabi */
1356 small_data_operand (op
, mode
)
1357 rtx op ATTRIBUTE_UNUSED
;
1358 enum machine_mode mode ATTRIBUTE_UNUSED
;
1363 if (rs6000_sdata
== SDATA_NONE
|| rs6000_sdata
== SDATA_DATA
)
1366 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
1369 if (GET_CODE (op
) == SYMBOL_REF
)
1372 else if (GET_CODE (op
) != CONST
1373 || GET_CODE (XEXP (op
, 0)) != PLUS
1374 || GET_CODE (XEXP (XEXP (op
, 0), 0)) != SYMBOL_REF
1375 || GET_CODE (XEXP (XEXP (op
, 0), 1)) != CONST_INT
)
1380 rtx sum
= XEXP (op
, 0);
1381 HOST_WIDE_INT summand
;
1383 /* We have to be careful here, because it is the referenced address
1384 that must be 32k from _SDA_BASE_, not just the symbol. */
1385 summand
= INTVAL (XEXP (sum
, 1));
1386 if (summand
< 0 || summand
> g_switch_value
)
1389 sym_ref
= XEXP (sum
, 0);
1392 if (*XSTR (sym_ref
, 0) != '@')
1403 constant_pool_expr_1 (op
, have_sym
, have_toc
)
1408 switch (GET_CODE(op
))
1411 if (CONSTANT_POOL_ADDRESS_P (op
))
1413 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (op
), Pmode
))
1421 else if (! strcmp (XSTR (op
, 0), toc_label_name
))
1430 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
) &&
1431 constant_pool_expr_1 (XEXP (op
, 1), have_sym
, have_toc
);
1433 return constant_pool_expr_1 (XEXP (op
, 0), have_sym
, have_toc
);
1442 constant_pool_expr_p (op
)
1447 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_sym
;
1451 toc_relative_expr_p (op
)
1456 return constant_pool_expr_1 (op
, &have_sym
, &have_toc
) && have_toc
;
1459 /* Try machine-dependent ways of modifying an illegitimate address
1460 to be legitimate. If we find one, return the new, valid address.
1461 This is used from only one place: `memory_address' in explow.c.
1463 OLDX is the address as it was before break_out_memory_refs was called.
1464 In some cases it is useful to look at this to decide what needs to be done.
1466 MODE is passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS.
1468 It is always safe for this macro to do nothing. It exists to recognize
1469 opportunities to optimize the output.
1471 On RS/6000, first check for the sum of a register with a constant
1472 integer that is out of range. If so, generate code to add the
1473 constant with the low-order 16 bits masked to the register and force
1474 this result into another register (this can be done with `cau').
1475 Then generate an address of REG+(CONST&0xffff), allowing for the
1476 possibility of bit 16 being a one.
1478 Then check for the sum of a register and something not constant, try to
1479 load the other things into a register and return the sum. */
1481 rs6000_legitimize_address (x
, oldx
, mode
)
1483 rtx oldx ATTRIBUTE_UNUSED
;
1484 enum machine_mode mode
;
1486 if (GET_CODE (x
) == PLUS
1487 && GET_CODE (XEXP (x
, 0)) == REG
1488 && GET_CODE (XEXP (x
, 1)) == CONST_INT
1489 && (unsigned HOST_WIDE_INT
) (INTVAL (XEXP (x
, 1)) + 0x8000) >= 0x10000)
1491 HOST_WIDE_INT high_int
, low_int
;
1493 high_int
= INTVAL (XEXP (x
, 1)) & (~ (HOST_WIDE_INT
) 0xffff);
1494 low_int
= INTVAL (XEXP (x
, 1)) & 0xffff;
1495 if (low_int
& 0x8000)
1496 high_int
+= 0x10000, low_int
|= ((HOST_WIDE_INT
) -1) << 16;
1497 sum
= force_operand (gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1498 GEN_INT (high_int
)), 0);
1499 return gen_rtx_PLUS (Pmode
, sum
, GEN_INT (low_int
));
1501 else if (GET_CODE (x
) == PLUS
1502 && GET_CODE (XEXP (x
, 0)) == REG
1503 && GET_CODE (XEXP (x
, 1)) != CONST_INT
1504 && (TARGET_HARD_FLOAT
|| TARGET_POWERPC64
|| mode
!= DFmode
)
1505 && (TARGET_POWERPC64
|| mode
!= DImode
)
1508 return gen_rtx_PLUS (Pmode
, XEXP (x
, 0),
1509 force_reg (Pmode
, force_operand (XEXP (x
, 1), 0)));
1511 else if (TARGET_ELF
&& TARGET_32BIT
&& TARGET_NO_TOC
&& ! flag_pic
1512 && GET_CODE (x
) != CONST_INT
1513 && GET_CODE (x
) != CONST_DOUBLE
1515 && (TARGET_HARD_FLOAT
|| mode
!= DFmode
)
1519 rtx reg
= gen_reg_rtx (Pmode
);
1520 emit_insn (gen_elf_high (reg
, (x
)));
1521 return gen_rtx_LO_SUM (Pmode
, reg
, (x
));
1524 && CONSTANT_POOL_EXPR_P (x
)
1525 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (x
), Pmode
))
1527 return create_TOC_reference (x
);
1533 /* Emit a move from SOURCE to DEST in mode MODE. */
1535 rs6000_emit_move (dest
, source
, mode
)
1538 enum machine_mode mode
;
1542 operands
[1] = source
;
1544 /* Sanity checks. Check that we get CONST_DOUBLE only when we should. */
1545 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1546 && ! FLOAT_MODE_P (mode
)
1547 && GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1549 /* FIXME. This should never happen. */
1550 /* Since it seems that it does, do the safe thing and convert
1553 GEN_INT (trunc_int_for_mode (CONST_DOUBLE_LOW (operands
[1]), mode
));
1555 if (GET_CODE (operands
[1]) == CONST_DOUBLE
1556 && ! FLOAT_MODE_P (mode
)
1557 && ((CONST_DOUBLE_HIGH (operands
[1]) == 0
1558 && CONST_DOUBLE_LOW (operands
[1]) >= 0)
1559 || (CONST_DOUBLE_HIGH (operands
[1]) == -1
1560 && CONST_DOUBLE_LOW (operands
[1]) < 0)))
1563 if (! no_new_pseudos
&& GET_CODE (operands
[0]) != REG
)
1564 operands
[1] = force_reg (mode
, operands
[1]);
1566 if (mode
== SFmode
&& ! TARGET_POWERPC
&& TARGET_HARD_FLOAT
1567 && GET_CODE (operands
[0]) == MEM
)
1571 if (reload_in_progress
|| reload_completed
)
1572 regnum
= true_regnum (operands
[1]);
1573 else if (GET_CODE (operands
[1]) == REG
)
1574 regnum
= REGNO (operands
[1]);
1578 /* If operands[1] is a register, on POWER it may have
1579 double-precision data in it, so truncate it to single
1581 if (FP_REGNO_P (regnum
) || regnum
>= FIRST_PSEUDO_REGISTER
)
1584 newreg
= (no_new_pseudos
? operands
[1] : gen_reg_rtx (mode
));
1585 emit_insn (gen_aux_truncdfsf2 (newreg
, operands
[1]));
1586 operands
[1] = newreg
;
1590 /* Handle the case where reload calls us with an invalid address;
1591 and the case of CONSTANT_P_RTX. */
1592 if (! general_operand (operands
[1], mode
)
1593 || ! nonimmediate_operand (operands
[0], mode
)
1594 || GET_CODE (operands
[1]) == CONSTANT_P_RTX
)
1596 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1600 /* FIXME: In the long term, this switch statement should go away
1601 and be replaced by a sequence of tests based on things like
1607 if (CONSTANT_P (operands
[1])
1608 && GET_CODE (operands
[1]) != CONST_INT
)
1609 operands
[1] = force_const_mem (mode
, operands
[1]);
1614 if (CONSTANT_P (operands
[1])
1615 && ! easy_fp_constant (operands
[1], mode
))
1616 operands
[1] = force_const_mem (mode
, operands
[1]);
1621 /* Use default pattern for address of ELF small data */
1624 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1625 && (GET_CODE (operands
[1]) == SYMBOL_REF
1626 || GET_CODE (operands
[1]) == CONST
)
1627 && small_data_operand (operands
[1], mode
))
1629 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1633 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1634 && mode
== Pmode
&& mode
== SImode
1635 && flag_pic
== 1 && got_operand (operands
[1], mode
))
1637 emit_insn (gen_movsi_got (operands
[0], operands
[1]));
1641 if (TARGET_ELF
&& TARGET_NO_TOC
&& ! flag_pic
1643 && CONSTANT_P (operands
[1])
1644 && GET_CODE (operands
[1]) != HIGH
1645 && GET_CODE (operands
[1]) != CONST_INT
)
1647 rtx target
= (no_new_pseudos
? operands
[0] : gen_reg_rtx (mode
));
1649 /* If this is a function address on -mcall-aixdesc,
1650 convert it to the address of the descriptor. */
1651 if (DEFAULT_ABI
== ABI_AIX
1652 && GET_CODE (operands
[1]) == SYMBOL_REF
1653 && XSTR (operands
[1], 0)[0] == '.')
1655 const char *name
= XSTR (operands
[1], 0);
1657 while (*name
== '.')
1659 new_ref
= gen_rtx_SYMBOL_REF (Pmode
, name
);
1660 CONSTANT_POOL_ADDRESS_P (new_ref
)
1661 = CONSTANT_POOL_ADDRESS_P (operands
[1]);
1662 SYMBOL_REF_FLAG (new_ref
) = SYMBOL_REF_FLAG (operands
[1]);
1663 SYMBOL_REF_USED (new_ref
) = SYMBOL_REF_USED (operands
[1]);
1664 operands
[1] = new_ref
;
1667 emit_insn (gen_elf_high (target
, operands
[1]));
1668 emit_insn (gen_elf_low (operands
[0], target
, operands
[1]));
1672 /* If this is a SYMBOL_REF that refers to a constant pool entry,
1673 and we have put it in the TOC, we just need to make a TOC-relative
1676 && GET_CODE (operands
[1]) == SYMBOL_REF
1677 && CONSTANT_POOL_EXPR_P (operands
[1])
1678 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (operands
[1]),
1679 get_pool_mode (operands
[1])))
1681 operands
[1] = create_TOC_reference (operands
[1]);
1683 else if (mode
== Pmode
1684 && CONSTANT_P (operands
[1])
1685 && (((HOST_BITS_PER_WIDE_INT
!= 32
1686 || GET_CODE (operands
[1]) != CONST_INT
)
1687 && ! easy_fp_constant (operands
[1], mode
))
1688 || (GET_CODE (operands
[0]) == REG
1689 && FP_REGNO_P (REGNO (operands
[0]))))
1690 && GET_CODE (operands
[1]) != HIGH
1691 && ! LEGITIMATE_CONSTANT_POOL_ADDRESS_P (operands
[1])
1692 && ! TOC_RELATIVE_EXPR_P (operands
[1]))
1694 int special_constant_p
= 0;
1696 /* Emit a USE operation so that the constant isn't deleted if
1697 expensive optimizations are turned on because nobody
1698 references it. This should only be done for operands that
1699 contain SYMBOL_REFs with CONSTANT_POOL_ADDRESS_P set.
1700 This should not be done for operands that contain LABEL_REFs.
1701 For now, we just handle the obvious case. */
1702 if (GET_CODE (operands
[1]) != LABEL_REF
)
1703 emit_insn (gen_rtx_USE (VOIDmode
, operands
[1]));
1705 /* If we are to limit the number of things we put in the TOC and
1706 this is a symbol plus a constant we can add in one insn,
1707 just put the symbol in the TOC and add the constant. Don't do
1708 this if reload is in progress. */
1709 if (GET_CODE (operands
[1]) == CONST
1710 && TARGET_NO_SUM_IN_TOC
&& ! reload_in_progress
1711 && GET_CODE (XEXP (operands
[1], 0)) == PLUS
1712 && add_operand (XEXP (XEXP (operands
[1], 0), 1), mode
)
1713 && (GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == LABEL_REF
1714 || GET_CODE (XEXP (XEXP (operands
[1], 0), 0)) == SYMBOL_REF
)
1715 && ! side_effects_p (operands
[0]))
1717 rtx sym
= force_const_mem (mode
, XEXP (XEXP (operands
[1], 0), 0));
1718 rtx other
= XEXP (XEXP (operands
[1], 0), 1);
1720 sym
= force_reg (mode
, sym
);
1722 emit_insn (gen_addsi3 (operands
[0], sym
, other
));
1724 emit_insn (gen_adddi3 (operands
[0], sym
, other
));
1728 operands
[1] = force_const_mem (mode
, operands
[1]);
1731 && CONSTANT_POOL_EXPR_P (XEXP (operands
[1], 0)))
1734 enum machine_mode cmode
;
1736 constant
= get_pool_constant (XEXP (operands
[1], 0));
1737 cmode
= get_pool_mode (XEXP (operands
[1], 0));
1738 special_constant_p
=
1739 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (constant
, cmode
);
1742 if (special_constant_p
)
1744 operands
[1] = gen_rtx_MEM (mode
,
1745 create_TOC_reference (XEXP (operands
[1], 0)));
1746 MEM_ALIAS_SET (operands
[1]) = get_TOC_alias_set ();
1747 RTX_UNCHANGING_P (operands
[1]) = 1;
1753 if (GET_CODE (operands
[0]) == MEM
1754 && GET_CODE (XEXP (operands
[0], 0)) != REG
1755 && ! reload_in_progress
)
1756 operands
[0] = change_address (operands
[0], TImode
,
1757 copy_addr_to_reg (XEXP (operands
[0], 0)));
1759 if (GET_CODE (operands
[1]) == MEM
1760 && GET_CODE (XEXP (operands
[1], 0)) != REG
1761 && ! reload_in_progress
)
1762 operands
[1] = change_address (operands
[1], TImode
,
1763 copy_addr_to_reg (XEXP (operands
[1], 0)));
1770 /* Above, we may have called force_const_mem which may have returned
1771 an invalid address. If we can, fix this up; otherwise, reload will
1772 have to deal with it. */
1773 if (GET_CODE (operands
[1]) == MEM
1774 && ! memory_address_p (mode
, XEXP (operands
[1], 0))
1775 && ! reload_in_progress
)
1776 operands
[1] = change_address (operands
[1], mode
,
1777 XEXP (operands
[1], 0));
1779 emit_insn (gen_rtx_SET (VOIDmode
, operands
[0], operands
[1]));
1782 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1783 for a call to a function whose data type is FNTYPE.
1784 For a library call, FNTYPE is 0.
1786 For incoming args we set the number of arguments in the prototype large
1787 so we never return a PARALLEL. */
1790 init_cumulative_args (cum
, fntype
, libname
, incoming
)
1791 CUMULATIVE_ARGS
*cum
;
1793 rtx libname ATTRIBUTE_UNUSED
;
1796 static CUMULATIVE_ARGS zero_cumulative
;
1798 *cum
= zero_cumulative
;
1800 cum
->fregno
= FP_ARG_MIN_REG
;
1801 cum
->prototype
= (fntype
&& TYPE_ARG_TYPES (fntype
));
1802 cum
->call_cookie
= CALL_NORMAL
;
1803 cum
->sysv_gregno
= GP_ARG_MIN_REG
;
1806 cum
->nargs_prototype
= 1000; /* don't return a PARALLEL */
1808 else if (cum
->prototype
)
1809 cum
->nargs_prototype
= (list_length (TYPE_ARG_TYPES (fntype
)) - 1
1810 + (TYPE_MODE (TREE_TYPE (fntype
)) == BLKmode
1811 || RETURN_IN_MEMORY (TREE_TYPE (fntype
))));
1814 cum
->nargs_prototype
= 0;
1816 cum
->orig_nargs
= cum
->nargs_prototype
;
1818 /* Check for longcall's */
1819 if (fntype
&& lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype
)))
1820 cum
->call_cookie
= CALL_LONG
;
1822 if (TARGET_DEBUG_ARG
)
1824 fprintf (stderr
, "\ninit_cumulative_args:");
1827 tree ret_type
= TREE_TYPE (fntype
);
1828 fprintf (stderr
, " ret code = %s,",
1829 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
1832 if (cum
->call_cookie
& CALL_LONG
)
1833 fprintf (stderr
, " longcall,");
1835 fprintf (stderr
, " proto = %d, nargs = %d\n",
1836 cum
->prototype
, cum
->nargs_prototype
);
1840 /* If defined, a C expression which determines whether, and in which
1841 direction, to pad out an argument with extra space. The value
1842 should be of type `enum direction': either `upward' to pad above
1843 the argument, `downward' to pad below, or `none' to inhibit
1846 For the AIX ABI structs are always stored left shifted in their
1850 function_arg_padding (mode
, type
)
1851 enum machine_mode mode
;
1854 if (type
!= 0 && AGGREGATE_TYPE_P (type
))
1857 /* This is the default definition. */
1858 return (! BYTES_BIG_ENDIAN
1861 ? (type
&& TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
1862 && int_size_in_bytes (type
) < (PARM_BOUNDARY
/ BITS_PER_UNIT
))
1863 : GET_MODE_BITSIZE (mode
) < PARM_BOUNDARY
)
1864 ? downward
: upward
));
1867 /* If defined, a C expression that gives the alignment boundary, in bits,
1868 of an argument with the specified mode and type. If it is not defined,
1869 PARM_BOUNDARY is used for all arguments.
1871 V.4 wants long longs to be double word aligned. */
1874 function_arg_boundary (mode
, type
)
1875 enum machine_mode mode
;
1876 tree type ATTRIBUTE_UNUSED
;
1878 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1879 && (mode
== DImode
|| mode
== DFmode
))
1882 return PARM_BOUNDARY
;
1885 /* Update the data in CUM to advance over an argument
1886 of mode MODE and data type TYPE.
1887 (TYPE is null for libcalls where that information may not be available.) */
1890 function_arg_advance (cum
, mode
, type
, named
)
1891 CUMULATIVE_ARGS
*cum
;
1892 enum machine_mode mode
;
1896 cum
->nargs_prototype
--;
1898 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
1900 if (TARGET_HARD_FLOAT
1901 && (mode
== SFmode
|| mode
== DFmode
))
1903 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
1908 cum
->words
+= cum
->words
& 1;
1909 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, 1);
1915 int gregno
= cum
->sysv_gregno
;
1917 /* Aggregates and IEEE quad get passed by reference. */
1918 if ((type
&& AGGREGATE_TYPE_P (type
))
1922 n_words
= RS6000_ARG_SIZE (mode
, type
, 1);
1924 /* Long long is put in odd registers. */
1925 if (n_words
== 2 && (gregno
& 1) == 0)
1928 /* Long long is not split between registers and stack. */
1929 if (gregno
+ n_words
- 1 > GP_ARG_MAX_REG
)
1931 /* Long long is aligned on the stack. */
1933 cum
->words
+= cum
->words
& 1;
1934 cum
->words
+= n_words
;
1937 /* Note: continuing to accumulate gregno past when we've started
1938 spilling to the stack indicates the fact that we've started
1939 spilling to the stack to expand_builtin_saveregs. */
1940 cum
->sysv_gregno
= gregno
+ n_words
;
1943 if (TARGET_DEBUG_ARG
)
1945 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
1946 cum
->words
, cum
->fregno
);
1947 fprintf (stderr
, "gregno = %2d, nargs = %4d, proto = %d, ",
1948 cum
->sysv_gregno
, cum
->nargs_prototype
, cum
->prototype
);
1949 fprintf (stderr
, "mode = %4s, named = %d\n",
1950 GET_MODE_NAME (mode
), named
);
1955 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
1956 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
1957 cum
->words
+= align
;
1961 cum
->words
+= RS6000_ARG_SIZE (mode
, type
, named
);
1962 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& TARGET_HARD_FLOAT
)
1966 if (TARGET_DEBUG_ARG
)
1968 fprintf (stderr
, "function_adv: words = %2d, fregno = %2d, ",
1969 cum
->words
, cum
->fregno
);
1970 fprintf (stderr
, "nargs = %4d, proto = %d, mode = %4s, ",
1971 cum
->nargs_prototype
, cum
->prototype
, GET_MODE_NAME (mode
));
1972 fprintf (stderr
, "named = %d, align = %d\n", named
, align
);
1977 /* Determine where to put an argument to a function.
1978 Value is zero to push the argument on the stack,
1979 or a hard register in which to store the argument.
1981 MODE is the argument's machine mode.
1982 TYPE is the data type of the argument (as a tree).
1983 This is null for libcalls where that information may
1985 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1986 the preceding args and about the function being called.
1987 NAMED is nonzero if this argument is a named parameter
1988 (otherwise it is an extra parameter matching an ellipsis).
1990 On RS/6000 the first eight words of non-FP are normally in registers
1991 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1992 Under V.4, the first 8 FP args are in registers.
1994 If this is floating-point and no prototype is specified, we use
1995 both an FP and integer register (or possibly FP reg and stack). Library
1996 functions (when TYPE is zero) always have the proper types for args,
1997 so we can pass the FP value just in one register. emit_library_function
1998 doesn't support PARALLEL anyway. */
2001 function_arg (cum
, mode
, type
, named
)
2002 CUMULATIVE_ARGS
*cum
;
2003 enum machine_mode mode
;
2007 enum rs6000_abi abi
= DEFAULT_ABI
;
2009 /* Return a marker to indicate whether CR1 needs to set or clear the bit
2010 that V.4 uses to say fp args were passed in registers. Assume that we
2011 don't need the marker for software floating point, or compiler generated
2013 if (mode
== VOIDmode
)
2015 if ((abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2016 && TARGET_HARD_FLOAT
2017 && cum
->nargs_prototype
< 0
2018 && type
&& (cum
->prototype
|| TARGET_NO_PROTOTYPE
))
2020 return GEN_INT (cum
->call_cookie
2021 | ((cum
->fregno
== FP_ARG_MIN_REG
)
2022 ? CALL_V4_SET_FP_ARGS
2023 : CALL_V4_CLEAR_FP_ARGS
));
2026 return GEN_INT (cum
->call_cookie
);
2029 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
2031 if (TARGET_HARD_FLOAT
2032 && (mode
== SFmode
|| mode
== DFmode
))
2034 if (cum
->fregno
<= FP_ARG_V4_MAX_REG
)
2035 return gen_rtx_REG (mode
, cum
->fregno
);
2042 int gregno
= cum
->sysv_gregno
;
2044 /* Aggregates and IEEE quad get passed by reference. */
2045 if ((type
&& AGGREGATE_TYPE_P (type
))
2049 n_words
= RS6000_ARG_SIZE (mode
, type
, 1);
2051 /* Long long is put in odd registers. */
2052 if (n_words
== 2 && (gregno
& 1) == 0)
2055 /* Long long is not split between registers and stack. */
2056 if (gregno
+ n_words
- 1 <= GP_ARG_MAX_REG
)
2057 return gen_rtx_REG (mode
, gregno
);
2064 int align
= (TARGET_32BIT
&& (cum
->words
& 1) != 0
2065 && function_arg_boundary (mode
, type
) == 64) ? 1 : 0;
2066 int align_words
= cum
->words
+ align
;
2071 if (type
&& TREE_CODE (TYPE_SIZE (type
)) != INTEGER_CST
)
2074 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2077 || ((cum
->nargs_prototype
> 0)
2078 /* IBM AIX extended its linkage convention definition always
2079 to require FP args after register save area hole on the
2081 && (DEFAULT_ABI
!= ABI_AIX
2083 || (align_words
< GP_ARG_NUM_REG
))))
2084 return gen_rtx_REG (mode
, cum
->fregno
);
2086 return gen_rtx_PARALLEL (mode
,
2088 gen_rtx_EXPR_LIST (VOIDmode
,
2089 ((align_words
>= GP_ARG_NUM_REG
)
2092 + RS6000_ARG_SIZE (mode
, type
, named
)
2094 /* If this is partially on the stack, then
2095 we only include the portion actually
2096 in registers here. */
2097 ? gen_rtx_REG (SImode
,
2098 GP_ARG_MIN_REG
+ align_words
)
2099 : gen_rtx_REG (mode
,
2100 GP_ARG_MIN_REG
+ align_words
))),
2102 gen_rtx_EXPR_LIST (VOIDmode
,
2103 gen_rtx_REG (mode
, cum
->fregno
),
2106 else if (align_words
< GP_ARG_NUM_REG
)
2107 return gen_rtx_REG (mode
, GP_ARG_MIN_REG
+ align_words
);
2113 /* For an arg passed partly in registers and partly in memory,
2114 this is the number of registers used.
2115 For args passed entirely in registers or entirely in memory, zero. */
2118 function_arg_partial_nregs (cum
, mode
, type
, named
)
2119 CUMULATIVE_ARGS
*cum
;
2120 enum machine_mode mode
;
2127 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2130 if (USE_FP_FOR_ARG_P (*cum
, mode
, type
))
2132 if (cum
->nargs_prototype
>= 0)
2136 if (cum
->words
< GP_ARG_NUM_REG
2137 && GP_ARG_NUM_REG
< (cum
->words
+ RS6000_ARG_SIZE (mode
, type
, named
)))
2139 int ret
= GP_ARG_NUM_REG
- cum
->words
;
2140 if (ret
&& TARGET_DEBUG_ARG
)
2141 fprintf (stderr
, "function_arg_partial_nregs: %d\n", ret
);
2149 /* A C expression that indicates when an argument must be passed by
2150 reference. If nonzero for an argument, a copy of that argument is
2151 made in memory and a pointer to the argument is passed instead of
2152 the argument itself. The pointer is passed in whatever way is
2153 appropriate for passing a pointer to that type.
2155 Under V.4, structures and unions are passed by reference. */
2158 function_arg_pass_by_reference (cum
, mode
, type
, named
)
2159 CUMULATIVE_ARGS
*cum ATTRIBUTE_UNUSED
;
2160 enum machine_mode mode ATTRIBUTE_UNUSED
;
2162 int named ATTRIBUTE_UNUSED
;
2164 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2165 && ((type
&& AGGREGATE_TYPE_P (type
))
2168 if (TARGET_DEBUG_ARG
)
2169 fprintf (stderr
, "function_arg_pass_by_reference: aggregate\n");
2177 /* Perform any needed actions needed for a function that is receiving a
2178 variable number of arguments.
2182 MODE and TYPE are the mode and type of the current parameter.
2184 PRETEND_SIZE is a variable that should be set to the amount of stack
2185 that must be pushed by the prolog to pretend that our caller pushed
2188 Normally, this macro will push all remaining incoming registers on the
2189 stack and set PRETEND_SIZE to the length of the registers pushed. */
2192 setup_incoming_varargs (cum
, mode
, type
, pretend_size
, no_rtl
)
2193 CUMULATIVE_ARGS
*cum
;
2194 enum machine_mode mode
;
2200 CUMULATIVE_ARGS next_cum
;
2201 int reg_size
= TARGET_32BIT
? 4 : 8;
2203 int first_reg_offset
, set
;
2205 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2210 fntype
= TREE_TYPE (current_function_decl
);
2211 stdarg_p
= (TYPE_ARG_TYPES (fntype
) != 0
2212 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype
)))
2213 != void_type_node
));
2215 /* For varargs, we do not want to skip the dummy va_dcl argument.
2216 For stdargs, we do want to skip the last named argument. */
2219 function_arg_advance (&next_cum
, mode
, type
, 1);
2221 /* Indicate to allocate space on the stack for varargs save area. */
2222 /* ??? Does this really have to be located at a magic spot on the
2223 stack, or can we allocate this with assign_stack_local instead. */
2224 rs6000_sysv_varargs_p
= 1;
2226 save_area
= plus_constant (virtual_stack_vars_rtx
,
2227 - RS6000_VARARGS_SIZE
);
2229 first_reg_offset
= next_cum
.sysv_gregno
- GP_ARG_MIN_REG
;
2233 save_area
= virtual_incoming_args_rtx
;
2234 rs6000_sysv_varargs_p
= 0;
2236 first_reg_offset
= cum
->words
;
2237 if (MUST_PASS_IN_STACK (mode
, type
))
2238 first_reg_offset
+= RS6000_ARG_SIZE (TYPE_MODE (type
), type
, 1);
2241 set
= get_varargs_alias_set ();
2242 if (! no_rtl
&& first_reg_offset
< GP_ARG_NUM_REG
)
2244 mem
= gen_rtx_MEM (BLKmode
,
2245 plus_constant (save_area
,
2246 first_reg_offset
* reg_size
)),
2247 MEM_ALIAS_SET (mem
) = set
;
2250 (GP_ARG_MIN_REG
+ first_reg_offset
, mem
,
2251 GP_ARG_NUM_REG
- first_reg_offset
,
2252 (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
);
2254 /* ??? Does ABI_V4 need this at all? */
2255 *pretend_size
= (GP_ARG_NUM_REG
- first_reg_offset
) * UNITS_PER_WORD
;
2258 /* Save FP registers if needed. */
2259 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
2260 && TARGET_HARD_FLOAT
&& ! no_rtl
2261 && next_cum
.fregno
<= FP_ARG_V4_MAX_REG
)
2263 int fregno
= next_cum
.fregno
;
2264 rtx cr1
= gen_rtx_REG (CCmode
, CR1_REGNO
);
2265 rtx lab
= gen_label_rtx ();
2266 int off
= (GP_ARG_NUM_REG
* reg_size
) + ((fregno
- FP_ARG_MIN_REG
) * 8);
2268 emit_jump_insn (gen_rtx_SET (VOIDmode
,
2270 gen_rtx_IF_THEN_ELSE (VOIDmode
,
2271 gen_rtx_NE (VOIDmode
, cr1
,
2273 gen_rtx_LABEL_REF (VOIDmode
, lab
),
2276 while (fregno
<= FP_ARG_V4_MAX_REG
)
2278 mem
= gen_rtx_MEM (DFmode
, plus_constant (save_area
, off
));
2279 MEM_ALIAS_SET (mem
) = set
;
2280 emit_move_insn (mem
, gen_rtx_REG (DFmode
, fregno
));
2289 /* Create the va_list data type. */
2292 rs6000_build_va_list ()
2294 tree f_gpr
, f_fpr
, f_ovf
, f_sav
, record
, type_decl
;
2296 /* For AIX, prefer 'char *' because that's what the system
2297 header files like. */
2298 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2299 return build_pointer_type (char_type_node
);
2301 record
= make_lang_type (RECORD_TYPE
);
2302 type_decl
= build_decl (TYPE_DECL
, get_identifier ("__va_list_tag"), record
);
2304 f_gpr
= build_decl (FIELD_DECL
, get_identifier ("gpr"),
2305 unsigned_char_type_node
);
2306 f_fpr
= build_decl (FIELD_DECL
, get_identifier ("fpr"),
2307 unsigned_char_type_node
);
2308 f_ovf
= build_decl (FIELD_DECL
, get_identifier ("overflow_arg_area"),
2310 f_sav
= build_decl (FIELD_DECL
, get_identifier ("reg_save_area"),
2313 DECL_FIELD_CONTEXT (f_gpr
) = record
;
2314 DECL_FIELD_CONTEXT (f_fpr
) = record
;
2315 DECL_FIELD_CONTEXT (f_ovf
) = record
;
2316 DECL_FIELD_CONTEXT (f_sav
) = record
;
2318 TREE_CHAIN (record
) = type_decl
;
2319 TYPE_NAME (record
) = type_decl
;
2320 TYPE_FIELDS (record
) = f_gpr
;
2321 TREE_CHAIN (f_gpr
) = f_fpr
;
2322 TREE_CHAIN (f_fpr
) = f_ovf
;
2323 TREE_CHAIN (f_ovf
) = f_sav
;
2325 layout_type (record
);
2327 /* The correct type is an array type of one element. */
2328 return build_array_type (record
, build_index_type (size_zero_node
));
2331 /* Implement va_start. */
2334 rs6000_va_start (stdarg_p
, valist
, nextarg
)
2339 HOST_WIDE_INT words
, n_gpr
, n_fpr
;
2340 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2341 tree gpr
, fpr
, ovf
, sav
, t
;
2343 /* Only SVR4 needs something special. */
2344 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2346 std_expand_builtin_va_start (stdarg_p
, valist
, nextarg
);
2350 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2351 f_fpr
= TREE_CHAIN (f_gpr
);
2352 f_ovf
= TREE_CHAIN (f_fpr
);
2353 f_sav
= TREE_CHAIN (f_ovf
);
2355 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2356 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2357 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2358 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2359 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2361 /* Count number of gp and fp argument registers used. */
2362 words
= current_function_args_info
.words
;
2363 n_gpr
= current_function_args_info
.sysv_gregno
- GP_ARG_MIN_REG
;
2364 n_fpr
= current_function_args_info
.fregno
- FP_ARG_MIN_REG
;
2366 if (TARGET_DEBUG_ARG
)
2367 fprintf (stderr
, "va_start: words = %d, n_gpr = %d, n_fpr = %d\n",
2368 words
, n_gpr
, n_fpr
);
2370 t
= build (MODIFY_EXPR
, TREE_TYPE (gpr
), gpr
, build_int_2 (n_gpr
, 0));
2371 TREE_SIDE_EFFECTS (t
) = 1;
2372 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2374 t
= build (MODIFY_EXPR
, TREE_TYPE (fpr
), fpr
, build_int_2 (n_fpr
, 0));
2375 TREE_SIDE_EFFECTS (t
) = 1;
2376 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2378 /* Find the overflow area. */
2379 t
= make_tree (TREE_TYPE (ovf
), virtual_incoming_args_rtx
);
2381 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), t
,
2382 build_int_2 (words
* UNITS_PER_WORD
, 0));
2383 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2384 TREE_SIDE_EFFECTS (t
) = 1;
2385 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2387 /* Find the register save area. */
2388 t
= make_tree (TREE_TYPE (sav
), virtual_stack_vars_rtx
);
2389 t
= build (PLUS_EXPR
, TREE_TYPE (sav
), t
,
2390 build_int_2 (-RS6000_VARARGS_SIZE
, -1));
2391 t
= build (MODIFY_EXPR
, TREE_TYPE (sav
), sav
, t
);
2392 TREE_SIDE_EFFECTS (t
) = 1;
2393 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2396 /* Implement va_arg. */
2399 rs6000_va_arg (valist
, type
)
2402 tree f_gpr
, f_fpr
, f_ovf
, f_sav
;
2403 tree gpr
, fpr
, ovf
, sav
, reg
, t
, u
;
2404 int indirect_p
, size
, rsize
, n_reg
, sav_ofs
, sav_scale
;
2405 rtx lab_false
, lab_over
, addr_rtx
, r
;
2407 /* For AIX, the rule is that structures are passed left-aligned in
2408 their stack slot. However, GCC does not presently do this:
2409 structures which are the same size as integer types are passed
2410 right-aligned, as if they were in fact integers. This only
2411 matters for structures of size 1 or 2, or 4 when TARGET_64BIT. */
2412 if (DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
2414 HOST_WIDE_INT align
, rounded_size
;
2415 enum machine_mode mode
;
2418 /* Compute the rounded size of the type. */
2419 align
= PARM_BOUNDARY
/ BITS_PER_UNIT
;
2420 rounded_size
= (((int_size_in_bytes (type
) + align
- 1) / align
)
2425 mode
= TYPE_MODE (type
);
2426 if (mode
!= BLKmode
)
2429 adj
= TREE_INT_CST_LOW (TYPE_SIZE (type
)) / BITS_PER_UNIT
;
2430 if (rounded_size
> align
)
2433 addr_tree
= build (PLUS_EXPR
, TREE_TYPE (addr_tree
), addr_tree
,
2434 build_int_2 (rounded_size
- adj
, 0));
2437 addr_rtx
= expand_expr (addr_tree
, NULL_RTX
, Pmode
, EXPAND_NORMAL
);
2438 addr_rtx
= copy_to_reg (addr_rtx
);
2440 /* Compute new value for AP. */
2441 t
= build (MODIFY_EXPR
, TREE_TYPE (valist
), valist
,
2442 build (PLUS_EXPR
, TREE_TYPE (valist
), valist
,
2443 build_int_2 (rounded_size
, 0)));
2444 TREE_SIDE_EFFECTS (t
) = 1;
2445 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2450 f_gpr
= TYPE_FIELDS (TREE_TYPE (va_list_type_node
));
2451 f_fpr
= TREE_CHAIN (f_gpr
);
2452 f_ovf
= TREE_CHAIN (f_fpr
);
2453 f_sav
= TREE_CHAIN (f_ovf
);
2455 valist
= build1 (INDIRECT_REF
, TREE_TYPE (TREE_TYPE (valist
)), valist
);
2456 gpr
= build (COMPONENT_REF
, TREE_TYPE (f_gpr
), valist
, f_gpr
);
2457 fpr
= build (COMPONENT_REF
, TREE_TYPE (f_fpr
), valist
, f_fpr
);
2458 ovf
= build (COMPONENT_REF
, TREE_TYPE (f_ovf
), valist
, f_ovf
);
2459 sav
= build (COMPONENT_REF
, TREE_TYPE (f_sav
), valist
, f_sav
);
2461 size
= int_size_in_bytes (type
);
2462 rsize
= (size
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2464 if (AGGREGATE_TYPE_P (type
) || TYPE_MODE (type
) == TFmode
)
2466 /* Aggregates and long doubles are passed by reference. */
2472 size
= rsize
= UNITS_PER_WORD
;
2474 else if (FLOAT_TYPE_P (type
) && ! TARGET_SOFT_FLOAT
)
2476 /* FP args go in FP registers, if present. */
2485 /* Otherwise into GP registers. */
2494 * Pull the value out of the saved registers ...
2497 lab_false
= gen_label_rtx ();
2498 lab_over
= gen_label_rtx ();
2499 addr_rtx
= gen_reg_rtx (Pmode
);
2501 emit_cmp_and_jump_insns (expand_expr (reg
, NULL_RTX
, QImode
, EXPAND_NORMAL
),
2502 GEN_INT (8 - n_reg
+ 1),
2503 GE
, const1_rtx
, QImode
, 1, 1, lab_false
);
2505 /* Long long is aligned in the registers. */
2508 u
= build (BIT_AND_EXPR
, TREE_TYPE (reg
), reg
,
2509 build_int_2 (n_reg
- 1, 0));
2510 u
= build (PLUS_EXPR
, TREE_TYPE (reg
), reg
, u
);
2511 u
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, u
);
2512 TREE_SIDE_EFFECTS (u
) = 1;
2513 expand_expr (u
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2517 t
= build (PLUS_EXPR
, ptr_type_node
, sav
, build_int_2 (sav_ofs
, 0));
2521 u
= build (POSTINCREMENT_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (n_reg
, 0));
2522 TREE_SIDE_EFFECTS (u
) = 1;
2524 u
= build1 (CONVERT_EXPR
, integer_type_node
, u
);
2525 TREE_SIDE_EFFECTS (u
) = 1;
2527 u
= build (MULT_EXPR
, integer_type_node
, u
, build_int_2 (sav_scale
, 0));
2528 TREE_SIDE_EFFECTS (u
) = 1;
2530 t
= build (PLUS_EXPR
, ptr_type_node
, t
, u
);
2531 TREE_SIDE_EFFECTS (t
) = 1;
2533 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2535 emit_move_insn (addr_rtx
, r
);
2537 emit_jump_insn (gen_jump (lab_over
));
2539 emit_label (lab_false
);
2542 * ... otherwise out of the overflow area.
2545 /* Make sure we don't find reg 7 for the next int arg. */
2548 t
= build (MODIFY_EXPR
, TREE_TYPE (reg
), reg
, build_int_2 (8, 0));
2549 TREE_SIDE_EFFECTS (t
) = 1;
2550 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2553 /* Care for on-stack alignment if needed. */
2558 t
= build (PLUS_EXPR
, TREE_TYPE (ovf
), ovf
, build_int_2 (7, 0));
2559 t
= build (BIT_AND_EXPR
, TREE_TYPE (t
), t
, build_int_2 (-8, -1));
2563 r
= expand_expr (t
, addr_rtx
, Pmode
, EXPAND_NORMAL
);
2565 emit_move_insn (addr_rtx
, r
);
2567 t
= build (PLUS_EXPR
, TREE_TYPE (t
), t
, build_int_2 (size
, 0));
2568 t
= build (MODIFY_EXPR
, TREE_TYPE (ovf
), ovf
, t
);
2569 TREE_SIDE_EFFECTS (t
) = 1;
2570 expand_expr (t
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
2572 emit_label (lab_over
);
2576 r
= gen_rtx_MEM (Pmode
, addr_rtx
);
2577 MEM_ALIAS_SET (r
) = get_varargs_alias_set ();
2578 emit_move_insn (addr_rtx
, r
);
2584 /* Generate a memory reference for expand_block_move, copying volatile,
2585 and other bits from an original memory reference. */
2588 expand_block_move_mem (mode
, addr
, orig_mem
)
2589 enum machine_mode mode
;
2593 rtx mem
= gen_rtx_MEM (mode
, addr
);
2595 MEM_COPY_ATTRIBUTES (mem
, orig_mem
);
2596 #ifdef MEM_UNALIGNED_P
2597 MEM_UNALIGNED_P (mem
) = MEM_UNALIGNED_P (orig_mem
);
2602 /* Expand a block move operation, and return 1 if successful. Return 0
2603 if we should let the compiler generate normal code.
2605 operands[0] is the destination
2606 operands[1] is the source
2607 operands[2] is the length
2608 operands[3] is the alignment */
2610 #define MAX_MOVE_REG 4
2613 expand_block_move (operands
)
2616 rtx orig_dest
= operands
[0];
2617 rtx orig_src
= operands
[1];
2618 rtx bytes_rtx
= operands
[2];
2619 rtx align_rtx
= operands
[3];
2620 int constp
= (GET_CODE (bytes_rtx
) == CONST_INT
);
2631 rtx stores
[MAX_MOVE_REG
];
2634 /* If this is not a fixed size move, just call memcpy */
2638 /* If this is not a fixed size alignment, abort */
2639 if (GET_CODE (align_rtx
) != CONST_INT
)
2641 align
= INTVAL (align_rtx
);
2643 /* Anything to move? */
2644 bytes
= INTVAL (bytes_rtx
);
2648 /* Don't support real large moves. If string instructions are not used,
2649 then don't generate more than 8 loads. */
2655 else if (! STRICT_ALIGNMENT
)
2657 if (TARGET_POWERPC64
&& align
>= 4)
2666 else if (bytes
> 8*align
)
2669 /* Move the address into scratch registers. */
2670 dest_reg
= copy_addr_to_reg (XEXP (orig_dest
, 0));
2671 src_reg
= copy_addr_to_reg (XEXP (orig_src
, 0));
2673 if (TARGET_STRING
) /* string instructions are available */
2675 for ( ; bytes
> 0; bytes
-= move_bytes
)
2677 if (bytes
> 24 /* move up to 32 bytes at a time */
2685 && ! fixed_regs
[12])
2687 move_bytes
= (bytes
> 32) ? 32 : bytes
;
2688 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode
,
2691 expand_block_move_mem (BLKmode
,
2694 GEN_INT ((move_bytes
== 32)
2698 else if (bytes
> 16 /* move up to 24 bytes at a time */
2704 && ! fixed_regs
[10])
2706 move_bytes
= (bytes
> 24) ? 24 : bytes
;
2707 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode
,
2710 expand_block_move_mem (BLKmode
,
2713 GEN_INT (move_bytes
),
2716 else if (bytes
> 8 /* move up to 16 bytes at a time */
2722 move_bytes
= (bytes
> 16) ? 16 : bytes
;
2723 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode
,
2726 expand_block_move_mem (BLKmode
,
2729 GEN_INT (move_bytes
),
2732 else if (bytes
>= 8 && TARGET_POWERPC64
2733 /* 64-bit loads and stores require word-aligned displacements. */
2734 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2737 tmp_reg
= gen_reg_rtx (DImode
);
2738 emit_move_insn (tmp_reg
,
2739 expand_block_move_mem (DImode
,
2740 src_reg
, orig_src
));
2741 emit_move_insn (expand_block_move_mem (DImode
,
2742 dest_reg
, orig_dest
),
2746 { /* move up to 8 bytes at a time */
2747 move_bytes
= (bytes
> 8) ? 8 : bytes
;
2748 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode
,
2751 expand_block_move_mem (BLKmode
,
2754 GEN_INT (move_bytes
),
2757 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2758 { /* move 4 bytes */
2760 tmp_reg
= gen_reg_rtx (SImode
);
2761 emit_move_insn (tmp_reg
,
2762 expand_block_move_mem (SImode
,
2763 src_reg
, orig_src
));
2764 emit_move_insn (expand_block_move_mem (SImode
,
2765 dest_reg
, orig_dest
),
2768 else if (bytes
== 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2769 { /* move 2 bytes */
2771 tmp_reg
= gen_reg_rtx (HImode
);
2772 emit_move_insn (tmp_reg
,
2773 expand_block_move_mem (HImode
,
2774 src_reg
, orig_src
));
2775 emit_move_insn (expand_block_move_mem (HImode
,
2776 dest_reg
, orig_dest
),
2779 else if (bytes
== 1) /* move 1 byte */
2782 tmp_reg
= gen_reg_rtx (QImode
);
2783 emit_move_insn (tmp_reg
,
2784 expand_block_move_mem (QImode
,
2785 src_reg
, orig_src
));
2786 emit_move_insn (expand_block_move_mem (QImode
,
2787 dest_reg
, orig_dest
),
2791 { /* move up to 4 bytes at a time */
2792 move_bytes
= (bytes
> 4) ? 4 : bytes
;
2793 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode
,
2796 expand_block_move_mem (BLKmode
,
2799 GEN_INT (move_bytes
),
2803 if (bytes
> move_bytes
)
2805 if (! TARGET_POWERPC64
)
2807 emit_insn (gen_addsi3 (src_reg
, src_reg
,
2808 GEN_INT (move_bytes
)));
2809 emit_insn (gen_addsi3 (dest_reg
, dest_reg
,
2810 GEN_INT (move_bytes
)));
2814 emit_insn (gen_adddi3 (src_reg
, src_reg
,
2815 GEN_INT (move_bytes
)));
2816 emit_insn (gen_adddi3 (dest_reg
, dest_reg
,
2817 GEN_INT (move_bytes
)));
2823 else /* string instructions not available */
2825 num_reg
= offset
= 0;
2826 for ( ; bytes
> 0; (bytes
-= move_bytes
), (offset
+= move_bytes
))
2828 /* Calculate the correct offset for src/dest */
2832 dest_addr
= dest_reg
;
2836 src_addr
= plus_constant (src_reg
, offset
);
2837 dest_addr
= plus_constant (dest_reg
, offset
);
2840 /* Generate the appropriate load and store, saving the stores
2842 if (bytes
>= 8 && TARGET_POWERPC64
2843 /* 64-bit loads and stores require word-aligned displacements. */
2844 && (align
>= 8 || (! STRICT_ALIGNMENT
&& align
>= 4)))
2847 tmp_reg
= gen_reg_rtx (DImode
);
2848 emit_insn (gen_movdi (tmp_reg
,
2849 expand_block_move_mem (DImode
,
2852 stores
[num_reg
++] = gen_movdi (expand_block_move_mem (DImode
,
2857 else if (bytes
>= 4 && (align
>= 4 || ! STRICT_ALIGNMENT
))
2860 tmp_reg
= gen_reg_rtx (SImode
);
2861 emit_insn (gen_movsi (tmp_reg
,
2862 expand_block_move_mem (SImode
,
2865 stores
[num_reg
++] = gen_movsi (expand_block_move_mem (SImode
,
2870 else if (bytes
>= 2 && (align
>= 2 || ! STRICT_ALIGNMENT
))
2873 tmp_reg
= gen_reg_rtx (HImode
);
2874 emit_insn (gen_movhi (tmp_reg
,
2875 expand_block_move_mem (HImode
,
2878 stores
[num_reg
++] = gen_movhi (expand_block_move_mem (HImode
,
2886 tmp_reg
= gen_reg_rtx (QImode
);
2887 emit_insn (gen_movqi (tmp_reg
,
2888 expand_block_move_mem (QImode
,
2891 stores
[num_reg
++] = gen_movqi (expand_block_move_mem (QImode
,
2897 if (num_reg
>= MAX_MOVE_REG
)
2899 for (i
= 0; i
< num_reg
; i
++)
2900 emit_insn (stores
[i
]);
2905 for (i
= 0; i
< num_reg
; i
++)
2906 emit_insn (stores
[i
]);
2913 /* Return 1 if OP is a load multiple operation. It is known to be a
2914 PARALLEL and the first section will be tested. */
2917 load_multiple_operation (op
, mode
)
2919 enum machine_mode mode ATTRIBUTE_UNUSED
;
2921 int count
= XVECLEN (op
, 0);
2922 unsigned int dest_regno
;
2926 /* Perform a quick check so we don't blow up below. */
2928 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
2929 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
2930 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
2933 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
2934 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
2936 for (i
= 1; i
< count
; i
++)
2938 rtx elt
= XVECEXP (op
, 0, i
);
2940 if (GET_CODE (elt
) != SET
2941 || GET_CODE (SET_DEST (elt
)) != REG
2942 || GET_MODE (SET_DEST (elt
)) != SImode
2943 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
2944 || GET_CODE (SET_SRC (elt
)) != MEM
2945 || GET_MODE (SET_SRC (elt
)) != SImode
2946 || GET_CODE (XEXP (SET_SRC (elt
), 0)) != PLUS
2947 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt
), 0), 0), src_addr
)
2948 || GET_CODE (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != CONST_INT
2949 || INTVAL (XEXP (XEXP (SET_SRC (elt
), 0), 1)) != i
* 4)
2956 /* Similar, but tests for store multiple. Here, the second vector element
2957 is a CLOBBER. It will be tested later. */
2960 store_multiple_operation (op
, mode
)
2962 enum machine_mode mode ATTRIBUTE_UNUSED
;
2964 int count
= XVECLEN (op
, 0) - 1;
2965 unsigned int src_regno
;
2969 /* Perform a quick check so we don't blow up below. */
2971 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
2972 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
2973 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
2976 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
2977 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
2979 for (i
= 1; i
< count
; i
++)
2981 rtx elt
= XVECEXP (op
, 0, i
+ 1);
2983 if (GET_CODE (elt
) != SET
2984 || GET_CODE (SET_SRC (elt
)) != REG
2985 || GET_MODE (SET_SRC (elt
)) != SImode
2986 || REGNO (SET_SRC (elt
)) != src_regno
+ i
2987 || GET_CODE (SET_DEST (elt
)) != MEM
2988 || GET_MODE (SET_DEST (elt
)) != SImode
2989 || GET_CODE (XEXP (SET_DEST (elt
), 0)) != PLUS
2990 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt
), 0), 0), dest_addr
)
2991 || GET_CODE (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != CONST_INT
2992 || INTVAL (XEXP (XEXP (SET_DEST (elt
), 0), 1)) != i
* 4)
2999 /* Return 1 for an PARALLEL suitable for mtcrf. */
3002 mtcrf_operation (op
, mode
)
3004 enum machine_mode mode ATTRIBUTE_UNUSED
;
3006 int count
= XVECLEN (op
, 0);
3010 /* Perform a quick check so we don't blow up below. */
3012 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3013 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != UNSPEC
3014 || XVECLEN (SET_SRC (XVECEXP (op
, 0, 0)), 0) != 2)
3016 src_reg
= XVECEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0, 0);
3018 if (GET_CODE (src_reg
) != REG
3019 || GET_MODE (src_reg
) != SImode
3020 || ! INT_REGNO_P (REGNO (src_reg
)))
3023 for (i
= 0; i
< count
; i
++)
3025 rtx exp
= XVECEXP (op
, 0, i
);
3029 if (GET_CODE (exp
) != SET
3030 || GET_CODE (SET_DEST (exp
)) != REG
3031 || GET_MODE (SET_DEST (exp
)) != CCmode
3032 || ! CR_REGNO_P (REGNO (SET_DEST (exp
))))
3034 unspec
= SET_SRC (exp
);
3035 maskval
= 1 << (MAX_CR_REGNO
- REGNO (SET_DEST (exp
)));
3037 if (GET_CODE (unspec
) != UNSPEC
3038 || XINT (unspec
, 1) != 20
3039 || XVECLEN (unspec
, 0) != 2
3040 || XVECEXP (unspec
, 0, 0) != src_reg
3041 || GET_CODE (XVECEXP (unspec
, 0, 1)) != CONST_INT
3042 || INTVAL (XVECEXP (unspec
, 0, 1)) != maskval
)
3048 /* Return 1 for an PARALLEL suitable for lmw. */
3051 lmw_operation (op
, mode
)
3053 enum machine_mode mode ATTRIBUTE_UNUSED
;
3055 int count
= XVECLEN (op
, 0);
3056 unsigned int dest_regno
;
3058 unsigned int base_regno
;
3059 HOST_WIDE_INT offset
;
3062 /* Perform a quick check so we don't blow up below. */
3064 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3065 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != REG
3066 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != MEM
)
3069 dest_regno
= REGNO (SET_DEST (XVECEXP (op
, 0, 0)));
3070 src_addr
= XEXP (SET_SRC (XVECEXP (op
, 0, 0)), 0);
3073 || count
!= 32 - (int) dest_regno
)
3076 if (LEGITIMATE_INDIRECT_ADDRESS_P (src_addr
))
3079 base_regno
= REGNO (src_addr
);
3080 if (base_regno
== 0)
3083 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, src_addr
))
3085 offset
= INTVAL (XEXP (src_addr
, 1));
3086 base_regno
= REGNO (XEXP (src_addr
, 0));
3091 for (i
= 0; i
< count
; i
++)
3093 rtx elt
= XVECEXP (op
, 0, i
);
3096 HOST_WIDE_INT newoffset
;
3098 if (GET_CODE (elt
) != SET
3099 || GET_CODE (SET_DEST (elt
)) != REG
3100 || GET_MODE (SET_DEST (elt
)) != SImode
3101 || REGNO (SET_DEST (elt
)) != dest_regno
+ i
3102 || GET_CODE (SET_SRC (elt
)) != MEM
3103 || GET_MODE (SET_SRC (elt
)) != SImode
)
3105 newaddr
= XEXP (SET_SRC (elt
), 0);
3106 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
))
3111 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
))
3113 addr_reg
= XEXP (newaddr
, 0);
3114 newoffset
= INTVAL (XEXP (newaddr
, 1));
3118 if (REGNO (addr_reg
) != base_regno
3119 || newoffset
!= offset
+ 4 * i
)
3126 /* Return 1 for an PARALLEL suitable for stmw. */
3129 stmw_operation (op
, mode
)
3131 enum machine_mode mode ATTRIBUTE_UNUSED
;
3133 int count
= XVECLEN (op
, 0);
3134 unsigned int src_regno
;
3136 unsigned int base_regno
;
3137 HOST_WIDE_INT offset
;
3140 /* Perform a quick check so we don't blow up below. */
3142 || GET_CODE (XVECEXP (op
, 0, 0)) != SET
3143 || GET_CODE (SET_DEST (XVECEXP (op
, 0, 0))) != MEM
3144 || GET_CODE (SET_SRC (XVECEXP (op
, 0, 0))) != REG
)
3147 src_regno
= REGNO (SET_SRC (XVECEXP (op
, 0, 0)));
3148 dest_addr
= XEXP (SET_DEST (XVECEXP (op
, 0, 0)), 0);
3151 || count
!= 32 - (int) src_regno
)
3154 if (LEGITIMATE_INDIRECT_ADDRESS_P (dest_addr
))
3157 base_regno
= REGNO (dest_addr
);
3158 if (base_regno
== 0)
3161 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, dest_addr
))
3163 offset
= INTVAL (XEXP (dest_addr
, 1));
3164 base_regno
= REGNO (XEXP (dest_addr
, 0));
3169 for (i
= 0; i
< count
; i
++)
3171 rtx elt
= XVECEXP (op
, 0, i
);
3174 HOST_WIDE_INT newoffset
;
3176 if (GET_CODE (elt
) != SET
3177 || GET_CODE (SET_SRC (elt
)) != REG
3178 || GET_MODE (SET_SRC (elt
)) != SImode
3179 || REGNO (SET_SRC (elt
)) != src_regno
+ i
3180 || GET_CODE (SET_DEST (elt
)) != MEM
3181 || GET_MODE (SET_DEST (elt
)) != SImode
)
3183 newaddr
= XEXP (SET_DEST (elt
), 0);
3184 if (LEGITIMATE_INDIRECT_ADDRESS_P (newaddr
))
3189 else if (LEGITIMATE_OFFSET_ADDRESS_P (SImode
, newaddr
))
3191 addr_reg
= XEXP (newaddr
, 0);
3192 newoffset
= INTVAL (XEXP (newaddr
, 1));
3196 if (REGNO (addr_reg
) != base_regno
3197 || newoffset
!= offset
+ 4 * i
)
3205 /* A validation routine: say whether CODE, a condition code,
3206 and MODE match. The other alternatives either don't make
3207 sense or should never be generated. */
3209 validate_condition_mode (code
, mode
)
3211 enum machine_mode mode
;
3213 if (GET_RTX_CLASS (code
) != '<'
3214 || GET_MODE_CLASS (mode
) != MODE_CC
)
3217 /* These don't make sense. */
3218 if ((code
== GT
|| code
== LT
|| code
== GE
|| code
== LE
)
3219 && mode
== CCUNSmode
)
3222 if ((code
== GTU
|| code
== LTU
|| code
== GEU
|| code
== LEU
)
3223 && mode
!= CCUNSmode
)
3226 if (mode
!= CCFPmode
3227 && (code
== ORDERED
|| code
== UNORDERED
3228 || code
== UNEQ
|| code
== LTGT
3229 || code
== UNGT
|| code
== UNLT
3230 || code
== UNGE
|| code
== UNLE
))
3233 /* These should never be generated. */
3234 if (mode
== CCFPmode
3235 && (code
== LE
|| code
== GE
3236 || code
== UNEQ
|| code
== LTGT
3237 || code
== UNGT
|| code
== UNLT
))
3240 /* These are invalid; the information is not there. */
3241 if (mode
== CCEQmode
3242 && code
!= EQ
&& code
!= NE
)
3246 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
3247 We only check the opcode against the mode of the CC value here. */
3250 branch_comparison_operator (op
, mode
)
3252 enum machine_mode mode ATTRIBUTE_UNUSED
;
3254 enum rtx_code code
= GET_CODE (op
);
3255 enum machine_mode cc_mode
;
3257 if (GET_RTX_CLASS (code
) != '<')
3260 cc_mode
= GET_MODE (XEXP (op
, 0));
3261 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3264 validate_condition_mode (code
, cc_mode
);
3269 /* Return 1 if OP is a comparison operation that is valid for a branch
3270 insn and which is true if the corresponding bit in the CC register
3274 branch_positive_comparison_operator (op
, mode
)
3276 enum machine_mode mode
;
3280 if (! branch_comparison_operator (op
, mode
))
3283 code
= GET_CODE (op
);
3284 return (code
== EQ
|| code
== LT
|| code
== GT
3285 || code
== LTU
|| code
== GTU
3286 || code
== UNORDERED
);
3290 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
3291 We check the opcode against the mode of the CC value and disallow EQ or
3292 NE comparisons for integers. */
3295 scc_comparison_operator (op
, mode
)
3297 enum machine_mode mode
;
3299 enum rtx_code code
= GET_CODE (op
);
3300 enum machine_mode cc_mode
;
3302 if (GET_MODE (op
) != mode
&& mode
!= VOIDmode
)
3305 if (GET_RTX_CLASS (code
) != '<')
3308 cc_mode
= GET_MODE (XEXP (op
, 0));
3309 if (GET_MODE_CLASS (cc_mode
) != MODE_CC
)
3312 validate_condition_mode (code
, cc_mode
);
3314 if (code
== NE
&& cc_mode
!= CCFPmode
)
3321 trap_comparison_operator (op
, mode
)
3323 enum machine_mode mode
;
3325 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
3327 return GET_RTX_CLASS (GET_CODE (op
)) == '<';
3331 boolean_operator (op
, mode
)
3333 enum machine_mode mode ATTRIBUTE_UNUSED
;
3335 enum rtx_code code
= GET_CODE (op
);
3336 return (code
== AND
|| code
== IOR
|| code
== XOR
);
3340 boolean_or_operator (op
, mode
)
3342 enum machine_mode mode ATTRIBUTE_UNUSED
;
3344 enum rtx_code code
= GET_CODE (op
);
3345 return (code
== IOR
|| code
== XOR
);
3348 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3349 mask required to convert the result of a rotate insn into a shift
3350 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
3353 includes_lshift_p (shiftop
, andop
)
3354 register rtx shiftop
;
3357 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3359 shift_mask
<<= INTVAL (shiftop
);
3361 return (INTVAL (andop
) & ~shift_mask
) == 0;
3364 /* Similar, but for right shift. */
3367 includes_rshift_p (shiftop
, andop
)
3368 register rtx shiftop
;
3371 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3373 shift_mask
>>= INTVAL (shiftop
);
3375 return (INTVAL (andop
) & ~shift_mask
) == 0;
3378 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
3379 mask required to convert the result of a rotate insn into a shift
3380 left insn of SHIFTOP bits. */
3383 includes_lshift64_p (shiftop
, andop
)
3384 register rtx shiftop
;
3387 #if HOST_BITS_PER_WIDE_INT == 64
3388 unsigned HOST_WIDE_INT shift_mask
= ~(unsigned HOST_WIDE_INT
) 0;
3390 shift_mask
<<= INTVAL (shiftop
);
3392 return (INTVAL (andop
) & ~shift_mask
) == 0;
3394 unsigned HOST_WIDE_INT shift_mask_low
= ~(unsigned HOST_WIDE_INT
) 0;
3395 unsigned HOST_WIDE_INT shift_mask_high
= ~(unsigned HOST_WIDE_INT
) 0;
3397 shift_mask_low
<<= INTVAL (shiftop
);
3399 if (INTVAL (shiftop
) > 32)
3400 shift_mask_high
<<= (INTVAL (shiftop
) - 32);
3402 if (GET_CODE (andop
) == CONST_INT
)
3403 return (INTVAL (andop
) & ~shift_mask_low
) == 0;
3405 return ((CONST_DOUBLE_HIGH (andop
) & ~shift_mask_high
) == 0
3406 && (CONST_DOUBLE_LOW (andop
) & ~shift_mask_low
) == 0);
3410 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
3411 for lfq and stfq insns.
3413 Note reg1 and reg2 *must* be hard registers. To be sure we will
3414 abort if we are passed pseudo registers. */
3417 registers_ok_for_quad_peep (reg1
, reg2
)
3420 /* We might have been passed a SUBREG. */
3421 if (GET_CODE (reg1
) != REG
|| GET_CODE (reg2
) != REG
)
3424 return (REGNO (reg1
) == REGNO (reg2
) - 1);
3427 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
3428 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
3431 addrs_ok_for_quad_peep (addr1
, addr2
)
3438 /* Extract an offset (if used) from the first addr. */
3439 if (GET_CODE (addr1
) == PLUS
)
3441 /* If not a REG, return zero. */
3442 if (GET_CODE (XEXP (addr1
, 0)) != REG
)
3446 reg1
= REGNO (XEXP (addr1
, 0));
3447 /* The offset must be constant! */
3448 if (GET_CODE (XEXP (addr1
, 1)) != CONST_INT
)
3450 offset1
= INTVAL (XEXP (addr1
, 1));
3453 else if (GET_CODE (addr1
) != REG
)
3457 reg1
= REGNO (addr1
);
3458 /* This was a simple (mem (reg)) expression. Offset is 0. */
3462 /* Make sure the second address is a (mem (plus (reg) (const_int))). */
3463 if (GET_CODE (addr2
) != PLUS
)
3466 if (GET_CODE (XEXP (addr2
, 0)) != REG
3467 || GET_CODE (XEXP (addr2
, 1)) != CONST_INT
)
3470 if (reg1
!= REGNO (XEXP (addr2
, 0)))
3473 /* The offset for the second addr must be 8 more than the first addr. */
3474 if (INTVAL (XEXP (addr2
, 1)) != offset1
+ 8)
3477 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
3482 /* Return the register class of a scratch register needed to copy IN into
3483 or out of a register in CLASS in MODE. If it can be done directly,
3484 NO_REGS is returned. */
3487 secondary_reload_class (class, mode
, in
)
3488 enum reg_class
class;
3489 enum machine_mode mode ATTRIBUTE_UNUSED
;
3495 /* We can not copy a symbolic operand directly into anything other than
3496 BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS
3497 is needed as an intermediate register. */
3498 if (class != BASE_REGS
3499 && (GET_CODE (in
) == SYMBOL_REF
3500 || GET_CODE (in
) == HIGH
3501 || GET_CODE (in
) == LABEL_REF
3502 || GET_CODE (in
) == CONST
))
3506 if (GET_CODE (in
) == REG
)
3509 if (regno
>= FIRST_PSEUDO_REGISTER
)
3511 regno
= true_regnum (in
);
3512 if (regno
>= FIRST_PSEUDO_REGISTER
)
3516 else if (GET_CODE (in
) == SUBREG
)
3518 regno
= true_regnum (in
);
3519 if (regno
>= FIRST_PSEUDO_REGISTER
)
3525 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
3527 if (class == GENERAL_REGS
|| class == BASE_REGS
3528 || (regno
>= 0 && INT_REGNO_P (regno
)))
3531 /* Constants, memory, and FP registers can go into FP registers. */
3532 if ((regno
== -1 || FP_REGNO_P (regno
))
3533 && (class == FLOAT_REGS
|| class == NON_SPECIAL_REGS
))
3536 /* We can copy among the CR registers. */
3537 if ((class == CR_REGS
|| class == CR0_REGS
)
3538 && regno
>= 0 && CR_REGNO_P (regno
))
3541 /* Otherwise, we need GENERAL_REGS. */
3542 return GENERAL_REGS
;
3545 /* Given a comparison operation, return the bit number in CCR to test. We
3546 know this is a valid comparison.
3548 SCC_P is 1 if this is for an scc. That means that %D will have been
3549 used instead of %C, so the bits will be in different places.
3551 Return -1 if OP isn't a valid comparison for some reason. */
3558 enum rtx_code code
= GET_CODE (op
);
3559 enum machine_mode cc_mode
;
3564 if (GET_RTX_CLASS (code
) != '<')
3569 if (GET_CODE (reg
) != REG
3570 || ! CR_REGNO_P (REGNO (reg
)))
3573 cc_mode
= GET_MODE (reg
);
3574 cc_regnum
= REGNO (reg
);
3575 base_bit
= 4 * (cc_regnum
- CR0_REGNO
);
3577 validate_condition_mode (code
, cc_mode
);
3582 return scc_p
? base_bit
+ 3 : base_bit
+ 2;
3584 return base_bit
+ 2;
3585 case GT
: case GTU
: case UNLE
:
3586 return base_bit
+ 1;
3587 case LT
: case LTU
: case UNGE
:
3589 case ORDERED
: case UNORDERED
:
3590 return base_bit
+ 3;
3593 /* If scc, we will have done a cror to put the bit in the
3594 unordered position. So test that bit. For integer, this is ! LT
3595 unless this is an scc insn. */
3596 return scc_p
? base_bit
+ 3 : base_bit
;
3599 return scc_p
? base_bit
+ 3 : base_bit
+ 1;
3606 /* Return the GOT register. */
3609 rs6000_got_register (value
)
3610 rtx value ATTRIBUTE_UNUSED
;
3612 /* The second flow pass currently (June 1999) can't update regs_ever_live
3613 without disturbing other parts of the compiler, so update it here to
3614 make the prolog/epilogue code happy. */
3615 if (no_new_pseudos
&& ! regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
])
3616 regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
] = 1;
3618 current_function_uses_pic_offset_table
= 1;
3620 return pic_offset_table_rtx
;
3623 /* Define the structure for the machine field in struct function. */
3624 struct machine_function
3629 /* Functions to save and restore sysv_varargs_p.
3630 These will be called, via pointer variables,
3631 from push_function_context and pop_function_context. */
3634 rs6000_save_machine_status (p
)
3637 struct machine_function
*machine
=
3638 (struct machine_function
*) xmalloc (sizeof (struct machine_function
));
3640 p
->machine
= machine
;
3641 machine
->sysv_varargs_p
= rs6000_sysv_varargs_p
;
3645 rs6000_restore_machine_status (p
)
3648 struct machine_function
*machine
= p
->machine
;
3650 rs6000_sysv_varargs_p
= machine
->sysv_varargs_p
;
3653 p
->machine
= (struct machine_function
*)0;
3656 /* Do anything needed before RTL is emitted for each function. */
3659 rs6000_init_expanders ()
3662 rs6000_sysv_varargs_p
= 0;
3664 /* Arrange to save and restore machine status around nested functions. */
3665 save_machine_status
= rs6000_save_machine_status
;
3666 restore_machine_status
= rs6000_restore_machine_status
;
3670 /* Print an operand. Recognize special options, documented below. */
3673 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
3674 #define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13)
3676 #define SMALL_DATA_RELOC "sda21"
3677 #define SMALL_DATA_REG 0
3681 print_operand (file
, x
, code
)
3689 /* These macros test for integers and extract the low-order bits. */
3691 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
3692 && GET_MODE (X) == VOIDmode)
3694 #define INT_LOWPART(X) \
3695 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
3700 /* Write out an instruction after the call which may be replaced
3701 with glue code by the loader. This depends on the AIX version. */
3702 asm_fprintf (file
, RS6000_CALL_GLUE
);
3706 /* Write out either a '.' or '$' for the current location, depending
3707 on whether this is Solaris or not. */
3708 putc ((DEFAULT_ABI
== ABI_SOLARIS
) ? '.' : '$', file
);
3711 /* %a is output_address. */
3714 /* If X is a constant integer whose low-order 5 bits are zero,
3715 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
3716 in the AIX assembler where "sri" with a zero shift count
3717 write a trash instruction. */
3718 if (GET_CODE (x
) == CONST_INT
&& (INTVAL (x
) & 31) == 0)
3725 /* If constant, low-order 16 bits of constant, unsigned.
3726 Otherwise, write normally. */
3728 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 0xffff);
3730 print_operand (file
, x
, 0);
3734 /* If the low-order bit is zero, write 'r'; otherwise, write 'l'
3735 for 64-bit mask direction. */
3736 putc (((INT_LOWPART(x
) & 1) == 0 ? 'r' : 'l'), file
);
3739 /* %c is output_addr_const if a CONSTANT_ADDRESS_P, otherwise
3743 /* There used to be a comment for 'C' reading "This is an
3744 optional cror needed for certain floating-point
3745 comparisons. Otherwise write nothing." */
3747 /* Similar, except that this is for an scc, so we must be able to
3748 encode the test in a single bit that is one. We do the above
3749 for any LE, GE, GEU, or LEU and invert the bit for NE. */
3750 if (GET_CODE (x
) == LE
|| GET_CODE (x
) == GE
3751 || GET_CODE (x
) == LEU
|| GET_CODE (x
) == GEU
)
3753 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3755 fprintf (file
, "cror %d,%d,%d\n\t", base_bit
+ 3,
3757 base_bit
+ (GET_CODE (x
) == GE
|| GET_CODE (x
) == GEU
));
3760 else if (GET_CODE (x
) == NE
)
3762 int base_bit
= 4 * (REGNO (XEXP (x
, 0)) - CR0_REGNO
);
3764 fprintf (file
, "crnor %d,%d,%d\n\t", base_bit
+ 3,
3765 base_bit
+ 2, base_bit
+ 2);
3770 /* X is a CR register. Print the number of the EQ bit of the CR */
3771 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3772 output_operand_lossage ("invalid %%E value");
3774 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
) + 2);
3778 /* X is a CR register. Print the shift count needed to move it
3779 to the high-order four bits. */
3780 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3781 output_operand_lossage ("invalid %%f value");
3783 fprintf (file
, "%d", 4 * (REGNO (x
) - CR0_REGNO
));
3787 /* Similar, but print the count for the rotate in the opposite
3789 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
3790 output_operand_lossage ("invalid %%F value");
3792 fprintf (file
, "%d", 32 - 4 * (REGNO (x
) - CR0_REGNO
));
3796 /* X is a constant integer. If it is negative, print "m",
3797 otherwise print "z". This is to make a aze or ame insn. */
3798 if (GET_CODE (x
) != CONST_INT
)
3799 output_operand_lossage ("invalid %%G value");
3800 else if (INTVAL (x
) >= 0)
3807 /* If constant, output low-order five bits. Otherwise,
3810 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 31);
3812 print_operand (file
, x
, 0);
3816 /* If constant, output low-order six bits. Otherwise,
3819 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INT_LOWPART (x
) & 63);
3821 print_operand (file
, x
, 0);
3825 /* Print `i' if this is a constant, else nothing. */
3831 /* Write the bit number in CCR for jump. */
3834 output_operand_lossage ("invalid %%j code");
3836 fprintf (file
, "%d", i
);
3840 /* Similar, but add one for shift count in rlinm for scc and pass
3841 scc flag to `ccr_bit'. */
3844 output_operand_lossage ("invalid %%J code");
3846 /* If we want bit 31, write a shift count of zero, not 32. */
3847 fprintf (file
, "%d", i
== 31 ? 0 : i
+ 1);
3851 /* X must be a constant. Write the 1's complement of the
3854 output_operand_lossage ("invalid %%k value");
3856 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, ~ INT_LOWPART (x
));
3860 /* X must be a symbolic constant on ELF. Write an
3861 expression suitable for an 'addi' that adds in the low 16
3863 if (GET_CODE (x
) != CONST
)
3865 print_operand_address (file
, x
);
3870 if (GET_CODE (XEXP (x
, 0)) != PLUS
3871 || (GET_CODE (XEXP (XEXP (x
, 0), 0)) != SYMBOL_REF
3872 && GET_CODE (XEXP (XEXP (x
, 0), 0)) != LABEL_REF
)
3873 || GET_CODE (XEXP (XEXP (x
, 0), 1)) != CONST_INT
)
3874 output_operand_lossage ("invalid %%K value");
3875 print_operand_address (file
, XEXP (XEXP (x
, 0), 0));
3877 print_operand (file
, XEXP (XEXP (x
, 0), 1), 0);
3881 /* %l is output_asm_label. */
3884 /* Write second word of DImode or DFmode reference. Works on register
3885 or non-indexed memory only. */
3886 if (GET_CODE (x
) == REG
)
3887 fprintf (file
, "%s", reg_names
[REGNO (x
) + 1]);
3888 else if (GET_CODE (x
) == MEM
)
3890 /* Handle possible auto-increment. Since it is pre-increment and
3891 we have already done it, we can just use an offset of word. */
3892 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
3893 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
3894 output_address (plus_constant_for_output (XEXP (XEXP (x
, 0), 0),
3897 output_address (plus_constant_for_output (XEXP (x
, 0),
3899 if (small_data_operand (x
, GET_MODE (x
)))
3900 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
3901 reg_names
[SMALL_DATA_REG
]);
3906 /* MB value for a mask operand. */
3907 if (! mask_operand (x
, VOIDmode
))
3908 output_operand_lossage ("invalid %%m value");
3910 val
= INT_LOWPART (x
);
3912 /* If the high bit is set and the low bit is not, the value is zero.
3913 If the high bit is zero, the value is the first 1 bit we find from
3915 if ((val
& 0x80000000) && ((val
& 1) == 0))
3920 else if ((val
& 0x80000000) == 0)
3922 for (i
= 1; i
< 32; i
++)
3923 if ((val
<<= 1) & 0x80000000)
3925 fprintf (file
, "%d", i
);
3929 /* Otherwise, look for the first 0 bit from the right. The result is its
3930 number plus 1. We know the low-order bit is one. */
3931 for (i
= 0; i
< 32; i
++)
3932 if (((val
>>= 1) & 1) == 0)
3935 /* If we ended in ...01, i would be 0. The correct value is 31, so
3937 fprintf (file
, "%d", 31 - i
);
3941 /* ME value for a mask operand. */
3942 if (! mask_operand (x
, VOIDmode
))
3943 output_operand_lossage ("invalid %%M value");
3945 val
= INT_LOWPART (x
);
3947 /* If the low bit is set and the high bit is not, the value is 31.
3948 If the low bit is zero, the value is the first 1 bit we find from
3950 if ((val
& 1) && ((val
& 0x80000000) == 0))
3955 else if ((val
& 1) == 0)
3957 for (i
= 0; i
< 32; i
++)
3958 if ((val
>>= 1) & 1)
3961 /* If we had ....10, i would be 0. The result should be
3962 30, so we need 30 - i. */
3963 fprintf (file
, "%d", 30 - i
);
3967 /* Otherwise, look for the first 0 bit from the left. The result is its
3968 number minus 1. We know the high-order bit is one. */
3969 for (i
= 0; i
< 32; i
++)
3970 if (((val
<<= 1) & 0x80000000) == 0)
3973 fprintf (file
, "%d", i
);
3976 /* %n outputs the negative of its operand. */
3979 /* Write the number of elements in the vector times 4. */
3980 if (GET_CODE (x
) != PARALLEL
)
3981 output_operand_lossage ("invalid %%N value");
3983 fprintf (file
, "%d", XVECLEN (x
, 0) * 4);
3987 /* Similar, but subtract 1 first. */
3988 if (GET_CODE (x
) != PARALLEL
)
3989 output_operand_lossage ("invalid %%O value");
3991 fprintf (file
, "%d", (XVECLEN (x
, 0) - 1) * 4);
3995 /* X is a CONST_INT that is a power of two. Output the logarithm. */
3997 || (i
= exact_log2 (INT_LOWPART (x
))) < 0)
3998 output_operand_lossage ("invalid %%p value");
4000 fprintf (file
, "%d", i
);
4004 /* The operand must be an indirect memory reference. The result
4005 is the register number. */
4006 if (GET_CODE (x
) != MEM
|| GET_CODE (XEXP (x
, 0)) != REG
4007 || REGNO (XEXP (x
, 0)) >= 32)
4008 output_operand_lossage ("invalid %%P value");
4010 fprintf (file
, "%d", REGNO (XEXP (x
, 0)));
4014 /* This outputs the logical code corresponding to a boolean
4015 expression. The expression may have one or both operands
4016 negated (if one, only the first one). For condition register
4017 logical operations, it will also treat the negated
4018 CR codes as NOTs, but not handle NOTs of them. */
4020 const char *const *t
= 0;
4022 enum rtx_code code
= GET_CODE (x
);
4023 static const char * const tbl
[3][3] = {
4024 { "and", "andc", "nor" },
4025 { "or", "orc", "nand" },
4026 { "xor", "eqv", "xor" } };
4030 else if (code
== IOR
)
4032 else if (code
== XOR
)
4035 output_operand_lossage ("invalid %%q value");
4037 if (GET_CODE (XEXP (x
, 0)) != NOT
)
4041 if (GET_CODE (XEXP (x
, 1)) == NOT
)
4052 /* X is a CR register. Print the mask for `mtcrf'. */
4053 if (GET_CODE (x
) != REG
|| ! CR_REGNO_P (REGNO (x
)))
4054 output_operand_lossage ("invalid %%R value");
4056 fprintf (file
, "%d", 128 >> (REGNO (x
) - CR0_REGNO
));
4060 /* Low 5 bits of 32 - value */
4062 output_operand_lossage ("invalid %%s value");
4064 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, (32 - INT_LOWPART (x
)) & 31);
4068 /* PowerPC64 mask position. All 0's and all 1's are excluded.
4069 CONST_INT 32-bit mask is considered sign-extended so any
4070 transition must occur within the CONST_INT, not on the boundary. */
4071 if (! mask64_operand (x
, VOIDmode
))
4072 output_operand_lossage ("invalid %%S value");
4074 val
= INT_LOWPART (x
);
4076 if (val
& 1) /* Clear Left */
4078 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4079 if (!((val
>>= 1) & 1))
4082 #if HOST_BITS_PER_WIDE_INT == 32
4083 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4085 val
= CONST_DOUBLE_HIGH (x
);
4090 for (i
= 32; i
< 64; i
++)
4091 if (!((val
>>= 1) & 1))
4095 /* i = index of last set bit from right
4096 mask begins at 63 - i from left */
4098 output_operand_lossage ("%%S computed all 1's mask");
4100 fprintf (file
, "%d", 63 - i
);
4103 else /* Clear Right */
4105 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4106 if ((val
>>= 1) & 1)
4109 #if HOST_BITS_PER_WIDE_INT == 32
4110 if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4112 val
= CONST_DOUBLE_HIGH (x
);
4114 if (val
== (HOST_WIDE_INT
) -1)
4117 for (i
= 32; i
< 64; i
++)
4118 if ((val
>>= 1) & 1)
4122 /* i = index of last clear bit from right
4123 mask ends at 62 - i from left */
4125 output_operand_lossage ("%%S computed all 0's mask");
4127 fprintf (file
, "%d", 62 - i
);
4132 /* Print the symbolic name of a branch target register. */
4133 if (GET_CODE (x
) != REG
|| (REGNO (x
) != LINK_REGISTER_REGNUM
4134 && REGNO (x
) != COUNT_REGISTER_REGNUM
))
4135 output_operand_lossage ("invalid %%T value");
4136 else if (REGNO (x
) == LINK_REGISTER_REGNUM
)
4137 fputs (TARGET_NEW_MNEMONICS
? "lr" : "r", file
);
4139 fputs ("ctr", file
);
4143 /* High-order 16 bits of constant for use in unsigned operand. */
4145 output_operand_lossage ("invalid %%u value");
4147 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
4148 (INT_LOWPART (x
) >> 16) & 0xffff);
4152 /* High-order 16 bits of constant for use in signed operand. */
4154 output_operand_lossage ("invalid %%v value");
4157 int value
= (INT_LOWPART (x
) >> 16) & 0xffff;
4159 /* Solaris assembler doesn't like lis 0,0x8000 */
4160 if (DEFAULT_ABI
== ABI_SOLARIS
&& (value
& 0x8000) != 0)
4161 fprintf (file
, "%d", value
| (~0 << 16));
4163 fprintf (file
, "0x%x", value
);
4168 /* Print `u' if this has an auto-increment or auto-decrement. */
4169 if (GET_CODE (x
) == MEM
4170 && (GET_CODE (XEXP (x
, 0)) == PRE_INC
4171 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
))
4176 /* Print the trap code for this operand. */
4177 switch (GET_CODE (x
))
4180 fputs ("eq", file
); /* 4 */
4183 fputs ("ne", file
); /* 24 */
4186 fputs ("lt", file
); /* 16 */
4189 fputs ("le", file
); /* 20 */
4192 fputs ("gt", file
); /* 8 */
4195 fputs ("ge", file
); /* 12 */
4198 fputs ("llt", file
); /* 2 */
4201 fputs ("lle", file
); /* 6 */
4204 fputs ("lgt", file
); /* 1 */
4207 fputs ("lge", file
); /* 5 */
4215 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
4218 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
,
4219 ((INT_LOWPART (x
) & 0xffff) ^ 0x8000) - 0x8000);
4221 print_operand (file
, x
, 0);
4225 /* MB value for a PowerPC64 rldic operand. */
4226 if (! rldic_operand (x
, VOIDmode
))
4227 output_operand_lossage ("invalid %%W value");
4229 val
= (GET_CODE (x
) == CONST_INT
4230 ? INTVAL (x
) : CONST_DOUBLE_HIGH (x
));
4235 for (i
= 0; i
< HOST_BITS_PER_WIDE_INT
; i
++)
4236 if ((val
<<= 1) < 0)
4239 #if HOST_BITS_PER_WIDE_INT == 32
4240 if (GET_CODE (x
) == CONST_INT
&& i
>= 0)
4241 i
+= 32; /* zero-extend high-part was all 0's */
4242 else if (GET_CODE (x
) == CONST_DOUBLE
&& i
== 32)
4244 val
= CONST_DOUBLE_LOW (x
);
4251 for ( ; i
< 64; i
++)
4252 if ((val
<<= 1) < 0)
4257 fprintf (file
, "%d", i
+ 1);
4261 if (GET_CODE (x
) == MEM
4262 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x
, 0)))
4267 /* Like 'L', for third word of TImode */
4268 if (GET_CODE (x
) == REG
)
4269 fprintf (file
, "%s", reg_names
[REGNO (x
) + 2]);
4270 else if (GET_CODE (x
) == MEM
)
4272 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4273 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4274 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 8));
4276 output_address (plus_constant (XEXP (x
, 0), 8));
4277 if (small_data_operand (x
, GET_MODE (x
)))
4278 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4279 reg_names
[SMALL_DATA_REG
]);
4284 /* X is a SYMBOL_REF. Write out the name preceded by a
4285 period and without any trailing data in brackets. Used for function
4286 names. If we are configured for System V (or the embedded ABI) on
4287 the PowerPC, do not emit the period, since those systems do not use
4288 TOCs and the like. */
4289 if (GET_CODE (x
) != SYMBOL_REF
)
4292 if (XSTR (x
, 0)[0] != '.')
4294 switch (DEFAULT_ABI
)
4304 case ABI_AIX_NODESC
:
4310 RS6000_OUTPUT_BASENAME (file
, XSTR (x
, 0));
4312 assemble_name (file
, XSTR (x
, 0));
4317 /* Like 'L', for last word of TImode. */
4318 if (GET_CODE (x
) == REG
)
4319 fprintf (file
, "%s", reg_names
[REGNO (x
) + 3]);
4320 else if (GET_CODE (x
) == MEM
)
4322 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
4323 || GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4324 output_address (plus_constant (XEXP (XEXP (x
, 0), 0), 12));
4326 output_address (plus_constant (XEXP (x
, 0), 12));
4327 if (small_data_operand (x
, GET_MODE (x
)))
4328 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4329 reg_names
[SMALL_DATA_REG
]);
4334 if (GET_CODE (x
) == REG
)
4335 fprintf (file
, "%s", reg_names
[REGNO (x
)]);
4336 else if (GET_CODE (x
) == MEM
)
4338 /* We need to handle PRE_INC and PRE_DEC here, since we need to
4339 know the width from the mode. */
4340 if (GET_CODE (XEXP (x
, 0)) == PRE_INC
)
4341 fprintf (file
, "%d(%s)", GET_MODE_SIZE (GET_MODE (x
)),
4342 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4343 else if (GET_CODE (XEXP (x
, 0)) == PRE_DEC
)
4344 fprintf (file
, "%d(%s)", - GET_MODE_SIZE (GET_MODE (x
)),
4345 reg_names
[REGNO (XEXP (XEXP (x
, 0), 0))]);
4347 output_address (XEXP (x
, 0));
4350 output_addr_const (file
, x
);
4354 output_operand_lossage ("invalid %%xn code");
4358 /* Print the address of an operand. */
4361 print_operand_address (file
, x
)
4365 if (GET_CODE (x
) == REG
)
4366 fprintf (file
, "0(%s)", reg_names
[ REGNO (x
) ]);
4367 else if (GET_CODE (x
) == SYMBOL_REF
|| GET_CODE (x
) == CONST
4368 || GET_CODE (x
) == LABEL_REF
)
4370 output_addr_const (file
, x
);
4371 if (small_data_operand (x
, GET_MODE (x
)))
4372 fprintf (file
, "@%s(%s)", SMALL_DATA_RELOC
,
4373 reg_names
[SMALL_DATA_REG
]);
4374 else if (TARGET_TOC
)
4377 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == REG
)
4379 if (REGNO (XEXP (x
, 0)) == 0)
4380 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 1)) ],
4381 reg_names
[ REGNO (XEXP (x
, 0)) ]);
4383 fprintf (file
, "%s,%s", reg_names
[ REGNO (XEXP (x
, 0)) ],
4384 reg_names
[ REGNO (XEXP (x
, 1)) ]);
4386 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4388 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (XEXP (x
, 1)));
4389 fprintf (file
, "(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4392 else if (GET_CODE (x
) == LO_SUM
&& GET_CODE (XEXP (x
, 0)) == REG
4393 && CONSTANT_P (XEXP (x
, 1)))
4395 output_addr_const (file
, XEXP (x
, 1));
4396 fprintf (file
, "@l(%s)", reg_names
[ REGNO (XEXP (x
, 0)) ]);
4399 else if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (x
))
4403 rtx contains_minus
= XEXP (x
, 1);
4406 /* Find the (minus (sym) (toc)) buried in X, and temporarily
4407 turn it into (sym) for output_addr_const. */
4408 while (GET_CODE (XEXP (contains_minus
, 0)) != MINUS
)
4409 contains_minus
= XEXP (contains_minus
, 0);
4411 minus
= XEXP (contains_minus
, 0);
4412 XEXP (contains_minus
, 0) = XEXP (minus
, 0);
4413 output_addr_const (file
, XEXP (x
, 1));
4414 XEXP (contains_minus
, 0) = minus
;
4417 output_addr_const (file
, XEXP (x
, 1));
4419 fprintf (file
, "(%s)", reg_names
[REGNO (XEXP (x
, 0))]);
4426 rs6000_reverse_condition (mode
, code
)
4427 enum machine_mode mode
;
4430 /* Reversal of FP compares takes care -- an ordered compare
4431 becomes an unordered compare and vice versa. */
4432 if (mode
== CCFPmode
)
4433 return reverse_condition_maybe_unordered (code
);
4435 return reverse_condition (code
);
4439 /* Generate a compare for CODE. Return a brand-new rtx that
4440 represents the result of the compare. */
4442 rs6000_generate_compare (code
)
4445 enum machine_mode comp_mode
;
4448 if (rs6000_compare_fp_p
)
4449 comp_mode
= CCFPmode
;
4450 else if (code
== GTU
|| code
== LTU
4451 || code
== GEU
|| code
== LEU
)
4452 comp_mode
= CCUNSmode
;
4456 /* First, the compare. */
4457 compare_result
= gen_reg_rtx (comp_mode
);
4458 emit_insn (gen_rtx_SET (VOIDmode
, compare_result
,
4459 gen_rtx_COMPARE (comp_mode
,
4461 rs6000_compare_op1
)));
4463 /* Some kinds of FP comparisons need an OR operation. */
4464 if (rs6000_compare_fp_p
4465 && (code
== LE
|| code
== GE
4466 || code
== UNEQ
|| code
== LTGT
4467 || code
== UNGT
|| code
== UNLT
))
4469 enum rtx_code or1
, or2
;
4470 rtx or1_rtx
, or2_rtx
, compare2_rtx
;
4471 rtx or_result
= gen_reg_rtx (CCEQmode
);
4475 case LE
: or1
= LT
; or2
= EQ
; break;
4476 case GE
: or1
= GT
; or2
= EQ
; break;
4477 case UNEQ
: or1
= UNORDERED
; or2
= EQ
; break;
4478 case LTGT
: or1
= LT
; or2
= GT
; break;
4479 case UNGT
: or1
= UNORDERED
; or2
= GT
; break;
4480 case UNLT
: or1
= UNORDERED
; or2
= LT
; break;
4483 validate_condition_mode (or1
, comp_mode
);
4484 validate_condition_mode (or2
, comp_mode
);
4485 or1_rtx
= gen_rtx (or1
, SImode
, compare_result
, const0_rtx
);
4486 or2_rtx
= gen_rtx (or2
, SImode
, compare_result
, const0_rtx
);
4487 compare2_rtx
= gen_rtx_COMPARE (CCEQmode
,
4488 gen_rtx_IOR (SImode
, or1_rtx
, or2_rtx
),
4490 emit_insn (gen_rtx_SET (VOIDmode
, or_result
, compare2_rtx
));
4492 compare_result
= or_result
;
4496 validate_condition_mode (code
, GET_MODE (compare_result
));
4498 return gen_rtx (code
, VOIDmode
, compare_result
, const0_rtx
);
4502 /* Emit the RTL for an sCOND pattern. */
4505 rs6000_emit_sCOND (code
, result
)
4510 enum machine_mode op_mode
;
4512 condition_rtx
= rs6000_generate_compare (code
);
4514 op_mode
= GET_MODE (rs6000_compare_op0
);
4515 if (op_mode
== VOIDmode
)
4516 op_mode
= GET_MODE (rs6000_compare_op1
);
4518 if (TARGET_POWERPC64
&& (op_mode
== DImode
|| rs6000_compare_fp_p
))
4520 PUT_MODE (condition_rtx
, DImode
);
4521 convert_move (result
, condition_rtx
, 0);
4525 PUT_MODE (condition_rtx
, SImode
);
4526 emit_insn (gen_rtx_SET (VOIDmode
, result
, condition_rtx
));
4531 /* Emit a branch of kind CODE to location LOC. */
4534 rs6000_emit_cbranch (code
, loc
)
4538 rtx condition_rtx
, loc_ref
;
4540 condition_rtx
= rs6000_generate_compare (code
);
4541 loc_ref
= gen_rtx_LABEL_REF (VOIDmode
, loc
);
4542 emit_jump_insn (gen_rtx_SET (VOIDmode
, pc_rtx
,
4543 gen_rtx_IF_THEN_ELSE (VOIDmode
, condition_rtx
,
4548 /* Return the string to output a conditional branch to LABEL, which is
4549 the operand number of the label, or -1 if the branch is really a
4552 OP is the conditional expression. XEXP (OP, 0) is assumed to be a
4553 condition code register and its mode specifies what kind of
4556 REVERSED is non-zero if we should reverse the sense of the comparison.
4558 INSN is the insn. */
4561 output_cbranch (op
, label
, reversed
, insn
)
4567 static char string
[64];
4568 enum rtx_code code
= GET_CODE (op
);
4569 rtx cc_reg
= XEXP (op
, 0);
4570 enum machine_mode mode
= GET_MODE (cc_reg
);
4571 int cc_regno
= REGNO (cc_reg
) - CR0_REGNO
;
4572 int need_longbranch
= label
!= NULL
&& get_attr_length (insn
) == 8;
4573 int really_reversed
= reversed
^ need_longbranch
;
4579 validate_condition_mode (code
, mode
);
4581 /* Work out which way this really branches. We could use
4582 reverse_condition_maybe_unordered here always but this
4583 makes the resulting assembler clearer. */
4584 if (really_reversed
)
4585 code
= rs6000_reverse_condition (mode
, code
);
4589 /* Not all of these are actually distinct opcodes, but
4590 we distinguish them for clarity of the resulting assembler. */
4591 case NE
: ccode
= "ne"; break;
4592 case EQ
: ccode
= "eq"; break;
4593 case GE
: case GEU
: ccode
= "ge"; break;
4594 case GT
: case GTU
: ccode
= "gt"; break;
4595 case LE
: case LEU
: ccode
= "le"; break;
4596 case LT
: case LTU
: ccode
= "lt"; break;
4597 case UNORDERED
: ccode
= "un"; break;
4598 case ORDERED
: ccode
= "nu"; break;
4599 case UNGE
: ccode
= "nl"; break;
4600 case UNLE
: ccode
= "ng"; break;
4605 /* Maybe we have a guess as to how likely the branch is.
4606 The old mnemonics don't have a way to specify this information. */
4607 note
= find_reg_note (insn
, REG_BR_PROB
, NULL_RTX
);
4608 if (note
!= NULL_RTX
)
4610 /* PROB is the difference from 50%. */
4611 int prob
= INTVAL (XEXP (note
, 0)) - REG_BR_PROB_BASE
/ 2;
4613 /* For branches that are very close to 50%, assume not-taken. */
4614 if (abs (prob
) > REG_BR_PROB_BASE
/ 20
4615 && ((prob
> 0) ^ need_longbranch
))
4624 s
+= sprintf (s
, "{b%sr|b%slr%s} ", ccode
, ccode
, pred
);
4626 s
+= sprintf (s
, "{b%s|b%s%s} ", ccode
, ccode
, pred
);
4628 /* We need to escape any '%' characters in the reg_names string.
4629 Assume they'd only be the first character... */
4630 if (reg_names
[cc_regno
+ CR0_REGNO
][0] == '%')
4632 s
+= sprintf (s
, "%s", reg_names
[cc_regno
+ CR0_REGNO
]);
4636 /* If the branch distance was too far, we may have to use an
4637 unconditional branch to go the distance. */
4638 if (need_longbranch
)
4639 s
+= sprintf (s
, ",%c$+8 ; b %s", '%', label
);
4641 s
+= sprintf (s
, ",%s", label
);
4647 /* This page contains routines that are used to determine what the function
4648 prologue and epilogue code will do and write them out. */
4650 /* Return the first fixed-point register that is required to be saved. 32 if
4654 first_reg_to_save ()
4658 /* Find lowest numbered live register. */
4659 for (first_reg
= 13; first_reg
<= 31; first_reg
++)
4660 if (regs_ever_live
[first_reg
]
4661 && (! call_used_regs
[first_reg
]
4662 || (first_reg
== PIC_OFFSET_TABLE_REGNUM
4663 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
4669 /* AIX must save/restore every register that contains a parameter
4670 before/after the .__mcount call plus an additional register
4671 for the static chain, if needed; use registers from 30 down to 22
4673 if (DEFAULT_ABI
== ABI_AIX
)
4675 int last_parm_reg
, profile_first_reg
;
4677 /* Figure out last used parameter register. The proper thing
4678 to do is to walk incoming args of the function. A function
4679 might have live parameter registers even if it has no
4681 for (last_parm_reg
= 10;
4682 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
4686 /* Calculate first reg for saving parameter registers
4688 Skip reg 31 which may contain the frame pointer. */
4689 profile_first_reg
= (33 - last_parm_reg
4690 - (current_function_needs_context
? 1 : 0));
4691 /* Do not save frame pointer if no parameters needs to be saved. */
4692 if (profile_first_reg
== 31)
4693 profile_first_reg
= 32;
4695 if (first_reg
> profile_first_reg
)
4696 first_reg
= profile_first_reg
;
4699 /* SVR4 may need one register to preserve the static chain. */
4700 else if (current_function_needs_context
)
4702 /* Skip reg 31 which may contain the frame pointer. */
4711 /* Similar, for FP regs. */
4714 first_fp_reg_to_save ()
4718 /* Find lowest numbered live register. */
4719 for (first_reg
= 14 + 32; first_reg
<= 63; first_reg
++)
4720 if (regs_ever_live
[first_reg
])
4726 /* Calculate the stack information for the current function. This is
4727 complicated by having two separate calling sequences, the AIX calling
4728 sequence and the V.4 calling sequence.
4730 AIX stack frames look like:
4732 SP----> +---------------------------------------+
4733 | back chain to caller | 0 0
4734 +---------------------------------------+
4735 | saved CR | 4 8 (8-11)
4736 +---------------------------------------+
4738 +---------------------------------------+
4739 | reserved for compilers | 12 24
4740 +---------------------------------------+
4741 | reserved for binders | 16 32
4742 +---------------------------------------+
4743 | saved TOC pointer | 20 40
4744 +---------------------------------------+
4745 | Parameter save area (P) | 24 48
4746 +---------------------------------------+
4747 | Alloca space (A) | 24+P etc.
4748 +---------------------------------------+
4749 | Local variable space (L) | 24+P+A
4750 +---------------------------------------+
4751 | Float/int conversion temporary (X) | 24+P+A+L
4752 +---------------------------------------+
4753 | Save area for GP registers (G) | 24+P+A+X+L
4754 +---------------------------------------+
4755 | Save area for FP registers (F) | 24+P+A+X+L+G
4756 +---------------------------------------+
4757 old SP->| back chain to caller's caller |
4758 +---------------------------------------+
4760 The required alignment for AIX configurations is two words (i.e., 8
4764 V.4 stack frames look like:
4766 SP----> +---------------------------------------+
4767 | back chain to caller | 0
4768 +---------------------------------------+
4769 | caller's saved LR | 4
4770 +---------------------------------------+
4771 | Parameter save area (P) | 8
4772 +---------------------------------------+
4773 | Alloca space (A) | 8+P
4774 +---------------------------------------+
4775 | Varargs save area (V) | 8+P+A
4776 +---------------------------------------+
4777 | Local variable space (L) | 8+P+A+V
4778 +---------------------------------------+
4779 | Float/int conversion temporary (X) | 8+P+A+V+L
4780 +---------------------------------------+
4781 | saved CR (C) | 8+P+A+V+L+X
4782 +---------------------------------------+
4783 | Save area for GP registers (G) | 8+P+A+V+L+X+C
4784 +---------------------------------------+
4785 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
4786 +---------------------------------------+
4787 old SP->| back chain to caller's caller |
4788 +---------------------------------------+
4790 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is
4791 given. (But note below and in sysv4.h that we require only 8 and
4792 may round up the size of our stack frame anyways. The historical
4793 reason is early versions of powerpc-linux which didn't properly
4794 align the stack at program startup. A happy side-effect is that
4795 -mno-eabi libraries can be used with -meabi programs.)
4798 The EABI configuration defaults to the V.4 layout, unless
4799 -mcall-aix is used, in which case the AIX layout is used. However,
4800 the stack alignment requirements may differ. If -mno-eabi is not
4801 given, the required stack alignment is 8 bytes; if -mno-eabi is
4802 given, the required alignment is 16 bytes. (But see V.4 comment
4805 #ifndef ABI_STACK_BOUNDARY
4806 #define ABI_STACK_BOUNDARY STACK_BOUNDARY
4810 rs6000_stack_info ()
4812 static rs6000_stack_t info
, zero_info
;
4813 rs6000_stack_t
*info_ptr
= &info
;
4814 int reg_size
= TARGET_POWERPC64
? 8 : 4;
4815 enum rs6000_abi abi
;
4818 /* Zero all fields portably */
4821 /* Select which calling sequence */
4822 info_ptr
->abi
= abi
= DEFAULT_ABI
;
4824 /* Calculate which registers need to be saved & save area size */
4825 info_ptr
->first_gp_reg_save
= first_reg_to_save ();
4826 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM,
4827 even if it currently looks like we won't. */
4829 && (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
4830 && info_ptr
->first_gp_reg_save
> PIC_OFFSET_TABLE_REGNUM
)
4831 info_ptr
->gp_size
= reg_size
* (32 - PIC_OFFSET_TABLE_REGNUM
);
4833 info_ptr
->gp_size
= reg_size
* (32 - info_ptr
->first_gp_reg_save
);
4835 info_ptr
->first_fp_reg_save
= first_fp_reg_to_save ();
4836 info_ptr
->fp_size
= 8 * (64 - info_ptr
->first_fp_reg_save
);
4838 /* Does this function call anything? */
4839 info_ptr
->calls_p
= ! current_function_is_leaf
;
4841 /* Determine if we need to save the link register */
4842 if (regs_ever_live
[LINK_REGISTER_REGNUM
]
4843 || (DEFAULT_ABI
== ABI_AIX
&& profile_flag
)
4844 #ifdef TARGET_RELOCATABLE
4845 || (TARGET_RELOCATABLE
&& (get_pool_size () != 0))
4847 || (info_ptr
->first_fp_reg_save
!= 64
4848 && !FP_SAVE_INLINE (info_ptr
->first_fp_reg_save
))
4849 || (abi
== ABI_V4
&& current_function_calls_alloca
)
4850 || (abi
== ABI_SOLARIS
&& current_function_calls_alloca
)
4851 || info_ptr
->calls_p
)
4853 info_ptr
->lr_save_p
= 1;
4854 regs_ever_live
[LINK_REGISTER_REGNUM
] = 1;
4857 /* Determine if we need to save the condition code registers. */
4858 if (regs_ever_live
[CR2_REGNO
]
4859 || regs_ever_live
[CR3_REGNO
]
4860 || regs_ever_live
[CR4_REGNO
])
4862 info_ptr
->cr_save_p
= 1;
4863 if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
4864 info_ptr
->cr_size
= reg_size
;
4867 /* Determine various sizes */
4868 info_ptr
->reg_size
= reg_size
;
4869 info_ptr
->fixed_size
= RS6000_SAVE_AREA
;
4870 info_ptr
->varargs_size
= RS6000_VARARGS_AREA
;
4871 info_ptr
->vars_size
= RS6000_ALIGN (get_frame_size (), 8);
4872 info_ptr
->parm_size
= RS6000_ALIGN (current_function_outgoing_args_size
, 8);
4873 info_ptr
->save_size
= RS6000_ALIGN (info_ptr
->fp_size
4877 + info_ptr
->toc_size
, 8);
4879 /* Calculate the offsets */
4887 case ABI_AIX_NODESC
:
4888 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
4889 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
4890 info_ptr
->cr_save_offset
= reg_size
; /* first word when 64-bit. */
4891 info_ptr
->lr_save_offset
= 2*reg_size
;
4896 info_ptr
->fp_save_offset
= - info_ptr
->fp_size
;
4897 info_ptr
->gp_save_offset
= info_ptr
->fp_save_offset
- info_ptr
->gp_size
;
4898 info_ptr
->cr_save_offset
= info_ptr
->gp_save_offset
- info_ptr
->cr_size
;
4899 info_ptr
->toc_save_offset
= info_ptr
->cr_save_offset
- info_ptr
->toc_size
;
4900 info_ptr
->lr_save_offset
= reg_size
;
4904 total_raw_size
= (info_ptr
->vars_size
4905 + info_ptr
->parm_size
4906 + info_ptr
->save_size
4907 + info_ptr
->varargs_size
4908 + info_ptr
->fixed_size
);
4910 info_ptr
->total_size
= RS6000_ALIGN (total_raw_size
, ABI_STACK_BOUNDARY
/ BITS_PER_UNIT
);
4912 /* Determine if we need to allocate any stack frame:
4914 For AIX we need to push the stack if a frame pointer is needed (because
4915 the stack might be dynamically adjusted), if we are debugging, if we
4916 make calls, or if the sum of fp_save, gp_save, and local variables
4917 are more than the space needed to save all non-volatile registers:
4918 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved).
4920 For V.4 we don't have the stack cushion that AIX uses, but assume that
4921 the debugger can handle stackless frames. */
4923 if (info_ptr
->calls_p
)
4924 info_ptr
->push_p
= 1;
4926 else if (abi
== ABI_V4
|| abi
== ABI_SOLARIS
)
4927 info_ptr
->push_p
= (total_raw_size
> info_ptr
->fixed_size
4928 || info_ptr
->calls_p
);
4931 info_ptr
->push_p
= (frame_pointer_needed
4932 || write_symbols
!= NO_DEBUG
4933 || ((total_raw_size
- info_ptr
->fixed_size
)
4934 > (TARGET_32BIT
? 220 : 288)));
4936 /* Zero offsets if we're not saving those registers */
4937 if (info_ptr
->fp_size
== 0)
4938 info_ptr
->fp_save_offset
= 0;
4940 if (info_ptr
->gp_size
== 0)
4941 info_ptr
->gp_save_offset
= 0;
4943 if (! info_ptr
->lr_save_p
)
4944 info_ptr
->lr_save_offset
= 0;
4946 if (! info_ptr
->cr_save_p
)
4947 info_ptr
->cr_save_offset
= 0;
4949 if (! info_ptr
->toc_save_p
)
4950 info_ptr
->toc_save_offset
= 0;
4956 debug_stack_info (info
)
4957 rs6000_stack_t
*info
;
4959 const char *abi_string
;
4962 info
= rs6000_stack_info ();
4964 fprintf (stderr
, "\nStack information for function %s:\n",
4965 ((current_function_decl
&& DECL_NAME (current_function_decl
))
4966 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl
))
4971 default: abi_string
= "Unknown"; break;
4972 case ABI_NONE
: abi_string
= "NONE"; break;
4973 case ABI_AIX
: abi_string
= "AIX"; break;
4974 case ABI_AIX_NODESC
: abi_string
= "AIX"; break;
4975 case ABI_V4
: abi_string
= "V.4"; break;
4976 case ABI_SOLARIS
: abi_string
= "Solaris"; break;
4979 fprintf (stderr
, "\tABI = %5s\n", abi_string
);
4981 if (info
->first_gp_reg_save
!= 32)
4982 fprintf (stderr
, "\tfirst_gp_reg_save = %5d\n", info
->first_gp_reg_save
);
4984 if (info
->first_fp_reg_save
!= 64)
4985 fprintf (stderr
, "\tfirst_fp_reg_save = %5d\n", info
->first_fp_reg_save
);
4987 if (info
->lr_save_p
)
4988 fprintf (stderr
, "\tlr_save_p = %5d\n", info
->lr_save_p
);
4990 if (info
->cr_save_p
)
4991 fprintf (stderr
, "\tcr_save_p = %5d\n", info
->cr_save_p
);
4993 if (info
->toc_save_p
)
4994 fprintf (stderr
, "\ttoc_save_p = %5d\n", info
->toc_save_p
);
4997 fprintf (stderr
, "\tpush_p = %5d\n", info
->push_p
);
5000 fprintf (stderr
, "\tcalls_p = %5d\n", info
->calls_p
);
5002 if (info
->gp_save_offset
)
5003 fprintf (stderr
, "\tgp_save_offset = %5d\n", info
->gp_save_offset
);
5005 if (info
->fp_save_offset
)
5006 fprintf (stderr
, "\tfp_save_offset = %5d\n", info
->fp_save_offset
);
5008 if (info
->lr_save_offset
)
5009 fprintf (stderr
, "\tlr_save_offset = %5d\n", info
->lr_save_offset
);
5011 if (info
->cr_save_offset
)
5012 fprintf (stderr
, "\tcr_save_offset = %5d\n", info
->cr_save_offset
);
5014 if (info
->toc_save_offset
)
5015 fprintf (stderr
, "\ttoc_save_offset = %5d\n", info
->toc_save_offset
);
5017 if (info
->varargs_save_offset
)
5018 fprintf (stderr
, "\tvarargs_save_offset = %5d\n", info
->varargs_save_offset
);
5020 if (info
->total_size
)
5021 fprintf (stderr
, "\ttotal_size = %5d\n", info
->total_size
);
5023 if (info
->varargs_size
)
5024 fprintf (stderr
, "\tvarargs_size = %5d\n", info
->varargs_size
);
5026 if (info
->vars_size
)
5027 fprintf (stderr
, "\tvars_size = %5d\n", info
->vars_size
);
5029 if (info
->parm_size
)
5030 fprintf (stderr
, "\tparm_size = %5d\n", info
->parm_size
);
5032 if (info
->fixed_size
)
5033 fprintf (stderr
, "\tfixed_size = %5d\n", info
->fixed_size
);
5036 fprintf (stderr
, "\tgp_size = %5d\n", info
->gp_size
);
5039 fprintf (stderr
, "\tfp_size = %5d\n", info
->fp_size
);
5042 fprintf (stderr
, "\tlr_size = %5d\n", info
->cr_size
);
5045 fprintf (stderr
, "\tcr_size = %5d\n", info
->cr_size
);
5048 fprintf (stderr
, "\ttoc_size = %5d\n", info
->toc_size
);
5050 if (info
->save_size
)
5051 fprintf (stderr
, "\tsave_size = %5d\n", info
->save_size
);
5053 if (info
->reg_size
!= 4)
5054 fprintf (stderr
, "\treg_size = %5d\n", info
->reg_size
);
5056 fprintf (stderr
, "\n");
5059 /* Add a REG_MAYBE_DEAD note to the insn. */
5061 rs6000_maybe_dead (insn
)
5064 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD
,
5069 /* Emit instructions needed to load the TOC register.
5070 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is
5071 a constant pool; or for SVR4 -fpic. */
5074 rs6000_emit_load_toc_table (fromprolog
)
5078 dest
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5082 if ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5085 rtx temp
= (fromprolog
5086 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5087 : gen_reg_rtx (Pmode
));
5089 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_si (temp
)));
5091 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_pic_di (temp
)));
5092 rs6000_maybe_dead (emit_move_insn (dest
, temp
));
5094 else if (flag_pic
== 2)
5097 rtx tempLR
= (fromprolog
5098 ? gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
)
5099 : gen_reg_rtx (Pmode
));
5100 rtx temp0
= (fromprolog
5101 ? gen_rtx_REG (Pmode
, 0)
5102 : gen_reg_rtx (Pmode
));
5105 /* possibly create the toc section */
5106 if (! toc_initialized
)
5109 function_section (current_function_decl
);
5116 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCF", rs6000_pic_labelno
);
5117 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5119 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCL", rs6000_pic_labelno
);
5120 symL
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5122 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (tempLR
,
5124 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5125 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0
, dest
,
5132 static int reload_toc_labelno
= 0;
5134 tocsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
));
5136 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCG", reload_toc_labelno
++);
5137 symF
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5139 rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1b (tempLR
,
5142 rs6000_maybe_dead (emit_move_insn (dest
, tempLR
));
5143 rs6000_maybe_dead (emit_move_insn (temp0
,
5144 gen_rtx_MEM (Pmode
, dest
)));
5146 rs6000_maybe_dead (emit_insn (gen_addsi3 (dest
, temp0
, dest
)));
5148 else if (flag_pic
== 0 && TARGET_MINIMAL_TOC
)
5150 /* This is for AIX code running in non-PIC ELF. */
5153 ASM_GENERATE_INTERNAL_LABEL (buf
, "LCTOC", 1);
5154 realsym
= gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (buf
));
5156 rs6000_maybe_dead (emit_insn (gen_elf_high (dest
, realsym
)));
5157 rs6000_maybe_dead (emit_insn (gen_elf_low (dest
, dest
, realsym
)));
5165 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_si (dest
)));
5167 rs6000_maybe_dead (emit_insn (gen_load_toc_aix_di (dest
)));
5172 get_TOC_alias_set ()
5174 static int set
= -1;
5176 set
= new_alias_set ();
5180 /* This retuns nonzero if the current function uses the TOC. This is
5181 determined by the presence of (unspec ... 7), which is generated by
5182 the various load_toc_* patterns. */
5188 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
5191 rtx pat
= PATTERN (insn
);
5194 if (GET_CODE (pat
) == PARALLEL
)
5195 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
5196 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == UNSPEC
5197 && XINT (XVECEXP (PATTERN (insn
), 0, i
), 1) == 7)
5204 create_TOC_reference(symbol
)
5207 return gen_rtx_PLUS (Pmode
,
5208 gen_rtx_REG (Pmode
, TOC_REGISTER
),
5209 gen_rtx_CONST (Pmode
,
5210 gen_rtx_MINUS (Pmode
, symbol
,
5211 gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (toc_label_name
)))));
5215 /* __throw will restore its own return address to be the same as the
5216 return address of the function that the throw is being made to.
5217 This is unfortunate, because we want to check the original
5218 return address to see if we need to restore the TOC.
5219 So we have to squirrel it away here.
5220 This is used only in compiling __throw and __rethrow.
5222 Most of this code should be removed by CSE. */
5223 static rtx insn_after_throw
;
5225 /* This does the saving... */
5227 rs6000_aix_emit_builtin_unwind_init ()
5230 rtx stack_top
= gen_reg_rtx (Pmode
);
5231 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5233 insn_after_throw
= gen_reg_rtx (SImode
);
5235 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5236 emit_move_insn (stack_top
, mem
);
5238 mem
= gen_rtx_MEM (Pmode
,
5239 gen_rtx_PLUS (Pmode
, stack_top
,
5240 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5241 emit_move_insn (opcode_addr
, mem
);
5242 emit_move_insn (insn_after_throw
, gen_rtx_MEM (SImode
, opcode_addr
));
5245 /* Emit insns to _restore_ the TOC register, at runtime (specifically in _eh.o).
5248 The idea is that on AIX, function calls look like this:
5249 bl somefunction-trampoline
5253 somefunction-trampoline:
5255 ... load function address in the count register ...
5257 or like this, if the linker determines that this is not a cross-module call
5258 and so the TOC need not be restored:
5261 or like this, if the compiler could determine that this is not a
5264 now, the tricky bit here is that register 2 is saved and restored
5265 by the _linker_, so we can't readily generate debugging information
5266 for it. So we need to go back up the call chain looking at the
5267 insns at return addresses to see which calls saved the TOC register
5268 and so see where it gets restored from.
5270 Oh, and all this gets done in RTL inside the eh_epilogue pattern,
5271 just before the actual epilogue.
5273 On the bright side, this incurs no space or time overhead unless an
5274 exception is thrown, except for the extra code in libgcc.a.
5276 The parameter STACKSIZE is a register containing (at runtime)
5277 the amount to be popped off the stack in addition to the stack frame
5278 of this routine (which will be __throw or __rethrow, and so is
5279 guaranteed to have a stack frame). */
5281 rs6000_emit_eh_toc_restore (stacksize
)
5285 rtx bottom_of_stack
= gen_reg_rtx (Pmode
);
5286 rtx tocompare
= gen_reg_rtx (SImode
);
5287 rtx opcode
= gen_reg_rtx (SImode
);
5288 rtx opcode_addr
= gen_reg_rtx (Pmode
);
5290 rtx loop_start
= gen_label_rtx ();
5291 rtx no_toc_restore_needed
= gen_label_rtx ();
5292 rtx loop_exit
= gen_label_rtx ();
5294 mem
= gen_rtx_MEM (Pmode
, hard_frame_pointer_rtx
);
5295 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5296 emit_move_insn (bottom_of_stack
, mem
);
5298 top_of_stack
= expand_binop (Pmode
, add_optab
,
5299 bottom_of_stack
, stacksize
,
5300 NULL_RTX
, 1, OPTAB_WIDEN
);
5302 emit_move_insn (tocompare
,
5303 GEN_INT (trunc_int_for_mode (TARGET_32BIT
5305 : 0xE8410028, SImode
)));
5307 if (insn_after_throw
== NULL_RTX
)
5309 emit_move_insn (opcode
, insn_after_throw
);
5311 emit_note (NULL_PTR
, NOTE_INSN_LOOP_BEG
);
5312 emit_label (loop_start
);
5314 do_compare_rtx_and_jump (opcode
, tocompare
, NE
, 1,
5315 SImode
, NULL_RTX
, 0, NULL_RTX
,
5316 no_toc_restore_needed
);
5318 mem
= gen_rtx_MEM (Pmode
,
5319 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5320 GEN_INT (5 * GET_MODE_SIZE (Pmode
))));
5321 emit_move_insn (gen_rtx_REG (Pmode
, 2), mem
);
5323 emit_label (no_toc_restore_needed
);
5324 do_compare_rtx_and_jump (top_of_stack
, bottom_of_stack
, EQ
, 1,
5325 Pmode
, NULL_RTX
, 0, NULL_RTX
,
5328 mem
= gen_rtx_MEM (Pmode
, bottom_of_stack
);
5329 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5330 emit_move_insn (bottom_of_stack
, mem
);
5332 mem
= gen_rtx_MEM (Pmode
,
5333 gen_rtx_PLUS (Pmode
, bottom_of_stack
,
5334 GEN_INT (2 * GET_MODE_SIZE (Pmode
))));
5335 emit_move_insn (opcode_addr
, mem
);
5336 emit_move_insn (opcode
, gen_rtx_MEM (SImode
, opcode_addr
));
5338 emit_note (NULL_PTR
, NOTE_INSN_LOOP_CONT
);
5339 emit_jump (loop_start
);
5340 emit_note (NULL_PTR
, NOTE_INSN_LOOP_END
);
5341 emit_label (loop_exit
);
5343 #endif /* TARGET_AIX */
5345 /* This ties together stack memory
5346 (MEM with an alias set of rs6000_sr_alias_set)
5347 and the change to the stack pointer. */
5349 rs6000_emit_stack_tie ()
5352 mem
= gen_rtx_MEM (BLKmode
, gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
));
5353 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5354 emit_insn (gen_stack_tie (mem
));
5357 /* Emit the correct code for allocating stack space, as insns.
5358 If COPY_R12, make sure a copy of the old frame is left in r12.
5359 The generated code may use hard register 0 as a temporary. */
5362 rs6000_emit_allocate_stack (size
, copy_r12
)
5367 rtx stack_reg
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5368 rtx tmp_reg
= gen_rtx_REG (Pmode
, 0);
5369 rtx todec
= GEN_INT (-size
);
5371 if (current_function_limit_stack
)
5373 if (REG_P (stack_limit_rtx
)
5374 && REGNO (stack_limit_rtx
) > 1
5375 && REGNO (stack_limit_rtx
) <= 31)
5377 emit_insn (Pmode
== SImode
5378 ? gen_addsi3 (tmp_reg
,
5381 : gen_adddi3 (tmp_reg
,
5385 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5388 else if (GET_CODE (stack_limit_rtx
) == SYMBOL_REF
5390 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5392 rtx toload
= gen_rtx_CONST (VOIDmode
,
5393 gen_rtx_PLUS (Pmode
,
5397 emit_insn (gen_elf_high (tmp_reg
, toload
));
5398 emit_insn (gen_elf_low (tmp_reg
, tmp_reg
, toload
));
5399 emit_insn (gen_cond_trap (LTU
, stack_reg
, tmp_reg
,
5403 warning ("stack limit expression is not supported");
5406 if (copy_r12
|| ! TARGET_UPDATE
)
5407 emit_move_insn (gen_rtx_REG (Pmode
, 12), stack_reg
);
5413 /* Need a note here so that try_split doesn't get confused. */
5414 if (get_last_insn() == NULL_RTX
)
5415 emit_note (0, NOTE_INSN_DELETED
);
5416 insn
= emit_move_insn (tmp_reg
, todec
);
5417 try_split (PATTERN (insn
), insn
, 0);
5421 if (Pmode
== SImode
)
5422 insn
= emit_insn (gen_movsi_update (stack_reg
, stack_reg
,
5425 insn
= emit_insn (gen_movdi_update (stack_reg
, stack_reg
,
5430 if (Pmode
== SImode
)
5431 insn
= emit_insn (gen_addsi3 (stack_reg
, stack_reg
, todec
));
5433 insn
= emit_insn (gen_adddi3 (stack_reg
, stack_reg
, todec
));
5434 emit_move_insn (gen_rtx_MEM (Pmode
, stack_reg
),
5435 gen_rtx_REG (Pmode
, 12));
5438 RTX_FRAME_RELATED_P (insn
) = 1;
5440 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5441 gen_rtx_SET (VOIDmode
, stack_reg
,
5442 gen_rtx_PLUS (Pmode
, stack_reg
,
5447 /* Add to 'insn' a note which is PATTERN (INSN) but with REG replaced with
5448 (plus:P (reg 1) VAL), and with REG2 replaced with RREG if REG2 is not
5450 It would be nice if dwarf2out_frame_debug_expr could deduce these
5451 equivalences by itself so it wasn't necessary to hold its hand so much. */
5454 rs6000_frame_related (insn
, reg
, val
, reg2
, rreg
)
5463 real
= copy_rtx (PATTERN (insn
));
5465 real
= replace_rtx (real
, reg
,
5466 gen_rtx_PLUS (Pmode
, gen_rtx_REG (Pmode
,
5467 STACK_POINTER_REGNUM
),
5470 /* We expect that 'real' is either a SET or a PARALLEL containing
5471 SETs (and possibly other stuff). In a PARALLEL, all the SETs
5472 are important so they all have to be marked RTX_FRAME_RELATED_P. */
5474 if (GET_CODE (real
) == SET
)
5478 temp
= simplify_rtx (SET_SRC (set
));
5480 SET_SRC (set
) = temp
;
5481 temp
= simplify_rtx (SET_DEST (set
));
5483 SET_DEST (set
) = temp
;
5484 if (GET_CODE (SET_DEST (set
)) == MEM
)
5486 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5488 XEXP (SET_DEST (set
), 0) = temp
;
5491 else if (GET_CODE (real
) == PARALLEL
)
5494 for (i
= 0; i
< XVECLEN (real
, 0); i
++)
5495 if (GET_CODE (XVECEXP (real
, 0, i
)) == SET
)
5497 rtx set
= XVECEXP (real
, 0, i
);
5499 temp
= simplify_rtx (SET_SRC (set
));
5501 SET_SRC (set
) = temp
;
5502 temp
= simplify_rtx (SET_DEST (set
));
5504 SET_DEST (set
) = temp
;
5505 if (GET_CODE (SET_DEST (set
)) == MEM
)
5507 temp
= simplify_rtx (XEXP (SET_DEST (set
), 0));
5509 XEXP (SET_DEST (set
), 0) = temp
;
5511 RTX_FRAME_RELATED_P (set
) = 1;
5517 if (reg2
!= NULL_RTX
)
5518 real
= replace_rtx (real
, reg2
, rreg
);
5520 RTX_FRAME_RELATED_P (insn
) = 1;
5521 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR
,
5526 /* Emit function prologue as insns. */
5529 rs6000_emit_prologue()
5531 rs6000_stack_t
*info
= rs6000_stack_info ();
5532 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
5533 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5534 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, STACK_POINTER_REGNUM
);
5535 rtx frame_ptr_rtx
= gen_rtx_REG (Pmode
, 12);
5536 rtx frame_reg_rtx
= sp_reg_rtx
;
5537 rtx cr_save_rtx
= NULL
;
5539 int saving_FPRs_inline
;
5540 int using_store_multiple
;
5541 HOST_WIDE_INT sp_offset
= 0;
5543 using_store_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
5544 && info
->first_gp_reg_save
< 31);
5545 saving_FPRs_inline
= (info
->first_fp_reg_save
== 64
5546 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
5548 /* For V.4, update stack before we do any saving and set back pointer. */
5549 if (info
->push_p
&& (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
))
5551 if (info
->total_size
< 32767)
5552 sp_offset
= info
->total_size
;
5554 frame_reg_rtx
= frame_ptr_rtx
;
5555 rs6000_emit_allocate_stack (info
->total_size
,
5556 (frame_reg_rtx
!= sp_reg_rtx
5559 || info
->first_fp_reg_save
< 64
5560 || info
->first_gp_reg_save
< 32
5562 if (frame_reg_rtx
!= sp_reg_rtx
)
5563 rs6000_emit_stack_tie ();
5566 /* If we use the link register, get it into r0. */
5567 if (info
->lr_save_p
)
5568 emit_move_insn (gen_rtx_REG (Pmode
, 0),
5569 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5571 /* If we need to save CR, put it into r12. */
5572 if (info
->cr_save_p
&& frame_reg_rtx
!= frame_ptr_rtx
)
5574 cr_save_rtx
= gen_rtx_REG (SImode
, 12);
5575 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
5578 /* Do any required saving of fpr's. If only one or two to save, do it
5579 ourself. Otherwise, call function. */
5580 if (saving_FPRs_inline
)
5583 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5584 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
5585 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
5588 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5589 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5590 GEN_INT (info
->fp_save_offset
5593 mem
= gen_rtx_MEM (DFmode
, addr
);
5594 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5596 insn
= emit_move_insn (mem
, reg
);
5597 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5598 NULL_RTX
, NULL_RTX
);
5601 else if (info
->first_fp_reg_save
!= 64)
5605 const char *alloc_rname
;
5607 p
= rtvec_alloc (2 + 64 - info
->first_fp_reg_save
);
5609 RTVEC_ELT (p
, 0) = gen_rtx_CLOBBER (VOIDmode
,
5611 LINK_REGISTER_REGNUM
));
5612 sprintf (rname
, "%s%d%s", SAVE_FP_PREFIX
,
5613 info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
);
5614 alloc_rname
= ggc_strdup (rname
);
5615 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
5616 gen_rtx_SYMBOL_REF (Pmode
,
5618 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5621 reg
= gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
);
5622 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5623 GEN_INT (info
->fp_save_offset
5624 + sp_offset
+ 8*i
));
5625 mem
= gen_rtx_MEM (DFmode
, addr
);
5626 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5628 RTVEC_ELT (p
, i
+ 2) = gen_rtx_SET (VOIDmode
, mem
, reg
);
5630 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
5631 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5632 NULL_RTX
, NULL_RTX
);
5635 /* Save GPRs. This is done as a PARALLEL if we are using
5636 the store-multiple instructions. */
5637 if (using_store_multiple
)
5641 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
5642 dwarfp
= rtvec_alloc (32 - info
->first_gp_reg_save
);
5643 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
5646 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
5647 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5648 GEN_INT (info
->gp_save_offset
5651 mem
= gen_rtx_MEM (reg_mode
, addr
);
5652 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5654 RTVEC_ELT (p
, i
) = gen_rtx_SET (VOIDmode
, mem
, reg
);
5656 insn
= emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
5657 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5658 NULL_RTX
, NULL_RTX
);
5663 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
5664 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
5665 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
5666 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
5667 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5671 reg
= gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
);
5672 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5673 GEN_INT (info
->gp_save_offset
5676 mem
= gen_rtx_MEM (reg_mode
, addr
);
5677 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5679 insn
= emit_move_insn (mem
, reg
);
5680 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5681 NULL_RTX
, NULL_RTX
);
5685 /* Save lr if we used it. */
5686 if (info
->lr_save_p
)
5688 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5689 GEN_INT (info
->lr_save_offset
+ sp_offset
));
5690 rtx reg
= gen_rtx_REG (Pmode
, 0);
5691 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
5692 /* This should not be of rs6000_sr_alias_set, because of
5693 __builtin_return_address. */
5695 insn
= emit_move_insn (mem
, reg
);
5696 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5697 reg
, gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5700 /* Save CR if we use any that must be preserved. */
5701 if (info
->cr_save_p
)
5703 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5704 GEN_INT (info
->cr_save_offset
+ sp_offset
));
5705 rtx mem
= gen_rtx_MEM (SImode
, addr
);
5706 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5708 /* If r12 was used to hold the original sp, copy cr into r0 now
5710 if (REGNO (frame_reg_rtx
) == 12)
5712 cr_save_rtx
= gen_rtx_REG (SImode
, 0);
5713 emit_insn (gen_movesi_from_cr (cr_save_rtx
));
5715 insn
= emit_move_insn (mem
, cr_save_rtx
);
5717 /* Now, there's no way that dwarf2out_frame_debug_expr is going
5718 to understand '(unspec:SI [(reg:CC 68) ...] 19)'. But that's
5719 OK. All we have to do is specify that _one_ condition code
5720 register is saved in this stack slot. The thrower's epilogue
5721 will then restore all the call-saved registers. */
5722 rs6000_frame_related (insn
, frame_ptr_rtx
, info
->total_size
,
5723 cr_save_rtx
, gen_rtx_REG (SImode
, CR0_REGNO
));
5726 /* Update stack and set back pointer unless this is V.4,
5727 for which it was done previously. */
5728 if (info
->push_p
&& DEFAULT_ABI
!= ABI_V4
&& DEFAULT_ABI
!= ABI_SOLARIS
)
5729 rs6000_emit_allocate_stack (info
->total_size
, FALSE
);
5731 /* Set frame pointer, if needed. */
5732 if (frame_pointer_needed
)
5734 insn
= emit_move_insn (gen_rtx_REG (reg_mode
, FRAME_POINTER_REGNUM
),
5736 RTX_FRAME_RELATED_P (insn
) = 1;
5739 /* If we are using PIC_OFFSET_TABLE_REGNUM, we need to set it up. */
5740 if ((TARGET_TOC
&& TARGET_MINIMAL_TOC
&& get_pool_size () != 0)
5741 || ((DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5742 && flag_pic
== 1 && regs_ever_live
[PIC_OFFSET_TABLE_REGNUM
]))
5744 /* If emit_load_toc_table will use the link register, we need to save
5745 it. We use R11 for this purpose because emit_load_toc_table
5746 can use register 0. This allows us to use a plain 'blr' to return
5747 from the procedure more often. */
5748 int save_LR_around_toc_setup
= (TARGET_ELF
&& flag_pic
!= 0 &&
5750 if (save_LR_around_toc_setup
)
5751 emit_move_insn (gen_rtx_REG (Pmode
, 11),
5752 gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
));
5754 rs6000_emit_load_toc_table (TRUE
);
5756 if (save_LR_around_toc_setup
)
5757 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
5758 gen_rtx_REG (Pmode
, 11));
5763 /* Write function prologue. */
5765 output_prolog (file
, size
)
5767 int size ATTRIBUTE_UNUSED
;
5769 rs6000_stack_t
*info
= rs6000_stack_info ();
5771 if (TARGET_DEBUG_STACK
)
5772 debug_stack_info (info
);
5774 /* Write .extern for any function we will call to save and restore fp
5776 if (info
->first_fp_reg_save
< 64 && !FP_SAVE_INLINE (info
->first_fp_reg_save
))
5777 fprintf (file
, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
5778 SAVE_FP_PREFIX
, info
->first_fp_reg_save
- 32, SAVE_FP_SUFFIX
,
5779 RESTORE_FP_PREFIX
, info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
5781 /* Write .extern for AIX common mode routines, if needed. */
5782 if (! TARGET_POWER
&& ! TARGET_POWERPC
&& ! common_mode_defined
)
5784 fputs ("\t.extern __mulh\n", file
);
5785 fputs ("\t.extern __mull\n", file
);
5786 fputs ("\t.extern __divss\n", file
);
5787 fputs ("\t.extern __divus\n", file
);
5788 fputs ("\t.extern __quoss\n", file
);
5789 fputs ("\t.extern __quous\n", file
);
5790 common_mode_defined
= 1;
5793 if (! HAVE_prologue
)
5797 /* A NOTE_INSN_DELETED is supposed to be at the start
5798 and end of the "toplevel" insn chain. */
5799 emit_note (0, NOTE_INSN_DELETED
);
5800 rs6000_emit_prologue ();
5801 emit_note (0, NOTE_INSN_DELETED
);
5803 if (TARGET_DEBUG_STACK
)
5804 debug_rtx_list (get_insns(), 100);
5805 final (get_insns(), file
, FALSE
, FALSE
);
5809 rs6000_pic_labelno
++;
5812 /* Emit function epilogue as insns.
5814 At present, dwarf2out_frame_debug_expr doesn't understand
5815 register restores, so we don't bother setting RTX_FRAME_RELATED_P
5816 anywhere in the epilogue. Most of the insns below would in any case
5817 need special notes to explain where r11 is in relation to the stack. */
5820 rs6000_emit_epilogue(sibcall
)
5823 rs6000_stack_t
*info
;
5824 int restoring_FPRs_inline
;
5825 int using_load_multiple
;
5826 int using_mfcr_multiple
;
5827 int use_backchain_to_restore_sp
;
5829 rtx sp_reg_rtx
= gen_rtx_REG (Pmode
, 1);
5830 rtx frame_reg_rtx
= sp_reg_rtx
;
5831 enum machine_mode reg_mode
= TARGET_POWERPC64
? DImode
: SImode
;
5832 int reg_size
= TARGET_POWERPC64
? 8 : 4;
5835 info
= rs6000_stack_info ();
5836 using_load_multiple
= (TARGET_MULTIPLE
&& ! TARGET_POWERPC64
5837 && info
->first_gp_reg_save
< 31);
5838 restoring_FPRs_inline
= (sibcall
5839 || info
->first_fp_reg_save
== 64
5840 || FP_SAVE_INLINE (info
->first_fp_reg_save
));
5841 use_backchain_to_restore_sp
= (frame_pointer_needed
5842 || current_function_calls_alloca
5843 || info
->total_size
> 32767);
5844 using_mfcr_multiple
= (rs6000_cpu
== PROCESSOR_PPC601
5845 || rs6000_cpu
== PROCESSOR_PPC603
5846 || rs6000_cpu
== PROCESSOR_PPC750
5849 /* If we have a frame pointer, a call to alloca, or a large stack
5850 frame, restore the old stack pointer using the backchain. Otherwise,
5851 we know what size to update it with. */
5852 if (use_backchain_to_restore_sp
)
5854 /* Under V.4, don't reset the stack pointer until after we're done
5855 loading the saved registers. */
5856 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5857 frame_reg_rtx
= gen_rtx_REG (Pmode
, 11);
5859 emit_move_insn (frame_reg_rtx
,
5860 gen_rtx_MEM (Pmode
, sp_reg_rtx
));
5863 else if (info
->push_p
)
5865 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5866 sp_offset
= info
->total_size
;
5869 emit_insn (TARGET_32BIT
5870 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
5871 GEN_INT (info
->total_size
))
5872 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
5873 GEN_INT (info
->total_size
)));
5877 /* Get the old lr if we saved it. */
5878 if (info
->lr_save_p
)
5880 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5881 GEN_INT (info
->lr_save_offset
+ sp_offset
));
5882 rtx mem
= gen_rtx_MEM (Pmode
, addr
);
5883 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5885 emit_move_insn (gen_rtx_REG (Pmode
, 0), mem
);
5888 /* Get the old cr if we saved it. */
5889 if (info
->cr_save_p
)
5891 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5892 GEN_INT (info
->cr_save_offset
+ sp_offset
));
5893 rtx mem
= gen_rtx_MEM (SImode
, addr
);
5894 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5896 emit_move_insn (gen_rtx_REG (SImode
, 12), mem
);
5899 /* Set LR here to try to overlap restores below. */
5900 if (info
->lr_save_p
)
5901 emit_move_insn (gen_rtx_REG (Pmode
, LINK_REGISTER_REGNUM
),
5902 gen_rtx_REG (Pmode
, 0));
5905 /* Restore GPRs. This is done as a PARALLEL if we are using
5906 the load-multiple instructions. */
5907 if (using_load_multiple
)
5910 p
= rtvec_alloc (32 - info
->first_gp_reg_save
);
5911 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
5913 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5914 GEN_INT (info
->gp_save_offset
5917 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
5918 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5921 gen_rtx_SET (VOIDmode
,
5922 gen_rtx_REG (reg_mode
, info
->first_gp_reg_save
+ i
),
5925 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
5928 for (i
= 0; i
< 32 - info
->first_gp_reg_save
; i
++)
5929 if ((regs_ever_live
[info
->first_gp_reg_save
+i
]
5930 && ! call_used_regs
[info
->first_gp_reg_save
+i
])
5931 || (i
+info
->first_gp_reg_save
== PIC_OFFSET_TABLE_REGNUM
5932 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
5935 rtx addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5936 GEN_INT (info
->gp_save_offset
5939 rtx mem
= gen_rtx_MEM (reg_mode
, addr
);
5940 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5942 emit_move_insn (gen_rtx_REG (reg_mode
,
5943 info
->first_gp_reg_save
+ i
),
5947 /* Restore fpr's if we need to do it without calling a function. */
5948 if (restoring_FPRs_inline
)
5949 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
5950 if ((regs_ever_live
[info
->first_fp_reg_save
+i
]
5951 && ! call_used_regs
[info
->first_fp_reg_save
+i
]))
5954 addr
= gen_rtx_PLUS (Pmode
, frame_reg_rtx
,
5955 GEN_INT (info
->fp_save_offset
5958 mem
= gen_rtx_MEM (DFmode
, addr
);
5959 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
5961 emit_move_insn (gen_rtx_REG (DFmode
,
5962 info
->first_fp_reg_save
+ i
),
5966 /* If we saved cr, restore it here. Just those that were used. */
5967 if (info
->cr_save_p
)
5969 rtx r12_rtx
= gen_rtx_REG (SImode
, 12);
5972 if (using_mfcr_multiple
)
5974 for (i
= 0; i
< 8; i
++)
5975 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
5981 if (using_mfcr_multiple
&& count
> 1)
5986 p
= rtvec_alloc (count
);
5989 for (i
= 0; i
< 8; i
++)
5990 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
5992 rtvec r
= rtvec_alloc (2);
5993 RTVEC_ELT (r
, 0) = r12_rtx
;
5994 RTVEC_ELT (r
, 1) = GEN_INT (1 << (7-i
));
5995 RTVEC_ELT (p
, ndx
) =
5996 gen_rtx_SET (VOIDmode
, gen_rtx_REG (CCmode
, CR0_REGNO
+i
),
5997 gen_rtx_UNSPEC (CCmode
, r
, 20));
6000 emit_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6005 for (i
= 0; i
< 8; i
++)
6006 if (regs_ever_live
[CR0_REGNO
+i
] && ! call_used_regs
[CR0_REGNO
+i
])
6008 emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode
,
6014 /* If this is V.4, unwind the stack pointer after all of the loads
6015 have been done. We need to emit a block here so that sched
6016 doesn't decide to move the sp change before the register restores
6017 (which may not have any obvious dependency on the stack). This
6018 doesn't hurt performance, because there is no scheduling that can
6019 be done after this point. */
6020 if (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
6022 if (frame_reg_rtx
!= sp_reg_rtx
)
6023 rs6000_emit_stack_tie ();
6025 if (use_backchain_to_restore_sp
)
6027 emit_move_insn (sp_reg_rtx
, frame_reg_rtx
);
6029 else if (sp_offset
!= 0)
6031 emit_insn (Pmode
== SImode
6032 ? gen_addsi3 (sp_reg_rtx
, sp_reg_rtx
,
6033 GEN_INT (sp_offset
))
6034 : gen_adddi3 (sp_reg_rtx
, sp_reg_rtx
,
6035 GEN_INT (sp_offset
)));
6042 if (! restoring_FPRs_inline
)
6043 p
= rtvec_alloc (3 + 64 - info
->first_fp_reg_save
);
6045 p
= rtvec_alloc (2);
6047 RTVEC_ELT (p
, 0) = gen_rtx_RETURN (VOIDmode
);
6048 RTVEC_ELT (p
, 1) = gen_rtx_USE (VOIDmode
,
6050 LINK_REGISTER_REGNUM
));
6052 /* If we have to restore more than two FP registers, branch to the
6053 restore function. It will return to our caller. */
6054 if (! restoring_FPRs_inline
)
6058 const char *alloc_rname
;
6060 sprintf (rname
, "%s%d%s", RESTORE_FP_PREFIX
,
6061 info
->first_fp_reg_save
- 32, RESTORE_FP_SUFFIX
);
6062 alloc_rname
= ggc_strdup (rname
);
6063 RTVEC_ELT (p
, 2) = gen_rtx_USE (VOIDmode
,
6064 gen_rtx_SYMBOL_REF (Pmode
,
6067 for (i
= 0; i
< 64 - info
->first_fp_reg_save
; i
++)
6070 addr
= gen_rtx_PLUS (Pmode
, sp_reg_rtx
,
6071 GEN_INT (info
->fp_save_offset
+ 8*i
));
6072 mem
= gen_rtx_MEM (DFmode
, addr
);
6073 MEM_ALIAS_SET (mem
) = rs6000_sr_alias_set
;
6075 RTVEC_ELT (p
, i
+3) =
6076 gen_rtx_SET (VOIDmode
,
6077 gen_rtx_REG (DFmode
, info
->first_fp_reg_save
+ i
),
6082 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode
, p
));
6086 /* Write function epilogue. */
6089 output_epilog (file
, size
)
6091 int size ATTRIBUTE_UNUSED
;
6093 rs6000_stack_t
*info
= rs6000_stack_info ();
6095 if (! HAVE_epilogue
)
6097 rtx insn
= get_last_insn ();
6098 /* If the last insn was a BARRIER, we don't have to write anything except
6100 if (GET_CODE (insn
) == NOTE
)
6101 insn
= prev_nonnote_insn (insn
);
6102 if (insn
== 0 || GET_CODE (insn
) != BARRIER
)
6104 /* This is slightly ugly, but at least we don't have two
6105 copies of the epilogue-emitting code. */
6108 /* A NOTE_INSN_DELETED is supposed to be at the start
6109 and end of the "toplevel" insn chain. */
6110 emit_note (0, NOTE_INSN_DELETED
);
6111 rs6000_emit_epilogue (FALSE
);
6112 emit_note (0, NOTE_INSN_DELETED
);
6114 if (TARGET_DEBUG_STACK
)
6115 debug_rtx_list (get_insns(), 100);
6116 final (get_insns(), file
, FALSE
, FALSE
);
6121 /* Output a traceback table here. See /usr/include/sys/debug.h for info
6124 We don't output a traceback table if -finhibit-size-directive was
6125 used. The documentation for -finhibit-size-directive reads
6126 ``don't output a @code{.size} assembler directive, or anything
6127 else that would cause trouble if the function is split in the
6128 middle, and the two halves are placed at locations far apart in
6129 memory.'' The traceback table has this property, since it
6130 includes the offset from the start of the function to the
6131 traceback table itself.
6133 System V.4 Powerpc's (and the embedded ABI derived from it) use a
6134 different traceback table. */
6135 if (DEFAULT_ABI
== ABI_AIX
&& ! flag_inhibit_size_directive
)
6137 const char *fname
= XSTR (XEXP (DECL_RTL (current_function_decl
), 0), 0);
6138 int fixed_parms
, float_parms
, parm_info
;
6141 while (*fname
== '.') /* V.4 encodes . in the name */
6144 /* Need label immediately before tbtab, so we can compute its offset
6145 from the function start. */
6148 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6149 ASM_OUTPUT_LABEL (file
, fname
);
6151 /* The .tbtab pseudo-op can only be used for the first eight
6152 expressions, since it can't handle the possibly variable
6153 length fields that follow. However, if you omit the optional
6154 fields, the assembler outputs zeros for all optional fields
6155 anyways, giving each variable length field is minimum length
6156 (as defined in sys/debug.h). Thus we can not use the .tbtab
6157 pseudo-op at all. */
6159 /* An all-zero word flags the start of the tbtab, for debuggers
6160 that have to find it by searching forward from the entry
6161 point or from the current pc. */
6162 fputs ("\t.long 0\n", file
);
6164 /* Tbtab format type. Use format type 0. */
6165 fputs ("\t.byte 0,", file
);
6167 /* Language type. Unfortunately, there doesn't seem to be any
6168 official way to get this info, so we use language_string. C
6169 is 0. C++ is 9. No number defined for Obj-C, so use the
6170 value for C for now. There is no official value for Java,
6171 although IBM appears to be using 13. There is no official value
6172 for Chill, so we've choosen 44 pseudo-randomly. */
6173 if (! strcmp (language_string
, "GNU C")
6174 || ! strcmp (language_string
, "GNU Objective-C"))
6176 else if (! strcmp (language_string
, "GNU F77"))
6178 else if (! strcmp (language_string
, "GNU Ada"))
6180 else if (! strcmp (language_string
, "GNU Pascal"))
6182 else if (! strcmp (language_string
, "GNU C++"))
6184 else if (! strcmp (language_string
, "GNU Java"))
6186 else if (! strcmp (language_string
, "GNU CHILL"))
6190 fprintf (file
, "%d,", i
);
6192 /* 8 single bit fields: global linkage (not set for C extern linkage,
6193 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
6194 from start of procedure stored in tbtab, internal function, function
6195 has controlled storage, function has no toc, function uses fp,
6196 function logs/aborts fp operations. */
6197 /* Assume that fp operations are used if any fp reg must be saved. */
6198 fprintf (file
, "%d,", (1 << 5) | ((info
->first_fp_reg_save
!= 64) << 1));
6200 /* 6 bitfields: function is interrupt handler, name present in
6201 proc table, function calls alloca, on condition directives
6202 (controls stack walks, 3 bits), saves condition reg, saves
6204 /* The `function calls alloca' bit seems to be set whenever reg 31 is
6205 set up as a frame pointer, even when there is no alloca call. */
6206 fprintf (file
, "%d,",
6207 ((1 << 6) | (frame_pointer_needed
<< 5)
6208 | (info
->cr_save_p
<< 1) | (info
->lr_save_p
)));
6210 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
6212 fprintf (file
, "%d,",
6213 (info
->push_p
<< 7) | (64 - info
->first_fp_reg_save
));
6215 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
6216 fprintf (file
, "%d,", (32 - first_reg_to_save ()));
6219 /* Compute the parameter info from the function decl argument
6222 int next_parm_info_bit
;
6224 next_parm_info_bit
= 31;
6229 for (decl
= DECL_ARGUMENTS (current_function_decl
);
6230 decl
; decl
= TREE_CHAIN (decl
))
6232 rtx parameter
= DECL_INCOMING_RTL (decl
);
6233 enum machine_mode mode
= GET_MODE (parameter
);
6235 if (GET_CODE (parameter
) == REG
)
6237 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
6245 else if (mode
== DFmode
)
6250 /* If only one bit will fit, don't or in this entry. */
6251 if (next_parm_info_bit
> 0)
6252 parm_info
|= (bits
<< (next_parm_info_bit
- 1));
6253 next_parm_info_bit
-= 2;
6257 fixed_parms
+= ((GET_MODE_SIZE (mode
)
6258 + (UNITS_PER_WORD
- 1))
6260 next_parm_info_bit
-= 1;
6266 /* Number of fixed point parameters. */
6267 /* This is actually the number of words of fixed point parameters; thus
6268 an 8 byte struct counts as 2; and thus the maximum value is 8. */
6269 fprintf (file
, "%d,", fixed_parms
);
6271 /* 2 bitfields: number of floating point parameters (7 bits), parameters
6273 /* This is actually the number of fp registers that hold parameters;
6274 and thus the maximum value is 13. */
6275 /* Set parameters on stack bit if parameters are not in their original
6276 registers, regardless of whether they are on the stack? Xlc
6277 seems to set the bit when not optimizing. */
6278 fprintf (file
, "%d\n", ((float_parms
<< 1) | (! optimize
)));
6280 /* Optional fields follow. Some are variable length. */
6282 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
6284 /* There is an entry for each parameter in a register, in the order that
6285 they occur in the parameter list. Any intervening arguments on the
6286 stack are ignored. If the list overflows a long (max possible length
6287 34 bits) then completely leave off all elements that don't fit. */
6288 /* Only emit this long if there was at least one parameter. */
6289 if (fixed_parms
|| float_parms
)
6290 fprintf (file
, "\t.long %d\n", parm_info
);
6292 /* Offset from start of code to tb table. */
6293 fputs ("\t.long ", file
);
6294 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LT");
6296 RS6000_OUTPUT_BASENAME (file
, fname
);
6298 assemble_name (file
, fname
);
6302 RS6000_OUTPUT_BASENAME (file
, fname
);
6304 assemble_name (file
, fname
);
6308 /* Interrupt handler mask. */
6309 /* Omit this long, since we never set the interrupt handler bit
6312 /* Number of CTL (controlled storage) anchors. */
6313 /* Omit this long, since the has_ctl bit is never set above. */
6315 /* Displacement into stack of each CTL anchor. */
6316 /* Omit this list of longs, because there are no CTL anchors. */
6318 /* Length of function name. */
6319 fprintf (file
, "\t.short %d\n", (int) strlen (fname
));
6321 /* Function name. */
6322 assemble_string (fname
, strlen (fname
));
6324 /* Register for alloca automatic storage; this is always reg 31.
6325 Only emit this if the alloca bit was set above. */
6326 if (frame_pointer_needed
)
6327 fputs ("\t.byte 31\n", file
);
6331 /* A C compound statement that outputs the assembler code for a thunk function,
6332 used to implement C++ virtual function calls with multiple inheritance. The
6333 thunk acts as a wrapper around a virtual function, adjusting the implicit
6334 object parameter before handing control off to the real function.
6336 First, emit code to add the integer DELTA to the location that contains the
6337 incoming first argument. Assume that this argument contains a pointer, and
6338 is the one used to pass the `this' pointer in C++. This is the incoming
6339 argument *before* the function prologue, e.g. `%o0' on a sparc. The
6340 addition must preserve the values of all other incoming arguments.
6342 After the addition, emit code to jump to FUNCTION, which is a
6343 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
6344 the return address. Hence returning from FUNCTION will return to whoever
6345 called the current `thunk'.
6347 The effect must be as if FUNCTION had been called directly with the adjusted
6348 first argument. This macro is responsible for emitting all of the code for
6349 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
6352 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
6353 extracted from it.) It might possibly be useful on some targets, but
6356 If you do not define this macro, the target-independent code in the C++
6357 frontend will generate a less efficient heavyweight thunk that calls
6358 FUNCTION instead of jumping to it. The generic approach does not support
6362 output_mi_thunk (file
, thunk_fndecl
, delta
, function
)
6364 tree thunk_fndecl ATTRIBUTE_UNUSED
;
6368 const char *this_reg
= reg_names
[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function
))) ? 4 : 3 ];
6371 const char *r0
= reg_names
[0];
6372 const char *toc
= reg_names
[2];
6373 const char *schain
= reg_names
[11];
6374 const char *r12
= reg_names
[12];
6376 static int labelno
= 0;
6378 /* Small constants that can be done by one add instruction */
6379 if (delta
>= -32768 && delta
<= 32767)
6381 if (! TARGET_NEW_MNEMONICS
)
6382 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta
, this_reg
);
6384 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta
);
6387 /* Large constants that can be done by one addis instruction */
6388 else if ((delta
& 0xffff) == 0 && num_insns_constant_wide (delta
) == 1)
6389 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6392 /* 32-bit constants that can be done by an add and addis instruction. */
6393 else if (TARGET_32BIT
|| num_insns_constant_wide (delta
) == 1)
6395 /* Break into two pieces, propagating the sign bit from the low word to
6397 int delta_high
= delta
>> 16;
6398 int delta_low
= delta
& 0xffff;
6399 if ((delta_low
& 0x8000) != 0)
6402 delta_low
= (delta_low
^ 0x8000) - 0x8000; /* sign extend */
6405 asm_fprintf (file
, "\t{cau|addis} %s,%s,%d\n", this_reg
, this_reg
,
6408 if (! TARGET_NEW_MNEMONICS
)
6409 fprintf (file
, "\tcal %s,%d(%s)\n", this_reg
, delta_low
, this_reg
);
6411 fprintf (file
, "\taddi %s,%s,%d\n", this_reg
, this_reg
, delta_low
);
6414 /* 64-bit constants, fixme */
6418 /* Get the prefix in front of the names. */
6419 switch (DEFAULT_ABI
)
6429 case ABI_AIX_NODESC
:
6435 /* If the function is compiled in this module, jump to it directly.
6436 Otherwise, load up its address and jump to it. */
6438 fname
= XSTR (XEXP (DECL_RTL (function
), 0), 0);
6440 if (current_file_function_operand (XEXP (DECL_RTL (function
), 0), VOIDmode
)
6441 && ! lookup_attribute ("longcall",
6442 TYPE_ATTRIBUTES (TREE_TYPE (function
))))
6444 fprintf (file
, "\tb %s", prefix
);
6445 assemble_name (file
, fname
);
6446 if (DEFAULT_ABI
== ABI_V4
&& flag_pic
) fputs ("@local", file
);
6452 switch (DEFAULT_ABI
)
6458 /* Set up a TOC entry for the function. */
6459 ASM_GENERATE_INTERNAL_LABEL (buf
, "Lthunk", labelno
);
6461 ASM_OUTPUT_INTERNAL_LABEL (file
, "Lthunk", labelno
);
6464 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since
6465 there will be only one TOC entry for this function. */
6466 fputs ("\t.tc\t", file
);
6467 assemble_name (file
, buf
);
6468 fputs ("[TC],", file
);
6469 assemble_name (file
, buf
);
6472 asm_fprintf (file
, (TARGET_32BIT
) ? "\t{l|lwz} %s," : "\tld %s", r12
);
6473 assemble_name (file
, buf
);
6474 asm_fprintf (file
, "(%s)\n", reg_names
[2]);
6476 (TARGET_32BIT
) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n",
6480 (TARGET_32BIT
) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n",
6483 asm_fprintf (file
, "\tmtctr %s\n", r0
);
6485 (TARGET_32BIT
) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n",
6488 asm_fprintf (file
, "\tbctr\n");
6491 case ABI_AIX_NODESC
:
6494 fprintf (file
, "\tb %s", prefix
);
6495 assemble_name (file
, fname
);
6496 if (flag_pic
) fputs ("@plt", file
);
6504 /* A quick summary of the various types of 'constant-pool tables'
6507 Target Flags Name One table per
6508 AIX (none) AIX TOC object file
6509 AIX -mfull-toc AIX TOC object file
6510 AIX -mminimal-toc AIX minimal TOC translation unit
6511 SVR4/EABI (none) SVR4 SDATA object file
6512 SVR4/EABI -fpic SVR4 pic object file
6513 SVR4/EABI -fPIC SVR4 PIC translation unit
6514 SVR4/EABI -mrelocatable EABI TOC function
6515 SVR4/EABI -maix AIX TOC object file
6516 SVR4/EABI -maix -mminimal-toc
6517 AIX minimal TOC translation unit
6519 Name Reg. Set by entries contains:
6520 made by addrs? fp? sum?
6522 AIX TOC 2 crt0 as Y option option
6523 AIX minimal TOC 30 prolog gcc Y Y option
6524 SVR4 SDATA 13 crt0 gcc N Y N
6525 SVR4 pic 30 prolog ld Y not yet N
6526 SVR4 PIC 30 prolog gcc Y option option
6527 EABI TOC 30 prolog gcc Y option option
6531 /* Hash table stuff for keeping track of TOC entries. */
6533 struct toc_hash_struct
6535 /* `key' will satisfy CONSTANT_P; in fact, it will satisfy
6536 ASM_OUTPUT_SPECIAL_POOL_ENTRY_P. */
6538 enum machine_mode key_mode
;
6542 static htab_t toc_hash_table
;
6544 /* Hash functions for the hash table. */
6547 rs6000_hash_constant (k
)
6550 unsigned result
= (GET_CODE (k
) << 3) ^ GET_MODE (k
);
6551 const char *format
= GET_RTX_FORMAT (GET_CODE (k
));
6552 int flen
= strlen (format
);
6555 if (GET_CODE (k
) == LABEL_REF
)
6556 return result
* 1231 + X0INT (XEXP (k
, 0), 3);
6558 if (GET_CODE (k
) == CONST_DOUBLE
)
6560 else if (GET_CODE (k
) == CODE_LABEL
)
6565 for (; fidx
< flen
; fidx
++)
6566 switch (format
[fidx
])
6571 const char *str
= XSTR (k
, fidx
);
6573 result
= result
* 613 + len
;
6574 for (i
= 0; i
< len
; i
++)
6575 result
= result
* 613 + (unsigned) str
[i
];
6580 result
= result
* 1231 + rs6000_hash_constant (XEXP (k
, fidx
));
6584 result
= result
* 613 + (unsigned) XINT (k
, fidx
);
6587 if (sizeof (unsigned) >= sizeof (HOST_WIDE_INT
))
6588 result
= result
* 613 + (unsigned) XWINT (k
, fidx
);
6592 for (i
= 0; i
< sizeof(HOST_WIDE_INT
)/sizeof(unsigned); i
++)
6593 result
= result
* 613 + (unsigned) (XWINT (k
, fidx
)
6604 toc_hash_function (hash_entry
)
6605 const void * hash_entry
;
6607 const struct toc_hash_struct
*thc
=
6608 (const struct toc_hash_struct
*) hash_entry
;
6609 return rs6000_hash_constant (thc
->key
) ^ thc
->key_mode
;
6612 /* Compare H1 and H2 for equivalence. */
6615 toc_hash_eq (h1
, h2
)
6619 rtx r1
= ((const struct toc_hash_struct
*) h1
)->key
;
6620 rtx r2
= ((const struct toc_hash_struct
*) h2
)->key
;
6622 if (((const struct toc_hash_struct
*) h1
)->key_mode
6623 != ((const struct toc_hash_struct
*) h2
)->key_mode
)
6626 /* Gotcha: One of these const_doubles will be in memory.
6627 The other may be on the constant-pool chain.
6628 So rtx_equal_p will think they are different... */
6631 if (GET_CODE (r1
) != GET_CODE (r2
)
6632 || GET_MODE (r1
) != GET_MODE (r2
))
6634 if (GET_CODE (r1
) == CONST_DOUBLE
)
6636 int format_len
= strlen (GET_RTX_FORMAT (CONST_DOUBLE
));
6638 for (i
= 2; i
< format_len
; i
++)
6639 if (XWINT (r1
, i
) != XWINT (r2
, i
))
6644 else if (GET_CODE (r1
) == LABEL_REF
)
6645 return (CODE_LABEL_NUMBER (XEXP (r1
, 0))
6646 == CODE_LABEL_NUMBER (XEXP (r2
, 0)));
6648 return rtx_equal_p (r1
, r2
);
6651 /* Mark the hash table-entry HASH_ENTRY. */
6654 toc_hash_mark_entry (hash_slot
, unused
)
6656 void * unused ATTRIBUTE_UNUSED
;
6658 const struct toc_hash_struct
* hash_entry
=
6659 *(const struct toc_hash_struct
**) hash_slot
;
6660 rtx r
= hash_entry
->key
;
6661 ggc_set_mark (hash_entry
);
6662 /* For CODE_LABELS, we don't want to drag in the whole insn chain... */
6663 if (GET_CODE (r
) == LABEL_REF
)
6666 ggc_set_mark (XEXP (r
, 0));
6673 /* Mark all the elements of the TOC hash-table *HT. */
6676 toc_hash_mark_table (vht
)
6681 htab_traverse (*ht
, toc_hash_mark_entry
, (void *)0);
6684 /* Output a TOC entry. We derive the entry name from what is
6688 output_toc (file
, x
, labelno
, mode
)
6692 enum machine_mode mode
;
6695 const char *name
= buf
;
6696 const char *real_name
;
6703 /* When the linker won't eliminate them, don't output duplicate
6704 TOC entries (this happens on AIX if there is any kind of TOC,
6705 and on SVR4 under -fPIC or -mrelocatable). */
6708 struct toc_hash_struct
*h
;
6711 h
= ggc_alloc (sizeof (*h
));
6714 h
->labelno
= labelno
;
6716 found
= htab_find_slot (toc_hash_table
, h
, 1);
6719 else /* This is indeed a duplicate.
6720 Set this label equal to that label. */
6722 fputs ("\t.set ", file
);
6723 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
6724 fprintf (file
, "%d,", labelno
);
6725 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file
, "LC");
6726 fprintf (file
, "%d\n", ((*(const struct toc_hash_struct
**)
6732 /* If we're going to put a double constant in the TOC, make sure it's
6733 aligned properly when strict alignment is on. */
6734 if (GET_CODE (x
) == CONST_DOUBLE
6736 && GET_MODE_BITSIZE (mode
) >= 64
6737 && ! (TARGET_NO_FP_IN_TOC
&& ! TARGET_MINIMAL_TOC
)) {
6738 ASM_OUTPUT_ALIGN (file
, 3);
6741 ASM_OUTPUT_INTERNAL_LABEL (file
, "LC", labelno
);
6743 /* Handle FP constants specially. Note that if we have a minimal
6744 TOC, things we put here aren't actually in the TOC, so we can allow
6746 if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
6751 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
6752 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
6756 if (TARGET_MINIMAL_TOC
)
6757 fprintf (file
, "\t.llong 0x%lx%08lx\n", k
[0], k
[1]);
6759 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n",
6760 k
[0], k
[1], k
[0] & 0xffffffff, k
[1] & 0xffffffff);
6765 if (TARGET_MINIMAL_TOC
)
6766 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n", k
[0], k
[1]);
6768 fprintf (file
, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n",
6769 k
[0], k
[1], k
[0], k
[1]);
6773 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
)
6778 REAL_VALUE_FROM_CONST_DOUBLE (rv
, x
);
6779 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
6783 if (TARGET_MINIMAL_TOC
)
6784 fprintf (file
, "\t.llong 0x%lx00000000\n", l
);
6786 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx00000000\n", l
, l
);
6791 if (TARGET_MINIMAL_TOC
)
6792 fprintf (file
, "\t.long 0x%lx\n", l
);
6794 fprintf (file
, "\t.tc FS_%lx[TC],0x%lx\n", l
, l
);
6798 else if (GET_MODE (x
) == VOIDmode
6799 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
6801 unsigned HOST_WIDE_INT low
;
6804 if (GET_CODE (x
) == CONST_DOUBLE
)
6806 low
= CONST_DOUBLE_LOW (x
);
6807 high
= CONST_DOUBLE_HIGH (x
);
6810 #if HOST_BITS_PER_WIDE_INT == 32
6813 high
= (low
& 0x80000000) ? ~0 : 0;
6817 low
= INTVAL (x
) & 0xffffffff;
6818 high
= (HOST_WIDE_INT
) INTVAL (x
) >> 32;
6822 /* TOC entries are always Pmode-sized, but since this
6823 is a bigendian machine then if we're putting smaller
6824 integer constants in the TOC we have to pad them.
6825 (This is still a win over putting the constants in
6826 a separate constant pool, because then we'd have
6827 to have both a TOC entry _and_ the actual constant.) */
6828 if (POINTER_SIZE
< GET_MODE_BITSIZE (mode
))
6829 abort ();/* It would be easy to make this work, but it doesn't now. */
6831 lshift_double (low
, high
, POINTER_SIZE
- GET_MODE_BITSIZE (mode
),
6832 POINTER_SIZE
, &low
, &high
, 0);
6836 if (TARGET_MINIMAL_TOC
)
6837 fprintf (file
, "\t.llong 0x%lx%08lx\n", (long)high
, (long)low
);
6839 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n",
6840 (long)high
, (long)low
, (long)high
, (long)low
);
6845 if (TARGET_MINIMAL_TOC
)
6846 fprintf (file
, "\t.long 0x%lx\n\t.long 0x%lx\n",
6847 (long)high
, (long)low
);
6849 fprintf (file
, "\t.tc ID_%lx_%lx[TC],0x%lx,0x%lx\n",
6850 (long)high
, (long)low
, (long)high
, (long)low
);
6855 if (GET_CODE (x
) == CONST
)
6857 base
= XEXP (XEXP (x
, 0), 0);
6858 offset
= INTVAL (XEXP (XEXP (x
, 0), 1));
6861 if (GET_CODE (base
) == SYMBOL_REF
)
6862 name
= XSTR (base
, 0);
6863 else if (GET_CODE (base
) == LABEL_REF
)
6864 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (XEXP (base
, 0)));
6865 else if (GET_CODE (base
) == CODE_LABEL
)
6866 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (base
));
6870 STRIP_NAME_ENCODING (real_name
, name
);
6871 if (TARGET_MINIMAL_TOC
)
6872 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
6875 fprintf (file
, "\t.tc %s", real_name
);
6878 fprintf (file
, ".N%d", - offset
);
6880 fprintf (file
, ".P%d", offset
);
6882 fputs ("[TC],", file
);
6885 /* Currently C++ toc references to vtables can be emitted before it
6886 is decided whether the vtable is public or private. If this is
6887 the case, then the linker will eventually complain that there is
6888 a TOC reference to an unknown section. Thus, for vtables only,
6889 we emit the TOC reference to reference the symbol and not the
6891 if (strncmp ("_vt.", name
, 4) == 0)
6893 RS6000_OUTPUT_BASENAME (file
, name
);
6895 fprintf (file
, "%d", offset
);
6896 else if (offset
> 0)
6897 fprintf (file
, "+%d", offset
);
6900 output_addr_const (file
, x
);
6904 /* Output an assembler pseudo-op to write an ASCII string of N characters
6905 starting at P to FILE.
6907 On the RS/6000, we have to do this using the .byte operation and
6908 write out special characters outside the quoted string.
6909 Also, the assembler is broken; very long strings are truncated,
6910 so we must artificially break them up early. */
6913 output_ascii (file
, p
, n
)
6919 int i
, count_string
;
6920 const char *for_string
= "\t.byte \"";
6921 const char *for_decimal
= "\t.byte ";
6922 const char *to_close
= NULL
;
6925 for (i
= 0; i
< n
; i
++)
6928 if (c
>= ' ' && c
< 0177)
6931 fputs (for_string
, file
);
6934 /* Write two quotes to get one. */
6942 for_decimal
= "\"\n\t.byte ";
6946 if (count_string
>= 512)
6948 fputs (to_close
, file
);
6950 for_string
= "\t.byte \"";
6951 for_decimal
= "\t.byte ";
6959 fputs (for_decimal
, file
);
6960 fprintf (file
, "%d", c
);
6962 for_string
= "\n\t.byte \"";
6969 /* Now close the string if we have written one. Then end the line. */
6971 fputs (to_close
, file
);
6974 /* Generate a unique section name for FILENAME for a section type
6975 represented by SECTION_DESC. Output goes into BUF.
6977 SECTION_DESC can be any string, as long as it is different for each
6978 possible section type.
6980 We name the section in the same manner as xlc. The name begins with an
6981 underscore followed by the filename (after stripping any leading directory
6982 names) with the last period replaced by the string SECTION_DESC. If
6983 FILENAME does not contain a period, SECTION_DESC is appended to the end of
6987 rs6000_gen_section_name (buf
, filename
, section_desc
)
6989 const char *filename
;
6990 const char *section_desc
;
6992 const char *q
, *after_last_slash
, *last_period
= 0;
6996 after_last_slash
= filename
;
6997 for (q
= filename
; *q
; q
++)
7000 after_last_slash
= q
+ 1;
7005 len
= strlen (after_last_slash
) + strlen (section_desc
) + 2;
7006 *buf
= (char *) permalloc (len
);
7011 for (q
= after_last_slash
; *q
; q
++)
7013 if (q
== last_period
)
7015 strcpy (p
, section_desc
);
7016 p
+= strlen (section_desc
);
7019 else if (ISALNUM (*q
))
7023 if (last_period
== 0)
7024 strcpy (p
, section_desc
);
7029 /* Write function profiler code. */
7032 output_function_profiler (file
, labelno
)
7036 /* The last used parameter register. */
7041 ASM_GENERATE_INTERNAL_LABEL (buf
, "LP", labelno
);
7042 switch (DEFAULT_ABI
)
7049 case ABI_AIX_NODESC
:
7050 fprintf (file
, "\tmflr %s\n", reg_names
[0]);
7053 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file
);
7054 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7055 reg_names
[0], reg_names
[1]);
7056 asm_fprintf (file
, "\tmflr %s\n", reg_names
[12]);
7057 asm_fprintf (file
, "\t{l|lwz} %s,", reg_names
[0]);
7058 assemble_name (file
, buf
);
7059 asm_fprintf (file
, "@got(%s)\n", reg_names
[12]);
7061 else if (flag_pic
> 1)
7063 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7064 reg_names
[0], reg_names
[1]);
7065 /* Now, we need to get the address of the label. */
7066 fputs ("\tbl 1f\n\t.long ", file
);
7067 assemble_name (file
, buf
);
7068 fputs ("-.\n1:", file
);
7069 asm_fprintf (file
, "\tmflr %s\n", reg_names
[11]);
7070 asm_fprintf (file
, "\t{l|lwz} %s,0(%s)\n",
7071 reg_names
[0], reg_names
[11]);
7072 asm_fprintf (file
, "\t{cax|add} %s,%s,%s\n",
7073 reg_names
[0], reg_names
[0], reg_names
[11]);
7077 asm_fprintf (file
, "\t{liu|lis} %s,", reg_names
[12]);
7078 assemble_name (file
, buf
);
7079 fputs ("@ha\n", file
);
7080 asm_fprintf (file
, "\t{st|stw} %s,4(%s)\n",
7081 reg_names
[0], reg_names
[1]);
7082 asm_fprintf (file
, "\t{cal|la} %s,", reg_names
[0]);
7083 assemble_name (file
, buf
);
7084 asm_fprintf (file
, "@l(%s)\n", reg_names
[12]);
7087 if (current_function_needs_context
)
7088 asm_fprintf (file
, "\tmr %s,%s\n",
7089 reg_names
[30], reg_names
[STATIC_CHAIN_REGNUM
]);
7090 fprintf (file
, "\tbl %s\n", RS6000_MCOUNT
);
7091 if (current_function_needs_context
)
7092 asm_fprintf (file
, "\tmr %s,%s\n",
7093 reg_names
[STATIC_CHAIN_REGNUM
], reg_names
[30]);
7097 /* Set up a TOC entry for the profiler label. */
7099 ASM_OUTPUT_INTERNAL_LABEL (file
, "LPC", labelno
);
7100 if (TARGET_MINIMAL_TOC
)
7102 fputs (TARGET_32BIT
? "\t.long " : "\t.llong ", file
);
7103 assemble_name (file
, buf
);
7108 fputs ("\t.tc\t", file
);
7109 assemble_name (file
, buf
);
7110 fputs ("[TC],", file
);
7111 assemble_name (file
, buf
);
7116 /* Figure out last used parameter register. The proper thing to do is
7117 to walk incoming args of the function. A function might have live
7118 parameter registers even if it has no incoming args. */
7120 for (last_parm_reg
= 10;
7121 last_parm_reg
> 2 && ! regs_ever_live
[last_parm_reg
];
7125 /* Save parameter registers in regs 23-30 and static chain in r22.
7126 Don't overwrite reg 31, since it might be set up as the frame pointer. */
7128 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
7129 asm_fprintf (file
, "\tmr %d,%d\n", j
, i
);
7130 if (current_function_needs_context
)
7131 asm_fprintf (file
, "\tmr %d,%d\n", j
, STATIC_CHAIN_REGNUM
);
7133 /* Load location address into r3, and call mcount. */
7135 ASM_GENERATE_INTERNAL_LABEL (buf
, "LPC", labelno
);
7136 asm_fprintf (file
, TARGET_32BIT
? "\t{l|lwz} %s," : "\tld %s,",
7138 assemble_name (file
, buf
);
7139 asm_fprintf (file
, "(%s)\n\tbl %s\n\t", reg_names
[2], RS6000_MCOUNT
);
7140 asm_fprintf (file
, RS6000_CALL_GLUE
);
7143 /* Restore parameter registers and static chain. */
7145 for (i
= 3, j
= 30; i
<= last_parm_reg
; i
++, j
--)
7146 asm_fprintf (file
, "\tmr %d,%d\n", i
, j
);
7147 if (current_function_needs_context
)
7148 asm_fprintf (file
, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM
, j
);
7154 /* Adjust the cost of a scheduling dependency. Return the new cost of
7155 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
7158 rs6000_adjust_cost (insn
, link
, dep_insn
, cost
)
7161 rtx dep_insn ATTRIBUTE_UNUSED
;
7164 if (! recog_memoized (insn
))
7167 if (REG_NOTE_KIND (link
) != 0)
7170 if (REG_NOTE_KIND (link
) == 0)
7172 /* Data dependency; DEP_INSN writes a register that INSN reads some
7175 /* Tell the first scheduling pass about the latency between a mtctr
7176 and bctr (and mtlr and br/blr). The first scheduling pass will not
7177 know about this latency since the mtctr instruction, which has the
7178 latency associated to it, will be generated by reload. */
7179 if (get_attr_type (insn
) == TYPE_JMPREG
)
7180 return TARGET_POWER
? 5 : 4;
7182 /* Fall out to return default cost. */
7188 /* A C statement (sans semicolon) to update the integer scheduling priority
7189 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
7190 increase the priority to execute INSN later. Do not define this macro if
7191 you do not need to adjust the scheduling priorities of insns. */
7194 rs6000_adjust_priority (insn
, priority
)
7195 rtx insn ATTRIBUTE_UNUSED
;
7198 /* On machines (like the 750) which have asymetric integer units, where one
7199 integer unit can do multiply and divides and the other can't, reduce the
7200 priority of multiply/divide so it is scheduled before other integer
7204 if (! INSN_P (insn
))
7207 if (GET_CODE (PATTERN (insn
)) == USE
)
7210 switch (rs6000_cpu_attr
) {
7212 switch (get_attr_type (insn
))
7219 fprintf (stderr
, "priority was %#x (%d) before adjustment\n",
7220 priority
, priority
);
7221 if (priority
>= 0 && priority
< 0x01000000)
7231 /* Return how many instructions the machine can issue per cycle */
7232 int get_issue_rate()
7234 switch (rs6000_cpu_attr
) {
7235 case CPU_RIOS1
: /* ? */
7237 case CPU_PPC601
: /* ? */
7254 /* Length in units of the trampoline for entering a nested function. */
7257 rs6000_trampoline_size ()
7261 switch (DEFAULT_ABI
)
7267 ret
= (TARGET_32BIT
) ? 12 : 24;
7272 case ABI_AIX_NODESC
:
7273 ret
= (TARGET_32BIT
) ? 40 : 48;
7280 /* Emit RTL insns to initialize the variable parts of a trampoline.
7281 FNADDR is an RTX for the address of the function's pure code.
7282 CXT is an RTX for the static chain value for the function. */
7285 rs6000_initialize_trampoline (addr
, fnaddr
, cxt
)
7290 enum machine_mode pmode
= Pmode
;
7291 int regsize
= (TARGET_32BIT
) ? 4 : 8;
7292 rtx ctx_reg
= force_reg (pmode
, cxt
);
7294 switch (DEFAULT_ABI
)
7299 /* Macros to shorten the code expansions below. */
7300 #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr))
7301 #define MEM_PLUS(addr,offset) \
7302 gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset)))
7304 /* Under AIX, just build the 3 word function descriptor */
7307 rtx fn_reg
= gen_reg_rtx (pmode
);
7308 rtx toc_reg
= gen_reg_rtx (pmode
);
7309 emit_move_insn (fn_reg
, MEM_DEREF (fnaddr
));
7310 emit_move_insn (toc_reg
, MEM_PLUS (fnaddr
, 4));
7311 emit_move_insn (MEM_DEREF (addr
), fn_reg
);
7312 emit_move_insn (MEM_PLUS (addr
, regsize
), toc_reg
);
7313 emit_move_insn (MEM_PLUS (addr
, 2*regsize
), ctx_reg
);
7317 /* Under V.4/eabi, call __trampoline_setup to do the real work. */
7320 case ABI_AIX_NODESC
:
7321 emit_library_call (gen_rtx_SYMBOL_REF (SImode
, "__trampoline_setup"),
7324 GEN_INT (rs6000_trampoline_size ()), SImode
,
7334 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7335 with arguments ARGS is a valid machine specific attribute for DECL.
7336 The attributes in ATTRIBUTES have previously been assigned to DECL. */
7339 rs6000_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
7340 tree decl ATTRIBUTE_UNUSED
;
7341 tree attributes ATTRIBUTE_UNUSED
;
7342 tree identifier ATTRIBUTE_UNUSED
;
7343 tree args ATTRIBUTE_UNUSED
;
7348 /* If defined, a C expression whose value is nonzero if IDENTIFIER
7349 with arguments ARGS is a valid machine specific attribute for TYPE.
7350 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
7353 rs6000_valid_type_attribute_p (type
, attributes
, identifier
, args
)
7355 tree attributes ATTRIBUTE_UNUSED
;
7359 if (TREE_CODE (type
) != FUNCTION_TYPE
7360 && TREE_CODE (type
) != FIELD_DECL
7361 && TREE_CODE (type
) != TYPE_DECL
)
7364 /* Longcall attribute says that the function is not within 2**26 bytes
7365 of the current function, and to do an indirect call. */
7366 if (is_attribute_p ("longcall", identifier
))
7367 return (args
== NULL_TREE
);
7372 /* If defined, a C expression whose value is zero if the attributes on
7373 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
7374 two if they are nearly compatible (which causes a warning to be
7378 rs6000_comp_type_attributes (type1
, type2
)
7379 tree type1 ATTRIBUTE_UNUSED
;
7380 tree type2 ATTRIBUTE_UNUSED
;
7385 /* If defined, a C statement that assigns default attributes to newly
7389 rs6000_set_default_type_attributes (type
)
7390 tree type ATTRIBUTE_UNUSED
;
7395 /* Return a reference suitable for calling a function with the
7396 longcall attribute. */
7398 rs6000_longcall_ref (call_ref
)
7401 const char *call_name
;
7404 if (GET_CODE (call_ref
) != SYMBOL_REF
)
7407 /* System V adds '.' to the internal name, so skip them. */
7408 call_name
= XSTR (call_ref
, 0);
7409 if (*call_name
== '.')
7411 while (*call_name
== '.')
7414 node
= get_identifier (call_name
);
7415 call_ref
= gen_rtx_SYMBOL_REF (VOIDmode
, IDENTIFIER_POINTER (node
));
7418 return force_reg (Pmode
, call_ref
);
7422 /* A C statement or statements to switch to the appropriate section
7423 for output of RTX in mode MODE. You can assume that RTX is some
7424 kind of constant in RTL. The argument MODE is redundant except in
7425 the case of a `const_int' rtx. Select the section by calling
7426 `text_section' or one of the alternatives for other sections.
7428 Do not define this macro if you put all constants in the read-only
7434 rs6000_select_rtx_section (mode
, x
)
7435 enum machine_mode mode
;
7438 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x
, mode
))
7444 /* A C statement or statements to switch to the appropriate
7445 section for output of DECL. DECL is either a `VAR_DECL' node
7446 or a constant of some sort. RELOC indicates whether forming
7447 the initial value of DECL requires link-time relocations. */
7450 rs6000_select_section (decl
, reloc
)
7454 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7457 static void (* const sec_funcs
[4]) PARAMS ((void)) = {
7464 needs_sdata
= (size
> 0
7465 && size
<= g_switch_value
7466 && rs6000_sdata
!= SDATA_NONE
7467 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7469 if (TREE_CODE (decl
) == STRING_CST
)
7470 readonly
= ! flag_writable_strings
;
7471 else if (TREE_CODE (decl
) == VAR_DECL
)
7472 readonly
= (! (flag_pic
&& reloc
)
7473 && TREE_READONLY (decl
)
7474 && ! TREE_SIDE_EFFECTS (decl
)
7475 && DECL_INITIAL (decl
)
7476 && DECL_INITIAL (decl
) != error_mark_node
7477 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7480 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7483 (*sec_funcs
[(readonly
? 0 : 2) + (needs_sdata
? 1 : 0)])();
7486 /* A C statement to build up a unique section name, expressed as a
7487 STRING_CST node, and assign it to DECL_SECTION_NAME (decl).
7488 RELOC indicates whether the initial value of EXP requires
7489 link-time relocations. If you do not define this macro, GCC will use
7490 the symbol name prefixed by `.' as the section name. Note - this
7491 macro can now be called for unitialised data items as well as
7492 initialised data and functions. */
7495 rs6000_unique_section (decl
, reloc
)
7499 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7508 static const char *const prefixes
[7][2] =
7510 { ".text.", ".gnu.linkonce.t." },
7511 { ".rodata.", ".gnu.linkonce.r." },
7512 { ".sdata2.", ".gnu.linkonce.s2." },
7513 { ".data.", ".gnu.linkonce.d." },
7514 { ".sdata.", ".gnu.linkonce.s." },
7515 { ".bss.", ".gnu.linkonce.b." },
7516 { ".sbss.", ".gnu.linkonce.sb." }
7519 needs_sdata
= (TREE_CODE (decl
) != FUNCTION_DECL
7521 && size
<= g_switch_value
7522 && rs6000_sdata
!= SDATA_NONE
7523 && (rs6000_sdata
!= SDATA_DATA
|| TREE_PUBLIC (decl
)));
7525 if (TREE_CODE (decl
) == STRING_CST
)
7526 readonly
= ! flag_writable_strings
;
7527 else if (TREE_CODE (decl
) == VAR_DECL
)
7528 readonly
= (! (flag_pic
&& reloc
)
7529 && TREE_READONLY (decl
)
7530 && ! TREE_SIDE_EFFECTS (decl
)
7531 && DECL_INITIAL (decl
)
7532 && DECL_INITIAL (decl
) != error_mark_node
7533 && TREE_CONSTANT (DECL_INITIAL (decl
)));
7536 if (needs_sdata
&& rs6000_sdata
!= SDATA_EABI
)
7539 sec
= ((TREE_CODE (decl
) == FUNCTION_DECL
? 0 : 1)
7540 + (readonly
? 0 : 2)
7541 + (needs_sdata
? 1 : 0)
7542 + (DECL_INITIAL (decl
) == 0
7543 || DECL_INITIAL (decl
) == error_mark_node
) ? 4 : 0);
7545 STRIP_NAME_ENCODING (name
, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl
)));
7546 prefix
= prefixes
[sec
][DECL_ONE_ONLY (decl
)];
7547 len
= strlen (name
) + strlen (prefix
);
7548 string
= alloca (len
+ 1);
7550 sprintf (string
, "%s%s", prefix
, name
);
7552 DECL_SECTION_NAME (decl
) = build_string (len
, string
);
7556 /* If we are referencing a function that is static or is known to be
7557 in this file, make the SYMBOL_REF special. We can use this to indicate
7558 that we can branch to this function without emitting a no-op after the
7559 call. For real AIX calling sequences, we also replace the
7560 function name with the real name (1 or 2 leading .'s), rather than
7561 the function descriptor name. This saves a lot of overriding code
7562 to read the prefixes. */
7565 rs6000_encode_section_info (decl
)
7568 if (TREE_CODE (decl
) == FUNCTION_DECL
)
7570 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
7571 if ((TREE_ASM_WRITTEN (decl
) || ! TREE_PUBLIC (decl
))
7572 && ! DECL_WEAK (decl
))
7573 SYMBOL_REF_FLAG (sym_ref
) = 1;
7575 if (DEFAULT_ABI
== ABI_AIX
)
7577 size_t len1
= (DEFAULT_ABI
== ABI_AIX
) ? 1 : 2;
7578 size_t len2
= strlen (XSTR (sym_ref
, 0));
7579 char *str
= alloca (len1
+ len2
+ 1);
7582 memcpy (str
+ len1
, XSTR (sym_ref
, 0), len2
+ 1);
7584 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len1
+ len2
);
7587 else if (rs6000_sdata
!= SDATA_NONE
7588 && (DEFAULT_ABI
== ABI_V4
|| DEFAULT_ABI
== ABI_SOLARIS
)
7589 && TREE_CODE (decl
) == VAR_DECL
)
7591 int size
= int_size_in_bytes (TREE_TYPE (decl
));
7592 tree section_name
= DECL_SECTION_NAME (decl
);
7593 const char *name
= (char *)0;
7598 if (TREE_CODE (section_name
) == STRING_CST
)
7600 name
= TREE_STRING_POINTER (section_name
);
7601 len
= TREE_STRING_LENGTH (section_name
);
7607 if ((size
> 0 && size
<= g_switch_value
)
7609 && ((len
== sizeof (".sdata") - 1
7610 && strcmp (name
, ".sdata") == 0)
7611 || (len
== sizeof (".sdata2") - 1
7612 && strcmp (name
, ".sdata2") == 0)
7613 || (len
== sizeof (".sbss") - 1
7614 && strcmp (name
, ".sbss") == 0)
7615 || (len
== sizeof (".sbss2") - 1
7616 && strcmp (name
, ".sbss2") == 0)
7617 || (len
== sizeof (".PPC.EMB.sdata0") - 1
7618 && strcmp (name
, ".PPC.EMB.sdata0") == 0)
7619 || (len
== sizeof (".PPC.EMB.sbss0") - 1
7620 && strcmp (name
, ".PPC.EMB.sbss0") == 0))))
7622 rtx sym_ref
= XEXP (DECL_RTL (decl
), 0);
7623 size_t len
= strlen (XSTR (sym_ref
, 0));
7624 char *str
= alloca (len
+ 2);
7627 memcpy (str
+ 1, XSTR (sym_ref
, 0), len
+ 1);
7628 XSTR (sym_ref
, 0) = ggc_alloc_string (str
, len
+ 1);
7633 #endif /* USING_SVR4_H */
7636 /* Return a REG that occurs in ADDR with coefficient 1.
7637 ADDR can be effectively incremented by incrementing REG.
7639 r0 is special and we must not select it as an address
7640 register by this routine since our caller will try to
7641 increment the returned register via an "la" instruction. */
7644 find_addr_reg (addr
)
7647 while (GET_CODE (addr
) == PLUS
)
7649 if (GET_CODE (XEXP (addr
, 0)) == REG
7650 && REGNO (XEXP (addr
, 0)) != 0)
7651 addr
= XEXP (addr
, 0);
7652 else if (GET_CODE (XEXP (addr
, 1)) == REG
7653 && REGNO (XEXP (addr
, 1)) != 0)
7654 addr
= XEXP (addr
, 1);
7655 else if (CONSTANT_P (XEXP (addr
, 0)))
7656 addr
= XEXP (addr
, 1);
7657 else if (CONSTANT_P (XEXP (addr
, 1)))
7658 addr
= XEXP (addr
, 0);
7662 if (GET_CODE (addr
) == REG
&& REGNO (addr
) != 0)
7668 rs6000_fatal_bad_address (op
)
7671 fatal_insn ("bad address", op
);
7674 /* Called to register all of our global variables with the garbage
7678 rs6000_add_gc_roots ()
7680 ggc_add_rtx_root (&rs6000_compare_op0
, 1);
7681 ggc_add_rtx_root (&rs6000_compare_op1
, 1);
7683 toc_hash_table
= htab_create (1021, toc_hash_function
, toc_hash_eq
, NULL
);
7684 ggc_add_root (&toc_hash_table
, 1, sizeof (toc_hash_table
),
7685 toc_hash_mark_table
);